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for (const auto& kv : kwargs) {
kwarg_ivalues[py::cast<std::string>(kv.first)] =
torch::jit::toIValue(kv.second, c10::AnyType::get());
}
c10::IValue ret = self(arg_ivalues, kwarg_ivalues);
return toPyObject(ret);
})
.def(
"benchmark",
[](StaticModule& self,
const std::vector<at::Tensor>& args,
const std::unordered_map<std::string, at::Tensor>& kwargs,
const int warmup_runs,
const int main_runs) {
std::vector<c10::IValue> arg_ivalues{args.begin(), args.end()};
std::unordered_map<std::string, c10::IValue> kwarg_ivalues{
kwargs.begin(), kwargs.end()};
self.runtime().benchmark(
{arg_ivalues}, {kwarg_ivalues}, warmup_runs, main_runs);
})
.def(
"benchmark_individual_ops",
[](StaticModule& self,
const std::vector<at::Tensor>& args,
const std::unordered_map<std::string, at::Tensor>& kwargs,
const int warmup_runs,
const int main_runs) {
std::vector<c10::IValue> arg_ivalues{args.begin(), args.end()};
std::unordered_map<std::string, c10::IValue> kwarg_ivalues{
kwargs.begin(), kwargs.end()};
return self.runtime().benchmark_individual_ops(
{arg_ivalues}, {kwarg_ivalues}, warmup_runs, main_runs);
});
m.def(
"_jit_to_static_module",
[](std::shared_ptr<torch::jit::Graph> g) { return StaticModule(g); })
.def(
"_jit_to_static_module",
[](const torch::jit::Module& module) { return StaticModule(module); })
.def(
"_fuse_to_static_module",
[](torch::jit::Module& module, size_t min_size) {
module.eval();
module = freeze_module(module);
Method method = module.get_method("forward");
auto graph = method.graph();
fuseStaticSubgraphs(graph, min_size);
},
py::arg("module"),
py::arg("min_size") = DEFAULT_FUSION_SIZE)
.def(
"_fuse_to_static_module",
[](std::shared_ptr<torch::jit::Graph> g, size_t min_size) {
fuseStaticSubgraphs(g, min_size);
},
py::arg("graph"),
py::arg("min_size") = DEFAULT_FUSION_SIZE);
}
} // namespace jit
} // namespace torch
/*******************************************************************************
* Copyright 2020-2022 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#include "cpu/reorder/cpu_reorder.hpp"
namespace dnnl {
namespace impl {
namespace cpu {
// clang-format off
const impl_list_map_t &regular_f16_impl_list_map() {
static const impl_list_map_t the_map = REG_REORDER_P({
// f16 ->
{{f16, data_type::undef, 0}, {
REG_SR(f16, any, f16, any, fmt_order::any, spec::reference)
REG_SR(f16, any, f32, any, fmt_order::any, spec::reference)
nullptr,
}},
});
return the_map;
}