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ruby-antlr-hash-2-json/raw/Simple.g4 | msangel/playground | 0 | 5486 | grammar Simple;
prog: classDef+ ;
classDef
: 'class' ID '{' member+ '}' // a class has one or more members
{System.out.println("class "+$ID.text);}
;
member
: 'int' ID ';' // field definition
{System.out.println("var "+$ID.text);}
| 'int' f=ID '(' ID ')' '{' stat '}' // method definition
{System.out.println("method: "+$f.text);}
;
stat: expr ';'
{System.out.println("found expr: "+$stat.text);}
| ID '=' expr ';'
{System.out.println("found assign: "+$stat.text);}
;
expr: INT
| ID '(' INT ')'
;
INT : [0-9]+ ;
ID : [a-zA-Z]+ ;
WS : [ \t\r\n]+ -> skip ;
|
FormalAnalyzer/models/apps/xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.als | Mohannadcse/IoTCOM_BehavioralRuleExtractor | 0 | 902 | <filename>FormalAnalyzer/models/apps/xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.als<gh_stars>0
module app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor
open IoTBottomUp as base
open cap_runIn
open cap_now
open cap_contactSensor
open cap_switch
one sig app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor extends IoTApp {
contact1 : set cap_contactSensor,
switch1 : one cap_switch,
} {
rules = r
//capabilities = contact1 + switch1
}
abstract sig r extends Rule {}
one sig r0 extends r {}{
triggers = r0_trig
conditions = r0_cond
commands = r0_comm
}
abstract sig r0_trig extends Trigger {}
one sig r0_trig0 extends r0_trig {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.contact1
attribute = cap_contactSensor_attr_contact
no value
}
abstract sig r0_cond extends Condition {}
one sig r0_cond0 extends r0_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_off
}
one sig r0_cond1 extends r0_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val - cap_switch_attr_switch_val_on
}
one sig r0_cond2 extends r0_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val - cap_switch_attr_switch_val_off
}
abstract sig r0_comm extends Command {}
one sig r0_comm0 extends r0_comm {} {
capability = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_on
}
one sig r1 extends r {}{
triggers = r1_trig
conditions = r1_cond
commands = r1_comm
}
abstract sig r1_trig extends Trigger {}
one sig r1_trig0 extends r1_trig {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.contact1
attribute = cap_contactSensor_attr_contact
no value
}
abstract sig r1_cond extends Condition {}
one sig r1_cond0 extends r1_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_on
}
abstract sig r1_comm extends Command {}
one sig r1_comm0 extends r1_comm {} {
capability = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_off
}
one sig r2 extends r {}{
triggers = r2_trig
conditions = r2_cond
commands = r2_comm
}
abstract sig r2_trig extends Trigger {}
one sig r2_trig0 extends r2_trig {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.contact1
attribute = cap_contactSensor_attr_contact
no value
}
abstract sig r2_cond extends Condition {}
one sig r2_cond0 extends r2_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_on
}
one sig r2_cond1 extends r2_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val - cap_switch_attr_switch_val_on
}
one sig r2_cond2 extends r2_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val - cap_switch_attr_switch_val_off
}
abstract sig r2_comm extends Command {}
one sig r2_comm0 extends r2_comm {} {
capability = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_off
}
one sig r3 extends r {}{
triggers = r3_trig
conditions = r3_cond
commands = r3_comm
}
abstract sig r3_trig extends Trigger {}
one sig r3_trig0 extends r3_trig {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.contact1
attribute = cap_contactSensor_attr_contact
no value
}
abstract sig r3_cond extends Condition {}
one sig r3_cond0 extends r3_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_off
}
one sig r3_cond1 extends r3_cond {} {
capabilities = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val - cap_switch_attr_switch_val_on
}
abstract sig r3_comm extends Command {}
one sig r3_comm0 extends r3_comm {} {
capability = app_xwayonofftoggleswitchformoddedPEQDoorOpenCloseSensor.switch1
attribute = cap_switch_attr_switch
value = cap_switch_attr_switch_val_on
}
|
waterbackground/_includes/vint.asm | ArcadeTV/megadrive-samples | 5 | 247116 | <gh_stars>1-10
;==============================================================
; Vertical Interrupt
;==============================================================
INT_VInterrupt:
movem.l d0-a6,-(sp)
move.b #$FF,(RAM_VINT_FLAG)
add.l #1,(RAM_CURRENT_FRAME).l
not.b (RAM_TICTOC).l
INT_VInterrupt_return:
movem.l (sp)+,d0-a6
rte
;-------------------------------------------------------------------------------
; WaitVBlank
;-------------------------------------------------------------------------------
WaitVBlank:
cmpi.b #$FF,(RAM_VINT_FLAG)
bne.s WaitVBlank ; loop until flag changes
move.b #$00,(RAM_VINT_FLAG)
rts
|
src/Shaders/Sdk/Direct3D11/SubD11/SubD11_HS_4444.asm | tgjones/slimshader-cpp | 20 | 82342 | <filename>src/Shaders/Sdk/Direct3D11/SubD11/SubD11_HS_4444.asm
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.30.9200.16384
//
//
///
// Buffer Definitions:
//
// cbuffer cbTangentStencilConstants
// {
//
// float g_TanM[1024]; // Offset: 0 Size: 16372 [unused]
// float g_fCi[16]; // Offset: 16384 Size: 244
//
// }
//
// cbuffer cbPerFrame
// {
//
// float4x4 g_mViewProjection; // Offset: 0 Size: 64 [unused]
// float3 g_vCameraPosWorld; // Offset: 64 Size: 12 [unused]
// float g_fTessellationFactor; // Offset: 76 Size: 4
// float g_fDisplacementHeight; // Offset: 80 Size: 4 [unused]
// float3 g_vSolidColor; // Offset: 84 Size: 12 [unused]
//
// }
//
//
// Resource Bindings:
//
// Name Type Format Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cbTangentStencilConstants cbuffer NA NA 0 1
// cbPerFrame cbuffer NA NA 2 1
//
//
//
// Patch Constant signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_TessFactor 0 x 0 QUADEDGE float x
// SV_TessFactor 1 x 1 QUADEDGE float x
// SV_TessFactor 2 x 2 QUADEDGE float x
// SV_TessFactor 3 x 3 QUADEDGE float x
// SV_InsideTessFactor 0 x 4 QUADINT float x
// SV_InsideTessFactor 1 x 5 QUADINT float x
// TANGENT 0 xyz 6 NONE float xyz
// TANGENT 1 xyz 7 NONE float xyz
// TANGENT 2 xyz 8 NONE float xyz
// TANGENT 3 xyz 9 NONE float xyz
// TEXCOORD 0 xy 10 NONE float xy
// TEXCOORD 1 xy 11 NONE float xy
// TEXCOORD 2 xy 12 NONE float xy
// TEXCOORD 3 xy 13 NONE float xy
// TANUCORNER 0 xyz 14 NONE float xyz
// TANUCORNER 1 xyz 15 NONE float xyz
// TANUCORNER 2 xyz 16 NONE float xyz
// TANUCORNER 3 xyz 17 NONE float xyz
// TANVCORNER 0 xyz 18 NONE float xyz
// TANVCORNER 1 xyz 19 NONE float xyz
// TANVCORNER 2 xyz 20 NONE float xyz
// TANVCORNER 3 xyz 21 NONE float xyz
// TANWEIGHTS 0 xyzw 22 NONE float xyzw
//
//
// Input signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// WORLDPOS 0 xyz 0 NONE float xyz
// TEXCOORD 0 xy 1 NONE float xy
// TANGENT 0 xyz 2 NONE float xyz
//
//
// Output signature:
//
// Name Index Mask Register SysValue Format Used
// -------------------- ----- ------ -------- -------- ------- ------
// BEZIERPOS 0 xyz 0 NONE float xyz
//
// Tessellation Domain # of control points
// -------------------- --------------------
// Quadrilateral 16
//
// Tessellation Output Primitive Partitioning Type
// ------------------------------ ------------------
// Clockwise Triangles Integer
//
hs_5_0
hs_decls
dcl_input_control_point_count 32
dcl_output_control_point_count 16
dcl_tessellator_domain domain_quad
dcl_tessellator_partitioning partitioning_integer
dcl_tessellator_output_primitive output_triangle_cw
dcl_globalFlags refactoringAllowed
dcl_immediateConstantBuffer { { 0, 0, 6, 3},
{ 2, 3, 9, 0},
{ 0, 3, 9, 2},
{ 2, 6, 0, 0},
{ 4, 6, 3, 2},
{ 7, 0, 3, 0},
{ -2, -1, 6, 0},
{ 0, 9, 3, 2},
{ 6, 6, 0, 0},
{ 6, 9, 3, 9},
{ 0, 0, 6, 0},
{ 0, 0, 0, 3} }
dcl_constantbuffer cb0[1026], dynamicIndexed
dcl_constantbuffer cb2[5], immediateIndexed
hs_control_point_phase
dcl_input vOutputControlPointID
dcl_input v[32][0].xyz
dcl_output o0.xyz
dcl_temps 2
switch vOutputControlPointID
case l(5)
add r1.xyz, v[1][0].xyzx, v[1][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[2][0].xyzx
mad r1.xyz, v[3][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.111111, 0.111111, 0.111111, 0.000000)
break
case l(6)
add r1.xyz, v[0][0].xyzx, v[0][0].xyzx
mad r1.xyz, v[1][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mad r1.xyz, v[2][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[3][0].xyzx
mul r0.xyz, r1.xyzx, l(0.111111, 0.111111, 0.111111, 0.000000)
break
case l(10)
mad r1.xyz, v[1][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), v[0][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mad r1.xyz, v[3][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.111111, 0.111111, 0.111111, 0.000000)
break
case l(9)
mad r1.xyz, v[0][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), v[1][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mad r1.xyz, v[3][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.111111, 0.111111, 0.111111, 0.000000)
break
case l(0)
mul r1.xyz, l(4.000000, 4.000000, 4.000000, 0.000000), v[4][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(16.000000, 16.000000, 16.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[5][0].xyzx
mad r1.xyz, v[6][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[7][0].xyzx
add r1.xyz, r1.xyzx, v[15][0].xyzx
mad r1.xyz, v[1][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[2][0].xyzx
mad r1.xyz, v[3][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.027778, 0.027778, 0.027778, 0.000000)
break
case l(3)
mul r1.xyz, l(4.000000, 4.000000, 4.000000, 0.000000), v[7][0].xyzx
mad r1.xyz, v[1][0].xyzx, l(16.000000, 16.000000, 16.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[8][0].xyzx
mad r1.xyz, v[9][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[10][0].xyzx
add r1.xyz, r1.xyzx, v[6][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[3][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.027778, 0.027778, 0.027778, 0.000000)
break
case l(15)
mul r1.xyz, l(4.000000, 4.000000, 4.000000, 0.000000), v[10][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(16.000000, 16.000000, 16.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[11][0].xyzx
mad r1.xyz, v[12][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[13][0].xyzx
add r1.xyz, r1.xyzx, v[9][0].xyzx
mad r1.xyz, v[3][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[0][0].xyzx
mad r1.xyz, v[1][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.027778, 0.027778, 0.027778, 0.000000)
break
case l(12)
mul r1.xyz, l(4.000000, 4.000000, 4.000000, 0.000000), v[13][0].xyzx
mad r1.xyz, v[3][0].xyzx, l(16.000000, 16.000000, 16.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[14][0].xyzx
mad r1.xyz, v[15][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[4][0].xyzx
add r1.xyz, r1.xyzx, v[12][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[1][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.027778, 0.027778, 0.027778, 0.000000)
break
case l(1)
mul r1.xyz, l(4.000000, 4.000000, 4.000000, 0.000000), v[1][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[2][0].xyzx
mad r1.xyz, v[3][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mad r1.xyz, v[6][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[7][0].xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(2)
mul r1.xyz, l(8.000000, 8.000000, 8.000000, 0.000000), v[1][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mad r1.xyz, v[2][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[3][0].xyzx
add r1.xyz, r1.xyzx, v[6][0].xyzx
mad r1.xyz, v[7][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(13)
mad r1.xyz, v[0][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), v[1][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mad r1.xyz, v[3][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
mad r1.xyz, v[13][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[12][0].xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(14)
mad r1.xyz, v[1][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), v[0][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
mad r1.xyz, v[3][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[13][0].xyzx
mad r1.xyz, v[12][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(4)
add r1.xyz, v[1][0].xyzx, v[1][0].xyzx
mad r1.xyz, v[0][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[2][0].xyzx
mad r1.xyz, v[3][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
mad r1.xyz, v[4][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[15][0].xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(8)
mad r1.xyz, v[0][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), v[1][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mad r1.xyz, v[3][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[4][0].xyzx
mad r1.xyz, v[15][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(7)
add r1.xyz, v[0][0].xyzx, v[0][0].xyzx
mad r1.xyz, v[1][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
mad r1.xyz, v[2][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[3][0].xyzx
mad r1.xyz, v[9][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[10][0].xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
case l(11)
mad r1.xyz, v[1][0].xyzx, l(4.000000, 4.000000, 4.000000, 0.000000), v[0][0].xyzx
mad r1.xyz, v[2][0].xyzx, l(8.000000, 8.000000, 8.000000, 0.000000), r1.xyzx
mad r1.xyz, v[3][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
add r1.xyz, r1.xyzx, v[9][0].xyzx
mad r1.xyz, v[10][0].xyzx, l(2.000000, 2.000000, 2.000000, 0.000000), r1.xyzx
mul r0.xyz, r1.xyzx, l(0.055556, 0.055556, 0.055556, 0.000000)
break
default
mov r0.xyz, l(0,0,0,0)
break
endswitch
mov o0.xyz, r0.xyzx
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_output_siv o0.x, finalQuadUeq0EdgeTessFactor
dcl_output_siv o1.x, finalQuadVeq0EdgeTessFactor
dcl_output_siv o2.x, finalQuadUeq1EdgeTessFactor
dcl_output_siv o3.x, finalQuadVeq1EdgeTessFactor
dcl_temps 1
dcl_indexrange o0.x 4
mov r0.x, vForkInstanceID.x
mov o[r0.x + 0].x, cb2[4].w
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 2
dcl_input vForkInstanceID
dcl_output_siv o4.x, finalQuadUInsideTessFactor
dcl_output_siv o5.x, finalQuadVInsideTessFactor
dcl_temps 1
dcl_indexrange o4.x 2
mov r0.x, vForkInstanceID.x
mov o[r0.x + 4].x, cb2[4].w
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 8
dcl_input vForkInstanceID
dcl_input vicp[32][0].x
dcl_input vicp[32][1].x
dcl_input vicp[32][2].x
dcl_output o6.x
dcl_output o7.x
dcl_output o8.x
dcl_output o9.x
dcl_output o10.x
dcl_output o11.x
dcl_output o12.x
dcl_output o13.x
dcl_temps 1
dcl_indexrange o6.x 8
dcl_indexrange vicp[32][0].x 3
ult r0.x, vForkInstanceID.x, l(4)
and r0.x, r0.x, l(1)
and r0.y, vForkInstanceID.x, l(3)
mov r0.z, vForkInstanceID.x
mov o[r0.z + 6].x, vicp[r0.y + 0][r0.x + 1].x
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 8
dcl_input vForkInstanceID
dcl_input vicp[32][0].y
dcl_input vicp[32][1].y
dcl_input vicp[32][2].y
dcl_output o6.y
dcl_output o7.y
dcl_output o8.y
dcl_output o9.y
dcl_output o10.y
dcl_output o11.y
dcl_output o12.y
dcl_output o13.y
dcl_temps 1
dcl_indexrange o6.y 8
dcl_indexrange vicp[32][0].y 3
ult r0.x, vForkInstanceID.x, l(4)
and r0.x, r0.x, l(1)
and r0.y, vForkInstanceID.x, l(3)
mov r0.z, vForkInstanceID.x
mov o[r0.z + 6].y, vicp[r0.y + 0][r0.x + 1].y
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][2].z
dcl_output o6.z
dcl_output o7.z
dcl_output o8.z
dcl_output o9.z
dcl_temps 1
dcl_indexrange o6.z 4
mov r0.x, vForkInstanceID.x
mov o[r0.x + 6].z, vicp[r0.x + 0][2].z
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][0].x
dcl_output o14.x
dcl_output o17.x
dcl_output o18.x
dcl_output o19.x
dcl_temps 2
dcl_indexrange o14.x 6
mov r0.x, vForkInstanceID.x
mov r0.y, icb[r0.x + 8].w
mov r0.z, icb[r0.x + 4].w
mul r0.w, cb0[r0.z + 259].x, vicp[r0.y + 5][0].x
mad r0.w, vicp[r0.y + 4][0].x, cb0[r0.z + 258].x, r0.w
mad r0.y, vicp[r0.y + 6][0].x, cb0[r0.z + 260].x, r0.w
mov r0.w, icb[r0.x + 7].z
mad r0.y, vicp[r0.w + 4][0].x, cb0[r0.z + 261].x, r0.y
mov r0.w, icb[r0.x + 7].y
mov r0.x, icb[r0.x + 2].y
mad r0.y, vicp[r0.w + 6][0].x, cb0[r0.z + 257].x, r0.y
iadd r1.xyz, vForkInstanceID.xxxx, l(-1, 1, 2, 0)
ult r0.w, vForkInstanceID.x, l(1)
movc r1.xz, r0.wwww, l(1,0,0,0), r1.xxzx
and r1.y, r1.y, l(3)
movc r0.w, r0.w, l(3), r1.y
mad r0.y, vicp[r1.x + 0][0].x, cb0[r0.x + 256].x, r0.y
mad r0.x, vicp[r1.x + 1][0].x, cb0[r0.x + 257].x, r0.y
mad o[r1.z + 14].x, vicp[r0.w + 0][0].x, cb0[r0.z + 256].x, r0.x
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][0].y
dcl_output o14.y
dcl_output o17.y
dcl_output o18.y
dcl_output o19.y
dcl_temps 2
dcl_indexrange o14.y 6
mov r0.x, vForkInstanceID.x
mov r0.y, icb[r0.x + 8].w
mov r0.z, icb[r0.x + 4].w
mul r0.w, cb0[r0.z + 259].x, vicp[r0.y + 5][0].y
mad r0.w, vicp[r0.y + 4][0].y, cb0[r0.z + 258].x, r0.w
mad r0.y, vicp[r0.y + 6][0].y, cb0[r0.z + 260].x, r0.w
mov r0.w, icb[r0.x + 7].z
mad r0.y, vicp[r0.w + 4][0].y, cb0[r0.z + 261].x, r0.y
mov r0.w, icb[r0.x + 7].y
mov r0.x, icb[r0.x + 2].y
mad r0.y, vicp[r0.w + 6][0].y, cb0[r0.z + 257].x, r0.y
iadd r1.xyz, vForkInstanceID.xxxx, l(-1, 1, 2, 0)
ult r0.w, vForkInstanceID.x, l(1)
movc r1.xz, r0.wwww, l(1,0,0,0), r1.xxzx
and r1.y, r1.y, l(3)
movc r0.w, r0.w, l(3), r1.y
mad r0.y, vicp[r1.x + 0][0].y, cb0[r0.x + 256].x, r0.y
mad r0.x, vicp[r1.x + 1][0].y, cb0[r0.x + 257].x, r0.y
mad o[r1.z + 14].y, vicp[r0.w + 0][0].y, cb0[r0.z + 256].x, r0.x
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][0].z
dcl_output o14.z
dcl_output o17.z
dcl_output o18.z
dcl_output o19.z
dcl_temps 2
dcl_indexrange o14.z 6
mov r0.x, vForkInstanceID.x
mov r0.y, icb[r0.x + 8].w
mov r0.z, icb[r0.x + 4].w
mul r0.w, cb0[r0.z + 259].x, vicp[r0.y + 5][0].z
mad r0.w, vicp[r0.y + 4][0].z, cb0[r0.z + 258].x, r0.w
mad r0.y, vicp[r0.y + 6][0].z, cb0[r0.z + 260].x, r0.w
mov r0.w, icb[r0.x + 7].z
mad r0.y, vicp[r0.w + 4][0].z, cb0[r0.z + 261].x, r0.y
mov r0.w, icb[r0.x + 7].y
mov r0.x, icb[r0.x + 7].x
mad r0.y, vicp[r0.w + 6][0].z, cb0[r0.z + 257].x, r0.y
iadd r1.xyz, vForkInstanceID.xxxx, l(-1, 1, 2, 0)
ult r0.w, vForkInstanceID.x, l(1)
movc r1.xz, r0.wwww, l(1,0,0,0), r1.xxzx
and r1.y, r1.y, l(3)
movc r0.w, r0.w, l(3), r1.y
mad r0.y, vicp[r1.x + 0][0].z, cb0[r0.x + 256].x, r0.y
mad r0.x, vicp[r1.x + 1][0].z, cb0[r0.x + 257].x, r0.y
mad o[r1.z + 14].z, vicp[r0.w + 0][0].z, cb0[r0.z + 256].x, r0.x
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][0].x
dcl_output o15.x
dcl_output o16.x
dcl_output o20.x
dcl_output o21.x
dcl_temps 3
dcl_indexrange o15.x 7
mov r0.x, vForkInstanceID.x
mov r0.y, icb[r0.x + 3].z
mov r0.z, icb[r0.x + 1].w
mov r0.x, icb[r0.x + 0].z
mul r0.w, cb0[r0.z + 259].x, vicp[r0.y + 8][0].x
mad r0.w, vicp[r0.y + 7][0].x, cb0[r0.z + 258].x, r0.w
mad r0.w, vicp[r0.y + 9][0].x, cb0[r0.z + 260].x, r0.w
mad r0.x, vicp[r0.x + 4][0].x, cb0[r0.z + 261].x, r0.w
mad r0.x, vicp[r0.y + 6][0].x, cb0[r0.z + 257].x, r0.x
iadd r0.y, vForkInstanceID.x, l(4)
udiv null, r0.y, r0.y, l(7)
iadd r1.xyzw, vForkInstanceID.xxxx, l(2, 1, 6, 3)
udiv null, r0.w, r1.z, l(7)
ult r1.z, vForkInstanceID.x, l(2)
movc r0.y, r1.z, r0.w, r0.y
and r2.xy, r1.ywyy, l(3, 3, 0, 0)
movc r0.w, r1.z, r1.x, r2.x
movc r1.x, r1.z, vForkInstanceID.x, r1.w
mad r0.x, vicp[r0.w + 0][0].x, cb0[r0.y + 256].x, r0.x
iadd r1.yw, vForkInstanceID.xxxx, l(0, -2, 0, -1)
movc r0.w, r1.z, r2.y, r1.y
movc r1.y, r1.z, vForkInstanceID.x, r1.w
mad r0.x, vicp[r0.w + 0][0].x, cb0[r0.y + 257].x, r0.x
mad r0.x, vicp[r1.y + 0][0].x, cb0[r0.z + 256].x, r0.x
mov o[r1.x + 15].x, -r0.x
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][0].y
dcl_output o15.y
dcl_output o16.y
dcl_output o20.y
dcl_output o21.y
dcl_temps 3
dcl_indexrange o15.y 7
mov r0.x, vForkInstanceID.x
mov r0.y, icb[r0.x + 3].z
mov r0.z, icb[r0.x + 1].w
mov r0.x, icb[r0.x + 0].z
mul r0.w, cb0[r0.z + 259].x, vicp[r0.y + 8][0].y
mad r0.w, vicp[r0.y + 7][0].y, cb0[r0.z + 258].x, r0.w
mad r0.w, vicp[r0.y + 9][0].y, cb0[r0.z + 260].x, r0.w
mad r0.x, vicp[r0.x + 4][0].y, cb0[r0.z + 261].x, r0.w
mad r0.x, vicp[r0.y + 6][0].y, cb0[r0.z + 257].x, r0.x
iadd r0.y, vForkInstanceID.x, l(4)
udiv null, r0.y, r0.y, l(7)
iadd r1.xyzw, vForkInstanceID.xxxx, l(2, 1, 6, 3)
udiv null, r0.w, r1.z, l(7)
ult r1.z, vForkInstanceID.x, l(2)
movc r0.y, r1.z, r0.w, r0.y
and r2.xy, r1.ywyy, l(3, 3, 0, 0)
movc r0.w, r1.z, r1.x, r2.x
movc r1.x, r1.z, vForkInstanceID.x, r1.w
mad r0.x, vicp[r0.w + 0][0].y, cb0[r0.y + 256].x, r0.x
iadd r1.yw, vForkInstanceID.xxxx, l(0, -2, 0, -1)
movc r0.w, r1.z, r2.y, r1.y
movc r1.y, r1.z, vForkInstanceID.x, r1.w
mad r0.x, vicp[r0.w + 0][0].y, cb0[r0.y + 257].x, r0.x
mad r0.x, vicp[r1.y + 0][0].y, cb0[r0.z + 256].x, r0.x
mov o[r1.x + 15].y, -r0.x
ret
hs_fork_phase
dcl_hs_fork_phase_instance_count 4
dcl_input vForkInstanceID
dcl_input vicp[32][0].z
dcl_output o15.z
dcl_output o16.z
dcl_output o20.z
dcl_output o21.z
dcl_temps 3
dcl_indexrange o15.z 7
mov r0.x, vForkInstanceID.x
mov r0.yz, icb[r0.x + 0].yyxy
mov r0.x, icb[r0.x + 0].z
mul r0.w, cb0[r0.z + 259].x, vicp[r0.y + 8][0].z
mad r0.w, vicp[r0.y + 7][0].z, cb0[r0.z + 258].x, r0.w
mad r0.w, vicp[r0.y + 9][0].z, cb0[r0.z + 260].x, r0.w
mad r0.x, vicp[r0.x + 4][0].z, cb0[r0.z + 261].x, r0.w
mad r0.x, vicp[r0.y + 6][0].z, cb0[r0.z + 257].x, r0.x
iadd r0.y, vForkInstanceID.x, l(4)
udiv null, r0.y, r0.y, l(7)
iadd r1.xyzw, vForkInstanceID.xxxx, l(2, 1, 6, 3)
udiv null, r0.w, r1.z, l(7)
ult r1.z, vForkInstanceID.x, l(2)
movc r0.y, r1.z, r0.w, r0.y
and r2.xy, r1.ywyy, l(3, 3, 0, 0)
movc r0.w, r1.z, r1.x, r2.x
movc r1.x, r1.z, vForkInstanceID.x, r1.w
mad r0.x, vicp[r0.w + 0][0].z, cb0[r0.y + 256].x, r0.x
iadd r1.yw, vForkInstanceID.xxxx, l(0, -2, 0, -1)
movc r0.w, r1.z, r2.y, r1.y
movc r1.y, r1.z, vForkInstanceID.x, r1.w
mad r0.x, vicp[r0.w + 0][0].z, cb0[r0.y + 257].x, r0.x
mad r0.x, vicp[r1.y + 0][0].z, cb0[r0.z + 256].x, r0.x
mov o[r1.x + 15].z, -r0.x
ret
hs_fork_phase
dcl_output o22.x
mov o22.x, cb0[1025].x
ret
hs_fork_phase
dcl_output o22.y
mov o22.y, cb0[1025].x
ret
hs_fork_phase
dcl_output o22.z
mov o22.z, cb0[1025].x
ret
hs_fork_phase
dcl_output o22.w
mov o22.w, cb0[1025].x
ret
// Approximately 315 instruction slots used
|
oeis/142/A142982.asm | neoneye/loda-programs | 11 | 5807 | <reponame>neoneye/loda-programs<filename>oeis/142/A142982.asm<gh_stars>10-100
; A142982: a(1) = 1, a(2) = 9, a(n+2) = 9*a(n+1) + (n+1)^2*a(n).
; Submitted by <NAME>
; 1,9,85,846,8974,101916,1240308,16156656,224789616,3331795680,52465122720,875333381760,15432978107520,286828144485120,5606317009440000,114993185594112000,2470155824763648000,55464433059571200000,1299510384759562752000,31718253797341267968000,805268438079896512512000,21235165867346567786496000,580866416836789022134272000,16461200495357435558264832000,482729860556207396773724160000,14632819054604263794879037440000,458020757227434574372948869120000,14789511905853419475823358115840000
mov $3,1
lpb $0
mov $2,$3
mul $3,9
add $3,$1
mov $1,$0
mul $2,$0
sub $0,1
mul $1,$2
lpe
mov $0,$3
|
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0xca.log_21829_1580.asm | ljhsiun2/medusa | 9 | 97077 | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r15
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0xd78, %rsi
lea addresses_WT_ht+0x4fc0, %rdi
nop
sub %r15, %r15
mov $6, %rcx
rep movsw
nop
nop
nop
cmp $17990, %rsi
lea addresses_normal_ht+0x9dc0, %r12
nop
nop
cmp %r11, %r11
mov (%r12), %di
nop
nop
nop
cmp %rsi, %rsi
lea addresses_A_ht+0x155c0, %r12
nop
nop
nop
nop
inc %rbx
movw $0x6162, (%r12)
nop
nop
sub $30573, %r15
lea addresses_WC_ht+0x1c5c0, %r15
nop
nop
and $39255, %rsi
movb $0x61, (%r15)
nop
nop
nop
nop
add $9635, %r12
lea addresses_A_ht+0x145c0, %rsi
lea addresses_A_ht+0x39c0, %rdi
nop
xor %rbx, %rbx
mov $27, %rcx
rep movsw
dec %r12
lea addresses_normal_ht+0xea08, %rsi
lea addresses_WT_ht+0x6cc0, %rdi
nop
nop
nop
nop
nop
sub $700, %r13
mov $99, %rcx
rep movsq
xor $39164, %rsi
lea addresses_WC_ht+0x151c0, %rsi
lea addresses_A_ht+0x8dc0, %rdi
clflush (%rsi)
nop
nop
nop
nop
and %r13, %r13
mov $24, %rcx
rep movsq
nop
nop
nop
add $51048, %rdi
lea addresses_WT_ht+0x6d60, %rcx
nop
xor %rsi, %rsi
movups (%rcx), %xmm6
vpextrq $1, %xmm6, %rbx
nop
nop
nop
nop
add %r11, %r11
lea addresses_normal_ht+0x16570, %rsi
lea addresses_normal_ht+0xb536, %rdi
nop
nop
nop
nop
and %r11, %r11
mov $118, %rcx
rep movsl
nop
and $61459, %r13
lea addresses_UC_ht+0x17940, %r11
nop
add $22767, %r12
mov (%r11), %esi
nop
nop
nop
nop
and %r11, %r11
lea addresses_UC_ht+0x17f40, %r13
nop
and %rcx, %rcx
and $0xffffffffffffffc0, %r13
vmovntdqa (%r13), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rsi
nop
nop
nop
add %r11, %r11
lea addresses_normal_ht+0x460, %r11
clflush (%r11)
nop
nop
nop
nop
nop
inc %rcx
movw $0x6162, (%r11)
and %rcx, %rcx
lea addresses_WC_ht+0x149c0, %r11
nop
nop
nop
nop
and $32944, %rdi
movups (%r11), %xmm2
vpextrq $0, %xmm2, %r12
nop
nop
nop
nop
nop
xor $57033, %r13
lea addresses_WC_ht+0x9a58, %rsi
lea addresses_normal_ht+0x3cc0, %rdi
nop
nop
nop
nop
cmp $56159, %r12
mov $122, %rcx
rep movsw
nop
nop
inc %r12
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r15
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r8
push %rdi
push %rsi
// Store
lea addresses_WC+0x173c0, %r15
add $43757, %rsi
mov $0x5152535455565758, %r12
movq %r12, %xmm6
vmovups %ymm6, (%r15)
nop
add $20338, %r15
// Store
lea addresses_A+0x5940, %r11
nop
nop
nop
cmp %r12, %r12
mov $0x5152535455565758, %rsi
movq %rsi, %xmm0
vmovups %ymm0, (%r11)
nop
nop
nop
nop
nop
add %r12, %r12
// Faulty Load
lea addresses_WC+0x7dc0, %r12
nop
xor $52763, %rsi
movups (%r12), %xmm6
vpextrq $1, %xmm6, %rdi
lea oracles, %r15
and $0xff, %rdi
shlq $12, %rdi
mov (%r15,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %r8
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WC'}}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_A'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 16, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 9, 'same': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 11, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 10, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 10, 'same': True, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 6, 'same': True, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 32, 'NT': True, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_normal_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
programs/oeis/138/A138636.asm | neoneye/loda | 22 | 8987 | <reponame>neoneye/loda<filename>programs/oeis/138/A138636.asm
; A138636: a(n) = 6 * prime(n).
; 12,18,30,42,66,78,102,114,138,174,186,222,246,258,282,318,354,366,402,426,438,474,498,534,582,606,618,642,654,678,762,786,822,834,894,906,942,978,1002,1038,1074,1086,1146,1158,1182,1194,1266,1338,1362,1374,1398,1434,1446,1506,1542,1578,1614,1626,1662,1686,1698,1758,1842,1866,1878,1902,1986,2022,2082,2094,2118,2154,2202,2238,2274,2298,2334,2382,2406,2454,2514,2526,2586,2598,2634,2658,2694,2742,2766,2778,2802,2874,2922,2946,2994,3018,3054,3126,3138,3246
seq $0,6005 ; The odd prime numbers together with 1.
max $0,2
mul $0,6
|
test/ttf.adb | treggit/sdlada | 89 | 11356 | <filename>test/ttf.adb
with Ada.Command_Line;
with Ada.Text_IO;
with SDL;
with SDL.Events.Events;
with SDL.Events.Keyboards;
with SDL.Log;
with SDL.TTFs.Makers;
with SDL.Video.Palettes;
with SDL.Video.Surfaces;
with SDL.Video.Windows.Makers;
procedure TTF is
W : SDL.Video.Windows.Window;
Window_Surface : SDL.Video.Surfaces.Surface;
-- Renderer : SDL.Video.Renderers.Renderer;
Font : SDL.TTFs.Fonts;
Text_Surface : SDL.Video.Surfaces.Surface;
-- Text_Texture : SDL.Video.Textures.Texture;
begin
if Ada.Command_Line.Argument_Count = 0 then
Ada.Text_IO.Put_Line ("Error! Enter TTF font path on command line.");
else
SDL.Log.Set (Category => SDL.Log.Application, Priority => SDL.Log.Debug);
if SDL.Initialise (Flags => SDL.Enable_Screen) = True and then SDL.TTFs.Initialise = True then
SDL.Video.Windows.Makers.Create (Win => W,
Title => "TTF (Esc to exit)",
Position => SDL.Natural_Coordinates'(X => 100, Y => 100),
Size => SDL.Positive_Sizes'(800, 640),
Flags => SDL.Video.Windows.Resizable);
-- SDL.Video.Renderers.Makers.Create (Renderer, W);
Window_Surface := W.Get_Surface;
-- SDL.TTFs.Makers.Create (Font, "/home/laguest/.fonts/Belga.ttf", 24);
SDL.TTFs.Makers.Create (Font, Ada.Command_Line.Argument (1), 36);
Text_Surface := Font.Render_Solid (Text => "Hello from SDLAda",
Colour => SDL.Video.Palettes.Colour'(Red => 0,
Green => 200,
Blue => 200,
Alpha => 255));
-- Text_Surface.Set_Blend_Mode (SDL.Video.None);
-- Text_Surface := Font.Render_Shaded (Text => "Hello from SDLAda",
-- Colour => SDL.Video.Palettes.Colour'(Red => 255,
-- Green => 255,
-- Blue => 255,
-- Alpha => 255),
-- Background_Colour => SDL.Video.Palettes.Colour'(Red => 0,
-- Green => 20,
-- Blue => 250,
-- Alpha => 255));
-- Text_Surface := Font.Render_Blended (Text => "Hello from SDLAda",
-- Colour => SDL.Video.Palettes.Colour'(Red => 50, others => 255));
-- SDL.Video.Textures.Makers.Create (Text_Texture, Renderer, Text_Surface);
Window_Surface.Blit (Source => Text_Surface);
W.Update_Surface;
-- Main loop.
declare
Event : SDL.Events.Events.Events;
Finished : Boolean := False;
use type SDL.Events.Keyboards.Key_Codes;
begin
-- W.Update_Surface; -- Shows the above two calls.
loop
while SDL.Events.Events.Poll (Event) loop
case Event.Common.Event_Type is
when SDL.Events.Quit =>
Finished := True;
when SDL.Events.Keyboards.Key_Down =>
if Event.Keyboard.Key_Sym.Key_Code = SDL.Events.Keyboards.Code_Escape then
Finished := True;
end if;
when others =>
null;
end case;
end loop;
-- Renderer.Clear;
-- Renderer.Copy (Text_Texture);
-- Renderer.Present;
exit when Finished;
end loop;
end;
SDL.Log.Put_Debug ("");
-- Window_Surface.Finalize;
W.Finalize;
SDL.TTFs.Finalise;
SDL.Finalise;
else
Ada.Text_IO.Put_Line ("Error! could not initialise SDL or SDL.TTF!");
end if;
end if;
end TTF;
|
Transynther/x86/_processed/NC/_st_zr_sm_/i7-7700_9_0xca.log_21829_662.asm | ljhsiun2/medusa | 9 | 174661 | <filename>Transynther/x86/_processed/NC/_st_zr_sm_/i7-7700_9_0xca.log_21829_662.asm<gh_stars>1-10
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x16c26, %rsi
lea addresses_WC_ht+0x1e206, %rdi
cmp $36542, %rax
mov $94, %rcx
rep movsb
cmp %rbx, %rbx
lea addresses_normal_ht+0x7a06, %rsi
lea addresses_A_ht+0xc906, %rdi
nop
nop
nop
cmp %r12, %r12
mov $36, %rcx
rep movsl
nop
nop
nop
and %rsi, %rsi
lea addresses_UC_ht+0x1ea06, %rsi
lea addresses_normal_ht+0x1422e, %rdi
nop
nop
nop
nop
nop
cmp %r14, %r14
mov $14, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp %rbx, %rbx
lea addresses_D_ht+0xf146, %rsi
lea addresses_WC_ht+0x1a24c, %rdi
add %rbp, %rbp
mov $27, %rcx
rep movsw
nop
nop
nop
nop
nop
cmp $44247, %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %r15
push %r8
push %rcx
push %rdi
push %rdx
// Store
mov $0x7ced6b0000000a06, %r12
dec %r14
movb $0x51, (%r12)
nop
nop
nop
add %rdx, %rdx
// Load
lea addresses_WT+0xe046, %r15
nop
nop
cmp %r8, %r8
movb (%r15), %r12b
nop
nop
dec %rdx
// Load
mov $0x61df00000003c6, %r15
add $38570, %r14
movups (%r15), %xmm3
vpextrq $1, %xmm3, %rcx
nop
nop
and %rcx, %rcx
// Load
lea addresses_US+0xca06, %r14
nop
nop
nop
cmp %rdi, %rdi
mov (%r14), %r8w
nop
nop
nop
nop
and %r8, %r8
// Store
lea addresses_A+0x8a18, %r15
nop
nop
nop
add $58610, %r12
mov $0x5152535455565758, %rcx
movq %rcx, %xmm1
movaps %xmm1, (%r15)
nop
inc %rdx
// Store
mov $0x7ced6b0000000a06, %rcx
nop
nop
add $12528, %r8
movl $0x51525354, (%rcx)
nop
nop
nop
nop
cmp %r8, %r8
// Faulty Load
mov $0x7ced6b0000000a06, %r15
nop
nop
nop
add $15400, %rdi
vmovups (%r15), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $0, %xmm5, %r12
lea oracles, %r15
and $0xff, %r12
shlq $12, %r12
mov (%r15,%r12,1), %r12
pop %rdx
pop %rdi
pop %rcx
pop %r8
pop %r15
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_NC'}}
{'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_WT'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'src': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': True, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_A'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_NC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 11, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 10, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 1, 'same': False, 'type': 'addresses_WC_ht'}}
{'54': 17480, '00': 4349}
00 54 54 54 00 54 54 54 54 54 54 54 00 54 00 54 54 54 54 54 00 54 54 54 54 54 54 54 54 00 54 00 54 54 54 54 54 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 54 54 00 54 54 54 00 54 54 54 54 54 54 00 54 54 54 54 54 00 54 54 54 54 54 00 54 54 54 54 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 54 54 54 00 54 54 54 54 54 54 54 54 00 54 54 00 00 54 54 54 54 54 00 54 00 54 54 54 00 00 54 54 54 00 00 54 54 54 54 54 54 54 00 54 54 54 00 54 54 54 00 54 54 54 54 54 00 00 54 54 00 54 00 54 54 54 54 00 54 54 54 54 00 54 54 54 54 54 00 54 00 54 54 00 54 54 54 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 54 00 00 54 54 00 54 54 54 54 54 54 54 54 00 00 00 54 54 54 54 54 54 54 54 54 54 54 54 54 00 00 54 54 00 54 54 54 54 54 00 00 54 54 54 00 54 54 54 54 54 54 54 54 00 54 54 54 54 00 54 54 54 54 54 54 00 54 00 54 54 54 54 54 00 54 54 54 54 54 54 54 54 54 54 00 54 54 00 54 54 00 00 54 54 54 54 54 00 00 54 00 54 54 54 54 54 54 54 54 54 54 54 00 54 54 54 54 54 00 54 54 00 00 54 54 54 54 54 00 54 54 00 54 54 54 54 54 54 54 54 00 54 00 54 54 54 54 54 54 54 54 00 54 00 54 54 54 54 00 54 54 54 54 54 00 54 54 00 00 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 00 54 00 54 54 00 00 54 54 54 54 54 54 54 54 00 54 54 00 00 54 54 54 54 00 54 54 54 54 54 54 00 54 54 54 54 00 54 54 54 54 00 54 54 54 54 54 54 54 00 54 54 00 54 54 54 00 54 54 54 54 00 54 54 54 54 54 54 54 54 00 00 54 54 54 54 00 54 54 00 54 54 00 54 54 54 54 54 54 54 54 54 54 54 00 00 54 54 00 00 54 00 54 54 54 54 54 54 54 54 54 54 54 00 54 54 54 00 54 54 54 54 00 54 54 00 54 54 54 54 00 54 54 00 54 00 54 00 54 54 54 54 54 00 54 54 54 54 54 54 00 00 54 54 54 54 54 54 54 54 54 00 54 00 54 54 00 54 54 54 54 54 54 54 54 00 54 54 00 00 00 54 00 54 54 54 54 54 00 54 54 54 00 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 00 00 54 54 00 00 54 54 54 00 54 54 00 54 54 54 54 54 54 54 54 00 54 54 54 54 54 54 54 54 54 00 54 00 54 00 00 54 54 54 54 54 54 54 00 54 54 00 54 54 54 54 54 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 00 54 54 54 54 54 54 54 54 54 54 00 54 54 54 54 00 54 00 54 54 54 54 54 54 54 54 54 00 54 00 54 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 00 54 54 54 00 00 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 00 00 54 54 54 54 54 54 54 54 00 54 54 54 00 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 00 00 00 54 54 54 00 54 54 54 54 54 00 00 54 54 54 54 00 54 54 00 54 54 54 54 54 54 54 00 54 54 54 54 00 54 54 54 54 54 54 00 00 54 00 54 54 54 00 54 54 54 54 54 54 54 00 00 54 54 54 54 54 54 54 54 54 00 54 54 54 54 54 00 54 54 54 00 54 54 54 00 54 54 00 54 00 00 54 54 00 54 54 54 00 54 00 54 54 54 54 54 54 54 54 54 54 54 54 00 54 54 00 54 00 54 54 54 54 54 54 54 54 54 54 54 00 54 54 54 54 54 54 54 54 00 54 54 00 54 54 54 54 54 00 54 00 54 54 54 54 54 54 54 54 00 54 54 54 00 54 00 54 54 00 54 54 54 54 54 54 54 54 00 00
*/
|
programs/oeis/127/A127421.asm | karttu/loda | 0 | 83099 | ; A127421: Numbers whose decimal expansion is a concatenation of 2 consecutive increasing nonnegative numbers.
; 1,12,23,34,45,56,67,78,89,910,1011,1112,1213,1314,1415,1516,1617,1718,1819,1920,2021,2122,2223,2324,2425,2526,2627,2728,2829,2930,3031,3132,3233,3334,3435,3536,3637,3738,3839,3940,4041,4142,4243,4344,4445,4546,4647,4748,4849,4950,5051,5152,5253,5354,5455,5556,5657,5758,5859,5960,6061,6162,6263,6364,6465,6566,6667,6768,6869,6970,7071,7172,7273,7374,7475,7576,7677,7778,7879,7980,8081,8182,8283,8384,8485,8586,8687,8788,8889,8990,9091,9192,9293,9394,9495,9596,9697,9798,9899,99100,100101,101102,102103,103104,104105,105106,106107,107108,108109,109110,110111,111112,112113,113114,114115,115116,116117,117118,118119,119120,120121,121122,122123,123124,124125,125126,126127,127128,128129,129130,130131,131132,132133,133134,134135,135136,136137,137138,138139,139140,140141,141142,142143,143144,144145,145146,146147,147148,148149,149150,150151,151152,152153,153154,154155,155156,156157,157158,158159,159160,160161,161162,162163,163164,164165,165166,166167,167168,168169,169170,170171,171172,172173,173174,174175,175176,176177,177178,178179,179180,180181,181182,182183,183184,184185,185186,186187,187188,188189,189190,190191,191192,192193,193194,194195,195196,196197,197198,198199,199200,200201,201202,202203,203204,204205,205206,206207,207208,208209,209210,210211,211212,212213,213214,214215,215216,216217,217218,218219,219220,220221,221222,222223,223224,224225,225226,226227,227228,228229,229230,230231,231232,232233,233234,234235,235236,236237,237238,238239,239240,240241,241242,242243,243244,244245,245246,246247,247248,248249,249250
mov $1,$0
mov $2,$0
add $0,1
lpb $0,1
div $0,10
mul $1,10
lpe
add $1,1
add $1,$2
|
oeis/058/A058313.asm | neoneye/loda-programs | 11 | 102419 | ; A058313: Numerator of the n-th alternating harmonic number, Sum_{k=1..n} (-1)^(k+1)/k.
; Submitted by <NAME>
; 1,1,5,7,47,37,319,533,1879,1627,20417,18107,263111,237371,52279,95549,1768477,1632341,33464927,155685007,166770367,156188887,3825136961,3602044091,19081066231,18051406831,57128792093,7751493599,236266661971,225175759291,7313175618421,13981692518567,14606816124167,14000078506967,102126365345729,98115155543129,3774664307989373,3634060848592973,3771059091081773,3637485804655193,154479849447926113,149264130644602513,6637417807457499259,6423336258393807859,6632660439700528339,6427886784074388739
mov $1,1
lpb $0
mov $2,$0
sub $0,1
add $2,1
mul $3,$2
mul $3,-1
add $3,$1
mul $1,$2
lpe
sub $1,$3
gcd $3,$1
div $1,$3
mov $0,$1
|
libsrc/gfx/portable/drawr.asm | Frodevan/z88dk | 640 | 163897 |
SECTION code_graphics
PUBLIC drawr
PUBLIC _drawr
EXTERN commondrawr
EXTERN plot
;void drawr(int x2, int y2) __smallc
;Note ints are actually uint8_t
drawr:
_drawr:
ld hl,plot
jp commondrawr
|
tmp1/c55x-sim2/foo/Debug/csl_i2s_PollExample.asm | jwestmoreland/eZdsp-DBG-sim | 1 | 81404 | ;*******************************************************************************
;* TMS320C55x C/C++ Codegen PC v4.4.1 *
;* Date/Time created: Sat Sep 29 23:09:31 2018 *
;*******************************************************************************
.compiler_opts --hll_source=on --mem_model:code=flat --mem_model:data=large --object_format=coff --silicon_core_3_3 --symdebug:dwarf
.mmregs
.cpl_on
.arms_on
.c54cm_off
.asg AR6, FP
.asg XAR6, XFP
.asg DPH, MDP
.model call=c55_std
.model mem=large
.noremark 5002 ; code respects overwrite rules
;*******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C55x *
;* Optimizing for : Speed *
;* Memory : Large Model (23-Bit Data Pointers) *
;* Calls : Normal Library ASM calls *
;* Debug Info : Standard TI Debug Information *
;*******************************************************************************
$C$DW$CU .dwtag DW_TAG_compile_unit
.dwattr $C$DW$CU, DW_AT_name("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$CU, DW_AT_producer("TMS320C55x C/C++ Codegen PC v4.4.1 Copyright (c) 1996-2012 Texas Instruments Incorporated")
.dwattr $C$DW$CU, DW_AT_TI_version(0x01)
.dwattr $C$DW$CU, DW_AT_comp_dir("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug")
;******************************************************************************
;* CINIT RECORDS *
;******************************************************************************
.sect ".cinit"
.align 1
.field 1,16
.field _PaSs_StAtE+0,24
.field 0,8
.field 1,16 ; _PaSs_StAtE @ 0
.sect ".cinit"
.align 1
.field 1,16
.field _PaSs+0,24
.field 0,8
.field 0,16 ; _PaSs @ 0
$C$DW$1 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_open")
.dwattr $C$DW$1, DW_AT_TI_symbol_name("_I2S_open")
.dwattr $C$DW$1, DW_AT_type(*$C$DW$T$67)
.dwattr $C$DW$1, DW_AT_declaration
.dwattr $C$DW$1, DW_AT_external
$C$DW$2 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$2, DW_AT_type(*$C$DW$T$26)
$C$DW$3 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$3, DW_AT_type(*$C$DW$T$28)
$C$DW$4 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$4, DW_AT_type(*$C$DW$T$30)
.dwendtag $C$DW$1
$C$DW$5 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_setup")
.dwattr $C$DW$5, DW_AT_TI_symbol_name("_I2S_setup")
.dwattr $C$DW$5, DW_AT_type(*$C$DW$T$74)
.dwattr $C$DW$5, DW_AT_declaration
.dwattr $C$DW$5, DW_AT_external
$C$DW$6 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$6, DW_AT_type(*$C$DW$T$67)
$C$DW$7 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$7, DW_AT_type(*$C$DW$T$71)
.dwendtag $C$DW$5
$C$DW$8 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_close")
.dwattr $C$DW$8, DW_AT_TI_symbol_name("_I2S_close")
.dwattr $C$DW$8, DW_AT_type(*$C$DW$T$74)
.dwattr $C$DW$8, DW_AT_declaration
.dwattr $C$DW$8, DW_AT_external
$C$DW$9 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$9, DW_AT_type(*$C$DW$T$67)
.dwendtag $C$DW$8
$C$DW$10 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_read")
.dwattr $C$DW$10, DW_AT_TI_symbol_name("_I2S_read")
.dwattr $C$DW$10, DW_AT_type(*$C$DW$T$74)
.dwattr $C$DW$10, DW_AT_declaration
.dwattr $C$DW$10, DW_AT_external
$C$DW$11 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$11, DW_AT_type(*$C$DW$T$67)
$C$DW$12 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$12, DW_AT_type(*$C$DW$T$79)
$C$DW$13 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$13, DW_AT_type(*$C$DW$T$19)
.dwendtag $C$DW$10
$C$DW$14 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_write")
.dwattr $C$DW$14, DW_AT_TI_symbol_name("_I2S_write")
.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$74)
.dwattr $C$DW$14, DW_AT_declaration
.dwattr $C$DW$14, DW_AT_external
$C$DW$15 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$67)
$C$DW$16 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$16, DW_AT_type(*$C$DW$T$79)
$C$DW$17 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$17, DW_AT_type(*$C$DW$T$19)
.dwendtag $C$DW$14
$C$DW$18 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_reset")
.dwattr $C$DW$18, DW_AT_TI_symbol_name("_I2S_reset")
.dwattr $C$DW$18, DW_AT_type(*$C$DW$T$74)
.dwattr $C$DW$18, DW_AT_declaration
.dwattr $C$DW$18, DW_AT_external
$C$DW$19 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$19, DW_AT_type(*$C$DW$T$67)
.dwendtag $C$DW$18
$C$DW$20 .dwtag DW_TAG_subprogram, DW_AT_name("I2S_transEnable")
.dwattr $C$DW$20, DW_AT_TI_symbol_name("_I2S_transEnable")
.dwattr $C$DW$20, DW_AT_type(*$C$DW$T$74)
.dwattr $C$DW$20, DW_AT_declaration
.dwattr $C$DW$20, DW_AT_external
$C$DW$21 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$21, DW_AT_type(*$C$DW$T$67)
$C$DW$22 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$22, DW_AT_type(*$C$DW$T$19)
.dwendtag $C$DW$20
$C$DW$23 .dwtag DW_TAG_subprogram, DW_AT_name("printf")
.dwattr $C$DW$23, DW_AT_TI_symbol_name("_printf")
.dwattr $C$DW$23, DW_AT_type(*$C$DW$T$10)
.dwattr $C$DW$23, DW_AT_declaration
.dwattr $C$DW$23, DW_AT_external
$C$DW$24 .dwtag DW_TAG_formal_parameter
.dwattr $C$DW$24, DW_AT_type(*$C$DW$T$90)
$C$DW$25 .dwtag DW_TAG_unspecified_parameters
.dwendtag $C$DW$23
.global _i2sWriteBuff
.bss _i2sWriteBuff,4,0,0
$C$DW$26 .dwtag DW_TAG_variable, DW_AT_name("i2sWriteBuff")
.dwattr $C$DW$26, DW_AT_TI_symbol_name("_i2sWriteBuff")
.dwattr $C$DW$26, DW_AT_location[DW_OP_addr _i2sWriteBuff]
.dwattr $C$DW$26, DW_AT_type(*$C$DW$T$87)
.dwattr $C$DW$26, DW_AT_external
.global _i2sReadBuff
.bss _i2sReadBuff,4,0,0
$C$DW$27 .dwtag DW_TAG_variable, DW_AT_name("i2sReadBuff")
.dwattr $C$DW$27, DW_AT_TI_symbol_name("_i2sReadBuff")
.dwattr $C$DW$27, DW_AT_location[DW_OP_addr _i2sReadBuff]
.dwattr $C$DW$27, DW_AT_type(*$C$DW$T$87)
.dwattr $C$DW$27, DW_AT_external
.global _PaSs_StAtE
.bss _PaSs_StAtE,1,0,0
$C$DW$28 .dwtag DW_TAG_variable, DW_AT_name("PaSs_StAtE")
.dwattr $C$DW$28, DW_AT_TI_symbol_name("_PaSs_StAtE")
.dwattr $C$DW$28, DW_AT_location[DW_OP_addr _PaSs_StAtE]
.dwattr $C$DW$28, DW_AT_type(*$C$DW$T$84)
.dwattr $C$DW$28, DW_AT_external
.global _PaSs
.bss _PaSs,1,0,0
$C$DW$29 .dwtag DW_TAG_variable, DW_AT_name("PaSs")
.dwattr $C$DW$29, DW_AT_TI_symbol_name("_PaSs")
.dwattr $C$DW$29, DW_AT_location[DW_OP_addr _PaSs]
.dwattr $C$DW$29, DW_AT_type(*$C$DW$T$84)
.dwattr $C$DW$29, DW_AT_external
; F:\t\cc5p5\ccsv5\tools\compiler\c5500_4.4.1\bin\acp55.exe -@f:\\AppData\\Local\\Temp\\2322412
.sect ".text"
.align 4
.global _i2s_sample
$C$DW$30 .dwtag DW_TAG_subprogram, DW_AT_name("i2s_sample")
.dwattr $C$DW$30, DW_AT_low_pc(_i2s_sample)
.dwattr $C$DW$30, DW_AT_high_pc(0x00)
.dwattr $C$DW$30, DW_AT_TI_symbol_name("_i2s_sample")
.dwattr $C$DW$30, DW_AT_external
.dwattr $C$DW$30, DW_AT_type(*$C$DW$T$73)
.dwattr $C$DW$30, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$30, DW_AT_TI_begin_line(0x51)
.dwattr $C$DW$30, DW_AT_TI_begin_column(0x07)
.dwattr $C$DW$30, DW_AT_TI_max_frame_size(0x16)
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 82,column 1,is_stmt,address _i2s_sample
.dwfde $C$DW$CIE, _i2s_sample
;*******************************************************************************
;* FUNCTION NAME: i2s_sample *
;* *
;* Function Uses Regs : AC0,AC0,AC1,AC1,T0,T1,AR0,XAR0,AR1,XAR1,AR2,AR3,XAR3,*
;* SP,CARRY,TC1,M40,SATA,SATD,RDM,FRCT,SMUL *
;* Stack Frame : Compact (No Frame Pointer, w/ debug) *
;* Total Frame Size : 22 words *
;* (1 return address/alignment) *
;* (2 function parameters) *
;* (19 local values) *
;* Min System Stack : 1 word *
;*******************************************************************************
_i2s_sample:
.dwcfi cfa_offset, 1
.dwcfi save_reg_to_mem, 91, -1
AADD #-21, SP
.dwcfi cfa_offset, 22
$C$DW$31 .dwtag DW_TAG_variable, DW_AT_name("status")
.dwattr $C$DW$31, DW_AT_TI_symbol_name("_status")
.dwattr $C$DW$31, DW_AT_type(*$C$DW$T$73)
.dwattr $C$DW$31, DW_AT_location[DW_OP_bregx 0x24 2]
$C$DW$32 .dwtag DW_TAG_variable, DW_AT_name("result")
.dwattr $C$DW$32, DW_AT_TI_symbol_name("_result")
.dwattr $C$DW$32, DW_AT_type(*$C$DW$T$73)
.dwattr $C$DW$32, DW_AT_location[DW_OP_bregx 0x24 3]
$C$DW$33 .dwtag DW_TAG_variable, DW_AT_name("hI2s")
.dwattr $C$DW$33, DW_AT_TI_symbol_name("_hI2s")
.dwattr $C$DW$33, DW_AT_type(*$C$DW$T$67)
.dwattr $C$DW$33, DW_AT_location[DW_OP_bregx 0x24 4]
$C$DW$34 .dwtag DW_TAG_variable, DW_AT_name("hwConfig")
.dwattr $C$DW$34, DW_AT_TI_symbol_name("_hwConfig")
.dwattr $C$DW$34, DW_AT_type(*$C$DW$T$70)
.dwattr $C$DW$34, DW_AT_location[DW_OP_bregx 0x24 6]
$C$DW$35 .dwtag DW_TAG_variable, DW_AT_name("looper")
.dwattr $C$DW$35, DW_AT_TI_symbol_name("_looper")
.dwattr $C$DW$35, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$35, DW_AT_location[DW_OP_bregx 0x24 20]
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 83,column 11,is_stmt
MOV #1, *SP(#2) ; |83|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 90,column 2,is_stmt
MOV #0, T0
|| MOV #0, T1
$C$DW$36 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$36, DW_AT_low_pc(0x00)
.dwattr $C$DW$36, DW_AT_name("_I2S_open")
.dwattr $C$DW$36, DW_AT_TI_call
CALL #_I2S_open ; |90|
|| MOV #1, AR0
; call occurs [#_I2S_open] ; |90|
MOV XAR0, dbl(*SP(#4))
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 93,column 2,is_stmt
MOV dbl(*SP(#4)), XAR3
MOV XAR3, AC0
|| MOV #0, AC1 ; |93|
CMPU AC1 != AC0, TC1 ; |93|
BCC $C$L1,TC1 ; |93|
; branchcc occurs ; |93|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 95,column 3,is_stmt
MOV #1, *SP(#2) ; |95|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 96,column 3,is_stmt
MOV *SP(#2), T0 ; |96|
B $C$L15 ; |96|
; branch occurs ; |96|
$C$L1:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 100,column 3,is_stmt
AMOV #$C$FSL1, XAR3 ; |100|
MOV XAR3, dbl(*SP(#0))
$C$DW$37 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$37, DW_AT_low_pc(0x00)
.dwattr $C$DW$37, DW_AT_name("_printf")
.dwattr $C$DW$37, DW_AT_TI_call
CALL #_printf ; |100|
; call occurs [#_printf] ; |100|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 104,column 2,is_stmt
MOV #0, *SP(#6) ; |104|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 105,column 2,is_stmt
MOV #1, *SP(#7) ; |105|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 106,column 2,is_stmt
MOV #0, *SP(#8) ; |106|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 107,column 2,is_stmt
MOV #1, *SP(#9) ; |107|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 108,column 2,is_stmt
MOV #0, *SP(#10) ; |108|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 109,column 2,is_stmt
MOV #1, *SP(#11) ; |109|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 110,column 2,is_stmt
MOV #0, *SP(#12) ; |110|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 111,column 2,is_stmt
MOV #4, *SP(#13) ; |111|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 112,column 2,is_stmt
MOV #1, *SP(#14) ; |112|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 113,column 2,is_stmt
MOV #1, *SP(#17) ; |113|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 114,column 2,is_stmt
MOV #2, *SP(#16) ; |114|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 115,column 2,is_stmt
MOV #1, *SP(#18) ; |115|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 116,column 2,is_stmt
MOV #1, *SP(#19) ; |116|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 119,column 2,is_stmt
AMAR *SP(#6), XAR1
MOV dbl(*SP(#4)), XAR0
$C$DW$38 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$38, DW_AT_low_pc(0x00)
.dwattr $C$DW$38, DW_AT_name("_I2S_setup")
.dwattr $C$DW$38, DW_AT_TI_call
CALL #_I2S_setup ; |119|
; call occurs [#_I2S_setup] ; |119|
MOV T0, *SP(#3) ; |119|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 121,column 2,is_stmt
MOV T0, AR1
BCC $C$L2,AR1 == #0 ; |121|
; branchcc occurs ; |121|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 123,column 3,is_stmt
MOV #1, *SP(#2) ; |123|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 124,column 3,is_stmt
MOV *SP(#2), T0 ; |124|
B $C$L15 ; |124|
; branch occurs ; |124|
$C$L2:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 128,column 3,is_stmt
AMOV #$C$FSL2, XAR3 ; |128|
MOV XAR3, dbl(*SP(#0))
$C$DW$39 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$39, DW_AT_low_pc(0x00)
.dwattr $C$DW$39, DW_AT_name("_printf")
.dwattr $C$DW$39, DW_AT_TI_call
CALL #_printf ; |128|
; call occurs [#_printf] ; |128|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 132,column 6,is_stmt
MOV #0, *SP(#20) ; |132|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 132,column 16,is_stmt
MOV *SP(#20), AR1 ; |132|
|| MOV #4, AR2
CMPU AR1 >= AR2, TC1 ; |132|
BCC $C$L4,TC1 ; |132|
; branchcc occurs ; |132|
$C$L3:
$C$DW$L$_i2s_sample$8$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 134,column 3,is_stmt
MOV *SP(#20), T0 ; |134|
ADD #1, AR1 ; |134|
AMOV #_i2sWriteBuff, XAR3 ; |134|
MOV AR1, *AR3(T0) ; |134|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 135,column 3,is_stmt
MOV *SP(#20), T0 ; |135|
AMOV #_i2sReadBuff, XAR3 ; |135|
MOV #65535, *AR3(T0) ; |135|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 132,column 42,is_stmt
ADD #1, *SP(#20) ; |132|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 132,column 16,is_stmt
MOV *SP(#20), AR1 ; |132|
CMPU AR1 < AR2, TC1 ; |132|
BCC $C$L3,TC1 ; |132|
; branchcc occurs ; |132|
$C$DW$L$_i2s_sample$8$E:
$C$L4:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 138,column 2,is_stmt
MOV dbl(*SP(#4)), XAR0
$C$DW$40 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$40, DW_AT_low_pc(0x00)
.dwattr $C$DW$40, DW_AT_name("_I2S_transEnable")
.dwattr $C$DW$40, DW_AT_TI_call
CALL #_I2S_transEnable ; |138|
|| MOV #1, T0
; call occurs [#_I2S_transEnable] ; |138|
MOV T0, *SP(#3) ; |138|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 140,column 6,is_stmt
MOV #0, *SP(#20) ; |140|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 140,column 16,is_stmt
MOV #100, AR2 ; |140|
MOV *SP(#20), AR1 ; |140|
CMPU AR1 >= AR2, TC1 ; |140|
BCC $C$L6,TC1 ; |140|
; branchcc occurs ; |140|
$C$L5:
$C$DW$L$_i2s_sample$10$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 140,column 30,is_stmt
ADD #1, *SP(#20) ; |140|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 140,column 16,is_stmt
MOV *SP(#20), AR1 ; |140|
CMPU AR1 < AR2, TC1 ; |140|
BCC $C$L5,TC1 ; |140|
; branchcc occurs ; |140|
$C$DW$L$_i2s_sample$10$E:
$C$L6:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 143,column 2,is_stmt
MOV dbl(*SP(#4)), XAR0
AMOV #_i2sWriteBuff, XAR1 ; |143|
$C$DW$41 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$41, DW_AT_low_pc(0x00)
.dwattr $C$DW$41, DW_AT_name("_I2S_write")
.dwattr $C$DW$41, DW_AT_TI_call
CALL #_I2S_write ; |143|
|| MOV #4, T0
; call occurs [#_I2S_write] ; |143|
MOV T0, *SP(#3) ; |143|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 144,column 2,is_stmt
MOV T0, AR1
BCC $C$L7,AR1 == #0 ; |144|
; branchcc occurs ; |144|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 146,column 3,is_stmt
AMOV #$C$FSL3, XAR3 ; |146|
MOV XAR3, dbl(*SP(#0))
$C$DW$42 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$42, DW_AT_low_pc(0x00)
.dwattr $C$DW$42, DW_AT_name("_printf")
.dwattr $C$DW$42, DW_AT_TI_call
CALL #_printf ; |146|
; call occurs [#_printf] ; |146|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 147,column 3,is_stmt
MOV #1, *SP(#2) ; |147|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 148,column 3,is_stmt
MOV *SP(#2), T0 ; |148|
B $C$L15 ; |148|
; branch occurs ; |148|
$C$L7:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 152,column 2,is_stmt
MOV dbl(*SP(#4)), XAR0
AMOV #_i2sReadBuff, XAR1 ; |152|
$C$DW$43 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$43, DW_AT_low_pc(0x00)
.dwattr $C$DW$43, DW_AT_name("_I2S_read")
.dwattr $C$DW$43, DW_AT_TI_call
CALL #_I2S_read ; |152|
|| MOV #4, T0
; call occurs [#_I2S_read] ; |152|
MOV T0, *SP(#3) ; |152|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 153,column 2,is_stmt
MOV T0, AR1
BCC $C$L8,AR1 == #0 ; |153|
; branchcc occurs ; |153|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 155,column 3,is_stmt
AMOV #$C$FSL4, XAR3 ; |155|
MOV XAR3, dbl(*SP(#0))
$C$DW$44 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$44, DW_AT_low_pc(0x00)
.dwattr $C$DW$44, DW_AT_name("_printf")
.dwattr $C$DW$44, DW_AT_TI_call
CALL #_printf ; |155|
; call occurs [#_printf] ; |155|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 156,column 3,is_stmt
MOV #1, *SP(#2) ; |156|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 157,column 3,is_stmt
MOV *SP(#2), T0 ; |157|
B $C$L15 ; |157|
; branch occurs ; |157|
$C$L8:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 160,column 2,is_stmt
MOV dbl(*SP(#4)), XAR0
$C$DW$45 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$45, DW_AT_low_pc(0x00)
.dwattr $C$DW$45, DW_AT_name("_I2S_transEnable")
.dwattr $C$DW$45, DW_AT_TI_call
CALL #_I2S_transEnable ; |160|
|| MOV #0, T0
; call occurs [#_I2S_transEnable] ; |160|
MOV T0, *SP(#3) ; |160|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 163,column 2,is_stmt
MOV dbl(*SP(#4)), XAR0
$C$DW$46 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$46, DW_AT_low_pc(0x00)
.dwattr $C$DW$46, DW_AT_name("_I2S_reset")
.dwattr $C$DW$46, DW_AT_TI_call
CALL #_I2S_reset ; |163|
; call occurs [#_I2S_reset] ; |163|
MOV T0, *SP(#3) ; |163|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 165,column 2,is_stmt
MOV T0, AR1
BCC $C$L9,AR1 == #0 ; |165|
; branchcc occurs ; |165|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 167,column 3,is_stmt
MOV #1, *SP(#2) ; |167|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 168,column 3,is_stmt
MOV *SP(#2), T0 ; |168|
B $C$L15 ; |168|
; branch occurs ; |168|
$C$L9:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 172,column 3,is_stmt
AMOV #$C$FSL5, XAR3 ; |172|
MOV XAR3, dbl(*SP(#0))
$C$DW$47 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$47, DW_AT_low_pc(0x00)
.dwattr $C$DW$47, DW_AT_name("_printf")
.dwattr $C$DW$47, DW_AT_TI_call
CALL #_printf ; |172|
; call occurs [#_printf] ; |172|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 176,column 2,is_stmt
MOV dbl(*SP(#4)), XAR0
$C$DW$48 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$48, DW_AT_low_pc(0x00)
.dwattr $C$DW$48, DW_AT_name("_I2S_close")
.dwattr $C$DW$48, DW_AT_TI_call
CALL #_I2S_close ; |176|
; call occurs [#_I2S_close] ; |176|
MOV T0, *SP(#3) ; |176|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 177,column 2,is_stmt
MOV T0, AR1
BCC $C$L10,AR1 == #0 ; |177|
; branchcc occurs ; |177|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 179,column 3,is_stmt
MOV #1, *SP(#2) ; |179|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 180,column 3,is_stmt
MOV *SP(#2), T0 ; |180|
B $C$L15 ; |180|
; branch occurs ; |180|
$C$L10:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 184,column 3,is_stmt
AMOV #$C$FSL6, XAR3 ; |184|
MOV XAR3, dbl(*SP(#0))
$C$DW$49 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$49, DW_AT_low_pc(0x00)
.dwattr $C$DW$49, DW_AT_name("_printf")
.dwattr $C$DW$49, DW_AT_TI_call
CALL #_printf ; |184|
; call occurs [#_printf] ; |184|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 188,column 6,is_stmt
MOV #0, *SP(#20) ; |188|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 188,column 16,is_stmt
MOV *SP(#20), AR1 ; |188|
|| MOV #4, AR2
CMPU AR1 >= AR2, TC1 ; |188|
BCC $C$L13,TC1 ; |188|
; branchcc occurs ; |188|
$C$L11:
$C$DW$L$_i2s_sample$22$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 190,column 3,is_stmt
MOV *SP(#20), T0 ; |190|
AMOV #_i2sReadBuff, XAR3 ; |190|
MOV *AR3(T0), AR1 ; |190|
AMOV #_i2sWriteBuff, XAR3 ; |190|
MOV *AR3(T0), AR2 ; |190|
CMPU AR2 == AR1, TC1 ; |190|
BCC $C$L12,TC1 ; |190|
; branchcc occurs ; |190|
$C$DW$L$_i2s_sample$22$E:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 192,column 4,is_stmt
AMOV #$C$FSL7, XAR3 ; |192|
MOV XAR3, dbl(*SP(#0))
$C$DW$50 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$50, DW_AT_low_pc(0x00)
.dwattr $C$DW$50, DW_AT_name("_printf")
.dwattr $C$DW$50, DW_AT_TI_call
CALL #_printf ; |192|
; call occurs [#_printf] ; |192|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 193,column 4,is_stmt
MOV #1, *SP(#2) ; |193|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 194,column 4,is_stmt
MOV *SP(#2), T0 ; |194|
B $C$L15 ; |194|
; branch occurs ; |194|
$C$L12:
$C$DW$L$_i2s_sample$24$B:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 188,column 42,is_stmt
ADD #1, *SP(#20) ; |188|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 188,column 16,is_stmt
MOV *SP(#20), AR1 ; |188|
|| MOV #4, AR2
CMPU AR1 < AR2, TC1 ; |188|
BCC $C$L11,TC1 ; |188|
; branchcc occurs ; |188|
$C$DW$L$_i2s_sample$24$E:
$C$L13:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 198,column 2,is_stmt
CMP *SP(#20) == #4, TC1 ; |198|
BCC $C$L14,!TC1 ; |198|
; branchcc occurs ; |198|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 200,column 3,is_stmt
AMOV #$C$FSL8, XAR3 ; |200|
MOV XAR3, dbl(*SP(#0))
$C$DW$51 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$51, DW_AT_low_pc(0x00)
.dwattr $C$DW$51, DW_AT_name("_printf")
.dwattr $C$DW$51, DW_AT_TI_call
CALL #_printf ; |200|
; call occurs [#_printf] ; |200|
$C$L14:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 203,column 2,is_stmt
MOV #0, *SP(#2) ; |203|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 204,column 2,is_stmt
MOV *SP(#2), T0 ; |204|
$C$L15:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 205,column 1,is_stmt
AADD #21, SP
.dwcfi cfa_offset, 1
$C$DW$52 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$52, DW_AT_low_pc(0x00)
.dwattr $C$DW$52, DW_AT_TI_return
RET
; return occurs
$C$DW$53 .dwtag DW_TAG_TI_loop
.dwattr $C$DW$53, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2s_PollExample.asm:$C$L11:1:1538287772")
.dwattr $C$DW$53, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$53, DW_AT_TI_begin_line(0xbc)
.dwattr $C$DW$53, DW_AT_TI_end_line(0xc4)
$C$DW$54 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$54, DW_AT_low_pc($C$DW$L$_i2s_sample$22$B)
.dwattr $C$DW$54, DW_AT_high_pc($C$DW$L$_i2s_sample$22$E)
$C$DW$55 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$55, DW_AT_low_pc($C$DW$L$_i2s_sample$24$B)
.dwattr $C$DW$55, DW_AT_high_pc($C$DW$L$_i2s_sample$24$E)
.dwendtag $C$DW$53
$C$DW$56 .dwtag DW_TAG_TI_loop
.dwattr $C$DW$56, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2s_PollExample.asm:$C$L5:1:1538287772")
.dwattr $C$DW$56, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$56, DW_AT_TI_begin_line(0x8c)
.dwattr $C$DW$56, DW_AT_TI_end_line(0x8c)
$C$DW$57 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$57, DW_AT_low_pc($C$DW$L$_i2s_sample$10$B)
.dwattr $C$DW$57, DW_AT_high_pc($C$DW$L$_i2s_sample$10$E)
.dwendtag $C$DW$56
$C$DW$58 .dwtag DW_TAG_TI_loop
.dwattr $C$DW$58, DW_AT_name("F:\eZdsp_DBG\tmp1\c55x-sim2\foo\Debug\csl_i2s_PollExample.asm:$C$L3:1:1538287772")
.dwattr $C$DW$58, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$58, DW_AT_TI_begin_line(0x84)
.dwattr $C$DW$58, DW_AT_TI_end_line(0x88)
$C$DW$59 .dwtag DW_TAG_TI_loop_range
.dwattr $C$DW$59, DW_AT_low_pc($C$DW$L$_i2s_sample$8$B)
.dwattr $C$DW$59, DW_AT_high_pc($C$DW$L$_i2s_sample$8$E)
.dwendtag $C$DW$58
.dwattr $C$DW$30, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$30, DW_AT_TI_end_line(0xcd)
.dwattr $C$DW$30, DW_AT_TI_end_column(0x01)
.dwendentry
.dwendtag $C$DW$30
.sect ".text"
.align 4
.global _main
$C$DW$60 .dwtag DW_TAG_subprogram, DW_AT_name("main")
.dwattr $C$DW$60, DW_AT_low_pc(_main)
.dwattr $C$DW$60, DW_AT_high_pc(0x00)
.dwattr $C$DW$60, DW_AT_TI_symbol_name("_main")
.dwattr $C$DW$60, DW_AT_external
.dwattr $C$DW$60, DW_AT_TI_begin_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$60, DW_AT_TI_begin_line(0xda)
.dwattr $C$DW$60, DW_AT_TI_begin_column(0x06)
.dwattr $C$DW$60, DW_AT_TI_max_frame_size(0x04)
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 219,column 1,is_stmt,address _main
.dwfde $C$DW$CIE, _main
;*******************************************************************************
;* FUNCTION NAME: main *
;* *
;* Function Uses Regs : T0,AR1,AR3,XAR3,SP,M40,SATA,SATD,RDM,FRCT,SMUL *
;* Stack Frame : Compact (No Frame Pointer, w/ debug) *
;* Total Frame Size : 4 words *
;* (1 return address/alignment) *
;* (2 function parameters) *
;* (1 local values) *
;* Min System Stack : 1 word *
;*******************************************************************************
_main:
.dwcfi cfa_offset, 1
.dwcfi save_reg_to_mem, 91, -1
AADD #-3, SP
.dwcfi cfa_offset, 4
$C$DW$61 .dwtag DW_TAG_variable, DW_AT_name("status")
.dwattr $C$DW$61, DW_AT_TI_symbol_name("_status")
.dwattr $C$DW$61, DW_AT_type(*$C$DW$T$73)
.dwattr $C$DW$61, DW_AT_location[DW_OP_bregx 0x24 2]
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 222,column 2,is_stmt
AMOV #$C$FSL9, XAR3 ; |222|
MOV XAR3, dbl(*SP(#0))
$C$DW$62 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$62, DW_AT_low_pc(0x00)
.dwattr $C$DW$62, DW_AT_name("_printf")
.dwattr $C$DW$62, DW_AT_TI_call
CALL #_printf ; |222|
; call occurs [#_printf] ; |222|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 224,column 2,is_stmt
$C$DW$63 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$63, DW_AT_low_pc(0x00)
.dwattr $C$DW$63, DW_AT_name("_i2s_sample")
.dwattr $C$DW$63, DW_AT_TI_call
CALL #_i2s_sample ; |224|
; call occurs [#_i2s_sample] ; |224|
MOV T0, *SP(#2) ; |224|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 226,column 2,is_stmt
MOV T0, AR1
BCC $C$L16,AR1 == #0 ; |226|
; branchcc occurs ; |226|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 228,column 3,is_stmt
AMOV #$C$FSL10, XAR3 ; |228|
MOV XAR3, dbl(*SP(#0))
$C$DW$64 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$64, DW_AT_low_pc(0x00)
.dwattr $C$DW$64, DW_AT_name("_printf")
.dwattr $C$DW$64, DW_AT_TI_call
CALL #_printf ; |228|
; call occurs [#_printf] ; |228|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 231,column 9,is_stmt
MOV #0, *(#_PaSs_StAtE) ; |231|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 233,column 2,is_stmt
B $C$L17 ; |233|
; branch occurs ; |233|
$C$L16:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 236,column 3,is_stmt
AMOV #$C$FSL11, XAR3 ; |236|
MOV XAR3, dbl(*SP(#0))
$C$DW$65 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$65, DW_AT_low_pc(0x00)
.dwattr $C$DW$65, DW_AT_name("_printf")
.dwattr $C$DW$65, DW_AT_TI_call
CALL #_printf ; |236|
; call occurs [#_printf] ; |236|
$C$L17:
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 240,column 9,is_stmt
MOV *(#_PaSs_StAtE), AR1 ; |240|
MOV AR1, *(#_PaSs) ; |240|
.dwpsn file "../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c",line 245,column 1,is_stmt
AADD #3, SP
.dwcfi cfa_offset, 1
$C$DW$66 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$66, DW_AT_low_pc(0x00)
.dwattr $C$DW$66, DW_AT_TI_return
RET
; return occurs
.dwattr $C$DW$60, DW_AT_TI_end_file("../c5535_bsl_revc/ezdsp5535_v1/c55xx_csl/ccs_v4.0_examples/i2s/CSL_I2S_PollExample/csl_i2s_PollExample.c")
.dwattr $C$DW$60, DW_AT_TI_end_line(0xf5)
.dwattr $C$DW$60, DW_AT_TI_end_column(0x01)
.dwendentry
.dwendtag $C$DW$60
;*******************************************************************************
;* FAR STRINGS *
;*******************************************************************************
.sect ".const:.string"
.align 2
$C$FSL1: .string "I2S Module Instance opened successfully",10,0
.align 2
$C$FSL2: .string "I2S Module Configured successfully",10,0
.align 2
$C$FSL3: .string "I2S Write Failed",10,0
.align 2
$C$FSL4: .string "I2S Read Failed",10,0
.align 2
$C$FSL5: .string "I2S Reset Successful",10,0
.align 2
$C$FSL6: .string "I2S Close Successful",10,0
.align 2
$C$FSL7: .string "I2S Read & Write Buffers doesn't Match!!!",10,0
.align 2
$C$FSL8: .string "I2S Read & Write Buffers Match!!!",10,0
.align 2
$C$FSL9: .string "CSL I2S POLLED MODE TEST!",10,10,0
.align 2
$C$FSL10: .string 10,"CSL I2S POLLED MODE TEST FAILED!!",10,10,0
.align 2
$C$FSL11: .string 10,"CSL I2S POLLED MODE TEST PASSED!!",10,10,0
;******************************************************************************
;* UNDEFINED EXTERNAL REFERENCES *
;******************************************************************************
.global _I2S_open
.global _I2S_setup
.global _I2S_close
.global _I2S_read
.global _I2S_write
.global _I2S_reset
.global _I2S_transEnable
.global _printf
;*******************************************************************************
;* TYPE INFORMATION *
;*******************************************************************************
$C$DW$T$25 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$25, DW_AT_byte_size(0x01)
$C$DW$67 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_INSTANCE0"), DW_AT_const_value(0x00)
$C$DW$68 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_INSTANCE1"), DW_AT_const_value(0x01)
$C$DW$69 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_INSTANCE2"), DW_AT_const_value(0x02)
$C$DW$70 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_INSTANCE3"), DW_AT_const_value(0x03)
$C$DW$71 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_INVALID"), DW_AT_const_value(0x04)
.dwendtag $C$DW$T$25
$C$DW$T$26 .dwtag DW_TAG_typedef, DW_AT_name("I2S_Instance")
.dwattr $C$DW$T$26, DW_AT_type(*$C$DW$T$25)
.dwattr $C$DW$T$26, DW_AT_language(DW_LANG_C)
$C$DW$T$27 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$27, DW_AT_byte_size(0x01)
$C$DW$72 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_POLLED"), DW_AT_const_value(0x00)
$C$DW$73 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_INTERRUPT"), DW_AT_const_value(0x01)
$C$DW$74 .dwtag DW_TAG_enumerator, DW_AT_name("DMA_POLLED"), DW_AT_const_value(0x02)
$C$DW$75 .dwtag DW_TAG_enumerator, DW_AT_name("DMA_INTERRUPT"), DW_AT_const_value(0x03)
$C$DW$76 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_OPMODE_OTHER"), DW_AT_const_value(0x04)
.dwendtag $C$DW$T$27
$C$DW$T$28 .dwtag DW_TAG_typedef, DW_AT_name("I2S_OpMode")
.dwattr $C$DW$T$28, DW_AT_type(*$C$DW$T$27)
.dwattr $C$DW$T$28, DW_AT_language(DW_LANG_C)
$C$DW$T$29 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$29, DW_AT_byte_size(0x01)
$C$DW$77 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CHAN_MONO"), DW_AT_const_value(0x00)
$C$DW$78 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CHAN_STEREO"), DW_AT_const_value(0x01)
$C$DW$79 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CHAN_UNDEF"), DW_AT_const_value(0x02)
.dwendtag $C$DW$T$29
$C$DW$T$30 .dwtag DW_TAG_typedef, DW_AT_name("I2S_ChanType")
.dwattr $C$DW$T$30, DW_AT_type(*$C$DW$T$29)
.dwattr $C$DW$T$30, DW_AT_language(DW_LANG_C)
$C$DW$T$34 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$34, DW_AT_byte_size(0x01)
$C$DW$80 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_DATAPACK_DISABLE"), DW_AT_const_value(0x00)
$C$DW$81 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_DATAPACK_ENABLE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$34
$C$DW$T$35 .dwtag DW_TAG_typedef, DW_AT_name("I2S_DatapackType")
.dwattr $C$DW$T$35, DW_AT_type(*$C$DW$T$34)
.dwattr $C$DW$T$35, DW_AT_language(DW_LANG_C)
$C$DW$T$36 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$36, DW_AT_byte_size(0x01)
$C$DW$82 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV8"), DW_AT_const_value(0x00)
$C$DW$83 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV16"), DW_AT_const_value(0x01)
$C$DW$84 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV32"), DW_AT_const_value(0x02)
$C$DW$85 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV64"), DW_AT_const_value(0x03)
$C$DW$86 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV128"), DW_AT_const_value(0x04)
$C$DW$87 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV256"), DW_AT_const_value(0x05)
$C$DW$88 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSDIV_RESERVE"), DW_AT_const_value(0x06)
.dwendtag $C$DW$T$36
$C$DW$T$37 .dwtag DW_TAG_typedef, DW_AT_name("I2S_Fsdiv")
.dwattr $C$DW$T$37, DW_AT_type(*$C$DW$T$36)
.dwattr $C$DW$T$37, DW_AT_language(DW_LANG_C)
$C$DW$T$38 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$38, DW_AT_byte_size(0x01)
$C$DW$89 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_8"), DW_AT_const_value(0x00)
$C$DW$90 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_10"), DW_AT_const_value(0x01)
$C$DW$91 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_12"), DW_AT_const_value(0x02)
$C$DW$92 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_14"), DW_AT_const_value(0x03)
$C$DW$93 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_16"), DW_AT_const_value(0x04)
$C$DW$94 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_18"), DW_AT_const_value(0x05)
$C$DW$95 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_20"), DW_AT_const_value(0x06)
$C$DW$96 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_24"), DW_AT_const_value(0x07)
$C$DW$97 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_32"), DW_AT_const_value(0x08)
$C$DW$98 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_WORDLEN_INVALID"), DW_AT_const_value(0x09)
.dwendtag $C$DW$T$38
$C$DW$T$39 .dwtag DW_TAG_typedef, DW_AT_name("I2S_WordLen")
.dwattr $C$DW$T$39, DW_AT_type(*$C$DW$T$38)
.dwattr $C$DW$T$39, DW_AT_language(DW_LANG_C)
$C$DW$T$40 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$40, DW_AT_byte_size(0x01)
$C$DW$99 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_LOOPBACK_DISABLE"), DW_AT_const_value(0x00)
$C$DW$100 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_LOOPBACK_ENABLE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$40
$C$DW$T$41 .dwtag DW_TAG_typedef, DW_AT_name("I2S_LoopbackType")
.dwattr $C$DW$T$41, DW_AT_type(*$C$DW$T$40)
.dwattr $C$DW$T$41, DW_AT_language(DW_LANG_C)
$C$DW$T$44 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$44, DW_AT_byte_size(0x01)
$C$DW$101 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_STEREO_ENABLE"), DW_AT_const_value(0x00)
$C$DW$102 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_MONO_ENABLE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$44
$C$DW$T$45 .dwtag DW_TAG_typedef, DW_AT_name("I2S_MonoType")
.dwattr $C$DW$T$45, DW_AT_type(*$C$DW$T$44)
.dwattr $C$DW$T$45, DW_AT_language(DW_LANG_C)
$C$DW$T$46 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$46, DW_AT_byte_size(0x01)
$C$DW$103 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSPOL_LOW"), DW_AT_const_value(0x00)
$C$DW$104 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSPOL_HIGH"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$46
$C$DW$T$47 .dwtag DW_TAG_typedef, DW_AT_name("I2S_FsyncPol")
.dwattr $C$DW$T$47, DW_AT_type(*$C$DW$T$46)
.dwattr $C$DW$T$47, DW_AT_language(DW_LANG_C)
$C$DW$T$48 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$48, DW_AT_byte_size(0x01)
$C$DW$105 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_RISING_EDGE"), DW_AT_const_value(0x00)
$C$DW$106 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FALLING_EDGE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$48
$C$DW$T$49 .dwtag DW_TAG_typedef, DW_AT_name("I2S_ClkPol")
.dwattr $C$DW$T$49, DW_AT_type(*$C$DW$T$48)
.dwattr $C$DW$T$49, DW_AT_language(DW_LANG_C)
$C$DW$T$50 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$50, DW_AT_byte_size(0x01)
$C$DW$107 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_DATADELAY_ONEBIT"), DW_AT_const_value(0x00)
$C$DW$108 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_DATADELAY_TWOBIT"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$50
$C$DW$T$51 .dwtag DW_TAG_typedef, DW_AT_name("I2S_DataDelay")
.dwattr $C$DW$T$51, DW_AT_type(*$C$DW$T$50)
.dwattr $C$DW$T$51, DW_AT_language(DW_LANG_C)
$C$DW$T$52 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$52, DW_AT_byte_size(0x01)
$C$DW$109 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_SIGNEXT_DISABLE"), DW_AT_const_value(0x00)
$C$DW$110 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_SIGNEXT_ENABLE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$52
$C$DW$T$53 .dwtag DW_TAG_typedef, DW_AT_name("I2S_SignextType")
.dwattr $C$DW$T$53, DW_AT_type(*$C$DW$T$52)
.dwattr $C$DW$T$53, DW_AT_language(DW_LANG_C)
$C$DW$T$54 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$54, DW_AT_byte_size(0x01)
$C$DW$111 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_SLAVE"), DW_AT_const_value(0x00)
$C$DW$112 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_MASTER"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$54
$C$DW$T$55 .dwtag DW_TAG_typedef, DW_AT_name("I2S_Mode")
.dwattr $C$DW$T$55, DW_AT_type(*$C$DW$T$54)
.dwattr $C$DW$T$55, DW_AT_language(DW_LANG_C)
$C$DW$T$56 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$56, DW_AT_byte_size(0x01)
$C$DW$113 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_DATAFORMAT_LJUST"), DW_AT_const_value(0x00)
$C$DW$114 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_DATAFORMAT_DSP"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$56
$C$DW$T$57 .dwtag DW_TAG_typedef, DW_AT_name("I2S_DataFormat")
.dwattr $C$DW$T$57, DW_AT_type(*$C$DW$T$56)
.dwattr $C$DW$T$57, DW_AT_language(DW_LANG_C)
$C$DW$T$58 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$58, DW_AT_byte_size(0x01)
$C$DW$115 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV2"), DW_AT_const_value(0x00)
$C$DW$116 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV4"), DW_AT_const_value(0x01)
$C$DW$117 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV8"), DW_AT_const_value(0x02)
$C$DW$118 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV16"), DW_AT_const_value(0x03)
$C$DW$119 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV32"), DW_AT_const_value(0x04)
$C$DW$120 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV64"), DW_AT_const_value(0x05)
$C$DW$121 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV128"), DW_AT_const_value(0x06)
$C$DW$122 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_CLKDIV256"), DW_AT_const_value(0x07)
.dwendtag $C$DW$T$58
$C$DW$T$59 .dwtag DW_TAG_typedef, DW_AT_name("I2S_Clkdiv")
.dwattr $C$DW$T$59, DW_AT_type(*$C$DW$T$58)
.dwattr $C$DW$T$59, DW_AT_language(DW_LANG_C)
$C$DW$T$60 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$60, DW_AT_byte_size(0x01)
$C$DW$123 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSERROR_DISABLE"), DW_AT_const_value(0x00)
$C$DW$124 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_FSERROR_ENABLE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$60
$C$DW$T$61 .dwtag DW_TAG_typedef, DW_AT_name("I2S_FsErr")
.dwattr $C$DW$T$61, DW_AT_type(*$C$DW$T$60)
.dwattr $C$DW$T$61, DW_AT_language(DW_LANG_C)
$C$DW$T$62 .dwtag DW_TAG_enumeration_type
.dwattr $C$DW$T$62, DW_AT_byte_size(0x01)
$C$DW$125 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_OUERROR_DISABLE"), DW_AT_const_value(0x00)
$C$DW$126 .dwtag DW_TAG_enumerator, DW_AT_name("I2S_OUERROR_ENABLE"), DW_AT_const_value(0x01)
.dwendtag $C$DW$T$62
$C$DW$T$63 .dwtag DW_TAG_typedef, DW_AT_name("I2S_OuErr")
.dwattr $C$DW$T$63, DW_AT_type(*$C$DW$T$62)
.dwattr $C$DW$T$63, DW_AT_language(DW_LANG_C)
$C$DW$T$24 .dwtag DW_TAG_structure_type
.dwattr $C$DW$T$24, DW_AT_byte_size(0x2e)
$C$DW$127 .dwtag DW_TAG_member
.dwattr $C$DW$127, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$127, DW_AT_name("I2SSCTRL")
.dwattr $C$DW$127, DW_AT_TI_symbol_name("_I2SSCTRL")
.dwattr $C$DW$127, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
.dwattr $C$DW$127, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$128 .dwtag DW_TAG_member
.dwattr $C$DW$128, DW_AT_type(*$C$DW$T$21)
.dwattr $C$DW$128, DW_AT_name("RSVD0")
.dwattr $C$DW$128, DW_AT_TI_symbol_name("_RSVD0")
.dwattr $C$DW$128, DW_AT_data_member_location[DW_OP_plus_uconst 0x1]
.dwattr $C$DW$128, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$129 .dwtag DW_TAG_member
.dwattr $C$DW$129, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$129, DW_AT_name("I2SSRATE")
.dwattr $C$DW$129, DW_AT_TI_symbol_name("_I2SSRATE")
.dwattr $C$DW$129, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
.dwattr $C$DW$129, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$130 .dwtag DW_TAG_member
.dwattr $C$DW$130, DW_AT_type(*$C$DW$T$21)
.dwattr $C$DW$130, DW_AT_name("RSVD1")
.dwattr $C$DW$130, DW_AT_TI_symbol_name("_RSVD1")
.dwattr $C$DW$130, DW_AT_data_member_location[DW_OP_plus_uconst 0x5]
.dwattr $C$DW$130, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$131 .dwtag DW_TAG_member
.dwattr $C$DW$131, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$131, DW_AT_name("I2STXLT0")
.dwattr $C$DW$131, DW_AT_TI_symbol_name("_I2STXLT0")
.dwattr $C$DW$131, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
.dwattr $C$DW$131, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$132 .dwtag DW_TAG_member
.dwattr $C$DW$132, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$132, DW_AT_name("I2STXLT1")
.dwattr $C$DW$132, DW_AT_TI_symbol_name("_I2STXLT1")
.dwattr $C$DW$132, DW_AT_data_member_location[DW_OP_plus_uconst 0x9]
.dwattr $C$DW$132, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$133 .dwtag DW_TAG_member
.dwattr $C$DW$133, DW_AT_type(*$C$DW$T$22)
.dwattr $C$DW$133, DW_AT_name("RSVD2")
.dwattr $C$DW$133, DW_AT_TI_symbol_name("_RSVD2")
.dwattr $C$DW$133, DW_AT_data_member_location[DW_OP_plus_uconst 0xa]
.dwattr $C$DW$133, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$134 .dwtag DW_TAG_member
.dwattr $C$DW$134, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$134, DW_AT_name("I2STXRT0")
.dwattr $C$DW$134, DW_AT_TI_symbol_name("_I2STXRT0")
.dwattr $C$DW$134, DW_AT_data_member_location[DW_OP_plus_uconst 0xc]
.dwattr $C$DW$134, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$135 .dwtag DW_TAG_member
.dwattr $C$DW$135, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$135, DW_AT_name("I2STXRT1")
.dwattr $C$DW$135, DW_AT_TI_symbol_name("_I2STXRT1")
.dwattr $C$DW$135, DW_AT_data_member_location[DW_OP_plus_uconst 0xd]
.dwattr $C$DW$135, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$136 .dwtag DW_TAG_member
.dwattr $C$DW$136, DW_AT_type(*$C$DW$T$22)
.dwattr $C$DW$136, DW_AT_name("RSVD3")
.dwattr $C$DW$136, DW_AT_TI_symbol_name("_RSVD3")
.dwattr $C$DW$136, DW_AT_data_member_location[DW_OP_plus_uconst 0xe]
.dwattr $C$DW$136, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$137 .dwtag DW_TAG_member
.dwattr $C$DW$137, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$137, DW_AT_name("I2SINTFL")
.dwattr $C$DW$137, DW_AT_TI_symbol_name("_I2SINTFL")
.dwattr $C$DW$137, DW_AT_data_member_location[DW_OP_plus_uconst 0x10]
.dwattr $C$DW$137, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$138 .dwtag DW_TAG_member
.dwattr $C$DW$138, DW_AT_type(*$C$DW$T$21)
.dwattr $C$DW$138, DW_AT_name("RSVD4")
.dwattr $C$DW$138, DW_AT_TI_symbol_name("_RSVD4")
.dwattr $C$DW$138, DW_AT_data_member_location[DW_OP_plus_uconst 0x11]
.dwattr $C$DW$138, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$139 .dwtag DW_TAG_member
.dwattr $C$DW$139, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$139, DW_AT_name("I2SINTMASK")
.dwattr $C$DW$139, DW_AT_TI_symbol_name("_I2SINTMASK")
.dwattr $C$DW$139, DW_AT_data_member_location[DW_OP_plus_uconst 0x14]
.dwattr $C$DW$139, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$140 .dwtag DW_TAG_member
.dwattr $C$DW$140, DW_AT_type(*$C$DW$T$23)
.dwattr $C$DW$140, DW_AT_name("RSVD5")
.dwattr $C$DW$140, DW_AT_TI_symbol_name("_RSVD5")
.dwattr $C$DW$140, DW_AT_data_member_location[DW_OP_plus_uconst 0x15]
.dwattr $C$DW$140, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$141 .dwtag DW_TAG_member
.dwattr $C$DW$141, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$141, DW_AT_name("I2SRXLT0")
.dwattr $C$DW$141, DW_AT_TI_symbol_name("_I2SRXLT0")
.dwattr $C$DW$141, DW_AT_data_member_location[DW_OP_plus_uconst 0x28]
.dwattr $C$DW$141, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$142 .dwtag DW_TAG_member
.dwattr $C$DW$142, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$142, DW_AT_name("I2SRXLT1")
.dwattr $C$DW$142, DW_AT_TI_symbol_name("_I2SRXLT1")
.dwattr $C$DW$142, DW_AT_data_member_location[DW_OP_plus_uconst 0x29]
.dwattr $C$DW$142, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$143 .dwtag DW_TAG_member
.dwattr $C$DW$143, DW_AT_type(*$C$DW$T$22)
.dwattr $C$DW$143, DW_AT_name("RSVD6")
.dwattr $C$DW$143, DW_AT_TI_symbol_name("_RSVD6")
.dwattr $C$DW$143, DW_AT_data_member_location[DW_OP_plus_uconst 0x2a]
.dwattr $C$DW$143, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$144 .dwtag DW_TAG_member
.dwattr $C$DW$144, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$144, DW_AT_name("I2SRXRT0")
.dwattr $C$DW$144, DW_AT_TI_symbol_name("_I2SRXRT0")
.dwattr $C$DW$144, DW_AT_data_member_location[DW_OP_plus_uconst 0x2c]
.dwattr $C$DW$144, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$145 .dwtag DW_TAG_member
.dwattr $C$DW$145, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$145, DW_AT_name("I2SRXRT1")
.dwattr $C$DW$145, DW_AT_TI_symbol_name("_I2SRXRT1")
.dwattr $C$DW$145, DW_AT_data_member_location[DW_OP_plus_uconst 0x2d]
.dwattr $C$DW$145, DW_AT_accessibility(DW_ACCESS_public)
.dwendtag $C$DW$T$24
$C$DW$T$31 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2sRegs")
.dwattr $C$DW$T$31, DW_AT_type(*$C$DW$T$24)
.dwattr $C$DW$T$31, DW_AT_language(DW_LANG_C)
$C$DW$146 .dwtag DW_TAG_TI_far_type
.dwattr $C$DW$146, DW_AT_type(*$C$DW$T$31)
$C$DW$147 .dwtag DW_TAG_TI_ioport_type
.dwattr $C$DW$147, DW_AT_type(*$C$DW$146)
$C$DW$T$32 .dwtag DW_TAG_volatile_type
.dwattr $C$DW$T$32, DW_AT_type(*$C$DW$147)
$C$DW$T$33 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$33, DW_AT_type(*$C$DW$T$32)
.dwattr $C$DW$T$33, DW_AT_address_class(0x10)
$C$DW$T$43 .dwtag DW_TAG_structure_type
.dwattr $C$DW$T$43, DW_AT_byte_size(0x0a)
$C$DW$148 .dwtag DW_TAG_member
.dwattr $C$DW$148, DW_AT_type(*$C$DW$T$26)
.dwattr $C$DW$148, DW_AT_name("i2sNum")
.dwattr $C$DW$148, DW_AT_TI_symbol_name("_i2sNum")
.dwattr $C$DW$148, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
.dwattr $C$DW$148, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$149 .dwtag DW_TAG_member
.dwattr $C$DW$149, DW_AT_type(*$C$DW$T$28)
.dwattr $C$DW$149, DW_AT_name("opMode")
.dwattr $C$DW$149, DW_AT_TI_symbol_name("_opMode")
.dwattr $C$DW$149, DW_AT_data_member_location[DW_OP_plus_uconst 0x1]
.dwattr $C$DW$149, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$150 .dwtag DW_TAG_member
.dwattr $C$DW$150, DW_AT_type(*$C$DW$T$30)
.dwattr $C$DW$150, DW_AT_name("chType")
.dwattr $C$DW$150, DW_AT_TI_symbol_name("_chType")
.dwattr $C$DW$150, DW_AT_data_member_location[DW_OP_plus_uconst 0x2]
.dwattr $C$DW$150, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$151 .dwtag DW_TAG_member
.dwattr $C$DW$151, DW_AT_type(*$C$DW$T$33)
.dwattr $C$DW$151, DW_AT_name("hwRegs")
.dwattr $C$DW$151, DW_AT_TI_symbol_name("_hwRegs")
.dwattr $C$DW$151, DW_AT_data_member_location[DW_OP_plus_uconst 0x3]
.dwattr $C$DW$151, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$152 .dwtag DW_TAG_member
.dwattr $C$DW$152, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$152, DW_AT_name("configured")
.dwattr $C$DW$152, DW_AT_TI_symbol_name("_configured")
.dwattr $C$DW$152, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
.dwattr $C$DW$152, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$153 .dwtag DW_TAG_member
.dwattr $C$DW$153, DW_AT_type(*$C$DW$T$35)
.dwattr $C$DW$153, DW_AT_name("datapack")
.dwattr $C$DW$153, DW_AT_TI_symbol_name("_datapack")
.dwattr $C$DW$153, DW_AT_data_member_location[DW_OP_plus_uconst 0x5]
.dwattr $C$DW$153, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$154 .dwtag DW_TAG_member
.dwattr $C$DW$154, DW_AT_type(*$C$DW$T$37)
.dwattr $C$DW$154, DW_AT_name("fsDiv")
.dwattr $C$DW$154, DW_AT_TI_symbol_name("_fsDiv")
.dwattr $C$DW$154, DW_AT_data_member_location[DW_OP_plus_uconst 0x6]
.dwattr $C$DW$154, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$155 .dwtag DW_TAG_member
.dwattr $C$DW$155, DW_AT_type(*$C$DW$T$39)
.dwattr $C$DW$155, DW_AT_name("wordLen")
.dwattr $C$DW$155, DW_AT_TI_symbol_name("_wordLen")
.dwattr $C$DW$155, DW_AT_data_member_location[DW_OP_plus_uconst 0x7]
.dwattr $C$DW$155, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$156 .dwtag DW_TAG_member
.dwattr $C$DW$156, DW_AT_type(*$C$DW$T$41)
.dwattr $C$DW$156, DW_AT_name("loopBackMode")
.dwattr $C$DW$156, DW_AT_TI_symbol_name("_loopBackMode")
.dwattr $C$DW$156, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
.dwattr $C$DW$156, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$157 .dwtag DW_TAG_member
.dwattr $C$DW$157, DW_AT_type(*$C$DW$T$42)
.dwattr $C$DW$157, DW_AT_name("firstRead")
.dwattr $C$DW$157, DW_AT_TI_symbol_name("_firstRead")
.dwattr $C$DW$157, DW_AT_data_member_location[DW_OP_plus_uconst 0x9]
.dwattr $C$DW$157, DW_AT_accessibility(DW_ACCESS_public)
.dwendtag $C$DW$T$43
$C$DW$T$65 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2sObj")
.dwattr $C$DW$T$65, DW_AT_type(*$C$DW$T$43)
.dwattr $C$DW$T$65, DW_AT_language(DW_LANG_C)
$C$DW$T$66 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$66, DW_AT_type(*$C$DW$T$65)
.dwattr $C$DW$T$66, DW_AT_address_class(0x17)
$C$DW$T$67 .dwtag DW_TAG_typedef, DW_AT_name("CSL_I2sHandle")
.dwattr $C$DW$T$67, DW_AT_type(*$C$DW$T$66)
.dwattr $C$DW$T$67, DW_AT_language(DW_LANG_C)
$C$DW$T$64 .dwtag DW_TAG_structure_type
.dwattr $C$DW$T$64, DW_AT_byte_size(0x0e)
$C$DW$158 .dwtag DW_TAG_member
.dwattr $C$DW$158, DW_AT_type(*$C$DW$T$45)
.dwattr $C$DW$158, DW_AT_name("dataType")
.dwattr $C$DW$158, DW_AT_TI_symbol_name("_dataType")
.dwattr $C$DW$158, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
.dwattr $C$DW$158, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$159 .dwtag DW_TAG_member
.dwattr $C$DW$159, DW_AT_type(*$C$DW$T$41)
.dwattr $C$DW$159, DW_AT_name("loopBackMode")
.dwattr $C$DW$159, DW_AT_TI_symbol_name("_loopBackMode")
.dwattr $C$DW$159, DW_AT_data_member_location[DW_OP_plus_uconst 0x1]
.dwattr $C$DW$159, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$160 .dwtag DW_TAG_member
.dwattr $C$DW$160, DW_AT_type(*$C$DW$T$47)
.dwattr $C$DW$160, DW_AT_name("fsPol")
.dwattr $C$DW$160, DW_AT_TI_symbol_name("_fsPol")
.dwattr $C$DW$160, DW_AT_data_member_location[DW_OP_plus_uconst 0x2]
.dwattr $C$DW$160, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$161 .dwtag DW_TAG_member
.dwattr $C$DW$161, DW_AT_type(*$C$DW$T$49)
.dwattr $C$DW$161, DW_AT_name("clkPol")
.dwattr $C$DW$161, DW_AT_TI_symbol_name("_clkPol")
.dwattr $C$DW$161, DW_AT_data_member_location[DW_OP_plus_uconst 0x3]
.dwattr $C$DW$161, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$162 .dwtag DW_TAG_member
.dwattr $C$DW$162, DW_AT_type(*$C$DW$T$51)
.dwattr $C$DW$162, DW_AT_name("datadelay")
.dwattr $C$DW$162, DW_AT_TI_symbol_name("_datadelay")
.dwattr $C$DW$162, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
.dwattr $C$DW$162, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$163 .dwtag DW_TAG_member
.dwattr $C$DW$163, DW_AT_type(*$C$DW$T$35)
.dwattr $C$DW$163, DW_AT_name("datapack")
.dwattr $C$DW$163, DW_AT_TI_symbol_name("_datapack")
.dwattr $C$DW$163, DW_AT_data_member_location[DW_OP_plus_uconst 0x5]
.dwattr $C$DW$163, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$164 .dwtag DW_TAG_member
.dwattr $C$DW$164, DW_AT_type(*$C$DW$T$53)
.dwattr $C$DW$164, DW_AT_name("signext")
.dwattr $C$DW$164, DW_AT_TI_symbol_name("_signext")
.dwattr $C$DW$164, DW_AT_data_member_location[DW_OP_plus_uconst 0x6]
.dwattr $C$DW$164, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$165 .dwtag DW_TAG_member
.dwattr $C$DW$165, DW_AT_type(*$C$DW$T$39)
.dwattr $C$DW$165, DW_AT_name("wordLen")
.dwattr $C$DW$165, DW_AT_TI_symbol_name("_wordLen")
.dwattr $C$DW$165, DW_AT_data_member_location[DW_OP_plus_uconst 0x7]
.dwattr $C$DW$165, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$166 .dwtag DW_TAG_member
.dwattr $C$DW$166, DW_AT_type(*$C$DW$T$55)
.dwattr $C$DW$166, DW_AT_name("i2sMode")
.dwattr $C$DW$166, DW_AT_TI_symbol_name("_i2sMode")
.dwattr $C$DW$166, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
.dwattr $C$DW$166, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$167 .dwtag DW_TAG_member
.dwattr $C$DW$167, DW_AT_type(*$C$DW$T$57)
.dwattr $C$DW$167, DW_AT_name("dataFormat")
.dwattr $C$DW$167, DW_AT_TI_symbol_name("_dataFormat")
.dwattr $C$DW$167, DW_AT_data_member_location[DW_OP_plus_uconst 0x9]
.dwattr $C$DW$167, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$168 .dwtag DW_TAG_member
.dwattr $C$DW$168, DW_AT_type(*$C$DW$T$37)
.dwattr $C$DW$168, DW_AT_name("fsDiv")
.dwattr $C$DW$168, DW_AT_TI_symbol_name("_fsDiv")
.dwattr $C$DW$168, DW_AT_data_member_location[DW_OP_plus_uconst 0xa]
.dwattr $C$DW$168, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$169 .dwtag DW_TAG_member
.dwattr $C$DW$169, DW_AT_type(*$C$DW$T$59)
.dwattr $C$DW$169, DW_AT_name("clkDiv")
.dwattr $C$DW$169, DW_AT_TI_symbol_name("_clkDiv")
.dwattr $C$DW$169, DW_AT_data_member_location[DW_OP_plus_uconst 0xb]
.dwattr $C$DW$169, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$170 .dwtag DW_TAG_member
.dwattr $C$DW$170, DW_AT_type(*$C$DW$T$61)
.dwattr $C$DW$170, DW_AT_name("FError")
.dwattr $C$DW$170, DW_AT_TI_symbol_name("_FError")
.dwattr $C$DW$170, DW_AT_data_member_location[DW_OP_plus_uconst 0xc]
.dwattr $C$DW$170, DW_AT_accessibility(DW_ACCESS_public)
$C$DW$171 .dwtag DW_TAG_member
.dwattr $C$DW$171, DW_AT_type(*$C$DW$T$63)
.dwattr $C$DW$171, DW_AT_name("OuError")
.dwattr $C$DW$171, DW_AT_TI_symbol_name("_OuError")
.dwattr $C$DW$171, DW_AT_data_member_location[DW_OP_plus_uconst 0xd]
.dwattr $C$DW$171, DW_AT_accessibility(DW_ACCESS_public)
.dwendtag $C$DW$T$64
$C$DW$T$70 .dwtag DW_TAG_typedef, DW_AT_name("I2S_Config")
.dwattr $C$DW$T$70, DW_AT_type(*$C$DW$T$64)
.dwattr $C$DW$T$70, DW_AT_language(DW_LANG_C)
$C$DW$T$71 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$71, DW_AT_type(*$C$DW$T$70)
.dwattr $C$DW$T$71, DW_AT_address_class(0x17)
$C$DW$T$4 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
.dwattr $C$DW$T$4, DW_AT_name("bool")
.dwattr $C$DW$T$4, DW_AT_byte_size(0x01)
$C$DW$T$5 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
.dwattr $C$DW$T$5, DW_AT_name("signed char")
.dwattr $C$DW$T$5, DW_AT_byte_size(0x01)
$C$DW$T$6 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
.dwattr $C$DW$T$6, DW_AT_name("unsigned char")
.dwattr $C$DW$T$6, DW_AT_byte_size(0x01)
$C$DW$T$7 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
.dwattr $C$DW$T$7, DW_AT_name("wchar_t")
.dwattr $C$DW$T$7, DW_AT_byte_size(0x01)
$C$DW$T$8 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$8, DW_AT_name("short")
.dwattr $C$DW$T$8, DW_AT_byte_size(0x01)
$C$DW$T$73 .dwtag DW_TAG_typedef, DW_AT_name("Int16")
.dwattr $C$DW$T$73, DW_AT_type(*$C$DW$T$8)
.dwattr $C$DW$T$73, DW_AT_language(DW_LANG_C)
$C$DW$T$74 .dwtag DW_TAG_typedef, DW_AT_name("CSL_Status")
.dwattr $C$DW$T$74, DW_AT_type(*$C$DW$T$73)
.dwattr $C$DW$T$74, DW_AT_language(DW_LANG_C)
$C$DW$172 .dwtag DW_TAG_TI_far_type
.dwattr $C$DW$172, DW_AT_type(*$C$DW$T$73)
$C$DW$T$84 .dwtag DW_TAG_volatile_type
.dwattr $C$DW$T$84, DW_AT_type(*$C$DW$172)
$C$DW$T$9 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$9, DW_AT_name("unsigned short")
.dwattr $C$DW$T$9, DW_AT_byte_size(0x01)
$C$DW$T$19 .dwtag DW_TAG_typedef, DW_AT_name("Uint16")
.dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$9)
.dwattr $C$DW$T$19, DW_AT_language(DW_LANG_C)
$C$DW$173 .dwtag DW_TAG_TI_far_type
.dwattr $C$DW$173, DW_AT_type(*$C$DW$T$19)
$C$DW$T$20 .dwtag DW_TAG_volatile_type
.dwattr $C$DW$T$20, DW_AT_type(*$C$DW$173)
$C$DW$T$21 .dwtag DW_TAG_array_type
.dwattr $C$DW$T$21, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$T$21, DW_AT_language(DW_LANG_C)
.dwattr $C$DW$T$21, DW_AT_byte_size(0x03)
$C$DW$174 .dwtag DW_TAG_subrange_type
.dwattr $C$DW$174, DW_AT_upper_bound(0x02)
.dwendtag $C$DW$T$21
$C$DW$T$22 .dwtag DW_TAG_array_type
.dwattr $C$DW$T$22, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$T$22, DW_AT_language(DW_LANG_C)
.dwattr $C$DW$T$22, DW_AT_byte_size(0x02)
$C$DW$175 .dwtag DW_TAG_subrange_type
.dwattr $C$DW$175, DW_AT_upper_bound(0x01)
.dwendtag $C$DW$T$22
$C$DW$T$23 .dwtag DW_TAG_array_type
.dwattr $C$DW$T$23, DW_AT_type(*$C$DW$T$20)
.dwattr $C$DW$T$23, DW_AT_language(DW_LANG_C)
.dwattr $C$DW$T$23, DW_AT_byte_size(0x13)
$C$DW$176 .dwtag DW_TAG_subrange_type
.dwattr $C$DW$176, DW_AT_upper_bound(0x12)
.dwendtag $C$DW$T$23
$C$DW$T$79 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$79, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$T$79, DW_AT_address_class(0x17)
$C$DW$T$87 .dwtag DW_TAG_array_type
.dwattr $C$DW$T$87, DW_AT_type(*$C$DW$T$19)
.dwattr $C$DW$T$87, DW_AT_language(DW_LANG_C)
.dwattr $C$DW$T$87, DW_AT_byte_size(0x04)
$C$DW$177 .dwtag DW_TAG_subrange_type
.dwattr $C$DW$177, DW_AT_upper_bound(0x03)
.dwendtag $C$DW$T$87
$C$DW$T$10 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$10, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$10, DW_AT_name("int")
.dwattr $C$DW$T$10, DW_AT_byte_size(0x01)
$C$DW$T$42 .dwtag DW_TAG_typedef, DW_AT_name("Bool")
.dwattr $C$DW$T$42, DW_AT_type(*$C$DW$T$10)
.dwattr $C$DW$T$42, DW_AT_language(DW_LANG_C)
$C$DW$T$11 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$11, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$11, DW_AT_name("unsigned int")
.dwattr $C$DW$T$11, DW_AT_byte_size(0x01)
$C$DW$T$12 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$12, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$12, DW_AT_name("long")
.dwattr $C$DW$T$12, DW_AT_byte_size(0x02)
$C$DW$T$13 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$13, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$13, DW_AT_name("unsigned long")
.dwattr $C$DW$T$13, DW_AT_byte_size(0x02)
$C$DW$T$14 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$14, DW_AT_encoding(DW_ATE_signed)
.dwattr $C$DW$T$14, DW_AT_name("long long")
.dwattr $C$DW$T$14, DW_AT_byte_size(0x04)
.dwattr $C$DW$T$14, DW_AT_bit_size(0x28)
.dwattr $C$DW$T$14, DW_AT_bit_offset(0x18)
$C$DW$T$15 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$15, DW_AT_encoding(DW_ATE_unsigned)
.dwattr $C$DW$T$15, DW_AT_name("unsigned long long")
.dwattr $C$DW$T$15, DW_AT_byte_size(0x04)
.dwattr $C$DW$T$15, DW_AT_bit_size(0x28)
.dwattr $C$DW$T$15, DW_AT_bit_offset(0x18)
$C$DW$T$16 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$16, DW_AT_encoding(DW_ATE_float)
.dwattr $C$DW$T$16, DW_AT_name("float")
.dwattr $C$DW$T$16, DW_AT_byte_size(0x02)
$C$DW$T$17 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$17, DW_AT_encoding(DW_ATE_float)
.dwattr $C$DW$T$17, DW_AT_name("double")
.dwattr $C$DW$T$17, DW_AT_byte_size(0x02)
$C$DW$T$18 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$18, DW_AT_encoding(DW_ATE_float)
.dwattr $C$DW$T$18, DW_AT_name("long double")
.dwattr $C$DW$T$18, DW_AT_byte_size(0x02)
$C$DW$T$88 .dwtag DW_TAG_base_type
.dwattr $C$DW$T$88, DW_AT_encoding(DW_ATE_signed_char)
.dwattr $C$DW$T$88, DW_AT_name("signed char")
.dwattr $C$DW$T$88, DW_AT_byte_size(0x01)
$C$DW$178 .dwtag DW_TAG_TI_far_type
.dwattr $C$DW$178, DW_AT_type(*$C$DW$T$88)
$C$DW$T$89 .dwtag DW_TAG_const_type
.dwattr $C$DW$T$89, DW_AT_type(*$C$DW$178)
$C$DW$T$90 .dwtag DW_TAG_pointer_type
.dwattr $C$DW$T$90, DW_AT_type(*$C$DW$T$89)
.dwattr $C$DW$T$90, DW_AT_address_class(0x17)
.dwattr $C$DW$CU, DW_AT_language(DW_LANG_C)
;***************************************************************
;* DWARF CIE ENTRIES *
;***************************************************************
$C$DW$CIE .dwcie 91
.dwcfi cfa_register, 36
.dwcfi cfa_offset, 0
.dwcfi undefined, 0
.dwcfi undefined, 1
.dwcfi undefined, 2
.dwcfi undefined, 3
.dwcfi undefined, 4
.dwcfi undefined, 5
.dwcfi undefined, 6
.dwcfi undefined, 7
.dwcfi undefined, 8
.dwcfi undefined, 9
.dwcfi undefined, 10
.dwcfi undefined, 11
.dwcfi undefined, 12
.dwcfi undefined, 13
.dwcfi same_value, 14
.dwcfi same_value, 15
.dwcfi undefined, 16
.dwcfi undefined, 17
.dwcfi undefined, 18
.dwcfi undefined, 19
.dwcfi undefined, 20
.dwcfi undefined, 21
.dwcfi undefined, 22
.dwcfi undefined, 23
.dwcfi undefined, 24
.dwcfi undefined, 25
.dwcfi same_value, 26
.dwcfi same_value, 27
.dwcfi same_value, 28
.dwcfi same_value, 29
.dwcfi same_value, 30
.dwcfi same_value, 31
.dwcfi undefined, 32
.dwcfi undefined, 33
.dwcfi undefined, 34
.dwcfi undefined, 35
.dwcfi undefined, 36
.dwcfi undefined, 37
.dwcfi undefined, 38
.dwcfi undefined, 39
.dwcfi undefined, 40
.dwcfi undefined, 41
.dwcfi undefined, 42
.dwcfi undefined, 43
.dwcfi undefined, 44
.dwcfi undefined, 45
.dwcfi undefined, 46
.dwcfi undefined, 47
.dwcfi undefined, 48
.dwcfi undefined, 49
.dwcfi undefined, 50
.dwcfi undefined, 51
.dwcfi undefined, 52
.dwcfi undefined, 53
.dwcfi undefined, 54
.dwcfi undefined, 55
.dwcfi undefined, 56
.dwcfi undefined, 57
.dwcfi undefined, 58
.dwcfi undefined, 59
.dwcfi undefined, 60
.dwcfi undefined, 61
.dwcfi undefined, 62
.dwcfi undefined, 63
.dwcfi undefined, 64
.dwcfi undefined, 65
.dwcfi undefined, 66
.dwcfi undefined, 67
.dwcfi undefined, 68
.dwcfi undefined, 69
.dwcfi undefined, 70
.dwcfi undefined, 71
.dwcfi undefined, 72
.dwcfi undefined, 73
.dwcfi undefined, 74
.dwcfi undefined, 75
.dwcfi undefined, 76
.dwcfi undefined, 77
.dwcfi undefined, 78
.dwcfi undefined, 79
.dwcfi undefined, 80
.dwcfi undefined, 81
.dwcfi undefined, 82
.dwcfi undefined, 83
.dwcfi undefined, 84
.dwcfi undefined, 85
.dwcfi undefined, 86
.dwcfi undefined, 87
.dwcfi undefined, 88
.dwcfi undefined, 89
.dwcfi undefined, 90
.dwcfi undefined, 91
.dwendentry
;***************************************************************
;* DWARF REGISTER MAP *
;***************************************************************
$C$DW$179 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0")
.dwattr $C$DW$179, DW_AT_location[DW_OP_reg0]
$C$DW$180 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0")
.dwattr $C$DW$180, DW_AT_location[DW_OP_reg1]
$C$DW$181 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC0_G")
.dwattr $C$DW$181, DW_AT_location[DW_OP_reg2]
$C$DW$182 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1")
.dwattr $C$DW$182, DW_AT_location[DW_OP_reg3]
$C$DW$183 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1")
.dwattr $C$DW$183, DW_AT_location[DW_OP_reg4]
$C$DW$184 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC1_G")
.dwattr $C$DW$184, DW_AT_location[DW_OP_reg5]
$C$DW$185 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2")
.dwattr $C$DW$185, DW_AT_location[DW_OP_reg6]
$C$DW$186 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2")
.dwattr $C$DW$186, DW_AT_location[DW_OP_reg7]
$C$DW$187 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC2_G")
.dwattr $C$DW$187, DW_AT_location[DW_OP_reg8]
$C$DW$188 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3")
.dwattr $C$DW$188, DW_AT_location[DW_OP_reg9]
$C$DW$189 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3")
.dwattr $C$DW$189, DW_AT_location[DW_OP_reg10]
$C$DW$190 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AC3_G")
.dwattr $C$DW$190, DW_AT_location[DW_OP_reg11]
$C$DW$191 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T0")
.dwattr $C$DW$191, DW_AT_location[DW_OP_reg12]
$C$DW$192 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T1")
.dwattr $C$DW$192, DW_AT_location[DW_OP_reg13]
$C$DW$193 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T2")
.dwattr $C$DW$193, DW_AT_location[DW_OP_reg14]
$C$DW$194 .dwtag DW_TAG_TI_assign_register, DW_AT_name("T3")
.dwattr $C$DW$194, DW_AT_location[DW_OP_reg15]
$C$DW$195 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR0")
.dwattr $C$DW$195, DW_AT_location[DW_OP_reg16]
$C$DW$196 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR0")
.dwattr $C$DW$196, DW_AT_location[DW_OP_reg17]
$C$DW$197 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR1")
.dwattr $C$DW$197, DW_AT_location[DW_OP_reg18]
$C$DW$198 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR1")
.dwattr $C$DW$198, DW_AT_location[DW_OP_reg19]
$C$DW$199 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR2")
.dwattr $C$DW$199, DW_AT_location[DW_OP_reg20]
$C$DW$200 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR2")
.dwattr $C$DW$200, DW_AT_location[DW_OP_reg21]
$C$DW$201 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR3")
.dwattr $C$DW$201, DW_AT_location[DW_OP_reg22]
$C$DW$202 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR3")
.dwattr $C$DW$202, DW_AT_location[DW_OP_reg23]
$C$DW$203 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR4")
.dwattr $C$DW$203, DW_AT_location[DW_OP_reg24]
$C$DW$204 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR4")
.dwattr $C$DW$204, DW_AT_location[DW_OP_reg25]
$C$DW$205 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR5")
.dwattr $C$DW$205, DW_AT_location[DW_OP_reg26]
$C$DW$206 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR5")
.dwattr $C$DW$206, DW_AT_location[DW_OP_reg27]
$C$DW$207 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR6")
.dwattr $C$DW$207, DW_AT_location[DW_OP_reg28]
$C$DW$208 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR6")
.dwattr $C$DW$208, DW_AT_location[DW_OP_reg29]
$C$DW$209 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR7")
.dwattr $C$DW$209, DW_AT_location[DW_OP_reg30]
$C$DW$210 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XAR7")
.dwattr $C$DW$210, DW_AT_location[DW_OP_reg31]
$C$DW$211 .dwtag DW_TAG_TI_assign_register, DW_AT_name("FP")
.dwattr $C$DW$211, DW_AT_location[DW_OP_regx 0x20]
$C$DW$212 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XFP")
.dwattr $C$DW$212, DW_AT_location[DW_OP_regx 0x21]
$C$DW$213 .dwtag DW_TAG_TI_assign_register, DW_AT_name("PC")
.dwattr $C$DW$213, DW_AT_location[DW_OP_regx 0x22]
$C$DW$214 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SP")
.dwattr $C$DW$214, DW_AT_location[DW_OP_regx 0x23]
$C$DW$215 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XSP")
.dwattr $C$DW$215, DW_AT_location[DW_OP_regx 0x24]
$C$DW$216 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BKC")
.dwattr $C$DW$216, DW_AT_location[DW_OP_regx 0x25]
$C$DW$217 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BK03")
.dwattr $C$DW$217, DW_AT_location[DW_OP_regx 0x26]
$C$DW$218 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BK47")
.dwattr $C$DW$218, DW_AT_location[DW_OP_regx 0x27]
$C$DW$219 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST0")
.dwattr $C$DW$219, DW_AT_location[DW_OP_regx 0x28]
$C$DW$220 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST1")
.dwattr $C$DW$220, DW_AT_location[DW_OP_regx 0x29]
$C$DW$221 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST2")
.dwattr $C$DW$221, DW_AT_location[DW_OP_regx 0x2a]
$C$DW$222 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ST3")
.dwattr $C$DW$222, DW_AT_location[DW_OP_regx 0x2b]
$C$DW$223 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP")
.dwattr $C$DW$223, DW_AT_location[DW_OP_regx 0x2c]
$C$DW$224 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP05")
.dwattr $C$DW$224, DW_AT_location[DW_OP_regx 0x2d]
$C$DW$225 .dwtag DW_TAG_TI_assign_register, DW_AT_name("MDP67")
.dwattr $C$DW$225, DW_AT_location[DW_OP_regx 0x2e]
$C$DW$226 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRC0")
.dwattr $C$DW$226, DW_AT_location[DW_OP_regx 0x2f]
$C$DW$227 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA0")
.dwattr $C$DW$227, DW_AT_location[DW_OP_regx 0x30]
$C$DW$228 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA0_H")
.dwattr $C$DW$228, DW_AT_location[DW_OP_regx 0x31]
$C$DW$229 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA0")
.dwattr $C$DW$229, DW_AT_location[DW_OP_regx 0x32]
$C$DW$230 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA0_H")
.dwattr $C$DW$230, DW_AT_location[DW_OP_regx 0x33]
$C$DW$231 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRS1")
.dwattr $C$DW$231, DW_AT_location[DW_OP_regx 0x34]
$C$DW$232 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BRC1")
.dwattr $C$DW$232, DW_AT_location[DW_OP_regx 0x35]
$C$DW$233 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA1")
.dwattr $C$DW$233, DW_AT_location[DW_OP_regx 0x36]
$C$DW$234 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RSA1_H")
.dwattr $C$DW$234, DW_AT_location[DW_OP_regx 0x37]
$C$DW$235 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA1")
.dwattr $C$DW$235, DW_AT_location[DW_OP_regx 0x38]
$C$DW$236 .dwtag DW_TAG_TI_assign_register, DW_AT_name("REA1_H")
.dwattr $C$DW$236, DW_AT_location[DW_OP_regx 0x39]
$C$DW$237 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CSR")
.dwattr $C$DW$237, DW_AT_location[DW_OP_regx 0x3a]
$C$DW$238 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RPTC")
.dwattr $C$DW$238, DW_AT_location[DW_OP_regx 0x3b]
$C$DW$239 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CDP")
.dwattr $C$DW$239, DW_AT_location[DW_OP_regx 0x3c]
$C$DW$240 .dwtag DW_TAG_TI_assign_register, DW_AT_name("XCDP")
.dwattr $C$DW$240, DW_AT_location[DW_OP_regx 0x3d]
$C$DW$241 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TRN0")
.dwattr $C$DW$241, DW_AT_location[DW_OP_regx 0x3e]
$C$DW$242 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TRN1")
.dwattr $C$DW$242, DW_AT_location[DW_OP_regx 0x3f]
$C$DW$243 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA01")
.dwattr $C$DW$243, DW_AT_location[DW_OP_regx 0x40]
$C$DW$244 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA23")
.dwattr $C$DW$244, DW_AT_location[DW_OP_regx 0x41]
$C$DW$245 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA45")
.dwattr $C$DW$245, DW_AT_location[DW_OP_regx 0x42]
$C$DW$246 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSA67")
.dwattr $C$DW$246, DW_AT_location[DW_OP_regx 0x43]
$C$DW$247 .dwtag DW_TAG_TI_assign_register, DW_AT_name("BSAC")
.dwattr $C$DW$247, DW_AT_location[DW_OP_regx 0x44]
$C$DW$248 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CARRY")
.dwattr $C$DW$248, DW_AT_location[DW_OP_regx 0x45]
$C$DW$249 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TC1")
.dwattr $C$DW$249, DW_AT_location[DW_OP_regx 0x46]
$C$DW$250 .dwtag DW_TAG_TI_assign_register, DW_AT_name("TC2")
.dwattr $C$DW$250, DW_AT_location[DW_OP_regx 0x47]
$C$DW$251 .dwtag DW_TAG_TI_assign_register, DW_AT_name("M40")
.dwattr $C$DW$251, DW_AT_location[DW_OP_regx 0x48]
$C$DW$252 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SXMD")
.dwattr $C$DW$252, DW_AT_location[DW_OP_regx 0x49]
$C$DW$253 .dwtag DW_TAG_TI_assign_register, DW_AT_name("ARMS")
.dwattr $C$DW$253, DW_AT_location[DW_OP_regx 0x4a]
$C$DW$254 .dwtag DW_TAG_TI_assign_register, DW_AT_name("C54CM")
.dwattr $C$DW$254, DW_AT_location[DW_OP_regx 0x4b]
$C$DW$255 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SATA")
.dwattr $C$DW$255, DW_AT_location[DW_OP_regx 0x4c]
$C$DW$256 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SATD")
.dwattr $C$DW$256, DW_AT_location[DW_OP_regx 0x4d]
$C$DW$257 .dwtag DW_TAG_TI_assign_register, DW_AT_name("RDM")
.dwattr $C$DW$257, DW_AT_location[DW_OP_regx 0x4e]
$C$DW$258 .dwtag DW_TAG_TI_assign_register, DW_AT_name("FRCT")
.dwattr $C$DW$258, DW_AT_location[DW_OP_regx 0x4f]
$C$DW$259 .dwtag DW_TAG_TI_assign_register, DW_AT_name("SMUL")
.dwattr $C$DW$259, DW_AT_location[DW_OP_regx 0x50]
$C$DW$260 .dwtag DW_TAG_TI_assign_register, DW_AT_name("INTM")
.dwattr $C$DW$260, DW_AT_location[DW_OP_regx 0x51]
$C$DW$261 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR0LC")
.dwattr $C$DW$261, DW_AT_location[DW_OP_regx 0x52]
$C$DW$262 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR1LC")
.dwattr $C$DW$262, DW_AT_location[DW_OP_regx 0x53]
$C$DW$263 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR2LC")
.dwattr $C$DW$263, DW_AT_location[DW_OP_regx 0x54]
$C$DW$264 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR3LC")
.dwattr $C$DW$264, DW_AT_location[DW_OP_regx 0x55]
$C$DW$265 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR4LC")
.dwattr $C$DW$265, DW_AT_location[DW_OP_regx 0x56]
$C$DW$266 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR5LC")
.dwattr $C$DW$266, DW_AT_location[DW_OP_regx 0x57]
$C$DW$267 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR6LC")
.dwattr $C$DW$267, DW_AT_location[DW_OP_regx 0x58]
$C$DW$268 .dwtag DW_TAG_TI_assign_register, DW_AT_name("AR7LC")
.dwattr $C$DW$268, DW_AT_location[DW_OP_regx 0x59]
$C$DW$269 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CDPLC")
.dwattr $C$DW$269, DW_AT_location[DW_OP_regx 0x5a]
$C$DW$270 .dwtag DW_TAG_TI_assign_register, DW_AT_name("CIE_RETA")
.dwattr $C$DW$270, DW_AT_location[DW_OP_regx 0x5b]
.dwendtag $C$DW$CU
|
Dave/Algebra/Naturals/Exponentiation.agda | DavidStahl97/formal-proofs | 0 | 3349 | <filename>Dave/Algebra/Naturals/Exponentiation.agda
module Dave.Algebra.Naturals.Exponentiation where
open import Dave.Algebra.Naturals.Definition
open import Dave.Algebra.Naturals.Multiplication
open import Dave.Algebra.Naturals.Addition
_^_ : ℕ → ℕ → ℕ
a ^ zero = 1
a ^ suc b = (a ^ b) * a
infixl 8 _^_
^-distribₗ : ∀ (m n p : ℕ) → m ^ (n + p) ≡ (m ^ n) * (m ^ p)
^-distribₗ m zero p = refl
^-distribₗ m (suc n) p = begin
m ^ (suc n + p) ≡⟨⟩
m ^ suc (n + p) ≡⟨⟩
(m ^ (n + p)) * m ≡⟨ cong (λ a → a * m) (^-distribₗ m n p) ⟩
(m ^ n) * (m ^ p) * m ≡⟨ IsCommutativeMonoid.swap021 ℕ-*-IsCommutativeMonoid (m ^ n) (m ^ p) m ⟩
(m ^ n) * m * (m ^ p) ≡⟨⟩
(m ^ n) * (m ^ 1) * (m ^ p) ≡⟨ cong (λ a → a * (m ^ p)) (sym (^-distribₗ m n 1)) ⟩
(m ^ (n + 1)) * (m ^ p) ≡⟨ cong (λ a → (m ^ a) * (m ^ p)) (+-add1ᵣ n) ⟩
(m ^ suc n) * (m ^ p) ∎
^-distribᵣ : ∀ (m n p : ℕ) → (m * n) ^ p ≡ (m ^ p) * (n ^ p)
^-distribᵣ m n zero = refl
^-distribᵣ m n (suc p) = begin
(m * n) ^ suc p ≡⟨⟩
((m * n) ^ p) * (m * n) ≡⟨ cong (λ a → a * (m * n)) (^-distribᵣ m n p) ⟩
(m ^ p) * (n ^ p) * (m * n) ≡⟨ sym (IsSemigroup.assoc ℕ-*-IsSemigroup ((m ^ p) * (n ^ p)) m n) ⟩
(m ^ p) * (n ^ p) * m * n ≡⟨ cong (λ a → a * n) (IsCommutativeMonoid.swap021 ℕ-*-IsCommutativeMonoid (m ^ p) (n ^ p) m) ⟩
(m ^ p) * m * (n ^ p) * n ≡⟨ IsSemigroup.assoc ℕ-*-IsSemigroup ((m ^ p) * m) (n ^ p) n ⟩
(m ^ p) * m * ((n ^ p) * n) ≡⟨⟩
(m ^ p) * (m ^ 1) * ((n ^ p) * (n ^ 1)) ≡⟨ cong (λ a → a * ((n ^ p) * (n ^ 1))) (sym (^-distribₗ m p 1)) ⟩
(m ^ (p + 1)) * ((n ^ p) * (n ^ 1)) ≡⟨ cong (λ a → (m ^ a) * ((n ^ p) * (n ^ 1))) (+-add1ᵣ p) ⟩
(m ^ suc p) * ((n ^ p) * (n ^ 1)) ≡⟨ cong (λ a → (m ^ suc p) * a) (sym (^-distribₗ n p 1)) ⟩
(m ^ suc p) * (n ^ (p + 1)) ≡⟨ cong (λ a → (m ^ suc p) * (n ^ a)) (+-add1ᵣ p) ⟩
(m ^ suc p) * (n ^ suc p) ∎
^-*-assoc : ∀ (m n p : ℕ) → (m ^ n) ^ p ≡ m ^ (n * p)
^-*-assoc m n zero = sym (begin
m ^ (n * zero) ≡⟨ cong (λ a → m ^ a) (*-zero n) ⟩
1 ∎)
^-*-assoc m n (suc p) = begin
(m ^ n) ^ suc p ≡⟨⟩
(m ^ n) ^ p * (m ^ n) ≡⟨ cong (λ a → a * (m ^ n)) (^-*-assoc m n p) ⟩
m ^ (n * p) * (m ^ n) ≡⟨ sym (^-distribₗ m (n * p) n) ⟩
m ^ (n * p + n) ≡⟨ cong (λ a → m ^ a ) (sym (*-distrib1ᵣ-+ₗ n p)) ⟩
m ^ (n * (p + 1)) ≡⟨ cong (λ a → m ^ (n * a)) (+-add1ᵣ p) ⟩
m ^ (n * suc p) ∎ |
drivers/core/x64/src/start.asm | dbargatz/system | 1 | 24958 | <gh_stars>1-10
global start
global ist1_stack_top
global ist2_stack_top
global kernel_heap_bottom
global kernel_heap_top
global gdt64
extern core_entry
extern start_init_array
extern end_init_array
section .text
bits 32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Entry point to System. Any Multiboot-compliant bootloader will begin
;; executing code here, since the linker script places this code immediately
;; after the multiboot header. As such, this function must stay at the very top
;; of this file so the bootloader executes the start function first. When we
;; enter here, presuming the bootloader did its job, we have the following
;; conditions:
;; 1. In protected mode (32-bit)
;; 2. Paging is disabled
;; 3. A 32-bit GDT is loaded
;; 4. EAX contains the Multiboot magic value
;; 5. EBX contains the 32-bit physical address of the Multiboot info struct
start:
;; Set up the stack pointer.
mov esp, stack_top
;; By specification, the bootloader should have placed a 32-bit
;; pointer to the Multiboot information structure in EBX. This
;; information structure contains a wealth of platform info that
;; was determined by the bootloader, including a physical memory
;; map. We need to pass this into core_entry, but there are two
;; problems:
;; 1. We need to use EBX in the meantime.
;; 2. core_entry is 64-bit code, so it expects a 64-bit pointer.
;; The solution is to push 4 bytes (32 bits) of zeroes on the
;; stack followed by the 32-bit (4 byte) pointer in EBX, which
;; effectively creates a 64-bit pointer that has been extended
;; from the 32-bit pointer. In 64-bit mode, we'll pop the full 8
;; bytes (64 bits) off of the stack to pass to core_entry, so
;; it looks like a real 64-bit pointer.
push 0x00000000
push ebx
;; Perform the Multiboot check to ensure the kernel was started
;; from a Multiboot-compliant bootloader. This won't return if
;; the bootloader isn't Multiboot-compliant.
call check_multiboot
;; Perform the CPUID check - verify that the processor supports
;; the CPUID instruction. Since CPUID is needed to determine if
;; long mode is supported, we make this check before attempting
;; to check if long mode is supported.
call check_cpuid
;; Perform the long mode check - verify that the processor
;; supports long mode (64-bit). As the code for the kernel
;; is 64-bit, we need to enter long mode, but need to verify the
;; processor supports it before trying to enter long mode.
call check_long_mode
;; Verify and enable SSE so we can use floating-point arithmetic.
call enable_sse
;; Now that we've verified the processor supports long mode, we
;; need to set up the page tables before we can proceed.
call set_up_page_tables
;; The page tables are initialized and the first gibibyte of
;; memory is identity mapped, so enable paging and enter long
;; mode.
call enable_paging
;; At this point, we're in long mode, but we're in the 32-bit
;; submode of long mode called "compatibility mode". This means
;; we still can't use 64-bit instructions. Thanks to legacy cruft
;; from the x86 architecture, we need to set up a Global Descriptor
;; Table (GDT), which was used for segmentation in the past. Our
;; Multiboot-compliant bootloader set up a 32-bit GDT for us before
;; it handed off control to the start function, but we need to
;; setup and transition to a 64-bit GDT. We use the lgdt instruction
;; to load the GDT into the processor, providing it with the special
;; GDT pointer structure (described below in the .rodata section,
;; where the GDT is defined).
lgdt[gdt64.pointer]
;; We're still not quite into 64-bit long mode; the segment selector
;; registers are still pointing at GDT entries from the 32-bit GDT
;; set up by the bootloader. We need to point the stack, data, and
;; extra selector registers to the data segment entry in the 64-bit
;; GDT. We can't load the code selector (cs) the same way - we'll
;; handle that after we load the data segment entry into ss, ds, and
;; es.
mov ax, gdt64.ring0_data
mov ss, ax
mov ds, ax
mov es, ax
;; To (finally!) move into 64-bit long mode, we need to perform a far
;; jump into 64-bit code; this will load the code selector (cs)
;; register with the proper code segment entry in the GDT, since (as
;; mentioned above), we can't just load cs with an arbitrary memory
;; address. When this jump completes, we'll be in 64-bit long mode!
jmp gdt64.ring0_code:long_mode_start
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
bits 64
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; The first 64-bit function called during kernel startup. The start
;; label in start.asm will perform a far jump to this function in
;; order to load the code selector (cs) register with the 64-bit Global
;; Descriptor Table (GDT) entry for the code segment, and place the
;; processor into 64-bit long mode (rather than long mode's compatibility
;; submode).
long_mode_start:
mov rbx, start_init_array
jmp .call_ctors_loop
.call_ctor:
call [rbx]
add rbx, 8
.call_ctors_loop:
cmp rbx, end_init_array
jb .call_ctor
;; Pop the Multiboot 2 information structure off the stack into RDI. By x64
;; calling convention, RDI receives the first argument to a function call;
;; as the only argument to core_entry is the Multiboot 2 info struct, we
;; pass it via RDI.
pop rdi
;; Load RAX with the address of core_entry and call it!
lea rax, [core_entry]
call rax
;; Halt the processor.
hlt
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
bits 32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Prints `ERR: ` and the given error code to the screen and hangs.
;; Parameter: error code (in ASCII) in AL
print32:
mov dword [0xb8000], 0x4F524F45
mov dword [0xb8004], 0x4F3A4F52
mov dword [0xb8008], 0x4F204F20
mov byte [0xb800a], al
hlt
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Verifies that the kernel was loaded by a multiboot-compliant
;; bootloader via the initial value placed in EAX by the bootloader.
;; Prints error "0" and hangs if the bootloader wasn't multiboot
;; compliant.
check_multiboot:
cmp eax, 0x36D76289
jne .no_multiboot
ret
.no_multiboot:
mov al, "0"
jmp print32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Verifies that the processor supports the CPUID instruction. If it
;; doesn't, prints error "1" and hangs.
check_cpuid:
;; Copy the FLAGS register into EAX via the stack.
pushfd
pop eax
;; Copy the FLAGS register to ECX as well for comparing later.
mov ecx, eax
;; Flip the "CPU ID supported" flag (bit 21).
xor eax, 1 << 21
;; Copy EAX to the FLAGS register via the stack again.
push eax
popfd
;; Copy the FLAGS register back into EAX - the "CPU ID supported"
;; bit will still be 1 if the CPUID instruction is supported. If
;; it isn't supported, then the 21st bit will be reset to 0,
;; indicating the CPUID isn't supported.
pushfd
pop eax
;; Reset the FLAGS register back to its original state, before the
;; 21st bit was set to 1.
push ecx
popfd
;; Compare ECX and EAX. If they're the same - that is, the 21st bit
;; for "CPU ID supported" is 0 - then CPUID isn't a supported
;; instruction. If the bit is 1, then CPUID is supported. If it
;; isn't supported, indicate error "1".
cmp eax, ecx
je .no_cpuid
ret
.no_cpuid:
mov al, "1"
jmp print32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Verifies that the processor supports long mode (64-bit). This function
;; relies on the CPUID instruction, so check_cpuid should be called
;; before this function is called. Prints error "2" and hangs if long
;; mode isn't supported.
check_long_mode:
;; CPUID works by taking a parameter via EAX and returning values
;; in various registers (depending on the parameter provided).
;; As the long mode bit is considered extended processor info,
;; we first need to verify that the CPUID instruction on this
;; processor even supports extended processor info. To do so, we pass
;; 0x80000000 to CPUID, which will return the highest set of extended
;; info supported by the processor. Since the long mode bit is
;; in the first "set" of extended processor attributes (the set
;; identified by 0x80000001 in EAX), we need to verify the value
;; returned by CPUID is at least 0x80000001. If the processor doesn't
;; support extended processor info of at least set 0x80000001, it
;; doesn't support long mode, so error out.
mov eax, 0x80000000
cpuid
cmp eax, 0x80000001
jb .no_long_mode
;; At this point, we know the processor supports extended processor
;; info. If we invoke CPUID with 0x80000001 in EAX, various info and
;; feature bits for the processor will be returned in ECX and EDX.
;; The long mode supported bit is bit 29 of the value returned in
;; EDX; if this bit is set in EDX, then long mode is supported and
;; we can continue the boot process. If the bit isn't set, long mode
;; isn't supported, so error out.
mov eax, 0x80000001
cpuid
test edx, 1 << 29
jz .no_long_mode
ret
.no_long_mode:
mov al, "2"
jmp print32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Identity maps the first gigibyte (1GiB) of memory, meaning the first
;; gibibyte of virtual addresses map to the first gibibyte of physical
;; addresses. It does so using 512 2MiB huge pages, meaning only the
;; first entry of the P4 and P3 tables are valid, and there is a single
;; P2 table that identity maps the first 512 2MiB pages. This memory is
;; only accessible from ring 0 (supervisor mode); ring 3 (user mode)
;; code must have appropriate page tables created for them.
set_up_page_tables:
;; Initialize the first entry of the P4 table to contain the physical
;; address of the first (and only) P3 table. Note that the entry in
;; the P4 table for the P3 table has marked the P3 table's page as
;; present, user-inaccessible, and writeable, as indicated by the
;; ORing of EAX with 0b011.
mov eax, p3_table
or eax, 0b011
mov [p4_table], eax
;; Initialize the first entry of the P3 table to contain the physical
;; address of the first (and only) P2 table. Note that the entry in
;; the P3 table for the P2 table has marked the P2 table's page as
;; present, user-inaccessible and writeable, as indicated by the
;; ORing of EAX with 0b011.
mov eax, p2_table
or eax, 0b011
mov [p3_table], eax
;; Initialize the counter for the loop below. ECX contains the
;; entry number in the P2 table we're currently on in the loop.
mov ecx, 0
;; This loop identity maps the first 512 2MiB pages so that the
;; virtual address and physical address are the same number.
.map_p2_table:
;; Put 2MiB in EAX.
mov eax, 0x200000
;; Multiply EAX (which contains 2MiB) by ECX, and store the result
;; in EAX. EAX now contains the physical starting address of the
;; 2MiB page the current entry in the P2 table should point at.
mul ecx
;; Mark the entry as present, user-inaccessible, writeable, and
;; huge. While EAX does contain the physical starting address of
;; the page, the bottom 12 bits of the address are used as flag
;; bits for the entry. Setting the huge bit is what marks the page
;; as 2MiB - since this entry is in the P2 table, the huge bit
;; indicates the page should be 2MiB.
or eax, 0b10000011
;; Put the address/entry we computed in EAX into the P2 table at
;; the proper location. ECX contains the current entry we're
;; looking at in this loop iteration, 8 is the number of bytes each
;; entry is, so ECX * 8 is the address of the entry in P2.
mov [p2_table + ecx *8], eax
;; Increment ECX to move onto the next entry in the P2 table. If
;; ECX is now 512, the whole P2 table is mapped, so don't continue
;; looping - just return.
inc ecx
cmp ecx, 512
jne .map_p2_table
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Turns paging on by loading the P4 table's address into CR3, enabling
;; PAE via the CR4 register, setting the long mode bit in the EFER
;; Model-Specific Register (MSR), and turning paging on via the paging
;; bit in CR0.
enable_paging:
;; Load the address of the P4 table into CR3. CR3 can only be
;; loaded via a register, so we put the address of the P4 table
;; into EAX before loading it into CR3. On Intel processors, CR3 is
;; the control register containing the address of the top-level
;; page table, so CR3 must contain P4's address to properly do
;; virtual-to-physical address translation.
mov eax, p4_table
mov cr3, eax
;; Physical Address Extensions (PAE) needs to be enabled for long
;; mode paging to be enabled, since long mode is technically an
;; extension to PAE. The PAE bit is the 5th bit in the CR4
;; register, so manipulate CR4 via EAX to turn on PAE.
mov eax, cr4
or eax, 1 << 5
mov cr4, eax
;; The long mode bit lives in a Model Specific Register (MSR) called
;; the Extended Feature Enable Register (EFER). Its identifier is
;; 0xC0000080. Using the rdmsr instruction, a MSR can be read into
;; EDX:EAX based on the MSR identifier specified in ECX. The long
;; mode bit is the 9th bit in the EFER, and NXE (which enables no-
;; execute capabilities on the processor) is the 12th bit, so set
;; them and write the byte back into the EFER via the wrmsr
;; instruction.
mov ecx, 0xC0000080
rdmsr
or eax, 1 << 8
or eax, 1 << 11
wrmsr
;; The paging bit, the bit that enables paging in the processor so it
;; can operate in long mode, is the final bit we need to set before
;; we are in long mode. It's the 31st bit in the CR0 register, so
;; just like with enabling PAE, we set the bit via EAX and put it
;; back into CR0.
mov eax, cr0
or eax, 1 << 31
mov cr0, eax
;; At this point, we're in long mode, but in compatibility mode of
;; long mode.
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Verifies the minimum level of SSE support (SSE3) and enables SSE. Note
;; that once SSE is enabled, code is capable of using floating-point
;; (IEEE754) arithmetic, but can also cause numeric/floating-point
;; exceptions. See Intel Software Developer's Manual Volume 3A, May
;; 2020, page 6-52: Interrupt 19 for more information. If SSE is not
;; supported, prints error "3" and hangs.
enable_sse:
;; All the SSE support bits are in CPUID page 1.
mov eax, 1
cpuid
;; Ensure SSE is supported (EDX bit 25).
test edx, 1 << 25
jz .no_sse
;; Ensure SSE2 is supported (EDX bit 26).
test edx, 1 << 26
jz .no_sse
;; Clear CR0.EM (coprocessor emulation, bit 2) and set CR0.MP (coprocessor
;; monitoring, bit 1).
mov eax, cr0
and eax, ~(1 << 2)
or eax, 1 << 1
mov cr0, eax
;; Set CR4.OSFXSR (OS supports FXSAVE/FXRSTOR, bit 9) and CR4.OSXMMEXCPT
;; (OS supports unmasked SSE exceptions, bit 10).
mov eax, cr4
or eax, 1 << 9
or eax, 1 << 10
mov cr4, eax
ret
.no_sse:
mov al, "3"
jmp print32
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
section .bss
align 4096
;; Reserved space for the P4 page table (in Intel parlance, the Page-Map
;; Level-4 Table [PML4]). The 4096-byte reservation allows for a 512-
;; entry table, with each entry being 8 bytes. Each entry points to an
;; entire P3 table. This is the top-level page table, and the address of
;; this table in memory will be placed in register CR3.
p4_table:
resb 4096
;; Reserved space for the P3 page table (in Intel parlance, the Page-
;; Directory Pointer Table [PDP]). The 4096-byte reservation allows for
;; a 512-entry table, with each entry being 8 bytes. Each entry points
;; to an entire P2 table.
p3_table:
resb 4096
;; Reserved space for the P2 page table (in Intel parlance, the Page-
;; Directory Table [PD]). The 4096-byte reservation allows for a 512-
;; entry table, with each entry being 8 bytes. Each entry contains the
;; physical address of a 2MiB page in memory. If we were using 4Kb pages,
;; there would be a P1 Page Table level, but since we're using 2MiB huge
;; pages, P2 is the last level in the page hierarchy.
p2_table:
resb 4096
;; The initial stack for the functions in the boot code. Only 32 kilobytes,
;; but not much is needed - these functions don't have deep call trees,
;; nor do they push/pop much for local variables, other than text objects for
;; log messages.
stack_bottom:
resb 32768
stack_top:
;; Known-good stack, only used for PANIC/ASSERT calls and loaded into the TSS
;; as Interrupt Stack Table (IST) 1. This can be shallow as it should only be
;; switched to when a PANIC/ASSERT or undefined opcode (as a side effect of the
;; PANIC/ASSERT implementation) occurs.
ist1_stack_bottom:
resb 2048
ist1_stack_top:
;; Known-good stack, only used for unhandled interrupt vectors and loaded into
;; the TSS as Interrupt Stack Table (IST) 2. This can be shallow as it should
;; only be switched to when an unhandled interrupt vector is triggered.
ist2_stack_bottom:
resb 2048
ist2_stack_top:
;; TODO
kernel_heap_bottom:
resb 131070
kernel_heap_top:
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
section .rodata
;; TODO: Update this comment for usermode
;; The 64-bit Global Descriptor Table (GDT), to be loaded into the
;; processor via the lgdt instruction after we've entered long mode. Each
;; GDT entry is 64 bits, and there are three minimum required entries for
;; the GDT. The first entry is the null entry - it's 64 bits of zeroes.
;; The second entry is for the code segment, which has the read/write
;; bit, the executable bit, the descriptor type bit, the present bit,
;; and the 64-bit code segment bit all set to 1. The third entry is for
;; the data segment, and it has the read/write bit, the descriptor type
;; bit, and the present bit set to 1. These bits are all that's required,
;; as the GDT isn't really used in long mode; rather, the base and limit
;; fields of each entry are set to 0, meaning each entry (representing
;; a memory segment) spans ALL of memory. Therefore, all of memory is
;; in both the data segment and the code segment.
;; NOTE: While the RW bit is set for the code segment, it's a bit of a
;; misnomer - really, it means that the segment is readable, but is
;; never writeable, as it's a code segment. Data segments, on the other
;; hand, are always readable - setting the RW bit means the segment is
;; writeable.
gdt64:
.null_1: equ $-gdt64 ; first entry in GDT must always be NULL.
dq 0
.ring0_code: equ $-gdt64
;; 64b cs present priv level desctype exec r/w accessed
dq (1<<53) | (1<<47) | (1<<44) | (1<<43) | (1<<41)
.ring0_data: equ $-gdt64
dq (1<<47) | (1<<44) | (1<<41)
.null_2: equ $-gdt64 ; required for syscall/sysret implementation; IA32_STAR MSR has a weird format.
dq 0
.ring3_data: equ $-gdt64
dq (1<<47) | (3 << 45) | (1<<44) | (1<<41)
.ring3_code: equ $-gdt64
;; 64b cs present priv level desctype exec r/w
dq (1<<53) | (1<<47) | (3 << 45) | (1<<44) | (1<<43) | (1<<41)
.tss: equ $-gdt64 ; NOTE: 64-bit TSS descriptor is 16 bytes
dq 0
dq 0
;; The GDT pointer is a special data structure expected by the lgdt
;; instruction. This structure contains the length of the GDT in bytes
;; as the first word (2 bytes), and the next 8 bytes specify the actual
;; address of the GDT in memory.
.pointer:
dw $ - gdt64 - 1
dq gdt64
|
resources/scripts/archive/archivetoday.ads | VK9D/AttackSurfaceMappingTool | 0 | 11201 | <reponame>VK9D/AttackSurfaceMappingTool<filename>resources/scripts/archive/archivetoday.ads<gh_stars>0
-- Copyright 2017 <NAME>. All rights reserved.
-- Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
name = "ArchiveToday"
type = "archive"
function start()
setratelimit(5)
end
function vertical(ctx, domain)
scrape(ctx, buildurl(domain))
end
function buildurl(domain)
return "http://archive.is/*." .. domain
end
|
programs/oeis/258/A258935.asm | jmorken/loda | 1 | 11336 | <filename>programs/oeis/258/A258935.asm
; A258935: Independence number of Keller graphs.
; 4,5,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296,8589934592
mov $1,2
pow $1,$0
lpb $0
mov $0,1
mul $1,2
sub $1,3
lpe
add $1,3
|
Kernel/asm/libasm.asm | imanfredi/TP2-SO | 0 | 27512 | GLOBAL cpuVendor
GLOBAL _temperature
GLOBAL cpuModel
GLOBAL getInitialSP
GLOBAL callTimerTick
GLOBAL _xchg
section .text
cpuVendor:
push rbp
mov rbp, rsp
push rbx
push rcx
push rdx
mov rax, 0
cpuid
mov [rdi], ebx
mov [rdi + 4], edx
mov [rdi + 8], ecx
mov byte [rdi+12], 0
mov rax, rdi
pop rdx
pop rcx
pop rbx
mov rsp, rbp
pop rbp
ret
cpuModel:
push rbp
mov rbp,rsp
push rbx
push rcx
push rdx
mov rax,1
cpuid
shr rax,4
and eax,0xFF
pop rbx
pop rcx
pop rdx
mov rsp,rbp
pop rbp
ret
;Esta implementacion para conocer la temperatura del procesador es en particular para los procesadores de intel
_temperature:
push rbp
mov rbp,rsp
push rcx
push rdx
mov ecx,0x19C ; valor que corresponde a IA-32-THERM-STATUS
rdmsr ; en eax tengo los primero 32 bits que necesito
mov edx,eax
AND edx, 0x007F0000 ; en los bit (16-22) tengo la diferencia entre la temperatura actual y el target.
mov ecx,0X1A2 ;valor que corresponde a MSR_TEMP_TARGET
rdmsr ; en eax tengo los primero 32 bits que necesito
AND eax,0x00FF0000; en los bit (16-23) tengo el target
sub eax,edx; Target-tempActual = diferencia ---> tempActual=target - diferencia
shr eax,16 ;realizo shifteo para acomodar el numero
pop rdx
pop rcx
leave
ret
getInitialSP:
mov rax,rsp
add rax,8
ret
callTimerTick:
int 20h
ret
_xchg:
mov rax,rsi
xchg [rdi],eax
ret |
programs/oeis/155/A155096.asm | jmorken/loda | 1 | 98992 | <gh_stars>1-10
; A155096: Numbers k such that k^2 == -1 (mod 29).
; 12,17,41,46,70,75,99,104,128,133,157,162,186,191,215,220,244,249,273,278,302,307,331,336,360,365,389,394,418,423,447,452,476,481,505,510,534,539,563,568,592,597,621,626,650,655,679,684,708,713,737,742,766,771,795,800,824,829,853,858,882,887,911,916,940,945,969,974,998,1003,1027,1032,1056,1061,1085,1090,1114,1119,1143,1148,1172,1177,1201,1206,1230,1235,1259,1264,1288,1293,1317,1322,1346,1351,1375,1380,1404,1409,1433,1438,1462,1467,1491,1496,1520,1525,1549,1554,1578,1583,1607,1612,1636,1641,1665,1670,1694,1699,1723,1728,1752,1757,1781,1786,1810,1815,1839,1844,1868,1873,1897,1902,1926,1931,1955,1960,1984,1989,2013,2018,2042,2047,2071,2076,2100,2105,2129,2134,2158,2163,2187,2192,2216,2221,2245,2250,2274,2279,2303,2308,2332,2337,2361,2366,2390,2395,2419,2424,2448,2453,2477,2482,2506,2511,2535,2540,2564,2569,2593,2598,2622,2627,2651,2656,2680,2685,2709,2714,2738,2743,2767,2772,2796,2801,2825,2830,2854,2859,2883,2888,2912,2917,2941,2946,2970,2975,2999,3004,3028,3033,3057,3062,3086,3091,3115,3120,3144,3149,3173,3178,3202,3207,3231,3236,3260,3265,3289,3294,3318,3323,3347,3352,3376,3381,3405,3410,3434,3439,3463,3468,3492,3497,3521,3526,3550,3555,3579,3584,3608,3613
mov $2,$0
add $0,1
lpb $0
sub $0,1
trn $0,1
add $1,7
add $3,2
mov $4,4
add $4,$3
add $4,4
add $1,$4
sub $3,$3
add $3,2
lpe
add $1,2
lpb $2
add $1,5
sub $2,1
lpe
sub $1,7
|
alloy4fun_models/trashltl/models/9/4woBFcKXZrqCSvmaB.als | Kaixi26/org.alloytools.alloy | 0 | 40 | open main
pred id4woBFcKXZrqCSvmaB_prop10 {
always all f: File | always f in Protected since f in Protected
}
pred __repair { id4woBFcKXZrqCSvmaB_prop10 }
check __repair { id4woBFcKXZrqCSvmaB_prop10 <=> prop10o } |
os/src/os002/boot/setup.asm | ddosakura/pet-shop | 0 | 242364 | %include 'config.inc'
%include 'pm.inc'
%include 'macro.inc'
offset equ 0
org offset
[BITS 16]
mov ax, cs
mov ds, ax
mov es, ax
mov ss, ax
mov sp, offset
; 设置回跳段地址
mov [LABEL_GO_BACK_TO_REAL+3], ax
jmp go_to_protect
;mov al, 0x13 ; 显示器模式
;mov ah, 0x00 ; BIOS中断-设置显示器模式
mov ax, 0x0013
int 0x10 ; BIOS中断
mov BYTE [VMODE], 8 ; 记录画面模式
mov WORD [SCRNX], 320
mov WORD [SCRNY], 200
mov DWORD [VRAM], 0x000a0000
; 取得键盘LED指示灯状态
mov ah, 0x02
int 0x16
mov [LEDS], al
go_to_protect:
; 进入保护模式
; 1. 准备 GDT (Global Descriptor Table 全局描述表)
; 用 lgdt指令 加载 gdtr寄存器
; 2. 关中断
; 打开 A20 （有多种方法）
; 3. 置 cr0 的 PE 位为 1
; 4. jmp
mov [SPValueInRealMode], sp
; 初始化 16 位代码段描述符
InitGDT LABEL_SEG_CODE16, LABEL_DESC_CODE16
; 初始化 32 位代码段描述符
InitGDT LABEL_SEG_CODE32, LABEL_DESC_CODE32
; 初始化测试调用门的32位代码段描述符
InitGDT LABEL_SEG_CODE_DEST, LABEL_DESC_CODE_DEST
; 初始化Ring3描述符
InitGDT LABEL_CODE_RING3, LABEL_DESC_CODE_RING3
; 初始化数据段描述符
InitGDT LABEL_DATA, LABEL_DESC_DATA
; 初始化堆栈段描述符
InitGDT LABEL_STACK, LABEL_DESC_STACK
; 初始化堆栈段描述符(ring3)
InitGDT LABEL_STACK3, LABEL_DESC_STACK3
; 初始化 TSS 描述符
InitGDT LABEL_TSS, LABEL_DESC_TSS
; 初始化 LDT 在 GDT 中的描述符
InitGDT LABEL_LDT, LABEL_DESC_LDT
; 初始化 LDT 中的描述符
InitGDT LABEL_CODE_A, LABEL_LDT_DESC_CODEA
; 为加载 GDTR 作准备 & 加载 GDTR & 关中断 & 打开 A20
LoadGDT LABEL_GDT, GdtPtr
EnableA20
; 准备切换到保护模式
mov eax, cr0
;and eax, 0x7fffffff ; 禁止分页(貌似默认就是禁止的)
or eax, 1 ; 保护模式开关
mov cr0, eax
; 进入保护模式
jmp dword SelectorCode32:0
; 从保护模式跳回到实模式就到了这里
LABEL_REAL_ENTRY:
mov ax, cs
mov ds, ax
mov es, ax
mov ss, ax
mov sp, [SPValueInRealMode]
DisableA20
LoopHLT
; 32 位代码段. 由实模式跳入.
[BITS 32]
LABEL_SEG_CODE32:
;jmp test_videoX
mov ax, SelectorData
mov ds, ax ; 数据段选择子
mov ax, SelectorTest
mov es, ax ; 测试段选择子
mov ax, SelectorVideo
mov gs, ax ; 视频段选择子
mov ax, SelectorStack
mov ss, ax ; 堆栈段选择子
mov esp, TopOfStack
; 下面显示一个字符串
mov ah, 0Ch ; 0000: 黑底 1100: 红字
xor esi, esi
xor edi, edi
mov esi, OffsetPMMessage ; 源数据偏移
mov edi, (80 * 10 + 0) * 2 ; 目的数据偏移。屏幕第 10 行, 第 0 列。
cld
.1:
lodsb
test al, al
jz .2
mov [gs:edi], ax
add edi, 2
jmp .1
.2: ; 显示完毕
call DispReturn
call TestRead
call TestWrite
call TestRead
; Load TSS
mov ax, SelectorTSS
ltr ax ; 在任务内发生特权级变换时要切换堆栈，而内层堆栈的指针存放在当前任务的TSS中，所以要设置任务状态段寄存器 TR
push SelectorStack3 ; 栈选择子
push TopOfStack3 ; 栈指针
push SelectorCodeRing3 ; 目标代码段
push 0
retf ; Ring0 -> Ring3
; 到此停止
; jmp SelectorCode16:0
TestRead:
xor esi, esi
mov ecx, 8
.loop:
mov al, [es:esi]
call DispAL
inc esi
loop .loop
call DispReturn
ret
TestWrite:
push esi
push edi
xor esi, esi
xor edi, edi
mov esi, OffsetStrTest ; 源数据偏移
cld
.1:
lodsb
test al, al
jz .2
mov [es:edi], al
inc edi
jmp .1
.2:
pop edi
pop esi
ret
DispAL:
push ecx
push edx
mov ah, 0Ch ; 0000: 黑底 1100: 红字
mov dl, al
shr al, 4
mov ecx, 2
.begin:
and al, 01111b
cmp al, 9
ja .1
add al, '0'
jmp .2
.1:
sub al, 0Ah
add al, 'A'
.2:
mov [gs:edi], ax
add edi, 2
mov al, dl
loop .begin
add edi, 2
pop edx
pop ecx
ret
DispReturn:
push eax
push ebx
mov eax, edi
mov bl, 160
div bl
and eax, 0FFh
inc eax
mov bl, 160
mul bl
mov edi, eax
pop ebx
pop eax
ret
test_videoX:
mov ax, SelectorVideoX
mov gs, ax
mov edi, 0x0
mov al, 0xf
print_loop:
mov [gs:edi], al
inc edi
cmp edi, 0x10000
jne print_loop
fin:
hlt
jmp fin
SegCode32Len equ $ - LABEL_SEG_CODE32
; 调用门目标段
[BITS 32]
LABEL_SEG_CODE_DEST:
printC 14, 0, 'C'
;retf
; Load LDT
mov ax, SelectorLDT
lldt ax
jmp SelectorLDTCodeA:0 ; 跳入局部任务 L
SegCodeDestLen equ $ - LABEL_SEG_CODE_DEST
; CodeRing3
ALIGN 32
[BITS 32]
LABEL_CODE_RING3:
printC 15, 0, '3'
; 测试调用门（有特权级变换）
call SelectorCallGateTest:0
; = call SelectorCodeDest:0
jmp $
SegCodeRing3Len equ $ - LABEL_CODE_RING3
; 16 位代码段. 由 32 位代码段跳入, 跳出后到实模式
ALIGN 32
[BITS 16]
LABEL_SEG_CODE16:
; 跳回实模式:
mov ax, SelectorNormal
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov eax, cr0
and al, 11111110b
mov cr0, eax
LABEL_GO_BACK_TO_REAL:
; 段地址会在程序开始处被设置成正确的值
jmp 0:LABEL_REAL_ENTRY
Code16Len equ $-LABEL_SEG_CODE16
%include "gdt.inc"
; LDT
ALIGN 32
[BITS 16]
; 段基址 段界限 属性
LABEL_LDT:
; Code, 32 位
LABEL_LDT_DESC_CODEA: Descriptor 0, CodeALen - 1, DA_C + DA_32
LDTLen equ $-LABEL_LDT
; LDT 选择子
SelectorLDTCodeA equ LABEL_LDT_DESC_CODEA - LABEL_LDT + SA_TIL
; CodeA (LDT, 32 位代码段)
ALIGN 32
[BITS 32]
LABEL_CODE_A:
printC 13, 0, 'L'
; 准备经由16位代码段跳回实模式
jmp SelectorCode16:0
CodeALen equ $-LABEL_CODE_A
|
src/generated/fov_h.ads | csb6/libtcod-ada | 0 | 27640 | pragma Ada_2012;
pragma Style_Checks (Off);
with Interfaces.C; use Interfaces.C;
with fov_types_h;
with Interfaces.C.Extensions;
with error_h;
package fov_h is
-- BSD 3-Clause License
-- *
-- * Copyright © 2008-2021, Jice and the libtcod contributors.
-- * All rights reserved.
-- *
-- * Redistribution and use in source and binary forms, with or without
-- * modification, are permitted provided that the following conditions are met:
-- *
-- * 1. Redistributions of source code must retain the above copyright notice,
-- * this list of conditions and the following disclaimer.
-- *
-- * 2. Redistributions in binary form must reproduce the above copyright notice,
-- * this list of conditions and the following disclaimer in the documentation
-- * and/or other materials provided with the distribution.
-- *
-- * 3. Neither the name of the copyright holder nor the names of its
-- * contributors may be used to endorse or promote products derived from
-- * this software without specific prior written permission.
-- *
-- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
-- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- * POSSIBILITY OF SUCH DAMAGE.
--
--*
-- Return a new TCOD_Map with `width` and `height`.
--
function TCOD_map_new (arg1 : int; arg2 : int) return access fov_types_h.TCOD_Map -- fov.h:49
with Import => True,
Convention => C,
External_Name => "TCOD_map_new";
--*
-- Set all cell values on `map` to the given parameters.
-- This call also zeroes out the field-of-view attribute.
--
procedure TCOD_map_clear
(map : access fov_types_h.TCOD_Map;
transparent : Extensions.bool;
walkable : Extensions.bool) -- fov.h:55
with Import => True,
Convention => C,
External_Name => "TCOD_map_clear";
--*
-- Clone map data from `source` to `dest`.
-- `dest` will be resized to match `source` if necessary.
--
function TCOD_map_copy (source : access constant fov_types_h.TCOD_Map; dest : access fov_types_h.TCOD_Map) return error_h.TCOD_Error -- fov.h:61
with Import => True,
Convention => C,
External_Name => "TCOD_map_copy";
--*
-- Change the properties of a single cell.
--
procedure TCOD_map_set_properties
(map : access fov_types_h.TCOD_Map;
x : int;
y : int;
is_transparent : Extensions.bool;
is_walkable : Extensions.bool) -- fov.h:65
with Import => True,
Convention => C,
External_Name => "TCOD_map_set_properties";
--*
-- Free a TCOD_Map object.
--
procedure TCOD_map_delete (map : access fov_types_h.TCOD_Map) -- fov.h:69
with Import => True,
Convention => C,
External_Name => "TCOD_map_delete";
--*
-- Calculate the field-of-view.
-- \rst
-- `pov_x` and `pov_y` are the used as the field-of-view source.
-- These coordinates must be within the map.
-- `max_radius` is the maximum distance for the field-of-view algorithm.
-- If `light_walls` is false then only transparent cells will be touched by
-- the field-of-view.
-- `algo` is one of the :any:`TCOD_fov_algorithm_t` algorithms.
-- After this call you may check if a cell is within the field-of-view by
-- calling :any:`TCOD_map_is_in_fov`.
-- Returns an error code on failure. See :any:`TCOD_get_error` for details.
-- \endrst
--
function TCOD_map_compute_fov
(map : access fov_types_h.TCOD_Map;
pov_x : int;
pov_y : int;
max_radius : int;
light_walls : Extensions.bool;
algo : fov_types_h.TCOD_fov_algorithm_t) return error_h.TCOD_Error -- fov.h:90
with Import => True,
Convention => C,
External_Name => "TCOD_map_compute_fov";
--*
-- Return true if this cell was touched by the current field-of-view.
--
function TCOD_map_is_in_fov
(map : access constant fov_types_h.TCOD_Map;
x : int;
y : int) return Extensions.bool -- fov.h:95
with Import => True,
Convention => C,
External_Name => "TCOD_map_is_in_fov";
--*
-- Set the fov flag on a specific cell.
--
procedure TCOD_map_set_in_fov
(map : access fov_types_h.TCOD_Map;
x : int;
y : int;
fov : Extensions.bool) -- fov.h:99
with Import => True,
Convention => C,
External_Name => "TCOD_map_set_in_fov";
--*
-- Return true if this cell is transparent.
--
function TCOD_map_is_transparent
(map : access constant fov_types_h.TCOD_Map;
x : int;
y : int) return Extensions.bool -- fov.h:103
with Import => True,
Convention => C,
External_Name => "TCOD_map_is_transparent";
--*
-- Return true if this cell is walkable.
--
function TCOD_map_is_walkable
(map : access fov_types_h.TCOD_Map;
x : int;
y : int) return Extensions.bool -- fov.h:107
with Import => True,
Convention => C,
External_Name => "TCOD_map_is_walkable";
--*
-- Return the width of `map`.
--
function TCOD_map_get_width (map : access constant fov_types_h.TCOD_Map) return int -- fov.h:111
with Import => True,
Convention => C,
External_Name => "TCOD_map_get_width";
--*
-- Return the height of `map`.
--
function TCOD_map_get_height (map : access constant fov_types_h.TCOD_Map) return int -- fov.h:115
with Import => True,
Convention => C,
External_Name => "TCOD_map_get_height";
--*
-- Return the total number of cells in `map`.
--
function TCOD_map_get_nb_cells (map : access constant fov_types_h.TCOD_Map) return int -- fov.h:119
with Import => True,
Convention => C,
External_Name => "TCOD_map_get_nb_cells";
-- extern "C"
-- namespace tcod
end fov_h;
|
test/Succeed/Issue1764.agda | cruhland/agda | 1,989 | 17370 | <reponame>cruhland/agda<filename>test/Succeed/Issue1764.agda
-- Andreas, 2016-01-08 allow --type-in-type with universe polymorphism
{-# OPTIONS --type-in-type #-}
-- {-# OPTIONS --v tc:30 #-}
-- {-# OPTIONS --v tc.conv.level:60 #-}
open import Common.Level
open import Common.Equality
Type : Set
Type = Set
data E α β : Set β where
e : Set α → E α β
data D {α} (A : Set α) : Set where
d : A → D A
-- Make sure we do not get unsolved level metas
id : ∀{a}{A : Set a} → A → A
id x = x
test = id Set
data Unit : Set where
unit : Unit
test1 = id unit
data UnitP {α} : Set α where
unitP : UnitP
test2 = id unitP
-- All levels are equal
-- (need not be for --type-in-type, but this is how it is implemented):
level0≡1 : lzero ≡ lsuc lzero
level0≡1 = refl
levelTrivial : ∀{a b : Level} → a ≡ b
levelTrivial = refl
|
src/platform/win32/init_stack.asm | mendsley/coroutine | 7 | 16981 | <reponame>mendsley/coroutine
; Copyright 2016-2019 <NAME>
; All rights reserved
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted providing that the following conditions
; are met:
; 1. Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
; STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
; IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
.model flat, C
.686p
.code
EXTERN coroutine_private_switch : PROC
;
; void coroutine_private_init_stack(coroutine::H* coro, coroutine::Entry* entry, void* arg);
;
coroutine_private_init_stack PROC public
; eax: coro, ecx: entry, edx: arg
; Save registers and stack
push ebp
mov ebp, esp
push ebx
push edi
push esi
mov ecx, esp
; Acquire arguments
mov ebx, dword ptr [ebp+8]
mov edi, dword ptr [ebp+12]
mov esi, dword ptr [ebp+16]
; Switch to the new coroutine's stack
mov esp, dword ptr [ebx]
; Return address
push 0
lea eax, coroutine_private_bootstrap
push eax
; Seed volatile registers
push 0 ; ebp
push ebx
push edi
push esi
; Save the new stack pointer
mov dword ptr [ebx], esp
; Restore registers and stack
mov esp, ecx
pop esi
pop edi
pop ebx
pop ebp
ret
coroutine_private_init_stack ENDP
EXTERN coroutine_private_entry : PROC
;
; Entry point for a coroutine
;
coroutine_private_bootstrap PROC public
; push arguments to private_entry
push esi
push edi
push ebx
call coroutine_private_entry
; does not return
coroutine_private_bootstrap ENDP
END
|
apu/channel_1/channel_1_align.asm | endrift/SameSuite | 21 | 95868 | <filename>apu/channel_1/channel_1_align.asm
RESULTS_START EQU $c000
RESULTS_N_ROWS EQU 6
include "base.inc"
; This test verifies that channel 1 ticks at 1MHz
CorrectResults:
db $00, $00, $00, $00, $00, $00, $00, $00
db $00, $00, $00, $00, $00, $08, $08, $08
db $00, $00, $00, $00, $00, $00, $00, $00
db $00, $00, $00, $00, $08, $08, $08, $08
db $00, $00, $00, $00, $00, $00, $00, $00
db $00, $00, $00, $00, $08, $08, $08, $08
SubTest: MACRO
xor a
ldh [rNR52], a
cpl
ldh [rNR52], a
ld hl, rPCM12
ldh [rNR13], a
ld a, $80
ldh [rNR11], a
ldh [rNR12], a
ld a, $87
nops \2
ldh [rNR14], a
nops \1
ld a, [hl]
call StoreResult
ENDM
RunTest:
ld a, 1
ldh [rKEY1], a
stop
ld de, $c000
SubTest $0, 0
SubTest $1, 0
SubTest $2, 0
SubTest $3, 0
SubTest $4, 0
SubTest $5, 0
SubTest $6, 0
SubTest $7, 0
SubTest $8, 0
SubTest $9, 0
SubTest $a, 0
SubTest $b, 0
SubTest $c, 0
SubTest $d, 0
SubTest $e, 0
SubTest $f, 0
SubTest $0, 1
SubTest $1, 1
SubTest $2, 1
SubTest $3, 1
SubTest $4, 1
SubTest $5, 1
SubTest $6, 1
SubTest $7, 1
SubTest $8, 1
SubTest $9, 1
SubTest $a, 1
SubTest $b, 1
SubTest $c, 1
SubTest $d, 1
SubTest $e, 1
SubTest $f, 1
SubTest $0, 3
SubTest $1, 3
SubTest $2, 3
SubTest $3, 3
SubTest $4, 3
SubTest $5, 3
SubTest $6, 3
SubTest $7, 3
SubTest $8, 3
SubTest $9, 3
SubTest $a, 3
SubTest $b, 3
SubTest $c, 3
SubTest $d, 3
SubTest $e, 3
SubTest $f, 3
ret
StoreResult::
ld [de], a
inc de
ret
CGB_MODE
|
programs/oeis/162/A162256.asm | karttu/loda | 1 | 5186 | ; A162256: a(n) = (2*n^3 + 5*n^2 - 3*n)/2.
; 2,15,45,98,180,297,455,660,918,1235,1617,2070,2600,3213,3915,4712,5610,6615,7733,8970,10332,11825,13455,15228,17150,19227,21465,23870,26448,29205,32147,35280,38610,42143,45885,49842,54020,58425,63063,67940,73062,78435,84065,89958,96120,102557,109275,116280,123578,131175,139077,147290,155820,164673,173855,183372,193230,203435,213993,224910,236192,247845,259875,272288,285090,298287,311885,325890,340308,355145,370407,386100,402230,418803,435825,453302,471240,489645,508523,527880,547722,568055,588885,610218,632060,654417,677295,700700,724638,749115,774137,799710,825840,852533,879795,907632,936050,965055,994653,1024850,1055652,1087065,1119095,1151748,1185030,1218947,1253505,1288710,1324568,1361085,1398267,1436120,1474650,1513863,1553765,1594362,1635660,1677665,1720383,1763820,1807982,1852875,1898505,1944878,1992000,2039877,2088515,2137920,2188098,2239055,2290797,2343330,2396660,2450793,2505735,2561492,2618070,2675475,2733713,2792790,2852712,2913485,2975115,3037608,3100970,3165207,3230325,3296330,3363228,3431025,3499727,3569340,3639870,3711323,3783705,3857022,3931280,4006485,4082643,4159760,4237842,4316895,4396925,4477938,4559940,4642937,4726935,4811940,4897958,4984995,5073057,5162150,5252280,5343453,5435675,5528952,5623290,5718695,5815173,5912730,6011372,6111105,6211935,6313868,6416910,6521067,6626345,6732750,6840288,6948965,7058787,7169760,7281890,7395183,7509645,7625282,7742100,7860105,7979303,8099700,8221302,8344115,8468145,8593398,8719880,8847597,8976555,9106760,9238218,9370935,9504917,9640170,9776700,9914513,10053615,10194012,10335710,10478715,10623033,10768670,10915632,11063925,11213555,11364528,11516850,11670527,11825565,11981970,12139748,12298905,12459447,12621380,12784710,12949443,13115585,13283142,13452120,13622525,13794363,13967640,14142362,14318535,14496165,14675258,14855820,15037857,15221375,15406380,15592878,15780875
mov $1,$0
mul $0,2
add $0,6
bin $0,2
sub $0,2
mul $1,$0
div $1,2
add $1,2
|
oeis/308/A308697.asm | neoneye/loda-programs | 11 | 167986 | ; A308697: a(n) = Sum_{d|n} d^(3*d).
; Submitted by <NAME>(s2)
; 1,65,19684,16777281,30517578126,101559956688164,558545864083284008,4722366482869661990977,58149737003040059690409853,1000000000000000000030517578190,23225154419887808141001767796309132,708801874985091845381344408569542626596,27783742160348572763840067510872319734178278,1372073885318497127491074758163545824763583832168,83966617312138217205387036301544867455959350585957184,6277101735386680763835789423207666420824721927333696503873,566102392446495912472763130484190827147641176198176468019613234
add $0,1
mov $2,$0
lpb $0
mov $3,$2
dif $3,$0
cmp $3,$2
cmp $3,0
mul $3,$0
pow $3,$0
sub $0,1
pow $3,3
add $1,$3
lpe
mov $0,$1
add $0,1
|
libsrc/strings/strstrip_callee.asm | meesokim/z88dk | 0 | 1552 | ; char __CALLEE__ *strstrip_callee(char *s, char c)
; remove occurences of leading char c from string s
; 01.2007 aralbrec
PUBLIC strstrip_callee
PUBLIC ASMDISP_STRSTRIP_CALLEE
.strstrip_callee
pop hl
pop de
ex (sp),hl
ld a,e
; enter : a = char c
; hl = char *s
; exit : hl = char *s
; uses : af, bc, de, hl
.asmentry
ld e,l
ld d,h
.skip
cp (hl)
inc hl
jp z, skip
dec hl
; the case where there are no unwanted chars is common...
ld a,l
cp e
jr nz, copy
ld a,h
cp d
jr nz, copy
ex de,hl
ret
.copy
push de
.copyloop
ld a,(hl)
ldi
or a
jp nz, copyloop
pop hl
ret
DEFC ASMDISP_STRSTRIP_CALLEE = # asmentry - strstrip_callee
|
cs61/lab5/lab05_ex1.asm | bmoya217/ucr | 0 | 83685 | ;=================================================
; Name: <NAME>
; Username: <EMAIL>
;
; Lab: lab 5
; Lab section: 021
; TA: <NAME>
;
;=================================================
.Orig x3000
;Instructions
AND R1,R1,#0
LD R1, POINTER
LD R2, COUNTER
LD R3, CHECKER
LD R4, COUNTER ;;2^n
LOOP_DE_LOOP
STR R4, R1, #0
ADD R2,R2,#1
ADD R1,R1,#1
ADD R4,R4,R4
ADD R0, R2, R3
BRn LOOP_DE_LOOP
; output
; for(i = 15 downto 0):
; if (bit[i] is a 0):
; print a 0
; else:
; print a 1
; shift left
LD R6, POINTER ; R6 <-- Address pointer for Convert
LD R4, COUNTER
LARGERLOOP
LEA R0, B
PUTS
AND R1, R1, #0
AND R2, R2, #0
LDR R1, R6, #0 ; R1 <-- VARIABLE Convert
LD R5, COUNTER2 ; R5 <---COUNTER
ADD R2, R2, #12 ; R2 <---COUNTER FOR SPACES
NOT R2, R2
ADD R2, R2, #1
JSR PRINT_IN_BINARY_3200
LEA R0, NEWLINE
PUTS
ADD R4, R4, #1
ADD R6, R6, #1
LD R0, CHECKER
ADD R0, R0, R4
BRn LARGERLOOP
FINISH
HALT
;Local data
POINTER .FILL x4000
COUNTER .FILL 1
CHECKER .FILL #-11
COUNTER2 .FILL #15
NEWLINE .STRINGZ "\n"
B .STRINGZ "b"
;===========
;subroutine:print in binary
;no return value
;just output
.Orig x3200
PRINT_IN_BINARY_3200
ST R7, STORE_R7
LOOP
ADD R1,R1,#0
BRn NEGATIVE
;POSITIVE
LEA R0, ZERO
PUTS
BR NEXT
;NEGATIVE
NEGATIVE
LEA R0, ONE
PUTS
NEXT
ADD R3, R2, R5
BRnp NEXT2
ADD R2,R2,#4
BRp NEXT2
LEA R0, SPACE
PUTS
NEXT2
ADD R1, R1, R1
ADD R5, R5, #-1
BRzp LOOP
LD R7, STORE_R7
RET
;SUBROUTINE DATA
STORE_R7 .FILL #0
ZERO .STRINGZ "0"
ONE .STRINGZ "1"
SPACE .STRINGZ " "
; Remote data
.ORIG x4000
ARRAY .BLKW #10
.END |
programs/oeis/027/A027271.asm | karttu/loda | 0 | 19033 | ; A027271: a(n) = Sum_{k=0..2n} (k+1)*T(n,k), where T is given by A026536.
; 1,4,18,48,180,432,1512,3456,11664,25920,85536,186624,606528,1306368,4199040,8957952,28553472,60466176,191476224,403107840,1269789696,2660511744,8344332288,17414258688,54419558400,113192681472
mov $2,$0
add $2,1
mov $0,$2
mov $1,$2
mov $4,3
lpb $0,1
sub $0,1
mul $1,$4
mov $3,6
div $3,$4
mov $4,$3
lpe
sub $1,3
div $1,3
add $1,1
|
Numbers/ClassicalReals/RealField/Lemmas.agda | Smaug123/agdaproofs | 4 | 1204 | {-# OPTIONS --safe --warning=error --without-K #-}
open import Groups.Definition
open import Functions.Definition
open import Agda.Primitive using (Level; lzero; lsuc; _⊔_)
open import LogicalFormulae
open import Setoids.Subset
open import Setoids.Setoids
open import Setoids.Orders.Partial.Definition
open import Fields.Fields
open import Rings.Orders.Total.Lemmas
open import Rings.Orders.Partial.Definition
open import Rings.Definition
open import Fields.Orders.LeastUpperBounds.Definition
open import Fields.Orders.Total.Definition
open import Sets.EquivalenceRelations
module Numbers.ClassicalReals.RealField.Lemmas {a b c : _} {A : Set a} {S : Setoid {_} {b} A} {_+_ _*_ : A → A → A} {R : Ring S _+_ _*_} (F : Field R) {_<_ : Rel {_} {c} A} {pOrder : SetoidPartialOrder S _<_} (pOrderedRing : PartiallyOrderedRing R pOrder) {orderNontrivialX orderNontrivialY : A} (orderNontrivial : orderNontrivialX < orderNontrivialY) where
open Ring R
open Group additiveGroup
open Setoid S
open Equivalence eq
open SetoidPartialOrder pOrder
open import Rings.Orders.Partial.Lemmas pOrderedRing
open PartiallyOrderedRing pOrderedRing
IsInterval : {d : _} {pred : A → Set d} (subset : subset S pred) → Set (a ⊔ c ⊔ d)
IsInterval {pred = pred} subset = (x y : A) → (x<y : x < y) → pred x → pred y → (c : A) → (x < c) → (c < y) → pred c
-- Example: (a, b) is an interval
openBallPred : A → A → A → Set c
openBallPred a b x = (a < x) && (x < b)
openBallSubset : (a b : A) → subset S (openBallPred a b)
openBallSubset a b {x} {y} x=y (a<x ,, x<y) = <WellDefined reflexive x=y a<x ,, <WellDefined x=y reflexive x<y
openBallInterval : (a b : A) → IsInterval (openBallSubset a b)
openBallInterval a b x y x<y (a<x ,, x<b) (a<y ,, y<b) c x<c c<y = <Transitive a<x x<c ,, <Transitive c<y y<b
nonemptyBoundedIntervalHasLubImpliesAllLub : ({d : _} {pred : A → Set d} {subset : subset S pred} (interval : IsInterval subset) → (nonempty : Sg A pred) → (boundedAbove : Sg A (UpperBound pOrder subset)) → Sg A (LeastUpperBound pOrder subset)) → {d : _} → {pred : A → Set d} → (sub : subset S pred) → (nonempty : Sg A pred) → (boundedAbove : Sg A (UpperBound pOrder sub)) → Sg A (LeastUpperBound pOrder sub)
nonemptyBoundedIntervalHasLubImpliesAllLub axiom {d} {pred} sub (member , predMember) (bound , isBound) = lub , lubIsLub
where
intervalPredicate : A → Set (a ⊔ b ⊔ c ⊔ d)
intervalPredicate a = Sg A (λ k → ((a < k) || (a ∼ k)) && pred k)
intervalIsSubset : subset S intervalPredicate
intervalIsSubset {x} {y} x=y (bigger , (inl x<bigger ,, biggerWorks)) = (bigger , (inl (<WellDefined x=y reflexive x<bigger) ,, biggerWorks))
intervalIsSubset {x} {y} x=y (bigger , (inr x=bigger ,, biggerWorks)) = (bigger , (inr (transitive (symmetric x=y) x=bigger) ,, biggerWorks))
intervalIsInterval : IsInterval intervalIsSubset
intervalIsInterval x y x<y (dominateX , (x<dominateX ,, predDominateX)) (dominateY , (inl y<dominateY ,, predDominateY)) c x<c c<y = dominateY , (inl (<Transitive c<y y<dominateY) ,, predDominateY)
intervalIsInterval x y x<y (dominateX , (x<dominateX ,, predDominateX)) (dominateY , (inr y=dominateY ,, predDominateY)) c x<c c<y = dominateY , (inl (<WellDefined reflexive y=dominateY c<y) ,, predDominateY)
intervalNonempty : Sg A intervalPredicate
intervalNonempty = ((member + orderNontrivialX) + inverse orderNontrivialY) , (member , (inl (<WellDefined (transitive groupIsAbelian +Associative) identLeft (orderRespectsAddition (moveInequality' orderNontrivial) member)) ,, predMember))
intervalBounded : Sg A (UpperBound pOrder intervalIsSubset)
intervalBounded = bound , ans
where
ans : (y : A) → intervalPredicate y → (y < bound) || (y ∼ bound)
ans y (boundY , (y<boundY ,, predY)) with isBound boundY predY
ans y (boundY , (inl y<boundY ,, predY)) | inl boundY<Bound = inl (<Transitive y<boundY boundY<Bound)
ans y (boundY , (inr y=boundY ,, predY)) | inl boundY<Bound = inl (<WellDefined (symmetric y=boundY) reflexive boundY<Bound)
ans y (boundY , (inl y<boundY ,, predY)) | inr boundY=Bound = inl (<WellDefined reflexive boundY=Bound y<boundY)
ans y (boundY , (inr y=boundY ,, predY)) | inr boundY=Bound = inr (transitive y=boundY boundY=Bound)
intervalLub : Sg A (LeastUpperBound pOrder intervalIsSubset)
intervalLub = axiom intervalIsInterval intervalNonempty intervalBounded
lub : A
lub with intervalLub
... | b , _ = b
lubProof : LeastUpperBound pOrder intervalIsSubset lub
lubProof with intervalLub
... | b , pr = pr
ubImpliesUbSub : {x : A} → UpperBound pOrder sub x → UpperBound pOrder intervalIsSubset x
ubImpliesUbSub {x} ub y (bound , (y<bound ,, predBound)) with ub bound predBound
ubImpliesUbSub {x} ub y (bound , (inl y<bound ,, predBound)) | inl bound<x = inl (<Transitive y<bound bound<x)
ubImpliesUbSub {x} ub y (bound , (inr y=bound ,, predBound)) | inl bound<x = inl (<WellDefined (symmetric y=bound) reflexive bound<x)
ubImpliesUbSub {x} ub y (bound , (inl y<bound ,, predBound)) | inr bound=x = inl (<WellDefined reflexive bound=x y<bound)
ubImpliesUbSub {x} ub y (bound , (inr y=bound ,, predBound)) | inr bound=x = inr (transitive y=bound bound=x)
ubSubImpliesUb : {x : A} → UpperBound pOrder intervalIsSubset x → UpperBound pOrder sub x
ubSubImpliesUb {x} ub y predY with ub y (y , (inr reflexive ,, predY))
ubSubImpliesUb {x} ub y predY | inl t<x = inl t<x
ubSubImpliesUb {x} ub y predY | inr t=x = inr t=x
lubIsLub : LeastUpperBound pOrder sub lub
LeastUpperBound.upperBound lubIsLub = ubSubImpliesUb (LeastUpperBound.upperBound lubProof)
LeastUpperBound.leastUpperBound lubIsLub y yIsUpperBound = LeastUpperBound.leastUpperBound lubProof y (ubImpliesUbSub yIsUpperBound)
|
MK1_CPU/programs/display_hello_world.asm | billionelectrons/8bit-cpu | 274 | 28682 | #include "lib/mk1.cpu"
#bank ".data"
helloworld: #str "Hello, world!\0"
#bank ".instr"
main:
jal init_display
ldi $b helloworld
.loop:
ld $a [$b]
cmp 0
jz end
push $a
push $b
jal print_char
pop $b
pop $a
ldi $a 1
add $b $b
j .loop
end:
hlt
#include "lib/helix.asm"
|
libsrc/_DEVELOPMENT/string/c/sccz80/strnchr.asm | jpoikela/z88dk | 0 | 101913 |
; char *strnchr(const char *s, size_t n, int c)
SECTION code_clib
SECTION code_string
PUBLIC strnchr
EXTERN asm_strnchr
strnchr:
pop af
pop de
pop bc
pop hl
push hl
push bc
push de
push af
jp asm_strnchr
; SDCC bridge for Classic
IF __CLASSIC
PUBLIC _strnchr
defc _strnchr = strnchr
ENDIF
|
resources/scripts/get_state.spotify.applescript | kant/swdc-vscode-musictime | 465 | 1684 | <filename>resources/scripts/get_state.spotify.applescript
on escape_quotes(string_to_escape)
set AppleScript's text item delimiters to the "\""
set the item_list to every text item of string_to_escape
set AppleScript's text item delimiters to the "\\\""
set string_to_escape to the item_list as string
set AppleScript's text item delimiters to ""
return string_to_escape
end escape_quotes
try
tell application "Spotify"
set t_info to "{"
set t_info to t_info & "\"artist\": \"" & my escape_quotes(current track's artist) & "\""
set t_info to t_info & ",\"album\": \"" & my escape_quotes(current track's album) & "\""
set t_info to t_info & ",\"genre\": \"\""
set t_info to t_info & ",\"disc_number\": " & current track's disc number
set t_info to t_info & ",\"duration\": " & current track's duration
set t_info to t_info & ",\"played_count\": " & current track's played count
set t_info to t_info & ",\"track_number\": " & current track's track number
set t_info to t_info & ",\"id\": \"" & current track's id & "\""
set t_info to t_info & ",\"name\": \"" & my escape_quotes(current track's name) & "\""
set t_info to t_info & ",\"state\": \"" & player state & "\""
set t_info to t_info & ",\"volume\": " & sound volume
set t_info to t_info & ",\"popularity\": " & current track's popularity
set t_info to t_info & ",\"artwork_url\": \"" & current track's artwork url & "\""
set t_info to t_info & ",\"spotify_url\": \"" & current track's spotify url & "\""
set t_info to t_info & ",\"progress_ms\": " & (((player position) * 1000) as integer)
set t_info to t_info & "}"
end tell
on error
return "{}"
end try |
arch/ARM/Nordic/svd/nrf52/nrf_svd-nfct.ads | rocher/Ada_Drivers_Library | 192 | 720 | -- Copyright (c) 2010 - 2018, Nordic Semiconductor ASA
--
-- All rights reserved.
--
-- Redistribution and use in source and binary forms, with or without modification,
-- are permitted provided that the following conditions are met:
--
-- 1. Redistributions of source code must retain the above copyright notice, this
-- list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form, except as embedded into a Nordic
-- Semiconductor ASA integrated circuit in a product or a software update for
-- such product, must reproduce the above copyright notice, this list of
-- conditions and the following disclaimer in the documentation and/or other
-- materials provided with the distribution.
--
-- 3. Neither the name of Nordic Semiconductor ASA nor the names of its
-- contributors may be used to endorse or promote products derived from this
-- software without specific prior written permission.
--
-- 4. This software, with or without modification, must only be used with a
-- Nordic Semiconductor ASA integrated circuit.
--
-- 5. Any software provided in binary form under this license must not be reverse
-- engineered, decompiled, modified and/or disassembled.
--
-- THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
-- OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-- OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
-- DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
-- GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
-- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--
-- This spec has been automatically generated from nrf52.svd
pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;
pragma Style_Checks (Off);
with HAL;
with System;
package NRF_SVD.NFCT is
pragma Preelaborate;
---------------
-- Registers --
---------------
-- Shortcut between FIELDDETECTED event and ACTIVATE task
type SHORTS_FIELDDETECTED_ACTIVATE_Field is
(-- Disable shortcut
Disabled,
-- Enable shortcut
Enabled)
with Size => 1;
for SHORTS_FIELDDETECTED_ACTIVATE_Field use
(Disabled => 0,
Enabled => 1);
-- Shortcut between FIELDLOST event and SENSE task
type SHORTS_FIELDLOST_SENSE_Field is
(-- Disable shortcut
Disabled,
-- Enable shortcut
Enabled)
with Size => 1;
for SHORTS_FIELDLOST_SENSE_Field use
(Disabled => 0,
Enabled => 1);
-- Shortcut register
type SHORTS_Register is record
-- Shortcut between FIELDDETECTED event and ACTIVATE task
FIELDDETECTED_ACTIVATE : SHORTS_FIELDDETECTED_ACTIVATE_Field :=
NRF_SVD.NFCT.Disabled;
-- Shortcut between FIELDLOST event and SENSE task
FIELDLOST_SENSE : SHORTS_FIELDLOST_SENSE_Field :=
NRF_SVD.NFCT.Disabled;
-- unspecified
Reserved_2_31 : HAL.UInt30 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SHORTS_Register use record
FIELDDETECTED_ACTIVATE at 0 range 0 .. 0;
FIELDLOST_SENSE at 0 range 1 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
-- Enable or disable interrupt for READY event
type INTEN_READY_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_READY_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for FIELDDETECTED event
type INTEN_FIELDDETECTED_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_FIELDDETECTED_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for FIELDLOST event
type INTEN_FIELDLOST_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_FIELDLOST_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for TXFRAMESTART event
type INTEN_TXFRAMESTART_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_TXFRAMESTART_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for TXFRAMEEND event
type INTEN_TXFRAMEEND_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_TXFRAMEEND_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for RXFRAMESTART event
type INTEN_RXFRAMESTART_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_RXFRAMESTART_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for RXFRAMEEND event
type INTEN_RXFRAMEEND_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_RXFRAMEEND_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for ERROR event
type INTEN_ERROR_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_ERROR_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for RXERROR event
type INTEN_RXERROR_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_RXERROR_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for ENDRX event
type INTEN_ENDRX_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_ENDRX_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for ENDTX event
type INTEN_ENDTX_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_ENDTX_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for AUTOCOLRESSTARTED event
type INTEN_AUTOCOLRESSTARTED_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_AUTOCOLRESSTARTED_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for COLLISION event
type INTEN_COLLISION_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_COLLISION_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for SELECTED event
type INTEN_SELECTED_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_SELECTED_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt for STARTED event
type INTEN_STARTED_Field is
(-- Disable
Disabled,
-- Enable
Enabled)
with Size => 1;
for INTEN_STARTED_Field use
(Disabled => 0,
Enabled => 1);
-- Enable or disable interrupt
type INTEN_Register is record
-- Enable or disable interrupt for READY event
READY : INTEN_READY_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for FIELDDETECTED event
FIELDDETECTED : INTEN_FIELDDETECTED_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for FIELDLOST event
FIELDLOST : INTEN_FIELDLOST_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for TXFRAMESTART event
TXFRAMESTART : INTEN_TXFRAMESTART_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for TXFRAMEEND event
TXFRAMEEND : INTEN_TXFRAMEEND_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for RXFRAMESTART event
RXFRAMESTART : INTEN_RXFRAMESTART_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for RXFRAMEEND event
RXFRAMEEND : INTEN_RXFRAMEEND_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for ERROR event
ERROR : INTEN_ERROR_Field := NRF_SVD.NFCT.Disabled;
-- unspecified
Reserved_8_9 : HAL.UInt2 := 16#0#;
-- Enable or disable interrupt for RXERROR event
RXERROR : INTEN_RXERROR_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for ENDRX event
ENDRX : INTEN_ENDRX_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for ENDTX event
ENDTX : INTEN_ENDTX_Field := NRF_SVD.NFCT.Disabled;
-- unspecified
Reserved_13_13 : HAL.Bit := 16#0#;
-- Enable or disable interrupt for AUTOCOLRESSTARTED event
AUTOCOLRESSTARTED : INTEN_AUTOCOLRESSTARTED_Field :=
NRF_SVD.NFCT.Disabled;
-- unspecified
Reserved_15_17 : HAL.UInt3 := 16#0#;
-- Enable or disable interrupt for COLLISION event
COLLISION : INTEN_COLLISION_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for SELECTED event
SELECTED : INTEN_SELECTED_Field := NRF_SVD.NFCT.Disabled;
-- Enable or disable interrupt for STARTED event
STARTED : INTEN_STARTED_Field := NRF_SVD.NFCT.Disabled;
-- unspecified
Reserved_21_31 : HAL.UInt11 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for INTEN_Register use record
READY at 0 range 0 .. 0;
FIELDDETECTED at 0 range 1 .. 1;
FIELDLOST at 0 range 2 .. 2;
TXFRAMESTART at 0 range 3 .. 3;
TXFRAMEEND at 0 range 4 .. 4;
RXFRAMESTART at 0 range 5 .. 5;
RXFRAMEEND at 0 range 6 .. 6;
ERROR at 0 range 7 .. 7;
Reserved_8_9 at 0 range 8 .. 9;
RXERROR at 0 range 10 .. 10;
ENDRX at 0 range 11 .. 11;
ENDTX at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
AUTOCOLRESSTARTED at 0 range 14 .. 14;
Reserved_15_17 at 0 range 15 .. 17;
COLLISION at 0 range 18 .. 18;
SELECTED at 0 range 19 .. 19;
STARTED at 0 range 20 .. 20;
Reserved_21_31 at 0 range 21 .. 31;
end record;
-- Write '1' to Enable interrupt for READY event
type INTENSET_READY_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_READY_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for READY event
type INTENSET_READY_Field_1 is
(-- Reset value for the field
Intenset_Ready_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_READY_Field_1 use
(Intenset_Ready_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for FIELDDETECTED event
type INTENSET_FIELDDETECTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_FIELDDETECTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for FIELDDETECTED event
type INTENSET_FIELDDETECTED_Field_1 is
(-- Reset value for the field
Intenset_Fielddetected_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_FIELDDETECTED_Field_1 use
(Intenset_Fielddetected_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for FIELDLOST event
type INTENSET_FIELDLOST_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_FIELDLOST_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for FIELDLOST event
type INTENSET_FIELDLOST_Field_1 is
(-- Reset value for the field
Intenset_Fieldlost_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_FIELDLOST_Field_1 use
(Intenset_Fieldlost_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for TXFRAMESTART event
type INTENSET_TXFRAMESTART_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_TXFRAMESTART_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for TXFRAMESTART event
type INTENSET_TXFRAMESTART_Field_1 is
(-- Reset value for the field
Intenset_Txframestart_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_TXFRAMESTART_Field_1 use
(Intenset_Txframestart_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for TXFRAMEEND event
type INTENSET_TXFRAMEEND_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_TXFRAMEEND_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for TXFRAMEEND event
type INTENSET_TXFRAMEEND_Field_1 is
(-- Reset value for the field
Intenset_Txframeend_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_TXFRAMEEND_Field_1 use
(Intenset_Txframeend_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for RXFRAMESTART event
type INTENSET_RXFRAMESTART_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_RXFRAMESTART_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for RXFRAMESTART event
type INTENSET_RXFRAMESTART_Field_1 is
(-- Reset value for the field
Intenset_Rxframestart_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_RXFRAMESTART_Field_1 use
(Intenset_Rxframestart_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for RXFRAMEEND event
type INTENSET_RXFRAMEEND_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_RXFRAMEEND_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for RXFRAMEEND event
type INTENSET_RXFRAMEEND_Field_1 is
(-- Reset value for the field
Intenset_Rxframeend_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_RXFRAMEEND_Field_1 use
(Intenset_Rxframeend_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for ERROR event
type INTENSET_ERROR_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_ERROR_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for ERROR event
type INTENSET_ERROR_Field_1 is
(-- Reset value for the field
Intenset_Error_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_ERROR_Field_1 use
(Intenset_Error_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for RXERROR event
type INTENSET_RXERROR_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_RXERROR_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for RXERROR event
type INTENSET_RXERROR_Field_1 is
(-- Reset value for the field
Intenset_Rxerror_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_RXERROR_Field_1 use
(Intenset_Rxerror_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for ENDRX event
type INTENSET_ENDRX_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_ENDRX_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for ENDRX event
type INTENSET_ENDRX_Field_1 is
(-- Reset value for the field
Intenset_Endrx_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_ENDRX_Field_1 use
(Intenset_Endrx_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for ENDTX event
type INTENSET_ENDTX_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_ENDTX_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for ENDTX event
type INTENSET_ENDTX_Field_1 is
(-- Reset value for the field
Intenset_Endtx_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_ENDTX_Field_1 use
(Intenset_Endtx_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for AUTOCOLRESSTARTED event
type INTENSET_AUTOCOLRESSTARTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_AUTOCOLRESSTARTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for AUTOCOLRESSTARTED event
type INTENSET_AUTOCOLRESSTARTED_Field_1 is
(-- Reset value for the field
Intenset_Autocolresstarted_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_AUTOCOLRESSTARTED_Field_1 use
(Intenset_Autocolresstarted_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for COLLISION event
type INTENSET_COLLISION_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_COLLISION_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for COLLISION event
type INTENSET_COLLISION_Field_1 is
(-- Reset value for the field
Intenset_Collision_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_COLLISION_Field_1 use
(Intenset_Collision_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for SELECTED event
type INTENSET_SELECTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_SELECTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for SELECTED event
type INTENSET_SELECTED_Field_1 is
(-- Reset value for the field
Intenset_Selected_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_SELECTED_Field_1 use
(Intenset_Selected_Field_Reset => 0,
Set => 1);
-- Write '1' to Enable interrupt for STARTED event
type INTENSET_STARTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_STARTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for STARTED event
type INTENSET_STARTED_Field_1 is
(-- Reset value for the field
Intenset_Started_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_STARTED_Field_1 use
(Intenset_Started_Field_Reset => 0,
Set => 1);
-- Enable interrupt
type INTENSET_Register is record
-- Write '1' to Enable interrupt for READY event
READY : INTENSET_READY_Field_1 :=
Intenset_Ready_Field_Reset;
-- Write '1' to Enable interrupt for FIELDDETECTED event
FIELDDETECTED : INTENSET_FIELDDETECTED_Field_1 :=
Intenset_Fielddetected_Field_Reset;
-- Write '1' to Enable interrupt for FIELDLOST event
FIELDLOST : INTENSET_FIELDLOST_Field_1 :=
Intenset_Fieldlost_Field_Reset;
-- Write '1' to Enable interrupt for TXFRAMESTART event
TXFRAMESTART : INTENSET_TXFRAMESTART_Field_1 :=
Intenset_Txframestart_Field_Reset;
-- Write '1' to Enable interrupt for TXFRAMEEND event
TXFRAMEEND : INTENSET_TXFRAMEEND_Field_1 :=
Intenset_Txframeend_Field_Reset;
-- Write '1' to Enable interrupt for RXFRAMESTART event
RXFRAMESTART : INTENSET_RXFRAMESTART_Field_1 :=
Intenset_Rxframestart_Field_Reset;
-- Write '1' to Enable interrupt for RXFRAMEEND event
RXFRAMEEND : INTENSET_RXFRAMEEND_Field_1 :=
Intenset_Rxframeend_Field_Reset;
-- Write '1' to Enable interrupt for ERROR event
ERROR : INTENSET_ERROR_Field_1 :=
Intenset_Error_Field_Reset;
-- unspecified
Reserved_8_9 : HAL.UInt2 := 16#0#;
-- Write '1' to Enable interrupt for RXERROR event
RXERROR : INTENSET_RXERROR_Field_1 :=
Intenset_Rxerror_Field_Reset;
-- Write '1' to Enable interrupt for ENDRX event
ENDRX : INTENSET_ENDRX_Field_1 :=
Intenset_Endrx_Field_Reset;
-- Write '1' to Enable interrupt for ENDTX event
ENDTX : INTENSET_ENDTX_Field_1 :=
Intenset_Endtx_Field_Reset;
-- unspecified
Reserved_13_13 : HAL.Bit := 16#0#;
-- Write '1' to Enable interrupt for AUTOCOLRESSTARTED event
AUTOCOLRESSTARTED : INTENSET_AUTOCOLRESSTARTED_Field_1 :=
Intenset_Autocolresstarted_Field_Reset;
-- unspecified
Reserved_15_17 : HAL.UInt3 := 16#0#;
-- Write '1' to Enable interrupt for COLLISION event
COLLISION : INTENSET_COLLISION_Field_1 :=
Intenset_Collision_Field_Reset;
-- Write '1' to Enable interrupt for SELECTED event
SELECTED : INTENSET_SELECTED_Field_1 :=
Intenset_Selected_Field_Reset;
-- Write '1' to Enable interrupt for STARTED event
STARTED : INTENSET_STARTED_Field_1 :=
Intenset_Started_Field_Reset;
-- unspecified
Reserved_21_31 : HAL.UInt11 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for INTENSET_Register use record
READY at 0 range 0 .. 0;
FIELDDETECTED at 0 range 1 .. 1;
FIELDLOST at 0 range 2 .. 2;
TXFRAMESTART at 0 range 3 .. 3;
TXFRAMEEND at 0 range 4 .. 4;
RXFRAMESTART at 0 range 5 .. 5;
RXFRAMEEND at 0 range 6 .. 6;
ERROR at 0 range 7 .. 7;
Reserved_8_9 at 0 range 8 .. 9;
RXERROR at 0 range 10 .. 10;
ENDRX at 0 range 11 .. 11;
ENDTX at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
AUTOCOLRESSTARTED at 0 range 14 .. 14;
Reserved_15_17 at 0 range 15 .. 17;
COLLISION at 0 range 18 .. 18;
SELECTED at 0 range 19 .. 19;
STARTED at 0 range 20 .. 20;
Reserved_21_31 at 0 range 21 .. 31;
end record;
-- Write '1' to Disable interrupt for READY event
type INTENCLR_READY_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_READY_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for READY event
type INTENCLR_READY_Field_1 is
(-- Reset value for the field
Intenclr_Ready_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_READY_Field_1 use
(Intenclr_Ready_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for FIELDDETECTED event
type INTENCLR_FIELDDETECTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_FIELDDETECTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for FIELDDETECTED event
type INTENCLR_FIELDDETECTED_Field_1 is
(-- Reset value for the field
Intenclr_Fielddetected_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_FIELDDETECTED_Field_1 use
(Intenclr_Fielddetected_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for FIELDLOST event
type INTENCLR_FIELDLOST_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_FIELDLOST_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for FIELDLOST event
type INTENCLR_FIELDLOST_Field_1 is
(-- Reset value for the field
Intenclr_Fieldlost_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_FIELDLOST_Field_1 use
(Intenclr_Fieldlost_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for TXFRAMESTART event
type INTENCLR_TXFRAMESTART_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_TXFRAMESTART_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for TXFRAMESTART event
type INTENCLR_TXFRAMESTART_Field_1 is
(-- Reset value for the field
Intenclr_Txframestart_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_TXFRAMESTART_Field_1 use
(Intenclr_Txframestart_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for TXFRAMEEND event
type INTENCLR_TXFRAMEEND_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_TXFRAMEEND_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for TXFRAMEEND event
type INTENCLR_TXFRAMEEND_Field_1 is
(-- Reset value for the field
Intenclr_Txframeend_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_TXFRAMEEND_Field_1 use
(Intenclr_Txframeend_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for RXFRAMESTART event
type INTENCLR_RXFRAMESTART_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_RXFRAMESTART_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for RXFRAMESTART event
type INTENCLR_RXFRAMESTART_Field_1 is
(-- Reset value for the field
Intenclr_Rxframestart_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_RXFRAMESTART_Field_1 use
(Intenclr_Rxframestart_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for RXFRAMEEND event
type INTENCLR_RXFRAMEEND_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_RXFRAMEEND_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for RXFRAMEEND event
type INTENCLR_RXFRAMEEND_Field_1 is
(-- Reset value for the field
Intenclr_Rxframeend_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_RXFRAMEEND_Field_1 use
(Intenclr_Rxframeend_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for ERROR event
type INTENCLR_ERROR_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_ERROR_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for ERROR event
type INTENCLR_ERROR_Field_1 is
(-- Reset value for the field
Intenclr_Error_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_ERROR_Field_1 use
(Intenclr_Error_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for RXERROR event
type INTENCLR_RXERROR_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_RXERROR_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for RXERROR event
type INTENCLR_RXERROR_Field_1 is
(-- Reset value for the field
Intenclr_Rxerror_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_RXERROR_Field_1 use
(Intenclr_Rxerror_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for ENDRX event
type INTENCLR_ENDRX_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_ENDRX_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for ENDRX event
type INTENCLR_ENDRX_Field_1 is
(-- Reset value for the field
Intenclr_Endrx_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_ENDRX_Field_1 use
(Intenclr_Endrx_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for ENDTX event
type INTENCLR_ENDTX_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_ENDTX_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for ENDTX event
type INTENCLR_ENDTX_Field_1 is
(-- Reset value for the field
Intenclr_Endtx_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_ENDTX_Field_1 use
(Intenclr_Endtx_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for AUTOCOLRESSTARTED event
type INTENCLR_AUTOCOLRESSTARTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_AUTOCOLRESSTARTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for AUTOCOLRESSTARTED event
type INTENCLR_AUTOCOLRESSTARTED_Field_1 is
(-- Reset value for the field
Intenclr_Autocolresstarted_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_AUTOCOLRESSTARTED_Field_1 use
(Intenclr_Autocolresstarted_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for COLLISION event
type INTENCLR_COLLISION_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_COLLISION_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for COLLISION event
type INTENCLR_COLLISION_Field_1 is
(-- Reset value for the field
Intenclr_Collision_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_COLLISION_Field_1 use
(Intenclr_Collision_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for SELECTED event
type INTENCLR_SELECTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_SELECTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for SELECTED event
type INTENCLR_SELECTED_Field_1 is
(-- Reset value for the field
Intenclr_Selected_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_SELECTED_Field_1 use
(Intenclr_Selected_Field_Reset => 0,
Clear => 1);
-- Write '1' to Disable interrupt for STARTED event
type INTENCLR_STARTED_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_STARTED_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for STARTED event
type INTENCLR_STARTED_Field_1 is
(-- Reset value for the field
Intenclr_Started_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_STARTED_Field_1 use
(Intenclr_Started_Field_Reset => 0,
Clear => 1);
-- Disable interrupt
type INTENCLR_Register is record
-- Write '1' to Disable interrupt for READY event
READY : INTENCLR_READY_Field_1 :=
Intenclr_Ready_Field_Reset;
-- Write '1' to Disable interrupt for FIELDDETECTED event
FIELDDETECTED : INTENCLR_FIELDDETECTED_Field_1 :=
Intenclr_Fielddetected_Field_Reset;
-- Write '1' to Disable interrupt for FIELDLOST event
FIELDLOST : INTENCLR_FIELDLOST_Field_1 :=
Intenclr_Fieldlost_Field_Reset;
-- Write '1' to Disable interrupt for TXFRAMESTART event
TXFRAMESTART : INTENCLR_TXFRAMESTART_Field_1 :=
Intenclr_Txframestart_Field_Reset;
-- Write '1' to Disable interrupt for TXFRAMEEND event
TXFRAMEEND : INTENCLR_TXFRAMEEND_Field_1 :=
Intenclr_Txframeend_Field_Reset;
-- Write '1' to Disable interrupt for RXFRAMESTART event
RXFRAMESTART : INTENCLR_RXFRAMESTART_Field_1 :=
Intenclr_Rxframestart_Field_Reset;
-- Write '1' to Disable interrupt for RXFRAMEEND event
RXFRAMEEND : INTENCLR_RXFRAMEEND_Field_1 :=
Intenclr_Rxframeend_Field_Reset;
-- Write '1' to Disable interrupt for ERROR event
ERROR : INTENCLR_ERROR_Field_1 :=
Intenclr_Error_Field_Reset;
-- unspecified
Reserved_8_9 : HAL.UInt2 := 16#0#;
-- Write '1' to Disable interrupt for RXERROR event
RXERROR : INTENCLR_RXERROR_Field_1 :=
Intenclr_Rxerror_Field_Reset;
-- Write '1' to Disable interrupt for ENDRX event
ENDRX : INTENCLR_ENDRX_Field_1 :=
Intenclr_Endrx_Field_Reset;
-- Write '1' to Disable interrupt for ENDTX event
ENDTX : INTENCLR_ENDTX_Field_1 :=
Intenclr_Endtx_Field_Reset;
-- unspecified
Reserved_13_13 : HAL.Bit := 16#0#;
-- Write '1' to Disable interrupt for AUTOCOLRESSTARTED event
AUTOCOLRESSTARTED : INTENCLR_AUTOCOLRESSTARTED_Field_1 :=
Intenclr_Autocolresstarted_Field_Reset;
-- unspecified
Reserved_15_17 : HAL.UInt3 := 16#0#;
-- Write '1' to Disable interrupt for COLLISION event
COLLISION : INTENCLR_COLLISION_Field_1 :=
Intenclr_Collision_Field_Reset;
-- Write '1' to Disable interrupt for SELECTED event
SELECTED : INTENCLR_SELECTED_Field_1 :=
Intenclr_Selected_Field_Reset;
-- Write '1' to Disable interrupt for STARTED event
STARTED : INTENCLR_STARTED_Field_1 :=
Intenclr_Started_Field_Reset;
-- unspecified
Reserved_21_31 : HAL.UInt11 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for INTENCLR_Register use record
READY at 0 range 0 .. 0;
FIELDDETECTED at 0 range 1 .. 1;
FIELDLOST at 0 range 2 .. 2;
TXFRAMESTART at 0 range 3 .. 3;
TXFRAMEEND at 0 range 4 .. 4;
RXFRAMESTART at 0 range 5 .. 5;
RXFRAMEEND at 0 range 6 .. 6;
ERROR at 0 range 7 .. 7;
Reserved_8_9 at 0 range 8 .. 9;
RXERROR at 0 range 10 .. 10;
ENDRX at 0 range 11 .. 11;
ENDTX at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
AUTOCOLRESSTARTED at 0 range 14 .. 14;
Reserved_15_17 at 0 range 15 .. 17;
COLLISION at 0 range 18 .. 18;
SELECTED at 0 range 19 .. 19;
STARTED at 0 range 20 .. 20;
Reserved_21_31 at 0 range 21 .. 31;
end record;
-- NFC Error Status register
type ERRORSTATUS_Register is record
-- No STARTTX task triggered before expiration of the time set in
-- FRAMEDELAYMAX
FRAMEDELAYTIMEOUT : Boolean := False;
-- unspecified
Reserved_1_1 : HAL.Bit := 16#0#;
-- Field level is too high at max load resistance
NFCFIELDTOOSTRONG : Boolean := False;
-- Field level is too low at min load resistance
NFCFIELDTOOWEAK : Boolean := False;
-- unspecified
Reserved_4_31 : HAL.UInt28 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for ERRORSTATUS_Register use record
FRAMEDELAYTIMEOUT at 0 range 0 .. 0;
Reserved_1_1 at 0 range 1 .. 1;
NFCFIELDTOOSTRONG at 0 range 2 .. 2;
NFCFIELDTOOWEAK at 0 range 3 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
-------------------------------------
-- FRAMESTATUS cluster's Registers --
-------------------------------------
-- No valid End of Frame detected
type RX_CRCERROR_Field is
(-- Valid CRC detected
Crccorrect,
-- CRC received does not match local check
Crcerror)
with Size => 1;
for RX_CRCERROR_Field use
(Crccorrect => 0,
Crcerror => 1);
-- Parity status of received frame
type RX_PARITYSTATUS_Field is
(-- Frame received with parity OK
Parityok,
-- Frame received with parity error
Parityerror)
with Size => 1;
for RX_PARITYSTATUS_Field use
(Parityok => 0,
Parityerror => 1);
-- Overrun detected
type RX_OVERRUN_Field is
(-- No overrun detected
Nooverrun,
-- Overrun error
Overrun)
with Size => 1;
for RX_OVERRUN_Field use
(Nooverrun => 0,
Overrun => 1);
-- Result of last incoming frames
type RX_FRAMESTATUS_Register is record
-- No valid End of Frame detected
CRCERROR : RX_CRCERROR_Field := NRF_SVD.NFCT.Crccorrect;
-- unspecified
Reserved_1_1 : HAL.Bit := 16#0#;
-- Parity status of received frame
PARITYSTATUS : RX_PARITYSTATUS_Field := NRF_SVD.NFCT.Parityok;
-- Overrun detected
OVERRUN : RX_OVERRUN_Field := NRF_SVD.NFCT.Nooverrun;
-- unspecified
Reserved_4_31 : HAL.UInt28 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RX_FRAMESTATUS_Register use record
CRCERROR at 0 range 0 .. 0;
Reserved_1_1 at 0 range 1 .. 1;
PARITYSTATUS at 0 range 2 .. 2;
OVERRUN at 0 range 3 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
-- Unspecified
type FRAMESTATUS_Cluster is record
-- Result of last incoming frames
RX : aliased RX_FRAMESTATUS_Register;
end record
with Size => 32;
for FRAMESTATUS_Cluster use record
RX at 0 range 0 .. 31;
end record;
subtype CURRENTLOADCTRL_CURRENTLOADCTRL_Field is HAL.UInt6;
-- Current value driven to the NFC Load Control
type CURRENTLOADCTRL_Register is record
-- Read-only. Current value driven to the NFC Load Control
CURRENTLOADCTRL : CURRENTLOADCTRL_CURRENTLOADCTRL_Field;
-- unspecified
Reserved_6_31 : HAL.UInt26;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CURRENTLOADCTRL_Register use record
CURRENTLOADCTRL at 0 range 0 .. 5;
Reserved_6_31 at 0 range 6 .. 31;
end record;
-- Indicates the presence or not of a valid field. Available only in the
-- activated state.
type FIELDPRESENT_FIELDPRESENT_Field is
(-- No valid field detected
Nofield,
-- Valid field detected
Fieldpresent)
with Size => 1;
for FIELDPRESENT_FIELDPRESENT_Field use
(Nofield => 0,
Fieldpresent => 1);
-- Indicates if the low level has locked to the field
type FIELDPRESENT_LOCKDETECT_Field is
(-- Not locked to field
Notlocked,
-- Locked to field
Locked)
with Size => 1;
for FIELDPRESENT_LOCKDETECT_Field use
(Notlocked => 0,
Locked => 1);
-- Indicates the presence or not of a valid field
type FIELDPRESENT_Register is record
-- Read-only. Indicates the presence or not of a valid field. Available
-- only in the activated state.
FIELDPRESENT : FIELDPRESENT_FIELDPRESENT_Field;
-- Read-only. Indicates if the low level has locked to the field
LOCKDETECT : FIELDPRESENT_LOCKDETECT_Field;
-- unspecified
Reserved_2_31 : HAL.UInt30;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for FIELDPRESENT_Register use record
FIELDPRESENT at 0 range 0 .. 0;
LOCKDETECT at 0 range 1 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
subtype FRAMEDELAYMIN_FRAMEDELAYMIN_Field is HAL.UInt16;
-- Minimum frame delay
type FRAMEDELAYMIN_Register is record
-- Minimum frame delay in number of 13.56 MHz clocks
FRAMEDELAYMIN : FRAMEDELAYMIN_FRAMEDELAYMIN_Field := 16#480#;
-- unspecified
Reserved_16_31 : HAL.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for FRAMEDELAYMIN_Register use record
FRAMEDELAYMIN at 0 range 0 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype FRAMEDELAYMAX_FRAMEDELAYMAX_Field is HAL.UInt16;
-- Maximum frame delay
type FRAMEDELAYMAX_Register is record
-- Maximum frame delay in number of 13.56 MHz clocks
FRAMEDELAYMAX : FRAMEDELAYMAX_FRAMEDELAYMAX_Field := 16#1000#;
-- unspecified
Reserved_16_31 : HAL.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for FRAMEDELAYMAX_Register use record
FRAMEDELAYMAX at 0 range 0 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
-- Configuration register for the Frame Delay Timer
type FRAMEDELAYMODE_FRAMEDELAYMODE_Field is
(-- Transmission is independent of frame timer and will start when the STARTTX
-- task is triggered. No timeout.
Freerun,
-- Frame is transmitted between FRAMEDELAYMIN and FRAMEDELAYMAX
Window,
-- Frame is transmitted exactly at FRAMEDELAYMAX
Exactval,
-- Frame is transmitted on a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX
Windowgrid)
with Size => 2;
for FRAMEDELAYMODE_FRAMEDELAYMODE_Field use
(Freerun => 0,
Window => 1,
Exactval => 2,
Windowgrid => 3);
-- Configuration register for the Frame Delay Timer
type FRAMEDELAYMODE_Register is record
-- Configuration register for the Frame Delay Timer
FRAMEDELAYMODE : FRAMEDELAYMODE_FRAMEDELAYMODE_Field :=
NRF_SVD.NFCT.Window;
-- unspecified
Reserved_2_31 : HAL.UInt30 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for FRAMEDELAYMODE_Register use record
FRAMEDELAYMODE at 0 range 0 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
subtype MAXLEN_MAXLEN_Field is HAL.UInt9;
-- Size of allocated for TXD and RXD data storage buffer in Data RAM
type MAXLEN_Register is record
-- Size of allocated for TXD and RXD data storage buffer in Data RAM
MAXLEN : MAXLEN_MAXLEN_Field := 16#0#;
-- unspecified
Reserved_9_31 : HAL.UInt23 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for MAXLEN_Register use record
MAXLEN at 0 range 0 .. 8;
Reserved_9_31 at 0 range 9 .. 31;
end record;
-----------------------------
-- TXD cluster's Registers --
-----------------------------
-- Adding parity or not in the frame
type FRAMECONFIG_PARITY_Field is
(-- Parity is not added in TX frames
Noparity,
-- Parity is added TX frames
Parity)
with Size => 1;
for FRAMECONFIG_PARITY_Field use
(Noparity => 0,
Parity => 1);
-- Discarding unused bits in start or at end of a Frame
type FRAMECONFIG_DISCARDMODE_Field is
(-- Unused bits is discarded at end of frame
Discardend,
-- Unused bits is discarded at start of frame
Discardstart)
with Size => 1;
for FRAMECONFIG_DISCARDMODE_Field use
(Discardend => 0,
Discardstart => 1);
-- Adding SoF or not in TX frames
type FRAMECONFIG_SOF_Field is
(-- Start of Frame symbol not added
Nosof,
-- Start of Frame symbol added
Sof)
with Size => 1;
for FRAMECONFIG_SOF_Field use
(Nosof => 0,
Sof => 1);
-- CRC mode for outgoing frames
type FRAMECONFIG_CRCMODETX_Field is
(-- CRC is not added to the frame
Nocrctx,
-- 16 bit CRC added to the frame based on all the data read from RAM that is
-- used in the frame
Crc16Tx)
with Size => 1;
for FRAMECONFIG_CRCMODETX_Field use
(Nocrctx => 0,
Crc16Tx => 1);
-- Configuration of outgoing frames
type FRAMECONFIG_TXD_Register is record
-- Adding parity or not in the frame
PARITY : FRAMECONFIG_PARITY_Field := NRF_SVD.NFCT.Parity;
-- Discarding unused bits in start or at end of a Frame
DISCARDMODE : FRAMECONFIG_DISCARDMODE_Field :=
NRF_SVD.NFCT.Discardstart;
-- Adding SoF or not in TX frames
SOF : FRAMECONFIG_SOF_Field := NRF_SVD.NFCT.Sof;
-- unspecified
Reserved_3_3 : HAL.Bit := 16#0#;
-- CRC mode for outgoing frames
CRCMODETX : FRAMECONFIG_CRCMODETX_Field := NRF_SVD.NFCT.Crc16Tx;
-- unspecified
Reserved_5_31 : HAL.UInt27 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for FRAMECONFIG_TXD_Register use record
PARITY at 0 range 0 .. 0;
DISCARDMODE at 0 range 1 .. 1;
SOF at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
CRCMODETX at 0 range 4 .. 4;
Reserved_5_31 at 0 range 5 .. 31;
end record;
subtype AMOUNT_TXD_TXDATABITS_Field is HAL.UInt3;
subtype AMOUNT_TXD_TXDATABYTES_Field is HAL.UInt9;
-- Size of outgoing frame
type AMOUNT_TXD_Register is record
-- Number of bits in the last or first byte read from RAM that shall be
-- included in the frame (excluding parity bit).
TXDATABITS : AMOUNT_TXD_TXDATABITS_Field := 16#0#;
-- Number of complete bytes that shall be included in the frame,
-- excluding CRC, parity and framing
TXDATABYTES : AMOUNT_TXD_TXDATABYTES_Field := 16#0#;
-- unspecified
Reserved_12_31 : HAL.UInt20 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AMOUNT_TXD_Register use record
TXDATABITS at 0 range 0 .. 2;
TXDATABYTES at 0 range 3 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
-- Unspecified
type TXD_Cluster is record
-- Configuration of outgoing frames
FRAMECONFIG : aliased FRAMECONFIG_TXD_Register;
-- Size of outgoing frame
AMOUNT : aliased AMOUNT_TXD_Register;
end record
with Size => 64;
for TXD_Cluster use record
FRAMECONFIG at 16#0# range 0 .. 31;
AMOUNT at 16#4# range 0 .. 31;
end record;
-----------------------------
-- RXD cluster's Registers --
-----------------------------
-- CRC mode for incoming frames
type FRAMECONFIG_CRCMODERX_Field is
(-- CRC is not expected in RX frames
Nocrcrx,
-- Last 16 bits in RX frame is CRC, CRC is checked and CRCSTATUS updated
Crc16Rx)
with Size => 1;
for FRAMECONFIG_CRCMODERX_Field use
(Nocrcrx => 0,
Crc16Rx => 1);
-- Configuration of incoming frames
type FRAMECONFIG_RXD_Register is record
-- Parity expected or not in RX frame
PARITY : FRAMECONFIG_PARITY_Field := NRF_SVD.NFCT.Parity;
-- unspecified
Reserved_1_1 : HAL.Bit := 16#0#;
-- SoF expected or not in RX frames
SOF : FRAMECONFIG_SOF_Field := NRF_SVD.NFCT.Sof;
-- unspecified
Reserved_3_3 : HAL.Bit := 16#0#;
-- CRC mode for incoming frames
CRCMODERX : FRAMECONFIG_CRCMODERX_Field := NRF_SVD.NFCT.Crc16Rx;
-- unspecified
Reserved_5_31 : HAL.UInt27 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for FRAMECONFIG_RXD_Register use record
PARITY at 0 range 0 .. 0;
Reserved_1_1 at 0 range 1 .. 1;
SOF at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
CRCMODERX at 0 range 4 .. 4;
Reserved_5_31 at 0 range 5 .. 31;
end record;
subtype AMOUNT_RXD_RXDATABITS_Field is HAL.UInt3;
subtype AMOUNT_RXD_RXDATABYTES_Field is HAL.UInt9;
-- Size of last incoming frame
type AMOUNT_RXD_Register is record
-- Read-only. Number of bits in the last byte in the frame, if less than
-- 8 (including CRC, but excluding parity and SoF/EoF framing).
RXDATABITS : AMOUNT_RXD_RXDATABITS_Field;
-- Read-only. Number of complete bytes received in the frame (including
-- CRC, but excluding parity and SoF/EoF framing)
RXDATABYTES : AMOUNT_RXD_RXDATABYTES_Field;
-- unspecified
Reserved_12_31 : HAL.UInt20;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AMOUNT_RXD_Register use record
RXDATABITS at 0 range 0 .. 2;
RXDATABYTES at 0 range 3 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
-- Unspecified
type RXD_Cluster is record
-- Configuration of incoming frames
FRAMECONFIG : aliased FRAMECONFIG_RXD_Register;
-- Size of last incoming frame
AMOUNT : aliased AMOUNT_RXD_Register;
end record
with Size => 64;
for RXD_Cluster use record
FRAMECONFIG at 16#0# range 0 .. 31;
AMOUNT at 16#4# range 0 .. 31;
end record;
subtype NFCID1_LAST_NFCID1_Z_Field is HAL.UInt8;
subtype NFCID1_LAST_NFCID1_Y_Field is HAL.UInt8;
subtype NFCID1_LAST_NFCID1_X_Field is HAL.UInt8;
subtype NFCID1_LAST_NFCID1_W_Field is HAL.UInt8;
-- Last NFCID1 part (4, 7 or 10 bytes ID)
type NFCID1_LAST_Register is record
-- NFCID1 byte Z (very last byte sent)
NFCID1_Z : NFCID1_LAST_NFCID1_Z_Field := 16#63#;
-- NFCID1 byte Y
NFCID1_Y : NFCID1_LAST_NFCID1_Y_Field := 16#63#;
-- NFCID1 byte X
NFCID1_X : NFCID1_LAST_NFCID1_X_Field := 16#0#;
-- NFCID1 byte W
NFCID1_W : NFCID1_LAST_NFCID1_W_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for NFCID1_LAST_Register use record
NFCID1_Z at 0 range 0 .. 7;
NFCID1_Y at 0 range 8 .. 15;
NFCID1_X at 0 range 16 .. 23;
NFCID1_W at 0 range 24 .. 31;
end record;
subtype NFCID1_2ND_LAST_NFCID1_V_Field is HAL.UInt8;
subtype NFCID1_2ND_LAST_NFCID1_U_Field is HAL.UInt8;
subtype NFCID1_2ND_LAST_NFCID1_T_Field is HAL.UInt8;
-- Second last NFCID1 part (7 or 10 bytes ID)
type NFCID1_2ND_LAST_Register is record
-- NFCID1 byte V
NFCID1_V : NFCID1_2ND_LAST_NFCID1_V_Field := 16#0#;
-- NFCID1 byte U
NFCID1_U : NFCID1_2ND_LAST_NFCID1_U_Field := 16#0#;
-- NFCID1 byte T
NFCID1_T : NFCID1_2ND_LAST_NFCID1_T_Field := 16#0#;
-- unspecified
Reserved_24_31 : HAL.UInt8 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for NFCID1_2ND_LAST_Register use record
NFCID1_V at 0 range 0 .. 7;
NFCID1_U at 0 range 8 .. 15;
NFCID1_T at 0 range 16 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
subtype NFCID1_3RD_LAST_NFCID1_S_Field is HAL.UInt8;
subtype NFCID1_3RD_LAST_NFCID1_R_Field is HAL.UInt8;
subtype NFCID1_3RD_LAST_NFCID1_Q_Field is HAL.UInt8;
-- Third last NFCID1 part (10 bytes ID)
type NFCID1_3RD_LAST_Register is record
-- NFCID1 byte S
NFCID1_S : NFCID1_3RD_LAST_NFCID1_S_Field := 16#0#;
-- NFCID1 byte R
NFCID1_R : NFCID1_3RD_LAST_NFCID1_R_Field := 16#0#;
-- NFCID1 byte Q
NFCID1_Q : NFCID1_3RD_LAST_NFCID1_Q_Field := 16#0#;
-- unspecified
Reserved_24_31 : HAL.UInt8 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for NFCID1_3RD_LAST_Register use record
NFCID1_S at 0 range 0 .. 7;
NFCID1_R at 0 range 8 .. 15;
NFCID1_Q at 0 range 16 .. 23;
Reserved_24_31 at 0 range 24 .. 31;
end record;
-- Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in
-- the NFC Forum, NFC Digital Protocol Technical Specification
type SENSRES_BITFRAMESDD_Field is
(-- SDD pattern 00000
Sdd00000,
-- SDD pattern 00001
Sdd00001,
-- SDD pattern 00010
Sdd00010,
-- SDD pattern 00100
Sdd00100,
-- SDD pattern 01000
Sdd01000,
-- SDD pattern 10000
Sdd10000)
with Size => 5;
for SENSRES_BITFRAMESDD_Field use
(Sdd00000 => 0,
Sdd00001 => 1,
Sdd00010 => 2,
Sdd00100 => 4,
Sdd01000 => 8,
Sdd10000 => 16);
-- NFCID1 size. This value is used by the Auto collision resolution engine.
type SENSRES_NFCIDSIZE_Field is
(-- NFCID1 size: single (4 bytes)
Nfcid1Single,
-- NFCID1 size: double (7 bytes)
Nfcid1Double,
-- NFCID1 size: triple (10 bytes)
Nfcid1Triple)
with Size => 2;
for SENSRES_NFCIDSIZE_Field use
(Nfcid1Single => 0,
Nfcid1Double => 1,
Nfcid1Triple => 2);
subtype SENSRES_PLATFCONFIG_Field is HAL.UInt4;
subtype SENSRES_RFU74_Field is HAL.UInt4;
-- NFC-A SENS_RES auto-response settings
type SENSRES_Register is record
-- Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response
-- in the NFC Forum, NFC Digital Protocol Technical Specification
BITFRAMESDD : SENSRES_BITFRAMESDD_Field := NRF_SVD.NFCT.Sdd00001;
-- Reserved for future use. Shall be 0.
RFU5 : Boolean := False;
-- NFCID1 size. This value is used by the Auto collision resolution
-- engine.
NFCIDSIZE : SENSRES_NFCIDSIZE_Field := NRF_SVD.NFCT.Nfcid1Single;
-- Tag platform configuration as defined by the b4:b1 of byte 2 in
-- SENS_RES response in the NFC Forum, NFC Digital Protocol Technical
-- Specification
PLATFCONFIG : SENSRES_PLATFCONFIG_Field := 16#0#;
-- Reserved for future use. Shall be 0.
RFU74 : SENSRES_RFU74_Field := 16#0#;
-- unspecified
Reserved_16_31 : HAL.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SENSRES_Register use record
BITFRAMESDD at 0 range 0 .. 4;
RFU5 at 0 range 5 .. 5;
NFCIDSIZE at 0 range 6 .. 7;
PLATFCONFIG at 0 range 8 .. 11;
RFU74 at 0 range 12 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype SELRES_RFU10_Field is HAL.UInt2;
-- Cascade bit (controlled by hardware, write has no effect)
type SELRES_CASCADE_Field is
(-- NFCID1 complete
Complete,
-- NFCID1 not complete
Notcomplete)
with Size => 1;
for SELRES_CASCADE_Field use
(Complete => 0,
Notcomplete => 1);
subtype SELRES_RFU43_Field is HAL.UInt2;
subtype SELRES_PROTOCOL_Field is HAL.UInt2;
-- NFC-A SEL_RES auto-response settings
type SELRES_Register is record
-- Reserved for future use. Shall be 0.
RFU10 : SELRES_RFU10_Field := 16#0#;
-- Cascade bit (controlled by hardware, write has no effect)
CASCADE : SELRES_CASCADE_Field := NRF_SVD.NFCT.Complete;
-- Reserved for future use. Shall be 0.
RFU43 : SELRES_RFU43_Field := 16#0#;
-- Protocol as defined by the b7:b6 of SEL_RES response in the NFC
-- Forum, NFC Digital Protocol Technical Specification
PROTOCOL : SELRES_PROTOCOL_Field := 16#0#;
-- Reserved for future use. Shall be 0.
RFU7 : Boolean := False;
-- unspecified
Reserved_8_31 : HAL.UInt24 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SELRES_Register use record
RFU10 at 0 range 0 .. 1;
CASCADE at 0 range 2 .. 2;
RFU43 at 0 range 3 .. 4;
PROTOCOL at 0 range 5 .. 6;
RFU7 at 0 range 7 .. 7;
Reserved_8_31 at 0 range 8 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- NFC-A compatible radio
type NFCT_Peripheral is record
-- Activate NFC peripheral for incoming and outgoing frames, change
-- state to activated
TASKS_ACTIVATE : aliased HAL.UInt32;
-- Disable NFC peripheral
TASKS_DISABLE : aliased HAL.UInt32;
-- Enable NFC sense field mode, change state to sense mode
TASKS_SENSE : aliased HAL.UInt32;
-- Start transmission of a outgoing frame, change state to transmit
TASKS_STARTTX : aliased HAL.UInt32;
-- Initializes the EasyDMA for receive.
TASKS_ENABLERXDATA : aliased HAL.UInt32;
-- Force state machine to IDLE state
TASKS_GOIDLE : aliased HAL.UInt32;
-- Force state machine to SLEEP_A state
TASKS_GOSLEEP : aliased HAL.UInt32;
-- The NFC peripheral is ready to receive and send frames
EVENTS_READY : aliased HAL.UInt32;
-- Remote NFC field detected
EVENTS_FIELDDETECTED : aliased HAL.UInt32;
-- Remote NFC field lost
EVENTS_FIELDLOST : aliased HAL.UInt32;
-- Marks the start of the first symbol of a transmitted frame
EVENTS_TXFRAMESTART : aliased HAL.UInt32;
-- Marks the end of the last transmitted on-air symbol of a frame
EVENTS_TXFRAMEEND : aliased HAL.UInt32;
-- Marks the end of the first symbol of a received frame
EVENTS_RXFRAMESTART : aliased HAL.UInt32;
-- Received data have been checked (CRC, parity) and transferred to RAM,
-- and EasyDMA has ended accessing the RX buffer
EVENTS_RXFRAMEEND : aliased HAL.UInt32;
-- NFC error reported. The ERRORSTATUS register contains details on the
-- source of the error.
EVENTS_ERROR : aliased HAL.UInt32;
-- NFC RX frame error reported. The FRAMESTATUS.RX register contains
-- details on the source of the error.
EVENTS_RXERROR : aliased HAL.UInt32;
-- RX buffer (as defined by PACKETPTR and MAXLEN) in Data RAM full.
EVENTS_ENDRX : aliased HAL.UInt32;
-- Transmission of data in RAM has ended, and EasyDMA has ended
-- accessing the TX buffer
EVENTS_ENDTX : aliased HAL.UInt32;
-- Auto collision resolution process has started
EVENTS_AUTOCOLRESSTARTED : aliased HAL.UInt32;
-- NFC Auto collision resolution error reported.
EVENTS_COLLISION : aliased HAL.UInt32;
-- NFC Auto collision resolution successfully completed
EVENTS_SELECTED : aliased HAL.UInt32;
-- EasyDMA is ready to receive or send frames.
EVENTS_STARTED : aliased HAL.UInt32;
-- Shortcut register
SHORTS : aliased SHORTS_Register;
-- Enable or disable interrupt
INTEN : aliased INTEN_Register;
-- Enable interrupt
INTENSET : aliased INTENSET_Register;
-- Disable interrupt
INTENCLR : aliased INTENCLR_Register;
-- NFC Error Status register
ERRORSTATUS : aliased ERRORSTATUS_Register;
-- Unspecified
FRAMESTATUS : aliased FRAMESTATUS_Cluster;
-- Current value driven to the NFC Load Control
CURRENTLOADCTRL : aliased CURRENTLOADCTRL_Register;
-- Indicates the presence or not of a valid field
FIELDPRESENT : aliased FIELDPRESENT_Register;
-- Minimum frame delay
FRAMEDELAYMIN : aliased FRAMEDELAYMIN_Register;
-- Maximum frame delay
FRAMEDELAYMAX : aliased FRAMEDELAYMAX_Register;
-- Configuration register for the Frame Delay Timer
FRAMEDELAYMODE : aliased FRAMEDELAYMODE_Register;
-- Packet pointer for TXD and RXD data storage in Data RAM
PACKETPTR : aliased HAL.UInt32;
-- Size of allocated for TXD and RXD data storage buffer in Data RAM
MAXLEN : aliased MAXLEN_Register;
-- Unspecified
TXD : aliased TXD_Cluster;
-- Unspecified
RXD : aliased RXD_Cluster;
-- Last NFCID1 part (4, 7 or 10 bytes ID)
NFCID1_LAST : aliased NFCID1_LAST_Register;
-- Second last NFCID1 part (7 or 10 bytes ID)
NFCID1_2ND_LAST : aliased NFCID1_2ND_LAST_Register;
-- Third last NFCID1 part (10 bytes ID)
NFCID1_3RD_LAST : aliased NFCID1_3RD_LAST_Register;
-- NFC-A SENS_RES auto-response settings
SENSRES : aliased SENSRES_Register;
-- NFC-A SEL_RES auto-response settings
SELRES : aliased SELRES_Register;
end record
with Volatile;
for NFCT_Peripheral use record
TASKS_ACTIVATE at 16#0# range 0 .. 31;
TASKS_DISABLE at 16#4# range 0 .. 31;
TASKS_SENSE at 16#8# range 0 .. 31;
TASKS_STARTTX at 16#C# range 0 .. 31;
TASKS_ENABLERXDATA at 16#1C# range 0 .. 31;
TASKS_GOIDLE at 16#24# range 0 .. 31;
TASKS_GOSLEEP at 16#28# range 0 .. 31;
EVENTS_READY at 16#100# range 0 .. 31;
EVENTS_FIELDDETECTED at 16#104# range 0 .. 31;
EVENTS_FIELDLOST at 16#108# range 0 .. 31;
EVENTS_TXFRAMESTART at 16#10C# range 0 .. 31;
EVENTS_TXFRAMEEND at 16#110# range 0 .. 31;
EVENTS_RXFRAMESTART at 16#114# range 0 .. 31;
EVENTS_RXFRAMEEND at 16#118# range 0 .. 31;
EVENTS_ERROR at 16#11C# range 0 .. 31;
EVENTS_RXERROR at 16#128# range 0 .. 31;
EVENTS_ENDRX at 16#12C# range 0 .. 31;
EVENTS_ENDTX at 16#130# range 0 .. 31;
EVENTS_AUTOCOLRESSTARTED at 16#138# range 0 .. 31;
EVENTS_COLLISION at 16#148# range 0 .. 31;
EVENTS_SELECTED at 16#14C# range 0 .. 31;
EVENTS_STARTED at 16#150# range 0 .. 31;
SHORTS at 16#200# range 0 .. 31;
INTEN at 16#300# range 0 .. 31;
INTENSET at 16#304# range 0 .. 31;
INTENCLR at 16#308# range 0 .. 31;
ERRORSTATUS at 16#404# range 0 .. 31;
FRAMESTATUS at 16#40C# range 0 .. 31;
CURRENTLOADCTRL at 16#430# range 0 .. 31;
FIELDPRESENT at 16#43C# range 0 .. 31;
FRAMEDELAYMIN at 16#504# range 0 .. 31;
FRAMEDELAYMAX at 16#508# range 0 .. 31;
FRAMEDELAYMODE at 16#50C# range 0 .. 31;
PACKETPTR at 16#510# range 0 .. 31;
MAXLEN at 16#514# range 0 .. 31;
TXD at 16#518# range 0 .. 63;
RXD at 16#520# range 0 .. 63;
NFCID1_LAST at 16#590# range 0 .. 31;
NFCID1_2ND_LAST at 16#594# range 0 .. 31;
NFCID1_3RD_LAST at 16#598# range 0 .. 31;
SENSRES at 16#5A0# range 0 .. 31;
SELRES at 16#5A4# range 0 .. 31;
end record;
-- NFC-A compatible radio
NFCT_Periph : aliased NFCT_Peripheral
with Import, Address => NFCT_Base;
end NRF_SVD.NFCT;
|
Sources/Globe_3d/gl/gl-buffer.ads | ForYouEyesOnly/Space-Convoy | 1 | 27068 | -------------------------------------------------------------------------
-- GL.Geometry - GL vertex buffer Object
--
-- Copyright (c) <NAME> 2007
-- AUSTRALIA
-- Permission granted to use this software, without any warranty,
-- for any purpose, provided this copyright note remains attached
-- and unmodified if sources are distributed further.
-------------------------------------------------------------------------
-- with GL.Geometry;
-- with GL.Textures;
package GL.Buffer is
subtype vbo_Name is GL.Uint; -- an openGL vertex buffer 'name', which is a natural integer.
-- buffer object
--
type Object is abstract tagged private;
procedure Enable (Self : Object'Class);
procedure Destroy (Self : in out Object'Class);
function Extract_VBO_Target (Self : Object) return GL.VBO_Target is abstract;
-- 'array' and 'element array' base classes
--
type array_Object is new Object with private;
type element_array_Object is new Object with private;
-- refer to child packages, for specific buffers:
--
-- - GL.Buffer.vertex
-- - GL.Buffer.texture_coords
-- - GL.Buffer.normals
-- - GL.Buffer.indices
--
-- (tbd : pixel pack/unpack buffers)
no_platform_Support : exception;
--
-- raised by buffer 'Map' functions when OS platform does not support GL Buffer objects.
private
type Object is abstract tagged
record
Name : aliased vbo_Name := 0;
Length : Positive;
end record;
overriding function Extract_VBO_Target (Self : array_Object) return GL.VBO_Target;
overriding function Extract_VBO_Target (Self : element_array_Object) return GL.VBO_Target;
type array_Object is new Object with null record;
type element_array_Object is new Object with null record;
type vertex_buffer_Object is new array_Object with null record;
-- support
procedure Verify_Name (Self : in out Object'Class);
end GL.Buffer;
|
lib/target/lambda/classic/lambda_altint.asm | jpoikela/z88dk | 640 | 96178 | ; CRT0 for the LAMBDA 8300 - SLOW MODE
;
;
; ----------------------------------------------------------------------------------------
; Modified display handler to preserve IY
; Note: a swap between IX and IY happens "on the fly" during assembly !
; ----------------------------------------------------------------------------------------
;
; <NAME> August 2015
;
; - - - - - - -
;
; $Id: lambda_altint.def,v 1.1 2015-08-04 06:48:23 stefano Exp $
;
; - - - - - - -
;--------------------------------------------------------------
;--------------------------------------------------------------
PUBLIC altint_on
PUBLIC altint_off
PUBLIC zx_fast
PUBLIC zx_slow
;----------------------------------------------------------------
;
; Enter in FAST mode
;
;----------------------------------------------------------------
zx_fast:
call restore81
jp $D5E ; FAST !
;--------------------------------------------------------------
;========
; Not HRG really, but switches the new interrupt handler with no sighs
;========
zx_slow:
altint_on:
call restore81
call $12A5 ; SLOW
ld hl,L0281
HRG_Sync:
push hl
ld a,(16443) ; test CDFLAG
and 128 ; is in FAST mode ?
jr z,nosync
ld hl,$4034 ; FRAMES counter
ld a,(hl) ; get old FRAMES
HRG_Sync1:
cp (hl) ; compare to new FRAMES
jr z,HRG_Sync1 ; exit after a change is detected
nosync:
pop iy ; switch to new display handler
ret
;--------------------------------------------------------------
altint_off:
call altint_on ; restore registers and make sure we are in SLOW mode
ld hl,$1323 ; on the ZX81 this was $0281
jr HRG_Sync
;--------------------------------------------------------------
;--------------------------------------------------------------
INCLUDE "target/lambda/classic/lambda_altint_core.asm"
|
non_regression/basic_x86_macosx.intel.s.asm | LRGH/plasmasm | 1 | 23591 | .intel_syntax noprefix
.build_version macos, 10, 14 sdk_version 10, 14
.section __TEXT,__text,regular,pure_instructions
.p2align 4, 0x90
# ----------------------
.globl _main
_main:
push ebp
mov ebp, esp
sub esp, 12
mov eax, DWORD PTR [ebp+12]
mov ecx, DWORD PTR [ebp+8]
mov DWORD PTR [ebp-4], 0
mov DWORD PTR [ebp-8], eax
mov DWORD PTR [ebp-12], ecx
LBB0_1:
cmp DWORD PTR [ebp+8], 1
jle LBB0_6
mov eax, DWORD PTR [ebp+8]
cdq
mov ecx, 2
idiv ecx
cmp edx, 0
je LBB0_4
mov eax, DWORD PTR [ebp+8]
cdq
mov ecx, 2
idiv ecx
mov DWORD PTR [ebp+8], eax
jmp LBB0_5
LBB0_4:
imul eax, DWORD PTR [ebp+8], 3
add eax, 1
mov DWORD PTR [ebp+8], eax
LBB0_5:
jmp LBB0_1
LBB0_6:
mov eax, DWORD PTR [ebp+8]
add esp, 12
pop ebp
ret
# ----------------------
.subsections_via_symbols
|
book-01/Assembly/asm/avx/packed/avx_p_convert_float_to_byte_0_255_range.asm | gfurtadoalmeida/study-assembly-x64 | 2 | 15973 | <reponame>gfurtadoalmeida/study-assembly-x64
include macros.inc
include comparison_predicates.inc
.const
align 16
FloatToUint8Min real4 0.0, 0.0, 0.0, 0.0
FloatToUint8Max real4 1.0, 1.0, 1.0, 1.0
FloatToUint8Scale real4 255.0, 255.0, 255.0, 255.0
Uint8Min dword 0
Uint8Max dword 255
.code
; bool AVX_Packed_Convert_Float_To_Byte_0_255_Range(const float* input, uint32_t arrayLength, uint8_t * output);
AVX_Packed_Convert_Float_To_Byte_0_255_Range proc frame
_CreateFrame F2U_, 0, 96
_SaveXmmRegs xmm6, xmm7, xmm12, xmm13, xmm14, xmm15
_EndProlog
xor eax, eax
test rdx, rdx ; Exit if arrayLenght == 0
jz InvalidArg
test rcx, 0fh ; Exit if not aligned
jnz InvalidArg
test r8, 0fh ; Exit if not aligned
jnz InvalidArg
; Initializations
mov r9, rdx
shr r9d, 2 ; arrayLength >> 2 = arrayLength % 4 = Number of blocks with 4 items
vpxor xmm1, xmm1, xmm1 ; Just zeros
vmovaps xmm13, xmmword ptr [FloatToUint8Scale]
vmovaps xmm14, xmmword ptr [FloatToUint8Min]
vmovaps xmm15, xmmword ptr [FloatToUint8Max]
test r9, r9 ; Do one by one number of blocks is zero
jz OneByOne
@@:
vmovaps xmm0, xmmword ptr [rcx] ; xmm0 have 4 floats
; Values < 0.0F = 0.0F
vcmpps xmm1, xmm0, xmm14, CMP_LT_OS
vandnps xmm2, xmm1, xmm0
; Values > 1.0F = 1.0F
vcmpps xmm3, xmm2, xmm15, CMP_GT_OS
vandps xmm4, xmm3, xmm15
vandnps xmm5, xmm3, xmm2
vorps xmm6, xmm5, xmm4
; Values = values * 255.0F
vmulps xmm7, xmm6, xmm13
; Convert 4 floats to 4 int32_t
vcvtps2dq xmm0, xmm7
; Convert 4 int32_t to 8 uint16_t
; 127 0
; xmm1 = xmm0[3] xmm0[2] xmm0[1] xmm0[0] xmm0[3] xmm0[2] xmm0[1] xmm0[0]
; It's safe to do because the values will never go beyond 255
vpackusdw xmm1, xmm0, xmm0
; Convert 8 uint16_t to 16 uint8_t
; 127 0
; xmm1 = xmm0[3] xmm0[2] xmm0[1] xmm0[0] ... xmm0[3] xmm0[2] xmm0[1] xmm0[0]
; It's safe to do because the values will never go beyond 255
vpackuswb xmm2, xmm1, xmm1
vpextrd eax, xmm2, 0 ; Get the 4 uint_8 converted number (32 bits)
mov dword ptr [r8], eax
add rcx, 16 ; Advance to the next 16 bytes (4 items * sizeof(float))
add r8, type dword
sub rdx, 4
sub r9d, 1
jnz @B
OneByOne:
test rdx, rdx
jz Done
; Get next number.
; Multiply it by uint8_t max value.
; Convert it to int32_t.
vmovss xmm1, real4 ptr [rcx]
vmulss xmm2, xmm1, real4 ptr [FloatToUint8Scale]
vcvtss2si eax, xmm2
; Value < 0 = 0
cmp eax, 0
cmovb eax, dword ptr [Uint8Min]
; Value > 255 = 255
cmp eax, 255
cmova eax, dword ptr [Uint8Max]
mov byte ptr [r8], al
add rcx, type real4 ; Advance to the next number
add r8, type byte
dec rdx
jnz OneByOne
Done:
mov rax, 1
InvalidArg:
_RestoreXmmRegs xmm6, xmm7, xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
_DeleteFrame
ret
AVX_Packed_Convert_Float_To_Byte_0_255_Range endp
end |
MicroProcessor Lab Programs/4A.asm | MyCollegeForums/4thSemISE | 0 | 92256 | <reponame>MyCollegeForums/4thSemISE<filename>MicroProcessor Lab Programs/4A.asm<gh_stars>0
assume cs:code,ds:data
data segment
str1 db 'madam'
n dw n – str1
str2 db 5 dup(?)
msg1 db "pallindrome$"
msg2 db "not a palindrome$"
data ends
code segment
start:
mov ax,data
mov ds,ax
mov es,ax ; please observe this !!!!!!
mov cx,n
lea si,n ; a simple trick to make si pointing to last character of main string
dec si
lea di,str2
nextchar:mov al,[si]
mov [di],al
dec si
inc di
loop nextchar
lea si,str1
lea di,str2
cld ; so that si and di will be incremented
mov cx,n
rep cmpsb
jnz unsuccess
lea dx,msg1
jmp disp
unsuccess:lea dx,msg2
disp:mov ah,9h
int 21h
mov ah,07h
int 21h
code ends
end start
|
alloy4fun_models/trashltl/models/19/XuKjSo4GygsfGuWR5.als | Kaixi26/org.alloytools.alloy | 0 | 4548 | open main
pred idXuKjSo4GygsfGuWR5_prop20 {
always (all f:File | f in Trash since f not in Protected)
}
pred __repair { idXuKjSo4GygsfGuWR5_prop20 }
check __repair { idXuKjSo4GygsfGuWR5_prop20 <=> prop20o } |
audio/music/route30.asm | Dev727/ancientplatinum | 28 | 12868 | <filename>audio/music/route30.asm
Music_Route30:
musicheader 4, 1, Music_Route30_Ch1
musicheader 1, 2, Music_Route30_Ch2
musicheader 1, 3, Music_Route30_Ch3
musicheader 1, 4, Music_Route30_Ch4
Music_Route30_Ch1:
tempo 144
volume $77
dutycycle $3
tone $0001
vibrato $10, $15
stereopanning $f0
notetype $c, $b2
octave 3
note D_, 6
note D_, 1
note D_, 1
note D_, 2
note D_, 2
note D_, 4
note D_, 6
note D_, 1
note D_, 1
note D_, 2
note D_, 2
intensity $4e
note C_, 4
Music_Route30_branch_efc2e:
intensity $b6
note D_, 6
intensity $b4
octave 2
note B_, 2
octave 3
note F_, 2
note E_, 2
note D_, 2
note E_, 2
intensity $b6
note F_, 6
intensity $b4
note C_, 2
note A_, 2
note G_, 2
note F_, 2
note C_, 2
note D_, 2
note G_, 2
note A_, 2
note G_, 2
note F_, 2
note E_, 2
note D_, 2
note E_, 2
note B_, 1
octave 4
note C_, 1
octave 3
note B_, 1
octave 4
note C_, 1
intensity $b7
octave 3
note B_, 12
intensity $b5
note F_, 6
note C_, 2
note A_, 2
note G_, 2
note F_, 2
note C_, 2
octave 4
note D_, 2
note C_, 2
octave 3
note B_, 2
note A_, 2
octave 4
note C_, 2
octave 3
note B_, 2
note A_, 2
note G_, 2
note D_, 1
note E_, 1
note D_, 1
note E_, 1
intensity $b6
note D_, 4
note G_, 4
note D_, 4
intensity $b3
octave 2
note B_, 1
octave 3
note C_, 1
octave 2
note B_, 1
octave 3
note C_, 1
intensity $b6
octave 2
note B_, 4
octave 3
note D_, 4
octave 2
note B_, 4
intensity $b4
octave 3
note F_, 2
note E_, 2
note D_, 2
note C_, 2
note A_, 2
note G_, 2
note F_, 2
note E_, 2
intensity $b6
note A_, 4
note B_, 4
octave 4
note C_, 4
note E_, 4
note D_, 2
octave 3
note G_, 4
note A_, 4
note B_, 4
octave 4
note C_, 2
octave 3
note G_, 2
intensity $b7
note D_, 14
intensity $b6
note F_, 2
note E_, 2
note D_, 2
note C_, 2
note A_, 2
note G_, 2
note F_, 2
note G_, 2
octave 4
note C_, 2
octave 3
note B_, 2
note A_, 2
note B_, 2
octave 4
note C_, 2
note E_, 2
note F_, 2
note A_, 2
octave 3
note G_, 2
octave 4
note C_, 2
note D_, 2
octave 3
note G_, 2
octave 4
note C_, 2
note D_, 2
octave 3
note G_, 2
octave 4
note D_, 2
intensity $b5
octave 3
note B_, 2
octave 4
note D_, 2
octave 3
note B_, 2
octave 4
note D_, 4
octave 3
note G_, 2
note B_, 2
octave 4
note D_, 2
loopchannel 0, Music_Route30_branch_efc2e
Music_Route30_Ch2:
dutycycle $3
vibrato $12, $36
stereopanning $f
notetype $c, $c2
octave 3
note G_, 6
note G_, 1
note G_, 1
note G_, 2
note G_, 2
note G_, 4
note G_, 6
note G_, 1
note G_, 1
note G_, 2
note G_, 2
intensity $c4
note D_, 1
note E_, 1
note F_, 1
note F#, 1
Music_Route30_branch_efcf6:
intensity $c7
note G_, 10
octave 4
note D_, 2
octave 3
note B_, 2
note G_, 2
octave 4
note F_, 10
note E_, 2
note D_, 2
note C_, 2
note D_, 1
note E_, 1
note D_, 1
note E_, 1
intensity $b0
note D_, 4
intensity $b7
note D_, 8
intensity $3f
note D_, 8
intensity $b7
note D_, 8
intensity $c7
note C_, 10
note C_, 2
octave 3
note A_, 2
note F_, 2
octave 4
note F_, 10
note E_, 2
note D_, 2
note C_, 2
octave 3
note B_, 6
note G_, 2
octave 4
note D_, 8
octave 3
note G_, 6
note D_, 2
note B_, 8
note C_, 2
note A_, 4
note B_, 4
octave 4
note C_, 4
note D_, 2
note F_, 8
note A_, 8
note G_, 2
intensity $b0
note D_, 4
intensity $b7
note D_, 10
intensity $c7
note C_, 4
octave 3
note B_, 4
note A_, 4
note G_, 4
note A_, 4
note B_, 4
octave 4
note C_, 4
note D_, 4
note F_, 8
octave 5
note C_, 8
octave 4
note B_, 2
intensity $b0
note G_, 6
intensity $b7
note G_, 8
intensity $c7
note B_, 2
intensity $b0
note G_, 4
intensity $b7
note G_, 8
intensity $a7
octave 3
note F#, 2
loopchannel 0, Music_Route30_branch_efcf6
Music_Route30_Ch3:
notetype $c, $27
octave 2
note G_, 1
note __, 5
note G_, 1
note G_, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 3
note G_, 1
note __, 5
note G_, 1
note G_, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
Music_Route30_branch_efd79:
note G_, 1
note __, 1
note B_, 2
note __, 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note F_, 1
note __, 1
octave 3
note D_, 2
note A_, 2
octave 2
note F_, 1
note F_, 1
note F_, 1
note __, 1
octave 3
note C_, 2
octave 2
note F_, 1
note __, 1
note F#, 1
note __, 1
note G_, 1
note __, 1
note B_, 2
octave 3
note D_, 2
octave 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
octave 3
note D_, 2
octave 2
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
octave 3
note E_, 2
note D_, 2
octave 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note F_, 1
note __, 1
octave 3
note C_, 2
octave 2
note A_, 2
note F_, 1
note F_, 1
note F_, 1
note __, 1
octave 3
note C_, 2
octave 2
note F_, 1
note __, 1
note F_, 1
note __, 1
note F_, 1
note __, 1
octave 3
note C_, 2
note F_, 2
octave 2
note F_, 1
note F_, 1
note F_, 1
note __, 1
octave 3
note E_, 2
octave 2
note F_, 2
note F#, 2
note G_, 1
note __, 1
note B_, 2
octave 3
note G_, 2
octave 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
note B_, 2
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
octave 4
note D_, 2
octave 3
note B_, 2
octave 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
octave 3
note G_, 2
octave 2
note G_, 2
note G#, 2
note A_, 1
note __, 1
octave 3
note C_, 2
octave 2
note B_, 2
note A_, 1
note A_, 1
note A_, 1
note __, 1
octave 3
note D_, 2
octave 2
note A_, 1
note __, 1
note B_, 1
note __, 1
octave 3
note C_, 1
note __, 1
note F_, 2
note E_, 2
note C_, 1
note C_, 1
note C_, 1
note __, 1
note A_, 2
note C_, 1
note __, 1
note C_, 1
note __, 1
octave 2
note B_, 1
note __, 1
octave 3
note E_, 2
note D_, 2
octave 2
note B_, 1
note B_, 1
note B_, 1
note __, 1
note B_, 1
note __, 1
note B_, 1
note __, 1
note B_, 1
note __, 1
note G_, 1
note __, 1
note B_, 2
note A_, 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
note B_, 2
note G_, 1
note __, 1
note G_, 1
note __, 1
note A_, 1
note __, 1
octave 3
note C_, 2
octave 2
note B_, 2
note A_, 1
note A_, 1
note A_, 1
note __, 1
octave 3
note D_, 2
octave 2
note A_, 1
note __, 1
note B_, 1
note __, 1
octave 3
note C_, 1
note __, 1
note F_, 2
note E_, 2
note C_, 1
note C_, 1
note C_, 1
note __, 1
note A_, 2
note C_, 1
note __, 1
note C_, 1
note __, 1
octave 2
note G_, 1
note __, 1
octave 3
note C_, 2
note D_, 2
octave 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
note G_, 1
note __, 1
octave 3
note E_, 2
note D_, 2
octave 2
note G_, 1
note G_, 1
note G_, 1
note __, 1
octave 3
note D_, 2
octave 2
note G_, 1
note __, 1
note G_, 1
note __, 1
loopchannel 0, Music_Route30_branch_efd79
Music_Route30_Ch4:
togglenoise $3
notetype $c
callchannel Music_Route30_branch_efeb8
callchannel Music_Route30_branch_efec1
Music_Route30_branch_efe84:
callchannel Music_Route30_branch_efecd
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efee1
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efecd
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efee1
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efecd
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efed7
callchannel Music_Route30_branch_efecd
callchannel Music_Route30_branch_efee1
loopchannel 0, Music_Route30_branch_efe84
Music_Route30_branch_efeb8:
note D_, 2
note F#, 2
note F#, 2
note D_, 1
note D_, 1
note D_, 2
note D_, 2
note D_, 4
endchannel
Music_Route30_branch_efec1:
note D_, 2
note F#, 2
note F#, 2
note D_, 1
note D_, 1
note D_, 2
note D_, 2
note D_, 1
note D_, 1
note D_, 1
note D_, 1
endchannel
Music_Route30_branch_efecd:
note D_, 2
note F#, 2
note F#, 2
note D_, 1
note D_, 1
note D_, 2
note D_, 2
note D_, 2
note D_, 2
endchannel
Music_Route30_branch_efed7:
note D_, 2
note F#, 2
note F#, 2
note D_, 1
note D_, 1
note D_, 2
note F#, 2
note D_, 2
note D_, 2
endchannel
Music_Route30_branch_efee1:
note D_, 2
note F#, 2
note F#, 2
note D_, 1
note D_, 1
note D_, 2
note D_, 2
notetype $6
note D_, 1
note D_, 1
note D_, 1
note D_, 1
note D_, 1
note D_, 1
note D_, 1
note D_, 1
notetype $c
endchannel
|
test/Succeed/non-fol-theorems/Instance.agda | asr/apia | 10 | 13849 | <gh_stars>1-10
------------------------------------------------------------------------------
-- Testing the translation of scheme's instances
------------------------------------------------------------------------------
{-# OPTIONS --exact-split #-}
{-# OPTIONS --no-sized-types #-}
{-# OPTIONS --no-universe-polymorphism #-}
{-# OPTIONS --without-K #-}
module Instance where
-- A schema
-- Current translation: ∀ p q x. app(p,x) → app(q,x).
postulate
D : Set
schema : (A B : D → Set) → ∀ {x} → A x → B x
-- Using the current translation, the ATPs can prove an instance of
-- the schema.
postulate
d : D
A B : D → Set
instanceC : A d → B d
{-# ATP prove instanceC schema #-}
|
racing/interrupt.asm | dcliche/XoseraLab | 1 | 245752 | <reponame>dcliche/XoseraLab
; *************************************************************
; Copyright (c) 2021 roscopeco <AT> gmail <DOT> com
; *************************************************************
;
section .text ; This is normal code
include "xosera_m68k_defs.inc"
install_intr::
movem.l D0-D7/A0-A6,-(A7)
or.w #$0200,SR ; disable interrupts
move.l #XM_BASEADDR,A0 ; get Xosera base addr
move.b #$0F,D0 ; all interrupt source bits
move.b D0,XM_TIMER+2(A0) ; clear out any prior pending interrupts
move.w #$080F,D0 ; all nibbles write, vsync int
movep.w D0,XM_SYS_CTRL(A0) ; enable VSYNC interrupt
move.l #Xosera_intr,$68 ; set interrupt vector
and.w #$F0FF,SR ; enable interrupts
movem.l (A7)+,D0-D7/A0-A6
rts
remove_intr::
movem.l D0-D7/A0-A6,-(A7)
move.l $60,D0 ; copy spurious int handler
move.l D0,$68
movem.l (A7)+,D0-D7/A0-A6
rts
; interrupt routine
Xosera_intr:
movem.l D0-D1/A0,-(A7) ; save minimal regs
move.l #XM_BASEADDR,A0 ; get Xosera base addr
movep.w XM_XR_ADDR(A0),D1 ; save aux_addr value
moveq.l #XR_VID_CTRL,D0 ; XR reg VID_CTRL
movep.w D0,XM_XR_ADDR(A0)
move.b XM_XR_DATA+2(A0),D0 ; read intr status [3:0] (low byte)
move.b D0,XM_TIMER+2(A0) ; clear any interrupts in status
; NOTE: could check D0 bits [3:0] for
; interrupt sources, but for now
; just assume it is vsync [3]
add.l #1,XFrameCount ; increment frame counter
movep.w D1,XM_XR_ADDR(A0) ; restore aux_addr
movem.l (A7)+,D0-D1/A0 ; restore regs
rte
XFrameCount:: dc.l $00000000
|
oeis/334/A334033.asm | neoneye/loda-programs | 11 | 90399 | <reponame>neoneye/loda-programs<filename>oeis/334/A334033.asm
; A334033: The a(n)-th composition in standard order (graded reverse-lexicographic) is the reversed unsorted prime signature of n.
; Submitted by <NAME>
; 0,1,1,2,1,3,1,4,2,3,1,6,1,3,3,8,1,5,1,6,3,3,1,12,2,3,4,6,1,7,1,16,3,3,3,10,1,3,3,12,1,7,1,6,6,3,1,24,2,5,3,6,1,9,3,12,3,3,1,14,1,3,6,32,3,7,1,6,3,7,1,20,1,3,5,6,3,7,1,24,8,3,1
add $0,1
mov $6,5
lpb $0
mov $3,$0
lpb $3
mov $4,$0
mov $7,$2
cmp $7,0
add $2,$7
mod $4,$2
cmp $4,0
cmp $4,0
mov $5,$2
add $2,1
cmp $5,1
max $4,$5
sub $3,$4
lpe
lpb $0
dif $0,$2
mul $6,2
lpe
add $8,$6
lpe
mov $0,$8
div $0,10
|
oeis/107/A107373.asm | neoneye/loda-programs | 11 | 170620 | ; A107373: a(n) = (n/2)*binomial(n-1, floor((n-1)/2)) - 2^(n-2).
; Submitted by <NAME>
; 0,0,1,2,7,14,38,76,187,374,874,1748,3958,7916,17548,35096,76627,153254,330818,661636,1415650,2831300,6015316,12030632,25413342,50826684,106853668,213707336,447472972,894945944,1867450648,3734901296,7770342787,15540685574,32248174258,64496348516,133530264682,267060529364,551793690628,1103587381256,2276098026922,4552196053844,9373521044908,18747042089816,38546133661492,77092267322984,158301250009768,316602500019536,649328801880622,1298657603761244,2660520510741364,5321041021482728
mov $2,1
mov $3,$0
mov $4,1
lpb $3
mul $2,$3
div $2,$4
max $0,$2
sub $3,1
add $4,1
sub $5,$2
add $5,$0
lpe
mov $0,$5
|
src/SKEIN/skein_block_x86.asm | NickViz/BinDiff | 34 | 98091 | <filename>src/SKEIN/skein_block_x86.asm
;
;----------------------------------------------------------------
; 32-bit x86 assembler code for Skein block functions
;
; Author: <NAME>, Hifn
;
; This code is released to the public domain.
;----------------------------------------------------------------
;
.386p
.model flat
.code
;
_MASK_ALL_ equ (256+512+1024) ;all three algorithm bits
;
;;;;;;;;;;;;;;;;;
ifndef SKEIN_USE_ASM
_USE_ASM_ = _MASK_ALL_
elseif SKEIN_USE_ASM and _MASK_ALL_
_USE_ASM_ = SKEIN_USE_ASM
else
_USE_ASM_ = _MASK_ALL_
endif
;;;;;;;;;;;;;;;;;
ifndef SKEIN_LOOP
_SKEIN_LOOP = 0 ;default is all fully unrolled
else
_SKEIN_LOOP = SKEIN_LOOP
endif
; the unroll counts (0 --> fully unrolled)
SKEIN_UNROLL_256 = (_SKEIN_LOOP / 100) mod 10
SKEIN_UNROLL_512 = (_SKEIN_LOOP / 10) mod 10
SKEIN_UNROLL_1024 = (_SKEIN_LOOP ) mod 10
;
SKEIN_ASM_UNROLL = 0
irp _NN_,<256,512,1024>
if (SKEIN_UNROLL_&_NN_) eq 0
SKEIN_ASM_UNROLL = SKEIN_ASM_UNROLL + _NN_
endif
endm
;;;;;;;;;;;;;;;;;
;
ifndef SKEIN_ROUNDS
ROUNDS_256 = 72
ROUNDS_512 = 72
ROUNDS_1024 = 80
else
ROUNDS_256 = 8*((((SKEIN_ROUNDS / 100) + 5) mod 10) + 5)
ROUNDS_512 = 8*((((SKEIN_ROUNDS / 10) + 5) mod 10) + 5)
ROUNDS_1024 = 8*((((SKEIN_ROUNDS ) + 5) mod 10) + 5)
endif
irp _NN_,<256,512,1024>
if _USE_ASM_ and _NN_
irp _RR_,<%(ROUNDS_&_NN_)>
if _NN_ eq 1024
%out +++ SKEIN_ROUNDS_&_NN_ = _RR_
else
%out +++ SKEIN_ROUNDS_&_NN_ = _RR_
endif
endm
endif
endm
;;;;;;;;;;;;;;;;;
;
ifdef SKEIN_CODE_SIZE
_SKEIN_CODE_SIZE equ (1)
else
ifdef SKEIN_PERF ;use code size if SKEIN_PERF is defined
_SKEIN_CODE_SIZE equ (1)
endif
endif
;
;;;;;;;;;;;;;;;;;
;
ifndef SKEIN_DEBUG
_SKEIN_DEBUG = 0
else
_SKEIN_DEBUG = 1
endif
;;;;;;;;;;;;;;;;;
;
; define offsets of fields in hash context structure
;
HASH_BITS = 0 ;# bits of hash output
BCNT = 4 + HASH_BITS ;number of bytes in BUFFER[]
TWEAK = 4 + BCNT ;tweak values[0..1]
X_VARS = 16 + TWEAK ;chaining vars
;
;(Note: buffer[] in context structure is NOT needed here :-)
;
KW_PARITY_LO= 0A9FC1A22h ;overall parity of key schedule words (hi32/lo32)
KW_PARITY_HI= 01BD11BDAh ;overall parity of key schedule words (hi32/lo32)
FIRST_MASK = NOT (1 SHL 30) ;FIRST block flag bit
;
; rotation constants for Skein
;
RC_256_0_0 = 14
RC_256_0_1 = 16
RC_256_1_0 = 52
RC_256_1_1 = 57
RC_256_2_0 = 23
RC_256_2_1 = 40
RC_256_3_0 = 5
RC_256_3_1 = 37
RC_256_4_0 = 25
RC_256_4_1 = 33
RC_256_5_0 = 46
RC_256_5_1 = 12
RC_256_6_0 = 58
RC_256_6_1 = 22
RC_256_7_0 = 32
RC_256_7_1 = 32
RC_512_0_0 = 46
RC_512_0_1 = 36
RC_512_0_2 = 19
RC_512_0_3 = 37
RC_512_1_0 = 33
RC_512_1_1 = 27
RC_512_1_2 = 14
RC_512_1_3 = 42
RC_512_2_0 = 17
RC_512_2_1 = 49
RC_512_2_2 = 36
RC_512_2_3 = 39
RC_512_3_0 = 44
RC_512_3_1 = 9
RC_512_3_2 = 54
RC_512_3_3 = 56
RC_512_4_0 = 39
RC_512_4_1 = 30
RC_512_4_2 = 34
RC_512_4_3 = 24
RC_512_5_0 = 13
RC_512_5_1 = 50
RC_512_5_2 = 10
RC_512_5_3 = 17
RC_512_6_0 = 25
RC_512_6_1 = 29
RC_512_6_2 = 39
RC_512_6_3 = 43
RC_512_7_0 = 8
RC_512_7_1 = 35
RC_512_7_2 = 56
RC_512_7_3 = 22
RC_1024_0_0 = 24
RC_1024_0_1 = 13
RC_1024_0_2 = 8
RC_1024_0_3 = 47
RC_1024_0_4 = 8
RC_1024_0_5 = 17
RC_1024_0_6 = 22
RC_1024_0_7 = 37
RC_1024_1_0 = 38
RC_1024_1_1 = 19
RC_1024_1_2 = 10
RC_1024_1_3 = 55
RC_1024_1_4 = 49
RC_1024_1_5 = 18
RC_1024_1_6 = 23
RC_1024_1_7 = 52
RC_1024_2_0 = 33
RC_1024_2_1 = 4
RC_1024_2_2 = 51
RC_1024_2_3 = 13
RC_1024_2_4 = 34
RC_1024_2_5 = 41
RC_1024_2_6 = 59
RC_1024_2_7 = 17
RC_1024_3_0 = 5
RC_1024_3_1 = 20
RC_1024_3_2 = 48
RC_1024_3_3 = 41
RC_1024_3_4 = 47
RC_1024_3_5 = 28
RC_1024_3_6 = 16
RC_1024_3_7 = 25
RC_1024_4_0 = 41
RC_1024_4_1 = 9
RC_1024_4_2 = 37
RC_1024_4_3 = 31
RC_1024_4_4 = 12
RC_1024_4_5 = 47
RC_1024_4_6 = 44
RC_1024_4_7 = 30
RC_1024_5_0 = 16
RC_1024_5_1 = 34
RC_1024_5_2 = 56
RC_1024_5_3 = 51
RC_1024_5_4 = 4
RC_1024_5_5 = 53
RC_1024_5_6 = 42
RC_1024_5_7 = 41
RC_1024_6_0 = 31
RC_1024_6_1 = 44
RC_1024_6_2 = 47
RC_1024_6_3 = 46
RC_1024_6_4 = 19
RC_1024_6_5 = 42
RC_1024_6_6 = 44
RC_1024_6_7 = 25
RC_1024_7_0 = 9
RC_1024_7_1 = 48
RC_1024_7_2 = 35
RC_1024_7_3 = 52
RC_1024_7_4 = 23
RC_1024_7_5 = 31
RC_1024_7_6 = 37
RC_1024_7_7 = 20
;
; Input: rHi,rLo
; Output: <rHi,rLo> <<< _RCNT_
Rol64 macro rHi,rLo,tmp,_RCNT_
if _RCNT_ ;is there anything to do?
if _RCNT_ lt 32
mov tmp,rLo
shld rLo,rHi,_RCNT_
shld rHi,tmp,_RCNT_
elseif _RCNT_ gt 32
mov tmp,rLo
shrd rLo,rHi,((64-_RCNT_) AND 63)
shrd rHi,tmp,((64-_RCNT_) AND 63)
else
xchg rHi,rLo ;special case for _RCNT_ == 32
endif
endif
endm
;
; Input: rHi,rLo
; Output: <rHi,rLo> <<< rName&&rNum, and tmp trashed;
RotL64 macro rHi,rLo,tmp,BLK_SIZE,ROUND_NUM,MIX_NUM
_RCNT_ = ( RC_&BLK_SIZE&_&ROUND_NUM&_&MIX_NUM AND 63 )
Rol64 rHi,rLo,tmp,_RCNT_
endm
;
;----------------------------------------------------------------
; declare allocated space on the stack
StackVar macro localName,localSize
localName = _STK_OFFS_
_STK_OFFS_ = _STK_OFFS_+(localSize)
endm ;StackVar
;
;----------------------------------------------------------------
;
; MACRO: Configure stack frame, allocate local vars
;
Setup_Stack macro WCNT,KS_CNT
_STK_OFFS_ = 0 ;starting offset from esp
;----- local variables ;<-- esp
StackVar X_stk ,8*(WCNT) ;local context vars
StackVar Wcopy ,8*(WCNT) ;copy of input block
StackVar ksTwk ,8*3 ;key schedule: tweak words
StackVar ksKey ,8*(WCNT)+8 ;key schedule: key words
if WCNT le 8
FRAME_OFFS = _STK_OFFS_ ;<-- ebp
else
FRAME_OFFS = _STK_OFFS_-8*4 ;<-- ebp
endif
if (SKEIN_ASM_UNROLL and (WCNT*64)) eq 0
StackVar ksRot ,16*(KS_CNT+0);leave space for "rotation" to happen
endif
LOCAL_SIZE = _STK_OFFS_ ;size of local vars
;-----
StackVar savRegs,8*4 ;pushad data
StackVar retAddr,4 ;return address
;----- caller parameters
StackVar ctxPtr ,4 ;context ptr
StackVar blkPtr ,4 ;pointer to block data
StackVar blkCnt ,4 ;number of full blocks to process
StackVar bitAdd ,4 ;bit count to add to tweak
;----- caller's stack frame
;
; Notes on stack frame setup:
; * the most frequently used variable is X_stk[], based at [esp+0]
; * the next most used is the key schedule words
; so ebp is "centered" there, allowing short offsets to the key/tweak
; schedule even in 1024-bit Skein case
; * the Wcopy variables are infrequently accessed, but they have long
; offsets from both esp and ebp only in the 1024-bit case.
; * all other local vars and calling parameters can be accessed
; with short offsets, except in the 1024-bit case
;
pushad ;save all regs
sub esp,LOCAL_SIZE ;make room for the locals
lea ebp,[esp+FRAME_OFFS] ;maximize use of short offsets
mov edi,[FP_+ctxPtr ] ;edi --> context
;
endm ;Setup_Stack
;
FP_ equ <ebp-FRAME_OFFS> ;keep as many short offsets as possible
;
;----------------------------------------------------------------
;
Reset_Stack macro procStart
add esp,LOCAL_SIZE ;get rid of locals (wipe??)
popad ;restore all regs
;display code size in bytes to stdout
irp _BCNT_,<%($+1-procStart)> ;account for return opcode
if _BCNT_ ge 10000 ;(align it all pretty)
%out procStart code size = _BCNT_ bytes
elseif _BCNT_ ge 1000
%out procStart code size = _BCNT_ bytes
else
%out procStart code size = _BCNT_ bytes
endif
endm ;irp _BCNT_
endm ; Reset_Stack
;
;----------------------------------------------------------------
; macros to help debug internals
;
if _SKEIN_DEBUG
extrn _Skein_Show_Block:near ;calls to C routines
extrn _Skein_Show_Round:near
;
SKEIN_RND_SPECIAL = 1000
SKEIN_RND_KEY_INITIAL = SKEIN_RND_SPECIAL+0
SKEIN_RND_KEY_INJECT = SKEIN_RND_SPECIAL+1
SKEIN_RND_FEED_FWD = SKEIN_RND_SPECIAL+2
;
Skein_Debug_Block macro BLK_BITS
;
;void Skein_Show_Block(uint_t bits,const Skein_Ctxt_Hdr_t *h,const u64b_t *X,
; const u08b_t *blkPtr, const u64b_t *wPtr,
; const u64b_t *ksPtr,const u64b_t *tsPtr);
;
pushad ;save all regs
lea eax,[FP_+ksTwk]
lea ebx,[FP_+ksKey]
lea ecx,[esp+32+Wcopy]
mov edx,[FP_+ctxPtr] ;ctx_hdr_ptr
lea edx,[edx+X_VARS] ;edx ==> cxt->X[]
push eax ;tsPtr
push ebx ;ksPtr
push ecx ;wPtr
push dword ptr [FP_+blkPtr] ;blkPtr
push edx ;ctx->Xptr
push dword ptr [FP_+ctxPtr] ;ctx_hdr_ptr
mov eax,BLK_BITS
push eax ;bits
ifdef _MINGW_
call _Skein_Show_Block-4 ;strange linkage??
else
call _Skein_Show_Block
endif
add esp,7*4 ;discard parameter space on stack
popad ;restore regs
endm ;Skein_Debug_Block
;
Skein_Debug_Round macro BLK_SIZE,R,saveRegs
;
;void Skein_Show_Round(uint_t bits,const Skein_Ctxt_Hdr_t *h,int r,const u64b_t *X);
;
ifnb <saveRegs>
mov [esp+X_stk+ 0],eax ;save internal vars for debug dump
mov [esp+X_stk+ 4],ebx
mov [esp+X_stk+ 8],ecx
mov [esp+X_stk+12],edx
endif
pushad ;save all regs
if R ne SKEIN_RND_FEED_FWD
lea eax,[esp+32+X_stk]
else
mov eax,[FP_+ctxPtr]
add eax,X_VARS
endif
push eax ;Xptr
if (SKEIN_ASM_UNROLL and BLK_SIZE) or (R ge SKEIN_RND_SPECIAL)
mov eax,R
else
lea eax,[4*edi+1+(((R)-1) and 3)] ;compute round number using edi
endif
push eax ;round number
push dword ptr [FP_+ctxPtr] ;ctx_hdr_ptr
mov eax,BLK_SIZE
push eax ;bits
ifdef _MINGW_
call _Skein_Show_Round-4 ;strange linkage??
else
call _Skein_Show_Round
endif
add esp,4*4 ;discard parameter space on stack
popad ;restore regs
endm ;Skein_Debug_Round
endif ;ifdef SKEIN_DEBUG
;
;----------------------------------------------------------------
;
; MACRO: a mix step
;
MixStep macro BLK_SIZE,ld_A,ld_C,st_A,st_C,RotNum0,RotNum1,_debug_
ifnb <ld_A>
mov eax,[esp+X_stk+8*(ld_A)+0]
mov ebx,[esp+X_stk+8*(ld_A)+4]
endif
ifnb <ld_C>
mov ecx,[esp+X_stk+8*(ld_C)+0]
mov edx,[esp+X_stk+8*(ld_C)+4]
endif
add eax, ecx ;X[A] += X[C]
adc ebx, edx
ifnb <st_A>
mov [esp+X_stk+8*(st_A)+0],eax
mov [esp+X_stk+8*(st_A)+4],ebx
endif
__rNum0 = (RotNum0) AND 7
RotL64 ecx, edx, esi,%(BLK_SIZE),%(__rNum0),%(RotNum1) ;X[C] <<<= RC_<BLK_BITS,RotNum0,RotNum1>
xor ecx, eax ;X[C] ^= X[A]
xor edx, ebx
if _SKEIN_DEBUG or (0 eq (_debug_ + 0))
ifb <st_C>
mov [esp+X_stk+8*(ld_C)+0],ecx
mov [esp+X_stk+8*(ld_C)+4],edx
else
mov [esp+X_stk+8*(st_C)+0],ecx
mov [esp+X_stk+8*(st_C)+4],edx
endif
endif
if _SKEIN_DEBUG and (0 ne (_debug_ + 0))
Skein_Debug_Round BLK_SIZE,%(RotNum0+1)
endif
endm ;MixStep
;
;;;;;;;;;;;;;;;;;
;
; MACRO: key schedule injection
;
ks_Inject macro BLK_SIZE,X_load,X_stor,rLo,rHi,rndBase,keyIdx,twkIdx,ROUND_ADD
;are rLo,rHi values already loaded? if not, load them now
ifnb <X_load>
mov rLo,[esp+X_stk +8*(X_load) ]
mov rHi,[esp+X_stk +8*(X_load)+4]
endif
;inject the 64-bit key schedule value (and maybe the tweak as well)
if SKEIN_ASM_UNROLL and BLK_SIZE
_kOffs_ = ((rndBase)+(keyIdx)) mod ((BLK_SIZE/64)+1)
add rLo,[FP_+ksKey+8*_kOffs_+ 0]
adc rHi,[FP_+ksKey+8*_kOffs_+ 4]
ifnb <twkIdx>
_tOffs_ = ((rndBase)+(twkIdx)) mod 3
add rLo,[FP_+ksTwk+8*_tOffs_+ 0]
adc rHi,[FP_+ksTwk+8*_tOffs_+ 4]
endif
ifnb <ROUND_ADD>
add rLo,(ROUND_ADD)
adc rHi,0
endif
else
add rLo,[FP_+ksKey+8*(keyIdx)+8*edi ]
adc rHi,[FP_+ksKey+8*(keyIdx)+8*edi+4]
ifnb <twkIdx>
add rLo,[FP_+ksTwk+8*(twkIdx)+8*edi ]
adc rHi,[FP_+ksTwk+8*(twkIdx)+8*edi+4]
endif
ifnb <ROUND_ADD>
add rLo,edi ;edi is the round number
adc rHi,0
endif
endif
;do we need to store updated rLo,rHi values? if so, do it now
ifnb <X_stor>
mov [esp+X_stk +8*(X_stor) ],rLo
mov [esp+X_stk +8*(X_stor)+4],rHi
endif
endm ;ks_Inject
;
;----------------------------------------------------------------
; MACRO: key schedule rotation
;
ks_Rotate macro rLo,rHi,WCNT
mov rLo,[FP_+ksKey+8*edi+ 0] ;"rotate" the key schedule in memory
mov rHi,[FP_+ksKey+8*edi+ 4]
mov [FP_+ksKey+8*edi+8*(WCNT+1)+ 0],rLo
mov [FP_+ksKey+8*edi+8*(WCNT+1)+ 4],rHi
mov rLo,[FP_+ksTwk+8*edi+ 0]
mov rHi,[FP_+ksTwk+8*edi+ 4]
mov [FP_+ksTwk+8*edi+8*3+ 0],rLo
mov [FP_+ksTwk+8*edi+8*3+ 4],rHi
endm
;
;----------------------------------------------------------------
;
if _USE_ASM_ and 256
public _Skein_256_Process_Block
;
; void Skein_256_Process_Block(Skein_256_Ctxt_t *ctx,const u08b_t *blkPtr,size_t blkCnt,size_t bitcntAdd);
;
;;;;;;;;;;;;;;;;;
;
; MACRO: two rounds
;
R_256_TwoRounds macro _RR_,ld_0
; here with edx:ecx = X[1]
;--------- round _RR_
MixStep 256,ld_0, ,0,1,((_RR_)+0),0
MixStep 256, 2,3,2,3,((_RR_)+0),1,1
; here with edx:ecx = X[3]
;--------- round _RR_ + 1
MixStep 256, 0, ,0,3,((_RR_)+1),0
MixStep 256, 2,1,2,1,((_RR_)+1),1,1
; here with edx:ecx = X[1]
endm ;R_256_TwoRounds
;
;;;;;;;;;;;;;;;;;
;
; code
;
_Skein_256_Process_Block proc near
WCNT = 4 ;WCNT=4 for Skein-256
Setup_Stack WCNT,(ROUNDS_256/8)
; main hash loop for Skein_256
Skein_256_block_loop:
mov eax,[edi+TWEAK+ 0] ;ebx:eax = tweak word T0
mov ebx,[edi+TWEAK+ 4]
mov ecx,[edi+TWEAK+ 8] ;edx:ecx = tweak word T1
mov edx,[edi+TWEAK+12]
add eax,[FP_+bitAdd ] ;bump T0 by the bitAdd parameter
adc ebx, 0
mov [edi+TWEAK ],eax ;save updated tweak value T0
mov [edi+TWEAK+ 4],ebx
mov [FP_+ksTwk ],eax ;build the tweak schedule on the stack
mov [FP_+ksTwk+ 4],ebx
xor eax,ecx ;ebx:eax = T0 ^ T1
xor ebx,edx
mov [FP_+ksTwk+ 8],ecx
mov [FP_+ksTwk+12],edx
mov [FP_+ksTwk+16],eax
mov [FP_+ksTwk+20],ebx
mov eax,KW_PARITY_LO ;init parity accumulator
mov ebx,KW_PARITY_HI
;
_NN_ = 0
rept WCNT ;copy in the chaining vars
mov ecx,[edi+X_VARS+_NN_ ]
mov edx,[edi+X_VARS+_NN_+ 4]
xor eax,ecx ;compute overall parity along the way
xor ebx,edx
mov [FP_+ksKey +_NN_ ],ecx
mov [FP_+ksKey +_NN_+ 4],edx
_NN_ = _NN_+8
endm
;
mov [FP_+ksKey +_NN_ ],eax ;save overall parity at the end of the array
mov [FP_+ksKey +_NN_+ 4],ebx
mov esi,[FP_+blkPtr ] ;esi --> input block
;
_NN_ = WCNT*8-16 ;work down from the end
rept WCNT/2 ;perform initial key injection
mov eax,[esi+_NN_ + 0]
mov ebx,[esi+_NN_ + 4]
mov ecx,[esi+_NN_ + 8]
mov edx,[esi+_NN_ +12]
mov [esp+_NN_+Wcopy + 0],eax
mov [esp+_NN_+Wcopy + 4],ebx
mov [esp+_NN_+Wcopy + 8],ecx
mov [esp+_NN_+Wcopy +12],edx
add eax,[FP_+_NN_+ksKey + 0]
adc ebx,[FP_+_NN_+ksKey + 4]
add ecx,[FP_+_NN_+ksKey + 8]
adc edx,[FP_+_NN_+ksKey +12]
if _NN_ eq (WCNT*8-16) ;inject the tweak words
add eax,[FP_+ ksTwk + 8]; (at the appropriate points)
adc ebx,[FP_+ ksTwk +12]
elseif _NN_ eq (WCNT*8-32)
add ecx,[FP_+ ksTwk + 0]
adc edx,[FP_+ ksTwk + 4]
endif
if _NN_ or _SKEIN_DEBUG
mov [esp+_NN_+X_stk + 0],eax
mov [esp+_NN_+X_stk + 4],ebx
mov [esp+_NN_+X_stk + 8],ecx
mov [esp+_NN_+X_stk +12],edx
endif
_NN_ = _NN_ - 16 ;end at X[0], so regs are already loaded for first MIX!
endm
;
if _SKEIN_DEBUG ;debug dump of state at this point
Skein_Debug_Block WCNT*64
Skein_Debug_Round WCNT*64,SKEIN_RND_KEY_INITIAL
endif
add esi, WCNT*8 ;skip the block
mov [FP_+blkPtr ],esi ;update block pointer
;
; now the key schedule is computed. Start the rounds
;
if SKEIN_ASM_UNROLL and 256
_UNROLL_CNT = ROUNDS_256/8
else
_UNROLL_CNT = SKEIN_UNROLL_256 ;unroll count
if ((ROUNDS_256/8) mod _UNROLL_CNT)
.err "Invalid SKEIN_UNROLL_256"
endif
xor edi,edi ;edi = iteration count
Skein_256_round_loop:
endif
_Rbase_ = 0
rept _UNROLL_CNT*2
; here with X[0], X[1] already loaded into eax..edx
R_256_TwoRounds %(4*_Rbase_+00),
R_256_TwoRounds %(4*_Rbase_+02),0
;inject key schedule
if _UNROLL_CNT ne (ROUNDS_256/8)
ks_Rotate eax,ebx,WCNT
inc edi ;edi = round number
endif
_Rbase_ = _Rbase_+1
ks_Inject 256,3,3,eax,ebx,_Rbase_,3, ,_Rbase_
ks_Inject 256,2,2,eax,ebx,_Rbase_,2,1
ks_Inject 256, , ,ecx,edx,_Rbase_,1,0
ks_Inject 256,0, ,eax,ebx,_Rbase_,0
if _SKEIN_DEBUG
Skein_Debug_Round 256,SKEIN_RND_KEY_INJECT,saveRegs
endif
endm ;rept _UNROLL_CNT
;
if _UNROLL_CNT ne (ROUNDS_256/8)
cmp edi,2*(ROUNDS_256/8)
jb Skein_256_round_loop
mov edi,[FP_+ctxPtr ] ;restore edi --> context
endif
;----------------------------
; feedforward: ctx->X[i] = X[i] ^ w[i], {i=0..3}
_NN_ = 0
rept WCNT/2
if _NN_ ;eax..edx already loaded the first time
mov eax,[esp+X_stk + _NN_ + 0]
mov ebx,[esp+X_stk + _NN_ + 4]
mov ecx,[esp+X_stk + _NN_ + 8]
mov edx,[esp+X_stk + _NN_ +12]
endif
if _NN_ eq 0
and dword ptr [edi +TWEAK +12],FIRST_MASK
endif
xor eax,[esp+Wcopy + _NN_ + 0]
xor ebx,[esp+Wcopy + _NN_ + 4]
xor ecx,[esp+Wcopy + _NN_ + 8]
xor edx,[esp+Wcopy + _NN_ +12]
mov [edi+X_VARS+ _NN_ + 0],eax
mov [edi+X_VARS+ _NN_ + 4],ebx
mov [edi+X_VARS+ _NN_ + 8],ecx
mov [edi+X_VARS+ _NN_ +12],edx
_NN_ = _NN_+16
endm
if _SKEIN_DEBUG
Skein_Debug_Round 256,SKEIN_RND_FEED_FWD
endif
; go back for more blocks, if needed
dec dword ptr [FP_+blkCnt]
jnz Skein_256_block_loop
Reset_Stack _Skein_256_Process_Block
ret
_Skein_256_Process_Block endp
;
ifdef _SKEIN_CODE_SIZE
public _Skein_256_Process_Block_CodeSize
_Skein_256_Process_Block_CodeSize proc
mov eax,_Skein_256_Process_Block_CodeSize - _Skein_256_Process_Block
ret
_Skein_256_Process_Block_CodeSize endp
;
public _Skein_256_Unroll_Cnt
_Skein_256_Unroll_Cnt proc
if _UNROLL_CNT ne ROUNDS_256/8
mov eax,_UNROLL_CNT
else
xor eax,eax
endif
ret
_Skein_256_Unroll_Cnt endp
endif
endif ;_USE_ASM_ and 256
;
;----------------------------------------------------------------
;
if _USE_ASM_ and 512
public _Skein_512_Process_Block
;
; void Skein_512_Process_Block(Skein_512_Ctxt_t *ctx,const u08b_t *blkPtr,size_t blkCnt,size_t bitcntAdd);
;
;;;;;;;;;;;;;;;;;
; MACRO: four rounds
;
R_512_FourRounds macro _RR_,ld_0
; here with edx:ecx = X[1]
;--------- round _RR_
; R512(0,1,2,3,4,5,6,7,R_0, 1);
MixStep 512, ld_0, ,0,1,((_RR_)+0),0
MixStep 512, 2,3,2,3,((_RR_)+0),1
MixStep 512, 4,5,4,5,((_RR_)+0),2
MixStep 512, 6,7,6, ,((_RR_)+0),3,1
; here with edx:ecx = X[7]
; R512(2,1,4,7,6,5,0,3,R_1, 2);
MixStep 512, 4, ,4,7,((_RR_)+1),1
MixStep 512, 6,5,6,5,((_RR_)+1),2
MixStep 512, 0,3,0,3,((_RR_)+1),3
MixStep 512, 2,1,2, ,((_RR_)+1),0,1
; here with edx:ecx = X[1]
; R512(4,1,6,3,0,5,2,7,R_2, 3);
MixStep 512, 4, ,4,1,((_RR_)+2),0
MixStep 512, 6,3,6,3,((_RR_)+2),1
MixStep 512, 0,5,0,5,((_RR_)+2),2
MixStep 512, 2,7,2, ,((_RR_)+2),3,1
; here with edx:ecx = X[7]
; R512(6,1,0,7,2,5,4,3,R_3, 4);
MixStep 512, 0, ,0,7,((_RR_)+3),1
MixStep 512, 2,5,2,5,((_RR_)+3),2
MixStep 512, 4,3,4,3,((_RR_)+3),3
MixStep 512, 6,1,6, ,((_RR_)+3),0,1
endm ;R_512_FourRounds
;
;;;;;;;;;;;;;;;;;
; code
;
_Skein_512_Process_Block proc near
WCNT = 8 ;WCNT=8 for Skein-512
Setup_Stack WCNT,(ROUNDS_512/8)
; main hash loop for Skein_512
Skein_512_block_loop:
mov eax,[edi+TWEAK+ 0] ;ebx:eax = tweak word T0
mov ebx,[edi+TWEAK+ 4]
mov ecx,[edi+TWEAK+ 8] ;edx:ecx = tweak word T1
mov edx,[edi+TWEAK+12]
add eax,[FP_+bitAdd ] ;bump T0 by the bitAdd parameter
adc ebx, 0
mov [edi+TWEAK ],eax ;save updated tweak value T0
mov [edi+TWEAK+ 4],ebx
mov [FP_+ksTwk ],eax ;build the tweak schedule on the stack
mov [FP_+ksTwk+ 4],ebx
xor eax,ecx ;ebx:eax = T0 ^ T1
xor ebx,edx
mov [FP_+ksTwk+ 8],ecx
mov [FP_+ksTwk+12],edx
mov [FP_+ksTwk+16],eax
mov [FP_+ksTwk+20],ebx
mov eax,KW_PARITY_LO ;init parity accumulator
mov ebx,KW_PARITY_HI
;
_NN_ = 0
rept WCNT ;copy in the chaining vars
mov ecx,[edi+X_VARS+_NN_ ]
mov edx,[edi+X_VARS+_NN_+ 4]
xor eax,ecx ;compute overall parity along the way
xor ebx,edx
mov [FP_+ksKey +_NN_ ],ecx
mov [FP_+ksKey +_NN_+ 4],edx
_NN_ = _NN_+8
endm
;
mov [FP_+ksKey +_NN_ ],eax ;save overall parity at the end of the array
mov [FP_+ksKey +_NN_+ 4],ebx
mov esi,[FP_+blkPtr ] ;esi --> input block
;
_NN_ = WCNT*8-16 ;work down from the end
rept WCNT/2 ;perform initial key injection
mov eax,[esi+_NN_ + 0]
mov ebx,[esi+_NN_ + 4]
mov ecx,[esi+_NN_ + 8]
mov edx,[esi+_NN_ +12]
mov [esp+_NN_+Wcopy + 0],eax
mov [esp+_NN_+Wcopy + 4],ebx
mov [esp+_NN_+Wcopy + 8],ecx
mov [esp+_NN_+Wcopy +12],edx
add eax,[FP_+_NN_+ksKey + 0]
adc ebx,[FP_+_NN_+ksKey + 4]
add ecx,[FP_+_NN_+ksKey + 8]
adc edx,[FP_+_NN_+ksKey +12]
if _NN_ eq (WCNT*8-16) ;inject the tweak words
add eax,[FP_+ ksTwk + 8]; (at the appropriate points)
adc ebx,[FP_+ ksTwk +12]
elseif _NN_ eq (WCNT*8-32)
add ecx,[FP_+ ksTwk + 0]
adc edx,[FP_+ ksTwk + 4]
endif
if _NN_ or _SKEIN_DEBUG
mov [esp+_NN_+X_stk + 0],eax
mov [esp+_NN_+X_stk + 4],ebx
mov [esp+_NN_+X_stk + 8],ecx
mov [esp+_NN_+X_stk +12],edx
endif
_NN_ = _NN_ - 16 ;end at X[0], so regs are already loaded for first MIX!
endm
;
if _SKEIN_DEBUG ;debug dump of state at this point
Skein_Debug_Block WCNT*64
Skein_Debug_Round WCNT*64,SKEIN_RND_KEY_INITIAL
endif
add esi, WCNT*8 ;skip the block
mov [FP_+blkPtr ],esi ;update block pointer
;
; now the key schedule is computed. Start the rounds
;
if SKEIN_ASM_UNROLL and 512
_UNROLL_CNT = ROUNDS_512/8
else
_UNROLL_CNT = SKEIN_UNROLL_512
if ((ROUNDS_512/8) mod _UNROLL_CNT)
.err "Invalid SKEIN_UNROLL_512"
endif
xor edi,edi ;edi = round counter
Skein_512_round_loop:
endif
_Rbase_ = 0
rept _UNROLL_CNT*2
; here with X[0], X[1] already loaded into eax..edx
R_512_FourRounds %(4*_Rbase_+00),
;inject odd key schedule words
if _UNROLL_CNT ne (ROUNDS_512/8)
ks_Rotate eax,ebx,WCNT
inc edi ;edi = round number
endif
_Rbase_ = _Rbase_+1
ks_Inject 512,7,7,eax,ebx,_Rbase_,7, ,_Rbase_
ks_Inject 512,6,6,eax,ebx,_Rbase_,6,1
ks_Inject 512,5,5,eax,ebx,_Rbase_,5,0
ks_Inject 512,4,4,eax,ebx,_Rbase_,4
ks_Inject 512,3,3,eax,ebx,_Rbase_,3
ks_Inject 512,2,2,eax,ebx,_Rbase_,2
ks_Inject 512, , ,ecx,edx,_Rbase_,1
ks_Inject 512,0, ,eax,ebx,_Rbase_,0
if _SKEIN_DEBUG
Skein_Debug_Round 512,SKEIN_RND_KEY_INJECT ,saveRegs
endif
endm ;rept _UNROLL_CNT
;
if (SKEIN_ASM_UNROLL and 512) eq 0
cmp edi,2*(ROUNDS_512/8)
jb Skein_512_round_loop
mov edi,[FP_+ctxPtr ] ;restore edi --> context
endif
;----------------------------
; feedforward: ctx->X[i] = X[i] ^ w[i], {i=0..7}
_NN_ = 0
rept WCNT/2
if _NN_ ;eax..edx already loaded the first time
mov eax,[esp+X_stk + _NN_ + 0]
mov ebx,[esp+X_stk + _NN_ + 4]
mov ecx,[esp+X_stk + _NN_ + 8]
mov edx,[esp+X_stk + _NN_ +12]
endif
if _NN_ eq 0
and dword ptr [edi + TWEAK+12],FIRST_MASK
endif
xor eax,[esp+Wcopy + _NN_ + 0]
xor ebx,[esp+Wcopy + _NN_ + 4]
xor ecx,[esp+Wcopy + _NN_ + 8]
xor edx,[esp+Wcopy + _NN_ +12]
mov [edi+X_VARS+ _NN_ + 0],eax
mov [edi+X_VARS+ _NN_ + 4],ebx
mov [edi+X_VARS+ _NN_ + 8],ecx
mov [edi+X_VARS+ _NN_ +12],edx
_NN_ = _NN_+16
endm
if _SKEIN_DEBUG
Skein_Debug_Round 512,SKEIN_RND_FEED_FWD
endif
; go back for more blocks, if needed
dec dword ptr [FP_+blkCnt]
jnz Skein_512_block_loop
Reset_Stack _Skein_512_Process_Block
ret
_Skein_512_Process_Block endp
;
ifdef _SKEIN_CODE_SIZE
public _Skein_512_Process_Block_CodeSize
_Skein_512_Process_Block_CodeSize proc
mov eax,_Skein_512_Process_Block_CodeSize - _Skein_512_Process_Block
ret
_Skein_512_Process_Block_CodeSize endp
;
public _Skein_512_Unroll_Cnt
_Skein_512_Unroll_Cnt proc
if _UNROLL_CNT ne ROUNDS_512/8
mov eax,_UNROLL_CNT
else
xor eax,eax
endif
ret
_Skein_512_Unroll_Cnt endp
endif
;
endif ; _USE_ASM_ and 512
;
;----------------------------------------------------------------
;
if _USE_ASM_ and 1024
public _Skein1024_Process_Block
;
; void Skein_1024_Process_Block(Skein_1024_Ctxt_t *ctx,const u08b_t *blkPtr,size_t blkCnt,size_t bitcntAdd);
;
;;;;;;;;;;;;;;;;;
; MACRO: four rounds
;
R_1024_FourRounds macro _RR_,ld_0
; here with edx:ecx = X[1]
;--------- round _RR_
MixStep 1024, ld_0, , 0, 1,((_RR_)+0),0
MixStep 1024, 2, 3, 2, 3,((_RR_)+0),1
MixStep 1024, 4, 5, 4, 5,((_RR_)+0),2
MixStep 1024, 6, 7, 6, 7,((_RR_)+0),3
MixStep 1024, 8, 9, 8, 9,((_RR_)+0),4
MixStep 1024, 10,11,10,11,((_RR_)+0),5
MixStep 1024, 12,13,12,13,((_RR_)+0),6
MixStep 1024, 14,15,14, ,((_RR_)+0),7,1
; here with edx:ecx = X[15]
;--------- round _RR_+1
MixStep 1024, 4, , 4,15,((_RR_)+1),3
MixStep 1024, 0, 9, 0, 9,((_RR_)+1),0
MixStep 1024, 2,13, 2,13,((_RR_)+1),1
MixStep 1024, 6,11, 6,11,((_RR_)+1),2
MixStep 1024, 10, 7,10, 7,((_RR_)+1),4
MixStep 1024, 12, 3,12, 3,((_RR_)+1),5
MixStep 1024, 14, 5,14, 5,((_RR_)+1),6
MixStep 1024, 8, 1, 8, ,((_RR_)+1),7,1
; here with edx:ecx = X[1]
;--------- round _RR_+2
MixStep 1024, 6, , 6, 1,((_RR_)+2),3
MixStep 1024, 0, 7, 0, 7,((_RR_)+2),0
MixStep 1024, 2, 5, 2, 5,((_RR_)+2),1
MixStep 1024, 4, 3, 4, 3,((_RR_)+2),2
MixStep 1024, 12,15,12,15,((_RR_)+2),4
MixStep 1024, 14,13,14,13,((_RR_)+2),5
MixStep 1024, 8,11, 8,11,((_RR_)+2),6
MixStep 1024, 10, 9,10, ,((_RR_)+2),7,1
; here with edx:ecx = X[9]
;--------- round _RR_+3
MixStep 1024, 4, , 4, 9,((_RR_)+3),3
MixStep 1024, 0,15, 0,15,((_RR_)+3),0
MixStep 1024, 2,11, 2,11,((_RR_)+3),1
MixStep 1024, 6,13, 6,13,((_RR_)+3),2
MixStep 1024, 8, 5, 8, 5,((_RR_)+3),5
MixStep 1024, 10, 3,10, 3,((_RR_)+3),6
MixStep 1024, 12, 7,12, 7,((_RR_)+3),7
MixStep 1024, 14, 1,14, ,((_RR_)+3),4,1
; here with edx:ecx = X[1]
endm ;R_1024_FourRounds
;
;;;;;;;;;;;;;;;;;
; code
;
_Skein1024_Process_Block proc near
;
WCNT = 16 ;WCNT=16 for Skein-1024
Setup_Stack WCNT,(ROUNDS_1024/8)
; main hash loop for Skein1024
Skein1024_block_loop:
mov eax,[edi+TWEAK+ 0] ;ebx:eax = tweak word T0
mov ebx,[edi+TWEAK+ 4]
mov ecx,[edi+TWEAK+ 8] ;edx:ecx = tweak word T1
mov edx,[edi+TWEAK+12]
add eax,[FP_+bitAdd ] ;bump T0 by the bitAdd parameter
adc ebx, 0
mov [edi+TWEAK ],eax ;save updated tweak value T0
mov [edi+TWEAK+ 4],ebx
mov [FP_+ksTwk ],eax ;build the tweak schedule on the stack
mov [FP_+ksTwk+ 4],ebx
xor eax,ecx ;ebx:eax = T0 ^ T1
xor ebx,edx
mov [FP_+ksTwk+ 8],ecx
mov [FP_+ksTwk+12],edx
mov [FP_+ksTwk+16],eax
mov [FP_+ksTwk+20],ebx
mov eax,KW_PARITY_LO ;init parity accumulator
mov ebx,KW_PARITY_HI
EDI_BIAS equ 70h ;bias the edi offsets to make them short!
add edi, EDI_BIAS
CT_ equ <edi-EDI_BIAS>
;
_NN_ = 0
rept WCNT ;copy in the chaining vars
mov ecx,[CT_+X_VARS+_NN_ ]
mov edx,[CT_+X_VARS+_NN_+ 4]
xor eax,ecx ;compute overall parity along the way
xor ebx,edx
mov [FP_+ksKey +_NN_ ],ecx
mov [FP_+ksKey +_NN_+ 4],edx
_NN_ = _NN_+8
endm
;
mov [FP_+ksKey +_NN_ ],eax ;save overall parity at the end of the array
mov [FP_+ksKey +_NN_+ 4],ebx
mov esi,[FP_+blkPtr ] ;esi --> input block
lea edi,[esp+Wcopy]
;
_NN_ = WCNT*8-16 ;work down from the end
rept WCNT/2 ;perform initial key injection
mov eax,[esi+_NN_ + 0]
mov ebx,[esi+_NN_ + 4]
mov ecx,[esi+_NN_ + 8]
mov edx,[esi+_NN_ +12]
mov [edi+_NN_+ + 0],eax
mov [edi+_NN_+ + 4],ebx
mov [edi+_NN_+ + 8],ecx
mov [edi+_NN_+ +12],edx
add eax,[FP_+_NN_+ksKey + 0]
adc ebx,[FP_+_NN_+ksKey + 4]
add ecx,[FP_+_NN_+ksKey + 8]
adc edx,[FP_+_NN_+ksKey +12]
if _NN_ eq (WCNT*8-16) ;inject the tweak words
add eax,[FP_+ ksTwk + 8]; (at the appropriate points)
adc ebx,[FP_+ ksTwk +12]
elseif _NN_ eq (WCNT*8-32)
add ecx,[FP_+ ksTwk + 0]
adc edx,[FP_+ ksTwk + 4]
endif
if _NN_ or _SKEIN_DEBUG
mov [esp+_NN_+X_stk + 0],eax
mov [esp+_NN_+X_stk + 4],ebx
mov [esp+_NN_+X_stk + 8],ecx
mov [esp+_NN_+X_stk +12],edx
endif
_NN_ = _NN_ - 16 ;end at X[0], so regs are already loaded for first MIX!
endm
;
if _SKEIN_DEBUG ;debug dump of state at this point
Skein_Debug_Block WCNT*64
Skein_Debug_Round WCNT*64,SKEIN_RND_KEY_INITIAL
endif
sub esi,-WCNT*8 ;skip the block (short immediate)
mov [FP_+blkPtr ],esi ;update block pointer
;
; now the key schedule is computed. Start the rounds
;
if SKEIN_ASM_UNROLL and 1024
_UNROLL_CNT = ROUNDS_1024/8
else
_UNROLL_CNT = SKEIN_UNROLL_1024
if ((ROUNDS_1024/8) mod _UNROLL_CNT)
.err "Invalid SKEIN_UNROLL_1024"
endif
xor edi,edi ;edi = round counter
Skein_1024_round_loop:
endif
_Rbase_ = 0
rept _UNROLL_CNT*2
; here with X[0], X[1] already loaded into eax..edx
R_1024_FourRounds %(4*_Rbase_+00),
;inject odd key schedule words
;inject odd key schedule words
if _UNROLL_CNT ne (ROUNDS_1024/8)
ks_Rotate eax,ebx,WCNT
inc edi ;edi = round number
endif
_Rbase_ = _Rbase_+1
ks_Inject 1024,15,15,eax,ebx,_Rbase_,15, ,_Rbase_
ks_Inject 1024,14,14,eax,ebx,_Rbase_,14,1
ks_Inject 1024,13,13,eax,ebx,_Rbase_,13,0
irp _w,<12,11,10,9,8,7,6,5,4,3,2>
ks_Inject 1024,_w,_w,eax,ebx,_Rbase_,_w
endm
ks_Inject 1024, , ,ecx,edx,_Rbase_,1
ks_Inject 1024, 0, ,eax,ebx,_Rbase_,0
if _SKEIN_DEBUG
Skein_Debug_Round 1024,SKEIN_RND_KEY_INJECT ,saveRegs
endif
endm ;rept _UNROLL_CNT
;
if (SKEIN_ASM_UNROLL and 1024) eq 0
cmp edi,2*(ROUNDS_1024/8)
jb Skein_1024_round_loop
endif
mov edi,[FP_+ctxPtr ] ;restore edi --> context
add edi,EDI_BIAS ;and bias it for short offsets below
;----------------------------
; feedforward: ctx->X[i] = X[i] ^ w[i], {i=0..15}
lea esi,[esp+Wcopy] ;use short offsets below
_NN_ = 0
rept WCNT/2
if _NN_ ;eax..edx already loaded the first time
mov eax,[esp+X_stk + _NN_ + 0]
mov ebx,[esp+X_stk + _NN_ + 4]
mov ecx,[esp+X_stk + _NN_ + 8]
mov edx,[esp+X_stk + _NN_ +12]
endif
if _NN_ eq 0
and dword ptr [CT_ + TWEAK+12],FIRST_MASK
endif
xor eax,[esi + _NN_ + 0]
xor ebx,[esi + _NN_ + 4]
xor ecx,[esi + _NN_ + 8]
xor edx,[esi + _NN_ +12]
mov [CT_+X_VARS+ _NN_ + 0],eax
mov [CT_+X_VARS+ _NN_ + 4],ebx
mov [CT_+X_VARS+ _NN_ + 8],ecx
mov [CT_+X_VARS+ _NN_ +12],edx
_NN_ = _NN_+16
endm
sub edi,EDI_BIAS ;undo the bias for return
if _SKEIN_DEBUG
Skein_Debug_Round 1024,SKEIN_RND_FEED_FWD
endif
; go back for more blocks, if needed
dec dword ptr [FP_+blkCnt]
jnz Skein1024_block_loop
Reset_Stack _Skein1024_Process_Block
ret
_Skein1024_Process_Block endp
;
ifdef _SKEIN_CODE_SIZE
public _Skein1024_Process_Block_CodeSize
_Skein1024_Process_Block_CodeSize proc
mov eax,_Skein1024_Process_Block_CodeSize - _Skein1024_Process_Block
ret
_Skein1024_Process_Block_CodeSize endp
;
public _Skein1024_Unroll_Cnt
_Skein1024_Unroll_Cnt proc
if _UNROLL_CNT ne ROUNDS_1024/8
mov eax,_UNROLL_CNT
else
xor eax,eax
endif
ret
_Skein1024_Unroll_Cnt endp
endif
;
endif ; _USE_ASM_ and 1024
;----------------------------------------------------------------
end
|
Examples/ch10/Repeat.asm | satadriver/LiunuxOS_t | 0 | 240263 | <filename>Examples/ch10/Repeat.asm
TITLE Repeat Block Examples (Repeat.asm)
; This program demonstrates the REPEAT, FOR,
; FORC, and WHILE directives.
; Last update: 2/30/02
INCLUDE Irvine32.inc
INCLUDE Macros.inc
COURSE STRUCT
Number BYTE 9 DUP(?)
Credits BYTE ?
COURSE ENDS
; A semester contains an array of courses.
SEMESTER STRUC
Courses COURSE 6 DUP(<>)
NumCourses WORD ?
SEMESTER ENDS
.data
; Create a character lookup table:
Delimiters LABEL BYTE
FORC code,<@#$%^&*!<!>>
BYTE "&code"
ENDM
BYTE 0 ; marks the end
; Generate Fibonacci numbers up to 0FFFFh
f1 = 1
f2 = 1
f3 = f1 + f2
DWORD f1,f2
WHILE f3 LT 0FFFFh
DWORD f3
f1 = f2
f2 = f3
f3 = f1 + f2
ENDM
ECHO ---------------------------------------------------------
iVal = 10
REPEAT 100 ; begin REPT loop
DWORD iVal ; status
iVal = iVal + 10
ENDM
; Define a set of semester variables.
FOR semName,<Fall1999,Spring2000,Summer2000,Fall2000,Spring2001,Summer2001>
semName SEMESTER <>
ENDM
.code
main PROC
mov esi,OFFSET Fall1999
mov ecx,2
L1:
mov edx,esi
add edx,OFFSET COURSE.Number
mWrite "Enter a course name: "
mReadStr edx,8
mWrite "Enter the credits: "
call ReadInt
mov (COURSE PTR [esi]).Credits,al
add esi,SIZEOF COURSE
Loop L1
exit
main ENDP
END main |
awordcount.adb | gtraines/ada_word_count | 0 | 1736 |
-- Pass a filename as a command line parameter
-- Parse and print out stats about the file
-- - Characters
-- - Lines
-- - Words
--
--
with Ada.Command_Line;
with Ada.Integer_Text_IO;
with Ada.Strings.Unbounded.Text_IO;
with Ada.Strings.Unbounded;
with Ada.Text_IO; use Ada.Text_IO;
with GNAT.IO_Aux;
with GNAT.Array_Split;
with GNAT.String_Split;
procedure awordcount is
-- *** Variable declarations ***
begin
New_Line;
if Ada.Command_Line.Argument_Count = 0 then
Put_Line(Item => " ERROR! Filename required.");
Put_Line(Item => " USAGE: awordcount file-to-get-counts-for.txt");
else
declare
-- *** Variable declarations ***
FileName : String(1..Ada.Command_Line.Argument(1)'length);
FileNameLength : Natural := Ada.Command_Line.Argument(1)'length;
SourceFile : Ada.Text_IO.File_Type;
begin
FileName := Ada.Command_Line.Argument(1);
Put(Item => "Parsing file: ");
Put_Line(Item => FileName);
if GNAT.IO_Aux.File_Exists(FileName) then
Open(SourceFile, In_File, FileName);
declare
package UStrings renames Ada.Strings.Unbounded;
package UnboundedIO renames Ada.Strings.Unbounded.Text_IO;
CurrentLine : UStrings.Unbounded_String := UStrings.Null_Unbounded_String;
CurrentLineLength : Integer := 0;
CharacterCount : Integer := 0;
LineCount : Integer := 0;
LineWordCount : GNAT.String_Split.Slice_Number;
SplitArr : GNAT.String_Split.Slice_Set;
WordSeparators : String := " ";
WordCount : Integer := 0;
begin
while not End_Of_File(SourceFile)
loop
CurrentLine := UnboundedIO.Get_Line(File => SourceFile);
LineCount := LineCount + 1;
CurrentLineLength := UStrings.To_String(CurrentLine)'Length;
CharacterCount := CharacterCount + CurrentLineLength;
GNAT.String_Split.Create(SplitArr, UStrings.To_String(CurrentLine), WordSeparators, Mode => GNAT.String_Split.Multiple);
LineWordCount := GNAT.String_Split.Slice_Count(S => SplitArr);
WordCount := WordCount + Integer(LineWordCount);
end loop;
Put(Item => "Characters: ");
Ada.Integer_Text_IO.Put(CharacterCount);
New_Line;
Put(Item => "Lines: ");
Ada.Integer_Text_IO.Put(LineCount);
New_Line;
Put(Item => "Words: ");
Ada.Integer_Text_IO.Put(WordCount);
end;
Close(SourceFile);
else
Put(Item => FileName & " not found");
end if;
end;
end if;
New_Line;
New_Line;
end awordcount;
|
examples/stream_w.adb | ytomino/iconv-ada | 0 | 17880 | with Ada.Streams;
with Ada.Text_IO.Text_Streams;
with iconv.Streams;
procedure stream_w is
use type Ada.Streams.Stream_Element_Offset;
Std_Input : constant Ada.Text_IO.Text_Streams.Stream_Access :=
Ada.Text_IO.Text_Streams.Stream (Ada.Text_IO.Standard_Input.all);
Std_Output : constant Ada.Text_IO.Text_Streams.Stream_Access :=
Ada.Text_IO.Text_Streams.Stream (Ada.Text_IO.Standard_Output.all);
iconv_Converter : aliased iconv.Converter :=
iconv.Open (To => "UTF-8", From => "ISO-2022-JP-3");
iconv_Output : aliased iconv.Streams.Out_Type :=
iconv.Streams.Open (iconv_Converter, Stream => Std_Output);
S : Ada.Streams.Stream_Element_Array (1 .. 1);
Last : Ada.Streams.Stream_Element_Count;
begin
loop
Ada.Streams.Read (Std_Input.all, S, Last);
exit when Last = 0;
Ada.Streams.Write (iconv.Streams.Stream (iconv_Output).all, S);
end loop;
iconv.Streams.Finish (iconv_Output);
end stream_w;
|
Mid-Term/Solution/4.asm | Shakib-IO/CSE331L-Section-10-Fall20-NSU | 0 | 95699 | <reponame>Shakib-IO/CSE331L-Section-10-Fall20-NSU
; You may customize this and other start-up templates;
; The location of this template is c:\emu8086\inc\0_com_template.txt
.MODEL SMALL
.CODE
org 100h
START:
MOV CX, 5
L1:
POP CX
L2:
MOV AH,2H
MOV DL,2AH
INT 21H
LOOP L2
MOV DL,0Ah
INT 21H
MOV DL,0Dh
INT 21H
POP CX
LOOP L1
MOV CX,5
L3:
PUSH CX
LOOP L3
EXIT: INT 20H
END START |
programs/oeis/127/A127922.asm | neoneye/loda | 22 | 20237 | ; A127922: 1/24 of product of three numbers: n-th prime, previous and following number.
; 1,5,14,55,91,204,285,506,1015,1240,2109,2870,3311,4324,6201,8555,9455,12529,14910,16206,20540,23821,29370,38024,42925,45526,51039,53955,60116,85344,93665,107134,111895,137825,143450,161239,180441,194054,215731,238965,247065,290320,299536,318549,328350,391405,462056,487369,500365,527046,568820,583220,658875,707264,757966,811035,829260,885569,924490,944371,1048061,1205589,1253330,1277666,1327279,1511015,1594684,1740899,1771175,1832776,1927830,2059604,2162281,2268315,2340896,2452645,2607099,2686700,2850730,3064985,3109085,3335940,3382596,3525170,3622411,3771600,3976814,4082155,4135516,4243629,4579240,4812534,4932095,5177125,5302626,5494655,5892510,5960631,6597495,6819449
add $0,1
mul $0,2
seq $0,93515 ; Numbers k such that either k or k-1 is a prime.
bin $0,3
div $0,4
|
Transynther/x86/_processed/NONE/_zr_/i7-7700_9_0xca.log_21829_782.asm | ljhsiun2/medusa | 9 | 167908 | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r15
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x1125c, %rsi
lea addresses_UC_ht+0x12ecc, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
xor %r12, %r12
mov $41, %rcx
rep movsq
nop
and %r15, %r15
lea addresses_normal_ht+0x975c, %rdi
sub %r11, %r11
mov (%rdi), %r15w
cmp %r12, %r12
lea addresses_D_ht+0x1d1c, %r15
clflush (%r15)
nop
nop
nop
nop
nop
inc %rsi
movb (%r15), %r11b
nop
nop
nop
nop
dec %rsi
lea addresses_WT_ht+0x1d3dc, %rsi
lea addresses_A_ht+0x19cee, %rdi
nop
nop
nop
nop
cmp %rbp, %rbp
mov $85, %rcx
rep movsb
nop
nop
nop
and $36898, %r11
lea addresses_WT_ht+0x1b9e4, %rcx
nop
sub %rsi, %rsi
mov $0x6162636465666768, %r12
movq %r12, %xmm4
and $0xffffffffffffffc0, %rcx
vmovaps %ymm4, (%rcx)
nop
cmp $63995, %r12
lea addresses_WT_ht+0x14d34, %r15
nop
cmp $10507, %r11
movb $0x61, (%r15)
nop
nop
nop
nop
inc %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r15
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r8
push %rbp
push %rdx
push %rsi
// Store
lea addresses_normal+0x1917c, %r15
nop
nop
nop
nop
nop
add %rsi, %rsi
mov $0x5152535455565758, %r12
movq %r12, %xmm1
movaps %xmm1, (%r15)
nop
nop
cmp %r12, %r12
// Store
lea addresses_PSE+0x1aad5, %rsi
nop
cmp $62842, %r8
mov $0x5152535455565758, %r12
movq %r12, %xmm6
movups %xmm6, (%rsi)
and $11025, %rsi
// Faulty Load
lea addresses_WC+0x1f5c, %rdx
nop
nop
nop
nop
nop
sub $543, %rsi
movb (%rdx), %r15b
lea oracles, %r8
and $0xff, %r15
shlq $12, %r15
mov (%r8,%r15,1), %r15
pop %rsi
pop %rdx
pop %rbp
pop %r8
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': True, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_normal'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_PSE'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_WC'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 2, 'NT': True, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 7, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 0, 'same': False, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': True, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WT_ht'}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
rando/src/asm-disabled/progressive-items.asm | konkers/neutopia | 1 | 240034 | arch pce.cpu
macro seek(variable offset) {
origin (offset - $6000)
base offset
}
seek($ddf1);
get_sword_handler:
dw handle_progressive_item
dw handle_progressive_item
dw handle_progressive_item
seek($df52);
handle_progressive_item:
ldx $35d0
inc $2e44,x
// Store the value back to $35d1 so the rest of the code knows
// which item to show.
lda $2e44,x
sta $35d1
jmp $de79
|
adagl/linux/glx-ext.ads | Lucretia/old_nehe_ada95 | 0 | 11590 | <reponame>Lucretia/old_nehe_ada95<filename>adagl/linux/glx-ext.ads
--
-- Copyright (c) 2002-2003, <NAME>
-- All rights reserved.
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions are
-- met:
--
-- * Redistributions of source code must retain the above copyright notice,
-- this list of conditions and the following disclaimer.
-- * Redistributions in binary form must reproduce the above copyright
-- notice,
-- this list of conditions and the following disclaimer in the
-- documentation
-- and/or other materials provided with the distribution.
-- * The names of its contributors may not be used to endorse or promote
-- products derived from this software without specific prior written
-- permission.
--
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-- "AS IS"
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-- SUBSTITUTE GOODS OR SERVICES;
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-- POSSIBILITY OF SUCH DAMAGE.
--
with OpenGL.GLX;
with X_Lib;
package OpenGL.GLX.EXT is
GLX_GLXEXT_VERSION : constant := 5;
GLX_SAMPLE_BUFFERS_ARB : constant := 100000;
GLX_SAMPLES_ARB : constant := 100001;
GLX_SAMPLE_BUFFERS_SGIS : constant := 100000;
GLX_SAMPLES_SGIS : constant := 100001;
GLX_X_VISUAL_TYPE_EXT : constant := 16#0022#;
GLX_TRANSPARENT_TYPE_EXT : constant := 16#0023#;
GLX_TRANSPARENT_INDEX_VALUE_EXT : constant := 16#0024#;
GLX_TRANSPARENT_RED_VALUE_EXT : constant := 16#0025#;
GLX_TRANSPARENT_GREEN_VALUE_EXT : constant := 16#0026#;
GLX_TRANSPARENT_BLUE_VALUE_EXT : constant := 16#0027#;
GLX_TRANSPARENT_ALPHA_VALUE_EXT : constant := 16#0028#;
GLX_NONE_EXT : constant := 16#8000#;
GLX_TRUE_COLOR_EXT : constant := 16#0000_8002#;
GLX_DIRECT_COLOR_EXT : constant := 16#0000_8003#;
GLX_PSEUDO_COLOR_EXT : constant := 16#0000_8004#;
GLX_STATIC_COLOR_EXT : constant := 16#0000_8005#;
GLX_GRAY_SCALE_EXT : constant := 16#0000_8006#;
GLX_STATIC_GRAY_EXT : constant := 16#0000_8007#;
GLX_TRANSPARENT_RGB_EXT : constant := 16#0000_8008#;
GLX_TRANSPARENT_INDEX_EXT : constant := 16#0000_8009#;
GLX_VISUAL_CAVEAT_EXT : constant := 16#0020#;
GLX_SLOW_VISUAL_EXT : constant := 16#0000_8001#;
GLX_NON_CONFORMANT_VISUAL_EXT : constant := 16#0000_800D#;
GLX_SHARE_CONTEXT_EXT : constant := 16#0000_800A#;
GLX_VISUAL_ID_EXT : constant := 16#0000_800B#;
GLX_SCREEN_EXT : constant := 16#0000_800C#;
GLX_WINDOW_BIT_SGIX : constant := 16#0001#;
GLX_PIXMAP_BIT_SGIX : constant := 16#0002#;
GLX_RGBA_BIT_SGIX : constant := 16#0001#;
GLX_COLOR_INDEX_BIT_SGIX : constant := 16#0002#;
GLX_DRAWABLE_TYPE_SGIX : constant := 16#0000_8010#;
GLX_RENDER_TYPE_SGIX : constant := 16#0000_8011#;
GLX_X_RENDERABLE_SGIX : constant := 16#0000_8012#;
GLX_FBCONFIG_ID_SGIX : constant := 16#0000_8013#;
GLX_RGBA_TYPE_SGIX : constant := 16#0000_8014#;
GLX_COLOR_INDEX_TYPE_SGIX : constant := 16#0000_8015#;
GLX_PBUFFER_BIT_SGIX : constant := 16#0004#;
GLX_BUFFER_CLOBBER_MASK_SGIX : constant := 16#0800_0000#;
GLX_FRONT_LEFT_BUFFER_BIT_SGIX : constant := 16#0001#;
GLX_FRONT_RIGHT_BUFFER_BIT_SGIX : constant := 16#0002#;
GLX_BACK_LEFT_BUFFER_BIT_SGIX : constant := 16#0004#;
GLX_BACK_RIGHT_BUFFER_BIT_SGIX : constant := 16#0008#;
GLX_AUX_BUFFERS_BIT_SGIX : constant := 16#0010#;
GLX_DEPTH_BUFFER_BIT_SGIX : constant := 16#0020#;
GLX_STENCIL_BUFFER_BIT_SGIX : constant := 16#0040#;
GLX_ACCUM_BUFFER_BIT_SGIX : constant := 16#0080#;
GLX_SAMPLE_BUFFERS_BIT_SGIX : constant := 16#0100#;
GLX_MAX_PBUFFER_WIDTH_SGIX : constant := 16#0000_8016#;
GLX_MAX_PBUFFER_HEIGHT_SGIX : constant := 16#0000_8017#;
GLX_MAX_PBUFFER_PIXELS_SGIX : constant := 16#0000_8018#;
GLX_OPTIMAL_PBUFFER_WIDTH_SGIX : constant := 16#0000_8019#;
GLX_OPTIMAL_PBUFFER_HEIGHT_SGIX : constant := 16#0000_801A#;
GLX_PRESERVED_CONTENTS_SGIX : constant := 16#0000_801B#;
GLX_LARGEST_PBUFFER_SGIX : constant := 16#0000_801C#;
GLX_WIDTH_SGIX : constant := 16#0000_801D#;
GLX_HEIGHT_SGIX : constant := 16#0000_801E#;
GLX_EVENT_MASK_SGIX : constant := 16#0000_801F#;
GLX_DAMAGED_SGIX : constant := 16#0000_8020#;
GLX_SAVED_SGIX : constant := 16#0000_8021#;
GLX_WINDOW_SGIX : constant := 16#0000_8022#;
GLX_PBUFFER_SGIX : constant := 16#0000_8023#;
GLX_SYNC_FRAME_SGIX : constant := 16#0000#;
GLX_SYNC_SWAP_SGIX : constant := 16#0001#;
GLX_DIGITAL_MEDIA_PBUFFER_SGIX : constant := 16#0000_8024#;
GLX_BLENDED_RGBA_SGIS : constant := 16#0000_8025#;
GLX_MULTISAMPLE_SUB_RECT_WIDTH_SGIS : constant := 16#0000_8026#;
GLX_MULTISAMPLE_SUB_RECT_HEIGHT_SGIS : constant := 16#0000_8027#;
GLX_SAMPLE_BUFFERS_3DFX : constant := 16#0000_8050#;
GLX_SAMPLES_3DFX : constant := 16#0000_8051#;
GLX_3DFX_WINDOW_MODE_MESA : constant := 16#0001#;
GLX_3DFX_FULLSCREEN_MODE_MESA : constant := 16#0002#;
GLX_VISUAL_SELECT_GROUP_SGIX : constant := 16#0000_8028#;
GLX_SWAP_METHOD_OML : constant := 16#0000_8060#;
GLX_SWAP_EXCHANGE_OML : constant := 16#0000_8061#;
GLX_SWAP_COPY_OML : constant := 16#0000_8062#;
GLX_SWAP_UNDEFINED_OML : constant := 16#0000_8063#;
type GLXVIDEOSOURCESGIX is new X_Lib.XID;
type GLXFBCONFIGIDSGIX is new X_Lib.XID;
type GLXPBUFFERSGIX is new X_Lib.XID;
type GLXFBCONFIGSGIX is access all OpenGL.GLX.struct_GLXFBConfigRec;
type GLXEXTFUNCPTR is access procedure;
end OpenGL.GLX.EXT;
|
data/pokemon/base_stats/feebas.asm | AtmaBuster/pokeplat-gen2 | 6 | 92349 | <reponame>AtmaBuster/pokeplat-gen2<gh_stars>1-10
db 0 ; species ID placeholder
db 20, 15, 20, 80, 10, 55
; hp atk def spd sat sdf
db WATER, WATER ; type
db 255 ; catch rate
db 61 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_F50 ; gender ratio
db 20 ; step cycles to hatch
INCBIN "gfx/pokemon/feebas/front.dimensions"
db GROWTH_ERRATIC ; growth rate
dn EGG_WATER_1, EGG_DRAGON ; egg groups
db 70 ; happiness
; tm/hm learnset
tmhm WATER_PULSE, TOXIC, HAIL, HIDDEN_POWER, ICE_BEAM, BLIZZARD, PROTECT, RAIN_DANCE, FRUSTRATION, RETURN, DOUBLE_TEAM, FACADE, SECRET_POWER, REST, ATTRACT, ENDURE, CAPTIVATE, SLEEP_TALK, NATURAL_GIFT, SWAGGER, SUBSTITUTE, SURF, WATERFALL, DIVE, ICY_WIND, SNORE, SWIFT
; end
|
alloy4fun_models/trainstlt/models/5/AxxguuqojH2SbicrZ.als | Kaixi26/org.alloytools.alloy | 0 | 3177 | <filename>alloy4fun_models/trainstlt/models/5/AxxguuqojH2SbicrZ.als
open main
pred idAxxguuqojH2SbicrZ_prop6 {
all t : Track | always ((some t.signal) implies (t.signal != t.signal'))
}
pred __repair { idAxxguuqojH2SbicrZ_prop6 }
check __repair { idAxxguuqojH2SbicrZ_prop6 <=> prop6o } |
oeis/110/A110344.asm | neoneye/loda-programs | 11 | 93938 | ; A110344: a(n) = sum( n+k, k=0..n-1 ) = n(3n-1)/2 if n is even; a(n) = sum( n-k, k=0..n-1 ) = n(n+1)/2 if n is odd.
; Submitted by <NAME>
; 1,5,6,22,15,51,28,92,45,145,66,210,91,287,120,376,153,477,190,590,231,715,276,852,325,1001,378,1162,435,1335,496,1520,561,1717,630,1926,703,2147,780,2380,861,2625,946,2882,1035,3151,1128,3432,1225,3725,1326,4030,1431,4347,1540,4676,1653,5017,1770,5370,1891,5735,2016,6112,2145,6501,2278,6902,2415,7315,2556,7740,2701,8177,2850,8626,3003,9087,3160,9560,3321,10045,3486,10542,3655,11051,3828,11572,4005,12105,4186,12650,4371,13207,4560,13776,4753,14357,4950,14950
mov $2,$0
dif $0,2
add $0,1
add $2,$0
add $2,$0
mul $0,$2
div $0,2
|
work/motepy/src/grammar/MotePyLexer.g4 | jayaraj-poroor/verticalthings | 2 | 6364 | lexer grammar MotePyLexer;
@lexer::members {
let CommonToken = require('antlr4/Token').CommonToken;
let MotePyParser = require('./MotePy').MotePy;
let old_lexer = MotePyLexer;
MotePyLexer = function() {
old_lexer.apply(this, arguments);
this.reset.call(this);
}
MotePyLexer.prototype = Object.create(old_lexer.prototype);
MotePyLexer.prototype.constructor = MotePyLexer;
MotePyLexer.prototype.reset = function() {
// A queue where extra tokens are pushed on (see the NEWLINE lexer rule).
this.token_queue = [];
// The stack that keeps track of the indentation level.
this.indents = [];
// The amount of opened braces, brackets and parenthesis.
this.opened = 0;
antlr4.Lexer.prototype.reset.call(this);
};
MotePyLexer.prototype.emitToken = function(token) {
this._token = token;
this.token_queue.push(token);
};
/**
* Return the next token from the character stream and records this last
* token in case it resides on the default channel. This recorded token
* is used to determine when the lexer could possibly match a regex
* literal.
*
*/
MotePyLexer.prototype.nextToken = function() {
// Check if the end-of-file is ahead and there are still some DEDENTS expected.
if (this._input.LA(1) === MotePyParser.EOF && this.indents.length) {
// Remove any trailing EOF tokens from our buffer.
this.token_queue = this.token_queue.filter(function(val) {
return val.type !== MotePyParser.EOF;
});
// First emit an extra line break that serves as the end of the statement.
this.emitToken(this.commonToken(MotePyParser.NEWLINE, "\n"));
// Now emit as much DEDENT tokens as needed.
while (this.indents.length) {
this.emitToken(this.createDedent());
this.indents.pop();
}
// Put the EOF back on the token stream.
this.emitToken(this.commonToken(MotePyParser.EOF, "<EOF>"));
}
let next = antlr4.Lexer.prototype.nextToken.call(this);
return this.token_queue.length ? this.token_queue.shift() : next;
};
MotePyLexer.prototype.createDedent = function() {
return this.commonToken(MotePyParser.DEDENT, "");
}
MotePyLexer.prototype.commonToken = function(type, text) {
let stop = this.getCharIndex() - 1;
let start = text.length ? stop - text.length + 1 : stop;
return new CommonToken(this._tokenFactorySourcePair, type, antlr4.Lexer.DEFAULT_TOKEN_CHANNEL, start, stop);
}
// Calculates the indentation of the provided spaces, taking the
// following rules into account:
//
// "Tabs are replaced (from left to right) by one to eight spaces
// such that the total number of characters up to and including
// the replacement is a multiple of eight [...]"
//
// -- https://docs.python.org/3.1/reference/lexical_analysis.html#indentation
MotePyLexer.prototype.getIndentationCount = function(whitespace) {
let count = 0;
for (let i = 0; i < whitespace.length; i++) {
if (whitespace[i] === '\t') {
count += 8 - count % 8;
} else {
count++;
}
}
return count;
}
MotePyLexer.prototype.atStartOfInput = function() {
return this.getCharIndex() === 0;
}
}
ASYNC: 'async';
AWAIT: 'await';
MODULE
: 'module'
;
ARROW : '->';
USE
: 'use'
;
CONFIG
: 'config'
;
DEF : 'def';
CONST
: 'const'
;
IF
: 'if'
;
ELSE
: 'else'
;
FOR
: 'for'
;
IN
: 'in'
;
INCLUDE : 'include';
VOID: 'void';
WHILE: 'while';
TRUE: 'true';
FALSE: 'false';
RANGE: 'range';
RING: 'ring';
SEMI: ';';
LP: '(';
RP: ')';
LB: '{';
RB: '}';
LS: '[';
RS: ']';
COMMA: ',';
DCOLON: '::';
COLON: ':';
PERIOD: '.';
PLUS : '+';
MINUS: '-';
MUL : '*';
DIV: '/';
MOD: '%';
POW: '**';
HPROD: '(*)';
CAT: '(.)';
LT: '<';
GT: '>';
LTE: '<=';
GTE: '>=';
EQ: '==';
NEQ: '!=';
ASSIGN: '=';
LAND: '&&';
LOR: '||';
LNOT: '!';
LSHIFT: '<<';
RSHIFT: '>>';
BAND: '&';
BOR: '|';
BNOT: '~';
BXOR: '^';
EFFECTS: '@effects';
EASSIGN: ':=';
ELIF : 'elif';
INT: 'int';
FLOAT: 'float';
BOOLEAN: 'boolean';
I8: 'int8_t';
U8: 'uint8_t';
I16: 'int16_t';
U16: 'uint16_t';
I32: 'int32_t';
U32: 'uint32_t';
RETURN: 'return';
Identifier
: IdentifierNondigit
( IdentifierNondigit
| Digit
)*
;
fragment
IdentifierNondigit
: Nondigit
| UniversalCharacterName
//| // other implementation-defined characters...
;
fragment
Nondigit
: [a-zA-Z_]
;
fragment
Digit
: [0-9]
;
fragment
UniversalCharacterName
: '\\u' HexQuad
| '\\U' HexQuad HexQuad
;
fragment
HexQuad
: HexadecimalDigit HexadecimalDigit HexadecimalDigit HexadecimalDigit
;
IntegerConstant
: DecimalConstant IntegerSuffix?
| OctalConstant IntegerSuffix?
| HexadecimalConstant IntegerSuffix?
| BinaryConstant
;
fragment
BinaryConstant
: '0' [bB] [0-1]+
;
fragment
DecimalConstant
: NonzeroDigit Digit*
;
fragment
OctalConstant
: '0' OctalDigit*
;
fragment
HexadecimalConstant
: HexadecimalPrefix HexadecimalDigit+
;
fragment
HexadecimalPrefix
: '0' [xX]
;
fragment
NonzeroDigit
: [1-9]
;
fragment
OctalDigit
: [0-7]
;
fragment
HexadecimalDigit
: [0-9a-fA-F]
;
fragment
IntegerSuffix
: UnsignedSuffix LongSuffix?
| UnsignedSuffix LongLongSuffix
| LongSuffix UnsignedSuffix?
| LongLongSuffix UnsignedSuffix?
;
fragment
UnsignedSuffix
: [uU]
;
fragment
LongSuffix
: [lL]
;
fragment
LongLongSuffix
: 'll' | 'LL'
;
FloatingConstant
: DecimalFloatingConstant
| HexadecimalFloatingConstant
;
fragment
DecimalFloatingConstant
: FractionalConstant ExponentPart? FloatingSuffix?
| DigitSequence ExponentPart FloatingSuffix?
;
fragment
HexadecimalFloatingConstant
: HexadecimalPrefix HexadecimalFractionalConstant BinaryExponentPart FloatingSuffix?
| HexadecimalPrefix HexadecimalDigitSequence BinaryExponentPart FloatingSuffix?
;
fragment
FractionalConstant
: DigitSequence? '.' DigitSequence
| DigitSequence '.'
;
fragment
ExponentPart
: 'e' Sign? DigitSequence
| 'E' Sign? DigitSequence
;
fragment
Sign
: '+' | '-'
;
DigitSequence
: Digit+
;
fragment
HexadecimalFractionalConstant
: HexadecimalDigitSequence? '.' HexadecimalDigitSequence
| HexadecimalDigitSequence '.'
;
fragment
BinaryExponentPart
: 'p' Sign? DigitSequence
| 'P' Sign? DigitSequence
;
fragment
HexadecimalDigitSequence
: HexadecimalDigit+
;
fragment
FloatingSuffix
: 'f' | 'l' | 'F' | 'L'
;
CharacterConstant
: '\'' CCharSequence '\''
| 'L\'' CCharSequence '\''
| 'u\'' CCharSequence '\''
| 'U\'' CCharSequence '\''
;
fragment
CCharSequence
: CChar+
;
fragment
CChar
: ~['\\\r\n]
| EscapeSequence
;
fragment
EscapeSequence
: SimpleEscapeSequence
| OctalEscapeSequence
| HexadecimalEscapeSequence
| UniversalCharacterName
;
fragment
SimpleEscapeSequence
: '\\' ['"?abfnrtv\\]
;
fragment
OctalEscapeSequence
: '\\' OctalDigit
| '\\' OctalDigit OctalDigit
| '\\' OctalDigit OctalDigit OctalDigit
;
fragment
HexadecimalEscapeSequence
: '\\x' HexadecimalDigit+
;
StringLiteral
: EncodingPrefix? '"' SCharSequence? '"'
;
fragment
EncodingPrefix
: 'u8'
| 'u'
| 'U'
| 'L'
;
fragment
SCharSequence
: SChar+
;
fragment
SChar
: ~["\\\r\n]
| EscapeSequence
| '\\\n' // Added line
| '\\\r\n' // Added line
;
fragment SPACES
: [ \t]+
;
fragment COMMENT
: '#' ~[\r\n\f]*
;
fragment LINE_JOINING
: '\\' SPACES? ( '\r'? '\n' | '\r' | '\f' )
;
SKIP_
: ( SPACES | COMMENT | LINE_JOINING ) -> skip
;
NEWLINE
: ( {this.atStartOfInput()}? SPACES
| ( '\r'? '\n' | '\r' ) SPACES?
) {
let newLine = this.text.replace(/[^\r\n]+/g, '');
let spaces = this.text.replace(/[\r\n]+/g, '');
// Strip newlines inside open clauses except if we are near EOF. We keep NEWLINEs near EOF to
// satisfy the final newline needed by the single_put rule used by the REPL.
let next = this._input.LA(1);
let nextnext = this._input.LA(2);
if (this.opened > 0 || (nextnext != -1 /* EOF */ && (next === 13 /* '\r' */ || next === 10 /* '\n' */ || next === 35 /* '#' */))) {
// If we're inside a list or on a blank line, ignore all indents,
// dedents and line breaks.
this.skip();
} else {
this.emitToken(this.commonToken(MotePyParser.NEWLINE, newLine));
let indent = this.getIndentationCount(spaces);
let previous = this.indents.length ? this.indents[this.indents.length - 1] : 0;
if (indent === previous) {
// skip indents of the same size as the present indent-size
this.skip();
} else if (indent > previous) {
this.indents.push(indent);
this.emitToken(this.commonToken(MotePyParser.INDENT, spaces));
} else {
// Possibly emit more than 1 DEDENT token.
while (this.indents.length && this.indents[this.indents.length - 1] > indent) {
this.emitToken(this.createDedent());
this.indents.pop();
}
}
}
}
;
|
Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_21829_1663.asm | ljhsiun2/medusa | 9 | 245101 | <reponame>ljhsiun2/medusa
.global s_prepare_buffers
s_prepare_buffers:
push %r15
push %r8
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
lea addresses_WC_ht+0xafc1, %rdi
nop
nop
nop
dec %r8
movb (%rdi), %cl
nop
nop
nop
nop
nop
xor %rdi, %rdi
lea addresses_D_ht+0x17af1, %rbp
nop
nop
nop
nop
and %rax, %rax
vmovups (%rbp), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %rbx
cmp $25637, %r8
lea addresses_WC_ht+0x19221, %rbp
nop
xor $50383, %r15
mov $0x6162636465666768, %rbx
movq %rbx, %xmm4
movups %xmm4, (%rbp)
nop
and %r8, %r8
lea addresses_A_ht+0x8821, %rdi
nop
and %rbp, %rbp
mov (%rdi), %rax
nop
nop
nop
nop
sub %rbp, %rbp
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r15
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r9
push %rax
push %rbp
push %rcx
push %rsi
// Load
lea addresses_US+0x1f821, %r12
clflush (%r12)
nop
nop
dec %rsi
mov (%r12), %ebp
nop
and %rbp, %rbp
// Store
lea addresses_UC+0x1c221, %r13
nop
sub $32251, %rax
movw $0x5152, (%r13)
nop
sub %r12, %r12
// Store
lea addresses_normal+0xa921, %r12
clflush (%r12)
nop
cmp $9166, %rsi
movb $0x51, (%r12)
and %r9, %r9
// Faulty Load
lea addresses_RW+0x1d221, %r12
nop
nop
nop
nop
nop
and $22076, %r9
vmovaps (%r12), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $1, %xmm5, %r13
lea oracles, %r12
and $0xff, %r13
shlq $12, %r13
mov (%r12,%r13,1), %r13
pop %rsi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0, 'same': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 9, 'same': False, 'type': 'addresses_US'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 11, 'same': False, 'type': 'addresses_UC'}, 'OP': 'STOR'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 8, 'same': False, 'type': 'addresses_normal'}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 0, 'same': True, 'type': 'addresses_RW'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 4, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'LOAD'}
{'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 4, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'dst': {'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 11, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'STOR'}
{'src': {'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 9, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
src/Categories/Diagram/Coequalizer/Properties.agda | maxsnew/agda-categories | 0 | 12468 | {-# OPTIONS --without-K --safe #-}
open import Categories.Category
-- we use duality to prove properties about coequalizer
module Categories.Diagram.Coequalizer.Properties {o ℓ e} (C : Category o ℓ e) where
open Category C
open import Categories.Diagram.Coequalizer C using (Coequalizer; IsCoequalizer)
open import Categories.Morphism C
import Categories.Morphism.Reasoning as MR
open import Categories.Diagram.Equalizer op
open import Categories.Diagram.Equalizer.Properties op
open import Categories.Diagram.Duality C
open import Categories.Diagram.KernelPair C
open import Categories.Diagram.Pullback C
open import Categories.Morphism.Regular C
import Relation.Binary.Reasoning.Setoid as SR
open Pullback hiding (universal; unique)
private
variable
A B : Obj
f g : A ⇒ B
module _ (coe : Coequalizer f g) where
open Coequalizer coe
private
equalizer : Equalizer f g
equalizer = Coequalizer⇒coEqualizer coe
open Equalizer equalizer
using (unique′; unique-diagram)
renaming ( id-equalize to id-coequalize
; equalize-resp-≈ to coequalize-resp-≈
; equalize-resp-≈′ to coequalize-resp-≈′
)
public
-- a regular epi is a coequalizer of its kernel pair
regular-is-coeq-kp : {A B : Obj} (f : A ⇒ B) → RegularEpi f → (kp : KernelPair f) → IsCoequalizer (p₁ kp) (p₂ kp) f
regular-is-coeq-kp {A} {B} f record { C = D ; h = h ; g = g ; coequalizer = coeq } kp = record
{ equality = IsPullback.commute (isPullback kp)
; coequalize = λ {_}{u} u∘p₁≈u∘p₂ → coequalize (u∘h≈u∘g u u∘p₁≈u∘p₂)
; universal = universal
; unique = unique
}
where
open IsCoequalizer coeq
pb-univ : D ⇒ P kp
pb-univ = IsPullback.universal (isPullback kp) equality
u∘h≈u∘g : {X : Obj} → (u : A ⇒ X) → u ∘ (p₁ kp) ≈ u ∘ (p₂ kp) → u ∘ h ≈ u ∘ g
u∘h≈u∘g {X} u u∘p₁≈u∘p₂ = begin
u ∘ h ≈˘⟨ refl⟩∘⟨ p₁∘universal≈h₁ kp ⟩
u ∘ (p₁ kp ∘ pb-univ) ≈⟨ pullˡ u∘p₁≈u∘p₂ ⟩
(u ∘ p₂ kp) ∘ pb-univ ≈⟨ pullʳ (p₂∘universal≈h₂ kp) ⟩
u ∘ g ∎
where
open Category.HomReasoning C
open MR C
retract-coequalizer : ∀ {X Y} {f : Y ⇒ X} {g : X ⇒ Y} → f RetractOf g → IsCoequalizer (g ∘ f) id f
retract-coequalizer f∘g≈id = IscoEqualizer⇒IsCoequalizer (section-equalizer f∘g≈id)
|
source/oasis/program-elements-abort_statements.ads | reznikmm/gela | 0 | 27254 | -- SPDX-FileCopyrightText: 2019 <NAME> <<EMAIL>>
--
-- SPDX-License-Identifier: MIT
-------------------------------------------------------------
with Program.Elements.Statements;
with Program.Lexical_Elements;
with Program.Elements.Expressions;
package Program.Elements.Abort_Statements is
pragma Pure (Program.Elements.Abort_Statements);
type Abort_Statement is
limited interface and Program.Elements.Statements.Statement;
type Abort_Statement_Access is access all Abort_Statement'Class
with Storage_Size => 0;
not overriding function Aborted_Tasks
(Self : Abort_Statement)
return not null Program.Elements.Expressions.Expression_Vector_Access
is abstract;
type Abort_Statement_Text is limited interface;
type Abort_Statement_Text_Access is access all Abort_Statement_Text'Class
with Storage_Size => 0;
not overriding function To_Abort_Statement_Text
(Self : in out Abort_Statement)
return Abort_Statement_Text_Access is abstract;
not overriding function Abort_Token
(Self : Abort_Statement_Text)
return not null Program.Lexical_Elements.Lexical_Element_Access
is abstract;
not overriding function Semicolon_Token
(Self : Abort_Statement_Text)
return not null Program.Lexical_Elements.Lexical_Element_Access
is abstract;
end Program.Elements.Abort_Statements;
|
tests/typing/bad/testfile-type-4.adb | xuedong/mini-ada | 0 | 13847 | with Ada.Text_IO; use Ada.Text_IO;
procedure P is type t is access u; begin put('a'); end;
|
programs/oeis/054/A054881.asm | neoneye/loda | 22 | 19685 | ; A054881: Number of walks of length n along the edges of an octahedron starting and ending at a vertex and also ( with a(0)=0 ) between two opposite vertices.
; 1,0,4,8,48,160,704,2688,11008,43520,175104,698368,2797568,11182080,44744704,178946048,715849728,2863267840,11453333504,45812809728,183252287488,733007052800,2932032405504,11728121233408,46912501710848,187649973288960,750599960264704,3002399706841088,12009599095799808,48038395846328320,192153584459055104,768614335688736768,3074457347049914368,12297829379609722880,49191317535618760704,196765270108115304448,787061080501180694528,3148244321867283824640,12592977287744013205504,50371909150426297008128,201487636602804699660288,805950546409019775385600,3223802185640477148053504,12895208742553112499191808,51580834970230042182811648,206323339880884984359157760,825293359523610306180808704,3301173438094300487234879488,13204693752377483423916228608,52818775009509370745711493120,211275100038038608882752815104,845100400152152183731197575168,3380401600608613238524417671168,13521606402434443946898415943680,54086425609737793801992173256704,216345702438951139179171674062848,865382809755804628774280734179328,3461531239023218370981934860861440,13846124956092873772158115595157504,55384499824371494512171710077206528,221537999297485979201608344915673088,886151997189943914500590370448998400
mov $4,2
mov $6,$0
lpb $4
mov $0,$6
sub $4,1
add $0,$4
trn $0,1
seq $0,245489 ; a(n) = (1^n + (-2)^n + 4^n)/3.
mov $2,$4
mov $3,1
add $3,$0
add $3,$0
mul $2,$3
add $1,$2
mov $5,$3
lpe
min $6,1
mul $6,$5
sub $1,$6
div $1,3
mov $0,$1
|
gcc-gcc-7_3_0-release/gcc/testsuite/ada/acats/tests/cc/cc3007a.ada | best08618/asylo | 7 | 17450 | -- CC3007A.ADA
-- Grant of Unlimited Rights
--
-- Under contracts F33600-87-D-0337, F33600-84-D-0280, MDA903-79-C-0687,
-- F08630-91-C-0015, and DCA100-97-D-0025, the U.S. Government obtained
-- unlimited rights in the software and documentation contained herein.
-- Unlimited rights are defined in DFAR 252.227-7013(a)(19). By making
-- this public release, the Government intends to confer upon all
-- recipients unlimited rights equal to those held by the Government.
-- These rights include rights to use, duplicate, release or disclose the
-- released technical data and computer software in whole or in part, in
-- any manner and for any purpose whatsoever, and to have or permit others
-- to do so.
--
-- DISCLAIMER
--
-- ALL MATERIALS OR INFORMATION HEREIN RELEASED, MADE AVAILABLE OR
-- DISCLOSED ARE AS IS. THE GOVERNMENT MAKES NO EXPRESS OR IMPLIED
-- WARRANTY AS TO ANY MATTER WHATSOEVER, INCLUDING THE CONDITIONS OF THE
-- SOFTWARE, DOCUMENTATION OR OTHER INFORMATION RELEASED, MADE AVAILABLE
-- OR DISCLOSED, OR THE OWNERSHIP, MERCHANTABILITY, OR FITNESS FOR A
-- PARTICULAR PURPOSE OF SAID MATERIAL.
--*
-- CHECK THAT NAMES IN A GENERIC DECLARATIONS ARE STATICALLY BOUND.
-- DAT 9/18/81
-- SPS 2/7/83
WITH REPORT; USE REPORT;
PROCEDURE CC3007A IS
BEGIN
TEST ("CC3007A", "NAMES IN GENERICS ARE STATICALLY BOUND");
DECLARE
I : INTEGER := 1;
EX : EXCEPTION;
IA : INTEGER := I'SIZE;
FUNCTION F (X : INTEGER) RETURN INTEGER;
PACKAGE P IS
Q : INTEGER := 1;
END P;
GENERIC
J : IN OUT INTEGER;
WITH FUNCTION FP (X : INTEGER) RETURN INTEGER IS F;
PACKAGE GP IS
V1 : INTEGER := F(I);
V2 : INTEGER := FP(I);
END GP;
GENERIC
TYPE T IS RANGE <> ;
WITH FUNCTION F1 (X : INTEGER) RETURN INTEGER IS F;
INP : IN T := T (I'SIZE);
FUNCTION F1 (X : T) RETURN T;
FUNCTION F1 (X : T) RETURN T IS
BEGIN
IF INP /= T(IA) THEN
FAILED ("INCORRECT GENERIC BINDING 2");
END IF;
I := I + 1;
RETURN 2 * T (F1 (F (INTEGER (X) + I + P.Q)));
END F1;
PACKAGE BODY GP IS
PACKAGE P IS
Q : INTEGER := I + 1;
END P;
I : INTEGER := 1000;
FUNCTION F IS NEW F1 (INTEGER);
FUNCTION F2 IS NEW F1 (INTEGER);
BEGIN
P.Q := F2 (J + P.Q + V1 + 2 * V2);
J := P.Q;
RAISE EX;
END GP;
FUNCTION F (X : INTEGER) RETURN INTEGER IS
BEGIN
I := I + 2;
RETURN X + I;
END;
BEGIN
DECLARE
I : INTEGER := 1000;
EX : EXCEPTION;
FUNCTION F IS NEW F1 (INTEGER);
V : INTEGER := F (3);
BEGIN
BEGIN
DECLARE
PACKAGE P IS NEW GP (V);
BEGIN
FAILED ("EX NOT RAISED");
END;
EXCEPTION
WHEN EX =>
FAILED ("WRONG EXCEPTION RAISED");
WHEN OTHERS =>
IF V /= 266 THEN
FAILED ("WRONG BINDING IN GENERICS");
END IF;
RAISE;
END;
END;
EXCEPTION
WHEN EX => NULL;
WHEN OTHERS => FAILED ("WRONG EXCEPTION RAISED 2");
END;
RESULT;
END CC3007A;
|
programs/oeis/007/A007611.asm | neoneye/loda | 22 | 6691 | ; A007611: a(n) = n! + 2^n.
; 2,3,6,14,40,152,784,5168,40576,363392,3629824,39918848,479005696,6227028992,87178307584,1307674400768,20922789953536,355687428227072,6402373705990144,121645100409356288,2432902008177688576,51090942171711537152,1124000727777611874304,25852016738884985028608,620448401733239456137216,15511210043330986017554432,403291461126605635651108864,10888869450418352160902217728,304888344611713860501772435456,8841761993739701954544152870912,265252859812191058636309553741824,8222838654177922817725565027483648,263130836933693530167218016454967296
mov $1,$0
seq $0,142 ; Factorial numbers: n! = 1*2*3*4*...*n (order of symmetric group S_n, number of permutations of n letters).
mov $2,2
pow $2,$1
add $0,$2
|
oeis/123/A123868.asm | neoneye/loda-programs | 11 | 241644 | ; A123868: a(n) = n^12 - 1.
; 0,4095,531440,16777215,244140624,2176782335,13841287200,68719476735,282429536480,999999999999,3138428376720,8916100448255,23298085122480,56693912375295,129746337890624,281474976710655,582622237229760,1156831381426175,2213314919066160,4095999999999999,7355827511386640,12855002631049215,21914624432020320,36520347436056575,59604644775390624,95428956661682175,150094635296999120,232218265089212415,353814783205469040,531440999999999999,787662783788549760,1152921504606846975,1667889514952984960
add $0,1
pow $0,12
sub $0,1
|
memsim-master/src/parser-parse_option.adb | strenkml/EE368 | 0 | 9596 |
with Memory.Option; use Memory.Option;
with Util; use Util;
separate (Parser)
procedure Parse_Option(parser : in out Parser_Type;
result : out Memory_Pointer) is
mem : Option_Pointer := Create_Option;
begin
while Get_Type(parser) = Open loop
declare
other : Memory_Pointer := null;
begin
Parse_Memory(parser, other);
Add_Memory(mem.all, other);
end;
end loop;
result := Memory_Pointer(mem);
exception
when Parse_Error =>
Destroy(Memory_Pointer(mem));
raise Parse_Error;
end Parse_Option;
|
src/test/resources/data/reorganizertests/test4-expected.asm | cpcitor/mdlz80optimizer | 36 | 27901 | ; Test to make sure moves do not happen if they will break jrs
ld a, 1
jp label1
label6:
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
label1:
add a, b
jr nc, label3
; jp label2 ; -mdl
label2:
jr label2
label3:
jr label3
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_1608.asm | ljhsiun2/medusa | 9 | 241477 | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r15
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x3e0f, %rdi
nop
nop
nop
nop
inc %r9
movw $0x6162, (%rdi)
nop
nop
add %rbp, %rbp
lea addresses_normal_ht+0x1b74f, %rsi
nop
nop
nop
nop
inc %r12
movl $0x61626364, (%rsi)
nop
nop
xor %rsi, %rsi
lea addresses_normal_ht+0x1894f, %r12
nop
nop
nop
sub $55030, %rbx
mov (%r12), %di
nop
nop
nop
nop
sub %rsi, %rsi
lea addresses_D_ht+0x334f, %rbp
nop
dec %rsi
mov (%rbp), %edi
nop
nop
nop
nop
nop
sub $45012, %rbp
lea addresses_A_ht+0x16b4f, %rsi
lea addresses_WT_ht+0xff09, %rdi
nop
nop
cmp %r15, %r15
mov $76, %rcx
rep movsw
nop
nop
nop
nop
cmp %rbx, %rbx
lea addresses_WT_ht+0x1574f, %rsi
lea addresses_WT_ht+0x17c65, %rdi
nop
nop
nop
nop
cmp $42971, %r15
mov $75, %rcx
rep movsb
nop
nop
sub %r12, %r12
lea addresses_WT_ht+0x1c91b, %rsi
lea addresses_UC_ht+0xd0df, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
xor %r12, %r12
mov $49, %rcx
rep movsl
nop
nop
nop
sub $56426, %r15
lea addresses_normal_ht+0xd74f, %r9
nop
nop
nop
nop
cmp %rbp, %rbp
mov (%r9), %rsi
nop
nop
and $15196, %r9
lea addresses_WC_ht+0x774f, %r9
clflush (%r9)
nop
nop
nop
nop
cmp %r15, %r15
movl $0x61626364, (%r9)
nop
nop
cmp %r15, %r15
lea addresses_normal_ht+0xeb4f, %r9
nop
nop
nop
nop
nop
cmp %rsi, %rsi
and $0xffffffffffffffc0, %r9
movntdqa (%r9), %xmm6
vpextrq $0, %xmm6, %rdi
nop
nop
dec %rsi
lea addresses_WT_ht+0xb14f, %rsi
lea addresses_WT_ht+0x7eff, %rdi
nop
nop
nop
dec %rbx
mov $18, %rcx
rep movsw
nop
nop
nop
nop
nop
xor $3469, %rbx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r15
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r9
push %rax
push %rbp
// Faulty Load
lea addresses_RW+0x1474f, %r13
nop
nop
nop
nop
add $8247, %r10
mov (%r13), %ebp
lea oracles, %rax
and $0xff, %rbp
shlq $12, %rbp
mov (%rax,%rbp,1), %rbp
pop %rbp
pop %rax
pop %r9
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_RW', 'same': False, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_RW', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_WC_ht', 'same': True, 'AVXalign': False, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': True, 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': True, 'type': 'addresses_D_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_A_ht', 'congruent': 10}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 9}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 0}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 4}}
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_WC_ht', 'same': True, 'AVXalign': False, 'congruent': 11}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': True, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 2}}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
|
chapter_3/page_127/exercise_8/KiDisplayBlueScreen.asm | assaflevy/practical_reverse_engineering | 0 | 244305 | <gh_stars>0
0: kd> uf KiDisplayBlueScreen
nt!KiDisplayBlueScreen:
fffff802`7551e9f0 488bc4 mov rax,rsp
fffff802`7551e9f3 48895808 mov qword ptr [rax+8],rbx
fffff802`7551e9f7 48897010 mov qword ptr [rax+10h],rsi
fffff802`7551e9fb 48897818 mov qword ptr [rax+18h],rdi
fffff802`7551e9ff 55 push rbp
fffff802`7551ea00 4154 push r12
fffff802`7551ea02 4155 push r13
fffff802`7551ea04 4156 push r14
fffff802`7551ea06 4157 push r15
fffff802`7551ea08 488da858feffff lea rbp,[rax-1A8h]
fffff802`7551ea0f 4881ec80020000 sub rsp,280h
fffff802`7551ea16 488b0513386f00 mov rax,qword ptr [nt!_security_cookie (fffff802`75c12230)]
fffff802`7551ea1d 4833c4 xor rax,rsp
fffff802`7551ea20 48898570010000 mov qword ptr [rbp+170h],rax
fffff802`7551ea27 33d2 xor edx,edx
fffff802`7551ea29 448be1 mov r12d,ecx
fffff802`7551ea2c 488d4c2460 lea rcx,[rsp+60h]
fffff802`7551ea31 448d4260 lea r8d,[rdx+60h]
fffff802`7551ea35 e80626edff call nt!memset (fffff802`753f1040)
fffff802`7551ea3a 8b0580297100 mov eax,dword ptr [nt!KiBugCheckData (fffff802`75c313c0)]
fffff802`7551ea40 4533ed xor r13d,r13d
fffff802`7551ea43 33d2 xor edx,edx
fffff802`7551ea45 4c896c2448 mov qword ptr [rsp+48h],r13
fffff802`7551ea4a 0f57c0 xorps xmm0,xmm0
fffff802`7551ea4d 89442444 mov dword ptr [rsp+44h],eax
fffff802`7551ea51 4533c9 xor r9d,r9d
fffff802`7551ea54 4c896c2420 mov qword ptr [rsp+20h],r13
fffff802`7551ea59 458d7d01 lea r15d,[r13+1]
fffff802`7551ea5d 4533c0 xor r8d,r8d
fffff802`7551ea60 8d4a0e lea ecx,[rdx+0Eh]
fffff802`7551ea63 44887c2440 mov byte ptr [rsp+40h],r15b
fffff802`7551ea68 0f11442450 movups xmmword ptr [rsp+50h],xmm0
fffff802`7551ea6d e8de5be7ff call nt!HeadlessDispatch (fffff802`75394650)
fffff802`7551ea72 4533c9 xor r9d,r9d
fffff802`7551ea75 4c896c2420 mov qword ptr [rsp+20h],r13
fffff802`7551ea7a 458bc7 mov r8d,r15d
fffff802`7551ea7d 488d542440 lea rdx,[rsp+40h]
fffff802`7551ea82 418bcf mov ecx,r15d
fffff802`7551ea85 e8c65be7ff call nt!HeadlessDispatch (fffff802`75394650)
fffff802`7551ea8a 458d7504 lea r14d,[r13+4]
fffff802`7551ea8e 4c896c2420 mov qword ptr [rsp+20h],r13
fffff802`7551ea93 458bc6 mov r8d,r14d
fffff802`7551ea96 488d542444 lea rdx,[rsp+44h]
fffff802`7551ea9b 4533c9 xor r9d,r9d
fffff802`7551ea9e 418d4d14 lea ecx,[r13+14h]
fffff802`7551eaa2 e8a95be7ff call nt!HeadlessDispatch (fffff802`75394650)
fffff802`7551eaa7 418d4e7d lea ecx,[r14+7Dh]
fffff802`7551eaab e890a3feff call nt!IoSaveBugCheckProgress (fffff802`75508e40)
fffff802`7551eab0 488b1db9b17d00 mov rbx,qword ptr [nt!KiBugCheckDriver (fffff802`75cf9c70)]
fffff802`7551eab7 488d350a297100 lea rsi,[nt!KiBugCheckData+0x8 (fffff802`75c313c8)]
fffff802`7551eabe 4885db test rbx,rbx
fffff802`7551eac1 751c jne nt!KiDisplayBlueScreen+0xef (fffff802`7551eadf) Branch
nt!KiDisplayBlueScreen+0xd3:
fffff802`7551eac3 4533c9 xor r9d,r9d
fffff802`7551eac6 458bc6 mov r8d,r14d
fffff802`7551eac9 488bd6 mov rdx,rsi
fffff802`7551eacc 33c9 xor ecx,ecx
fffff802`7551eace e8b1020000 call nt!KiDumpParameterImages (fffff802`7551ed84)
fffff802`7551ead3 488b1d96b17d00 mov rbx,qword ptr [nt!KiBugCheckDriver (fffff802`75cf9c70)]
fffff802`7551eada 4885db test rbx,rbx
fffff802`7551eadd 7423 je nt!KiDisplayBlueScreen+0x112 (fffff802`7551eb02) Branch
nt!KiDisplayBlueScreen+0xef:
fffff802`7551eadf 41b81e000000 mov r8d,1Eh
fffff802`7551eae5 66443903 cmp word ptr [rbx],r8w
fffff802`7551eae9 7517 jne nt!KiDisplayBlueScreen+0x112 (fffff802`7551eb02) Branch
nt!KiDisplayBlueScreen+0xfb:
fffff802`7551eaeb 488b4b08 mov rcx,qword ptr [rbx+8]
fffff802`7551eaef 488d15aa4db1ff lea rdx,[nt!`string' (fffff802`750338a0)]
fffff802`7551eaf6 e8a5cde9ff call nt!memcmp (fffff802`753bb8a0)
fffff802`7551eafb 85c0 test eax,eax
fffff802`7551eafd 7503 jne nt!KiDisplayBlueScreen+0x112 (fffff802`7551eb02) Branch
nt!KiDisplayBlueScreen+0x10f:
fffff802`7551eaff 498bdd mov rbx,r13
nt!KiDisplayBlueScreen+0x112:
fffff802`7551eb02 488d4570 lea rax,[rbp+70h]
fffff802`7551eb06 498bd6 mov rdx,r14
fffff802`7551eb09 4889442478 mov qword ptr [rsp+78h],rax
fffff802`7551eb0e 488d4dd0 lea rcx,[rbp-30h]
fffff802`7551eb12 b800010000 mov eax,100h
fffff802`7551eb17 41b926000000 mov r9d,26h
fffff802`7551eb1d 6689442472 mov word ptr [rsp+72h],ax
fffff802`7551eb22 488d4580 lea rax,[rbp-80h]
nt!KiDisplayBlueScreen+0x136:
fffff802`7551eb26 48894808 mov qword ptr [rax+8],rcx
fffff802`7551eb2a 4903c9 add rcx,r9
fffff802`7551eb2d c70024002600 mov dword ptr [rax],260024h
fffff802`7551eb33 488d4010 lea rax,[rax+10h]
fffff802`7551eb37 492bd7 sub rdx,r15
fffff802`7551eb3a 75ea jne nt!KiDisplayBlueScreen+0x136 (fffff802`7551eb26) Branch
nt!KiDisplayBlueScreen+0x14c:
fffff802`7551eb3c 8b0d7e287100 mov ecx,dword ptr [nt!KiBugCheckData (fffff802`75c313c0)]
fffff802`7551eb42 488d542450 lea rdx,[rsp+50h]
fffff802`7551eb47 e8a8f8ffff call nt!KeGetBugMessageText (fffff802`7551e3f4)
fffff802`7551eb4c 84c0 test al,al
fffff802`7551eb4e 7542 jne nt!KiDisplayBlueScreen+0x1a2 (fffff802`7551eb92) Branch
nt!KiDisplayBlueScreen+0x160:
fffff802`7551eb50 8b056a287100 mov eax,dword ptr [nt!KiBugCheckData (fffff802`75c313c0)]
fffff802`7551eb56 4c8d442448 lea r8,[rsp+48h]
fffff802`7551eb5b 89442430 mov dword ptr [rsp+30h],eax
fffff802`7551eb5f 488d4dc0 lea rcx,[rbp-40h]
fffff802`7551eb63 4533c9 xor r9d,r9d
fffff802`7551eb66 488d05d342edff lea rax,[nt! ?? ::FNODOBFM::`string' (fffff802`753f2e40)]
fffff802`7551eb6d 4889442428 mov qword ptr [rsp+28h],rax
fffff802`7551eb72 4c896c2420 mov qword ptr [rsp+20h],r13
fffff802`7551eb77 418d510b lea edx,[r9+0Bh]
fffff802`7551eb7b e814e4f9ff call nt!RtlStringCbPrintfExA (fffff802`754bcf94)
fffff802`7551eb80 0fb74c2448 movzx ecx,word ptr [rsp+48h]
fffff802`7551eb85 488d45c0 lea rax,[rbp-40h]
fffff802`7551eb89 662bc8 sub cx,ax
fffff802`7551eb8c 488d55c0 lea rdx,[rbp-40h]
fffff802`7551eb90 eb0a jmp nt!KiDisplayBlueScreen+0x1ac (fffff802`7551eb9c) Branch
nt!KiDisplayBlueScreen+0x1a2:
fffff802`7551eb92 488b542458 mov rdx,qword ptr [rsp+58h]
fffff802`7551eb97 0fb74c2450 movzx ecx,word ptr [rsp+50h]
nt!KiDisplayBlueScreen+0x1ac:
fffff802`7551eb9c 0fb7442472 movzx eax,word ptr [rsp+72h]
fffff802`7551eba1 450fb7c5 movzx r8d,r13w
fffff802`7551eba5 488b7c2478 mov rdi,qword ptr [rsp+78h]
fffff802`7551ebaa 66d1e8 shr ax,1
fffff802`7551ebad 66412bc7 sub ax,r15w
fffff802`7551ebb1 663bc8 cmp cx,ax
fffff802`7551ebb4 660f43c8 cmovae cx,ax
fffff802`7551ebb8 66443be9 cmp r13w,cx
fffff802`7551ebbc 731e jae nt!KiDisplayBlueScreen+0x1ec (fffff802`7551ebdc) Branch
nt!KiDisplayBlueScreen+0x1ce:
fffff802`7551ebbe 4c8bcf mov r9,rdi
fffff802`7551ebc1 440fb7d1 movzx r10d,cx
fffff802`7551ebc5 440fb7c1 movzx r8d,cx
nt!KiDisplayBlueScreen+0x1d9:
fffff802`7551ebc9 0fbe02 movsx eax,byte ptr [rdx]
fffff802`7551ebcc 4903d7 add rdx,r15
fffff802`7551ebcf 66418901 mov word ptr [r9],ax
fffff802`7551ebd3 4d8d4902 lea r9,[r9+2]
fffff802`7551ebd7 4d2bd7 sub r10,r15
fffff802`7551ebda 75ed jne nt!KiDisplayBlueScreen+0x1d9 (fffff802`7551ebc9) Branch
nt!KiDisplayBlueScreen+0x1ec:
fffff802`7551ebdc 410fb7c0 movzx eax,r8w
fffff802`7551ebe0 664503c0 add r8w,r8w
fffff802`7551ebe4 664489442470 mov word ptr [rsp+70h],r8w
fffff802`7551ebea 6644892c47 mov word ptr [rdi+rax*2],r13w
fffff802`7551ebef e8bc69feff call nt!InbvAcquireDisplayOwnership (fffff802`755055b0)
fffff802`7551ebf4 b982000000 mov ecx,82h
fffff802`7551ebf9 e842a2feff call nt!IoSaveBugCheckProgress (fffff802`75508e40)
fffff802`7551ebfe 448b3dbb277100 mov r15d,dword ptr [nt!KiBugCheckData (fffff802`75c313c0)]
fffff802`7551ec05 0f57c0 xorps xmm0,xmm0
fffff802`7551ec08 660f7f442460 movdqa xmmword ptr [rsp+60h],xmm0
fffff802`7551ec0e e8957de6ff call nt!BgpFwAcquireLock (fffff802`753869a8)
fffff802`7551ec13 8b0557466f00 mov eax,dword ptr [nt!BgInternal+0x70 (fffff802`75c13270)]
fffff802`7551ec19 a802 test al,2
fffff802`7551ec1b 741d je nt!KiDisplayBlueScreen+0x24a (fffff802`7551ec3a) Branch
nt!KiDisplayBlueScreen+0x22d:
fffff802`7551ec1d 4c8d4c2460 lea r9,[rsp+60h]
fffff802`7551ec22 4489642420 mov dword ptr [rsp+20h],r12d
fffff802`7551ec27 4c8bc3 mov r8,rbx
fffff802`7551ec2a 488bd6 mov rdx,rsi
fffff802`7551ec2d 418bcf mov ecx,r15d
fffff802`7551ec30 e88f090b00 call nt!BgpFwDisplayBugCheckScreen (fffff802`755cf5c4)
fffff802`7551ec35 488b7c2478 mov rdi,qword ptr [rsp+78h]
nt!KiDisplayBlueScreen+0x24a:
fffff802`7551ec3a e8197de6ff call nt!BgpFwReleaseLock (fffff802`75386958)
fffff802`7551ec3f b980000000 mov ecx,80h
fffff802`7551ec44 e8f7a1feff call nt!IoSaveBugCheckProgress (fffff802`75508e40)
fffff802`7551ec49 4c8b7c2460 mov r15,qword ptr [rsp+60h]
fffff802`7551ec4e 41bc06000000 mov r12d,6
fffff802`7551ec54 4d85ff test r15,r15
fffff802`7551ec57 7442 je nt!KiDisplayBlueScreen+0x2ab (fffff802`7551ec9b) Branch
nt!KiDisplayBlueScreen+0x269:
fffff802`7551ec59 488b5c2468 mov rbx,qword ptr [rsp+68h]
fffff802`7551ec5e 4885db test rbx,rbx
fffff802`7551ec61 7438 je nt!KiDisplayBlueScreen+0x2ab (fffff802`7551ec9b) Branch
nt!KiDisplayBlueScreen+0x273:
fffff802`7551ec63 488d35c641edff lea rsi,[nt! ?? ::FNODOBFM::`string' (fffff802`753f2e30)]
fffff802`7551ec6a 418bd4 mov edx,r12d
fffff802`7551ec6d 488bce mov rcx,rsi
fffff802`7551ec70 e873020000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ec75 410fb717 movzx edx,word ptr [r15]
fffff802`7551ec79 498b4f08 mov rcx,qword ptr [r15+8]
fffff802`7551ec7d e866020000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ec82 418bd4 mov edx,r12d
fffff802`7551ec85 488bce mov rcx,rsi
fffff802`7551ec88 e85b020000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ec8d 0fb713 movzx edx,word ptr [rbx]
fffff802`7551ec90 488b4b08 mov rcx,qword ptr [rbx+8]
fffff802`7551ec94 e84f020000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ec99 eb2c jmp nt!KiDisplayBlueScreen+0x2d7 (fffff802`7551ecc7) Branch
nt!KiDisplayBlueScreen+0x2ab:
fffff802`7551ec9b 488d5d80 lea rbx,[rbp-80h]
fffff802`7551ec9f 498bfe mov rdi,r14
nt!KiDisplayBlueScreen+0x2b2:
fffff802`7551eca2 488b0e mov rcx,qword ptr [rsi]
fffff802`7551eca5 488bd3 mov rdx,rbx
fffff802`7551eca8 e80ff9ffff call nt!KiBugCheckConvertParameterValueToUnicodeString (fffff802`7551e5bc)
fffff802`7551ecad 4883c310 add rbx,10h
fffff802`7551ecb1 488d7608 lea rsi,[rsi+8]
fffff802`7551ecb5 4883ef01 sub rdi,1
fffff802`7551ecb9 75e7 jne nt!KiDisplayBlueScreen+0x2b2 (fffff802`7551eca2) Branch
nt!KiDisplayBlueScreen+0x2cb:
fffff802`7551ecbb 488b7c2478 mov rdi,qword ptr [rsp+78h]
fffff802`7551ecc0 488d356941edff lea rsi,[nt! ?? ::FNODOBFM::`string' (fffff802`753f2e30)]
nt!KiDisplayBlueScreen+0x2d7:
fffff802`7551ecc7 498bd4 mov rdx,r12
fffff802`7551ecca 488bce mov rcx,rsi
fffff802`7551eccd e816020000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ecd2 0fb7542470 movzx edx,word ptr [rsp+70h]
fffff802`7551ecd7 488bcf mov rcx,rdi
fffff802`7551ecda e809020000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ecdf 4c392d8aaf7d00 cmp qword ptr [nt!KiBugCheckDriver (fffff802`75cf9c70)],r13
fffff802`7551ece6 741e je nt!KiDisplayBlueScreen+0x316 (fffff802`7551ed06) Branch
nt!KiDisplayBlueScreen+0x2f8:
fffff802`7551ece8 498bd4 mov rdx,r12
fffff802`7551eceb 488bce mov rcx,rsi
fffff802`7551ecee e8f5010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ecf3 488b0d76af7d00 mov rcx,qword ptr [nt!KiBugCheckDriver (fffff802`75cf9c70)]
fffff802`7551ecfa 0fb711 movzx edx,word ptr [rcx]
fffff802`7551ecfd 488b4908 mov rcx,qword ptr [rcx+8]
fffff802`7551ed01 e8e2010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
nt!KiDisplayBlueScreen+0x316:
fffff802`7551ed06 498bd4 mov rdx,r12
fffff802`7551ed09 488bce mov rcx,rsi
fffff802`7551ed0c e8d7010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ed11 498bd4 mov rdx,r12
fffff802`7551ed14 488bce mov rcx,rsi
fffff802`7551ed17 e8cc010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ed1c 488d5d88 lea rbx,[rbp-78h]
nt!KiDisplayBlueScreen+0x330:
fffff802`7551ed20 0fb753f8 movzx edx,word ptr [rbx-8]
fffff802`7551ed24 488b0b mov rcx,qword ptr [rbx]
fffff802`7551ed27 e8bc010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ed2c 498bd4 mov rdx,r12
fffff802`7551ed2f 488bce mov rcx,rsi
fffff802`7551ed32 e8b1010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ed37 488d5b10 lea rbx,[rbx+10h]
fffff802`7551ed3b 4983ee01 sub r14,1
fffff802`7551ed3f 75df jne nt!KiDisplayBlueScreen+0x330 (fffff802`7551ed20) Branch
nt!KiDisplayBlueScreen+0x351:
fffff802`7551ed41 498bd4 mov rdx,r12
fffff802`7551ed44 488bce mov rcx,rsi
fffff802`7551ed47 e89c010000 call nt!KiHeadlessDisplayString (fffff802`7551eee8)
fffff802`7551ed4c 488b8d70010000 mov rcx,qword ptr [rbp+170h]
fffff802`7551ed53 4833cc xor rcx,rsp
fffff802`7551ed56 e8c5a5e9ff call nt!_security_check_cookie (fffff802`753b9320)
fffff802`7551ed5b 4c8d9c2480020000 lea r11,[rsp+280h]
fffff802`7551ed63 498b5b30 mov rbx,qword ptr [r11+30h]
fffff802`7551ed67 498b7338 mov rsi,qword ptr [r11+38h]
fffff802`7551ed6b 498b7b40 mov rdi,qword ptr [r11+40h]
fffff802`7551ed6f 498be3 mov rsp,r11
fffff802`7551ed72 415f pop r15
fffff802`7551ed74 415e pop r14
fffff802`7551ed76 415d pop r13
fffff802`7551ed78 415c pop r12
fffff802`7551ed7a 5d pop rbp
fffff802`7551ed7b c3 ret
|
Generic Printfile from Selection.applescript | AlexanderGalen/applescripts | 3 | 348 | <reponame>AlexanderGalen/applescripts<filename>Generic Printfile from Selection.applescript
tell application "QuarkXPress"
set theName to name of document 1 as string
try
set jobNumber to find text "[0-9]{6}" in theName with regexp and string result
on error
set jobNumber to text returned of (display dialog "Input Job Number Please" default answer "")
end try
if exists page 2 of document 1 then
set multiPage to true
else
set multiPage to false
end if
end tell
set i to 1
set activeJobs to "HOM_Shortrun:~HOM Active Jobs:"
set theCondition to true
set thisprintFile to activeJobs & jobNumber & ":" & jobNumber & ".printfile." & i & ".pdf"
set for4Over to "ART DEPARTMENT-NEW:FOR 4over:"
repeat while theCondition
tell application "Finder"
if exists thisprintFile then
set theCondition to true
set i to i + 1
set thisprintFile to activeJobs & jobNumber & ":" & jobNumber & ".printfile." & i & ".pdf"
else
set theCondition to false
end if
end tell
end repeat
tell application "QuarkXPress"
set theSelection to selection
if class of theSelection is group box then
set grouped of theSelection to true
set isGroupBox to true
else
set isGroupBox to false
end if
copy theSelection
set {y1, x1, y2, x2} to bounds of theSelection as list
set x1 to (coerce x1 to real)
set y1 to (coerce y1 to real)
set x2 to (coerce x2 to real)
set y2 to (coerce y2 to real)
set theWidth to x2 - x1
set theHeight to y2 - y1
set newDocProperties to {page height:theHeight, page width:theWidth}
if not multiPage then close document 1 without saving
make new document with properties newDocProperties
tell document 1
activate
paste
if isGroupBox then
set bounds of group box 1 to {0, 0, theHeight, theWidth}
else
set bounds of picture box 1 to {0, 0, theHeight, theWidth}
end if
end tell
export layout space 1 of project 1 in thisprintFile as "PDF" PDF output style "No Compression"
if not multiPage then
close every project without saving
else
close document 2 without saving
end if
end tell
set posixPrintfile to quoted form of POSIX path of thisprintFile
set posixDestination to quoted form of POSIX path of for4Over
do shell script "cp -p " & posixPrintfile & " " & posixDestination
|
library/object click/clickAtCoords.applescript | NYHTC/applescript-fm-helper | 1 | 1146 | -- clickAtCoords(xClick, yClick)
-- <NAME>, NYHTC
-- Click at the specified coordinates
(*
HISTORY:
1.4 - 2017-10-18 ( eshagdar ): wrap in a try block.
1.3.1 - 2017-09-05 ( eshagdar ): first set the shell command ( used for debugging ), then use the variable. coerce the entire list to a string instead of just the first number ( and then have applescript assume the rest is a string ).
1.3 - 2017-08-23 ( eshagdar ): first move to a position, then click at that position. restore afterwards.
1.2 - 2017-06-16 ( eshagdar ): cliclick v. 3.3 ( probably changed earlier ), the commands have been updated - need to specify the type of command ( i.e 'c:100,100' instead of '100 100' )
1.1 - 2016-04-21 ( eshagdar ): updated how coords are passed in to be compatible with cliClick version 3.2, 02/17/2016
1.0 - created
*)
property clickCommandPosix : POSIX path of (((path to home folder) as string)) & "Code/applescript-fm-helper/vendor/cliclick/cliclick"
on run
clickAtCoords(956, 293)
end run
--------------------
-- START OF CODE
--------------------
on clickAtCoords(xClick, yClick)
-- version 1.4
try
set xClick to round xClick rounding down
set yClick to round yClick rounding down
if xClick is less than 0 then set xClick to "=" & xClick
if yClick is less than 0 then set yClick to "=" & yClick
set shellCommand to quoted form of clickCommandPosix & " -r m:" & xClick & "," & yClick & " c:" & xClick & "," & yClick
do shell script shellCommand
return (xClick & "," & yClick) as string
on error errMsg number errNum
error "unable to clickAtCoords - " & errMsg number errNum
end try
end clickAtCoords
--------------------
-- END OF CODE
--------------------
|
programs/oeis/223/A223833.asm | neoneye/loda | 22 | 5275 | <filename>programs/oeis/223/A223833.asm
; A223833: Number of n X 3 0..1 arrays with rows and antidiagonals unimodal and columns nondecreasing.
; 7,22,48,89,149,232,342,483,659,874,1132,1437,1793,2204,2674,3207,3807,4478,5224,6049,6957,7952,9038,10219,11499,12882,14372,15973,17689,19524,21482,23567,25783,28134,30624,33257,36037,38968,42054,45299,48707,52282,56028,59949,64049,68332,72802,77463,82319,87374,92632,98097,103773,109664,115774,122107,128667,135458,142484,149749,157257,165012,173018,181279,189799,198582,207632,216953,226549,236424,246582,257027,267763,278794,290124,301757,313697,325948,338514,351399,364607,378142,392008,406209,420749,435632,450862,466443,482379,498674,515332,532357,549753,567524,585674,604207,623127,642438,662144,682249
add $0,1
mov $1,4
mov $2,3
lpb $0
add $0,1
add $1,$2
add $2,$0
sub $0,2
add $1,$2
lpe
sub $1,5
mov $0,$1
|
src/frontend/Experimental_Ada_ROSE_Connection/parser/asis_adapter/source/adapter_wrapper_h.ads | ouankou/rose | 488 | 23159 | with Interfaces.C.Extensions;
with Interfaces.C.Strings;
with Interfaces.C.Pointers;
with a_nodes_h;
package adapter_wrapper_h is
function adapter_wrapper
(target_file_in : in Interfaces.C.Strings.chars_ptr;
gnat_home : in Interfaces.C.Strings.chars_ptr;
AsisArgs : in Interfaces.C.Strings.chars_ptr;
output_dir : in Interfaces.C.Strings.chars_ptr
)
return a_nodes_h.Nodes_Struct;
pragma Export (C, adapter_wrapper);
function adapter_wrapper_with_flags
(target_file_in : in Interfaces.C.Strings.chars_ptr;
gnat_home : in Interfaces.C.Strings.chars_ptr;
AsisArgs : in Interfaces.C.Strings.chars_ptr;
output_dir : in Interfaces.C.Strings.chars_ptr;
process_predefined_units : in Interfaces.C.Extensions.bool;
process_implementation_units : in Interfaces.C.Extensions.bool;
debug : in Interfaces.C.Extensions.bool
)
return a_nodes_h.Nodes_Struct;
pragma Export (C, adapter_wrapper_with_flags);
private
-- for debugging:
Module_Name : constant String := "adapter_wrapper_h";
end adapter_wrapper_h;
|
data/mapHeaders/CinnabarLabMetronomeRoom.asm | AmateurPanda92/pokemon-rby-dx | 9 | 24088 | CinnabarLabMetronomeRoom_h:
db LAB ; tileset
db CINNABAR_LAB_METRONOME_ROOM_HEIGHT, CINNABAR_LAB_METRONOME_ROOM_WIDTH ; dimensions (y, x)
dw CinnabarLabMetronomeRoom_Blocks ; blocks
dw CinnabarLabMetronomeRoom_TextPointers ; texts
dw CinnabarLabMetronomeRoom_Script ; scripts
db 0 ; connections
dw CinnabarLabMetronomeRoom_Object ; objects
|
libsrc/_DEVELOPMENT/target/scz180/device/csio/z180/csio_sd_read_block.asm | Frodevan/z88dk | 640 | 91634 | <gh_stars>100-1000
INCLUDE "config_private.inc"
SECTION code_driver
EXTERN l_mirror
PUBLIC asm_sd_read_block
;Read a block of 512 bytes (one sector) from the drive
;and store it in memory at (HL++)
;
;input HL = pointer to block
;uses AF, BC, DE, HL
.asm_sd_read_block
in0 a,(CNTR)
tst CNTR_TE|CNTR_RE ;check the CSIO is not enabled
jr NZ,asm_sd_read_block
or CNTR_RE ; set RE bit
out0 (CNTR),a ; start receiving first byte
ex de,hl ; pointer in DE
ld bc,CNTR ; keep iterative word count in B, and C has CNTR IO port address
ld h,a ; H now contains CNTR bits to start reception
jr sd_read_wait ; get first byte
.sd_read_again
out0 (CNTR),h ; start receiving next byte
call l_mirror ; reversed bits in A and L
ld (de),a ; upper byte
inc de ; ptr++
.sd_read_wait
tstio CNTR_RE ; test bits in IO port (C)
jr NZ,sd_read_wait ; wait for reception to complete
in0 a,(TRDR) ; read byte
out0 (CNTR),h ; start reception next byte
call l_mirror ; reversed bits in A and L
ld (de),a ; lower byte
inc de ; ptr++
.sd_read_wait_h
tstio CNTR_RE ; test bits in IO port (C)
jr NZ,sd_read_wait_h ; wait for reception to complete
in0 a,(TRDR) ; read byte
djnz sd_read_again ; length != 0, go again
call l_mirror ; reversed bits in A and L
ld (de),a ; upper byte
ret
|
notes/FOT/FOTC/Program/Mirror/StructurallySmaller/StructurallySmallerSL.agda | asr/fotc | 11 | 15992 | <filename>notes/FOT/FOTC/Program/Mirror/StructurallySmaller/StructurallySmallerSL.agda<gh_stars>10-100
{-# OPTIONS --exact-split #-}
{-# OPTIONS --no-sized-types #-}
{-# OPTIONS --no-universe-polymorphism #-}
{-# OPTIONS --without-K #-}
module FOT.FOTC.Program.Mirror.StructurallySmaller.StructurallySmallerSL where
open import Data.List
data Tree (D : Set) : Set where
tree : D → List (Tree D) → Tree D
foo : {D : Set} → Tree D → D
foo (tree a []) = a
foo (tree a (t ∷ ts)) = foo (tree a ts)
bar : {D : Set} → Tree D → D
bar (tree a []) = a
bar {D} (tree a (t ∷ ts)) = helper (bar t) (bar (tree a ts))
where
postulate helper : D → D → D
|
src/antlr_test/antlr/HGameAutoWired.g4 | puzzzzzzle/cpp_study | 3 | 2798 | <filename>src/antlr_test/antlr/HGameAutoWired.g4
grammar HGameAutoWired;
auto_wired : 'AUTO_WIRED' LeftParen Identifier ',' Identifier RightParen;
auto_config : 'AUTO_CONFIG' LeftParen Identifier ',' Identifier RightParen;
LeftParen: '(';
RightParen: ')';
Comma: ',';
WS : [ \t\r\n]+ -> skip ; // skip spaces, tabs, newlines, \r (Windows)
fragment NONZERODIGIT: [1-9];
fragment OCTALDIGIT: [0-7];
fragment HEXADECIMALDIGIT: [0-9a-fA-F];
fragment BINARYDIGIT: [01];
fragment Hexquad:
HEXADECIMALDIGIT HEXADECIMALDIGIT HEXADECIMALDIGIT HEXADECIMALDIGIT;
fragment Universalcharactername:
'\\u' Hexquad
| '\\U' Hexquad Hexquad;
Identifier:
Identifiernondigit (Identifiernondigit | DIGIT)*;
fragment Identifiernondigit: NONDIGIT | Universalcharactername;
fragment NONDIGIT: [a-zA-Z_];
fragment DIGIT: [0-9];
|
alloy4fun_models/trashltl/models/4/t2yGD3RxiSRWZd798.als | Kaixi26/org.alloytools.alloy | 0 | 5152 | open main
pred idt2yGD3RxiSRWZd798_prop5 {
some f:Trash | eventually no Trash & f
}
pred __repair { idt2yGD3RxiSRWZd798_prop5 }
check __repair { idt2yGD3RxiSRWZd798_prop5 <=> prop5o } |
oeis/147/A147645.asm | neoneye/loda-programs | 11 | 26940 | ; A147645: Number of distinct Mersenne primes dividing n.
; Submitted by <NAME>
; 0,0,1,0,0,1,1,0,1,0,0,1,0,1,1,0,0,1,0,0,2,0,0,1,0,0,1,1,0,1,1,0,1,0,1,1,0,0,1,0,0,2,0,0,1,0,0,1,1,0,1,0,0,1,0,1,1,0,0,1,0,1,2,0,0,1,0,0,1,1,0,1,0,0,1,0,1,1,0,0,1,0,0,2,0,0,1,0,0,1,1,0,2,0,0,1,0,1,1,0
add $0,1
mov $1,1
mov $2,1
lpb $0
mov $3,$0
lpb $3
mov $4,$0
mod $4,$2
cmp $4,0
cmp $4,0
mov $5,$2
mul $2,2
add $2,1
cmp $5,1
max $4,$5
sub $3,$4
lpe
lpb $0
dif $0,$2
lpe
add $1,1
lpe
mov $0,$1
sub $0,1
|
programs/oeis/007/A007401.asm | jmorken/loda | 1 | 22882 | <gh_stars>1-10
; A007401: Add n-1 to n-th term of 'n appears n times' sequence (A002024).
; 1,3,4,6,7,8,10,11,12,13,15,16,17,18,19,21,22,23,24,25,26,28,29,30,31,32,33,34,36,37,38,39,40,41,42,43,45,46,47,48,49,50,51,52,53,55,56,57,58,59,60,61,62,63,64,66,67,68,69,70,71,72,73,74,75,76,78,79,80,81,82,83,84,85,86,87,88,89,91,92,93,94,95,96,97,98,99,100,101,102,103,105,106,107,108,109,110,111,112,113,114,115,116,117,118,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,153,154,155,156,157,158,159,160,161,162,163,164,165,166,167,168,169,171,172,173,174,175,176,177,178,179,180,181,182,183,184,185,186,187,188,190,191,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,210,211,212,213,214,215,216,217,218,219,220,221,222,223,224,225,226,227,228,229,231,232,233,234,235,236,237,238,239,240,241,242,243,244,245,246,247,248,249,250,251,253,254,255,256,257,258,259,260,261,262,263,264,265,266,267,268,269,270,271
mov $1,1
mov $2,$0
lpb $0
add $1,1
trn $0,$1
lpe
add $1,$2
|
programs/oeis/294/A294936.asm | neoneye/loda | 22 | 173148 | <filename>programs/oeis/294/A294936.asm<gh_stars>10-100
; A294936: Characteristic function for nondeficient numbers (A023196): a(n) = 1 if A001065(n) >= n, 0 otherwise.
; 0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,1,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,1
mov $2,$0
add $2,1
mov $3,$0
seq $3,203 ; a(n) = sigma(n), the sum of the divisors of n. Also called sigma_1(n).
div $3,$2
lpb $3
mov $1,4
div $3,5
add $3,1
lpe
div $1,4
mov $0,$1
|
TE/SPOS LAB/Group A/P1_ASM/input1.asm | Nikhil-Giramkar/SPPU_COMP_2015 | 1 | 164734 | <filename>TE/SPOS LAB/Group A/P1_ASM/input1.asm<gh_stars>1-10
START 100
A DS 3
L1 MOVER AREG, B
ADD AREG, C
MOVEM AREG, D
D EQU A+1
L2 PRINT D
ORIGIN L2+1
MOVEM AREG, ='34'
MOVEM AREG, ='14'
LTORG
STOP
MOVEM AREG, ='143'
MOVEM AREG, ='134'
B DC '19
C DC '17
END
|
oeis/028/A028121.asm | neoneye/loda-programs | 11 | 165728 | <reponame>neoneye/loda-programs
; A028121: Expansion of 1/((1-4x)(1-5x)(1-8x)(1-10x)).
; Submitted by <NAME>
; 1,27,467,6615,83811,990927,11193547,122534775,1311833171,13818932127,143838758427,1483810444935,15202640928931,154948536206127,1572891821232107,15916318178611095,160663127276015091,1618634582657172927,16282391104356326587,163592367533760057255,1642071799698286595651,16469905358461959112527,165092564327012547273867,1654073788532438920607415,16565923344320220759134611,165860718600781379773224927,1660219074701013373601625947,16615085893736575733552485575,166254020297153577862758655971
mov $1,1
mov $2,$0
mov $3,$0
lpb $2
mov $0,$3
sub $2,1
sub $0,$2
seq $0,18912 ; Expansion of 1/((1-4x)(1-5x)(1-10x)).
mul $1,8
add $1,$0
lpe
mov $0,$1
|
PRACT0/SO1H/asm/ints.asm | so1h/SO1H | 0 | 1747 | <reponame>so1h/SO1H
bits 16
; glb intptr_t : int
; glb uintptr_t : unsigned
; glb intmax_t : int
; glb uintmax_t : unsigned
; glb int8_t : signed char
; glb int_least8_t : signed char
; glb int_fast8_t : signed char
; glb uint8_t : unsigned char
; glb uint_least8_t : unsigned char
; glb uint_fast8_t : unsigned char
; glb int16_t : short
; glb int_least16_t : short
; glb int_fast16_t : short
; glb uint16_t : unsigned short
; glb uint_least16_t : unsigned short
; glb uint_fast16_t : unsigned short
; glb int32_t : int
; glb int_least32_t : int
; glb int_fast32_t : int
; glb uint32_t : unsigned
; glb uint_least32_t : unsigned
; glb uint_fast32_t : unsigned
; glb imaxdiv_t : struct <something>
; glb bool_t : int
; glb pointer_t : * unsigned char
; glb funcion_t : * (
; prm <something> : * void
; ) * void
; glb manejador_t : * (void) void
; glb rti_t : * (void) void
; glb isr_t : * (void) void
; glb handler_t : * (void) void
; glb retardarThread_t : * (void) int
; glb ptrTVI_t : * * (void) void
; glb modoSO1_t : int
; glb lh_t : struct <something>
; glb address_t : struct <something>
; glb uPtrAdr_t : union <something>
; glb pid_t : int
; glb tid_t : int
; glb uid_t : int
; glb gid_t : int
; glb pindx_t : int
; glb tindx_t : int
; glb df_t : int
; glb dfs_t : int
; glb rindx_t : int
; glb inportb : (
; prm port : unsigned short
; ) unsigned char
; glb inport : (
; prm port : unsigned short
; ) unsigned short
; glb outport : (
; prm port : unsigned short
; prm val : unsigned short
; ) void
; glb outportb : (
; prm port : unsigned short
; prm val : unsigned char
; ) void
; glb inportb_r : (
; prm port : unsigned char
; ) unsigned char
; glb outportb_r : (
; prm port : unsigned char
; prm val : unsigned char
; ) void
; glb contadorTimer0 : (void) unsigned short
; glb ptrTVI : * * (void) void
; glb valorIMR : (void) unsigned short
; glb establecerIMR : (
; prm nuevoIMR : unsigned short
; ) void
; glb mask_pic1 : (
; prm irq : unsigned char
; ) void
; glb mask_pic2 : (
; prm irq : unsigned char
; ) void
; glb unmask_pic1 : (
; prm irq : unsigned char
; ) void
; glb unmask_pic2 : (
; prm irq : unsigned char
; ) void
; glb get_pic1_isr : (void) unsigned char
; glb get_pic2_isr : (void) unsigned char
; glb set_pics : (
; prm irq0 : unsigned char
; prm irq8 : unsigned char
; ) void
; glb pic_setup : (void) void
; glb enable_hwirq : (
; prm hwirq : int
; prm rti : * (void) void
; ) void
; glb _start__text : char
; glb _stop__text : char
; glb _start__rodata : char
; glb _stop__rodata : char
; glb _start__data : char
; glb _stop__data : char
; glb _start__bss : char
; glb _stop__bss : char
; glb _start_allcode__ : char
; glb _stop_allcode__ : char
; glb _start_alldata__ : char
; glb _stop_alldata__ : char
; glb mostrarSeccion : (
; prm start : unsigned
; prm stop : unsigned
; prm descripcion : * char
; ) void
; glb mostrarSecciones : (void) void
; glb modoAp_t : unsigned short
; glb tramaDWords_t : struct <something>
; glb tramaWords_t : struct <something>
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; glb tramaBytes_t : struct <something>
; glb trama_t : union <something>
; RPN'ized expression: "8 "
; Expanded expression: "8 "
; Expression value: 8
; glb bloque_t : struct <something>
; glb ptrBloque_t : * struct <something>
; glb dobleEnlace_t : struct <something>
; glb c2c_t : struct <something>
; glb posicionC2c : (
; prm i : int
; prm c2c : struct <something>
; ) int
; glb eliminarC2c : (
; prm i : int
; prm c2c : struct <something>
; ) void
; glb apilarC2c : (
; prm i : int
; prm c2c : struct <something>
; ) void
; glb encolarC2c : (
; prm i : int
; prm c2c : struct <something>
; ) void
; glb desencolarC2c : (
; prm c2c : struct <something>
; ) int
; glb inicializarC2c : (
; prm c2c : * struct <something>
; prm e : * struct <something>
; prm cabecera : int
; prm compartida : int
; ) void
; glb ptrC2c_t : * struct <something>
; glb posicionPC2c : (
; prm i : int
; prm c2c : * struct <something>
; ) int
; glb eliminarPC2c : (
; prm i : int
; prm ptrC2c : * struct <something>
; ) void
; glb apilarPC2c : (
; prm i : int
; prm ptrC2c : * struct <something>
; ) void
; glb encolarPC2c : (
; prm i : int
; prm ptrC2c : * struct <something>
; ) void
; glb desencolarPC2c : (
; prm ptrC2c : * struct <something>
; ) int
; glb inicializarPC2c : (
; prm ptrC2c : * struct <something>
; prm e : * struct <something>
; prm cabecera : int
; prm compartida : int
; ) void
; glb callBack_t : * (
; prm arg : * void
; ) int
; RPN'ized expression: "10 "
; Expanded expression: "10 "
; Expression value: 10
; glb descCcb_t : struct <something>
; glb ccb_t : * struct <something>
; glb inicCcb : (
; prm ccb : * struct <something>
; prm max : unsigned short
; ) int
; glb encolarCcb : (
; prm cb : * (
; prm arg : * void
; ) int
; prm ccb : * struct <something>
; ) int
; glb desencolarCcb : (
; prm ccb : * struct <something>
; ) * (
; prm arg : * void
; ) int
; glb eliminarCcb : (
; prm cb : * (
; prm arg : * void
; ) int
; prm ccb : * struct <something>
; ) int
; glb eliminarSegCcb : (
; prm segmento : unsigned short
; prm ccb : * struct <something>
; ) int
; glb vaciarCcb : (
; prm ccb : * struct <something>
; ) int
; glb atenderCcb : (
; prm ccb : * struct <something>
; ) int
; glb estado_t : int
; glb dfa_t : struct <something>
; RPN'ized expression: "12 "
; Expanded expression: "12 "
; Expression value: 12
; RPN'ized expression: "80 "
; Expanded expression: "80 "
; Expression value: 80
; RPN'ized expression: "10 "
; Expanded expression: "10 "
; Expression value: 10
; glb descProceso_t : struct <something>
; glb descThread_t : struct <something>
; glb tipoFichero_t : int
; RPN'ized expression: "9 "
; Expanded expression: "9 "
; Expression value: 9
; glb descFichero_t : struct <something>
; glb tipoRecurso_t : int
; glb open_t : * (
; prm dfs : int
; prm modo : unsigned short
; ) int
; glb release_t : * (
; prm dfs : int
; ) int
; glb read_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb aio_read_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb write_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb aio_write_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb lseek_t : * (
; prm dfs : int
; prm pos : int
; prm whence : unsigned short
; ) int
; glb fcntl_t : * (
; prm dfs : int
; prm cmd : unsigned short
; prm arg : unsigned short
; ) int
; glb ioctl_t : * (
; prm dfs : int
; prm request : unsigned short
; prm arg : unsigned short
; ) int
; glb eliminar_t : * (
; prm pindx : int
; ) int
; RPN'ized expression: "12 "
; Expanded expression: "12 "
; Expression value: 12
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; glb descRecurso_t : struct <something>
; glb info_t : struct <something>
; glb cabecera_t : struct <something>
; RPN'ized expression: "16 1 + "
; Expanded expression: "17 "
; Expression value: 17
; RPN'ized expression: "16 2 + "
; Expanded expression: "18 "
; Expression value: 18
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "2010 2 + "
; Expanded expression: "2012 "
; Expression value: 2012
; RPN'ized expression: "20 1 + "
; Expanded expression: "21 "
; Expression value: 21
; RPN'ized expression: "20 2 + "
; Expanded expression: "22 "
; Expression value: 22
; RPN'ized expression: "14 1 + "
; Expanded expression: "15 "
; Expression value: 15
; RPN'ized expression: "14 2 + "
; Expanded expression: "16 "
; Expression value: 16
; RPN'ized expression: "16 16 + "
; Expanded expression: "32 "
; Expression value: 32
; RPN'ized expression: "2010 16 + "
; Expanded expression: "2026 "
; Expression value: 2026
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "16 1 + "
; Expanded expression: "17 "
; Expression value: 17
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "20 14 + "
; Expanded expression: "34 "
; Expression value: 34
; glb e2PFR_t : struct <something>
; glb cPFR_t : int
; glb sigThread_t : * () int
; glb activarThread_t : * (
; prm tindx : int
; ) void
; glb buscarNuevoThreadActual_t : * (void) void
; glb bloquearThreadActual_t : * (
; prm rindx : int
; ) void
; glb descSO1H_t : struct <something>
%define SP0_SO1H 0x8000
%define SP0_Kernel 0xA000
; glb startBin : (void) void
; glb modoSO1 : (void) int
; glb unidadBIOS : (void) unsigned char
; glb CS_SO1H : unsigned short
; glb RO_SO1H : unsigned short
; glb DS_SO1H : unsigned short
; glb BSS_SO1H : unsigned short
; glb SS_SO1H : unsigned short
; glb SS_Kernel : unsigned short
; glb IMRInicial : unsigned short
; glb obtenerMapa : (void) void
; RPN'ized expression: "12 "
; Expanded expression: "12 "
; Expression value: 12
; RPN'ized expression: "80 "
; Expanded expression: "80 "
; Expression value: 80
; RPN'ized expression: "10 "
; Expanded expression: "10 "
; Expression value: 10
; glb descProcesoExt_t : struct <something>
; glb descThreadExt_t : struct <something>
; RPN'ized expression: "16 "
; Expanded expression: "16 "
; Expression value: 16
; glb descProceso : [16u] struct <something>
; RPN'ized expression: "2010 "
; Expanded expression: "2010 "
; Expression value: 2010
; glb descThread : [2010u] struct <something>
; RPN'ized expression: "20 "
; Expanded expression: "20 "
; Expression value: 20
; glb descFichero : [20u] struct <something>
; RPN'ized expression: "14 "
; Expanded expression: "14 "
; Expression value: 14
; glb descRecurso : [14u] struct <something>
; RPN'ized expression: "numColasPFR "
; Expanded expression: "12 "
; Expression value: 12
; glb c2cPFR : [12u] struct <something>
; glb e2PFR : struct <something>
; glb descCcbAlEpilogo : struct <something>
; glb ccbAlEpilogo : * struct <something>
; glb tramaThread : * union <something>
; glb tramaTarea : * union <something>
; glb indThreadActual : int
; glb indProcesoActual : int
; glb indThreadDeSuperficie : int
; glb contRodajas : unsigned
; glb contTicsRodaja : int
; glb contadorTimer00 : unsigned short
; glb contOcioso : int
; glb nuevoPid : (void) int
; glb nuevoTid : (void) int
; glb indice : (
; prm tid : int
; ) int
; glb sigThread : (void) int
; glb activarThread : (
; prm tindx : int
; ) int
; glb registrarEnPOrdenados : (
; prm pindx : int
; ) void
; glb crearThread : (
; prm funcion : * (
; prm <something> : * void
; ) * void
; prm SP0 : unsigned short
; prm arg : * void
; prm pindx : int
; ) int
; glb crearProceso : (
; prm segmento : unsigned short
; prm tam : unsigned short
; prm tamFich : unsigned
; prm programa : * char
; prm comando : * char
; prm pindx : int
; ) int
; glb inicProcesos : (void) void
; glb resetPids : (void) void
; glb resetTids : (void) void
; glb terminarThreadIndx : (
; prm tindx : int
; ) int
; glb eliminarThreadIndx : (
; prm tindx : int
; ) int
; glb terminarProcIndx : (
; prm pindx : int
; ) int
; glb eliminarProcIndx : (
; prm pindx : int
; ) int
; glb matarThreadIndx : (
; prm tindx : int
; ) int
; glb matarProcIndx : (
; prm pindx : int
; ) int
; glb link_procs : (void) void
; glb SS_Thread : unsigned short
; glb SP_Thread : unsigned short
; glb SS_Tarea : unsigned short
; glb SP_Tarea : unsigned short
; glb nivelActivacionSO1H : int
; glb nVIntActual : int
; glb enHalt : int
; glb activarAlEpilogo1 : int
; glb hayTic : int
; glb setKernelStack : (void) void
; glb setThreadStack : (
; prm SS_Thread : unsigned short
; prm SP_Thread : unsigned short
; ) void
; glb reg_DL : (void) unsigned
; glb prepararDesbloqueadosUrgentes : (void) void
; glb buscarNuevoThreadActual : (void) void
; glb bloquearThreadActual : (
; prm rindx : int
; ) void
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb VIOrg : [256u] * (void) void
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb recVInt : [256u] int
; glb redirigirInt : (
; prm nVInt : unsigned char
; prm isr : * (void) void
; ) void
; glb redirigirIntHardware : (
; prm irq : unsigned char
; prm isr : * (void) void
; ) void
; glb restablecerInt : (
; prm nVInt : int
; ) void
; glb inicTVI : (void) void
; glb link_ints : (void) void
; glb printCarVideo : (
; prm car : char
; ) int
; glb printLnVideo : (void) int
; glb printStrVideo : (
; prm str : * char
; ) int
; glb printStrHastaVideo : (
; prm str : * char
; prm n : unsigned short
; prm lleno : int
; ) int
; glb printDecVideo : (
; prm num : unsigned short
; prm l : unsigned short
; ) int
; glb printLDecVideo : (
; prm num : unsigned
; prm l : unsigned short
; ) int
; glb printIntVideo : (
; prm num : int
; prm l : unsigned short
; ) int
; glb printLIntVideo : (
; prm num : int
; prm l : unsigned short
; ) int
; glb printHexVideo : (
; prm num : unsigned short
; prm l : unsigned short
; ) int
; glb printLHexVideo : (
; prm num : unsigned
; prm l : unsigned short
; ) int
; glb printBinVideo : (
; prm num : unsigned short
; prm l : unsigned short
; ) int
; glb printLBinVideo : (
; prm num : unsigned
; prm l : unsigned short
; ) int
; glb printPtrVideo : (
; prm ptr : * unsigned char
; ) int
; glb printByteVideo : (
; prm b : unsigned char
; ) int
; glb printWordVideo : (
; prm w : unsigned short
; ) int
; glb printCadVideo : (
; prm cad : * char
; ) int
section .text
global _link_ints
_link_ints:
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb VIOrg : [256u] * (void) void
section .bss
alignb 4
global _VIOrg
_VIOrg:
resb 1024
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb recVInt : [256u] int
section .bss
alignb 4
global _recVInt
_recVInt:
resb 1024
; glb isrNula : (void) void
section .text
global _isrNula
_isrNula:
push ebp
movzx ebp, sp
;sub sp, 0
L1:
db 0x66
leave
retf
L3:
section .fxnsz noalloc
dd L3 - _isrNula
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb isr : [256u] * (void) void
section .bss
alignb 4
global _isr
_isr:
resb 1024
%macro RTI 2
pushad
mov dl,0%1%2h
jmp word fin
%endmacro
%macro RTIF 1
RTI %1, 0
RTI %1, 1
RTI %1, 2
RTI %1, 3
RTI %1, 4
RTI %1, 5
RTI %1, 6
RTI %1, 7
RTI %1, 8
RTI %1, 9
RTI %1, a
RTI %1, b
RTI %1, c
RTI %1, d
RTI %1, e
RTI %1, f
%endmacro
; glb rti_00 : (void) void
; glb envolvente_00 : (void) void
section .text
global _envolvente_00
_envolvente_00:
push ebp
movzx ebp, sp
;sub sp, 0
; rti_00_entry:
L6:
section .text
global _rti_00
_rti_00:
RTIF 0
RTIF 1
RTIF 2
RTIF 3
RTIF 4
RTIF 5
RTIF 6
RTIF 7
RTIF 8
RTIF 9
RTIF a
RTIF b
RTIF c
RTIF d
RTIF e
RTIF f
fin:
push es
push ds
; if
; RPN'ized expression: "nivelActivacionSO1H ++ 1 == "
; Expanded expression: "nivelActivacionSO1H ++(4) 1 == "
; Fused expression: "nivelActivacionSO1H ++(4) *ax == ax 1 IF! "
section .relod
dd L9
section .text
db 0x66, 0xB8
L9:
dd _nivelActivacionSO1H
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
inc dword [si]
mov eax, [si]
cmp eax, 1
jne L7
; {
push esp
mov ax,ss
movzx eax,ax
push eax
; RPN'ized expression: "( setKernelStack ) "
; Expanded expression: " setKernelStack ()0 "
; Fused expression: "( setKernelStack )0 "
db 0x9A
section .relot
dd L10
section .text
L10:
dd _setKernelStack
; }
L7:
; RPN'ized expression: "nVIntActual ( reg_DL ) = "
; Expanded expression: "nVIntActual reg_DL ()0 =(4) "
; Fused expression: "nVIntActual push-ax ( reg_DL )0 =(204) **sp ax "
section .relod
dd L11
section .text
db 0x66, 0xB8
L11:
dd _nVIntActual
push eax
db 0x9A
section .relot
dd L12
section .text
L12:
dd _reg_DL
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "( isr nVIntActual + *u ) "
; Expanded expression: " isr nVIntActual *(4) 4 * + *(4) ()0 "
; Fused expression: "( isr push-ax nVIntActual * *ax 4 + *sp ax *(4) ax )0 "
section .relod
dd L13
section .text
db 0x66, 0xB8
L13:
dd _isr
push eax
section .relod
dd L14
section .text
db 0x66, 0xB8
L14:
dd _nVIntActual
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
db 0x9A
section .relot
dd L15
section .text
L15:
dd L16
L16:
mov si, sp
add word [ss:si], L17 - L16
shl eax, 12
rol ax, 4
push eax
retf
L17:
; if
; RPN'ized expression: "nivelActivacionSO1H 1 == enHalt || "
; Expanded expression: "nivelActivacionSO1H *(4) 1 == [sh||->20] enHalt *(4) _Bool ||[20] "
; Fused expression: "nivelActivacionSO1H == *ax 1 [sh||->20] enHalt *(4) ax _Bool ||[20] "
section .relod
dd L21
section .text
db 0x66, 0xB8
L21:
dd _nivelActivacionSO1H
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
cmp eax, 1
sete al
movzx eax, al
; JumpIfNotZero
test eax, eax
jne L20
section .relod
dd L22
section .text
db 0x66, 0xB8
L22:
dd _enHalt
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
test eax, eax
setne al
movsx eax, al
L20:
; JumpIfZero
test eax, eax
je L18
; {
; if
; RPN'ized expression: "ccbAlEpilogo num -> *u 0 > "
; Expanded expression: "ccbAlEpilogo *(4) 0 + *(2) 0 > "
; Fused expression: "ccbAlEpilogo + *ax 0 > *ax 0 IF! "
section .relod
dd L25
section .text
db 0x66, 0xB8
L25:
dd _ccbAlEpilogo
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov ax, [si]
movzx eax, ax
cmp eax, 0
jle L23
; RPN'ized expression: "( ccbAlEpilogo atenderCcb ) "
; Expanded expression: " ccbAlEpilogo *(4) atenderCcb ()4 "
; Fused expression: "( ccbAlEpilogo *(4) ax , atenderCcb )4 "
section .relod
dd L26
section .text
db 0x66, 0xB8
L26:
dd _ccbAlEpilogo
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
push dword [si]
db 0x9A
section .relot
dd L27
section .text
L27:
dd _atenderCcb
sub sp, -4
L23:
; if
; RPN'ized expression: "c2cPFR TUrgentes + *u &u numElem -> *u 0 > "
; Expanded expression: "c2cPFR 80 + 0 + *(4) 0 > "
; Fused expression: "c2cPFR + ax 80 + ax 0 > *ax 0 IF! "
section .relod
dd L30
section .text
db 0x66, 0xB8
L30:
dd _c2cPFR
add eax, 80
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
cmp eax, 0
jle L28
; RPN'ized expression: "( prepararDesbloqueadosUrgentes ) "
; Expanded expression: " prepararDesbloqueadosUrgentes ()0 "
; Fused expression: "( prepararDesbloqueadosUrgentes )0 "
db 0x9A
section .relot
dd L31
section .text
L31:
dd _prepararDesbloqueadosUrgentes
L28:
; if
; RPN'ized expression: "activarAlEpilogo1 "
; Expanded expression: "activarAlEpilogo1 *(4) "
; Fused expression: "activarAlEpilogo1 *(4) ax "
section .relod
dd L34
section .text
db 0x66, 0xB8
L34:
dd _activarAlEpilogo1
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
; JumpIfZero
test eax, eax
je L32
; {
; RPN'ized expression: "activarAlEpilogo1 FALSE = "
; Expanded expression: "activarAlEpilogo1 0 =(4) "
; Fused expression: "activarAlEpilogo1 =(204) *ax 0 "
section .relod
dd L35
section .text
db 0x66, 0xB8
L35:
dd _activarAlEpilogo1
mov ebx, eax
mov eax, 0
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "( ( sigThread ) activarThread ) "
; Expanded expression: " sigThread ()0 activarThread ()4 "
; Fused expression: "( ( sigThread )0 , activarThread )4 "
db 0x9A
section .relot
dd L36
section .text
L36:
dd _sigThread
push eax
db 0x9A
section .relot
dd L37
section .text
L37:
dd _activarThread
sub sp, -4
; }
L32:
; }
L18:
; if
; RPN'ized expression: "nivelActivacionSO1H --p 1 == "
; Expanded expression: "nivelActivacionSO1H --p(4) 1 == "
; Fused expression: "nivelActivacionSO1H --p(4) *ax == ax 1 IF! "
section .relod
dd L40
section .text
db 0x66, 0xB8
L40:
dd _nivelActivacionSO1H
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
dec dword [si]
cmp eax, 1
jne L38
; {
; RPN'ized expression: "( SP_Thread , SS_Thread setThreadStack ) "
; Expanded expression: " SP_Thread *(2) SS_Thread *(2) setThreadStack ()8 "
; Fused expression: "( SP_Thread *(2) ax , SS_Thread *(2) ax , setThreadStack )8 "
section .relod
dd L41
section .text
db 0x66, 0xB8
L41:
dd _SP_Thread
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov ax, [si]
movzx eax, ax
push eax
section .relod
dd L42
section .text
db 0x66, 0xB8
L42:
dd _SS_Thread
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov ax, [si]
movzx eax, ax
push eax
db 0x9A
section .relot
dd L43
section .text
L43:
dd _setThreadStack
sub sp, -8
; }
L38:
pop ds
pop es
popad
iret
L4:
db 0x66
leave
retf
L44:
section .fxnsz
dd L44 - _envolvente_00
; glb inicTVI : (void) void
section .text
global _inicTVI
_inicTVI:
push ebp
movzx ebp, sp
sub sp, 4
; loc nVInt : (@-4): int
; for
; RPN'ized expression: "nVInt 0 = "
; Expanded expression: "(@-4) 0 =(4) "
; Fused expression: "=(204) *(@-4) 0 "
mov eax, 0
mov [bp-4], eax
L47:
; RPN'ized expression: "nVInt 256 < "
; Expanded expression: "(@-4) *(4) 256 < "
; Fused expression: "< *(@-4) 256 IF! "
mov eax, [bp-4]
cmp eax, 256
jge L50
; RPN'ized expression: "nVInt ++p "
; Expanded expression: "(@-4) ++p(4) "
; {
; RPN'ized expression: "VIOrg nVInt + *u ptrTVI nVInt + *u = "
; Expanded expression: "VIOrg (@-4) *(4) 4 * + ptrTVI *(4) (@-4) *(4) 4 * + *(4) =(4) "
; Fused expression: "VIOrg push-ax * *(@-4) 4 + *sp ax push-ax ptrTVI push-ax * *(@-4) 4 + **sp ax =(204) **sp *ax "
section .relod
dd L51
section .text
db 0x66, 0xB8
L51:
dd _VIOrg
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L52
section .text
db 0x66, 0xB8
L52:
dd _ptrTVI
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
add eax, ecx
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "recVInt nVInt + *u 1 -u = "
; Expanded expression: "recVInt (@-4) *(4) 4 * + -1 =(4) "
; Fused expression: "recVInt push-ax * *(@-4) 4 + *sp ax =(204) *ax -1 "
section .relod
dd L53
section .text
db 0x66, 0xB8
L53:
dd _recVInt
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov eax, -1
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; loc <something> : * (void) void
; RPN'ized expression: "isr nVInt + *u isrNula (something54) = "
; Expanded expression: "isr (@-4) *(4) 4 * + isrNula =(4) "
; Fused expression: "isr push-ax * *(@-4) 4 + *sp ax push-ax isrNula =(204) **sp ax "
section .relod
dd L55
section .text
db 0x66, 0xB8
L55:
dd _isr
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L56
section .text
db 0x66, 0xB8
L56:
dd _isrNula
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; }
L48:
; Fused expression: "++p(4) *(@-4) "
mov eax, [bp-4]
inc dword [bp-4]
jmp L47
L50:
L45:
db 0x66
leave
retf
L57:
section .fxnsz
dd L57 - _inicTVI
; glb redirigirInt : (
; prm nVInt : unsigned char
; prm isr_x : * (void) void
; ) void
section .text
global _redirigirInt
_redirigirInt:
push ebp
movzx ebp, sp
;sub sp, 0
; loc nVInt : (@8): unsigned char
; loc isr_x : (@12): * (void) void
; loc <something> : * (void) void
; loc <something> : unsigned
; loc <something> : unsigned short
; loc <something> : unsigned
; loc <something> : unsigned short
; loc <something> : unsigned
; loc <something> : unsigned
; loc <something> : unsigned
; RPN'ized expression: "ptrTVI nVInt + *u _start__text &u (something63) 4 >> (something62) (something61) 16 << envolvente_00 &u (something65) 6 + nVInt 7 * (something66) + _start__text &u (something67) - (something64) | (something60) = "
; Expanded expression: "ptrTVI *(4) (@8) *(1) 4 * + _start__text 4 >>u unsigned short 16 << envolvente_00 6 + (@8) *(1) 7 * + _start__text - unsigned short | =(4) "
; Fused expression: "ptrTVI push-ax * *(@8) 4 + **sp ax push-ax _start__text >>u ax 4 unsigned short << ax 16 push-ax envolvente_00 + ax 6 push-ax * *(@8) 7 + *sp ax push-ax _start__text - *sp ax unsigned short | *sp ax =(204) **sp ax "
section .relod
dd L68
section .text
db 0x66, 0xB8
L68:
dd _ptrTVI
push eax
mov al, [bp+8]
movzx eax, al
imul eax, eax, 4
mov ecx, eax
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
add eax, ecx
push eax
section .relod
dd L69
section .text
db 0x66, 0xB8
L69:
dd __start__text
shr eax, 4
movzx eax, ax
shl eax, 16
push eax
section .relod
dd L70
section .text
db 0x66, 0xB8
L70:
dd _envolvente_00
add eax, 6
push eax
mov al, [bp+8]
movzx eax, al
imul eax, eax, 7
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L71
section .text
db 0x66, 0xB8
L71:
dd __start__text
mov ecx, eax
pop eax
sub eax, ecx
movzx eax, ax
mov ecx, eax
pop eax
or eax, ecx
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "isr nVInt + *u isr_x = "
; Expanded expression: "isr (@8) *(1) 4 * + (@12) *(4) =(4) "
; Fused expression: "isr push-ax * *(@8) 4 + *sp ax =(204) *ax *(@12) "
section .relod
dd L72
section .text
db 0x66, 0xB8
L72:
dd _isr
push eax
mov al, [bp+8]
movzx eax, al
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov eax, [bp+12]
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
L58:
db 0x66
leave
retf
L73:
section .fxnsz
dd L73 - _redirigirInt
; glb redirigirIntHardware : (
; prm irq : unsigned char
; prm isr : * (void) void
; ) void
section .text
global _redirigirIntHardware
_redirigirIntHardware:
push ebp
movzx ebp, sp
sub sp, 4
; loc irq : (@8): unsigned char
; loc isr : (@12): * (void) void
; loc nVInt : (@-4): unsigned char
; if
; RPN'ized expression: "irq 8 < "
; Expanded expression: "(@8) *(1) 8 < "
; Fused expression: "< *(@8) 8 IF! "
mov al, [bp+8]
movzx eax, al
cmp eax, 8
jge L76
; {
; RPN'ized expression: "( 1 irq << unmask_pic1 ) "
; Expanded expression: " 1 (@8) *(1) << unmask_pic1 ()4 "
; Fused expression: "( << 1 *(@8) , unmask_pic1 )4 "
mov eax, 1
mov cl, [bp+8]
shl eax, cl
push eax
db 0x9A
section .relot
dd L78
section .text
L78:
dd _unmask_pic1
sub sp, -4
; RPN'ized expression: "nVInt 8 irq + = "
; Expanded expression: "(@-4) 8 (@8) *(1) + =(1) "
; Fused expression: "+ 8 *(@8) =(156) *(@-4) ax "
mov eax, 8
movzx ecx, byte [bp+8]
add eax, ecx
mov [bp-4], al
movzx eax, al
; }
jmp L77
L76:
; else
; {
; RPN'ized expression: "( 1 2 << unmask_pic1 ) "
; Expanded expression: " 4 unmask_pic1 ()4 "
; Fused expression: "( 4 , unmask_pic1 )4 "
push dword 4
db 0x9A
section .relot
dd L79
section .text
L79:
dd _unmask_pic1
sub sp, -4
; RPN'ized expression: "( 1 irq 8 - << unmask_pic2 ) "
; Expanded expression: " 1 (@8) *(1) 8 - << unmask_pic2 ()4 "
; Fused expression: "( - *(@8) 8 << 1 ax , unmask_pic2 )4 "
mov al, [bp+8]
movzx eax, al
sub eax, 8
mov ecx, eax
mov eax, 1
shl eax, cl
push eax
db 0x9A
section .relot
dd L80
section .text
L80:
dd _unmask_pic2
sub sp, -4
; RPN'ized expression: "nVInt 112 irq + 8 - = "
; Expanded expression: "(@-4) 112 (@8) *(1) + 8 - =(1) "
; Fused expression: "+ 112 *(@8) - ax 8 =(156) *(@-4) ax "
mov eax, 112
movzx ecx, byte [bp+8]
add eax, ecx
sub eax, 8
mov [bp-4], al
movzx eax, al
; }
L77:
; RPN'ized expression: "( isr , nVInt redirigirInt ) "
; Expanded expression: " (@12) *(4) (@-4) *(1) redirigirInt ()8 "
; Fused expression: "( *(4) (@12) , *(1) (@-4) , redirigirInt )8 "
push dword [bp+12]
mov al, [bp-4]
movzx eax, al
push eax
db 0x9A
section .relot
dd L81
section .text
L81:
dd _redirigirInt
sub sp, -8
L74:
db 0x66
leave
retf
L82:
section .fxnsz
dd L82 - _redirigirIntHardware
; glb restablecerInt : (
; prm nVInt : int
; ) void
section .text
global _restablecerInt
_restablecerInt:
push ebp
movzx ebp, sp
;sub sp, 0
; loc nVInt : (@8): int
; RPN'ized expression: "ptrTVI nVInt + *u VIOrg nVInt + *u = "
; Expanded expression: "ptrTVI *(4) (@8) *(4) 4 * + VIOrg (@8) *(4) 4 * + *(4) =(4) "
; Fused expression: "ptrTVI push-ax * *(@8) 4 + **sp ax push-ax VIOrg push-ax * *(@8) 4 + *sp ax =(204) **sp *ax "
section .relod
dd L85
section .text
db 0x66, 0xB8
L85:
dd _ptrTVI
push eax
mov eax, [bp+8]
imul eax, eax, 4
mov ecx, eax
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
add eax, ecx
push eax
section .relod
dd L86
section .text
db 0x66, 0xB8
L86:
dd _VIOrg
push eax
mov eax, [bp+8]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; loc <something> : * (void) void
; RPN'ized expression: "isr nVInt + *u isrNula (something87) = "
; Expanded expression: "isr (@8) *(4) 4 * + isrNula =(4) "
; Fused expression: "isr push-ax * *(@8) 4 + *sp ax push-ax isrNula =(204) **sp ax "
section .relod
dd L88
section .text
db 0x66, 0xB8
L88:
dd _isr
push eax
mov eax, [bp+8]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L89
section .text
db 0x66, 0xB8
L89:
dd _isrNula
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
L83:
db 0x66
leave
retf
L90:
section .fxnsz
dd L90 - _restablecerInt
extern _nivelActivacionSO1H
extern _setKernelStack
extern _nVIntActual
extern _reg_DL
extern _enHalt
extern _ccbAlEpilogo
extern _atenderCcb
extern _c2cPFR
extern _prepararDesbloqueadosUrgentes
extern _activarAlEpilogo1
extern _sigThread
extern _activarThread
extern _SP_Thread
extern _SS_Thread
extern _setThreadStack
extern _ptrTVI
extern __start__text
extern _unmask_pic1
extern _unmask_pic2
; Syntax/declaration table/stack:
; Bytes used: 12295/40960
; Macro table:
; Macro __SMALLER_C__ = `0x0100`
; Macro __SMALLER_C_32__ = ``
; Macro __HUGE__ = ``
; Macro __SMALLER_C_SCHAR__ = ``
; Bytes used: 74/5120
; Identifier table:
; Ident __floatsisf
; Ident __floatunsisf
; Ident __fixsfsi
; Ident __fixunssfsi
; Ident __addsf3
; Ident __subsf3
; Ident __negsf2
; Ident __mulsf3
; Ident __divsf3
; Ident __lesf2
; Ident __gesf2
; Ident intptr_t
; Ident uintptr_t
; Ident intmax_t
; Ident uintmax_t
; Ident int8_t
; Ident int_least8_t
; Ident int_fast8_t
; Ident uint8_t
; Ident uint_least8_t
; Ident uint_fast8_t
; Ident int16_t
; Ident int_least16_t
; Ident int_fast16_t
; Ident uint16_t
; Ident uint_least16_t
; Ident uint_fast16_t
; Ident int32_t
; Ident int_least32_t
; Ident int_fast32_t
; Ident uint32_t
; Ident uint_least32_t
; Ident uint_fast32_t
; Ident <something>
; Ident quot
; Ident rem
; Ident imaxdiv_t
; Ident FALSE
; Ident TRUE
; Ident bool_t
; Ident pointer_t
; Ident funcion_t
; Ident manejador_t
; Ident rti_t
; Ident isr_t
; Ident handler_t
; Ident retardarThread_t
; Ident ptrTVI_t
; Ident modoSO1_Bin
; Ident modoSO1_Exe
; Ident modoSO1_Bs
; Ident modoSO1_t
; Ident lo
; Ident hi
; Ident lh_t
; Ident offset
; Ident segment
; Ident address_t
; Ident ptr
; Ident adr
; Ident uPtrAdr_t
; Ident pid_t
; Ident tid_t
; Ident uid_t
; Ident gid_t
; Ident pindx_t
; Ident tindx_t
; Ident df_t
; Ident dfs_t
; Ident rindx_t
; Ident inportb
; Ident port
; Ident inport
; Ident outport
; Ident val
; Ident outportb
; Ident inportb_r
; Ident outportb_r
; Ident contadorTimer0
; Ident ptrTVI
; Ident valorIMR
; Ident establecerIMR
; Ident nuevoIMR
; Ident mask_pic1
; Ident irq
; Ident mask_pic2
; Ident unmask_pic1
; Ident unmask_pic2
; Ident get_pic1_isr
; Ident get_pic2_isr
; Ident set_pics
; Ident irq0
; Ident irq8
; Ident pic_setup
; Ident enable_hwirq
; Ident hwirq
; Ident rti
; Ident _start__text
; Ident _stop__text
; Ident _start__rodata
; Ident _stop__rodata
; Ident _start__data
; Ident _stop__data
; Ident _start__bss
; Ident _stop__bss
; Ident _start_allcode__
; Ident _stop_allcode__
; Ident _start_alldata__
; Ident _stop_alldata__
; Ident mostrarSeccion
; Ident start
; Ident stop
; Ident descripcion
; Ident mostrarSecciones
; Ident modoAp_t
; Ident DS
; Ident ES
; Ident EDI
; Ident ESI
; Ident EBP
; Ident ESP
; Ident EBX
; Ident EDX
; Ident ECX
; Ident EAX
; Ident IP
; Ident CS
; Ident Flags
; Ident tramaDWords_t
; Ident DI
; Ident rDI
; Ident SI
; Ident rSI
; Ident BP
; Ident rBP
; Ident SP
; Ident rSP
; Ident BX
; Ident rBX
; Ident DX
; Ident rDX
; Ident CX
; Ident rCX
; Ident AX
; Ident rAX
; Ident tramaWords_t
; Ident BL
; Ident BH
; Ident rB
; Ident DL
; Ident DH
; Ident rD
; Ident CL
; Ident CH
; Ident rC
; Ident AL
; Ident AH
; Ident rA
; Ident tramaBytes_t
; Ident td
; Ident tw
; Ident tb
; Ident trama_t
; Ident tam
; Ident sig
; Ident ant
; Ident aux
; Ident relleno
; Ident bloque_t
; Ident ptrBloque_t
; Ident cab
; Ident dobleEnlace_t
; Ident numElem
; Ident primero
; Ident cabecera
; Ident e
; Ident c2c_t
; Ident posicionC2c
; Ident i
; Ident c2c
; Ident eliminarC2c
; Ident apilarC2c
; Ident encolarC2c
; Ident desencolarC2c
; Ident inicializarC2c
; Ident compartida
; Ident ptrC2c_t
; Ident posicionPC2c
; Ident eliminarPC2c
; Ident ptrC2c
; Ident apilarPC2c
; Ident encolarPC2c
; Ident desencolarPC2c
; Ident inicializarPC2c
; Ident callBack_t
; Ident arg
; Ident num
; Ident in
; Ident out
; Ident max
; Ident callBack
; Ident descCcb_t
; Ident ccb_t
; Ident inicCcb
; Ident ccb
; Ident encolarCcb
; Ident cb
; Ident desencolarCcb
; Ident eliminarCcb
; Ident eliminarSegCcb
; Ident segmento
; Ident vaciarCcb
; Ident atenderCcb
; Ident libre
; Ident preparado
; Ident ejecutandose
; Ident bloqueado
; Ident estado_t
; Ident modoAp
; Ident dfs
; Ident pos
; Ident dfa_t
; Ident pid
; Ident noStatus
; Ident status
; Ident ppindx
; Ident hpindx
; Ident c2cHijos
; Ident c2cThreads
; Ident CSProc
; Ident tamCodigo
; Ident desplBSS
; Ident desplPila
; Ident tamFichero
; Ident programa
; Ident comando
; Ident nfa
; Ident tfa
; Ident uid
; Ident gid
; Ident descProceso_t
; Ident tid
; Ident estado
; Ident esperandoPor
; Ident trama
; Ident ptindx
; Ident htindx
; Ident pindx
; Ident SSThread
; Ident SP0
; Ident descThread_t
; Ident flibre
; Ident fRegular
; Ident fedBloques
; Ident fedCaracteres
; Ident tuberia
; Ident tipoFichero_t
; Ident tipo
; Ident nombre
; Ident rindx
; Ident menor
; Ident shareMode
; Ident contAp_L
; Ident contAp_E
; Ident descFichero_t
; Ident rLibre
; Ident rDCaracteres
; Ident rDBloques
; Ident rTuberia
; Ident rGP
; Ident rGM
; Ident rSF
; Ident rOtro
; Ident tipoRecurso_t
; Ident open_t
; Ident modo
; Ident release_t
; Ident read_t
; Ident dir
; Ident nbytes
; Ident aio_read_t
; Ident write_t
; Ident aio_write_t
; Ident lseek_t
; Ident whence
; Ident fcntl_t
; Ident cmd
; Ident ioctl_t
; Ident request
; Ident eliminar_t
; Ident tindx
; Ident c2cFichRec
; Ident numVI
; Ident nVInt
; Ident isr
; Ident open
; Ident release
; Ident read
; Ident aio_read
; Ident write
; Ident aio_write
; Ident lseek
; Ident fcntl
; Ident ioctl
; Ident eliminar
; Ident descRecurso_t
; Ident SP0_So1
; Ident IMR
; Ident modoSO1
; Ident ptrDebugWord
; Ident info_t
; Ident signatura
; Ident bytesUltSector
; Ident sectores
; Ident numDirReub
; Ident numParCabecera
; Ident minAlloc
; Ident maxAlloc
; Ident SS0
; Ident checkSum
; Ident IP0
; Ident CS0
; Ident offTablaReub
; Ident numOverlay
; Ident cabecera_t
; Ident Libres
; Ident Ocupados
; Ident e2DescProceso
; Ident e2DescThread
; Ident e2DescFichero
; Ident e2DescRecurso
; Ident e2Hijos
; Ident e2Threads
; Ident e2Preparados
; Ident e2Urgentes
; Ident e2POrdenados
; Ident e2TDormidos
; Ident e2FichRec
; Ident e2PFR_t
; Ident DPLibres
; Ident DPOcupados
; Ident DTLibres
; Ident DTOcupados
; Ident TPreparados
; Ident TUrgentes
; Ident POrdenados
; Ident TDormidos
; Ident DFLibres
; Ident DFOcupados
; Ident DRLibres
; Ident DROcupados
; Ident numColasPFR
; Ident cPFR_t
; Ident sigThread_t
; Ident activarThread_t
; Ident buscarNuevoThreadActual_t
; Ident bloquearThreadActual_t
; Ident ptrIndProcesoActual
; Ident ptrIndThreadActual
; Ident ptrTramaThread
; Ident ptrActivarAlEpilogo
; Ident ptrDescProceso
; Ident tamDescProceso
; Ident ptrDescThread
; Ident tamDescThread
; Ident ptrDescFichero
; Ident ptrDescRecurso
; Ident ptrC2cPFR
; Ident ptrE2PFR
; Ident ptrNivelActivacionSO1H
; Ident ptrEnHalt
; Ident ptrHayTic
; Ident ptrCcbAlEpilogo
; Ident ptrSS_Thread
; Ident ptrSP_Thread
; Ident ptrSS_Kernel
; Ident ptrSP0_Kernel
; Ident SP0_SO1H
; Ident ptrContRodajas
; Ident ptrContTicsRodaja
; Ident ptrVIOrg
; Ident sigThread
; Ident activarThread
; Ident buscarNuevoThreadActual
; Ident bloquearThreadActual
; Ident ptrListaLibres
; Ident ptrTamBloqueMax
; Ident descSO1H_t
; Ident startBin
; Ident unidadBIOS
; Ident CS_SO1H
; Ident RO_SO1H
; Ident DS_SO1H
; Ident BSS_SO1H
; Ident SS_SO1H
; Ident SS_Kernel
; Ident IMRInicial
; Ident obtenerMapa
; Ident descProcesoExt_t
; Ident descThreadExt_t
; Ident descProceso
; Ident descThread
; Ident descFichero
; Ident descRecurso
; Ident c2cPFR
; Ident e2PFR
; Ident descCcbAlEpilogo
; Ident ccbAlEpilogo
; Ident tramaThread
; Ident tramaTarea
; Ident indThreadActual
; Ident indProcesoActual
; Ident indThreadDeSuperficie
; Ident contRodajas
; Ident contTicsRodaja
; Ident contadorTimer00
; Ident contOcioso
; Ident nuevoPid
; Ident nuevoTid
; Ident indice
; Ident registrarEnPOrdenados
; Ident crearThread
; Ident funcion
; Ident crearProceso
; Ident tamFich
; Ident inicProcesos
; Ident resetPids
; Ident resetTids
; Ident terminarThreadIndx
; Ident eliminarThreadIndx
; Ident terminarProcIndx
; Ident eliminarProcIndx
; Ident matarThreadIndx
; Ident matarProcIndx
; Ident link_procs
; Ident SS_Thread
; Ident SP_Thread
; Ident SS_Tarea
; Ident SP_Tarea
; Ident nivelActivacionSO1H
; Ident nVIntActual
; Ident enHalt
; Ident activarAlEpilogo1
; Ident hayTic
; Ident setKernelStack
; Ident setThreadStack
; Ident reg_DL
; Ident prepararDesbloqueadosUrgentes
; Ident VIOrg
; Ident recVInt
; Ident redirigirInt
; Ident redirigirIntHardware
; Ident restablecerInt
; Ident inicTVI
; Ident link_ints
; Ident printCarVideo
; Ident car
; Ident printLnVideo
; Ident printStrVideo
; Ident str
; Ident printStrHastaVideo
; Ident n
; Ident lleno
; Ident printDecVideo
; Ident l
; Ident printLDecVideo
; Ident printIntVideo
; Ident printLIntVideo
; Ident printHexVideo
; Ident printLHexVideo
; Ident printBinVideo
; Ident printLBinVideo
; Ident printPtrVideo
; Ident printByteVideo
; Ident b
; Ident printWordVideo
; Ident w
; Ident printCadVideo
; Ident cad
; Ident isrNula
; Ident rti_00
; Ident envolvente_00
; Ident isr_x
; Bytes used: 5106/16384
; Next label number: 91
; Compilation succeeded.
|
test/Succeed/Issue2159.agda | shlevy/agda | 1,989 | 10027 | <reponame>shlevy/agda
open import Agda.Builtin.Equality
open import Agda.Builtin.Nat
data AB : Set where
A B : AB
foo : Nat → AB → AB
foo 0 t = A
foo (suc n) t = foo n A -- NB tail-recursive
test : foo 100000 A ≡ A
test = refl -- memory blows up here
data N : Set where
z : N
s : N → N
produce : Nat → AB → N
produce 0 t = z
produce (suc n) t = s (produce n A)
consume : N → AB → AB
consume z t = t
consume (s n) t = consume n A
test₁ : consume (produce 100000 B) A ≡ A
test₁ = refl
|
programs/oeis/047/A047551.asm | neoneye/loda | 22 | 24518 | ; A047551: Numbers that are congruent to {0, 1, 6, 7} mod 8.
; 0,1,6,7,8,9,14,15,16,17,22,23,24,25,30,31,32,33,38,39,40,41,46,47,48,49,54,55,56,57,62,63,64,65,70,71,72,73,78,79,80,81,86,87,88,89,94,95,96,97,102,103,104,105,110,111,112,113,118,119,120,121,126
mov $1,$0
add $0,2
div $0,4
mul $0,4
add $0,$1
|
exampl05/console/hashapp/primes/primes.asm | AlexRogalskiy/Masm | 0 | 6125 | <reponame>AlexRogalskiy/Masm
; thanks to Scali .. he helped optimizing this
.386
.model flat, stdcall
option casemap:none
include \masm32\include\windows.inc
include \masm32\include\kernel32.inc
include \masm32\include\user32.inc
includelib \masm32\lib\kernel32.lib
includelib \masm32\lib\user32.lib
inv equ invoke
.data
hFile dd 0
BW dd 0
ofstruct OFSTRUCT <>
szPrime db "%lu, ", 0
szCaption db "Done!", 0
szDone db "Done! The number of primes found is: %lu", 13, 10, \
"Wrote primes to "
szFile db "PRIMES.TXT", 0
.data?
buffer dw 0ffffh dup (?)
szTemp db 80 dup (?)
.code
start:
mov ecx, 0ffffh / 2 ; counter
mov edi, offset buffer ; here: offset for where to put the numbers
mov eax, 00030002h ; write 2 numbers at one time
mov esi, edi ; where to read the numbers from (for the next step)
createbuffer_loop:
mov [edi], eax ; put 2 numbers into the buffer
add eax, 00020002h ; increase the number that gets put in the buffer
add edi, 4 ; adjust the buffer pointer
dec ecx ; decrease the counter
jnz createbuffer_loop ; counter <> zero? then do the whole thing again
mov edi, esi ; now restore edi for later
mov ecx, 0ffffh / 2 ; counter
xor ebx, ebx ; ebx will hold the number of primes
xor edx, edx ; clear high part of edx, because it will be used as pointer
findprime_loop:
mov ax, [esi] ; get the first word from the buffer
add esi, 2 ; adjust the buffer pointer
test ax, ax ; ax == zero?
jz no_prime ; then this is already a killed number
inc ebx ; we are here so this is a prime. increase the prime counter
mov dx, ax ; put the prime into dx
eliminatenonprime_loop:
add dx, ax ; now add the prime to the prime (prime*2, later prime*3 ..)
jc no_prime ; if dx now grew over 0ffffh, there's nothing left to kill
mov word ptr [edx*2+buffer-4], 0 ; kill non-primes by marking them with zero
jmp eliminatenonprime_loop ; jump back, till dx > 0ffffh
no_prime:
dec ecx ; decrease the counter
jnz findprime_loop ; counter <> zero? then do it again
push ebx ; because some APIs change ebx, we have to save it on the stack
inv OpenFile, offset szFile, offset ofstruct, OF_CREATE ; create new file
mov hFile, eax ; save its handle
mov cx, 0ffffh ; put counter to 0ffffh
xor eax, eax ; clear high parts of eax.
write:
push cx ; save cx on the stack, because one of these APIs will change it
mov ax, [edi] ; normally I'd use esi here, but I restored edi in the beginning
add edi, 2 ; adjust ...
test ax, ax ; ax == zero?
jz skip_write ; yes? so this is a killed number. do nothing
inv wsprintf, offset szTemp, offset szPrime, eax ; else convert number to ASCII
inv WriteFile, hFile, offset szTemp, eax, offset BW, NULL ; and write it to the file
skip_write:
pop cx ; restore the counter
dec cx ; and decrease it
jnz write ; zero? if not, then go back again
inv CloseHandle, hFile ; close the file
pop ebx ; pop the prime counter from the stack
inv wsprintf, offset szTemp, offset szDone, ebx
inv MessageBox, 0, offset szTemp, offset szCaption, MB_OK
inv ExitProcess, 0
end start |
experiments/test-suite/mutation-based/10/7/student.als | kaiyuanw/AlloyFLCore | 1 | 3554 | pred test79 {
some disj List0: List {some disj Node0, Node1: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node1
Node = Node0 + Node1
link = Node1->Node0 + Node1->Node1
elem = Node0->5 + Node1->4
True = True0
False = False0
Boolean = True0 + False0
}}}}}
}
run test79 for 3 expect 0
pred test67 {
some disj List0: List {some disj Node0, Node1, Node2: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node2
Node = Node0 + Node1 + Node2
link = Node0->Node1 + Node1->Node1 + Node2->Node0
elem = Node0->6 + Node1->6 + Node2->5
True = True0
False = False0
Boolean = True0 + False0
Contains[List0,5,True0]
}}}}}
}
run test67 for 3 expect 1
pred test35 {
some disj List0: List {some disj Node0, Node1, Node2: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node2
Node = Node0 + Node1 + Node2
link = Node0->Node1 + Node2->Node0
elem = Node0->6 + Node1->5 + Node2->6
True = True0
False = False0
Boolean = True0 + False0
Sorted[List0]
}}}}}
}
run test35 for 3 expect 0
pred test36 {
some disj List0: List {some disj Node0, Node1, Node2: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node2
Node = Node0 + Node1 + Node2
link = Node0->Node1 + Node1->Node0 + Node2->Node1
elem = Node0->6 + Node1->5 + Node2->6
True = True0
False = False0
Boolean = True0 + False0
Sorted[List0]
}}}}}
}
run test36 for 3 expect 0
pred test78 {
some disj List0: List {some disj Node0, Node1, Node2: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node0 + List0->Node1 + List0->Node2
Node = Node0 + Node1 + Node2
no link
elem = Node0->7 + Node1->6 + Node2->5
True = True0
False = False0
Boolean = True0 + False0
}}}}}
}
run test78 for 3 expect 0
pred test19 {
some disj List0: List {some disj Node0, Node1, Node2: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node2
Node = Node0 + Node1 + Node2
link = Node0->Node1 + Node1->Node0 + Node2->Node0
elem = Node0->5 + Node1->-3 + Node2->-4
True = True0
False = False0
Boolean = True0 + False0
Sorted[List0]
}}}}}
}
run test19 for 3 expect 0
pred test9 {
some disj List0: List {some disj Node0, Node1: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node1
Node = Node0 + Node1
link = Node0->Node1 + Node1->Node0
elem = Node0->6 + Node1->5
True = True0
False = False0
Boolean = True0 + False0
Loop[List0]
}}}}}
}
run test9 for 3 expect 0
pred test20 {
some disj List0: List {some disj Node0, Node1, Node2: Node {some disj True0: True {some disj False0: False {some disj True0, False0: Boolean {
List = List0
header = List0->Node2
Node = Node0 + Node1 + Node2
link = Node0->Node1 + Node1->Node0 + Node2->Node1
elem = Node0->6 + Node1->6 + Node2->5
True = True0
False = False0
Boolean = True0 + False0
Sorted[List0]
}}}}}
}
run test20 for 3 expect 1
|
cmd/share/gshare.asm | minblock/msdos | 0 | 175609 | <filename>cmd/share/gshare.asm
Title Share_1
;/*
; * Microsoft Confidential
; * Copyright (C) Microsoft Corporation 1991
; * All Rights Reserved.
; */
; $SALUT (0,36,41,44)
include SHAREHDR.INC
;
; Label: "The DOS SHARE Utility"
;
;******************* END OF SPECIFICATIONS *************************************
;
; Revision History
; ================
;
; M001 SR 9/10/90 Removed /NC support -- 'skip_check'
; references.
;
; M003 SR 10/1/90 Bug #2425 fixed. In ASC, check if the
; SFT to be chained is the same as the
; current SFT. Dont chain if so.
;
extrn fnm:near, rsc:near, rmn:near, cps:near, ofl:near, sle:near, interr:near
NAME Sharer
.xlist
.xcref
include sf.inc
include filemode.inc
include mult.inc
include syscall.inc
INCLUDE DOSSYM.INC
include dpl.asm
.cref
.list
AsmVars <IBM, Installed>
Installed = TRUE ; for installed version
OFF Macro reg,val
IF installed
mov reg,OFFSET val
ELSE
mov si,OFFSET DOSGROUP:val
ENDIF
ENDM
ERRNZ Macro x
IF x NE 0
%out ERRNZ failed
ENDIF
ENDM
; if we are installed, then define the base code segment of the sharer first
IF Installed
Share SEGMENT PARA PUBLIC 'SHARE'
Share ENDS
include dosseg.inc
; include the rest of the segment definitions for normal msdos
; We CANNOT include dosseg because start is not declared para in that file
; $SALUT (4,9,17,36)
;START SEGMENT PARA PUBLIC 'START'
;START ENDS
;CONSTANTS SEGMENT WORD PUBLIC 'CONST'
;CONSTANTS ENDS
;DATA SEGMENT WORD PUBLIC 'DATA'
;DATA ENDS
;TABLE SEGMENT BYTE PUBLIC 'TABLE'
;TABLE ENDS
;CODE SEGMENT BYTE PUBLIC 'CODE'
;CODE ENDS
;LAST_SEG SEGMENT PARA PUBLIC 'LAST_SEG'
;LAST_SEG ENDS
;DOSGROUP GROUP START,CONSTANTS,DATA,TABLE,CODE,LAST_SEG
ELSE
include dosseg.asm
ENDIF
DOSDATA SEGMENT WORD PUBLIC 'DATA'
Extrn ThisSFT:DWORD ; pointer to SFT entry
Extrn User_ID:WORD
Extrn Proc_ID:WORD
Extrn WFP_START:WORD
Extrn BytPos:DWORD
extrn OpenBuf:BYTE
extrn user_in_ax:WORD
IF debug
Extrn BugLev:WORD
Extrn BugTyp:WORD
include bugtyp.asm
ENDIF
DOSDATA ENDS
; if we are not installed, then the code here is just part of the normal
; MSDOS code segment otherwise, define our own code segment
.sall
IF NOT INSTALLED
CODE SEGMENT BYTE PUBLIC 'CODE'
ASSUME SS:DOSGROUP,CS:DOSGROUP
ELSE
Share SEGMENT PARA PUBLIC 'SHARE'
ASSUME SS:DOSDATA,CS:SHARE
ENDIF
extrn MFT:BYTE
;SR;
; This message is now defined in another file for internationalization
;purposes.
;
extrn AscErr:BYTE
include mft.inc
PUBLIC FreLock,Serial
IF installed
Frelock DW ? ; FWA of lock free list
ELSE
Frelock DW OFFSET DOSDATA:lck8 ; FWA of lock free list
ENDIF
Serial DW 0 ; serial number
DS_Org dw 0 ;an000;DS on entry to routine
ZERO EQU 0
ONE EQU 1
FRAME struc
SavedBP dw ?
RetOFF dw ?
Parm_1 dw ?
Parm_2 dw ?
FRAME ends
; $SALUT (4,4,9,41)
BREAK <Sharer - MultiProcess File Sharer>
;******************* START OF SPECIFICATIONS ***********************************
;
; MSDOS MFT Functions
;
; The Master File Table (MFT) associates the cannonicalized pathnames,
; lock records and SFTs for all files open on this machine.
;
; These functions are supplied to maintain the MFT and extract
; information from it. All MFT access should be via these routines so
; that the MFT structure can remain flexible.
;
;******************* END OF SPECIFICATIONS *************************************
BREAK <Mft_enter - Make an MFT entry and check access>
;******************* START OF SPECIFICATIONS ***********************************
;
; mft_enter - make an entry in the MFT
;
; mft_enter is called to make an entry in the MFT.
; mft_enter checks for a file sharing conflict:
; No conflict:
; A new MFT entry is created, or the existing one updated,
; as appropriate.
; Conflicts:
; The existing MFT is left alone. Note that if we had to
; create a new MFT there cannot be, by definition, sharing
; conflicts.
; If no conflict has been discovered, the SFT list for the file is
; checked for one that matches the following conditions:
;
; If mode == 70 then
; don't link in SFT
; increment refcount
; If mode&sfIsFCB and userids match and process ids match then
; don't link in SFT
;
; ENTRY ThisSFT points to an SFT structure. The sf_mode field
; contains the desired sharing mode.
; WFP_Start is an offset from DOSData of the full pathname for
; the file
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (DS) = (SS) = DOSData
; EXIT 'C' clear if no error'
; 'C' set if error
; (ax) = error code
; USES ALL but DS
;
;******************* END OF SPECIFICATIONS *************************************
Procedure mft_enter,NEAR
; int 3
nop
nop
EnterCrit critShare
DOSAssume SS <DS>,"MFT_Enter entry"
ASSUME ES:NOTHING,SS:DOSDATA
push ds
; find or make a name record
mov si,WFP_Start ; (DS:SI) = FBA of file name
mov al,1 ; allow creation of MFT entry
push es
ASSUME DS:NOTHING
call FNM ; find or create name in MFT
pop es
mov ax,error_sharing_buffer_exceeded
jc ent9 ; not enough space
;
; (bx) = fwa name record
;
lds si,ThisSFT
call ASC ; try to add to chain
; As noted above, we don't have to worry about an "empty" name record
; being left if ASC refuses to add the SFT - ASC cannot refuse if we had
; just created the MFT...
; return.
;
; 'C' and (Ax) setup appropriately
ent9: pop ds
LeaveCrit critShare
ret
EndProc mft_enter
BREAK <MftClose - Close out an MFT for given SFT>
;******************* START OF SPECIFICATIONS ***********************************
;
; MFTclose
;
; MFTclose(SFT)
;
; MFTclose removes the SFT entry from the MFT structure. If this was
; the last SFT for the particular file the file's entry is also removed
; from the MFT structure. If the sharer is installed after some
; processing has been done, the MFT field of the SFTs will be 0; we must
; ignore these guys.
;
; If the sft indicates FCB, we do nothing special. The SFT behaves
; EXACTLY like a normal handle.
;
; If the sft indicates mode 70 then we do nothing special. These are
; normal HANDLES.
;
; Note that we always care about the SFT refcount. A refcount of 1
; means that the SFT is going idle and that we need to remove the sft
; from the chain.
;
; ENTRY (ES:DI) points to an SFT structure
; (DS) = (SS) = DOSData
; EXIT NONE
; USES ALL but DS, ES:DI
;
;******************* END OF SPECIFICATIONS *************************************
Procedure MFTclose,NEAR
; int 3
nop
nop
EnterCrit critShare
DOSAssume SS,<DS>,"MFTClose entry"
ASSUME ES:NOTHING
mov ax,es:[di].sf_MFT
fmt TypShare,LevShEntry,<"MFTClose by $x:$x of $x:$x ($x)\n">,<User_ID,Proc_id,ES,DI,AX>
or ax,ax
jz mcl10 ; No entry for it, ignore (carry clear)
push ds
push es
push di
;;;call CSL ; clear SFT locks ;AC008;
ASSUME DS:NOTHING
mov ax,es:[di].sf_ref_count ; (ax) = ref count
;
; We need to release information in one of two spots. First, when the SFT has
; a ref count of 0. Here, there are no more referents and, thus, no sharing
; record need be kept. Second, the ref count may be -1 indicating that the
; sft is being kept but that the sharing information is no longer needed.
; This occurs in creates of existing files, where we verify the allowed
; access, truncate the file and regain the access. If the truncation
; generates an error, we do NOT want to have the access locked down.
;
OR AX,AX
jz mcl85 ; ref count is 0 - don't dechain
inc ax ; -1 + 1 = 0. Busy sft.
jnz mcl9
mcl85:
call CSL ; clear SFT locks ;AC008;
call RSC ; remove sft from chain
jnz mcl9 ; not the last sft for this name
call RMN ; remove name record
mcl9:
pop di ; restore regs for exit
pop es
pop ds
mcl10:
LeaveCrit critShare
ret
EndProc MFTclose
BREAK <MftClU - Close out all MFTs for given UID>
;******************* START OF SPECIFICATIONS ***********************************
;
; MFTcloseU
;
; MFTcloseM(UID)
;
; MFTcloseM removes all entrys for user UID from the MFT structure. We
; walk the MFT structure closing all relevant SFT's for the user.
; We do it the dumb way, iterating closes until the SF ref count is
; 0.
;
; ENTRY User_ID = 16-bit user id of issuer
; (SS) + DOSData
; EXIT 'C' clear
; USES ALL
;
;******************* END OF SPECIFICATIONS *************************************
Procedure MFTclU,NEAR
; int 3
nop
nop
ASSUME DS:NOTHING,ES:NOTHING,SS:DOSDATA
EnterCrit critShare
mov ax,User_ID
fmt TypShare,LevShEntry,<"\nCloseUser $x\n">,<AX>
sub bx,bx ; insensitive to PID
sub dx,dx
invoke BCS ; bulk close the SFTs
LeaveCrit critShare
return
EndProc MFTclU
BREAK <MftCloseP - Close out all MFTs for given UID/PID>
;******************* START OF SPECIFICATIONS ***********************************
;
; MFTcloseP
;
; MFTcloseP(PID, UID)
;
; MFTcloseP removes all entrys for process PID on machine MID from the
; MFT structure. We walk the MFT structure closing all relevant
; SFT's. Do it the dumb way by iterating closes until the SFTs
; disappear.
;
; ENTRY (SS) = DOSDATA
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; EXIT 'C' clear
; USES ALL
;
;******************* END OF SPECIFICATIONS *************************************
Procedure MFTcloseP,NEAR
; int 3
nop
nop
ASSUME DS:NOTHING,ES:NOTHING,SS:DOSDATA
EnterCrit critShare
mov ax,User_ID
mov bx,-1
mov dx,Proc_ID
fmt TypShare,LevShEntry,<"\nClose UID/PID $x:$x\n">,<AX,DX>
call BCS ; Bulk close the SFTs
LeaveCrit critShare
ret
EndProc MFTcloseP
BREAK <MftCloN - Close file by name>
;******************* START OF SPECIFICATIONS ***********************************
;
; MFTcloseN
;
; MFTcloseN(name)
;
; MFTcloseN removes all entrys for the given file from the MFT
; structure.
;
; NOTE: this function is used infrequently and need not be fast.
; (although for typical use it's not all that slow...)
;
; ENTRY DS:SI point to dpl.
; (SS) = DOSData
; EXIT 'C' clear if no error
; 'C' set if error
; AX = error_path_not_found if not currently open
; USES ALL
;
;******************* END OF SPECIFICATIONS *************************************
Procedure MFTcloN,NEAR
; int 3
nop
nop
ASSUME SS:DOSDATA,ES:NOTHING,DS:NOTHING
EnterCrit critShare
MOV DX,[SI.DPL_DX]
MOV DS,[SI.DPL_DS]
mov si,dx ; (DS:SI) = fwa name
sub al,al ; don't create if not found
push ds
push si
call FNM ; find name in MFT
mov ax,error_path_not_found ; assume error
jc mclo9 ; not found exit
; Name was found. Lets yank the SFT entrys one at a time.
mclo1: les di,[bx].mft_sptr ; (ES:DI) = SFT address
mov WORD PTR ThisSFT,di
mov WORD PTR ThisSFT+2,es ; point to SFT
cmp es:[di].sf_ref_count,1
jnz mclo15
call CPS
mclo15:
Context DS
IF installed
MOV AX,(multDOS SHL 8) + 1
INT 2FH
ELSE
call DOS_Close
ENDIF
mclo2:
ASSUME DS:NOTHING
pop si
pop ds
push ds
push si
sub al,al ; don't create an entry
call FNM ; find the name gain
jnc mclo1 ; got still more
clc
; exit. 'C' and (ax) setup
;
; (TOS+2:TOS) = address of ASCIZ string
mclo9: pop si ; clean stack
pop ds
LeaveCrit critShare
ret
EndProc MFTcloN
BREAK <Set_Mult_Block - Try to set multiple locks>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Set_Mult_Block - Set Multiple Block Locks
;
; FUNCTION: Set_Mult_Block sets a lock on 1 or more specified ranges
; of a file. An error is returned if any lock range conflicts
; with another. Ranges of Locks are cleared via Clr_Mult_Block.
;
; In DOS 3.3 only one lock range could be set at a time using
; Set_Block. For DOS 4.00 this routine will replace Set_Block
; in the jump table and will make repeated calls to Set_Block
; in order to process 1 or more lock ranges.
;
; NOTE: - This is an all new interface to IBMDOS
;
; INPUT: (AL) = 0 - lock all
; = 80 - lock write
; (CX) = the number of lock ranges
; (DS:DX) = pointer to the range list
; (ES:DI) = SFT address
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (SS) = DOSData
;
; OUTPUT: Lock records filled in for all blocks specified
;
; REGISTERS USED: ALL but DS
; (NOT RESTORED)
;
; LINKAGE: IBMDOS Jump Table
;
; EXTERNAL Invoke: Load_Regs, Set_Block, Clr_Block
; REFERENCES:
;
; NORMAL 'C' clear if no error
; EXIT:
;
; ERROR 'C' set if error
; EXIT: (ax) = error code
; ('error_lock_violation' if conflicting locks)
;
; CHANGE 04/15/87 - First release
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Set_Mult_Block
;
; count = start_count
; search till count = 0
; invoke Load_Regs
; invoke Set_Block
; exit if error
; clear_count = start_count - current_count
; loop till clear_count = 0
; invoke Load_Regs
; invoke Clr_Block
; leave if error
; end loop
; set error status
; orelse
; endloop
; set successful status
; endsrch
; if error status
; load return code
; endif
; return
;
; END Set_Mult_Block
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure Set_Mult_Block,NEAR
; PUSH DS ;ICE
; push bx ;ICE
; push ax ;ICE
; mov bx,0140H ;ICE
; xor ax,ax ;ICE
; mov ds,ax ;ICE
; mov ax,word ptr ds:[bx] ;ICE
; mov word ptr ds:[bx],ax ;ICE
; pop ax ;ICE
; pop bx ;ICE
; POP DS ;ICE
EnterCrit critShare ; ;AN000;
ASSUME ES:NOTHING,DS:NOTHING ; ;AN000;
; set up for loop
; WE HAVE: (from IBMDOS) | WE NEED: (for Set_Block)
; (AL) = 0 - lock all | (BX) = 0 lock all operations
; = 80- lock write | = 1 lock write operations
; (CX) = the number of lock ranges | (CX:DX) = offset of area
; (DS:DX) = pointer to the range list | (SI:AX) = length of area
; (ES:DI) = SFT address | (ES:DI) = SFT address
; int 3
nop
nop
mov DS_Org,ds ;an000;save entry DS
Context DS ; ;AN000;
CMP CX,01h ;DO WE HAVE A COUNT? ;AN000;
;; $if ae ; if the count was valid ;AN000;
; $if e ; if the count was valid ;AC006;
JNE $$IF1
;; PUSH CX ; count = start_count ;AN000;
;; PUSH DX ; save pointer to range list ;AN000;
MOV BP,DX ; save current index into list ;AN000;
;; AND AX,0080H ; clear high byte and be sure low is ;AN000;
; set if applicable
;; ROL AL,1 ; move high bit to bit 0
;; MOV BX,AX ; SET UP TYPE OF LOCK ;AN000;
;; $do ; loop till count = 0 ;AN000;
;; cmp cx,00 ;an000;see if at end
;; $leave e ;an000;exit if at end
;; push cx ;an000;save cx - our counter
;; push di ;an000;save di - our SFT pointer
call load_regs ;an000;load the registers for call
; to set_block
call set_block ;an000;set the lock block
;SR;
; This routine destroys the error code returned by set_block and returns
;lock violation in case of any error. We want to preserve the error code
;returned by set_block. So, we are going to jump directly to return point
;on an error.
;
jc $$IF4
;; pop di ;an000;restore our SFT pointer
;; pop cx ;an000;restore cx - our counter
;; $leave c ;an000;on error exit loop
;; dec cx ;an000;decrease counter
;; $enddo ;an000;end loop
;; $if c ;an000;if an error occurred
;; pop dx ;an000;restore range list pointer
;; pop ax ;an000;obtain original count
;; sub ax,cx ;an000;determine how many locks set
;; mov cx,ax ;an000;set the loop counter with count
;; mov bp,dx ;an000;set bp to point to range list
;; $do ;an000;while cx not = 0
;; cmp cx,00 ;an000;at end?
;; $leave e ;an000;yes, exit
;; push cx ;an000;save cx - our counter
;; push di ;an000;save di - our SFT pointer
;; call load_regs ;an000;load the registers for call
; to clr_block
;; call clr_block ;an000;clear the locks
;; pop di ;an000;restore our SFT pointer
;; pop cx ;an000;restore cx - our counter
;; $leave c ;an000;on error exit
;; dec cx ;an000;decrease counter
;; $enddo ;an000;
;; stc ;an000;signal an error occurred
;; $else ;an000;no error occurred in locking
;; pop ax ;an000;clear off the stack
;; pop ax ;an000; to balance it
;; clc ;an000;signal no error occurred
;; $endif ;an000;
; $else ;an000;cx was 0 - this is an error
JMP SHORT $$EN1
$$IF1:
stc ;an000;signal an error occurred
; $endif ; ;an000;
$$EN1:
; $if c ; if there was an error ;AN000;
JNC $$IF4
MOV AX,error_lock_violation ; load the return code ;AN000;
; $endif ; endif there was an error ;AN000;
$$IF4:
LeaveCrit critShare ; ;AN000;
ret ; return - all set ;AN000;
EndProc Set_Mult_Block
BREAK <Load_Regs - Load Registers for ?_Block call>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Load_Regs - Load Registers for ?_Block calls
;
; FUNCTION: This subroutine loads the High and Low Offsets and the
; High and Low lengths for Lock ranges from the Range List.
;
; INPUT: (DS_Org:PB) - Range list entry to be loaded
;
; OUTPUT: (DX) - Low Offset
; (CX) - High Offset
; (AX) - Low Length
; (SI) - High Length
;
; REGISTERS USED: AX CX DX BP SI
; (NOT RESTORED)
;
; LINKAGE: Called by: Set_Mult_Block, Clr_Mult_Block
;
; EXTERNAL none
; REFERENCES:
;
; NORMAL none
; EXIT:
;
; ERROR none
; EXIT:
;
; CHANGE 04/15/87 - first release
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Load_Regs
;
; recover index into range list
; advance pointer to next entry
; load DX - Low Offset
; load CX - High Offset
; load AX - Low Length
; load SI - High Length
; return
;
; END Load_Regs
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure Load_Regs,NEAR
push ds ; save our DS ;an000;
mov ds,DS_Org ; get range list segment ;an000;
mov si,bp ; recover pointer ;AN000;
ADD BP,08h ; move to next entry in list ;AN000;
MOV DX,[SI] ; low position ;AN000;
MOV CX,[SI+2] ; high position ;AN000;
MOV AX,[SI+4] ; low length ;AN000;
MOV SI,[SI+6] ; high length ;AN000;
pop ds ; restore DS ;an000;
ret ; ;AN000;
EndProc Load_Regs
BREAK <Clr_Mult_Block - Try to clear multiple locks>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Clr_Mult_Block - Clear Multiple Block Locks
;
; FUNCTION: Clr_Mult_Block removes the locks on 1 or more specified
; ranges of a file. An error is returned if any lock range
; does not exactly match. Ranges of Locks are set via
; Set_Mult_Block.
;
; In DOS 3.3 only one lock range could be cleared at a time
; using Clr_Block. For DOS 4.00 this routine will replace
; Clr_Block in the jump table and will make repeated calls
; to Set_Block in order to process 1 or more lock ranges.
;
; NOTE: - This is an all new interface to IBMDOS
; - an unlock all 'lock all' request will unlock both
; 'lock all' and 'lock write'.
; - an unlock all 'lock write' request will not unlock
; 'lock all's. It will only unlock 'lock write's.
; (if you can understand the above statement,
; understanding the code will be easy!)
;
; INPUT: (AL) = 0 - lock all
; = 80- lock write
; (CX) = the number of lock ranges - NB: all if -1 ***
; (DS:DX) = pointer to the range list
; (ES:DI) = SFT address
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (SS) = DOSData
;
; OUTPUT: Lock records filled in for all blocks specified
;
; REGISTERS USED: ALL but DS
; (NOT RESTORED)
;
; LINKAGE: IBMDOS Jump Table
;
; EXTERNAL Invoke: Load_Regs, Set_Block, Clr_Block, Clr_List
; REFERENCES:
;
; NORMAL 'C' clear if no error
; EXIT:
;
; ERROR 'C' set if error
; EXIT: (ax) = error code
; ('error_lock_violation' if conflicting locks)
;
; CHANGE 04/15/87 - First release
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Clr_Mult_Block
;
; if count is valid and
; if file (SFT) is 'shared' then
; if count = all
; find first RLR
; loop till all RLR cleared
; if PROC_ID matches and
; if UID matches and
; if SFT matches then
; if ulocking lock_all or
; if this RLR is lock_write
; clear the lock
; endif
; endif
; find next RLR
; end loop
; else
; invoke Clr_List
; endif
; set successful status
; else
; set error status
; endif
; if error
; load return code
; endif
;
; ret
;
; END Clr_Mult_Block
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure clr_mult_block,NEAR
lock_all equ 0h
; PUSH DS ;ICE
; push bx ;ICE
; push ax ;ICE
; mov bx,0140H ;ICE
; xor ax,ax ;ICE
; mov ds,ax ;ICE
; mov ax,word ptr ds:[bx] ;ICE
; mov word ptr ds:[bx],ax ;ICE
; pop ax ;ICE
; pop bx ;ICE
; POP DS ;ICE
EnterCrit critShare ; ;AN000;
ASSUME ES:NOTHING,DS:NOTHING ; ;AN000;
; int 3
nop
nop
mov DS_Org,DS ;an000;save entry DS
Context DS ; ;AN000;
CMP CX,01h ; do we have a count? ;AN000;
;; $IF AE,AND ; IF A VALID COUNT
; $IF E,AND ; IF A VALID COUNT ;AC006;
JNE $$IF6
cmp es:[di].sf_mft,0 ; is this SFT shared? ;AN000;
; $IF NE ; AND IF FILE IS 'SHARED' THEN
JE $$IF6
; WE HAVE: (from IBMDOS) | WE NEED:
; (AL) = 0 - lock all | (AX) = 0 lock all operations
; = 80- lock write | = 1 lock write operations
; (CX) = - 1 (unlock all locks) | (DS) = CS
; | (DS:DI) = previous RLR
; | (DS:SI) = current RLR
; (ES:DI) = current SFT |
;; and ax,0080h ;be sure it is set right (mask 80 bit) ;AC002;
; existing interface
;; rol al,1 ;put high bit in bit 0 ;AC002;
;; CMP CX,-1h ; ;AN000;
;; $IF E ; IF unlock all locks then ;AN000;
;; push cs ; ;AN000;
;; pop ds ; ;AN000;
;; mov cx,di ; ES:CX is the SFT ;AN004;
; ASSUME ds:nothing
;; mov si,es:[di].sf_mft ; DS:SI points to MFT ;AN000;
;; lea di,[si].mft_lptr ; DS:DI = addr of ptr to lock record ;AN000;
;; mov si,[di] ; DS:SI = address of 1st lock record ;AN000;
;; $DO ; loop through the RLR's ;AN000;
; DS:DI = points to previous RLR or MFT if no RLR.
; DS:SI = points to current RLR
; ES:CX = SFT address
; AX = lock type
;; and si,si ; are we at the end of the chain? ;AN000;
;; $LEAVE Z ; we'er done with CF = 0 ;AN000;
;; mov bp,[si].rlr_pid ; get PROC_ID ;AN000;
;; cmp bp,PROC_ID ; is it ours? ;AN000;
;; $IF E,AND ; ;AN000;
;; mov bp,es ; ;AN000;
;; cmp bp,WORD PTR [si].rlr_sptr+2 ; ;AC004;
;; $IF E,AND ; ;AN000;
;; cmp cx,WORD PTR [si].rlr_sptr ; ;AC004;
;; mov si,[di] ; restore pointer to current (using ;AN000;
; previous)
;; $IF E ; if it is ours ;AN000;
; this is it. its OURS !
;; cmp ax,lock_all ; ;AN000;
;; $IF E,OR ; if unlocking all or ;AN000;
;; mov bp,[si].rlr_type ; get lock type ;AN000;
;; cmp bp,rlr_lall ; is it lock all? ;AN000;
;; $IF NE ; if not a LOCK ALL lock ;AN000;
; remove the RLR from the chain
;; mov bx,[si].rlr_next ; get the pointer to the next RLR ;AN000;
;; mov [di],bx ; install it in the last ;AN000;
; put defunct lock record on the free chain
;; mov bx,Frelock ; ;AN000;
;; mov [si].rlr_next,bx ; ;AN000;
;; mov Frelock,si ; ;AN000;
;; mov si,di ; back up to last ;AN000;
;; $ENDIF ; should we unlock it ;AN000;
;; $ENDIF ; it was ours! ;AN000;
; advance to next RLR
;; mov di,si ; load address of next RLR ;AN000;
;; mov si,[di] ; update pointer to next RLR ;AN000;
;; $ENDDO ; loop back to the start ;AN000;
;; $ELSE ; else, its a LIST ! ;AN000;
; set up for loop
; WE HAVE: (from IBMDOS) | WE NEED: (for Clr_Block)
; (AX) = 0 - lock all | (BX) = 0 lock all operations
; = 1 - lock write | = 1 lock write operations
; (CX) = the number of lock ranges | (CX:DX) = offset of area
; (DS:DX) = pointer to the range list | (SI:AX) = length of area
; (ES:DI) = SFT address | (ES:DI) = SFT address
;; PUSH CX ; count = start_count ;AN000;
;; PUSH DX ; save pointer to range list ;AN000;
MOV BP,DX ; save current index into list ;AN000;
;; MOV BX,AX ; SET UP TYPE OF LOCK ;AN000;
call Clr_List ; call Clr_List to process the list ;AN000;
;; $ENDIF ; ;AN000;
; $ELSE ; NOT VALID
JMP SHORT $$EN6
$$IF6:
STC ; ;AN000;
; $ENDIF ; VALID/INVALID ;AN000;
$$EN6:
; $IF C ; if carry is set ;AN000;
JNC $$IF9
MOV AX,error_lock_violation ; load error condition ;AN000;
; $ENDIF ; carry not set ;AN000;
$$IF9:
LeaveCrit critShare ; ;AN000;
ret ; return - all set ;AN000;
EndProc clr_mult_block
BREAK <Clr_List - Clear a list of user specified locks>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Clr_List - Clear a list of user specified locks
;
; FUNCTION: Clr_List makes multiple calls to Clr_Block to clear
; multiple lock ranges of a file. An error is returned
; if any lock range does not exactly match. Ranges of
; Locks are then set via Set_Mult_Block.
;
;
; INPUT: (BX) = 0 lock all operations
; = 1 lock write operations
; (CX:DX) = offset of area
; (SI:AX) = length of area
; (ES:DI) = SFT address
; (SS:SP+2)= original index \ see FRAME struc
; (SS:SP+4)= original count /
;
; OUTPUT: Lock records removed for all blocks specified
; Stack cleard on return
;
; REGISTERS USED: ALL but DS
; (NOT RESTORED)
;
; LINKAGE: IBMDOS Jump Table
;
; EXTERNAL Invoke: Load_Regs, Set_Block, Clr_Block
; REFERENCES:
;
; NORMAL 'C' clear if no error
; EXIT:
;
; ERROR 'C' set if error
; EXIT: (ax) = error code
; ('error_lock_violation' if conflicting locks)
;
; CHANGE 04/15/87 - First release
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Clr_List
;
; search till count = 0
; set up for call
; call clr_Block
; exit if c
; clear_count = start_count - current_count
; loop till clear_count = 0
; set up for call
; call Set_Block
; end loop
; set error status
; orelse
; endloop
; set successful status
; endsrch
; return
;
; END Clr_List
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure Clr_List,NEAR
;; $do ;an000;while cx not = 0
;; cmp cx,00 ;an000;at end?
;; $leave e ;an000;yes
;; push cx ;an000;save cx - our counter
;; push di ;an000;save di - our SFT pointer
call load_regs ;an000;set up for clr_block call
;; push bp ; save pointer to range entry ;AN000;
call clr_block ;an000;remove the lock
;; pop bp ; recover pointer to range entry ;AN000;
;; pop di ;an000;restore our SFT pointer
;; pop cx ;an000;restore cx - our counter
;; $leave c ;an000;leave on error
;; dec cx ;an000;decrease counter
;; $enddo ;an000;
;; $if c ;an000;an error occurred
;; push bp ;an000;save bp
;; mov bp,sp ;an000;get sp
;; mov dx,[bp].parm_1 ;an000;recover original index
;; mov ax,[bp].Parm_2 ; original count ;AN000;
;; pop bp
;; SUB AX,CX ; how many did we do? ;AN000;
;; MOV CX,AX ; set up the loop ;AN000;
;; MOV BP,DX ; save the index ;AN000;
;; $DO ; ;AN000;
;; cmp cx,00 ;an000;at end?
;; $leave e ;an000;yes
;; push cx ;an000;save cx - our counter
;; push di ;an000;save di - our SFT pointer
;; call load_regs ;an000;set up for set_block call
;; call set_block ;an000;reset the locks
;; pop di ;an000;restore our SFT pointer
;; pop cx ;an000;restore cx - our counter
;; $leave c ;an000;leave on error
;; dec cx ;an000;decrease counter
;; $enddo ;an000;
;; stc ;an000;signal an error
;; $else ;an000;
;; clc ;an000;signal no error
;; $endif ;an000;
;; ret 4 ; return (clear Parm_1 & Parm_2) ;AN000;
ret ; return (clear Parm_1 & Parm_2) ;AC006;
EndProc Clr_List
BREAK <Set_Block - Try to set a lock>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Set_Block - set byte range lock on a file
;
; FUNCTION: Set_Block sets a lock on a specified range of a file. An
; error is returned if the lock conflicts with another.
; Locks are cleared via clr_block.
;
; INPUT: (ES:DI) = SFT address
; (CX:DX) = offset of area
; (SI:AX) = length of area
; (BX) = 0 lock all operations
; = 1 lock write operations
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (SS) = DOSData
;
; OUTPUT: Lock records removed for all blocks specified
;
; REGISTERS USED: ALL but DS, BP
; (NOT RESTORED)
;
; LINKAGE: Invoked by: Set_Mult_Block
;
; EXTERNAL Invoke: CLP (SLE), OFL
; REFERENCES:
;
; NORMAL 'C' clear if no error
; EXIT:
;
; ERROR 'C' set if error
; EXIT:
;
; CHANGE 04/15/87 - lock only write support
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Set_Block
;
; if a valid SFT and
; invoke CLP
; if no lock conflicts and
; invoke OFL
; if empty lock record available
; store SFT pointer
; store lock range
; add RLR to the chain
; store PROC_ID
; store rlr_type
; set successful return status
; else
; set error return status
; endif
; return
;
; END Set_Block
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure Set_Block,NEAR
ASSUME ES:NOTHING,DS:NOTHING
Context DS
push bp ; preserve (bp) ;AN000;
push ds ; preserve (ds)
;; push bx ; preserve (bx) ;AN000;
cmp es:[di].sf_mft,ZERO
; $if nz,and ; if file is SHARED and ;AC000;
JZ $$IF11
push di
call clp ; do common setup code
ASSUME DS:NOTHING
pop bp
; $if nc,and ; if no (lock conflict) error and ;AC000;
JC $$IF11
; Its ok to set this lock. Get a free block and fill it in
; (es:bp) = sft
; (ds:si) = pointer to name record
; (ax:bx) = fba lock area
; (cx:dx) = lba lock area
; (ds:di) = pointer to pointer to previous lock
; (TOS) = saved (bx)
; (TOS+1) = saved (ds)
; (TOS+2) = saved (bp)
call OFL ; (ds:di) = pointer to new, orphan lock record
; $if nc ; if space available ;AC000;
;SR;
; We have to return out_of_buffer error code in case no more locks can be
;allocated. The old code was returning a lock violation for this case also.
;
JC out_of_space
mov WORD PTR [di].rlr_sptr,bp ; store SFT offset
mov WORD PTR [di].rlr_sptr+2,es ; store SFT offset
mov [di].rlr_fba+2,ax
mov [di].rlr_fba,bx ; store lock range
mov [di].rlr_lba+2,cx
mov [di].rlr_lba,dx
; add to front of chain
;
; (ds:si) = fwa MFT name record
mov ax,[si].mft_lptr
mov [di].rlr_next,ax
mov [si].mft_lptr,di
;
; Set process ID of lock
;
mov ax,proc_id
mov [di].rlr_pid,ax
;
;; pop bx ; recover lock type ;AN000;
;; push bx ; restore the stack ;AN000;
;; mov [di].rlr_type,bx ; set the rlr_type field ;AN000;
clc ; we finished OK
; $else ; ;AC000;
JMP SHORT $$EN11
;SR;
;We have to return a separate error code if we run out of space for locks
;
out_of_space:
mov ax,error_sharing_buffer_exceeded
jmp short $$EN11
$$IF11:
mov ax,error_lock_violation
stc
; $endif ; ;AC000;
$$EN11:
;; pop bx ; ;AN000;
pop ds
pop bp ; ;AC000;
ret ; return - all set
EndProc Set_Block
BREAK <Clr_Block - Try to clear a lock>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Clr_Block - clear byte range lock on a file
;
; FUNCTION: Clr_Block clears a lock on a specified range of a file.
; Locks are set via set_block.
;
; INPUT: (ES:DI) = SFT address
; (CX:DX) = offset of area
; (SI:AX) = length of area
; (BX) = 0 lock all operations
; = 1 lock write operations
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (SS) = DOSData
;
; OUTPUT: Lock record removed for block specified.
;
; REGISTERS USED: ALL but DS
; (NOT RESTORED)
;
; LINKAGE: Invoked by: Clr_Mult_Block
;
; EXTERNAL Invoke: CLP (SLE), OFL
; REFERENCES:
;
; NORMAL 'C' clear if no error
; EXIT:
;
; ERROR 'C' set if error
; EXIT: (ax) = error code
; ('error_lock_violation' if conflicting locks or
; range does not exactly match previous lock)
;
; CHANGE 04/15/87 - lock only write support
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Clr_Block
;
; if file is SHARED and
; if lock is valid and
; if SFT matches and
; if PROC_ID matches
; if lock_reqest = lock_type
; unchain the lock
; put defunct lock on free chain
; clear error status
; else
; set error status
; endif
; else
; flush the stack
; set error status
; endif
; if error
; load return code
; endif
; return
;
; END Clr_Block
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure Clr_Block,NEAR
ASSUME ES:NOTHING,DS:NOTHING
Context DS
push ds
;; push bx ; save type of operation ;AN000;
cmp es:[di].sf_mft,ZERO
; $if nz,and ; if file is SHARED and ;AC000;
JZ $$IF14
push di
call clp ; do common setup code
ASSUME DS:NOTHING
pop bp ; ES:BP points to sft.
;; pop bx ; recover the type of operation ;AN000;
; $if c,and ; if lock exists and ;AC000;
JNC $$IF14
; $if z,and ; if range given correctly and ;AC000;
JNZ $$IF14
;
; We've got the lock
;
; (ds:di) = address of pointer (offset) to previous lock record
; (es:BP) = sft address
;
; Now comes the tricky part. Is the lock for us? Does the lock match the SFT
; that was given us? If not, then error.
;
mov si,[di] ; (DS:SI) = address of lock record
cmp word ptr [si].rlr_sptr,bp
; $if z,and ; if SFT matches and ;AC000;
JNZ $$IF14
mov bp,es
cmp word ptr [si].rlr_sptr+2,bp
; $if z,and ; (check both words of SFT pointer) ;AC000;
JNZ $$IF14
mov bp,proc_id
cmp [si].rlr_pid,bp
;; $if z,and ; if PROC_ID matches ;AC000;
; $if z ; if PROC_ID matches ;AC006;
JNZ $$IF14
;
; Make sure that the type of request and the lock type match
;
;; cmp bx,lock_all ; ;AN000;
;; $IF E,OR ; if unlocking all or ;AN000;
;; mov bp,[si].rlr_type ; get lock type ;AN000;
;; cmp bp,rlr_lall ; is it lock all? ;AN000;
;; $IF NE ; if not a LOCK ALL lock ;AN000;
;
; The locks match the proper open invocation. Unchain the lock
;
mov ax,[si].rlr_next
mov [di],ax ; chain it out
; put defunct lock record on the free chain
;
; (ds:si) = address of freed lock rec
mov ax,Frelock
mov [si].rlr_next,ax
mov Frelock,si
clc
; $else ; we have an error ;AC000;
JMP SHORT $$EN14
$$IF14:
stc
; $endif ; Endif - an error ;AC000;
$$EN14:
; $if c ; If an error was found ;AC000;
JNC $$IF17
mov ax,error_lock_violation
; $endif ; Endif - an error was found ;AC000;
$$IF17:
pop ds ; restore DS
ret
EndProc Clr_Block
BREAK <CLP - Common Lock Preamble>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: CLP - Common Lock Preamble
;
; FUNCTION: This routine contains a common code fragment for set_block
; and clr_block.
;
; INPUT: (ES:DI) = SFT address
; (CX:DX) = offset of area
; (SI:AX) = length of area
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (SS) = (DS) = DOSData
;
; OUTPUT: (ds:si) = MFT address
;
; REGISTERS USED: ALL but ES
; (NOT RESTORED)
;
; LINKAGE: Invoked by: Set_Block, Clr_Block
;
; EXTERNAL Invoke: SLE
; REFERENCES:
;
; NORMAL 'C' clear if no overlap
; EXIT: (ax:bx) = offset of first byte in range
; (cx:dx) = offset of last byte in range
;
; ERROR 'C' set if overlap
; EXIT: 'Z' set if 1-to-1 match
; (di) points to previous lock
;
; CHANGE 04/15/87 - lock only write support
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START CLP
;
; shuffle arguments
; if valid length
; invoke SLE
; set successful return status
; else
; set error return status
; endif
; return
;
; END CLP
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure CLP,NEAR
mov bx,dx ; shuffle arguments
xchg dx,ax
xchg ax,cx ; (ax:bx) = offset
mov cx,si ; (cx:dx) = length
or si,dx ; see if length is 0
; $if nz,and ; if length is > 0 and ;AC000;
JZ $$IF19
add dx,bx
adc cx,ax ; (cx:dx) = lba+1
; $if nc,or ; no carry is ok ;AC000;
JNC $$LL19
mov si,dx
or si,cx
; $if z ; if !> 0 then ;AC000;
JNZ $$IF19
$$LL19:
sub dx,1 ; (cx:dx) = lba of locked region
sbb cx,0
push cs
pop ds
; (es:di) is sft
push si
mov si,es:[di].sf_mft
push si
mov di,1 ; Find own locks
call SLE
; di points to previous lock record
pop si
pop bp
; $else ; we have an error ;AC000;
JMP SHORT $$EN19
$$IF19:
xor si,si
inc si ; carry unchanged, zero reset
mov ax,error_lock_violation ; assume error
stc
; $endif ; endif - we have an error ;AC000;
$$EN19:
ret
EndProc CLP
BREAK <Chk_Block - See if the specified I/O violates locks>
;******************* START OF SPECIFICATIONS ***********************************
;
; NAME: Chk_Block - check range lock on a file
;
; FUNCTION: Chk_Block is called to interogate the lock status of a
; region of a file.
;
; NOTE: This routine is called for every disk I/O operation
; and MUST BE FAST
;
; INPUT: (ES:DI) points to an SFT structure
; (AL) = 80h - Write operation = 0 - any non write operation
; (CX) is the number of bytes being read or written
; BytPos is a long (low first) offset into the file
; of the I/O
; User_ID = 16-bit user id of issuer
; Proc_ID = 16-bit process id of issuer
; (SS) = DOSData
;
; OUTPUT: CF set according to status and presence of locks (see below)
;
; REGISTERS USED: ALL but ES,DI,CX,DS
; (NOT RESTORED)
;
; LINKAGE: IBMDOS Jump Table
;
; NORMAL 'C' clear if no error
; EXIT:
;
; ERROR 'C' set if error
; EXIT: (ax) = error code
; ('error_lock_violation' if conflicting locks)
;
; CHANGE 04/15/87 - lock only write support
; LOG:
;
;******************* END OF SPECIFICATIONS *************************************
;******************+ START OF PSEUDOCODE +**************************************
;
; START Chk_Block
;
; if shared SFT and
; if locks exist
; invoke SLE
; if lock conflicts occur (error)
; if this is !write operation and
; if a write lock found
; set successfull status
; else
; set error status
; endif
; else no error
; flush stack
; endif
; endif
;
; ret
;
; END Chk_Block
;
;******************+ END OF PSEUDOCODE +**************************************
Procedure Chk_Block,NEAR
ASSUME DS:NOTHING,ES:NOTHING,SS:DOSDATA
write_op equ 080h ; write operation requested ;AN000;
lock_all equ 0h ; lock all specified ;AN000;
; PUSH DS ;ICE
; push bx ;ICE
; push ax ;ICE
; mov bx,0140H ;ICE
; xor ax,ax ;ICE
; mov ds,ax ;ICE
; mov ax,word ptr ds:[bx] ;ICE
; mov word ptr ds:[bx],ax ;ICE
; pop ax ;ICE
; pop bx ;ICE
; POP DS ;ICE
EnterCrit critShare
; int 3
nop
nop
PUSH ES
PUSH DI
PUSH CX
PUSH DS
cmp es:[di].sf_mft,0
; $if nz,and ; if the file is SHARED and ;AC000;
JZ $$IF22
push cs
pop ds
mov si,es:[di].sf_MFT ; (DS:SI) = address of MFT record
test [si].mft_lptr,-1
; $if nz,and ; if there are locks on this file and ;AC000;
JZ $$IF22
sub cx,1 ; (cx) = count-1
cmc
; $if c ; there are bytes to lock ;AC000;
JNC $$IF22
;; push ax ; preserve type of operation ;AN000;
; DOS passes AL = 80 for writes
; = 00 for reads
mov ax,WORD PTR BytPos+2
mov bx,WORD PTR BytPos ; (ax:bx) = offset
mov dx,cx
sub cx,cx
add dx,bx
adc cx,ax ; (cx:dx) = lba of lock area
sub di,di ; ignore own locks
call SLE
;; pop ax ; recover type of opperation ;AN000;
; upon return DS:SI points to the RLR with the conflict
;; $if c ; if lock conflicts occur - error ;AC000;
; now we must check what type of lock exists
; and the type of operation in progress.
;; cmp al,write_op ; ;AN000;
;; $if ne,and ; if NOT a write operation and ;AN000;
;; cmp [si].rlr_type,rlr_lwr ; ;AN000;
;; $if e ; if write locked (NOT all locked) ;AN000;
;; clc ; then not true conflict - clear error ;AN000;
;; $else ; else it IS a valid conflict ;AC000;
;; stc ; true error - set error status
;; $endif ; endif - a valid conflict ;AC000;
;; $endif ; endif - conflicts ;AC000;
mov ax,error_lock_violation ; assume error
; $endif ; endif - no need to check ;AC000;
$$IF22:
; exit
;
; 'C' and (ax) setup
POP DS
POP CX
POP DI
POP ES
LeaveCrit critShare
ret ; exit
EndProc Chk_Block
BREAK <MFT_get - get an entry from the MFT>
;******************* START OF SPECIFICATIONS ***********************************
;
; MFT_get - get an entry from the MFT
;
; MFT_get is used to return information from the MFT. System utilities
; use this capability to produce status displays.
;
; MFT_get first locates the (BX)'th file in the list (no particular
; ordering is promised). It returns that name and the UID of
; the (CX)'th SFT on that file and the number of locks on that
; file via that SFT.
;
; ENTRY DS:SI point to DPL which contains:
; (dBX) = zero-based file index
; (dCX) = zero-based SFT index
; (SS) = DOSData
; EXIT 'C' clear if no error
; ES:DI buffer is filled in with BX'th file name
; (BX) = user id of SFT
; (CX) = # of locks via SFT
; 'C' set if error
; (ax) = error code
; ('error_no_more_files' if either index is out
; of range)
;
;******************* END OF SPECIFICATIONS *************************************
Procedure MFT_get,NEAR
; int 3
nop
nop
ASSUME DS:NOTHING,ES:NOTHING
EnterCrit critShare
MOV BX,[SI.DPL_BX]
MOV CX,[SI.DPL_CX]
Context ES
MOV DI,OFFSET DOSDATA:OpenBuf
xchg bx,cx ; (cx) = file index
push cs
pop ds
Off SI,mft ; (ds:si) = fwa of OFFSET MFT
; scan forward until next name
mget1: cmp [si].mft_flag,MFLG_FRE
jz mget3 ; is free space
jl mget7 ; is END
; have another name. see if this satisfies caller
jcxz mget4 ; caller is happy
dec cx
mget3: add si,[si].mft_len ; skip name record
JMP SHORT mget1
; we've located the file name.
;
; (bx) = SFT index
; (DS:SI) = MFT entry
; (ES:DI) = address of caller's buffer
mget4: push di
push si ; save table offset
add si,mft_name
mget5: lodsb
stosb ; copy name into caller's buffer
or al,al
jnz mget5
pop si ; (DS:SI) = name record address
xchg bx,cx ; (cx) = SFT chain count
lds di,[si].mft_sptr
mget6: jcxz mget8 ; have reached the SFT we wanted
dec cx
lds di,[di].sf_chain ; get next link
or di,di
jnz mget6 ; follow chain some more
pop di ; (es:di) = buffer address
;** The file or SFT index was too large - return w/ error
mget7: mov ax,error_no_more_files
stc
LeaveCrit critShare
ret
;** We've got the SFT he wants. Lets count the locks
;
; (es:TOS) = buffer address
; (DS:DI) = address of SFT
; (si) = address of mft
mget8: mov ax,[DI].sf_flags
mov dx,ds ; save segment
push cs
pop ds
mov si,[si].mft_lptr ; (DS:SI) = Lock record address
sub cx,cx ; clear counter
mget9: or si,si
jz mget11 ; no more
cmp di,WORD PTR [si].rlr_sptr
jnz mget10
cmp dx,word PTR [si].rlr_sptr+2
jnz mget10
inc cx
mget10: mov si,[si].rlr_next
JMP SHORT mget9
; Done counting locks. return the info
;
; (cx) = count of locks
; (es:TOS) = buffer address
mget11: mov ds,dx
mov bx,[di].SF_UID ; (bx) = UID
pop di
clc
LeaveCrit critShare
ret
EndProc MFT_get
BREAK <ASC - Add SFT to Chain>
;******************* START OF SPECIFICATIONS ***********************************
;
; ASC - Add SFT to Chain
;
; ASC is called to add an SFT to the front of the chain.
;
; ASC checks the file share mode bits on the other SFTs in the chain and
; reports a conflict. The new SFT is NOT ADDED in the case of
; conflicts.
;
; ENTRY (BX) = FBA MFT name record
; (DS:SI) = SFT address
; EXIT 'C' clear if added
; (ds:si) point to sft
; (bx) offset of mft
; 'C' set if conflict
; (ax) = error code
; USES ALL
;
;******************* END OF SPECIFICATIONS *************************************
Procedure ASC,NEAR
cmp [si].sf_MFT,0
jnz asc9 ; already on chain - internal error
; The SFT looks good... lets see if there are any use conflicts
; Message 1,<"Adding sft ">
mov ax,User_ID ; place user information in SFT
mov [si].sf_UID,ax ; do it before CUC (he checks UID)
mov ax,Proc_ID
mov [si].sf_PID,ax
call CUC ; check use conflicts
jc asc8 ; use conflicts - forget it
; MessageNum AX
; MessageNum AX
; Message 1,<" to ">
; MEssageNum DS
; Message 1,<":">
; MessageNum SI
; Message 1,<" ">
mov [si].sf_MFT,bx ; make SFT point to MFT
; MessageNum [si].sf_mft
; Message 1,<13,10>
mov cx,[si].sf_mode ; (cx) = open mode
mov dx,ds ; (dx:si) = SFT address
push cs
pop ds ; (ds:bx) = MFT address
;
; Not special file and no previous sft found OR normal SFT. We link it in
; at the head of the list.
;
; (dx:si) point to sft
; (ds:bx) point to mft
;
les di,[bx].mft_sptr ; get first link
;M003;
; If the SFT to be inserted is the same as the current one, do not link it in
;
mov ax,es ;M003
cmp si,di ;Offsets same? ;M003
jne asc_ins ;No, link in ;M003
cmp ax,dx ;Segments same? ;M003
je asc75 ;Yes, do not insert ;M003
asc_ins:
mov word ptr [bx].mft_sptr,si ; link in this sft
mov word ptr [bx].mft_sptr+2,dx ; link in this sft
mov ds,dx
mov word ptr [si].sf_chain,di
mov word ptr [si].sf_chain+2,es
asc75: mov ds,dx ; point back to sft
clc
asc8: ret
; the SFT is already in use... internal error
asc9: push ax
off ax,AscErr
call INTERR ; NEVER RETURNS
EndProc ASC
BREAK <BCS - Bulk Close of SFTs>
;******************* START OF SPECIFICATIONS ***********************************
;
; BCS - Bulk Close of SFTs
;
; BCS scans the MFT structures looking for SFTs that match a UID (and
; perhaps a PID). The SFTs are closed. The MFT name record is removed
; if all its SFTs are closed.
;
; BCS is called with a PID and a PID MASK. The SFT is closed if its UID
; matches the supplied UID AND (PID_ & PIDMASK) == PID_supplied
;
; We walk the MFT structure closing all relevant SFT's. There is no
; need for special handling of 70 handles or FCBs.
;
; Note that we call DOS_close to close the SFT; DOS_close in turn calls
; mftclose which may remove the SFT and even the MFT. This means that
; the MFT may vanish as we are working on it. Whenever we call
; DOS_close we'll know the next SFT and, if there is no next SFT we'll
; know the next MFT. (If the MFT were released a pointer to the carcass
; is not of any help. An MFT carcass cannot help find the next MFT
; record)
;
; ENTRY (AX) = UID to match
; (BX) = PID mask
; (DX) = PID value
; EXIT 'C' clear
; USES ALL
;
;******************* END OF SPECIFICATIONS *************************************
ASSUME SS:DOSDATA
Procedure BCS,NEAR
push cs
pop ds
Off SI,mft ; start at beginning of buffer
; scan forward to the nearest name record (we may be at it now)
;
; (DS:SI) = record pointer
bcs1: cmp [si].mft_flag,MFLG_FRE
jl bcs16 ; at end of names, all done
jg bcs2 ; have a name record
bcs1$5: add si,[si].mft_len ; skip record and loop
jmp bcs1
bcs16: jmp short bcs9
bcs2: les di,[si].mft_sptr ; got name record - get first SFT
; run down SFT chain
;
; (es:di) = FBA next SFT
; (ds:si) = FBA name record
; (ax) = UID to match
; (bx) = PID mask
; (dx) = PID value
bcs3: or di,di
jz bcs1$5 ; at end of SFT chain
cmp ax,es:[di].sf_UID
jnz bcs4 ; not a match
mov cx,es:[di].sf_PID
and cx,bx ; apply mask
cmp cx,dx
jz bcs51 ; got a match
bcs4:
les di,es:[di].sf_chain
JMP bcs3 ; chain to next SFT
; We have an SFT to close
;
; (es:di) = FBA SFT to be closed
;
; (ds:si) = FBA name record
; (ax) = UID to match
; (bx) = PID mask
; (dx) = PID value
bcs51: mov es:[di].sf_ref_count,1
push ax
push bx
push dx ; save ID values (ax,bx,dx) and mask
push ds
push si ; save name record address (ds:si)
mov si,word ptr es:[di].sf_chain
or si,si
jnz bcs7 ; isnt last sft, MFT will remain
; yup, this is the last sft for this MFT, the MFT may evaporate. we have
; to find the next one NOW, and remember it
pop si ; undo saved name record address
pop ds
bcs6: add si,[si].mft_len ; go to next guy
cmp [si].mft_flag,MFLG_FRE
jz bcs6 ; must be a non-free guy
push ds
push si ; resave our new next MFT
sub si,si ; no next sft
; Allright, we're ready to call the DOS.
;
; (es:di) = FBA sft to be closed
; ((sp)) = long address of current or next MFT
; ((sp)+4) = PID value
; ((sp)+6) = PID mask
; ((sp)+8) = UID value
bcs7: mov WORD PTR ThisSFT,di
mov WORD PTR ThisSFT+2,es
mov es,word ptr es:[di].sf_chain+2
SaveReg <es,si>
call CPS ; clear JFN
Context DS
CallInstall DOS_Close,multDos,1
ASSUME DS:NOTHING
RestoreReg <di,es> ; (es:DI) = offset of next sft
pop si
pop ds ; (DS:SI) = fwa of current or next MFT
pop dx
pop bx
pop ax
or di,di
jnz bcs85 ; have more sft's
JMP bcs1 ; look at this new MFT
bcs85: jmp bcs3
; All Done
bcs9: clc
ret
EndProc BCS
BREAK <CSL - Clear SFT Locks>
;******************* START OF SPECIFICATIONS ***********************************
;
; CSL - Clear SFT Locks
;
; CSL clears any locks associated with this SFT.
;
; ENTRY (ES:DI) = SFT address
; EXIT (ES:DI) unchanged
; USES All but ES,DI
;
;******************* END OF SPECIFICATIONS *************************************
Procedure CSL,NEAR
mov si,es:[di].sf_MFT
push cs
pop ds
lea bx,[si].mft_lptr ; (DS:BX) = addr of lock ptr
mov si,[bx] ; (DS:SI) = fba first lock record
; scan the locks looking for belongers.
;
; (es:di) = SFT address
; (ds:si) = this lock address
; (ds:bx) = address of link (offset value) to this lock (prev lock)
csl1: or si,si
jz csl3 ; done with lock list
cmp di,word ptr [si].rlr_sptr
jnz csl2 ; not my lock
mov ax,es
cmp ax,word ptr [si].rlr_sptr+2
jnz csl2 ; not my lock
;
; Make sure that the lock REALLY belongs to the correct process
;
cmp user_in_ax, (ServerCall shl 8) + 4 ; only check if ; @@01
jnz csl15 ; process specific; @@01
mov ax,Proc_ID
cmp ax,[si].rlr_pid ; is process ID of lock = this PID?
jnz csl2 ; nope, skip this lock
; got a lock to remove
csl15:
mov dx,[si].rlr_next
mov [bx],dx ; link him out
mov ax,Frelock
mov [si].rlr_next,ax
mov Frelock,si
mov si,dx ; (DS:SI) = next lock address
JMP SHORT csl1
ERRNZ rlr_next ; lock is not ours... follow chain
csl2: mov bx,si
mov si,[si].rlr_next
JMP SHORT csl1
; All done
csl3: ret
EndProc CSL
ASSUME DS:NOTHING
BREAK <CUC - check usage conflicts>
;******************* START OF SPECIFICATIONS ***********************************
;
; Use conflict table
;
; Algorithm:
;
; if ((newmode == COMPAT) or (oldmode == COMPAT))
; and (user ID's match)
; then accept
; else
; for new and old mode, compute index of (SH*3)+ACC
; shift right table[new_index] by old_index+2;
; 'C' set if FAIL
;
; The bit in the old_index position indicates the success or failure. 0
; => allow access, 1 => fail access
;
;******************* END OF SPECIFICATIONS *************************************
PUBLIC CUCA
CUCA: DW 0ffffh ; Compat Read
DW 0ffffh ; Compat Write
DW 0ffffh ; Compat Read/Write
DW 0ffffh ; Deny R/W Read
DW 0ffffh ; Deny R/W Write
DW 0ffffh ; Deny R/W Read/Write
DW 0df7fh ; Deny W Read
DW 0dbffh ; Deny W Write
DW 0dfffh ; Deny W Read/Write
DW 0beffh ; Deny R Read
DW 0b7ffh ; Deny R Write
DW 0bfffh ; Deny R Read/Write
DW 01c7fh ; Deny None Read
DW 003ffh ; Deny None Write
DW 01fffh ; Deny None Read/Write
; 4443 3322 2111 000
; Deny/Compat / DDDD DDDD DDDD CCCx
; DenyRead / R RR RRR
; DenyWrite 1st Access =< WW WWWW
; AccessRead \ R RR RR RR R R R
; AccessWrite \ WW W W WW WW WW
; x 1111 1111 1111 1111
; C R 00 1111 1111 1111 1111 ffff
; C W 01 1111 1111 1111 1111 ffff
; C RW 02 1111 1111 1111 1111 ffff
; DRWR 10 1111 1111 1111 1111 ffff
; DRW W 11 1111 1111 1111 1111 ffff
; DRWRW 12 1111 1111 1111 1111 ffff
; D WR 20 1101 1111 0111 1111 df7f
; D W W 21 1101 1011 1111 1111 dbff
; D WRW 22 1101 1111 1111 1111 dfff
; DR R 30 1011 1110 1111 1111 beff
; DR W 31 1011 0111 1111 1111 b7ff
; DR RW 32 1011 1111 1111 1111 bfff
; D R 40 0001 1100 0111 1111 1c7f
; D W 41 0000 0011 1111 1111 03ff
; D RW 42 0001 1111 1111 1111 1fff
; In order to allow the greatest number of accesses, compatability read mode
; is treated as deny-write read. The other compatability modes are treated
; as deny-both.
;******************* START OF SPECIFICATIONS ***********************************
;
; CUC - check usage conflicts
;
; CUC is called to see if a would-be open would generate a share
; conflict with an existing open. See CUCA for the algorithm and table
; format.
;
; ENTRY (BX) = FBA MFT name record
; (DS:SI) = SFT address
; EXIT 'C' clear if OK
; 'C' set if conflict
; (ax) = error code
; USES ALL but arguments (BX, DS:SI)
;
;******************* END OF SPECIFICATIONS *************************************
Procedure CUC,NEAR
push ds
pop es
mov di,si ; (es:di) = FBA SFT record
call gom ; get open mode
mov ch,al
and ch,sharing_mask ; (ch) = new guy share
jz cuc0 ; new guy is compatability mode
mov ch,sharing_mask
cuc0: call csi ; compute share index
add ax,ax ; *2 for word index
xchg ax,si ; (si) = share table index
push cs
pop ds ; (ds:bx) = FBA MFT record
mov dx,WORD PTR CUCA[si] ; (dx) = share mask
lds si,[bx].mft_sptr ; (ds:si) = first sft guy
; ready to do access compares.
;
; (ds:si) = address of next sft
; (es:di) = address of new sft
; (dx) = share word from CUCA
; (cs:bx) = MFT offset
; (ch) = 0 if new SFT is compatibilty mode, else sharing_mask
cuc1: or si,si
jz cuc9 ; at end of chain, no problems
call gom ; if not FCB, then mode in al is good
mov ah,al
and ah,sharing_mask ; (ah) = sharing mode
or ah,ch ; (ah) = 0 iff new and old is SH_COMP
jnz cuc2 ; neither is SH_COMP
; Both the old and the new guy are SH_COMP mode. If the UIDs match,
; step onward. If they don't match do normal share check.
mov bp,es:[di].sf_UID
cmp bp,[si].sf_UID
jz cuc20 ; equal => next sft to check
cuc2: call csi ; compute the share index
inc ax
inc ax
xchg al,cl ; (cl) = shift count
mov ax,dx
sar ax,cl ; select the bit
jc cuc8 ; a conflict!
cuc20:
lds si,[si].sf_chain
JMP cuc1 ; chain to next SFT and try again
; Have a share conflict
cuc8: mov ax,error_sharing_violation ; assume share conflict
stc
; done with compare. Restore regs and return
;
; 'C' set as appropriate
; (es:di) = new SFT address
; (ax) set as appropriate
; (bx) = MFT offset
cuc9: push es
pop ds
mov si,di
ret
EndProc CUC
BREAK <csi - compute share index>
;******************* START OF SPECIFICATIONS ***********************************
;
; csi - compute share index
;
;
; If the mode byte has a leading 7 then it is interpreted as a 0
; csi turns a mode byte into an index from 0 to 14:
;
; (share index)*3 + (access index)
;
; ENTRY (al) = mode byte
; EXIT (ax) = index
; USES AX, CL
;
;******************* END OF SPECIFICATIONS *************************************
Procedure CSI,NEAR
mov ah,al
and ah,access_mask ; (ah) = access bits
and al,sharing_mask ; (al) = share bites
ERRNZ sharing_mask-0F0h
cmp al,sharing_net_FCB
jnz csi1
xor al,al
csi1:
shr al,1
shr al,1
shr al,1
mov cl,al ; (cl) = SHVAL*2
shr al,1
add al,cl ; (al) = SHVAL*3
add al,ah ; (al) = SH*3 + ACC
sub ah,ah
ret
EndProc CSI
Break <GOM - get open mode>
;******************* START OF SPECIFICATIONS ***********************************
;
; GOM - get open mode
;
; Find the correct open mode given the encoded sf_mode. Note that files
; marked READ-ONLY and are opened in compatability read-only are treated as
; deny-write read-only. FCB opens are sharing_compat open_for_both and
; net FCB opens are sharing_compat
;
; Entry: (DS:SI) points to SFT
; Exit: (AL) has correct mode
; Uses: (AX)
;******************* END OF SPECIFICATIONS *************************************
Procedure GOM,NEAR
mov ax,[si].sf_mode
TEST AX,sf_IsFCB
jz gom1 ; if not FCB, then mode in al is good
mov al,sharing_compat+open_for_both
gom1:
mov ah,al
and ah,sharing_mask
cmp ah,sharing_net_FCB ; is sharing from net FCB?
jnz gom2 ; no, got good mode
and al,access_mask ; yes, convert to compat mode sharing
or al,sharing_compat
;
; The sharing mode and access mode in AL is now correct for the file. See if
; mode is compatability. If so and file is read-only, convert access mode to
; deny-write read.
;
gom2:
mov ah,al
and ah,sharing_mask
retnz ; not compatability, return.
test [si].sf_attr,attr_read_only
retz ; not read-only
mov al,sharing_deny_write + open_for_read
ret
EndProc GOM
SHARE ENDS
END
ELSE
CODE ENDS
ENDIF
END ; This can't be inside the if
; mode is compatability. If so and file is read-only, convert access mode to
; deny-write read.
;
gom2:
mov ah,al
and ah,sharing_mask
retnz ; not compatability, return.
test [si].sf_attr,attr_read_only
retz ; not read-only
mov al,sharing_deny_write + open_for_read
ret
EndProc GOM
SHARE ENDS
END
ELSE
CODE ENDS
ENDIF
END ; This can't be inside the if
|
agda-stdlib-0.9/src/Data/Maybe/Core.agda | qwe2/try-agda | 1 | 16598 | <filename>agda-stdlib-0.9/src/Data/Maybe/Core.agda
------------------------------------------------------------------------
-- The Agda standard library
--
-- The Maybe type
------------------------------------------------------------------------
-- The definitions in this file are reexported by Data.Maybe.
module Data.Maybe.Core where
open import Level
data Maybe {a} (A : Set a) : Set a where
just : (x : A) → Maybe A
nothing : Maybe A
{-# IMPORT Data.FFI #-}
{-# COMPILED_DATA Maybe Data.FFI.AgdaMaybe Just Nothing #-}
|
src/main/antlr4/org/sidif/triplestore/parser/SiDIFTokenLexer.g4 | BITPlan/org.sidif.triplestore | 1 | 5787 | <reponame>BITPlan/org.sidif.triplestore<gh_stars>1-10
/**
* Copyright © 2015-2017 BITPlan GmbH
* Author: <NAME>
*
* this is the lexer grammar part of the Language definition for the Simple Graph Navigation Language
* see http://signal.bitplan.com
*
* it is specified using ANTLR syntax and uses the ANTLR V4 parser generator
* see http://www.antlr.org
*
* for Eclipse you might want to install the ANTLR IDE support:
* https://github.com/jknack/antlr4ide
*/
lexer grammar SiDIFTokenLexer;
import LexBasic;
// Keywords
IS
:
'is'
;
OF
:
'of'
;
// Literals
DATE_TIME_LITERAL
:
DateLiteral Hws TimeLiteral
;
DATE_LITERAL
:
DateLiteral
;
TIME_LITERAL
:
TimeLiteral
;
FLOAT_LITERAL
:
FloatLiteral
;
HEX_LITERAL
:
HexLiteral
;
INTEGER_LITERAL
:
(
Minus
| Plus
)? DecimalNumeral
;
SINGLE_QUOTE_STRING_LITERAL
:
SQuoteLiteral
;
DOUBLE_QUOTE_STRING_LITERAL
:
DQuoteLiteral
;
BOOLEAN_LITERAL
:
BoolLiteral
;
IRI_LITERAL
:
SCHEME ':' ([A-Za-z@]+)? ('//' [A-Za-z]+)? (Dot [A-Za-z]+)* ('/' ISEGMENT)*
;
// IRI fragments
fragment ALPHA
:
[A-Za-z]
;
fragment DIGIT
:
[0-9]
;
fragment
UCSCHAR
: '\u00A0' .. '\uD7FF'
| '\uF900' .. '\uFDCF'
| '\uFDF0' .. '\uFFEF'
;
fragment IUNRESERVED
:
ALPHA
| DIGIT
| ('-' | '.' | '_' | '~' | UCSCHAR)
;
fragment PCT_ENCODED
: '%' HexDigit HexDigit
;
fragment SUB_DELIMS
: '!'
| '$'
| '&'
| '\''
| '('
| ')'
| '*'
| '+'
| ','
| ';'
| '='
;
fragment IPCHAR
:
IUNRESERVED
|PCT_ENCODED
|SUB_DELIMS
| (':'|'@')
;
fragment SCHEME
:
ALPHA ( ALPHA | DIGIT | ('+' | '-' | '.') )+
;
fragment ISEGMENT
:
IPCHAR*
;
// Identifiers
IDENTIFIER
:
NameStartChar NameChar*
;
MULTI_LINE_COMMENT
:
(
DocComment
| LineComment [\r\n]
)+ -> skip
;
SINGLE_LINE_COMMENT
:
LineComment+ -> skip
;
WHITESPACE
:
Ws+ -> skip
; |
common/hal-zfp/hal.ads | ekoeppen/STM32_Generic_Ada_Drivers | 1 | 20287 | with STM32GD.GPIO.Pin;
with STM32GD.GPIO.Polled;
with STM32GD.SPI.Peripheral;
with STM32GD.I2C.Peripheral;
with STM32GD.USART.Peripheral;
package HAL is
pragma Preelaborate;
generic package Pin renames STM32GD.GPIO.Pin;
generic package Pin_IRQ renames STM32GD.GPIO.Polled;
generic package SPI renames STM32GD.SPI.Peripheral;
generic package I2C renames STM32GD.I2C.Peripheral;
generic package USART renames STM32GD.USART.Peripheral;
end HAL;
|
TotalParserCombinators/Recogniser.agda | nad/parser-combinators | 1 | 1455 | <filename>TotalParserCombinators/Recogniser.agda
------------------------------------------------------------------------
-- Recognisers built on top of the parsers
------------------------------------------------------------------------
-- Note that these recognisers are different from the ones in
-- TotalRecognisers.LeftRecursion: these allow the use of fewer sharps.
-- (Compare the examples in TotalRecognisers.LeftRecursion.Expression
-- and TotalParserCombinators.Recogniser.Expression.)
module TotalParserCombinators.Recogniser where
open import Category.Monad
open import Codata.Musical.Notation
open import Data.Bool
open import Data.List as List
import Data.List.Categorical
open import Data.Maybe
open import Data.Unit
open import Level
open RawMonadPlus {f = zero} Data.List.Categorical.monadPlus
using () renaming (_⊛_ to _⊛′_)
open import TotalParserCombinators.Parser as Parser
using (Parser; flatten); open Parser.Parser
import TotalParserCombinators.Lib as Lib
------------------------------------------------------------------------
-- Helper function
infixl 4 _·′_
_·′_ : (mb₁ mb₂ : Maybe (List ⊤)) → List ⊤
mb₁ ·′ nothing = []
mb₁ ·′ just b₂ = List.map _ (flatten mb₁) ⊛′ b₂
------------------------------------------------------------------------
-- Recognisers
infixl 50 _·_
infixl 5 _∣_
-- Recognisers.
mutual
-- The index is non-empty if the corresponding language contains the
-- empty string (is nullable).
data P (Tok : Set) : List ⊤ → Set₁ where
-- Parsers can be turned into recognisers.
lift : ∀ {R n} (p : Parser Tok R n) → P Tok (List.map _ n)
-- Symmetric choice.
_∣_ : ∀ {n₁ n₂}
(p₁ : P Tok n₁) (p₂ : P Tok n₂) → P Tok (n₁ ++ n₂)
-- Sequencing.
_·_ : ∀ {n₁ n₂}
(p₁ : ∞⟨ n₂ ⟩P Tok (flatten n₁))
(p₂ : ∞⟨ n₁ ⟩P Tok (flatten n₂)) →
P Tok (n₁ ·′ n₂)
-- Delayed if the index is /nothing/.
∞⟨_⟩P : Maybe (List ⊤) → Set → List ⊤ → Set₁
∞⟨ nothing ⟩P Tok n = ∞ (P Tok n)
∞⟨ just _ ⟩P Tok n = P Tok n
------------------------------------------------------------------------
-- Helper function related to ∞⟨_⟩P
-- Is the argument parser forced? If the result is just something,
-- then it is.
forced? : ∀ {Tok m n} → ∞⟨ m ⟩P Tok n → Maybe (List ⊤)
forced? {m = m} _ = m
------------------------------------------------------------------------
-- The semantics of the recognisers is defined by translation
⟦_⟧ : ∀ {Tok n} (p : P Tok n) → Parser Tok ⊤ n
⟦ lift p ⟧ = _ <$> p
⟦ p₁ ∣ p₂ ⟧ = ⟦ p₁ ⟧ ∣ ⟦ p₂ ⟧
⟦ p₁ · p₂ ⟧ with forced? p₁ | forced? p₂
... | just xs | nothing = _ <$> ⟦ p₁ ⟧ ⊛ ♯ ⟦ ♭ p₂ ⟧
... | just xs | just ys = _ <$> ⟦ p₁ ⟧ ⊛ ⟦ p₂ ⟧
... | nothing | nothing = ♯ (_ <$> ⟦ ♭ p₁ ⟧) ⊛ ♯ ⟦ ♭ p₂ ⟧
... | nothing | just ys = ♯ (_ <$> ⟦ ♭ p₁ ⟧) ⊛ ⟦ p₂ ⟧
|
tests/covered/FunSetPerBool.agda | andrejtokarcik/agda-semantics | 3 | 5117 | module FunSetPerBool where
data Bool : Set where
True : Bool
False : Bool
data T : Set where
E : T
s : Bool -> Set
s True = Bool
s False = T
f = \ (x : s True) -> x
g = f True
f2 = \ (x : Bool) (y : s x) -> y
h = f2 False E
-- i : (xx : _) -> _
i = f2 True
j : (eh : s False) -> s False
j = f2 False
|
programs/oeis/244/A244797.asm | neoneye/loda | 22 | 22652 | <filename>programs/oeis/244/A244797.asm
; A244797: Number of moduli m such that (prime(n) mod m) = 2.
; 0,0,1,1,2,1,3,1,3,3,1,3,3,1,5,3,3,1,3,3,1,3,4,3,3,5,1,7,1,3,3,3,7,1,5,1,3,3,7,5,3,1,7,1,7,1,3,3,8,1,7,3,1,3,7,5,3,1,5,5,1,3,3,3,1,11,3,3,7,1,7,7,3,3,3,3,5,3,7,3,3,1,7,1,3,8,3,7,7,1,7,5,3,3,3,3,5,3,1,5
seq $0,6005 ; The odd prime numbers together with 1.
trn $0,3
seq $0,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n.
sub $0,1
|
programs/oeis/227/A227252.asm | neoneye/loda | 22 | 96714 | <gh_stars>10-100
; A227252: Number of n X 2 binary arrays indicating whether each 2 X 2 subblock of a larger binary array has lexicographically nondecreasing rows and columns, for some larger (n+1) X 3 binary array with rows and columns of the latter in lexicographically nondecreasing order.
; 2,3,9,23,53,113,225,421,745,1255,2025,3147,4733,6917,9857,13737,18769,25195,33289,43359,55749,70841,89057,110861,136761,167311,203113,244819,293133,348813,412673,485585,568481,662355,768265,887335,1020757,1169793,1335777,1520117,1724297,1949879,2198505,2471899,2771869,3100309,3459201,3850617,4276721,4739771,5242121,5786223,6374629,7009993,7695073,8432733,9225945,10077791,10991465,11970275,13017645,14137117,15332353,16607137,17965377,19411107,20948489,22581815,24315509,26154129,28102369,30165061,32347177,34653831,37090281,39661931,42374333,45233189,48244353,51413833,54747793,58252555,61934601,65800575,69857285,74111705,78570977,83242413,88133497,93251887,98605417,104202099,110050125,116157869,122533889,129186929,136125921,143359987,150898441,158750791
mov $4,$0
trn $0,1
mov $2,$0
seq $0,27928 ; a(n) = T(n, 2*n-5), T given by A027926.
mul $0,2
sub $0,$2
mov $3,$4
mul $3,$4
add $0,$3
|
Data/ListSized.agda | Lolirofle/stuff-in-agda | 6 | 14966 | import Lvl
open import Type
module Data.ListSized {ℓ} (T : Type{ℓ}) where
import Data.IndexedList
open import Functional
open import Numeral.Natural
open Data.IndexedList(T){ℕ} using (IndexedList ; intro)
-- A list is a container/collection with elements in order and which allows multiples
List : ℕ → Type{ℓ}
List(n) = IndexedList(intro 𝟎 (const 𝐒))(n)
open Data.IndexedList(T){ℕ} using (∅ ; _⊰_ ; singleton) public
elim = Data.IndexedList.elim(T){ℕ} (intro 𝟎 (const 𝐒))
|
programs/oeis/294/A294246.asm | jmorken/loda | 1 | 169284 | <reponame>jmorken/loda<filename>programs/oeis/294/A294246.asm
; A294246: Sum of the smaller parts of the partitions of 2n into two parts with smaller part nonsquarefree.
; 0,0,0,4,4,4,4,12,21,21,21,33,33,33,33,49,49,67,67,87,87,87,87,111,136,136,163,191,191,191,191,223,223,223,223,259,259,259,259,299,299,299,299,343,388,388,388,436,485,535,535,587,587,641,641,697,697,697
mov $27,$0
mov $29,$0
lpb $29
clr $0,27
mov $0,$27
sub $29,1
sub $0,$29
add $3,$0
add $3,2
cal $0,8683 ; Möbius (or Moebius) function mu(n). mu(1) = 1; mu(n) = (-1)^k if n is the product of k different primes; otherwise mu(n) = 0.
lpb $0
div $0,2
mov $3,1
lpe
mov $1,$3
sub $1,1
add $28,$1
lpe
mov $1,$28
|
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