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src/main/java/org/rumbledb/parser/XQueryLexer.g4 | mrceyhun/rumble | 140 | 7590 | lexer grammar XQueryLexer;
// Note: string syntax depends on syntactic context, so they are
// handled by the parser and not the lexer.
// Tokens declared but not defined
tokens {EscapeQuot, EscapeApos, DOUBLE_LBRACE, DOUBLE_RBRACE}
@members {
///
/// FIELDS
///
// for counting braces inside string literals
private int bracesInside = 0;
}
@header {
// Java header
package org.rumbledb.parser;
}
IntegerLiteral: Digits ;
DecimalLiteral: '.' Digits | Digits '.' [0-9]* ;
DoubleLiteral: ('.' Digits | Digits ('.' [0-9]*)?) [eE] [+-]? Digits ;
DFPropertyName: 'decimal-separator'
| 'grouping-separator'
| 'infinity'
| 'minus-sign'
| 'NaN'
| 'percent'
| 'per-mille'
| 'zero-digit'
| 'digit'
| 'pattern-separator'
| 'exponent-separator'
;
fragment
Digits: [0-9]+ ;
// This could be checked elsewhere: http://www.w3.org/TR/REC-xml/#wf-Legalchar
PredefinedEntityRef: '&' ('lt'|'gt'|'amp'|'quot'|'apos') ';' ;
// CharRef is additionally limited by http://www.w3.org/TR/REC-xml/#NT-Char,
CharRef: '&#' [0-9]+ ';' | '&#x' [0-9a-fA-F]+ ';' ;
// Escapes are handled as two Quot or two Apos tokens, to avoid maximal
// munch lexer ambiguity.
Quot : '"' -> pushMode(QUOT_LITERAL_STRING);
Apos : '\'' -> pushMode(APOS_LITERAL_STRING);
// XML-SPECIFIC
COMMENT : '<!--' ('-' ~[-] | ~[-])* '-->' ;
XMLDECL : '<?' [Xx] [Mm] [Ll] ([ \t\r\n] .*?)? '?>' ;
PI : '<?' NCName ([ \t\r\n] .*?)? '?>' ;
CDATA : '<![CDATA[' .*? ']]>' ;
PRAGMA : '(#' WS? (NCName ':')? NCName (WS .*?)? '#)' ;
// WHITESPACE
// S ::= (#x20 | #x9 | #xD | #xA)+
WS: [ \t\r\n]+ -> channel(HIDDEN);
// OPERATORS
EQUAL : '=' ;
NOT_EQUAL : '!=' ;
LPAREN : '(' ;
RPAREN : ')' ;
LBRACKET : '[' ;
RBRACKET : ']' ;
LBRACE : '{' ;
RBRACE : '}' ;
STAR : '*' ;
PLUS : '+' ;
MINUS : '-' ;
COMMA : ',' ;
DOT : '.' ;
DDOT : '..' ;
COLON : ':' ;
COLON_EQ : ':=' ;
SEMICOLON : ';' ;
SLASH : '/' ;
DSLASH : '//' ;
BACKSLASH : '\\';
VBAR : '|' ;
LANGLE : '<' ;
RANGLE : '>' ;
QUESTION : '?' ;
AT : '@' ;
DOLLAR : '$' ;
MOD : '%' ;
BANG : '!' ;
HASH : '#' ;
CARAT : '^' ;
ARROW : '=>' ;
GRAVE : '`' ;
CONCATENATION : '||' ;
TILDE : '~' ;
// KEYWORDS
KW_ALLOWING: 'allowing';
KW_ANCESTOR: 'ancestor';
KW_ANCESTOR_OR_SELF: 'ancestor-or-self';
KW_AND: 'and';
KW_ARRAY: 'array';
KW_AS: 'as';
KW_ASCENDING: 'ascending';
KW_AT: 'at';
KW_ATTRIBUTE: 'attribute';
KW_BASE_URI: 'base-uri';
KW_BOUNDARY_SPACE: 'boundary-space';
KW_BINARY: 'binary';
KW_BY: 'by';
KW_CASE: 'case';
KW_CAST: 'cast';
KW_CASTABLE: 'castable';
KW_CATCH: 'catch';
KW_CHILD: 'child';
KW_COLLATION: 'collation';
KW_COMMENT: 'comment';
KW_CONSTRUCTION: 'construction';
KW_CONTEXT: 'context';
KW_COPY_NS: 'copy-namespaces';
KW_COUNT: 'count';
KW_DECLARE: 'declare';
KW_DEFAULT: 'default';
KW_DESCENDANT: 'descendant';
KW_DESCENDANT_OR_SELF: 'descendant-or-self';
KW_DESCENDING: 'descending';
KW_DECIMAL_FORMAT: 'decimal-format' ;
KW_DIV: 'div';
KW_DOCUMENT: 'document';
KW_DOCUMENT_NODE: 'document-node';
KW_ELEMENT: 'element';
KW_ELSE: 'else';
KW_EMPTY: 'empty';
KW_EMPTY_SEQUENCE: 'empty-sequence';
KW_ENCODING: 'encoding';
KW_END: 'end';
KW_EQ: 'eq';
KW_EVERY: 'every';
KW_EXCEPT: 'except';
KW_EXTERNAL: 'external';
KW_FOLLOWING: 'following';
KW_FOLLOWING_SIBLING: 'following-sibling';
KW_FOR: 'for';
KW_FUNCTION: 'function';
KW_GE: 'ge';
KW_GREATEST: 'greatest';
KW_GROUP: 'group';
KW_GT: 'gt';
KW_IDIV: 'idiv';
KW_IF: 'if';
KW_IMPORT: 'import';
KW_IN: 'in';
KW_INHERIT: 'inherit';
KW_INSTANCE: 'instance';
KW_INTERSECT: 'intersect';
KW_IS: 'is';
KW_ITEM: 'item';
KW_LAX: 'lax';
KW_LE: 'le';
KW_LEAST: 'least';
KW_LET: 'let';
KW_LT: 'lt';
KW_MAP: 'map';
KW_MOD: 'mod';
KW_MODULE: 'module';
KW_NAMESPACE: 'namespace';
KW_NE: 'ne';
KW_NEXT: 'next';
KW_NAMESPACE_NODE: 'namespace-node';
KW_NO_INHERIT: 'no-inherit';
KW_NO_PRESERVE: 'no-preserve';
KW_NODE: 'node';
KW_OF: 'of';
KW_ONLY: 'only';
KW_OPTION: 'option';
KW_OR: 'or';
KW_ORDER: 'order';
KW_ORDERED: 'ordered';
KW_ORDERING: 'ordering';
KW_PARENT: 'parent';
KW_PRECEDING: 'preceding';
KW_PRECEDING_SIBLING: 'preceding-sibling';
KW_PRESERVE: 'preserve';
KW_PREVIOUS: 'previous';
KW_PI: 'processing-instruction';
KW_RETURN: 'return';
KW_SATISFIES: 'satisfies';
KW_SCHEMA: 'schema';
KW_SCHEMA_ATTR: 'schema-attribute';
KW_SCHEMA_ELEM: 'schema-element';
KW_SELF: 'self';
KW_SLIDING: 'sliding';
KW_SOME: 'some';
KW_STABLE: 'stable';
KW_START: 'start';
KW_STRICT: 'strict';
KW_STRIP: 'strip';
KW_SWITCH: 'switch';
KW_TEXT: 'text';
KW_THEN: 'then';
KW_TO: 'to';
KW_TREAT: 'treat';
KW_TRY: 'try';
KW_TUMBLING: 'tumbling';
KW_TYPE: 'type';
KW_TYPESWITCH: 'typeswitch';
KW_UNION: 'union';
KW_UNORDERED: 'unordered';
KW_UPDATE: 'update';
KW_VALIDATE: 'validate';
KW_VARIABLE: 'variable';
KW_VERSION: 'version';
KW_WHEN: 'when';
KW_WHERE: 'where';
KW_WINDOW: 'window';
KW_XQUERY: 'xquery';
// MarkLogic JSON computed constructor
KW_ARRAY_NODE: 'array-node';
KW_BOOLEAN_NODE: 'boolean-node';
KW_NULL_NODE: 'null-node';
KW_NUMBER_NODE: 'number-node';
KW_OBJECT_NODE: 'object-node';
// eXist-db update keywords
KW_REPLACE: 'replace';
KW_WITH: 'with';
KW_VALUE: 'value';
KW_INSERT: 'insert';
KW_INTO: 'into';
KW_DELETE: 'delete';
KW_RENAME: 'rename';
// NAMES
// Moved URIQualifiedName here to gather all names
URIQualifiedName: 'Q' '{' (PredefinedEntityRef | CharRef | ~[&{}])* '}' NCName ;
// We create these basic variants in order to honor ws:explicit in some basic cases
FullQName: NCName ':' NCName ;
NCNameWithLocalWildcard: NCName ':' '*' ;
NCNameWithPrefixWildcard: '*' ':' NCName ;
// According to http://www.w3.org/TR/REC-xml-names/#NT-NCName,
// it is 'an XML Name, minus the ":"'
NCName: NameStartChar NameChar*;
fragment
NameStartChar: [_a-zA-Z]
| '\u00C0'..'\u00D6'
| '\u00D8'..'\u00F6'
| '\u00F8'..'\u02FF'
| '\u0370'..'\u037D'
| '\u037F'..'\u1FFF'
| '\u200C'..'\u200D'
| '\u2070'..'\u218F'
| '\u2C00'..'\u2FEF'
| '\u3001'..'\uD7FF'
| '\uF900'..'\uFDCF'
| '\uFDF0'..'\uFFFD'
;
fragment
NameChar: NameStartChar
| '-'
| '.'
| [0-9]
| '\u00A1'..'\u00BF'
| '\u0300'..'\u036F'
| '\u203F'..'\u2040'
;
// XQuery comments
//
// Element content can have an unbalanced set of (: :) pairs (as XQuery
// comments do not really exist inside them), so it is better to treat
// this as a single token with a recursive rule, rather than using a
// mode.
XQDOC_COMMENT_START: '(:~' ;
XQDOC_COMMENT_END: ':'+ ')' ;
XQDocComment: '(' ':' '~' ( CHAR | ( ':' ~( ')' ) ) )* ':' ')' ;
XQComment: '(' ':' ~'~' (XQComment | '(' ~[:] | ':' ~[)] | ~[:(])* ':'* ':'+ ')' -> channel(HIDDEN);
CHAR: ( '\t' | '\n' | '\r' | '\u0020'..'\u0039' | '\u003B'..'\uD7FF' | '\uE000'..'\uFFFD' ) ;
// These rules have been added to enter and exit the String mode
ENTER_STRING : GRAVE GRAVE LBRACKET -> pushMode(STRING_MODE);
EXIT_INTERPOLATION : RBRACE GRAVE -> popMode;
// This is an intersection of:
//
// [148] ElementContentChar ::= Char - [{}<&]
// [149] QuotAttrContentChar ::= Char - ["{}<&]
// [150] AposAttrContentChar ::= Char - ['{}<&]
//
// Therefore, we would have something like:
//
// ElementContentChar ::= ContentChar | ["']
// QuotAttrContentChar ::= ContentChar | [']
// AposAttrContentChar ::= ContentChar | ["]
//
// This rule needs to be the very last one, so it has the lowest priority.
ContentChar: ~["'{}<&] ;
// Lexical modes to parse Strings
mode STRING_MODE;
BASIC_CHAR : ( '\t'
| '\u000A'
| '\u000D'
| '\u0020'..'\u005C'
| '\u005E'..'\u005F'
| '\u0061'..'\u007A'
| '\u007C'..'\uD7FF'
| '\uE000'..'\uFFFD'
| '\u{10000}'..'\u{10FFFF}' ) ;
GRAVE_STRING : '`' -> type(GRAVE);
RBRACKET_STRING : ']' -> type(RBRACKET);
LBRACE_STRING : '{' -> type(LBRACE);
ENTER_INTERPOLATION : GRAVE LBRACE -> pushMode(DEFAULT_MODE);
EXIT_STRING : RBRACKET GRAVE GRAVE -> popMode;
mode QUOT_LITERAL_STRING;
EscapeQuot_QuotString : '""' -> type(EscapeQuot);
Quot_QuotString : '"' -> type(Quot), popMode;
DOUBLE_LBRACE_QuotString : '{{' -> type(DOUBLE_LBRACE);
DOUBLE_RBRACE_QuotString : '}}' -> type(DOUBLE_RBRACE);
LBRACE_QuotString : '{' -> type(LBRACE), pushMode(STRING_INTERPOLATION_MODE_QUOT);
RBRACE_QuotString : '}' -> type(RBRACE);
PredefinedEntityRef_QuotString : '&' ('lt'|'gt'|'amp'|'quot'|'apos') ';' -> type(PredefinedEntityRef);
CharRef_QuotString : ('&#' [0-9]+ ';' | '&#x' [0-9a-fA-F]+ ';') -> type(CharRef);
ContentChar_QuotString : ~["&{}] -> type(ContentChar);
mode APOS_LITERAL_STRING;
EscapeApos_AposString : '\'\'' -> type(EscapeApos);
Apos_AposString : '\'' -> type(Apos), popMode;
DOUBLE_LBRACE_AposString : '{{' -> type(DOUBLE_LBRACE);
DOUBLE_RBRACE_AposString : '}}' -> type(DOUBLE_RBRACE) ;
LBRACE_AposString : '{' -> type(LBRACE), pushMode(STRING_INTERPOLATION_MODE_APOS);
RBRACE_AposString : '}' -> type(RBRACE);
PredefinedEntityRef_AposString : '&' ('lt'|'gt'|'amp'|'quot'|'apos') ';' -> type(PredefinedEntityRef);
CharRef_AposString : ('&#' [0-9]+ ';' | '&#x' [0-9a-fA-F]+ ';') -> type(CharRef);
ContentChar_AposString : ~['&{}] -> type(ContentChar);
mode STRING_INTERPOLATION_MODE_QUOT;
INT_QUOT_IntegerLiteral: Digits -> type(IntegerLiteral);
INT_QUOT_DecimalLiteral: ('.' Digits | Digits '.' [0-9]*) -> type(DecimalLiteral) ;
INT_QUOT_DoubleLiteral: ('.' Digits | Digits ('.' [0-9]*)?) [eE] [+-]? Digits -> type(DoubleLiteral);
INT_QUOT_DFPropertyName: ('decimal-separator'
| 'grouping-separator'
| 'infinity'
| 'minus-sign'
| 'NaN'
| 'percent'
| 'per-mille'
| 'zero-digit'
| 'digit'
| 'pattern-separator'
| 'exponent-separator' )
-> type(DFPropertyName);
// This could be checked elsewhere: http://www.w3.org/TR/REC-xml/#wf-Legalchar
INT_QUOT_PredefinedEntityRef: '&' ('lt'|'gt'|'amp'|'quot'|'apos') ';' -> type(PredefinedEntityRef);
// CharRef is additionally limited by http://www.w3.org/TR/REC-xml/#NT-Char,
INT_QUOT_CharRef: ('&#' [0-9]+ ';' | '&#x' [0-9a-fA-F]+ ';') -> type(CharRef);
INT_QUOT_EscapeQuot : '""' -> type(EscapeQuot);
// Escapes are handled as two Quot or two Apos tokens, to avoid maximal
// munch lexer ambiguity.
INT_QUOT_Apos: '\'' -> pushMode(APOS_LITERAL_STRING), type(Apos);
// there cannot be two or more QUOT_LITERAL_STRING nested inside one another
// so this guarantees that we are going back to DEFAULT_MODE
INT_QUOT_Quot: '"' -> type(Quot), popMode, popMode;
// XML-SPECIFIC
INT_QUOT_COMMENT : '<!--' ('-' ~[-] | ~[-])* '-->' -> type(COMMENT);
INT_QUOT_XMLDECL : '<?' [Xx] [Mm] [Ll] ([ \t\r\n] .*?)? '?>' -> type(XMLDECL);
INT_QUOT_PI : '<?' NCName ([ \t\r\n] .*?)? '?>' -> type(PI);
INT_QUOT_CDATA : '<![CDATA[' .*? ']]>' -> type(CDATA);
INT_QUOT_PRAGMA : '(#' WS? (NCName ':')? NCName (WS .*?)? '#)' -> type(PRAGMA);
// WHITESPACE
// S ::= (#x20 | #x9 | #xD | #xA)+
INT_QUOT_WS: [ \t\r\n]+ -> channel(HIDDEN), type(WS);
// OPERATORS
INT_QUOT_EQUAL : '=' -> type(EQUAL) ;
INT_QUOT_NOT_EQUAL : '!=' -> type(NOT_EQUAL);
INT_QUOT_LPAREN : '(' -> type(LPAREN);
INT_QUOT_RPAREN : ')' -> type(RPAREN);
INT_QUOT_LBRACKET : '[' -> type(LBRACKET);
INT_QUOT_RBRACKET : ']' -> type(RBRACKET);
INT_QUOT_LBRACE : '{' {this.bracesInside++;} -> type(LBRACE);
INT_QUOT_RBRACE_EXIT : {this.bracesInside == 0}? '}' -> type(RBRACE), popMode ;
INT_QUOT_RBRACE : {this.bracesInside > 0}? '}' {this.bracesInside--;} -> type(RBRACE) ;
INT_QUOT_STAR : '*' -> type(STAR);
INT_QUOT_PLUS : '+' -> type(PLUS);
INT_QUOT_MINUS : '-' -> type(MINUS);
INT_QUOT_COMMA : ',' -> type(COMMA);
INT_QUOT_DOT : '.' -> type(DOT);
INT_QUOT_DDOT : '..' -> type(DDOT);
INT_QUOT_COLON : ':' -> type(COLON);
INT_QUOT_COLON_EQ : ':=' -> type(COLON_EQ);
INT_QUOT_SEMICOLON : ';' -> type(SEMICOLON);
INT_QUOT_SLASH : '/' -> type(SLASH);
INT_QUOT_DSLASH : '//' -> type(DSLASH);
INT_QUOT_BACKSLASH : '\\' -> type(BACKSLASH);
INT_QUOT_VBAR : '|' -> type(VBAR);
INT_QUOT_LANGLE : '<' -> type(LANGLE);
INT_QUOT_RANGLE : '>' -> type(RANGLE);
INT_QUOT_QUESTION : '?' -> type(QUESTION);
INT_QUOT_AT : '@' -> type(AT);
INT_QUOT_DOLLAR : '$' -> type(DOLLAR);
INT_QUOT_MOD : '%' -> type(MOD);
INT_QUOT_BANG : '!' -> type(BANG);
INT_QUOT_HASH : '#' -> type(HASH);
INT_QUOT_CARAT : '^' -> type(CARAT);
INT_QUOT_ARROW : '=>' -> type(ARROW);
INT_QUOT_GRAVE : '`' -> type(GRAVE);
INT_QUOT_CONCATENATION : '||' -> type(CONCATENATION);
INT_QUOT_TILDE : '~' -> type(TILDE);
// KEYWORDS
INT_QUOT_KW_ALLOWING: 'allowing' -> type(KW_ALLOWING);
INT_QUOT_KW_ANCESTOR: 'ancestor' -> type(KW_ANCESTOR);
INT_QUOT_KW_ANCESTOR_OR_SELF: 'ancestor-or-self' -> type(KW_ANCESTOR_OR_SELF);
INT_QUOT_KW_AND: 'and' -> type(KW_AND);
INT_QUOT_KW_ARRAY: 'array' -> type(KW_ARRAY);
INT_QUOT_KW_AS: 'as' -> type(KW_AS);
INT_QUOT_KW_ASCENDING: 'ascending' -> type(KW_ASCENDING);
INT_QUOT_KW_AT: 'at' -> type(KW_AT);
INT_QUOT_KW_ATTRIBUTE: 'attribute' -> type(KW_ATTRIBUTE);
INT_QUOT_KW_BASE_URI: 'base-uri' -> type(KW_BASE_URI);
INT_QUOT_KW_BOUNDARY_SPACE: 'boundary-space' -> type(KW_BOUNDARY_SPACE);
INT_QUOT_KW_BINARY: 'binary' -> type(KW_BINARY);
INT_QUOT_KW_BY: 'by' -> type(KW_BY);
INT_QUOT_KW_CASE: 'case' -> type(KW_CASE);
INT_QUOT_KW_CAST: 'cast' -> type(KW_CAST);
INT_QUOT_KW_CASTABLE: 'castable' -> type(KW_CASTABLE);
INT_QUOT_KW_CATCH: 'catch' -> type(KW_CATCH);
INT_QUOT_KW_CHILD: 'child' -> type(KW_CHILD);
INT_QUOT_KW_COLLATION: 'collation' -> type(KW_COLLATION);
INT_QUOT_KW_COMMENT: 'comment' -> type(KW_COMMENT);
INT_QUOT_KW_CONSTRUCTION: 'construction' -> type(KW_CONSTRUCTION);
INT_QUOT_KW_CONTEXT: 'context' -> type(KW_CONTEXT);
INT_QUOT_KW_COPY_NS: 'copy-namespaces' -> type(KW_COPY_NS);
INT_QUOT_KW_COUNT: 'count' -> type(KW_COUNT);
INT_QUOT_KW_DECLARE: 'declare' -> type(KW_DECLARE);
INT_QUOT_KW_DEFAULT: 'default' -> type(KW_DEFAULT);
INT_QUOT_KW_DESCENDANT: 'descendant' -> type(KW_DESCENDANT);
INT_QUOT_KW_DESCENDANT_OR_SELF: 'descendant-or-self' -> type(KW_DESCENDANT_OR_SELF);
INT_QUOT_KW_DESCENDING: 'descending' -> type(KW_DESCENDING);
INT_QUOT_KW_DECIMAL_FORMAT: 'decimal-format' -> type(KW_DECIMAL_FORMAT);
INT_QUOT_KW_DIV: 'div' -> type(KW_DIV);
INT_QUOT_KW_DOCUMENT: 'document' -> type(KW_DOCUMENT);
INT_QUOT_KW_DOCUMENT_NODE: 'document-node' -> type(KW_DOCUMENT_NODE);
INT_QUOT_KW_ELEMENT: 'element' -> type(KW_ELEMENT);
INT_QUOT_KW_ELSE: 'else' -> type(KW_ELSE);
INT_QUOT_KW_EMPTY: 'empty' -> type(KW_EMPTY);
INT_QUOT_KW_EMPTY_SEQUENCE: 'empty-sequence' -> type(KW_EMPTY_SEQUENCE);
INT_QUOT_KW_ENCODING: 'encoding' -> type(KW_ENCODING);
INT_QUOT_KW_END: 'end' -> type(KW_END);
INT_QUOT_KW_EQ: 'eq' -> type(KW_EQ);
INT_QUOT_KW_EVERY: 'every' -> type(KW_EVERY);
INT_QUOT_KW_EXCEPT: 'except' -> type(KW_EXCEPT);
INT_QUOT_KW_EXTERNAL: 'external' -> type(KW_EXTERNAL);
INT_QUOT_KW_FOLLOWING: 'following' -> type(KW_FOLLOWING);
INT_QUOT_KW_FOLLOWING_SIBLING: 'following-sibling' -> type(KW_FOLLOWING_SIBLING);
INT_QUOT_KW_FOR: 'for' -> type(KW_FOR);
INT_QUOT_KW_FUNCTION: 'function' -> type(KW_FUNCTION);
INT_QUOT_KW_GE: 'ge' -> type(KW_GE);
INT_QUOT_KW_GREATEST: 'greatest' -> type(KW_GREATEST);
INT_QUOT_KW_GROUP: 'group' -> type(KW_GROUP);
INT_QUOT_KW_GT: 'gt' -> type(KW_GT);
INT_QUOT_KW_IDIV: 'idiv' -> type(KW_IDIV);
INT_QUOT_KW_IF: 'if' -> type(KW_IF);
INT_QUOT_KW_IMPORT: 'import' -> type(KW_IMPORT);
INT_QUOT_KW_IN: 'in' -> type(KW_IN);
INT_QUOT_KW_INHERIT: 'inherit' -> type(KW_INHERIT);
INT_QUOT_KW_INSTANCE: 'instance' -> type(KW_INSTANCE);
INT_QUOT_KW_INTERSECT: 'intersect' -> type(KW_INTERSECT);
INT_QUOT_KW_IS: 'is' -> type(KW_IS);
INT_QUOT_KW_ITEM: 'item' -> type(KW_ITEM);
INT_QUOT_KW_LAX: 'lax' -> type(KW_LAX);
INT_QUOT_KW_LE: 'le' -> type(KW_LE);
INT_QUOT_KW_LEAST: 'least' -> type(KW_LEAST);
INT_QUOT_KW_LET: 'let' -> type(KW_LET);
INT_QUOT_KW_LT: 'lt' -> type(KW_LT);
INT_QUOT_KW_MAP: 'map' -> type(KW_MAP);
INT_QUOT_KW_MOD: 'mod' -> type(KW_MOD);
INT_QUOT_KW_MODULE: 'module' -> type(KW_MODULE);
INT_QUOT_KW_NAMESPACE: 'namespace' -> type(KW_NAMESPACE);
INT_QUOT_KW_NE: 'ne' -> type(KW_NE);
INT_QUOT_KW_NEXT: 'next' -> type(KW_NEXT);
INT_QUOT_KW_NAMESPACE_NODE: 'namespace-node' -> type(KW_NAMESPACE_NODE);
INT_QUOT_KW_NO_INHERIT: 'no-inherit' -> type(KW_NO_INHERIT);
INT_QUOT_KW_NO_PRESERVE: 'no-preserve' -> type(KW_NO_PRESERVE);
INT_QUOT_KW_NODE: 'node' -> type(KW_NODE);
INT_QUOT_KW_OF: 'of' -> type(KW_OF);
INT_QUOT_KW_ONLY: 'only' -> type(KW_ONLY);
INT_QUOT_KW_OPTION: 'option' -> type(KW_OPTION);
INT_QUOT_KW_OR: 'or' -> type(KW_OR);
INT_QUOT_KW_ORDER: 'order' -> type(KW_ORDER);
INT_QUOT_KW_ORDERED: 'ordered' -> type(KW_ORDERED);
INT_QUOT_KW_ORDERING: 'ordering' -> type(KW_ORDERING);
INT_QUOT_KW_PARENT: 'parent' -> type(KW_PARENT);
INT_QUOT_KW_PRECEDING: 'preceding' -> type(KW_PRECEDING);
INT_QUOT_KW_PRECEDING_SIBLING: 'preceding-sibling' -> type(KW_PRECEDING_SIBLING);
INT_QUOT_KW_PRESERVE: 'preserve' -> type(KW_PRESERVE);
INT_QUOT_KW_PREVIOUS: 'previous' -> type(KW_PREVIOUS);
INT_QUOT_KW_PI: 'processing-instruction' -> type(KW_PI);
INT_QUOT_KW_RETURN: 'return' -> type(KW_RETURN);
INT_QUOT_KW_SATISFIES: 'satisfies' -> type(KW_SATISFIES);
INT_QUOT_KW_SCHEMA: 'schema' -> type(KW_SCHEMA);
INT_QUOT_KW_SCHEMA_ATTR: 'schema-attribute' -> type(KW_SCHEMA_ATTR);
INT_QUOT_KW_SCHEMA_ELEM: 'schema-element' -> type(KW_SCHEMA_ELEM);
INT_QUOT_KW_SELF: 'self' -> type(KW_SELF);
INT_QUOT_KW_SLIDING: 'sliding' -> type(KW_SLIDING);
INT_QUOT_KW_SOME: 'some' -> type(KW_SOME);
INT_QUOT_KW_STABLE: 'stable' -> type(KW_STABLE);
INT_QUOT_KW_START: 'start' -> type(KW_START);
INT_QUOT_KW_STRICT: 'strict' -> type(KW_STRICT);
INT_QUOT_KW_STRIP: 'strip' -> type(KW_STRIP);
INT_QUOT_KW_SWITCH: 'switch' -> type(KW_SWITCH);
INT_QUOT_KW_TEXT: 'text' -> type(KW_TEXT);
INT_QUOT_KW_THEN: 'then' -> type(KW_THEN);
INT_QUOT_KW_TO: 'to' -> type(KW_TO);
INT_QUOT_KW_TREAT: 'treat' -> type(KW_TREAT);
INT_QUOT_KW_TRY: 'try' -> type(KW_TRY);
INT_QUOT_KW_TUMBLING: 'tumbling' -> type(KW_TUMBLING);
INT_QUOT_KW_TYPE: 'type' -> type(KW_TYPE);
INT_QUOT_KW_TYPESWITCH: 'typeswitch' -> type(KW_TYPESWITCH);
INT_QUOT_KW_UNION: 'union' -> type(KW_UNION);
INT_QUOT_KW_UNORDERED: 'unordered' -> type(KW_UNORDERED);
INT_QUOT_KW_UPDATE: 'update' -> type(KW_UPDATE);
INT_QUOT_KW_VALIDATE: 'validate' -> type(KW_VALIDATE);
INT_QUOT_KW_VARIABLE: 'variable' -> type(KW_VARIABLE);
INT_QUOT_KW_VERSION: 'version' -> type(KW_VERSION);
INT_QUOT_KW_WHEN: 'when' -> type(KW_WHEN);
INT_QUOT_KW_WHERE: 'where' -> type(KW_WHERE);
INT_QUOT_KW_WINDOW: 'window' -> type(KW_WINDOW);
INT_QUOT_KW_XQUERY: 'xquery' -> type(KW_XQUERY);
// MarkLogic JSON computed constructor
INT_QUOT_KW_ARRAY_NODE: 'array-node' -> type(KW_ARRAY_NODE);
INT_QUOT_KW_BOOLEAN_NODE: 'boolean-node' -> type(KW_BOOLEAN_NODE);
INT_QUOT_KW_NULL_NODE: 'null-node' -> type(KW_NULL_NODE);
INT_QUOT_KW_NUMBER_NODE: 'number-node' -> type(KW_NUMBER_NODE);
INT_QUOT_KW_OBJECT_NODE: 'object-node' -> type(KW_OBJECT_NODE);
// eXist-db update keywords
INT_QUOT_KW_REPLACE: 'replace' -> type(KW_REPLACE);
INT_QUOT_KW_WITH: 'with' -> type(KW_WITH);
INT_QUOT_KW_VALUE: 'value' -> type(KW_VALUE);
INT_QUOT_KW_INSERT: 'insert' -> type(KW_INSERT);
INT_QUOT_KW_INTO: 'into' -> type(KW_INTO);
INT_QUOT_KW_DELETE: 'delete' -> type(KW_DELETE);
INT_QUOT_KW_RENAME: 'rename' -> type(KW_RENAME);
// NAMES
INT_QUOT_URIQualifiedName: 'Q' '{' (PredefinedEntityRef | CharRef | ~[&{}])* '}' NCName -> type(URIQualifiedName);
INT_QUOT_FullQName: NCName ':' NCName -> type(FullQName);
INT_QUOT_NCNameWithLocalWildcard: NCName ':' '*' -> type(NCNameWithLocalWildcard);
INT_QUOT_NCNameWithPrefixWildcard: '*' ':' NCName -> type(NCNameWithPrefixWildcard);
INT_QUOT_NCName: NameStartChar NameChar* -> type(NCName);
INT_QUOT_XQDOC_COMMENT_START: '(:~' -> type(XQDOC_COMMENT_START);
INT_QUOT_XQDOC_COMMENT_END: ':'+ ')' -> type(XQDOC_COMMENT_END);
INT_QUOT_XQDocComment: '(' ':' '~' ( CHAR | ( ':' ~( ')' ) ) )* ':' ')' -> type(XQDocComment);
INT_QUOT_XQComment: '(' ':' ~'~' (XQComment | '(' ~[:] | ':' ~[)] | ~[:(])* ':'* ':'+ ')' -> channel(HIDDEN), type(XQComment);
INT_QUOT_CHAR: ( '\t' | '\n' | '\r' | '\u0020'..'\u0039' | '\u003B'..'\uD7FF' | '\uE000'..'\uFFFD' ) -> type(CHAR);
INT_QUOT_ENTER_STRING : GRAVE GRAVE LBRACKET -> pushMode(STRING_MODE), type(ENTER_STRING);
INT_QUOT_EXIT_INTERPOLATION : RBRACE GRAVE -> popMode, type(ENTER_INTERPOLATION);
INT_ContentChar: ~["'{}<&] -> type(ContentChar);
mode STRING_INTERPOLATION_MODE_APOS;
INT_APOS_IntegerLiteral: Digits -> type(IntegerLiteral);
INT_APOS_DecimalLiteral: ('.' Digits | Digits '.' [0-9]*) -> type(DecimalLiteral) ;
INT_APOS_DoubleLiteral: ('.' Digits | Digits ('.' [0-9]*)?) [eE] [+-]? Digits -> type(DoubleLiteral);
INT_APOS_DFPropertyName: ('decimal-separator'
| 'grouping-separator'
| 'infinity'
| 'minus-sign'
| 'NaN'
| 'percent'
| 'per-mille'
| 'zero-digit'
| 'digit'
| 'pattern-separator'
| 'exponent-separator' )
-> type(DFPropertyName);
// This could be checked elsewhere: http://www.w3.org/TR/REC-xml/#wf-Legalchar
INT_APOS_PredefinedEntityRef: '&' ('lt'|'gt'|'amp'|'quot'|'apos') ';' -> type(PredefinedEntityRef);
// CharRef is additionally limited by http://www.w3.org/TR/REC-xml/#NT-Char,
INT_APOS_CharRef: ('&#' [0-9]+ ';' | '&#x' [0-9a-fA-F]+ ';') -> type(CharRef);
INT_APOS_EscapeApos : '\'\'' -> type(EscapeApos);
// Escapes are handled as two Quot or two Apos tokens, to avoid maximal
// munch lexer ambiguity.
INT_APOS_Quot: '"' -> pushMode(QUOT_LITERAL_STRING), type(Quot);
// there cannot be two or more APOS_LITERAL_STRING nested inside one another
// so this guarantees that we are going back to DEFAULT_MODE
INT_APOS_Apos: '\'' -> type(Apos), popMode, popMode;
// XML-SPECIFIC
INT_APOS_COMMENT : '<!--' ('-' ~[-] | ~[-])* '-->' -> type(COMMENT);
INT_APOS_XMLDECL : '<?' [Xx] [Mm] [Ll] ([ \t\r\n] .*?)? '?>' -> type(XMLDECL);
INT_APOS_PI : '<?' NCName ([ \t\r\n] .*?)? '?>' -> type(PI);
INT_APOS_CDATA : '<![CDATA[' .*? ']]>' -> type(CDATA);
INT_APOS_PRAGMA : '(#' WS? (NCName ':')? NCName (WS .*?)? '#)' -> type(PRAGMA);
// WHITESPACE
// S ::= (#x20 | #x9 | #xD | #xA)+
INT_APOS_WS: [ \t\r\n]+ -> channel(HIDDEN), type(WS);
// OPERATORS
INT_APOS_EQUAL : '=' -> type(EQUAL) ;
INT_APOS_NOT_EQUAL : '!=' -> type(NOT_EQUAL);
INT_APOS_LPAREN : '(' -> type(LPAREN);
INT_APOS_RPAREN : ')' -> type(RPAREN);
INT_APOS_LBRACKET : '[' -> type(LBRACKET);
INT_APOS_RBRACKET : ']' -> type(RBRACKET);
//INT_APOS_LBRACE : '{' -> type(LBRACE);
INT_APOS_LBRACE : '{' {this.bracesInside++;} -> type(LBRACE);
INT_APOS_RBRACE_EXIT : {this.bracesInside == 0}? '}' -> type(RBRACE), popMode ;
INT_APOS_RBRACE : {this.bracesInside > 0}? '}' {this.bracesInside--;} -> type(RBRACE) ;
//INT_APOS_RBRACE : '}' -> type(RBRACE), popMode ;
INT_APOS_STAR : '*' -> type(STAR);
INT_APOS_PLUS : '+' -> type(PLUS);
INT_APOS_MINUS : '-' -> type(MINUS);
INT_APOS_COMMA : ',' -> type(COMMA);
INT_APOS_DOT : '.' -> type(DOT);
INT_APOS_DDOT : '..' -> type(DDOT);
INT_APOS_COLON : ':' -> type(COLON);
INT_APOS_COLON_EQ : ':=' -> type(COLON_EQ);
INT_APOS_SEMICOLON : ';' -> type(SEMICOLON);
INT_APOS_SLASH : '/' -> type(SLASH);
INT_APOS_DSLASH : '//' -> type(DSLASH);
INT_APOS_BACKSLASH : '\\' -> type(BACKSLASH);
INT_APOS_VBAR : '|' -> type(VBAR);
INT_APOS_LANGLE : '<' -> type(LANGLE);
INT_APOS_RANGLE : '>' -> type(RANGLE);
INT_APOS_QUESTION : '?' -> type(QUESTION);
INT_APOS_AT : '@' -> type(AT);
INT_APOS_DOLLAR : '$' -> type(DOLLAR);
INT_APOS_MOD : '%' -> type(MOD);
INT_APOS_BANG : '!' -> type(BANG);
INT_APOS_HASH : '#' -> type(HASH);
INT_APOS_CARAT : '^' -> type(CARAT);
INT_APOS_ARROW : '=>' -> type(ARROW);
INT_APOS_GRAVE : '`' -> type(GRAVE);
INT_APOS_CONCATENATION : '||' -> type(CONCATENATION);
INT_APOS_TILDE : '~' -> type(TILDE);
// KEYWORDS
INT_APOS_KW_ALLOWING: 'allowing' -> type(KW_ALLOWING);
INT_APOS_KW_ANCESTOR: 'ancestor' -> type(KW_ANCESTOR);
INT_APOS_KW_ANCESTOR_OR_SELF: 'ancestor-or-self' -> type(KW_ANCESTOR_OR_SELF);
INT_APOS_KW_AND: 'and' -> type(KW_AND);
INT_APOS_KW_ARRAY: 'array' -> type(KW_ARRAY);
INT_APOS_KW_AS: 'as' -> type(KW_AS);
INT_APOS_KW_ASCENDING: 'ascending' -> type(KW_ASCENDING);
INT_APOS_KW_AT: 'at' -> type(KW_AT);
INT_APOS_KW_ATTRIBUTE: 'attribute' -> type(KW_ATTRIBUTE);
INT_APOS_KW_BASE_URI: 'base-uri' -> type(KW_BASE_URI);
INT_APOS_KW_BOUNDARY_SPACE: 'boundary-space' -> type(KW_BOUNDARY_SPACE);
INT_APOS_KW_BINARY: 'binary' -> type(KW_BINARY);
INT_APOS_KW_BY: 'by' -> type(KW_BY);
INT_APOS_KW_CASE: 'case' -> type(KW_CASE);
INT_APOS_KW_CAST: 'cast' -> type(KW_CAST);
INT_APOS_KW_CASTABLE: 'castable' -> type(KW_CASTABLE);
INT_APOS_KW_CATCH: 'catch' -> type(KW_CATCH);
INT_APOS_KW_CHILD: 'child' -> type(KW_CHILD);
INT_APOS_KW_COLLATION: 'collation' -> type(KW_COLLATION);
INT_APOS_KW_COMMENT: 'comment' -> type(KW_COMMENT);
INT_APOS_KW_CONSTRUCTION: 'construction' -> type(KW_CONSTRUCTION);
INT_APOS_KW_CONTEXT: 'context' -> type(KW_CONTEXT);
INT_APOS_KW_COPY_NS: 'copy-namespaces' -> type(KW_COPY_NS);
INT_APOS_KW_COUNT: 'count' -> type(KW_COUNT);
INT_APOS_KW_DECLARE: 'declare' -> type(KW_DECLARE);
INT_APOS_KW_DEFAULT: 'default' -> type(KW_DEFAULT);
INT_APOS_KW_DESCENDANT: 'descendant' -> type(KW_DESCENDANT);
INT_APOS_KW_DESCENDANT_OR_SELF: 'descendant-or-self' -> type(KW_DESCENDANT_OR_SELF);
INT_APOS_KW_DESCENDING: 'descending' -> type(KW_DESCENDING);
INT_APOS_KW_DECIMAL_FORMAT: 'decimal-format' -> type(KW_DECIMAL_FORMAT);
INT_APOS_KW_DIV: 'div' -> type(KW_DIV);
INT_APOS_KW_DOCUMENT: 'document' -> type(KW_DOCUMENT);
INT_APOS_KW_DOCUMENT_NODE: 'document-node' -> type(KW_DOCUMENT_NODE);
INT_APOS_KW_ELEMENT: 'element' -> type(KW_ELEMENT);
INT_APOS_KW_ELSE: 'else' -> type(KW_ELSE);
INT_APOS_KW_EMPTY: 'empty' -> type(KW_EMPTY);
INT_APOS_KW_EMPTY_SEQUENCE: 'empty-sequence' -> type(KW_EMPTY_SEQUENCE);
INT_APOS_KW_ENCODING: 'encoding' -> type(KW_ENCODING);
INT_APOS_KW_END: 'end' -> type(KW_END);
INT_APOS_KW_EQ: 'eq' -> type(KW_EQ);
INT_APOS_KW_EVERY: 'every' -> type(KW_EVERY);
INT_APOS_KW_EXCEPT: 'except' -> type(KW_EXCEPT);
INT_APOS_KW_EXTERNAL: 'external' -> type(KW_EXTERNAL);
INT_APOS_KW_FOLLOWING: 'following' -> type(KW_FOLLOWING);
INT_APOS_KW_FOLLOWING_SIBLING: 'following-sibling' -> type(KW_FOLLOWING_SIBLING);
INT_APOS_KW_FOR: 'for' -> type(KW_FOR);
INT_APOS_KW_FUNCTION: 'function' -> type(KW_FUNCTION);
INT_APOS_KW_GE: 'ge' -> type(KW_GE);
INT_APOS_KW_GREATEST: 'greatest' -> type(KW_GREATEST);
INT_APOS_KW_GROUP: 'group' -> type(KW_GROUP);
INT_APOS_KW_GT: 'gt' -> type(KW_GT);
INT_APOS_KW_IDIV: 'idiv' -> type(KW_IDIV);
INT_APOS_KW_IF: 'if' -> type(KW_IF);
INT_APOS_KW_IMPORT: 'import' -> type(KW_IMPORT);
INT_APOS_KW_IN: 'in' -> type(KW_IN);
INT_APOS_KW_INHERIT: 'inherit' -> type(KW_INHERIT);
INT_APOS_KW_INSTANCE: 'instance' -> type(KW_INSTANCE);
INT_APOS_KW_INTERSECT: 'intersect' -> type(KW_INTERSECT);
INT_APOS_KW_IS: 'is' -> type(KW_IS);
INT_APOS_KW_ITEM: 'item' -> type(KW_ITEM);
INT_APOS_KW_LAX: 'lax' -> type(KW_LAX);
INT_APOS_KW_LE: 'le' -> type(KW_LE);
INT_APOS_KW_LEAST: 'least' -> type(KW_LEAST);
INT_APOS_KW_LET: 'let' -> type(KW_LET);
INT_APOS_KW_LT: 'lt' -> type(KW_LT);
INT_APOS_KW_MAP: 'map' -> type(KW_MAP);
INT_APOS_KW_MOD: 'mod' -> type(KW_MOD);
INT_APOS_KW_MODULE: 'module' -> type(KW_MODULE);
INT_APOS_KW_NAMESPACE: 'namespace' -> type(KW_NAMESPACE);
INT_APOS_KW_NE: 'ne' -> type(KW_NE);
INT_APOS_KW_NEXT: 'next' -> type(KW_NEXT);
INT_APOS_KW_NAMESPACE_NODE: 'namespace-node' -> type(KW_NAMESPACE_NODE);
INT_APOS_KW_NO_INHERIT: 'no-inherit' -> type(KW_NO_INHERIT);
INT_APOS_KW_NO_PRESERVE: 'no-preserve' -> type(KW_NO_PRESERVE);
INT_APOS_KW_NODE: 'node' -> type(KW_NODE);
INT_APOS_KW_OF: 'of' -> type(KW_OF);
INT_APOS_KW_ONLY: 'only' -> type(KW_ONLY);
INT_APOS_KW_OPTION: 'option' -> type(KW_OPTION);
INT_APOS_KW_OR: 'or' -> type(KW_OR);
INT_APOS_KW_ORDER: 'order' -> type(KW_ORDER);
INT_APOS_KW_ORDERED: 'ordered' -> type(KW_ORDERED);
INT_APOS_KW_ORDERING: 'ordering' -> type(KW_ORDERING);
INT_APOS_KW_PARENT: 'parent' -> type(KW_PARENT);
INT_APOS_KW_PRECEDING: 'preceding' -> type(KW_PRECEDING);
INT_APOS_KW_PRECEDING_SIBLING: 'preceding-sibling' -> type(KW_PRECEDING_SIBLING);
INT_APOS_KW_PRESERVE: 'preserve' -> type(KW_PRESERVE);
INT_APOS_KW_PREVIOUS: 'previous' -> type(KW_PREVIOUS);
INT_APOS_KW_PI: 'processing-instruction' -> type(KW_PI);
INT_APOS_KW_RETURN: 'return' -> type(KW_RETURN);
INT_APOS_KW_SATISFIES: 'satisfies' -> type(KW_SATISFIES);
INT_APOS_KW_SCHEMA: 'schema' -> type(KW_SCHEMA);
INT_APOS_KW_SCHEMA_ATTR: 'schema-attribute' -> type(KW_SCHEMA_ATTR);
INT_APOS_KW_SCHEMA_ELEM: 'schema-element' -> type(KW_SCHEMA_ELEM);
INT_APOS_KW_SELF: 'self' -> type(KW_SELF);
INT_APOS_KW_SLIDING: 'sliding' -> type(KW_SLIDING);
INT_APOS_KW_SOME: 'some' -> type(KW_SOME);
INT_APOS_KW_STABLE: 'stable' -> type(KW_STABLE);
INT_APOS_KW_START: 'start' -> type(KW_START);
INT_APOS_KW_STRICT: 'strict' -> type(KW_STRICT);
INT_APOS_KW_STRIP: 'strip' -> type(KW_STRIP);
INT_APOS_KW_SWITCH: 'switch' -> type(KW_SWITCH);
INT_APOS_KW_TEXT: 'text' -> type(KW_TEXT);
INT_APOS_KW_THEN: 'then' -> type(KW_THEN);
INT_APOS_KW_TO: 'to' -> type(KW_TO);
INT_APOS_KW_TREAT: 'treat' -> type(KW_TREAT);
INT_APOS_KW_TRY: 'try' -> type(KW_TRY);
INT_APOS_KW_TUMBLING: 'tumbling' -> type(KW_TUMBLING);
INT_APOS_KW_TYPE: 'type' -> type(KW_TYPE);
INT_APOS_KW_TYPESWITCH: 'typeswitch' -> type(KW_TYPESWITCH);
INT_APOS_KW_UNION: 'union' -> type(KW_UNION);
INT_APOS_KW_UNORDERED: 'unordered' -> type(KW_UNORDERED);
INT_APOS_KW_UPDATE: 'update' -> type(KW_UPDATE);
INT_APOS_KW_VALIDATE: 'validate' -> type(KW_VALIDATE);
INT_APOS_KW_VARIABLE: 'variable' -> type(KW_VARIABLE);
INT_APOS_KW_VERSION: 'version' -> type(KW_VERSION);
INT_APOS_KW_WHEN: 'when' -> type(KW_WHEN);
INT_APOS_KW_WHERE: 'where' -> type(KW_WHERE);
INT_APOS_KW_WINDOW: 'window' -> type(KW_WINDOW);
INT_APOS_KW_XQUERY: 'xquery' -> type(KW_XQUERY);
// MarkLogic JSON computed constructor
INT_APOS_KW_ARRAY_NODE: 'array-node' -> type(KW_ARRAY_NODE);
INT_APOS_KW_BOOLEAN_NODE: 'boolean-node' -> type(KW_BOOLEAN_NODE);
INT_APOS_KW_NULL_NODE: 'null-node' -> type(KW_NULL_NODE);
INT_APOS_KW_NUMBER_NODE: 'number-node' -> type(KW_NUMBER_NODE);
INT_APOS_KW_OBJECT_NODE: 'object-node' -> type(KW_OBJECT_NODE);
// eXist-db update keywords
INT_APOS_KW_REPLACE: 'replace' -> type(KW_REPLACE);
INT_APOS_KW_WITH: 'with' -> type(KW_WITH);
INT_APOS_KW_VALUE: 'value' -> type(KW_VALUE);
INT_APOS_KW_INSERT: 'insert' -> type(KW_INSERT);
INT_APOS_KW_INTO: 'into' -> type(KW_INTO);
INT_APOS_KW_DELETE: 'delete' -> type(KW_DELETE);
INT_APOS_KW_RENAME: 'rename' -> type(KW_RENAME);
// NAMES
INT_APOS_URIQualifiedName: 'Q' '{' (PredefinedEntityRef | CharRef | ~[&{}])* '}' NCName -> type(URIQualifiedName);
INT_APOS_FullQName: NCName ':' NCName -> type(FullQName);
INT_APOS_NCNameWithLocalWildcard: NCName ':' '*' -> type(NCNameWithLocalWildcard);
INT_APOS_NCNameWithPrefixWildcard: '*' ':' NCName -> type(NCNameWithPrefixWildcard);
INT_APOS_NCName: NameStartChar NameChar* -> type(NCName);
INT_APOS_XQDOC_COMMENT_START: '(:~' -> type(XQDOC_COMMENT_START);
INT_APOS_XQDOC_COMMENT_END: ':'+ ')' -> type(XQDOC_COMMENT_END);
INT_APOS_XQDocComment: '(' ':' '~' ( CHAR | ( ':' ~( ')' ) ) )* ':' ')' -> type(XQDocComment);
INT_APOS_XQComment: '(' ':' ~'~' (XQComment | '(' ~[:] | ':' ~[)] | ~[:(])* ':'* ':'+ ')' -> channel(HIDDEN), type(XQComment);
INT_APOS_CHAR: ( '\t' | '\n' | '\r' | '\u0020'..'\u0039' | '\u003B'..'\uD7FF' | '\uE000'..'\uFFFD' ) -> type(CHAR);
INT_APOS_ENTER_STRING : GRAVE GRAVE LBRACKET -> pushMode(STRING_MODE), type(ENTER_STRING);
INT_APOS_EXIT_INTERPOLATION : RBRACE GRAVE -> popMode, type(ENTER_INTERPOLATION);
INT_APOS_ContentChar: ~["'{}<&] -> type(ContentChar); |
test/Succeed/NoUniverseCheckPragma.agda | KDr2/agda | 0 | 4727 | <reponame>KDr2/agda
-- New feature by <NAME> in commit be89d4a8b264dd2719cb8c601a2c7f45a95ba220 :
-- disabling the universe check for a data or record type.
-- Andreas, 2018-10-27, re issue #3327: restructured test cases.
-- Andreas, 2019-07-16, issue #3916:
-- {-# NO_UNIVERSE_CHECK #-} should also disable the index sort check
-- for --cubical-compatible.
{-# OPTIONS --cubical-compatible #-}
module _ where
-- Switch off the index sort check
module BigHetEq where
{-# NO_UNIVERSE_CHECK #-}
data _≅_ {a}{A : Set a} (x : A) : {B : Set a} → B → Set where
refl : x ≅ x
module PittsHetEq where
{-# NO_UNIVERSE_CHECK #-}
data _≅_ {a}{A : Set a} (x : A) : {B : Set a} → B → Set a where
refl : x ≅ x
-- Pragma is naturally attached to definition.
module DataDef where
data U : Set
T : U → Set
{-# NO_UNIVERSE_CHECK #-}
data U where
pi : (A : Set)(b : A → U) → U
T (pi A b) = (x : A) → T (b x)
-- Pragma can also be attached to signature.
module DataSig where
{-# NO_UNIVERSE_CHECK #-}
data U : Set
T : U → Set
data U where
pi : (A : Set)(b : A → U) → U
T (pi A b) = (x : A) → T (b x)
-- Works also for explicit mutual blocks.
module Mutual where
{-# NO_UNIVERSE_CHECK #-}
data U : Set where
pi : (A : Set)(b : A → U) → U
T : U → Set
T (pi A b) = (x : A) → T (b x)
-- Records:
module Records where
{-# NO_UNIVERSE_CHECK #-}
record R : Set where
field out : Set
{-# NO_UNIVERSE_CHECK #-}
record S : Set
record S where
field out : Set
|
Transynther/x86/_processed/US/_zr_/i7-7700_9_0x48.log_14_2225.asm | ljhsiun2/medusa | 9 | 102517 | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r8
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_WC_ht+0x161ea, %rbx
nop
nop
nop
nop
sub %r12, %r12
mov $0x6162636465666768, %r8
movq %r8, (%rbx)
cmp $45570, %rdx
lea addresses_UC_ht+0x15036, %rbx
nop
nop
nop
nop
lfence
mov (%rbx), %dx
nop
add %rsi, %rsi
lea addresses_A_ht+0x1a146, %rsi
lea addresses_UC_ht+0x14c66, %rdi
nop
nop
nop
nop
nop
sub %r12, %r12
mov $89, %rcx
rep movsb
nop
add %rcx, %rcx
lea addresses_A_ht+0x7d46, %rcx
nop
nop
nop
nop
nop
dec %r12
movb (%rcx), %dl
nop
nop
add $22212, %rsi
lea addresses_normal_ht+0x1358e, %rsi
lea addresses_A_ht+0x25c6, %rdi
nop
nop
nop
add %r13, %r13
mov $23, %rcx
rep movsl
nop
nop
nop
nop
nop
inc %rcx
lea addresses_WC_ht+0x1dc46, %r12
nop
cmp $22726, %rdi
mov (%r12), %r8d
nop
nop
nop
inc %rsi
lea addresses_A_ht+0x14390, %rcx
nop
xor $11301, %r8
movb $0x61, (%rcx)
cmp $47157, %rbx
lea addresses_D_ht+0xd306, %r8
nop
nop
add $5476, %rsi
and $0xffffffffffffffc0, %r8
movaps (%r8), %xmm6
vpextrq $1, %xmm6, %r12
nop
nop
nop
nop
inc %rdi
lea addresses_WC_ht+0x10746, %rsi
dec %rdi
movb $0x61, (%rsi)
nop
nop
nop
nop
inc %rcx
lea addresses_D_ht+0x60ae, %rbx
nop
nop
cmp %r13, %r13
mov $0x6162636465666768, %r8
movq %r8, %xmm2
movups %xmm2, (%rbx)
nop
nop
inc %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r15
push %r8
push %rbp
push %rdi
// Load
lea addresses_US+0x1b746, %r10
nop
nop
cmp %rdi, %rdi
vmovups (%r10), %ymm6
vextracti128 $0, %ymm6, %xmm6
vpextrq $1, %xmm6, %r15
nop
nop
sub %rdi, %rdi
// Faulty Load
lea addresses_US+0x1b746, %r13
nop
nop
nop
nop
nop
xor %r15, %r15
vmovups (%r13), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %r8
lea oracles, %r10
and $0xff, %r8
shlq $12, %r8
mov (%r10,%r8,1), %r8
pop %rdi
pop %rbp
pop %r8
pop %r15
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': True, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_US', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 2, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 4, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 7, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 4, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 1, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': True, 'congruent': 5, 'size': 16, 'same': True, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 11, 'size': 1, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}}
{'00': 14}
00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
oeis/037/A037770.asm | neoneye/loda-programs | 11 | 242290 | ; A037770: Base 9 digits are, in order, the first n terms of the periodic sequence with initial period 3,0,2,1.
; Submitted by <NAME>
; 3,27,245,2206,19857,178713,1608419,14475772,130281951,1172537559,10552838033,94975542298,854779880685,7693018926165,69237170335487,623134533019384,5608210797174459
mov $2,3
lpb $0
sub $0,1
sub $2,1
add $1,$2
add $1,1
mul $1,9
add $2,14
bin $2,2
mod $2,4
lpe
add $1,$2
mov $0,$1
|
Task/Runge-Kutta-method/Ada/runge-kutta-method.ada | LaudateCorpus1/RosettaCodeData | 1 | 8056 | with Ada.Text_IO; use Ada.Text_IO;
with Ada.Numerics.Generic_Elementary_Functions;
procedure RungeKutta is
type Floaty is digits 15;
type Floaty_Array is array (Natural range <>) of Floaty;
package FIO is new Ada.Text_IO.Float_IO(Floaty); use FIO;
type Derivative is access function(t, y : Floaty) return Floaty;
package Math is new Ada.Numerics.Generic_Elementary_Functions (Floaty);
function calc_err (t, calc : Floaty) return Floaty;
procedure Runge (yp_func : Derivative; t, y : in out Floaty_Array;
dt : Floaty) is
dy1, dy2, dy3, dy4 : Floaty;
begin
for n in t'First .. t'Last-1 loop
dy1 := dt * yp_func(t(n), y(n));
dy2 := dt * yp_func(t(n) + dt / 2.0, y(n) + dy1 / 2.0);
dy3 := dt * yp_func(t(n) + dt / 2.0, y(n) + dy2 / 2.0);
dy4 := dt * yp_func(t(n) + dt, y(n) + dy3);
t(n+1) := t(n) + dt;
y(n+1) := y(n) + (dy1 + 2.0 * (dy2 + dy3) + dy4) / 6.0;
end loop;
end Runge;
procedure Print (t, y : Floaty_Array; modnum : Positive) is begin
for i in t'Range loop
if i mod modnum = 0 then
Put("y("); Put (t(i), Exp=>0, Fore=>0, Aft=>1);
Put(") = "); Put (y(i), Exp=>0, Fore=>0, Aft=>8);
Put(" Error:"); Put (calc_err(t(i),y(i)), Aft=>5);
New_Line;
end if;
end loop;
end Print;
function yprime (t, y : Floaty) return Floaty is begin
return t * Math.Sqrt (y);
end yprime;
function calc_err (t, calc : Floaty) return Floaty is
actual : constant Floaty := (t**2 + 4.0)**2 / 16.0;
begin return abs(actual-calc);
end calc_err;
dt : constant Floaty := 0.10;
N : constant Positive := 100;
t_arr, y_arr : Floaty_Array(0 .. N);
begin
t_arr(0) := 0.0;
y_arr(0) := 1.0;
Runge (yprime'Access, t_arr, y_arr, dt);
Print (t_arr, y_arr, 10);
end RungeKutta;
|
oeis/067/A067558.asm | neoneye/loda-programs | 11 | 8247 | ; A067558: Sum of squares of proper divisors of n.
; 0,1,1,5,1,14,1,21,10,30,1,66,1,54,35,85,1,131,1,146,59,126,1,274,26,174,91,266,1,400,1,341,131,294,75,615,1,366,179,610,1,736,1,626,341,534,1,1106,50,755,299,866,1,1184,147,1114,371,846,1,1860,1,966,581,1365,195,1744,1,1466,539,1600,1,2551,1,1374,885,1826,171,2416,1,2466,820,1686,1,3444,315,1854,851,2626,1,3730,219,2666,971,2214,387,4434,1,2651,1301,3671
mov $1,$0
mov $4,$0
cmp $4,0
add $0,$4
div $1,$0
add $0,1
mov $2,$0
sub $0,1
lpb $0
mov $3,$2
dif $3,$0
cmp $3,$2
cmp $3,0
mul $3,$0
sub $0,1
pow $3,2
add $1,$3
lpe
mov $0,$1
|
src/code/menu.asm | Hacktix/gb-tictactoe | 8 | 160221 | <gh_stars>1-10
SECTION "Main Menu", ROM0
;==============================================================
; Initializes everything required for displaying the main
; menu.
;==============================================================
InitMenu::
; Load sprite tile data
ld hl, $8000
ld bc, EndTilesSprites - TilesSprites
ld de, TilesSprites
rst Memcpy
; Load BG tile data
ld hl, $9000
ld bc, EndTilesMenu - TilesMenu
ld de, TilesMenu
rst Memcpy
; Load BG tilemap
ld hl, $9800
ld de, MapTitle
ld bc, EndMapTitle - MapTitle
rst Memcpy
; Clear OAM
call ClearOAM
; Load cursor sprite
ld hl, wShadowOAM
ld a, 120
ld [hli], a
ld a, 56
ld [hli], a
ld a, 12
ld [hli], a
ld a, HIGH(wShadowOAM)
call hOAMDMA
; Initialize CGB palettes if necessary
ld a, [wCGBFlag]
and a
jr nz, .noInitCGB
; Setup BGP palette writing
ld a, $80
ldh [rBCPS], a
ld hl, wMenuFadeInDataCGB
ld b, 4
; Write color values
.bgp0Loop
xor a
ld [hli], a
ld a, $ff
ldh [rBCPD], a
ld [hli], a
ld a, $7f
ldh [rBCPD], a
ld [hli], a
dec b
jr nz, .bgp0Loop
; Setup OBJ palette writing
ld a, $80
ldh [rOCPS], a
ld hl, cGameplayOBJ2
ld b, EndGameplayObjectPalettes - cGameplayOBJ2
; Write color values
.objLoop
ld a, [hli]
ld [rOCPD], a
dec b
jr nz, .objLoop
.noInitCGB
; Initialize DMG palettes for fadein
xor a
ld [rBGP], a
ld [rOBP0], a
; Initialize menu variables
ld [wSelectedGamemode], a
ld [wMenuFadeInState], a
ld [wMenuFadeInFinishCGB], a
ld a, MENU_FADEIN_TIMEOUT
ld [wMenuFadeInCooldown], a
; Set A to LCDC with sprites on/off depending on whether or not running on CGB
ld a, LCDCF_ON | LCDCF_BG8800 | LCDCF_BG9800 | LCDCF_WINOFF | LCDCF_OBJ8 | LCDCF_OBJOFF | LCDCF_BGON
ld b, a
ld a, [wCGBFlag]
and a
ld a, b
jr z, .endLoadLCDC
or LCDCF_OBJON
.endLoadLCDC
; Enable LCD
ld [rLCDC], a
; Enable Interrupts
xor a
ld [rIF], a
ei
ret
;==============================================================
; Main loop for displaying the main menu screen.
;==============================================================
MenuLoop::
; Make sure that VBlank handler ran first
rst WaitVBlank
; ---------------------------------------------------------
; Update menu fade in animation
; ---------------------------------------------------------
; Check if running on CGB
ld a, [wCGBFlag]
and a
jr nz, .fadeInDMG
; Check if fade in is completed (CGB)
ld a, [wMenuFadeInFinishCGB]
and a
jr nz, .skipFadeInAnim
; Check if timeout is 0 yet
ld hl, wMenuFadeInCooldown
dec [hl]
jr nz, MenuLoop ; Disallow input during fade in
; Reset Cooldown
ld a, MENU_FADEIN_TIMEOUT
ld [hl], a
; Call Update Function
call UpdateMenuFadeInCGB
jr MenuLoop
.fadeInDMG
; Check if fade in is already completed
ld a, [wMenuFadeInState]
cp 4
jr z, .skipFadeInAnim
; Check if timeout is 0 yet
ld hl, wMenuFadeInCooldown
dec [hl]
jr nz, MenuLoop ; Disallow input during fade in
; Reload timeout
ld a, MENU_FADEIN_TIMEOUT
ld [hl], a
; Update BGP
ld hl, wMenuFadeInState
ld a, [rBGP]
or [hl]
rrca
rrca
ld [rBGP], a
ld [rOBP0], a
inc [hl]
jr MenuLoop
.skipFadeInAnim
; ---------------------------------------------------------
; Check for UP/DOWN input and change selected option
; ---------------------------------------------------------
; Check if either up/down was pressed
ld a, [hPressedButtons]
and PADF_DOWN | PADF_UP
jr z, .noCursorMove ; Skip cursor update code if neither pressed
; Update selection
ld hl, wSelectedGamemode
dec [hl]
jr z, .updateSprite
inc [hl]
inc [hl]
; Update cursor sprite position
.updateSprite
ld a, [hl]
and a
jr nz, .updateSprite2Player
ld a, MENU_1PLAYER_Y
jr .endLoadCursorY
.updateSprite2Player
ld a, MENU_2PLAYER_Y
.endLoadCursorY
ld [wShadowOAM], a
; Request OAM DMA
ld a, HIGH(wShadowOAM)
ldh [hStartAddrOAM], a
; Play sound
ld de, MenuMoveBeep
call PlaySound
.noCursorMove
; ---------------------------------------------------------
; Check for game to be started on START press
; ---------------------------------------------------------
; Check if START was pressed
ld a, [hPressedButtons]
and PADF_START
jr z, MenuLoop ; Loop back to MenuLoop label if not pressed
; Play sound
ld de, MenuConfirmBeep
call PlaySound
; Disable LCD
xor a
ld [rLCDC], a
; Initialize main gameplay loop
call InitPlayingField
jp GameplayLoop
;==============================================================
; Updates palette registers for a fade-in animation on the
; CGB. Writes non-zero value to wMenuFadeInFinishCGB once all
; animations are done playing.
;==============================================================
UpdateMenuFadeInCGB::
; Set up RAM access
ld hl, cFadeInParamBGP0
ld de, wMenuFadeInDataCGB
ld c, $04
.updateColorLoop
; Check if sub count has reached target
ld a, [de]
cp [hl]
jr z, .skipUpdate
; Update sub count in RAM
ld a, [de]
inc a
ld [de], a
inc hl
inc de
; Update Color Values
ld a, [de]
sub [hl]
ld [de], a
push af ; Preserve Flags
inc de
inc hl
pop af
ld a, [de]
sbc [hl]
ld [de], a
inc de
inc hl
; Increment fade in state (none updated - zero)
ld a, [wMenuFadeInFinishCGB]
inc a
ld [wMenuFadeInFinishCGB], a
jr .endUpdateLoop
.skipUpdate
inc hl
inc hl
inc hl
inc de
inc de
inc de
.endUpdateLoop
dec c
jr nz, .updateColorLoop
; Adjust fade in state value if needed
ld a, [wMenuFadeInFinishCGB]
and a
jr z, .skipReset
xor a
jr .endStateReset
.skipReset
ld a, [rLCDC]
or LCDCF_OBJON
ldh [rLCDC], a
ld a, $ff
.endStateReset
ld [wMenuFadeInFinishCGB], a
; Set up palette writing
ld a, $80
ldh [rBCPS], a
ld b, 4
ld hl, wMenuFadeInDataCGB
; Update colors
.writeColorLoop
inc hl
ld a, [hli]
ld [rBCPD], a
ld a, [hli]
ld [rBCPD], a
dec b
jr nz, .writeColorLoop
ret |
tools-src/gnu/gcc/gcc/ada/exp_ch13.adb | enfoTek/tomato.linksys.e2000.nvram-mod | 80 | 8135 | <reponame>enfoTek/tomato.linksys.e2000.nvram-mod<gh_stars>10-100
------------------------------------------------------------------------------
-- --
-- GNAT COMPILER COMPONENTS --
-- --
-- E X P _ C H 1 3 --
-- --
-- B o d y --
-- --
-- $Revision$
-- --
-- Copyright (C) 1992-2001, Free Software Foundation, Inc. --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
-- ware Foundation; either version 2, or (at your option) any later ver- --
-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License --
-- for more details. You should have received a copy of the GNU General --
-- Public License distributed with GNAT; see file COPYING. If not, write --
-- to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, --
-- MA 02111-1307, USA. --
-- --
-- GNAT was originally developed by the GNAT team at New York University. --
-- Extensive contributions were provided by Ada Core Technologies Inc. --
-- --
------------------------------------------------------------------------------
with Atree; use Atree;
with Checks; use Checks;
with Einfo; use Einfo;
with Exp_Ch3; use Exp_Ch3;
with Exp_Ch6; use Exp_Ch6;
with Exp_Imgv; use Exp_Imgv;
with Exp_Util; use Exp_Util;
with Nlists; use Nlists;
with Nmake; use Nmake;
with Rtsfind; use Rtsfind;
with Sem; use Sem;
with Sem_Ch7; use Sem_Ch7;
with Sem_Ch8; use Sem_Ch8;
with Sem_Eval; use Sem_Eval;
with Sem_Util; use Sem_Util;
with Sinfo; use Sinfo;
with Snames; use Snames;
with Stand; use Stand;
with Stringt; use Stringt;
with Tbuild; use Tbuild;
with Uintp; use Uintp;
package body Exp_Ch13 is
------------------------------------------
-- Expand_N_Attribute_Definition_Clause --
------------------------------------------
-- Expansion action depends on attribute involved
procedure Expand_N_Attribute_Definition_Clause (N : Node_Id) is
Loc : constant Source_Ptr := Sloc (N);
Exp : constant Node_Id := Expression (N);
Ent : Entity_Id;
V : Node_Id;
begin
Ent := Entity (Name (N));
if Is_Type (Ent) then
Ent := Underlying_Type (Ent);
end if;
case Get_Attribute_Id (Chars (N)) is
-------------
-- Address --
-------------
when Attribute_Address =>
-- If there is an initialization which did not come from
-- the source program, then it is an artifact of our
-- expansion, and we suppress it. The case we are most
-- concerned about here is the initialization of a packed
-- array to all false, which seems inappropriate for a
-- variable to which an address clause is applied. The
-- expression may itself have been rewritten if the type is a
-- packed array, so we need to examine whether the original
-- node is in the source.
declare
Decl : constant Node_Id := Declaration_Node (Ent);
begin
if Nkind (Decl) = N_Object_Declaration
and then Present (Expression (Decl))
and then
not Comes_From_Source (Original_Node (Expression (Decl)))
then
Set_Expression (Decl, Empty);
end if;
end;
---------------
-- Alignment --
---------------
when Attribute_Alignment =>
-- As required by Gigi, we guarantee that the operand is an
-- integer literal (this simplifies things in Gigi).
if Nkind (Exp) /= N_Integer_Literal then
Rewrite
(Exp, Make_Integer_Literal (Loc, Expr_Value (Exp)));
end if;
------------------
-- External_Tag --
------------------
-- For the rep clause "for x'external_tag use y" generate:
-- xV : constant string := y;
-- Set_External_Tag (x'tag, xV'Address);
-- Register_Tag (x'tag);
-- note that register_tag has been delayed up to now because
-- the external_tag must be set before resistering.
when Attribute_External_Tag => External_Tag : declare
E : Entity_Id;
Old_Val : String_Id := Strval (Expr_Value_S (Exp));
New_Val : String_Id;
begin
-- Create a new nul terminated string if it is not already
if String_Length (Old_Val) > 0
and then Get_String_Char (Old_Val, String_Length (Old_Val)) = 0
then
New_Val := Old_Val;
else
Start_String (Old_Val);
Store_String_Char (Get_Char_Code (ASCII.NUL));
New_Val := End_String;
end if;
E :=
Make_Defining_Identifier (Loc,
New_External_Name (Chars (Ent), 'A'));
Insert_Action (N,
Make_Object_Declaration (Loc,
Defining_Identifier => E,
Constant_Present => True,
Object_Definition =>
New_Reference_To (Standard_String, Loc),
Expression =>
Make_String_Literal (Loc, Strval => New_Val)));
Insert_Actions (N, New_List (
Make_Procedure_Call_Statement (Loc,
Name => New_Reference_To (RTE (RE_Set_External_Tag), Loc),
Parameter_Associations => New_List (
Make_Attribute_Reference (Loc,
Attribute_Name => Name_Tag,
Prefix => New_Occurrence_Of (Ent, Loc)),
Make_Attribute_Reference (Loc,
Attribute_Name => Name_Address,
Prefix => New_Occurrence_Of (E, Loc)))),
Make_Procedure_Call_Statement (Loc,
Name => New_Reference_To (RTE (RE_Register_Tag), Loc),
Parameter_Associations => New_List (
Make_Attribute_Reference (Loc,
Attribute_Name => Name_Tag,
Prefix => New_Occurrence_Of (Ent, Loc))))));
end External_Tag;
------------------
-- Storage_Size --
------------------
when Attribute_Storage_Size =>
-- If the type is a task type, then assign the value of the
-- storage size to the Size variable associated with the task.
-- task_typeZ := expression
if Ekind (Ent) = E_Task_Type then
Insert_Action (N,
Make_Assignment_Statement (Loc,
Name => New_Reference_To (Storage_Size_Variable (Ent), Loc),
Expression =>
Convert_To (RTE (RE_Size_Type), Expression (N))));
-- For Storage_Size for an access type, create a variable to hold
-- the value of the specified size with name typeV and expand an
-- assignment statement to initialze this value.
elsif Is_Access_Type (Ent) then
V := Make_Defining_Identifier (Loc,
New_External_Name (Chars (Ent), 'V'));
Insert_Action (N,
Make_Object_Declaration (Loc,
Defining_Identifier => V,
Object_Definition =>
New_Reference_To (RTE (RE_Storage_Offset), Loc),
Expression =>
Convert_To (RTE (RE_Storage_Offset), Expression (N))));
Set_Storage_Size_Variable (Ent, Entity_Id (V));
end if;
-- Other attributes require no expansion
when others =>
null;
end case;
end Expand_N_Attribute_Definition_Clause;
----------------------------
-- Expand_N_Freeze_Entity --
----------------------------
procedure Expand_N_Freeze_Entity (N : Node_Id) is
E : constant Entity_Id := Entity (N);
E_Scope : Entity_Id;
S : Entity_Id;
In_Other_Scope : Boolean;
In_Outer_Scope : Boolean;
Decl : Node_Id;
begin
-- For object, with address clause, check alignment is OK
if Is_Object (E) then
Apply_Alignment_Check (E, N);
-- Only other items requiring any front end action are
-- types and subprograms.
elsif not Is_Type (E) and then not Is_Subprogram (E) then
return;
end if;
-- Here E is a type or a subprogram
E_Scope := Scope (E);
-- If we are freezing entities defined in protected types, they
-- belong in the enclosing scope, given that the original type
-- has been expanded away. The same is true for entities in task types,
-- in particular the parameter records of entries (Entities in bodies
-- are all frozen within the body). If we are in the task body, this
-- is a proper scope.
if Ekind (E_Scope) = E_Protected_Type
or else (Ekind (E_Scope) = E_Task_Type
and then not Has_Completion (E_Scope))
then
E_Scope := Scope (E_Scope);
end if;
S := Current_Scope;
while S /= Standard_Standard and then S /= E_Scope loop
S := Scope (S);
end loop;
In_Other_Scope := not (S = E_Scope);
In_Outer_Scope := (not In_Other_Scope) and then (S /= Current_Scope);
-- If the entity being frozen is defined in a scope that is not
-- currently on the scope stack, we must establish the proper
-- visibility before freezing the entity and related subprograms.
if In_Other_Scope then
New_Scope (E_Scope);
Install_Visible_Declarations (E_Scope);
if Ekind (E_Scope) = E_Package or else
Ekind (E_Scope) = E_Generic_Package or else
Is_Protected_Type (E_Scope) or else
Is_Task_Type (E_Scope)
then
Install_Private_Declarations (E_Scope);
end if;
-- If the entity is in an outer scope, then that scope needs to
-- temporarily become the current scope so that operations created
-- during type freezing will be declared in the right scope and
-- can properly override any corresponding inherited operations.
elsif In_Outer_Scope then
New_Scope (E_Scope);
end if;
-- If type, freeze the type
if Is_Type (E) then
Freeze_Type (N);
-- And for enumeration type, build the enumeration tables
if Is_Enumeration_Type (E) then
Build_Enumeration_Image_Tables (E, N);
end if;
-- If subprogram, freeze the subprogram
elsif Is_Subprogram (E) then
Freeze_Subprogram (N);
end if;
-- Analyze actions generated by freezing. The init_proc contains
-- source expressions that may raise constraint_error, and the
-- assignment procedure for complex types needs checks on individual
-- component assignments, but all other freezing actions should be
-- compiled with all checks off.
if Present (Actions (N)) then
Decl := First (Actions (N));
while Present (Decl) loop
if Nkind (Decl) = N_Subprogram_Body
and then (Chars (Defining_Entity (Decl)) = Name_uInit_Proc
or else Chars (Defining_Entity (Decl)) = Name_uAssign)
then
Analyze (Decl);
-- A subprogram body created for a renaming_as_body completes
-- a previous declaration, which may be in a different scope.
-- Establish the proper scope before analysis.
elsif Nkind (Decl) = N_Subprogram_Body
and then Present (Corresponding_Spec (Decl))
and then Scope (Corresponding_Spec (Decl)) /= Current_Scope
then
New_Scope (Scope (Corresponding_Spec (Decl)));
Analyze (Decl, Suppress => All_Checks);
Pop_Scope;
else
Analyze (Decl, Suppress => All_Checks);
end if;
Next (Decl);
end loop;
end if;
if In_Other_Scope then
if Ekind (Current_Scope) = E_Package then
End_Package_Scope (E_Scope);
else
End_Scope;
end if;
elsif In_Outer_Scope then
Pop_Scope;
end if;
end Expand_N_Freeze_Entity;
-------------------------------------------
-- Expand_N_Record_Representation_Clause --
-------------------------------------------
-- The only expansion required is for the case of a mod clause present,
-- which is removed, and translated into an alignment representation
-- clause inserted immediately after the record rep clause with any
-- initial pragmas inserted at the start of the component clause list.
procedure Expand_N_Record_Representation_Clause (N : Node_Id) is
Loc : constant Source_Ptr := Sloc (N);
Rectype : constant Entity_Id := Entity (Identifier (N));
Mod_Val : Uint;
Citems : List_Id;
Repitem : Node_Id;
AtM_Nod : Node_Id;
begin
if Present (Mod_Clause (N)) then
Mod_Val := Expr_Value (Expression (Mod_Clause (N)));
Citems := Pragmas_Before (Mod_Clause (N));
if Present (Citems) then
Append_List_To (Citems, Component_Clauses (N));
Set_Component_Clauses (N, Citems);
end if;
AtM_Nod :=
Make_Attribute_Definition_Clause (Loc,
Name => New_Reference_To (Base_Type (Rectype), Loc),
Chars => Name_Alignment,
Expression => Make_Integer_Literal (Loc, Mod_Val));
Set_From_At_Mod (AtM_Nod);
Insert_After (N, AtM_Nod);
Set_Mod_Clause (N, Empty);
end if;
-- If the record representation clause has no components, then
-- completely remove it. Note that we also have to remove
-- ourself from the Rep Item list.
if Is_Empty_List (Component_Clauses (N)) then
if First_Rep_Item (Rectype) = N then
Set_First_Rep_Item (Rectype, Next_Rep_Item (N));
else
Repitem := First_Rep_Item (Rectype);
while Present (Next_Rep_Item (Repitem)) loop
if Next_Rep_Item (Repitem) = N then
Set_Next_Rep_Item (Repitem, Next_Rep_Item (N));
exit;
end if;
Next_Rep_Item (Repitem);
end loop;
end if;
Rewrite (N,
Make_Null_Statement (Loc));
end if;
end Expand_N_Record_Representation_Clause;
end Exp_Ch13;
|
programs/oeis/103/A103754.asm | neoneye/loda | 22 | 165216 | ; A103754: Number of contiguous digits i in the counting numbers, for i=0.
; 1,1,1,1,1,1,1,1,1,1,2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,2,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,2
add $0,9
gcd $0,19
div $0,18
add $0,1
|
libsrc/vz/vz_midstr.asm | andydansby/z88dk-mk2 | 1 | 510 | <filename>libsrc/vz/vz_midstr.asm
; CALLER LINKAGE FOR FUNCTION POINTERS
XLIB vz_midstr
LIB vz_midstr_callee
XREF ASMDISP_VZ_MIDSTR_CALLEE
.vz_midstr
pop af
pop de
pop hl
push hl
push de
push af
jp vz_midstr_callee + ASMDISP_VZ_MIDSTR_CALLEE
|
test/Succeed/PolarityAbstract.agda | shlevy/agda | 3 | 3972 | <filename>test/Succeed/PolarityAbstract.agda<gh_stars>1-10
-- Andreas, 2015-07-01 polarity needs to be computed for abstract defs.
-- See also issue 1599 for the same problem with positivity.
-- {-# OPTIONS -v tc.pos:10 -v tc.polarity:20 #-}
open import Common.Size
open import Common.Prelude
data D (i : Size) : Set where
c : ∀ (j : Size< i) → D i
abstract
E : Bool → Size → Set
E true i = D i
E false i = D i
cast : ∀{i b} → E b i → E b (↑ i)
cast x = x
-- should succeed
|
lemmas-freshG.agda | hazelgrove/hazel-palette-agda | 4 | 132 | open import Prelude
open import core
open import contexts
module lemmas-freshG where
-- the def above buries the sort of obvious pattern matching we'd like to
-- do on the freshness in the conclusion, so we need lemmas that extract
-- it for each constructor
freshΓ-asc : {A : Set} → {Γ : A ctx} → ∀{e τ} → freshΓ Γ (e ·: τ) → freshΓ Γ e
freshΓ-asc fr x x₁ with fr x x₁
freshΓ-asc fr x x₁ | FRHAsc qq = qq
freshΓ-ap1 : {A : Set} → {Γ : A ctx} → ∀{e1 e2} → freshΓ Γ (e1 ∘ e2) → freshΓ Γ e1
freshΓ-ap1 fr x y with fr x y
freshΓ-ap1 fr x y | FRHAp qq qq₁ = qq
freshΓ-ap2 : {A : Set} → {Γ : A ctx} → ∀{e1 e2} → freshΓ Γ (e1 ∘ e2) → freshΓ Γ e2
freshΓ-ap2 fr x y with fr x y
freshΓ-ap2 fr x y | FRHAp qq qq₁ = qq₁
freshΓ-nehole : {A : Set} → {Γ : A ctx} → ∀{e u} → freshΓ Γ (⦇⌜ e ⌟⦈[ u ]) → freshΓ Γ e
freshΓ-nehole fr x y with fr x y
freshΓ-nehole fr x y | FRHNEHole qq = qq
freshΓ-lam1 : {A : Set} → {Γ : A ctx} → ∀{e x} → freshΓ Γ (·λ x e) → freshΓ Γ e
freshΓ-lam1 fr x y with fr x y
freshΓ-lam1 fr x y | FRHLam1 x₂ qq = qq
freshΓ-lam2 : {A : Set} → {Γ : A ctx} → ∀{e τ x} → freshΓ Γ (·λ_[_]_ x τ e) → freshΓ Γ e
freshΓ-lam2 fr x y with fr x y
freshΓ-lam2 fr x y | FRHLam2 x₂ qq = qq
lem-fresh-lam1 : ∀{x e} → freshe x (·λ x e) → ⊥
lem-fresh-lam1 (FRHLam1 x₁ f) = x₁ refl
lem-fresh-lam2 : ∀{x τ e} → freshe x (·λ x [ τ ] e) → ⊥
lem-fresh-lam2 (FRHLam2 x₁ f) = x₁ refl
freshΓ-pair1 : {A : Set} → {Γ : A ctx} → ∀{e1 e2} → freshΓ Γ ⟨ e1 , e2 ⟩ → freshΓ Γ e1
freshΓ-pair1 fr x y with fr x y
freshΓ-pair1 fr x y | FRHPair qq qq₁ = qq
freshΓ-pair2 : {A : Set} → {Γ : A ctx} → ∀{e1 e2} → freshΓ Γ ⟨ e1 , e2 ⟩ → freshΓ Γ e2
freshΓ-pair2 fr x y with fr x y
freshΓ-pair2 fr x y | FRHPair qq qq₁ = qq₁
freshΓ-fst : {A : Set} → {Γ : A ctx} → ∀{e} → freshΓ Γ (fst e) → freshΓ Γ e
freshΓ-fst fr x x₁ with fr x x₁
freshΓ-fst fr x x₁ | FRHFst qq = qq
freshΓ-snd : {A : Set} → {Γ : A ctx} → ∀{e} → freshΓ Γ (snd e) → freshΓ Γ e
freshΓ-snd fr x x₁ with fr x x₁
freshΓ-snd fr x x₁ | FRHSnd qq = qq
fresh-freshΓ : {A : Set} {τ : A} → ∀{x e} → freshe x e → freshΓ (■ (x , τ)) e
fresh-freshΓ fr x y with lem-dom-eq y
fresh-freshΓ fr x y | refl = fr
|
programs/oeis/060/A060960.asm | karttu/loda | 1 | 23280 | ; A060960: Duplicate of A073642.
; 0,1,1,2,2,3,3,3,3,4,4,5,5,6,6,4,4,5,5,6,6,7,7,7,7,8,8,9,9,10,10,5,5,6
add $0,1
cal $0,73642 ; Replace 2^k in the binary representation of n with k (i.e., if n = 2^a + 2^b + 2^c + ... then a(n) = a + b + c + ...).
mov $1,$0
|
archive/agda-3/src/Oscar/Class/Surjtranscommutativity.agda | m0davis/oscar | 0 | 16937 | <reponame>m0davis/oscar
open import Oscar.Prelude
open import Oscar.Class
open import Oscar.Class.Surjection
open import Oscar.Class.Smap
open import Oscar.Class.Transitivity
module Oscar.Class.Surjtranscommutativity where
module Surjtranscommutativity
{𝔬₁} {𝔒₁ : Ø 𝔬₁}
{𝔯₁} (_∼₁_ : 𝔒₁ → 𝔒₁ → Ø 𝔯₁)
{𝔬₂} {𝔒₂ : Ø 𝔬₂}
{𝔯₂} (_∼₂_ : 𝔒₂ → 𝔒₂ → Ø 𝔯₂)
{ℓ₂} (_∼̇₂_ : ∀ {x y} → x ∼₂ y → x ∼₂ y → Ø ℓ₂) (let infix 4 _∼̇₂_ ; _∼̇₂_ = _∼̇₂_)
{surjection : Surjection.type 𝔒₁ 𝔒₂}
(smap : Smap.type _∼₁_ _∼₂_ surjection surjection)
(transitivity₁ : Transitivity.type _∼₁_)
(let infixr 9 _∙₁_
_∙₁_ : FlipTransitivity.type _∼₁_
_∙₁_ g f = transitivity₁ f g)
(transitivity₂ : Transitivity.type _∼₂_)
(let infixr 9 _∙₂_
_∙₂_ : FlipTransitivity.type _∼₂_
_∙₂_ g f = transitivity₂ f g)
= ℭLASS (_∼₁_ ,, _∼₂_ ,, (λ {x y} → _∼̇₂_ {x} {y}) ,, surjection ,, (λ {x y} → smap {x} {y}) ,, (λ {x y z} → transitivity₁ {x} {y} {z}) ,, (λ {x y z} → transitivity₂ {x} {y} {z})) (∀ {x y z} (f : x ∼₁ y) (g : y ∼₁ z) → smap (g ∙₁ f) ∼̇₂ smap g ∙₂ smap f)
module Surjtranscommutativity!
{𝔬₁} {𝔒₁ : Ø 𝔬₁}
{𝔯₁} (_∼₁_ : 𝔒₁ → 𝔒₁ → Ø 𝔯₁)
{𝔬₂} {𝔒₂ : Ø 𝔬₂}
{𝔯₂} (_∼₂_ : 𝔒₂ → 𝔒₂ → Ø 𝔯₂)
{ℓ₂} (_∼̇₂_ : ∀ {x y} → x ∼₂ y → x ∼₂ y → Ø ℓ₂) (let infix 4 _∼̇₂_ ; _∼̇₂_ = _∼̇₂_)
⦃ I1 : Surjection.class 𝔒₁ 𝔒₂ ⦄
⦃ I2 : Smap!.class _∼₁_ _∼₂_ ⦄
⦃ I3 : Transitivity.class _∼₁_ ⦄
⦃ I4 : Transitivity.class _∼₂_ ⦄
= Surjtranscommutativity (_∼₁_) (_∼₂_) (λ {x y} → _∼̇₂_ {x} {y}) smap transitivity transitivity
module _
{𝔬₁} {𝔒₁ : Ø 𝔬₁}
{𝔯₁} {_∼₁_ : 𝔒₁ → 𝔒₁ → Ø 𝔯₁}
{𝔬₂} {𝔒₂ : Ø 𝔬₂}
{𝔯₂} {_∼₂_ : 𝔒₂ → 𝔒₂ → Ø 𝔯₂}
{ℓ₂} {_∼̇₂_ : ∀ {x y} → x ∼₂ y → x ∼₂ y → Ø ℓ₂}
{surjection : Surjection.type 𝔒₁ 𝔒₂}
{smap : Smap.type _∼₁_ _∼₂_ surjection surjection}
{transitivity₁ : Transitivity.type _∼₁_}
{transitivity₂ : Transitivity.type _∼₂_}
where
surjtranscommutativity = Surjtranscommutativity.method _∼₁_ _∼₂_ _∼̇₂_ smap transitivity₁ transitivity₂
⟪∙⟫-surjtranscommutativity-syntax = surjtranscommutativity
syntax ⟪∙⟫-surjtranscommutativity-syntax f g = g ⟪∙⟫ f
module _
{𝔬₁} {𝔒₁ : Ø 𝔬₁}
{𝔯₁} {_∼₁_ : 𝔒₁ → 𝔒₁ → Ø 𝔯₁}
{𝔬₂} {𝔒₂ : Ø 𝔬₂}
{𝔯₂} {_∼₂_ : 𝔒₂ → 𝔒₂ → Ø 𝔯₂}
{ℓ₂} {_∼̇₂_ : ∀ {x y} → x ∼₂ y → x ∼₂ y → Ø ℓ₂}
⦃ _ : Surjection.class 𝔒₁ 𝔒₂ ⦄
⦃ _ : Smap!.class _∼₁_ _∼₂_ ⦄
⦃ _ : Transitivity.class _∼₁_ ⦄
⦃ _ : Transitivity.class _∼₂_ ⦄
where
surjtranscommutativity! = Surjtranscommutativity!.method _∼₁_ _∼₂_ _∼̇₂_ ⦃ ! ⦄ ⦃ ! ⦄ ⦃ ! ⦄ ⦃ ! ⦄
⟪∙⟫!-surjtranscommutativity-syntax = surjtranscommutativity!
syntax ⟪∙⟫!-surjtranscommutativity-syntax f g = g ⟪∙⟫! f
module _
{𝔬₁} {𝔒₁ : Ø 𝔬₁}
{𝔯₁} {_∼₁_ : 𝔒₁ → 𝔒₁ → Ø 𝔯₁}
{𝔬₂} {𝔒₂ : Ø 𝔬₂}
{𝔯₂} {_∼₂_ : 𝔒₂ → 𝔒₂ → Ø 𝔯₂}
{ℓ₂} (_∼̇₂_ : ∀ {x y} → x ∼₂ y → x ∼₂ y → Ø ℓ₂)
{surjection : Surjection.type 𝔒₁ 𝔒₂}
{smap : Smap.type _∼₁_ _∼₂_ surjection surjection}
{transitivity₁ : Transitivity.type _∼₁_}
{transitivity₂ : Transitivity.type _∼₂_}
where
surjtranscommutativity[_] = Surjtranscommutativity.method _∼₁_ _∼₂_ _∼̇₂_ smap transitivity₁ transitivity₂
⟪∙⟫-surjtranscommutativity[]-syntax = surjtranscommutativity[_]
syntax ⟪∙⟫-surjtranscommutativity[]-syntax t f g = g ⟪∙⟫[ t ] f
module _
{𝔬₁} {𝔒₁ : Ø 𝔬₁}
{𝔯₁} {_∼₁_ : 𝔒₁ → 𝔒₁ → Ø 𝔯₁}
{𝔬₂} {𝔒₂ : Ø 𝔬₂}
{𝔯₂} {_∼₂_ : 𝔒₂ → 𝔒₂ → Ø 𝔯₂}
{ℓ₂} (_∼̇₂_ : ∀ {x y} → x ∼₂ y → x ∼₂ y → Ø ℓ₂)
⦃ _ : Surjection.class 𝔒₁ 𝔒₂ ⦄
⦃ _ : Smap!.class _∼₁_ _∼₂_ ⦄
⦃ _ : Transitivity.class _∼₁_ ⦄
⦃ _ : Transitivity.class _∼₂_ ⦄
where
surjtranscommutativity![_] = Surjtranscommutativity!.method _∼₁_ _∼₂_ _∼̇₂_ ⦃ ! ⦄ ⦃ ! ⦄ ⦃ ! ⦄ ⦃ ! ⦄
⟪∙⟫!-surjtranscommutativity[]-syntax = surjtranscommutativity![_]
syntax ⟪∙⟫!-surjtranscommutativity[]-syntax t f g = g ⟪∙⟫![ t ] f
|
tests/src/test_utils.ads | Fabien-Chouteau/COBS | 0 | 18043 | with System.Storage_Elements; use System.Storage_Elements;
with Ada.Containers.Vectors;
with Ada.Unchecked_Deallocation;
with AAA.Strings;
private with Ada.Containers.Indefinite_Vectors;
package Test_Utils is
package Data_Frame_Package
is new Ada.Containers.Vectors (Storage_Count, Storage_Element);
type Data_Frame is new Data_Frame_Package.Vector with null record;
type Storage_Array_Access is access all Storage_Array;
procedure Free is new Ada.Unchecked_Deallocation (Storage_Array,
Storage_Array_Access);
function From_Array (Data : Storage_Array) return Data_Frame;
function To_Array_Access (Data : Data_Frame'Class)
return Storage_Array_Access;
function Hex_Dump (Data : Data_Frame'Class) return AAA.Strings.Vector;
function Diff (A, B : Data_Frame'Class;
A_Name : String := "Expected";
B_Name : String := "Output";
Skip_Header : Boolean := False)
return AAA.Strings.Vector;
function Image (D : Storage_Array) return String;
function Image (D : Data_Frame) return String;
type Abstract_Data_Processing is abstract tagged limited private;
function Number_Of_Frames (This : Abstract_Data_Processing)
return Storage_Count;
-- Return the number of output data frames available
procedure Clear (This : in out Abstract_Data_Processing)
with Post => This.Number_Of_Frames = 0;
function Get_Frame (This : Abstract_Data_Processing'Class;
Index : Storage_Count)
return Data_Frame
with Pre => Index <= This.Number_Of_Frames - 1;
-- Return an output data frames from it index
private
package Data_Frame_Vectors
is new Ada.Containers.Indefinite_Vectors (Storage_Count, Data_Frame);
type Abstract_Data_Processing is abstract tagged limited record
Frames : Data_Frame_Vectors.Vector;
Current_Frame : Data_Frame;
end record;
procedure Start_New_Frame (This : in out Abstract_Data_Processing);
procedure Push_To_Frame (This : in out Abstract_Data_Processing;
Data : Storage_Element);
procedure Save_Frame (This : in out Abstract_Data_Processing);
end Test_Utils;
|
libsrc/newbrain/nb_gets.asm | dex4er/deb-z88dk | 1 | 1461 | ;
; Grundy Newbrain Specific libraries
;
; <NAME> - 06/06/2007
;
;
; - - - - - - - - - - - - - - - - - - - - -
;
; get a string from stream
;
; - - - - - - - - - - - - - - - - - - - - -
;
; char *nb_gets( int stream, char *bytes );
;
; - - - - - - - - - - - - - - - - - - - - -
;
;
; $Id: nb_gets.asm,v 1.1 2007/06/08 15:15:21 stefano Exp $
;
XLIB nb_gets
LIB ZCALL
.nb_gets
ld ix,2
add ix,sp
ld e,(ix+2) ; stream
ld l,(ix+0) ; block location
ld h,(ix+1)
push hl
ld bc,255 ; read max 255 bytes
call ZCALL
defb $3c ; zblkin
ld a,255
sub c ; number of read bytes
ld e,a
ld d,0
pop hl
push hl
add hl,de
dec hl ; we overwrite the last <CR>
ld (hl),d ; with zero
pop hl
ret
|
iod/par/cknm.asm | olifink/smsqe | 0 | 14842 | <filename>iod/par/cknm.asm
; Check PAR/SER name V2.00 1989 <NAME>
section par
xdef par_cknm
xdef par_pprty
xdef par_phand
xdef par_ptrn
xdef par_pcr
xdef par_pff
xref iou_dnam
include 'dev8_keys_err'
include 'dev8_keys_par'
;+++
; PAR / SER check name
;
; d4 r -1 PRT, 0 (PAR/PRT) or prd_ser1 (SER) (for prt_use)
; d5 r -1 output only, 0 input and output, 1 input only
; a0 c p pointer to name
; a2 c p pointer to space for parameters
; a3 c p pointer to linkage block (uses prd_ pare, sere, prt, prtd)
;
;---
par_cknm
pckn.reg reg d6/d7/a0/a3
frame equ 12
movem.l pckn.reg,-(sp)
sub.w #frame,sp
move.w (a0)+,d7 ; number of characters
cmp.w #3,d7 ; enough?
blo.l pckn_fdnf
cmp.w #9,d7 ; too many
bhi.l pckn_fdnf
move.l #$dfdfdfff,d6
and.l (a0)+,d6 ; first four
move.b #' ',d6 ; and the first three
move.w prd_prt(a3),d0 ; PRT possible?
beq.s pckn_par
cmp.l #'PRT ',d6 ; PRT?
bne.s pckn_par ; ... no, try PAR
cmp.w #3,d7 ; ... just PRT?
bne.l pckn_fdnf
moveq #-1,d4
moveq #-1,d5 ; output only
lea prd_prt(a3,d0.w),a0 ; actual name
move.w (a0)+,d7
move.l (a0)+,d6 ; PRT device
bra.s pckn_snm ; check the rest of the name
pckn_par
cmp.l #'PAR ',d6 ; is it PAR?
bne.s pckn_ser ; ... no
moveq #0,d4 ; PAR device
moveq #-1,d5 ; output only
tst.b prd_pare(a3) ; is PAR enabled?
bne.s pckn_snm ; ... yes
pckn_ser
tst.b prd_sere(a3) ; is SER enabled?
beq.s pckn_fdnf ; .. no
moveq #prd_ser1/2,d4
add.w d4,d4
moveq #0,d5 ; assume bidirectional
cmp.l #'SER ',d6
beq.s pckn_snm ; ... it is
moveq #-1,d5 ; output only?
cmp.l #'STX ',d6
beq.s pckn_snm
moveq #1,d5 ; input only?
cmp.l #'SRX ',d6
bne.s pckn_fdnf
pckn_snm
move.l sp,a3
move.w d7,(a3)+
move.l #'SER ',(a3)+ ; put parameters
move.b -1(a0),-1(a3)
move.l (a0)+,(a3)+
move.w (a0)+,(a3)+
move.l sp,a0
move.l a2,a3
jsr iou_dnam ; decode name
bra.s pckn_exit
bra.s pckn_exit
bra.s pckn_exok
dc.w 3,'SER'
dc.w 6
dc.w -1,1 ; number
par_pprty
dc.w 4,'OEMS' ; parity
par_phand
dc.w 3,'HIX' ; handshake
par_ptrn
dc.w 2,'DT' ; translate
par_pcr
dc.w 3,'RCA' ; <CR>
par_pff
dc.w 2,'FZ' ; <FF> or CTRL Z
pckn_fdnf
moveq #err.fdnf,d0
bra.s pckn_exit
pckn_exok
move.w (a3),d0 ; port number
beq.s pckn_inam ; bad
subq.w #4,d0
bhi.s pckn_inam
moveq #0,d0
pckn_exit
add.w #frame,sp
movem.l (sp)+,pckn.reg
rts
pckn_inam
moveq #err.inam,d0
bra.s pckn_exit
end
|
3-mid/impact/source/3d/collision/shapes/impact-d3-shape-convex.adb | charlie5/lace | 20 | 19726 | with ada.unchecked_Conversion;
with impact.d3.Shape.convex,
impact.d3.Shape.convex.internal.polyhedral.triangle,
impact.d3.Shape.convex.internal.sphere,
impact.d3.Shape.convex.internal.cylinder,
impact.d3.Shape.convex.internal.polyhedral.hull;
-- btCapsuleShape, -- obsolete
with impact.d3.Transform,
impact.d3.collision.Proxy,
impact.d3.Shape.convex.internal.polyhedral.box,
impact.d3.Shape.convex.internal.polyhedral.triangle,
-- impact.d3.Shape.convex.internal.cylinder,
-- impact.d3.convex_HullShape,
impact.d3.Vector,
impact.d3.Matrix,
interfaces.c.Pointers;
with impact.d3.Scalar;
with impact.d3.Shape.convex.internal.polyhedral;
package body impact.d3.Shape.convex
--
--
--
is
type Vector_3s is array (Positive range <>) of aliased Vector_3;
package vector_Pointers is new interfaces.c.Pointers (Positive, Vector_3, Vector_3s, (0.0, 0.0, 0.0));
function convexHullSupport (localDirOrg : in Vector_3;
points : access Vector_3;
numPoints : in Integer;
localScaling : in Vector_3) return Vector_3
is
use Interfaces, vector_Pointers, impact.d3.Vector;
the_Points : Vector_3s renames Value (points.all'Access,
c.ptrdiff_t (numPoints));
vec : constant Vector_3 := Scaled (localDirOrg, by => localScaling);
newDot : Real;
maxDot : Real := Real'First;
ptIndex : Integer := -1;
supVec : Vector_3;
begin
for i in 1 .. numPoints loop
newDot := dot (vec, the_Points (i));
if newDot > maxDot then
maxDot := newDot;
ptIndex := i;
end if;
end loop;
pragma Assert (ptIndex >= 1);
supVec := Scaled (the_Points (ptIndex), by => localScaling);
return supVec;
end convexHullSupport;
type Box_view is access all impact.d3.Shape.convex.internal.polyhedral.box.Item'Class;
type Triangle_view is access all impact.d3.Shape.convex.internal.polyhedral.triangle.Item'Class;
function localGetSupportVertexWithoutMarginNonVirtual (Self : in Item'Class; localDir : in Vector_3) return Vector_3
is
use impact.d3.collision.Proxy;
begin
case Self.getShapeType
is
when SPHERE_SHAPE_PROXYTYPE =>
return (0.0, 0.0, 0.0);
when BOX_SHAPE_PROXYTYPE =>
declare
use Standard.impact.d3.Scalar;
convexShape : constant impact.d3.Shape.convex.internal.polyhedral.box.item'Class := impact.d3.Shape.convex.internal.polyhedral.box.item'Class (Self);
halfExtents : constant Vector_3 := convexShape.getImplicitShapeDimensions;
begin
return (btFsels (localDir (1), halfExtents (1), -halfExtents (1)),
btFsels (localDir (2), halfExtents (2), -halfExtents (2)),
btFsels (localDir (3), halfExtents (3), -halfExtents (3)));
end;
when TRIANGLE_SHAPE_PROXYTYPE =>
declare
use impact.d3.Vector;
triangleShape : impact.d3.Shape.convex.internal.polyhedral.triangle.item'Class := impact.d3.Shape.convex.internal.polyhedral.triangle.item'Class (Self);
dir : constant Vector_3 := (localDir (1), localDir (2), localDir (3));
vertices : constant array (1 .. 3) of access Vector_3 := (triangleShape.m_vertices1 (1)'Access,
triangleShape.m_vertices1 (2)'Access,
triangleShape.m_vertices1 (3)'Access);
dots : constant Vector_3 := (dot (dir, vertices (1).all),
dot (dir, vertices (2).all),
dot (dir, vertices (3).all));
sup : constant Vector_3 := vertices (maxAxis (dots)).all;
begin
return sup;
end;
when CYLINDER_SHAPE_PROXYTYPE =>
declare
cylShape : constant impact.d3.Shape.convex.internal.cylinder.item'Class := impact.d3.Shape.convex.internal.cylinder.item'Class (Self);
-- mapping of halfextents/dimension onto radius/height depends on how cylinder local orientation is (upAxis)
halfExtents : Vector_3 := cylShape.getImplicitShapeDimensions;
v : Vector_3 := (localDir (1), localDir (2), localDir (3));
cylinderUpAxis : constant Integer := cylShape.getUpAxis;
XX : Integer := 2;
YY : Integer := 1;
ZZ : Integer := 3;
begin
case cylinderUpAxis is
when 1 =>
XX := 2;
YY := 1;
ZZ := 3;
when 2 =>
XX := 1;
YY := 2;
ZZ := 3;
when 3 =>
XX := 1;
YY := 3;
ZZ := 2;
when others =>
pragma Assert (False);
raise Program_Error;
end case;
declare
use math.Functions;
radius : constant Real := halfExtents (XX);
halfHeight : constant Real := halfExtents (cylinderUpAxis);
tmp : Vector_3;
d : Real;
s : constant Real := sqRt (v (XX) * v (XX) + v (ZZ) * v (ZZ));
begin
if s /= 0.0 then
d := radius / s;
tmp (XX) := v (XX) * d;
if v (YY) < 0.0 then
tmp (YY) := -halfHeight;
else
tmp (YY) := halfHeight;
end if;
tmp (ZZ) := v (ZZ) * d;
return tmp;
else
tmp (XX) := radius;
if v (YY) < 0.0 then
tmp (YY) := -halfHeight;
else
tmp (YY) := halfHeight;
end if;
tmp (ZZ) := 0.0;
return tmp;
end if;
end;
end;
-- when CAPSULE_SHAPE_PROXYTYPE => -- nb: capsules are provided by multi-sphere, so this is probably obsolete ?
-- declare
-- capsuleShape : access btCapsuleShape.item := btCapsuleShape.view (Self);
--
-- vec0 : Vector_3 := localDir;
-- halfHeight : Scalar := capsuleShape.getHalfHeight;
-- capsuleUpAxis : Integer := capsuleShape.getUpAxis;
--
-- radius : Scalar := capsuleShape.getRadius;
-- supVec : Vector_3 := (0.0, 0.0, 0.0);
--
-- maxDot : Scalar := -BT_LARGE_FLOAT;
--
-- vec : Vector_3 := vec0;
-- lenSqr : Scalar := length2 (vec);
--
-- pos,
-- vtx : Vector_3;
--
-- newDot,
-- rlen : Scalar;
-- begin
-- if lenSqr < 0.0001 then
-- vec := (1.0, 0.0, 0.0);
-- else
-- rlen := 1.0 / sqRt (lenSqr);
-- vec := vec * rlen;
-- end if;
--
-- pos := (0.0, 0.0, 0.0);
-- pos (capsuleUpAxis) := halfHeight;
--
-- -- vtx = pos +vec*(radius);
-- vtx := pos + vec * capsuleShape.getLocalScalingNV * radius - vec * capsuleShape.getMarginNV;
-- newDot := dot (vec, vtx);
--
-- if newDot > maxDot then
-- maxDot := newDot;
-- supVec := vtx;
-- end if;
--
-- pos := (0.0, 0.0, 0.0);
-- pos (capsuleUpAxis) := -halfHeight;
--
-- -- vtx = pos +vec*(radius);
-- vtx := pos + vec * capsuleShape.getLocalScalingNV * radius - vec * capsuleShape.getMarginNV;
-- newDot := dot (vec, vtx);
--
-- if newDot > maxDot then
-- maxDot := newDot;
-- supVec := vtx;
-- end if;
--
-- return supVec;
-- end;
--
-- when CONVEX_POINT_CLOUD_SHAPE_PROXYTYPE =>
-- declare
-- convexPointCloudShape : access impact.d3.Shape.convex.internal.polyhedral.point_cloud.item := impact.d3.Shape.convex.internal.polyhedral.point_cloud.view (Self);
-- points : access impact.d3.Vector := convexPointCloudShape.getUnscaledPoints;
-- numPoints : Integer := convexPointCloudShape.getNumPoints;
-- begin
-- return convexHullSupport (localDir, points, numPoints, convexPointCloudShape.getLocalScalingNV);
-- end;
--
when CONVEX_HULL_SHAPE_PROXYTYPE =>
declare
package hull_Shape renames impact.d3.Shape.convex.internal.polyhedral.hull;
type Vector_3_view is access all math.Vector_3;
type c_Vector_3_view is access all c_Vector_3;
function to_Vector_3_view is new ada.unchecked_Conversion (c_Vector_3_view, Vector_3_view); -- tbd: Remove/improve this.
convexHullShape : constant hull_Shape.item'Class := hull_Shape.item'Class (Self);
points : constant Vector_3_view := to_Vector_3_view (convexHullShape.getUnscaledPoints);
numPoints : constant Integer := convexHullShape.getNumPoints;
begin
return convexHullSupport (localDir, points, numPoints, convexHullShape.getLocalScalingNV);
end;
when others =>
-- null;
return Self.localGetSupportingVertexWithoutMargin (localDir);
end case;
pragma Assert (False); -- Should never reach here.
return (0.0, 0.0, 0.0);
end localGetSupportVertexWithoutMarginNonVirtual;
function localGetSupportVertexNonVirtual (Self : in Item'Class; vec : in Vector_3) return Vector_3
is
use impact.d3.Vector, math.Vectors;
localDir : math.Vector_3 renames vec;
localDirNorm : math.Vector_3 := localDir;
begin
if length2 (localDirNorm) < impact.d3.Scalar.SIMD_EPSILON * impact.d3.Scalar.SIMD_EPSILON then
localDirNorm := (-1.0, -1.0, -1.0);
end if;
normalize (localDirNorm);
return Self.localGetSupportVertexWithoutMarginNonVirtual (localDirNorm) + Self.getMarginNonVirtual * localDirNorm;
end localGetSupportVertexNonVirtual;
-- TODO: This should be bumped up to impact.d3.Shape ()
--
function getMarginNonVirtual (Self : in Item'Class) return Real
is
begin
case Self.getShapeType
is
when impact.d3.collision.Proxy.SPHERE_SHAPE_PROXYTYPE =>
declare
sphereShape : constant impact.d3.Shape.convex.internal.sphere.item'Class := impact.d3.Shape.convex.internal.sphere.item'Class (Self);
begin
return sphereShape.getRadius;
end;
when impact.d3.collision.Proxy.BOX_SHAPE_PROXYTYPE =>
declare
convexShape : constant impact.d3.Shape.convex.internal.polyhedral.box.item'Class := impact.d3.Shape.convex.internal.polyhedral.box.item'Class (Self);
begin
return convexShape.getMarginNV;
end;
when impact.d3.collision.Proxy.TRIANGLE_SHAPE_PROXYTYPE =>
declare
triangleShape : constant impact.d3.Shape.convex.internal.polyhedral.triangle.item'Class := impact.d3.Shape.convex.internal.polyhedral.triangle.item'Class (Self);
begin
return triangleShape.getMarginNV;
end;
when impact.d3.collision.Proxy.CYLINDER_SHAPE_PROXYTYPE =>
raise Program_Error with "TBD";
-- declare
-- cylShape : impact.d3.Shape.convex.internal.cylinder.item'Class := impact.d3.Shape.convex.internal.cylinder.item'Class (Self);
-- begin
-- return cylShape.getMarginNV;
-- end;
when impact.d3.collision.Proxy.CAPSULE_SHAPE_PROXYTYPE =>
raise Program_Error with "TBD";
-- declare
-- capsuleShape : btCapsuleShape.item'Class := btCapsuleShape.item'Class (Self);
-- begin
-- return capsuleShape.getMarginNV;
-- end;
when impact.d3.collision.Proxy.CONVEX_POINT_CLOUD_SHAPE_PROXYTYPE
| impact.d3.collision.Proxy.CONVEX_HULL_SHAPE_PROXYTYPE =>
raise Program_Error with "TBD";
-- declare
-- convexHullShape : impact.d3.Shape.convex.internal.polyhedral.item'Class := impact.d3.Shape.convex.internal.polyhedral.item'Class (Self);
-- begin
-- return convexHullShape.getMarginNV;
-- end;
when others =>
return Self.getMargin;
end case;
-- should never reach here
pragma Assert (False);
return 0.0;
end getMarginNonVirtual;
procedure getAabbNonVirtual (Self : in Item'Class; t : in Transform_3d;
aabbMin, aabbMax : out Vector_3)
is
use impact.d3.Transform, impact.d3.Vector, impact.d3.Matrix,
math.Vectors;
begin
case Self.getShapeType
is
when impact.d3.collision.Proxy.SPHERE_SHAPE_PROXYTYPE =>
declare
sphereShape : constant impact.d3.Shape.convex.internal.sphere.item'Class := impact.d3.Shape.convex.internal.sphere.Item'Class (Self);
radius : constant math.Real := sphereShape.getImplicitShapeDimensions (1); -- * convexShape->getLocalScaling().getX();
margin : constant math.Real := radius + sphereShape.getMarginNonVirtual;
center : constant math.Vector_3 := getOrigin (t);
extent : constant math.Vector_3 := (margin, margin, margin);
begin
aabbMin := center - extent;
aabbMax := center + extent;
end;
when impact.d3.collision.Proxy.CYLINDER_SHAPE_PROXYTYPE
| impact.d3.collision.Proxy.BOX_SHAPE_PROXYTYPE =>
declare
convexShape : constant impact.d3.Shape.convex.internal.polyhedral.box.item'Class := impact.d3.Shape.convex.internal.polyhedral.box.item'Class (Self);
margin : math.Real := convexShape.getMarginNonVirtual;
halfExtents : constant math.Vector_3 := convexShape.getImplicitShapeDimensions
+ (margin, margin, margin);
abs_b : constant math.Matrix_3x3 := absolute (getBasis (t));
center : constant math.Vector_3 := getOrigin (t);
extent : constant math.Vector_3 := (dot (getRow (abs_b, 1), halfExtents),
dot (getRow (abs_b, 2), halfExtents),
dot (getRow (abs_b, 3), halfExtents));
begin
aabbMin := center - extent;
aabbMax := center + extent;
end;
when impact.d3.collision.Proxy.TRIANGLE_SHAPE_PROXYTYPE =>
declare
use linear_Algebra_3d;
triangleShape : constant impact.d3.Shape.convex.internal.polyhedral.triangle.item'Class := impact.d3.Shape.convex.internal.polyhedral.triangle.item'Class (Self);
margin : math.Real := triangleShape.getMarginNonVirtual;
vec, sv, tmp : math.Vector_3;
begin
for i in 1 .. 3
loop
vec := (0.0, 0.0, 0.0);
vec (i) := 1.0;
sv := Self.localGetSupportVertexWithoutMarginNonVirtual (vec * getBasis (t));
tmp := t * sv;
aabbMax (i) := tmp (i) + margin;
vec (i) := -1.0;
tmp := t * Self.localGetSupportVertexWithoutMarginNonVirtual (vec * getBasis (t));
aabbMin (i) := tmp (i) - margin;
end loop;
end;
when impact.d3.collision.Proxy.CAPSULE_SHAPE_PROXYTYPE =>
raise Program_Error with "TBD";
-- declare
-- btCapsuleShape* capsuleShape := (btCapsuleShape*)this;
-- impact.d3.Vector halfExtents(capsuleShape->getRadius(),capsuleShape->getRadius(),capsuleShape->getRadius());
-- int m_upAxis := capsuleShape->getUpAxis();
-- halfExtents[m_upAxis] := capsuleShape->getRadius() + capsuleShape->getHalfHeight();
-- halfExtents += impact.d3.Vector(capsuleShape->getMarginNonVirtual(),capsuleShape->getMarginNonVirtual(),capsuleShape->getMarginNonVirtual());
-- impact.d3.Matrix abs_b := t.getBasis().absolute();
-- impact.d3.Vector center := t.getOrigin();
-- impact.d3.Vector extent := impact.d3.Vector(abs_b[0].dot(halfExtents),abs_b[1].dot(halfExtents),abs_b[2].dot(halfExtents));
-- begin
-- aabbMin := center - extent;
-- aabbMax := center + extent;
-- end;
when impact.d3.collision.Proxy.CONVEX_POINT_CLOUD_SHAPE_PROXYTYPE
| impact.d3.collision.Proxy.CONVEX_HULL_SHAPE_PROXYTYPE =>
raise Program_Error with "TBD32";
-- declare
-- convexHullShape : btPolyhedralConvexAabbCachingShape.item'Class := btPolyhedralConvexAabbCachingShape.item'Class (Self);
-- margin : math.Real := convexHullShape.getMarginNonVirtual;
-- begin
-- convexHullShape.getNonvirtualAabb (t, aabbMin, aabbMax, margin);
-- end;
when others =>
Self.getAabb (t, aabbMin, aabbMax);
end case;
-- should never reach here
pragma Assert (False);
end getAabbNonVirtual;
procedure project (Self : in Item; t : in Transform_3d;
dir : in Vector_3;
min, max : out Real)
is
use linear_Algebra_3d, impact.d3.Transform, impact.d3.Vector, Math.Vectors;
localAxis : constant Vector_3 := dir * getBasis (t);
vtx1 : constant Vector_3 := t * Item'Class (Self).localGetSupportingVertex (localAxis);
vtx2 : constant Vector_3 := t * Item'Class (Self).localGetSupportingVertex (-localAxis);
tmp : Real;
begin
min := dot (vtx1, dir);
max := dot (vtx2, dir);
if min > max then
tmp := min;
min := max;
max := tmp;
end if;
end project;
end impact.d3.Shape.convex;
---------------------------------------------------------------
--- below is left for reference (it has been ported above) ...
--
-- impact.d3.Vector impact.d3.Shape.convex::localGetSupportVertexWithoutMarginNonVirtual (const impact.d3.Vector& localDir) const
-- {
-- switch (m_shapeType)
-- {
-- case SPHERE_SHAPE_PROXYTYPE:
-- {
-- return impact.d3.Vector(0,0,0);
-- }
-- case BOX_SHAPE_PROXYTYPE:
-- {
-- impact.d3.Shape.convex.internal.polyhedral.box* convexShape = (impact.d3.Shape.convex.internal.polyhedral.box*)this;
-- const impact.d3.Vector& halfExtents = convexShape->getImplicitShapeDimensions();
--
-- return impact.d3.Vector(btFsels(localDir.x(), halfExtents.x(), -halfExtents.x()),
-- btFsels(localDir.y(), halfExtents.y(), -halfExtents.y()),
-- btFsels(localDir.z(), halfExtents.z(), -halfExtents.z()));
-- }
-- case TRIANGLE_SHAPE_PROXYTYPE:
-- {
-- impact.d3.Shape.convex.internal.polyhedral.triangle* triangleShape = (impact.d3.Shape.convex.internal.polyhedral.triangle*)this;
-- impact.d3.Vector dir(localDir.getX(),localDir.getY(),localDir.getZ());
-- impact.d3.Vector* vertices = &triangleShape->m_vertices1[0];
-- impact.d3.Vector dots(dir.dot(vertices[0]), dir.dot(vertices[1]), dir.dot(vertices[2]));
-- impact.d3.Vector sup = vertices[dots.maxAxis()];
-- return impact.d3.Vector(sup.getX(),sup.getY(),sup.getZ());
-- }
-- case CYLINDER_SHAPE_PROXYTYPE:
-- {
-- impact.d3.Shape.convex.internal.cylinder* cylShape = (impact.d3.Shape.convex.internal.cylinder*)this;
-- //mapping of halfextents/dimension onto radius/height depends on how cylinder local orientation is (upAxis)
--
-- impact.d3.Vector halfExtents = cylShape->getImplicitShapeDimensions();
-- impact.d3.Vector v(localDir.getX(),localDir.getY(),localDir.getZ());
-- int cylinderUpAxis = cylShape->getUpAxis();
-- int XX(1),YY(0),ZZ(2);
--
-- switch (cylinderUpAxis)
-- {
-- case 0:
-- {
-- XX = 1;
-- YY = 0;
-- ZZ = 2;
-- }
-- break;
-- case 1:
-- {
-- XX = 0;
-- YY = 1;
-- ZZ = 2;
-- }
-- break;
-- case 2:
-- {
-- XX = 0;
-- YY = 2;
-- ZZ = 1;
--
-- }
-- break;
-- default:
-- btAssert(0);
-- break;
-- };
--
-- impact.d3.Scalar radius = halfExtents[XX];
-- impact.d3.Scalar halfHeight = halfExtents[cylinderUpAxis];
--
-- impact.d3.Vector tmp;
-- impact.d3.Scalar d ;
--
-- impact.d3.Scalar s = btSqrt(v[XX] * v[XX] + v[ZZ] * v[ZZ]);
-- if (s != impact.d3.Scalar(0.0))
-- {
-- d = radius / s;
-- tmp[XX] = v[XX] * d;
-- tmp[YY] = v[YY] < 0.0 ? -halfHeight : halfHeight;
-- tmp[ZZ] = v[ZZ] * d;
-- return impact.d3.Vector(tmp.getX(),tmp.getY(),tmp.getZ());
-- } else {
-- tmp[XX] = radius;
-- tmp[YY] = v[YY] < 0.0 ? -halfHeight : halfHeight;
-- tmp[ZZ] = impact.d3.Scalar(0.0);
-- return impact.d3.Vector(tmp.getX(),tmp.getY(),tmp.getZ());
-- }
-- }
-- case CAPSULE_SHAPE_PROXYTYPE:
-- {
-- impact.d3.Vector vec0(localDir.getX(),localDir.getY(),localDir.getZ());
--
-- btCapsuleShape* capsuleShape = (btCapsuleShape*)this;
-- impact.d3.Scalar halfHeight = capsuleShape->getHalfHeight();
-- int capsuleUpAxis = capsuleShape->getUpAxis();
--
-- impact.d3.Scalar radius = capsuleShape->getRadius();
-- impact.d3.Vector supVec(0,0,0);
--
-- impact.d3.Scalar maxDot(impact.d3.Scalar(-BT_LARGE_FLOAT));
--
-- impact.d3.Vector vec = vec0;
-- impact.d3.Scalar lenSqr = vec.length2();
-- if (lenSqr < impact.d3.Scalar(0.0001))
-- {
-- vec.setValue(1,0,0);
-- } else
-- {
-- impact.d3.Scalar rlen = impact.d3.Scalar(1.) / btSqrt(lenSqr );
-- vec *= rlen;
-- }
-- impact.d3.Vector vtx;
-- impact.d3.Scalar newDot;
-- {
-- impact.d3.Vector pos(0,0,0);
-- pos[capsuleUpAxis] = halfHeight;
--
-- //vtx = pos +vec*(radius);
-- vtx = pos +vec*capsuleShape->getLocalScalingNV()*(radius) - vec * capsuleShape->getMarginNV();
-- newDot = vec.dot(vtx);
--
--
-- if (newDot > maxDot)
-- {
-- maxDot = newDot;
-- supVec = vtx;
-- }
-- }
-- {
-- impact.d3.Vector pos(0,0,0);
-- pos[capsuleUpAxis] = -halfHeight;
--
-- //vtx = pos +vec*(radius);
-- vtx = pos +vec*capsuleShape->getLocalScalingNV()*(radius) - vec * capsuleShape->getMarginNV();
-- newDot = vec.dot(vtx);
-- if (newDot > maxDot)
-- {
-- maxDot = newDot;
-- supVec = vtx;
-- }
-- }
-- return impact.d3.Vector(supVec.getX(),supVec.getY(),supVec.getZ());
-- }
-- case CONVEX_POINT_CLOUD_SHAPE_PROXYTYPE:
-- {
-- impact.d3.Shape.convex.internal.polyhedral.point_cloud* convexPointCloudShape = (impact.d3.Shape.convex.internal.polyhedral.point_cloud*)this;
-- impact.d3.Vector* points = convexPointCloudShape->getUnscaledPoints ();
-- int numPoints = convexPointCloudShape->getNumPoints ();
-- return convexHullSupport (localDir, points, numPoints,convexPointCloudShape->getLocalScalingNV());
-- }
-- case CONVEX_HULL_SHAPE_PROXYTYPE:
-- {
-- impact.d3.convex_HullShape* convexHullShape = (impact.d3.convex_HullShape*)this;
-- impact.d3.Vector* points = convexHullShape->getUnscaledPoints();
-- int numPoints = convexHullShape->getNumPoints ();
-- return convexHullSupport (localDir, points, numPoints,convexHullShape->getLocalScalingNV());
-- }
-- default:
-- #ifndef __SPU__
-- return this->localGetSupportingVertexWithoutMargin (localDir);
-- #else
-- btAssert (0);
-- #endif
-- }
--
-- // should never reach here
-- btAssert (0);
-- return impact.d3.Vector (impact.d3.Scalar(0.0f), impact.d3.Scalar(0.0f), impact.d3.Scalar(0.0f));
-- }
|
data/maps/headers/SSAnne3F.asm | opiter09/ASM-Machina | 1 | 22014 |
map_header SSAnne3F, SS_ANNE_3F, SHIP, 0
end_map_header
|
Assembly/PIC16F84A/PORTA.asm | JoelBuenrostro/PIC-Programming-examples | 1 | 242741 | ;-------------------------------------------------------------------------------------------
;File: Pin PORTA.asm
;Author: <NAME>
;Date: 10/04/2018
;Environment: MPLAB X IDE v4.15
;Compiler: mpasm (v5.77)
;Description: Code that configures port A as output and activates pin RA0 in a high state
;until the power supply of the PIC is eliminated.
;-------------------------------------------------------------------------------------------
;Device
List P=16F84A
#include "p16f84a.inc"
;-------------------------------------------------------------------------------------------
;Configuration Bits
__CONFIG _FOSC_XT & _WDTE_OFF & _PWRTE_ON & _CP_OFF
;External oscillator, Watchdog off, Power up timer on, Code protection off
;-------------------------------------------------------------------------------------------
;Label Instruction Operand Comments
;-------------------------------------------------------------------------------------------
ORG 0 ;Start the program at address 0
START BCF STATUS,RP0 ;We select bank 0
CLRF PORTA ;We clean the outputs of port A
BSF STATUS,RP0 ;We select the bank 1
MOVLW B'00000000' ;We load a binary number in W
MOVWF TRISA ;We configure the entire port as output
BCF STATUS,RP0 ;We select bank 0
MAIN MOVLW B'00000001' ;We load a binary number in W
MOVWF PORTA ;We move what is loaded in W to the PORTA register
GOTO PRINCIPAL ;We jump TO MAIN
END ;The program ends
|
programs/oeis/022/A022380.asm | karttu/loda | 0 | 104963 | <gh_stars>0
; A022380: Fibonacci sequence beginning 3, 12.
; 3,12,15,27,42,69,111,180,291,471,762,1233,1995,3228,5223,8451,13674,22125,35799,57924,93723,151647,245370,397017,642387,1039404,1681791,2721195,4402986,7124181,11527167,18651348,30178515,48829863,79008378,127838241,206846619,334684860,541531479,876216339,1417747818,2293964157,3711711975,6005676132,9717388107,15723064239,25440452346,41163516585,66603968931,107767485516,174371454447,282138939963,456510394410,738649334373,1195159728783,1933809063156,3128968791939,5062777855095,8191746647034,13254524502129,21446271149163,34700795651292,56147066800455,90847862451747,146994929252202,237842791703949,384837720956151,622680512660100,1007518233616251,1630198746276351,2637716979892602,4267915726168953,6905632706061555
mov $1,1
mov $3,4
lpb $0,1
sub $0,1
mov $2,$1
mov $1,$3
add $3,$2
lpe
mul $1,3
|
libsrc/fcntl/sprinter/mkdir.asm | grancier/z180 | 0 | 24711 | ; Sprinter fcntl library
;
; $Id: mkdir.asm,v 1.4 2017/01/02 21:02:22 aralbrec Exp $
;
SECTION code_clib
PUBLIC mkdir
PUBLIC _mkdir
;int mkdir(char *path, mode_t mode)
.mkdir
._mkdir
pop bc
pop de
pop hl
push hl
push de
push bc
push ix ;save callers
ld c,$1B ;MKDIR
rst $10
pop ix ;get it back
ld hl,0
ret nc
dec hl ;-1
ret
|
Mips Exersice/mips10.asm | Pandula1234/Machine-Instructions | 0 | 103032 | <reponame>Pandula1234/Machine-Instructions
# print two floats and get the sum
.text
li $v0,6
syscall
mov.s $f1,$f0
li $v0,6
syscall
mov.s $f2,$f0
add.s $f12,$f1,$f2
li $v0,2
syscall |
bb-runtimes/runtimes/zfp-stm32h743/gnat/i-stm32-rcc.ads | JCGobbi/Nucleo-STM32H743ZI | 0 | 13159 | --
-- Copyright (C) 2021, AdaCore
--
pragma Style_Checks (Off);
-- This spec has been automatically generated from STM32H743x.svd
with System;
package Interfaces.STM32.RCC is
pragma Preelaborate;
pragma No_Elaboration_Code_All;
---------------
-- Registers --
---------------
subtype CR_HSION_Field is Interfaces.STM32.Bit;
subtype CR_HSIKERON_Field is Interfaces.STM32.Bit;
subtype CR_HSIRDY_Field is Interfaces.STM32.Bit;
subtype CR_HSIDIV_Field is Interfaces.STM32.UInt2;
subtype CR_HSIDIVF_Field is Interfaces.STM32.Bit;
subtype CR_CSION_Field is Interfaces.STM32.Bit;
subtype CR_CSIRDY_Field is Interfaces.STM32.Bit;
subtype CR_CSIKERON_Field is Interfaces.STM32.Bit;
subtype CR_HSI48ON_Field is Interfaces.STM32.Bit;
subtype CR_HSI48RDY_Field is Interfaces.STM32.Bit;
subtype CR_D1CKRDY_Field is Interfaces.STM32.Bit;
subtype CR_D2CKRDY_Field is Interfaces.STM32.Bit;
subtype CR_HSEON_Field is Interfaces.STM32.Bit;
subtype CR_HSERDY_Field is Interfaces.STM32.Bit;
subtype CR_HSEBYP_Field is Interfaces.STM32.Bit;
subtype CR_HSECSSON_Field is Interfaces.STM32.Bit;
subtype CR_PLL1ON_Field is Interfaces.STM32.Bit;
subtype CR_PLL1RDY_Field is Interfaces.STM32.Bit;
subtype CR_PLL2ON_Field is Interfaces.STM32.Bit;
subtype CR_PLL2RDY_Field is Interfaces.STM32.Bit;
subtype CR_PLL3ON_Field is Interfaces.STM32.Bit;
subtype CR_PLL3RDY_Field is Interfaces.STM32.Bit;
-- clock control register
type CR_Register is record
-- Internal high-speed clock enable
HSION : CR_HSION_Field := 16#1#;
-- High Speed Internal clock enable in Stop mode
HSIKERON : CR_HSIKERON_Field := 16#1#;
-- HSI clock ready flag
HSIRDY : CR_HSIRDY_Field := 16#0#;
-- HSI clock divider
HSIDIV : CR_HSIDIV_Field := 16#0#;
-- HSI divider flag
HSIDIVF : CR_HSIDIVF_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- CSI clock enable
CSION : CR_CSION_Field := 16#1#;
-- CSI clock ready flag
CSIRDY : CR_CSIRDY_Field := 16#0#;
-- CSI clock enable in Stop mode
CSIKERON : CR_CSIKERON_Field := 16#0#;
-- unspecified
Reserved_10_11 : Interfaces.STM32.UInt2 := 16#0#;
-- RC48 clock enable
HSI48ON : CR_HSI48ON_Field := 16#0#;
-- RC48 clock ready flag
HSI48RDY : CR_HSI48RDY_Field := 16#0#;
-- D1 domain clocks ready flag
D1CKRDY : CR_D1CKRDY_Field := 16#0#;
-- D2 domain clocks ready flag
D2CKRDY : CR_D2CKRDY_Field := 16#0#;
-- HSE clock enable
HSEON : CR_HSEON_Field := 16#0#;
-- HSE clock ready flag
HSERDY : CR_HSERDY_Field := 16#0#;
-- HSE clock bypass
HSEBYP : CR_HSEBYP_Field := 16#0#;
-- HSE Clock Security System enable
HSECSSON : CR_HSECSSON_Field := 16#0#;
-- unspecified
Reserved_20_23 : Interfaces.STM32.UInt4 := 16#0#;
-- PLL1 enable
PLL1ON : CR_PLL1ON_Field := 16#0#;
-- PLL1 clock ready flag
PLL1RDY : CR_PLL1RDY_Field := 16#0#;
-- PLL2 enable
PLL2ON : CR_PLL2ON_Field := 16#0#;
-- PLL2 clock ready flag
PLL2RDY : CR_PLL2RDY_Field := 16#0#;
-- PLL3 enable
PLL3ON : CR_PLL3ON_Field := 16#0#;
-- PLL3 clock ready flag
PLL3RDY : CR_PLL3RDY_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CR_Register use record
HSION at 0 range 0 .. 0;
HSIKERON at 0 range 1 .. 1;
HSIRDY at 0 range 2 .. 2;
HSIDIV at 0 range 3 .. 4;
HSIDIVF at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
CSION at 0 range 7 .. 7;
CSIRDY at 0 range 8 .. 8;
CSIKERON at 0 range 9 .. 9;
Reserved_10_11 at 0 range 10 .. 11;
HSI48ON at 0 range 12 .. 12;
HSI48RDY at 0 range 13 .. 13;
D1CKRDY at 0 range 14 .. 14;
D2CKRDY at 0 range 15 .. 15;
HSEON at 0 range 16 .. 16;
HSERDY at 0 range 17 .. 17;
HSEBYP at 0 range 18 .. 18;
HSECSSON at 0 range 19 .. 19;
Reserved_20_23 at 0 range 20 .. 23;
PLL1ON at 0 range 24 .. 24;
PLL1RDY at 0 range 25 .. 25;
PLL2ON at 0 range 26 .. 26;
PLL2RDY at 0 range 27 .. 27;
PLL3ON at 0 range 28 .. 28;
PLL3RDY at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype ICSCR_HSICAL_Field is Interfaces.STM32.UInt12;
subtype ICSCR_HSITRIM_Field is Interfaces.STM32.UInt6;
subtype ICSCR_CSICAL_Field is Interfaces.STM32.Byte;
subtype ICSCR_CSITRIM_Field is Interfaces.STM32.UInt5;
-- RCC Internal Clock Source Calibration Register
type ICSCR_Register is record
-- Read-only. HSI clock calibration
HSICAL : ICSCR_HSICAL_Field := 16#0#;
-- HSI clock trimming
HSITRIM : ICSCR_HSITRIM_Field := 16#0#;
-- Read-only. CSI clock calibration
CSICAL : ICSCR_CSICAL_Field := 16#0#;
-- CSI clock trimming
CSITRIM : ICSCR_CSITRIM_Field := 16#10#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for ICSCR_Register use record
HSICAL at 0 range 0 .. 11;
HSITRIM at 0 range 12 .. 17;
CSICAL at 0 range 18 .. 25;
CSITRIM at 0 range 26 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype CRRCR_RC48CAL_Field is Interfaces.STM32.UInt10;
-- RCC Clock Recovery RC Register
type CRRCR_Register is record
-- Read-only. Internal RC 48 MHz clock calibration
RC48CAL : CRRCR_RC48CAL_Field;
-- unspecified
Reserved_10_31 : Interfaces.STM32.UInt22;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CRRCR_Register use record
RC48CAL at 0 range 0 .. 9;
Reserved_10_31 at 0 range 10 .. 31;
end record;
subtype CFGR_SW_Field is Interfaces.STM32.UInt3;
subtype CFGR_SWS_Field is Interfaces.STM32.UInt3;
subtype CFGR_STOPWUCK_Field is Interfaces.STM32.Bit;
subtype CFGR_STOPKERWUCK_Field is Interfaces.STM32.Bit;
subtype CFGR_RTCPRE_Field is Interfaces.STM32.UInt6;
subtype CFGR_HRTIMSEL_Field is Interfaces.STM32.Bit;
subtype CFGR_TIMPRE_Field is Interfaces.STM32.Bit;
subtype CFGR_MCO1PRE_Field is Interfaces.STM32.UInt4;
subtype CFGR_MCO1SEL_Field is Interfaces.STM32.UInt3;
subtype CFGR_MCO2PRE_Field is Interfaces.STM32.UInt4;
subtype CFGR_MCO2SEL_Field is Interfaces.STM32.UInt3;
-- RCC Clock Configuration Register
type CFGR_Register is record
-- System clock switch
SW : CFGR_SW_Field := 16#0#;
-- System clock switch status
SWS : CFGR_SWS_Field := 16#0#;
-- System clock selection after a wake up from system Stop
STOPWUCK : CFGR_STOPWUCK_Field := 16#0#;
-- Kernel clock selection after a wake up from system Stop
STOPKERWUCK : CFGR_STOPKERWUCK_Field := 16#0#;
-- HSE division factor for RTC clock
RTCPRE : CFGR_RTCPRE_Field := 16#0#;
-- High Resolution Timer clock prescaler selection
HRTIMSEL : CFGR_HRTIMSEL_Field := 16#0#;
-- Timers clocks prescaler selection
TIMPRE : CFGR_TIMPRE_Field := 16#0#;
-- unspecified
Reserved_16_17 : Interfaces.STM32.UInt2 := 16#0#;
-- MCO1 prescaler
MCO1PRE : CFGR_MCO1PRE_Field := 16#0#;
-- Micro-controller clock output 1
MCO1SEL : CFGR_MCO1SEL_Field := 16#0#;
-- MCO2 prescaler
MCO2PRE : CFGR_MCO2PRE_Field := 16#0#;
-- Micro-controller clock output 2
MCO2SEL : CFGR_MCO2SEL_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CFGR_Register use record
SW at 0 range 0 .. 2;
SWS at 0 range 3 .. 5;
STOPWUCK at 0 range 6 .. 6;
STOPKERWUCK at 0 range 7 .. 7;
RTCPRE at 0 range 8 .. 13;
HRTIMSEL at 0 range 14 .. 14;
TIMPRE at 0 range 15 .. 15;
Reserved_16_17 at 0 range 16 .. 17;
MCO1PRE at 0 range 18 .. 21;
MCO1SEL at 0 range 22 .. 24;
MCO2PRE at 0 range 25 .. 28;
MCO2SEL at 0 range 29 .. 31;
end record;
subtype D1CFGR_HPRE_Field is Interfaces.STM32.UInt4;
subtype D1CFGR_D1PPRE_Field is Interfaces.STM32.UInt3;
subtype D1CFGR_D1CPRE_Field is Interfaces.STM32.UInt4;
-- RCC Domain 1 Clock Configuration Register
type D1CFGR_Register is record
-- D1 domain AHB prescaler
HPRE : D1CFGR_HPRE_Field := 16#0#;
-- D1 domain APB3 prescaler
D1PPRE : D1CFGR_D1PPRE_Field := 16#0#;
-- unspecified
Reserved_7_7 : Interfaces.STM32.Bit := 16#0#;
-- D1 domain Core prescaler
D1CPRE : D1CFGR_D1CPRE_Field := 16#0#;
-- unspecified
Reserved_12_31 : Interfaces.STM32.UInt20 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D1CFGR_Register use record
HPRE at 0 range 0 .. 3;
D1PPRE at 0 range 4 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
D1CPRE at 0 range 8 .. 11;
Reserved_12_31 at 0 range 12 .. 31;
end record;
subtype D2CFGR_D2PPRE1_Field is Interfaces.STM32.UInt3;
subtype D2CFGR_D2PPRE2_Field is Interfaces.STM32.UInt3;
-- RCC Domain 2 Clock Configuration Register
type D2CFGR_Register is record
-- unspecified
Reserved_0_3 : Interfaces.STM32.UInt4 := 16#0#;
-- D2 domain APB1 prescaler
D2PPRE1 : D2CFGR_D2PPRE1_Field := 16#0#;
-- unspecified
Reserved_7_7 : Interfaces.STM32.Bit := 16#0#;
-- D2 domain APB2 prescaler
D2PPRE2 : D2CFGR_D2PPRE2_Field := 16#0#;
-- unspecified
Reserved_11_31 : Interfaces.STM32.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D2CFGR_Register use record
Reserved_0_3 at 0 range 0 .. 3;
D2PPRE1 at 0 range 4 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
D2PPRE2 at 0 range 8 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
subtype D3CFGR_D3PPRE_Field is Interfaces.STM32.UInt3;
-- RCC Domain 3 Clock Configuration Register
type D3CFGR_Register is record
-- unspecified
Reserved_0_3 : Interfaces.STM32.UInt4 := 16#0#;
-- D3 domain APB4 prescaler
D3PPRE : D3CFGR_D3PPRE_Field := 16#0#;
-- unspecified
Reserved_7_31 : Interfaces.STM32.UInt25 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D3CFGR_Register use record
Reserved_0_3 at 0 range 0 .. 3;
D3PPRE at 0 range 4 .. 6;
Reserved_7_31 at 0 range 7 .. 31;
end record;
subtype PLLCKSELR_PLLSRC_Field is Interfaces.STM32.UInt2;
subtype PLLCKSELR_DIVM1_Field is Interfaces.STM32.UInt6;
subtype PLLCKSELR_DIVM2_Field is Interfaces.STM32.UInt6;
subtype PLLCKSELR_DIVM3_Field is Interfaces.STM32.UInt6;
-- RCC PLLs Clock Source Selection Register
type PLLCKSELR_Register is record
-- DIVMx and PLLs clock source selection
PLLSRC : PLLCKSELR_PLLSRC_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- Prescaler for PLL1
DIVM1 : PLLCKSELR_DIVM1_Field := 16#20#;
-- unspecified
Reserved_10_11 : Interfaces.STM32.UInt2 := 16#0#;
-- Prescaler for PLL2
DIVM2 : PLLCKSELR_DIVM2_Field := 16#20#;
-- unspecified
Reserved_18_19 : Interfaces.STM32.UInt2 := 16#0#;
-- Prescaler for PLL3
DIVM3 : PLLCKSELR_DIVM3_Field := 16#20#;
-- unspecified
Reserved_26_31 : Interfaces.STM32.UInt6 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLLCKSELR_Register use record
PLLSRC at 0 range 0 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
DIVM1 at 0 range 4 .. 9;
Reserved_10_11 at 0 range 10 .. 11;
DIVM2 at 0 range 12 .. 17;
Reserved_18_19 at 0 range 18 .. 19;
DIVM3 at 0 range 20 .. 25;
Reserved_26_31 at 0 range 26 .. 31;
end record;
subtype PLLCFGR_PLL1FRACEN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_PLL1VCOSEL_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_PLL1RGE_Field is Interfaces.STM32.UInt2;
subtype PLLCFGR_PLL2FRACEN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_PLL2VCOSEL_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_PLL2RGE_Field is Interfaces.STM32.UInt2;
subtype PLLCFGR_PLL3FRACEN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_PLL3VCOSEL_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_PLL3RGE_Field is Interfaces.STM32.UInt2;
subtype PLLCFGR_DIVP1EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVQ1EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVR1EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVP2EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVQ2EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVR2EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVP3EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVQ3EN_Field is Interfaces.STM32.Bit;
subtype PLLCFGR_DIVR3EN_Field is Interfaces.STM32.Bit;
-- RCC PLLs Configuration Register
type PLLCFGR_Register is record
-- PLL1 fractional latch enable
PLL1FRACEN : PLLCFGR_PLL1FRACEN_Field := 16#0#;
-- PLL1 VCO selection
PLL1VCOSEL : PLLCFGR_PLL1VCOSEL_Field := 16#0#;
-- PLL1 input frequency range
PLL1RGE : PLLCFGR_PLL1RGE_Field := 16#0#;
-- PLL2 fractional latch enable
PLL2FRACEN : PLLCFGR_PLL2FRACEN_Field := 16#0#;
-- PLL2 VCO selection
PLL2VCOSEL : PLLCFGR_PLL2VCOSEL_Field := 16#0#;
-- PLL2 input frequency range
PLL2RGE : PLLCFGR_PLL2RGE_Field := 16#0#;
-- PLL3 fractional latch enable
PLL3FRACEN : PLLCFGR_PLL3FRACEN_Field := 16#0#;
-- PLL3 VCO selection
PLL3VCOSEL : PLLCFGR_PLL3VCOSEL_Field := 16#0#;
-- PLL3 input frequency range
PLL3RGE : PLLCFGR_PLL3RGE_Field := 16#0#;
-- unspecified
Reserved_12_15 : Interfaces.STM32.UInt4 := 16#0#;
-- PLL1 DIVP divider output enable
DIVP1EN : PLLCFGR_DIVP1EN_Field := 16#1#;
-- PLL1 DIVQ divider output enable
DIVQ1EN : PLLCFGR_DIVQ1EN_Field := 16#1#;
-- PLL1 DIVR divider output enable
DIVR1EN : PLLCFGR_DIVR1EN_Field := 16#1#;
-- PLL2 DIVP divider output enable
DIVP2EN : PLLCFGR_DIVP2EN_Field := 16#1#;
-- PLL2 DIVQ divider output enable
DIVQ2EN : PLLCFGR_DIVQ2EN_Field := 16#1#;
-- PLL2 DIVR divider output enable
DIVR2EN : PLLCFGR_DIVR2EN_Field := 16#1#;
-- PLL3 DIVP divider output enable
DIVP3EN : PLLCFGR_DIVP3EN_Field := 16#1#;
-- PLL3 DIVQ divider output enable
DIVQ3EN : PLLCFGR_DIVQ3EN_Field := 16#1#;
-- PLL3 DIVR divider output enable
DIVR3EN : PLLCFGR_DIVR3EN_Field := 16#1#;
-- unspecified
Reserved_25_31 : Interfaces.STM32.UInt7 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLLCFGR_Register use record
PLL1FRACEN at 0 range 0 .. 0;
PLL1VCOSEL at 0 range 1 .. 1;
PLL1RGE at 0 range 2 .. 3;
PLL2FRACEN at 0 range 4 .. 4;
PLL2VCOSEL at 0 range 5 .. 5;
PLL2RGE at 0 range 6 .. 7;
PLL3FRACEN at 0 range 8 .. 8;
PLL3VCOSEL at 0 range 9 .. 9;
PLL3RGE at 0 range 10 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
DIVP1EN at 0 range 16 .. 16;
DIVQ1EN at 0 range 17 .. 17;
DIVR1EN at 0 range 18 .. 18;
DIVP2EN at 0 range 19 .. 19;
DIVQ2EN at 0 range 20 .. 20;
DIVR2EN at 0 range 21 .. 21;
DIVP3EN at 0 range 22 .. 22;
DIVQ3EN at 0 range 23 .. 23;
DIVR3EN at 0 range 24 .. 24;
Reserved_25_31 at 0 range 25 .. 31;
end record;
subtype PLL1DIVR_DIVN1_Field is Interfaces.STM32.UInt9;
subtype PLL1DIVR_DIVP1_Field is Interfaces.STM32.UInt7;
subtype PLL1DIVR_DIVQ1_Field is Interfaces.STM32.UInt7;
subtype PLL1DIVR_DIVR1_Field is Interfaces.STM32.UInt7;
-- RCC PLL1 Dividers Configuration Register
type PLL1DIVR_Register is record
-- Multiplication factor for PLL1 VCO
DIVN1 : PLL1DIVR_DIVN1_Field := 16#80#;
-- PLL1 DIVP division factor
DIVP1 : PLL1DIVR_DIVP1_Field := 16#1#;
-- PLL1 DIVQ division factor
DIVQ1 : PLL1DIVR_DIVQ1_Field := 16#1#;
-- unspecified
Reserved_23_23 : Interfaces.STM32.Bit := 16#0#;
-- PLL1 DIVR division factor
DIVR1 : PLL1DIVR_DIVR1_Field := 16#1#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLL1DIVR_Register use record
DIVN1 at 0 range 0 .. 8;
DIVP1 at 0 range 9 .. 15;
DIVQ1 at 0 range 16 .. 22;
Reserved_23_23 at 0 range 23 .. 23;
DIVR1 at 0 range 24 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype PLL1FRACR_FRACN1_Field is Interfaces.STM32.UInt13;
-- RCC PLL1 Fractional Divider Register
type PLL1FRACR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- Fractional part of the multiplication factor for PLL1 VCO
FRACN1 : PLL1FRACR_FRACN1_Field := 16#0#;
-- unspecified
Reserved_16_31 : Interfaces.STM32.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLL1FRACR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
FRACN1 at 0 range 3 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype PLL2DIVR_DIVN2_Field is Interfaces.STM32.UInt9;
subtype PLL2DIVR_DIVP2_Field is Interfaces.STM32.UInt7;
subtype PLL2DIVR_DIVQ2_Field is Interfaces.STM32.UInt7;
subtype PLL2DIVR_DIVR2_Field is Interfaces.STM32.UInt7;
-- RCC PLL2 Dividers Configuration Register
type PLL2DIVR_Register is record
-- Multiplication factor for PLL2 VCO
DIVN2 : PLL2DIVR_DIVN2_Field := 16#80#;
-- PLL2 DIVP division factor
DIVP2 : PLL2DIVR_DIVP2_Field := 16#1#;
-- PLL2 DIVQ division factor
DIVQ2 : PLL2DIVR_DIVQ2_Field := 16#1#;
-- unspecified
Reserved_23_23 : Interfaces.STM32.Bit := 16#0#;
-- PLL2 DIVR division factor
DIVR2 : PLL2DIVR_DIVR2_Field := 16#1#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLL2DIVR_Register use record
DIVN2 at 0 range 0 .. 8;
DIVP2 at 0 range 9 .. 15;
DIVQ2 at 0 range 16 .. 22;
Reserved_23_23 at 0 range 23 .. 23;
DIVR2 at 0 range 24 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype PLL2FRACR_FRACN2_Field is Interfaces.STM32.UInt13;
-- RCC PLL2 Fractional Divider Register
type PLL2FRACR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- Fractional part of the multiplication factor for PLL VCO
FRACN2 : PLL2FRACR_FRACN2_Field := 16#0#;
-- unspecified
Reserved_16_31 : Interfaces.STM32.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLL2FRACR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
FRACN2 at 0 range 3 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype PLL3DIVR_DIVN3_Field is Interfaces.STM32.UInt9;
subtype PLL3DIVR_DIVP3_Field is Interfaces.STM32.UInt7;
subtype PLL3DIVR_DIVQ3_Field is Interfaces.STM32.UInt7;
subtype PLL3DIVR_DIVR3_Field is Interfaces.STM32.UInt7;
-- RCC PLL3 Dividers Configuration Register
type PLL3DIVR_Register is record
-- Multiplication factor for PLL3 VCO
DIVN3 : PLL3DIVR_DIVN3_Field := 16#80#;
-- PLL3 DIVP division factor
DIVP3 : PLL3DIVR_DIVP3_Field := 16#1#;
-- PLL3 DIVQ division factor
DIVQ3 : PLL3DIVR_DIVQ3_Field := 16#1#;
-- unspecified
Reserved_23_23 : Interfaces.STM32.Bit := 16#0#;
-- PLL3 DIVR division factor
DIVR3 : PLL3DIVR_DIVR3_Field := 16#1#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLL3DIVR_Register use record
DIVN3 at 0 range 0 .. 8;
DIVP3 at 0 range 9 .. 15;
DIVQ3 at 0 range 16 .. 22;
Reserved_23_23 at 0 range 23 .. 23;
DIVR3 at 0 range 24 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype PLL3FRACR_FRACN3_Field is Interfaces.STM32.UInt13;
-- RCC PLL3 Fractional Divider Register
type PLL3FRACR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- Fractional part of the multiplication factor for PLL3 VCO
FRACN3 : PLL3FRACR_FRACN3_Field := 16#0#;
-- unspecified
Reserved_16_31 : Interfaces.STM32.UInt16 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for PLL3FRACR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
FRACN3 at 0 range 3 .. 15;
Reserved_16_31 at 0 range 16 .. 31;
end record;
subtype D1CCIPR_FMCSEL_Field is Interfaces.STM32.UInt2;
subtype D1CCIPR_QSPISEL_Field is Interfaces.STM32.UInt2;
subtype D1CCIPR_SDMMCSEL_Field is Interfaces.STM32.Bit;
subtype D1CCIPR_CKPERSEL_Field is Interfaces.STM32.UInt2;
-- RCC Domain 1 Kernel Clock Configuration Register
type D1CCIPR_Register is record
-- FMC kernel clock source selection
FMCSEL : D1CCIPR_FMCSEL_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- QUADSPI kernel clock source selection
QSPISEL : D1CCIPR_QSPISEL_Field := 16#0#;
-- unspecified
Reserved_6_15 : Interfaces.STM32.UInt10 := 16#0#;
-- SDMMC kernel clock source selection
SDMMCSEL : D1CCIPR_SDMMCSEL_Field := 16#0#;
-- unspecified
Reserved_17_27 : Interfaces.STM32.UInt11 := 16#0#;
-- per_ck clock source selection
CKPERSEL : D1CCIPR_CKPERSEL_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D1CCIPR_Register use record
FMCSEL at 0 range 0 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
QSPISEL at 0 range 4 .. 5;
Reserved_6_15 at 0 range 6 .. 15;
SDMMCSEL at 0 range 16 .. 16;
Reserved_17_27 at 0 range 17 .. 27;
CKPERSEL at 0 range 28 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype D2CCIP1R_SAI1SEL_Field is Interfaces.STM32.UInt3;
subtype D2CCIP1R_SAI23SEL_Field is Interfaces.STM32.UInt3;
subtype D2CCIP1R_SPI123SEL_Field is Interfaces.STM32.UInt3;
subtype D2CCIP1R_SPI45SEL_Field is Interfaces.STM32.UInt3;
subtype D2CCIP1R_SPDIFSEL_Field is Interfaces.STM32.UInt2;
subtype D2CCIP1R_DFSDM1SEL_Field is Interfaces.STM32.Bit;
subtype D2CCIP1R_FDCANSEL_Field is Interfaces.STM32.UInt2;
subtype D2CCIP1R_SWPSEL_Field is Interfaces.STM32.Bit;
-- RCC Domain 2 Kernel Clock Configuration Register
type D2CCIP1R_Register is record
-- SAI1 and DFSDM1 kernel Aclk clock source selection
SAI1SEL : D2CCIP1R_SAI1SEL_Field := 16#0#;
-- unspecified
Reserved_3_5 : Interfaces.STM32.UInt3 := 16#0#;
-- SAI2 and SAI3 kernel clock source selection
SAI23SEL : D2CCIP1R_SAI23SEL_Field := 16#0#;
-- unspecified
Reserved_9_11 : Interfaces.STM32.UInt3 := 16#0#;
-- SPI/I2S1,2 and 3 kernel clock source selection
SPI123SEL : D2CCIP1R_SPI123SEL_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.STM32.Bit := 16#0#;
-- SPI4 and 5 kernel clock source selection
SPI45SEL : D2CCIP1R_SPI45SEL_Field := 16#0#;
-- unspecified
Reserved_19_19 : Interfaces.STM32.Bit := 16#0#;
-- SPDIFRX kernel clock source selection
SPDIFSEL : D2CCIP1R_SPDIFSEL_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- DFSDM1 kernel Clk clock source selection
DFSDM1SEL : D2CCIP1R_DFSDM1SEL_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- FDCAN kernel clock source selection
FDCANSEL : D2CCIP1R_FDCANSEL_Field := 16#0#;
-- unspecified
Reserved_30_30 : Interfaces.STM32.Bit := 16#0#;
-- SWPMI kernel clock source selection
SWPSEL : D2CCIP1R_SWPSEL_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D2CCIP1R_Register use record
SAI1SEL at 0 range 0 .. 2;
Reserved_3_5 at 0 range 3 .. 5;
SAI23SEL at 0 range 6 .. 8;
Reserved_9_11 at 0 range 9 .. 11;
SPI123SEL at 0 range 12 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
SPI45SEL at 0 range 16 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
SPDIFSEL at 0 range 20 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
DFSDM1SEL at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
FDCANSEL at 0 range 28 .. 29;
Reserved_30_30 at 0 range 30 .. 30;
SWPSEL at 0 range 31 .. 31;
end record;
subtype D2CCIP2R_USART234578SEL_Field is Interfaces.STM32.UInt3;
subtype D2CCIP2R_USART16SEL_Field is Interfaces.STM32.UInt3;
subtype D2CCIP2R_RNGSEL_Field is Interfaces.STM32.UInt2;
subtype D2CCIP2R_I2C123SEL_Field is Interfaces.STM32.UInt2;
subtype D2CCIP2R_USBSEL_Field is Interfaces.STM32.UInt2;
subtype D2CCIP2R_CECSEL_Field is Interfaces.STM32.UInt2;
subtype D2CCIP2R_LPTIM1SEL_Field is Interfaces.STM32.UInt3;
-- RCC Domain 2 Kernel Clock Configuration Register
type D2CCIP2R_Register is record
-- USART2/3, UART4,5, 7/8 (APB1) kernel clock source selection
USART234578SEL : D2CCIP2R_USART234578SEL_Field := 16#0#;
-- USART1 and 6 kernel clock source selection
USART16SEL : D2CCIP2R_USART16SEL_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- RNG kernel clock source selection
RNGSEL : D2CCIP2R_RNGSEL_Field := 16#0#;
-- unspecified
Reserved_10_11 : Interfaces.STM32.UInt2 := 16#0#;
-- I2C1,2,3 kernel clock source selection
I2C123SEL : D2CCIP2R_I2C123SEL_Field := 16#0#;
-- unspecified
Reserved_14_19 : Interfaces.STM32.UInt6 := 16#0#;
-- USBOTG 1 and 2 kernel clock source selection
USBSEL : D2CCIP2R_USBSEL_Field := 16#0#;
-- HDMI-CEC kernel clock source selection
CECSEL : D2CCIP2R_CECSEL_Field := 16#0#;
-- unspecified
Reserved_24_27 : Interfaces.STM32.UInt4 := 16#0#;
-- LPTIM1 kernel clock source selection
LPTIM1SEL : D2CCIP2R_LPTIM1SEL_Field := 16#0#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D2CCIP2R_Register use record
USART234578SEL at 0 range 0 .. 2;
USART16SEL at 0 range 3 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
RNGSEL at 0 range 8 .. 9;
Reserved_10_11 at 0 range 10 .. 11;
I2C123SEL at 0 range 12 .. 13;
Reserved_14_19 at 0 range 14 .. 19;
USBSEL at 0 range 20 .. 21;
CECSEL at 0 range 22 .. 23;
Reserved_24_27 at 0 range 24 .. 27;
LPTIM1SEL at 0 range 28 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype D3CCIPR_LPUART1SEL_Field is Interfaces.STM32.UInt3;
subtype D3CCIPR_I2C4SEL_Field is Interfaces.STM32.UInt2;
subtype D3CCIPR_LPTIM2SEL_Field is Interfaces.STM32.UInt3;
subtype D3CCIPR_LPTIM345SEL_Field is Interfaces.STM32.UInt3;
subtype D3CCIPR_ADCSEL_Field is Interfaces.STM32.UInt2;
subtype D3CCIPR_SAI4ASEL_Field is Interfaces.STM32.UInt3;
subtype D3CCIPR_SAI4BSEL_Field is Interfaces.STM32.UInt3;
subtype D3CCIPR_SPI6SEL_Field is Interfaces.STM32.UInt3;
-- RCC Domain 3 Kernel Clock Configuration Register
type D3CCIPR_Register is record
-- LPUART1 kernel clock source selection
LPUART1SEL : D3CCIPR_LPUART1SEL_Field := 16#0#;
-- unspecified
Reserved_3_7 : Interfaces.STM32.UInt5 := 16#0#;
-- I2C4 kernel clock source selection
I2C4SEL : D3CCIPR_I2C4SEL_Field := 16#0#;
-- LPTIM2 kernel clock source selection
LPTIM2SEL : D3CCIPR_LPTIM2SEL_Field := 16#0#;
-- LPTIM3,4,5 kernel clock source selection
LPTIM345SEL : D3CCIPR_LPTIM345SEL_Field := 16#0#;
-- SAR ADC kernel clock source selection
ADCSEL : D3CCIPR_ADCSEL_Field := 16#0#;
-- unspecified
Reserved_18_20 : Interfaces.STM32.UInt3 := 16#0#;
-- Sub-Block A of SAI4 kernel clock source selection
SAI4ASEL : D3CCIPR_SAI4ASEL_Field := 16#0#;
-- Sub-Block B of SAI4 kernel clock source selection
SAI4BSEL : D3CCIPR_SAI4BSEL_Field := 16#0#;
-- unspecified
Reserved_27_27 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 kernel clock source selection
SPI6SEL : D3CCIPR_SPI6SEL_Field := 16#0#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D3CCIPR_Register use record
LPUART1SEL at 0 range 0 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
I2C4SEL at 0 range 8 .. 9;
LPTIM2SEL at 0 range 10 .. 12;
LPTIM345SEL at 0 range 13 .. 15;
ADCSEL at 0 range 16 .. 17;
Reserved_18_20 at 0 range 18 .. 20;
SAI4ASEL at 0 range 21 .. 23;
SAI4BSEL at 0 range 24 .. 26;
Reserved_27_27 at 0 range 27 .. 27;
SPI6SEL at 0 range 28 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype CIER_LSIRDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_LSERDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_HSIRDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_HSERDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_CSIRDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_RC48RDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_PLL1RDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_PLL2RDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_PLL3RDYIE_Field is Interfaces.STM32.Bit;
subtype CIER_LSECSSIE_Field is Interfaces.STM32.Bit;
-- RCC Clock Source Interrupt Enable Register
type CIER_Register is record
-- LSI ready Interrupt Enable
LSIRDYIE : CIER_LSIRDYIE_Field := 16#0#;
-- LSE ready Interrupt Enable
LSERDYIE : CIER_LSERDYIE_Field := 16#0#;
-- HSI ready Interrupt Enable
HSIRDYIE : CIER_HSIRDYIE_Field := 16#0#;
-- HSE ready Interrupt Enable
HSERDYIE : CIER_HSERDYIE_Field := 16#0#;
-- CSI ready Interrupt Enable
CSIRDYIE : CIER_CSIRDYIE_Field := 16#0#;
-- RC48 ready Interrupt Enable
RC48RDYIE : CIER_RC48RDYIE_Field := 16#0#;
-- PLL1 ready Interrupt Enable
PLL1RDYIE : CIER_PLL1RDYIE_Field := 16#0#;
-- PLL2 ready Interrupt Enable
PLL2RDYIE : CIER_PLL2RDYIE_Field := 16#0#;
-- PLL3 ready Interrupt Enable
PLL3RDYIE : CIER_PLL3RDYIE_Field := 16#0#;
-- LSE clock security system Interrupt Enable
LSECSSIE : CIER_LSECSSIE_Field := 16#0#;
-- unspecified
Reserved_10_31 : Interfaces.STM32.UInt22 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CIER_Register use record
LSIRDYIE at 0 range 0 .. 0;
LSERDYIE at 0 range 1 .. 1;
HSIRDYIE at 0 range 2 .. 2;
HSERDYIE at 0 range 3 .. 3;
CSIRDYIE at 0 range 4 .. 4;
RC48RDYIE at 0 range 5 .. 5;
PLL1RDYIE at 0 range 6 .. 6;
PLL2RDYIE at 0 range 7 .. 7;
PLL3RDYIE at 0 range 8 .. 8;
LSECSSIE at 0 range 9 .. 9;
Reserved_10_31 at 0 range 10 .. 31;
end record;
subtype CIFR_LSIRDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_LSERDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_HSIRDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_HSERDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_CSIRDY_Field is Interfaces.STM32.Bit;
subtype CIFR_RC48RDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_PLL1RDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_PLL2RDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_PLL3RDYF_Field is Interfaces.STM32.Bit;
subtype CIFR_LSECSSF_Field is Interfaces.STM32.Bit;
subtype CIFR_HSECSSF_Field is Interfaces.STM32.Bit;
-- RCC Clock Source Interrupt Flag Register
type CIFR_Register is record
-- LSI ready Interrupt Flag
LSIRDYF : CIFR_LSIRDYF_Field := 16#0#;
-- LSE ready Interrupt Flag
LSERDYF : CIFR_LSERDYF_Field := 16#0#;
-- HSI ready Interrupt Flag
HSIRDYF : CIFR_HSIRDYF_Field := 16#0#;
-- HSE ready Interrupt Flag
HSERDYF : CIFR_HSERDYF_Field := 16#0#;
-- CSI ready Interrupt Flag
CSIRDY : CIFR_CSIRDY_Field := 16#0#;
-- RC48 ready Interrupt Flag
RC48RDYF : CIFR_RC48RDYF_Field := 16#0#;
-- PLL1 ready Interrupt Flag
PLL1RDYF : CIFR_PLL1RDYF_Field := 16#0#;
-- PLL2 ready Interrupt Flag
PLL2RDYF : CIFR_PLL2RDYF_Field := 16#0#;
-- PLL3 ready Interrupt Flag
PLL3RDYF : CIFR_PLL3RDYF_Field := 16#0#;
-- LSE clock security system Interrupt Flag
LSECSSF : CIFR_LSECSSF_Field := 16#0#;
-- HSE clock security system Interrupt Flag
HSECSSF : CIFR_HSECSSF_Field := 16#0#;
-- unspecified
Reserved_11_31 : Interfaces.STM32.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CIFR_Register use record
LSIRDYF at 0 range 0 .. 0;
LSERDYF at 0 range 1 .. 1;
HSIRDYF at 0 range 2 .. 2;
HSERDYF at 0 range 3 .. 3;
CSIRDY at 0 range 4 .. 4;
RC48RDYF at 0 range 5 .. 5;
PLL1RDYF at 0 range 6 .. 6;
PLL2RDYF at 0 range 7 .. 7;
PLL3RDYF at 0 range 8 .. 8;
LSECSSF at 0 range 9 .. 9;
HSECSSF at 0 range 10 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
subtype CICR_LSIRDYC_Field is Interfaces.STM32.Bit;
subtype CICR_LSERDYC_Field is Interfaces.STM32.Bit;
subtype CICR_HSIRDYC_Field is Interfaces.STM32.Bit;
subtype CICR_HSERDYC_Field is Interfaces.STM32.Bit;
subtype CICR_HSE_ready_Interrupt_Clear_Field is Interfaces.STM32.Bit;
subtype CICR_RC48RDYC_Field is Interfaces.STM32.Bit;
subtype CICR_PLL1RDYC_Field is Interfaces.STM32.Bit;
subtype CICR_PLL2RDYC_Field is Interfaces.STM32.Bit;
subtype CICR_PLL3RDYC_Field is Interfaces.STM32.Bit;
subtype CICR_LSECSSC_Field is Interfaces.STM32.Bit;
subtype CICR_HSECSSC_Field is Interfaces.STM32.Bit;
-- RCC Clock Source Interrupt Clear Register
type CICR_Register is record
-- LSI ready Interrupt Clear
LSIRDYC : CICR_LSIRDYC_Field := 16#0#;
-- LSE ready Interrupt Clear
LSERDYC : CICR_LSERDYC_Field := 16#0#;
-- HSI ready Interrupt Clear
HSIRDYC : CICR_HSIRDYC_Field := 16#0#;
-- HSE ready Interrupt Clear
HSERDYC : CICR_HSERDYC_Field := 16#0#;
-- CSI ready Interrupt Clear
HSE_ready_Interrupt_Clear : CICR_HSE_ready_Interrupt_Clear_Field :=
16#0#;
-- RC48 ready Interrupt Clear
RC48RDYC : CICR_RC48RDYC_Field := 16#0#;
-- PLL1 ready Interrupt Clear
PLL1RDYC : CICR_PLL1RDYC_Field := 16#0#;
-- PLL2 ready Interrupt Clear
PLL2RDYC : CICR_PLL2RDYC_Field := 16#0#;
-- PLL3 ready Interrupt Clear
PLL3RDYC : CICR_PLL3RDYC_Field := 16#0#;
-- LSE clock security system Interrupt Clear
LSECSSC : CICR_LSECSSC_Field := 16#0#;
-- HSE clock security system Interrupt Clear
HSECSSC : CICR_HSECSSC_Field := 16#0#;
-- unspecified
Reserved_11_31 : Interfaces.STM32.UInt21 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CICR_Register use record
LSIRDYC at 0 range 0 .. 0;
LSERDYC at 0 range 1 .. 1;
HSIRDYC at 0 range 2 .. 2;
HSERDYC at 0 range 3 .. 3;
HSE_ready_Interrupt_Clear at 0 range 4 .. 4;
RC48RDYC at 0 range 5 .. 5;
PLL1RDYC at 0 range 6 .. 6;
PLL2RDYC at 0 range 7 .. 7;
PLL3RDYC at 0 range 8 .. 8;
LSECSSC at 0 range 9 .. 9;
HSECSSC at 0 range 10 .. 10;
Reserved_11_31 at 0 range 11 .. 31;
end record;
subtype BDCR_LSEON_Field is Interfaces.STM32.Bit;
subtype BDCR_LSERDY_Field is Interfaces.STM32.Bit;
subtype BDCR_LSEBYP_Field is Interfaces.STM32.Bit;
subtype BDCR_LSEDRV_Field is Interfaces.STM32.UInt2;
subtype BDCR_LSECSSON_Field is Interfaces.STM32.Bit;
subtype BDCR_LSECSSD_Field is Interfaces.STM32.Bit;
subtype BDCR_RTCSEL_Field is Interfaces.STM32.UInt2;
subtype BDCR_RTCEN_Field is Interfaces.STM32.Bit;
subtype BDCR_BDRST_Field is Interfaces.STM32.Bit;
-- RCC Backup Domain Control Register
type BDCR_Register is record
-- LSE oscillator enabled
LSEON : BDCR_LSEON_Field := 16#0#;
-- LSE oscillator ready
LSERDY : BDCR_LSERDY_Field := 16#0#;
-- LSE oscillator bypass
LSEBYP : BDCR_LSEBYP_Field := 16#0#;
-- LSE oscillator driving capability
LSEDRV : BDCR_LSEDRV_Field := 16#0#;
-- LSE clock security system enable
LSECSSON : BDCR_LSECSSON_Field := 16#0#;
-- LSE clock security system failure detection
LSECSSD : BDCR_LSECSSD_Field := 16#0#;
-- unspecified
Reserved_7_7 : Interfaces.STM32.Bit := 16#0#;
-- RTC clock source selection
RTCSEL : BDCR_RTCSEL_Field := 16#0#;
-- unspecified
Reserved_10_14 : Interfaces.STM32.UInt5 := 16#0#;
-- RTC clock enable
RTCEN : BDCR_RTCEN_Field := 16#0#;
-- BDRST domain software reset
BDRST : BDCR_BDRST_Field := 16#0#;
-- unspecified
Reserved_17_31 : Interfaces.STM32.UInt15 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for BDCR_Register use record
LSEON at 0 range 0 .. 0;
LSERDY at 0 range 1 .. 1;
LSEBYP at 0 range 2 .. 2;
LSEDRV at 0 range 3 .. 4;
LSECSSON at 0 range 5 .. 5;
LSECSSD at 0 range 6 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
RTCSEL at 0 range 8 .. 9;
Reserved_10_14 at 0 range 10 .. 14;
RTCEN at 0 range 15 .. 15;
BDRST at 0 range 16 .. 16;
Reserved_17_31 at 0 range 17 .. 31;
end record;
subtype CSR_LSION_Field is Interfaces.STM32.Bit;
subtype CSR_LSIRDY_Field is Interfaces.STM32.Bit;
-- RCC Clock Control and Status Register
type CSR_Register is record
-- LSI oscillator enable
LSION : CSR_LSION_Field := 16#0#;
-- LSI oscillator ready
LSIRDY : CSR_LSIRDY_Field := 16#0#;
-- unspecified
Reserved_2_31 : Interfaces.STM32.UInt30 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CSR_Register use record
LSION at 0 range 0 .. 0;
LSIRDY at 0 range 1 .. 1;
Reserved_2_31 at 0 range 2 .. 31;
end record;
subtype AHB3RSTR_MDMARST_Field is Interfaces.STM32.Bit;
subtype AHB3RSTR_DMA2DRST_Field is Interfaces.STM32.Bit;
subtype AHB3RSTR_JPGDECRST_Field is Interfaces.STM32.Bit;
subtype AHB3RSTR_FMCRST_Field is Interfaces.STM32.Bit;
subtype AHB3RSTR_QSPIRST_Field is Interfaces.STM32.Bit;
subtype AHB3RSTR_SDMMC1RST_Field is Interfaces.STM32.Bit;
subtype AHB3RSTR_CPURST_Field is Interfaces.STM32.Bit;
-- RCC AHB3 Reset Register
type AHB3RSTR_Register is record
-- MDMA block reset
MDMARST : AHB3RSTR_MDMARST_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- DMA2D block reset
DMA2DRST : AHB3RSTR_DMA2DRST_Field := 16#0#;
-- JPGDEC block reset
JPGDECRST : AHB3RSTR_JPGDECRST_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- FMC block reset
FMCRST : AHB3RSTR_FMCRST_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- QUADSPI and QUADSPI delay block reset
QSPIRST : AHB3RSTR_QSPIRST_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.STM32.Bit := 16#0#;
-- SDMMC1 and SDMMC1 delay block reset
SDMMC1RST : AHB3RSTR_SDMMC1RST_Field := 16#0#;
-- unspecified
Reserved_17_30 : Interfaces.STM32.UInt14 := 16#0#;
-- CPU reset
CPURST : AHB3RSTR_CPURST_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB3RSTR_Register use record
MDMARST at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
DMA2DRST at 0 range 4 .. 4;
JPGDECRST at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
FMCRST at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
QSPIRST at 0 range 14 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
SDMMC1RST at 0 range 16 .. 16;
Reserved_17_30 at 0 range 17 .. 30;
CPURST at 0 range 31 .. 31;
end record;
subtype AHB1RSTR_DMA1RST_Field is Interfaces.STM32.Bit;
subtype AHB1RSTR_DMA2RST_Field is Interfaces.STM32.Bit;
subtype AHB1RSTR_ADC12RST_Field is Interfaces.STM32.Bit;
subtype AHB1RSTR_ETH1MACRST_Field is Interfaces.STM32.Bit;
subtype AHB1RSTR_USB1OTGRST_Field is Interfaces.STM32.Bit;
subtype AHB1RSTR_USB2OTGRST_Field is Interfaces.STM32.Bit;
-- RCC AHB1 Peripheral Reset Register
type AHB1RSTR_Register is record
-- DMA1 block reset
DMA1RST : AHB1RSTR_DMA1RST_Field := 16#0#;
-- DMA2 block reset
DMA2RST : AHB1RSTR_DMA2RST_Field := 16#0#;
-- unspecified
Reserved_2_4 : Interfaces.STM32.UInt3 := 16#0#;
-- ADC1&2 block reset
ADC12RST : AHB1RSTR_ADC12RST_Field := 16#0#;
-- unspecified
Reserved_6_14 : Interfaces.STM32.UInt9 := 16#0#;
-- ETH1MAC block reset
ETH1MACRST : AHB1RSTR_ETH1MACRST_Field := 16#0#;
-- unspecified
Reserved_16_24 : Interfaces.STM32.UInt9 := 16#0#;
-- USB1OTG block reset
USB1OTGRST : AHB1RSTR_USB1OTGRST_Field := 16#0#;
-- unspecified
Reserved_26_26 : Interfaces.STM32.Bit := 16#0#;
-- USB2OTG block reset
USB2OTGRST : AHB1RSTR_USB2OTGRST_Field := 16#0#;
-- unspecified
Reserved_28_31 : Interfaces.STM32.UInt4 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB1RSTR_Register use record
DMA1RST at 0 range 0 .. 0;
DMA2RST at 0 range 1 .. 1;
Reserved_2_4 at 0 range 2 .. 4;
ADC12RST at 0 range 5 .. 5;
Reserved_6_14 at 0 range 6 .. 14;
ETH1MACRST at 0 range 15 .. 15;
Reserved_16_24 at 0 range 16 .. 24;
USB1OTGRST at 0 range 25 .. 25;
Reserved_26_26 at 0 range 26 .. 26;
USB2OTGRST at 0 range 27 .. 27;
Reserved_28_31 at 0 range 28 .. 31;
end record;
subtype AHB2RSTR_CAMITFRST_Field is Interfaces.STM32.Bit;
subtype AHB2RSTR_CRYPTRST_Field is Interfaces.STM32.Bit;
subtype AHB2RSTR_HASHRST_Field is Interfaces.STM32.Bit;
subtype AHB2RSTR_RNGRST_Field is Interfaces.STM32.Bit;
subtype AHB2RSTR_SDMMC2RST_Field is Interfaces.STM32.Bit;
-- RCC AHB2 Peripheral Reset Register
type AHB2RSTR_Register is record
-- CAMITF block reset
CAMITFRST : AHB2RSTR_CAMITFRST_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- Cryptography block reset
CRYPTRST : AHB2RSTR_CRYPTRST_Field := 16#0#;
-- Hash block reset
HASHRST : AHB2RSTR_HASHRST_Field := 16#0#;
-- Random Number Generator block reset
RNGRST : AHB2RSTR_RNGRST_Field := 16#0#;
-- unspecified
Reserved_7_8 : Interfaces.STM32.UInt2 := 16#0#;
-- SDMMC2 and SDMMC2 Delay block reset
SDMMC2RST : AHB2RSTR_SDMMC2RST_Field := 16#0#;
-- unspecified
Reserved_10_31 : Interfaces.STM32.UInt22 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB2RSTR_Register use record
CAMITFRST at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
CRYPTRST at 0 range 4 .. 4;
HASHRST at 0 range 5 .. 5;
RNGRST at 0 range 6 .. 6;
Reserved_7_8 at 0 range 7 .. 8;
SDMMC2RST at 0 range 9 .. 9;
Reserved_10_31 at 0 range 10 .. 31;
end record;
subtype AHB4RSTR_GPIOARST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOBRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOCRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIODRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOERST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOFRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOGRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOHRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOIRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOJRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_GPIOKRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_CRCRST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_BDMARST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_ADC3RST_Field is Interfaces.STM32.Bit;
subtype AHB4RSTR_HSEMRST_Field is Interfaces.STM32.Bit;
-- RCC AHB4 Peripheral Reset Register
type AHB4RSTR_Register is record
-- GPIO block reset
GPIOARST : AHB4RSTR_GPIOARST_Field := 16#0#;
-- GPIO block reset
GPIOBRST : AHB4RSTR_GPIOBRST_Field := 16#0#;
-- GPIO block reset
GPIOCRST : AHB4RSTR_GPIOCRST_Field := 16#0#;
-- GPIO block reset
GPIODRST : AHB4RSTR_GPIODRST_Field := 16#0#;
-- GPIO block reset
GPIOERST : AHB4RSTR_GPIOERST_Field := 16#0#;
-- GPIO block reset
GPIOFRST : AHB4RSTR_GPIOFRST_Field := 16#0#;
-- GPIO block reset
GPIOGRST : AHB4RSTR_GPIOGRST_Field := 16#0#;
-- GPIO block reset
GPIOHRST : AHB4RSTR_GPIOHRST_Field := 16#0#;
-- GPIO block reset
GPIOIRST : AHB4RSTR_GPIOIRST_Field := 16#0#;
-- GPIO block reset
GPIOJRST : AHB4RSTR_GPIOJRST_Field := 16#0#;
-- GPIO block reset
GPIOKRST : AHB4RSTR_GPIOKRST_Field := 16#0#;
-- unspecified
Reserved_11_18 : Interfaces.STM32.Byte := 16#0#;
-- CRC block reset
CRCRST : AHB4RSTR_CRCRST_Field := 16#0#;
-- unspecified
Reserved_20_20 : Interfaces.STM32.Bit := 16#0#;
-- BDMA block reset
BDMARST : AHB4RSTR_BDMARST_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- ADC3 block reset
ADC3RST : AHB4RSTR_ADC3RST_Field := 16#0#;
-- HSEM block reset
HSEMRST : AHB4RSTR_HSEMRST_Field := 16#0#;
-- unspecified
Reserved_26_31 : Interfaces.STM32.UInt6 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB4RSTR_Register use record
GPIOARST at 0 range 0 .. 0;
GPIOBRST at 0 range 1 .. 1;
GPIOCRST at 0 range 2 .. 2;
GPIODRST at 0 range 3 .. 3;
GPIOERST at 0 range 4 .. 4;
GPIOFRST at 0 range 5 .. 5;
GPIOGRST at 0 range 6 .. 6;
GPIOHRST at 0 range 7 .. 7;
GPIOIRST at 0 range 8 .. 8;
GPIOJRST at 0 range 9 .. 9;
GPIOKRST at 0 range 10 .. 10;
Reserved_11_18 at 0 range 11 .. 18;
CRCRST at 0 range 19 .. 19;
Reserved_20_20 at 0 range 20 .. 20;
BDMARST at 0 range 21 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
ADC3RST at 0 range 24 .. 24;
HSEMRST at 0 range 25 .. 25;
Reserved_26_31 at 0 range 26 .. 31;
end record;
subtype APB3RSTR_LTDCRST_Field is Interfaces.STM32.Bit;
-- RCC APB3 Peripheral Reset Register
type APB3RSTR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- LTDC block reset
LTDCRST : APB3RSTR_LTDCRST_Field := 16#0#;
-- unspecified
Reserved_4_31 : Interfaces.STM32.UInt28 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB3RSTR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
LTDCRST at 0 range 3 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
subtype APB1LRSTR_TIM2RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM3RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM4RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM5RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM6RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM7RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM12RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM13RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_TIM14RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_LPTIM1RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_SPI2RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_SPI3RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_SPDIFRXRST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_USART2RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_USART3RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_UART4RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_UART5RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_I2C1RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_I2C2RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_I2C3RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_CECRST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_DAC12RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_UART7RST_Field is Interfaces.STM32.Bit;
subtype APB1LRSTR_UART8RST_Field is Interfaces.STM32.Bit;
-- RCC APB1 Peripheral Reset Register
type APB1LRSTR_Register is record
-- TIM block reset
TIM2RST : APB1LRSTR_TIM2RST_Field := 16#0#;
-- TIM block reset
TIM3RST : APB1LRSTR_TIM3RST_Field := 16#0#;
-- TIM block reset
TIM4RST : APB1LRSTR_TIM4RST_Field := 16#0#;
-- TIM block reset
TIM5RST : APB1LRSTR_TIM5RST_Field := 16#0#;
-- TIM block reset
TIM6RST : APB1LRSTR_TIM6RST_Field := 16#0#;
-- TIM block reset
TIM7RST : APB1LRSTR_TIM7RST_Field := 16#0#;
-- TIM block reset
TIM12RST : APB1LRSTR_TIM12RST_Field := 16#0#;
-- TIM block reset
TIM13RST : APB1LRSTR_TIM13RST_Field := 16#0#;
-- TIM block reset
TIM14RST : APB1LRSTR_TIM14RST_Field := 16#0#;
-- TIM block reset
LPTIM1RST : APB1LRSTR_LPTIM1RST_Field := 16#0#;
-- unspecified
Reserved_10_13 : Interfaces.STM32.UInt4 := 16#0#;
-- SPI2 block reset
SPI2RST : APB1LRSTR_SPI2RST_Field := 16#0#;
-- SPI3 block reset
SPI3RST : APB1LRSTR_SPI3RST_Field := 16#0#;
-- SPDIFRX block reset
SPDIFRXRST : APB1LRSTR_SPDIFRXRST_Field := 16#0#;
-- USART2 block reset
USART2RST : APB1LRSTR_USART2RST_Field := 16#0#;
-- USART3 block reset
USART3RST : APB1LRSTR_USART3RST_Field := 16#0#;
-- UART4 block reset
UART4RST : APB1LRSTR_UART4RST_Field := 16#0#;
-- UART5 block reset
UART5RST : APB1LRSTR_UART5RST_Field := 16#0#;
-- I2C1 block reset
I2C1RST : APB1LRSTR_I2C1RST_Field := 16#0#;
-- I2C2 block reset
I2C2RST : APB1LRSTR_I2C2RST_Field := 16#0#;
-- I2C3 block reset
I2C3RST : APB1LRSTR_I2C3RST_Field := 16#0#;
-- unspecified
Reserved_24_26 : Interfaces.STM32.UInt3 := 16#0#;
-- HDMI-CEC block reset
CECRST : APB1LRSTR_CECRST_Field := 16#0#;
-- unspecified
Reserved_28_28 : Interfaces.STM32.Bit := 16#0#;
-- DAC1 and 2 Blocks Reset
DAC12RST : APB1LRSTR_DAC12RST_Field := 16#0#;
-- UART7 block reset
UART7RST : APB1LRSTR_UART7RST_Field := 16#0#;
-- UART8 block reset
UART8RST : APB1LRSTR_UART8RST_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB1LRSTR_Register use record
TIM2RST at 0 range 0 .. 0;
TIM3RST at 0 range 1 .. 1;
TIM4RST at 0 range 2 .. 2;
TIM5RST at 0 range 3 .. 3;
TIM6RST at 0 range 4 .. 4;
TIM7RST at 0 range 5 .. 5;
TIM12RST at 0 range 6 .. 6;
TIM13RST at 0 range 7 .. 7;
TIM14RST at 0 range 8 .. 8;
LPTIM1RST at 0 range 9 .. 9;
Reserved_10_13 at 0 range 10 .. 13;
SPI2RST at 0 range 14 .. 14;
SPI3RST at 0 range 15 .. 15;
SPDIFRXRST at 0 range 16 .. 16;
USART2RST at 0 range 17 .. 17;
USART3RST at 0 range 18 .. 18;
UART4RST at 0 range 19 .. 19;
UART5RST at 0 range 20 .. 20;
I2C1RST at 0 range 21 .. 21;
I2C2RST at 0 range 22 .. 22;
I2C3RST at 0 range 23 .. 23;
Reserved_24_26 at 0 range 24 .. 26;
CECRST at 0 range 27 .. 27;
Reserved_28_28 at 0 range 28 .. 28;
DAC12RST at 0 range 29 .. 29;
UART7RST at 0 range 30 .. 30;
UART8RST at 0 range 31 .. 31;
end record;
subtype APB1HRSTR_CRSRST_Field is Interfaces.STM32.Bit;
subtype APB1HRSTR_SWPRST_Field is Interfaces.STM32.Bit;
subtype APB1HRSTR_OPAMPRST_Field is Interfaces.STM32.Bit;
subtype APB1HRSTR_MDIOSRST_Field is Interfaces.STM32.Bit;
subtype APB1HRSTR_FDCANRST_Field is Interfaces.STM32.Bit;
-- RCC APB1 Peripheral Reset Register
type APB1HRSTR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- Clock Recovery System reset
CRSRST : APB1HRSTR_CRSRST_Field := 16#0#;
-- SWPMI block reset
SWPRST : APB1HRSTR_SWPRST_Field := 16#0#;
-- unspecified
Reserved_3_3 : Interfaces.STM32.Bit := 16#0#;
-- OPAMP block reset
OPAMPRST : APB1HRSTR_OPAMPRST_Field := 16#0#;
-- MDIOS block reset
MDIOSRST : APB1HRSTR_MDIOSRST_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FDCAN block reset
FDCANRST : APB1HRSTR_FDCANRST_Field := 16#0#;
-- unspecified
Reserved_9_31 : Interfaces.STM32.UInt23 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB1HRSTR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
CRSRST at 0 range 1 .. 1;
SWPRST at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
OPAMPRST at 0 range 4 .. 4;
MDIOSRST at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FDCANRST at 0 range 8 .. 8;
Reserved_9_31 at 0 range 9 .. 31;
end record;
subtype APB2RSTR_TIM1RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_TIM8RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_USART1RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_USART6RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_SPI1RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_SPI4RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_TIM15RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_TIM16RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_TIM17RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_SPI5RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_SAI1RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_SAI2RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_SAI3RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_DFSDM1RST_Field is Interfaces.STM32.Bit;
subtype APB2RSTR_HRTIMRST_Field is Interfaces.STM32.Bit;
-- RCC APB2 Peripheral Reset Register
type APB2RSTR_Register is record
-- TIM1 block reset
TIM1RST : APB2RSTR_TIM1RST_Field := 16#0#;
-- TIM8 block reset
TIM8RST : APB2RSTR_TIM8RST_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- USART1 block reset
USART1RST : APB2RSTR_USART1RST_Field := 16#0#;
-- USART6 block reset
USART6RST : APB2RSTR_USART6RST_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- SPI1 block reset
SPI1RST : APB2RSTR_SPI1RST_Field := 16#0#;
-- SPI4 block reset
SPI4RST : APB2RSTR_SPI4RST_Field := 16#0#;
-- unspecified
Reserved_14_15 : Interfaces.STM32.UInt2 := 16#0#;
-- TIM15 block reset
TIM15RST : APB2RSTR_TIM15RST_Field := 16#0#;
-- TIM16 block reset
TIM16RST : APB2RSTR_TIM16RST_Field := 16#0#;
-- TIM17 block reset
TIM17RST : APB2RSTR_TIM17RST_Field := 16#0#;
-- unspecified
Reserved_19_19 : Interfaces.STM32.Bit := 16#0#;
-- SPI5 block reset
SPI5RST : APB2RSTR_SPI5RST_Field := 16#0#;
-- unspecified
Reserved_21_21 : Interfaces.STM32.Bit := 16#0#;
-- SAI1 block reset
SAI1RST : APB2RSTR_SAI1RST_Field := 16#0#;
-- SAI2 block reset
SAI2RST : APB2RSTR_SAI2RST_Field := 16#0#;
-- SAI3 block reset
SAI3RST : APB2RSTR_SAI3RST_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- DFSDM1 block reset
DFSDM1RST : APB2RSTR_DFSDM1RST_Field := 16#0#;
-- HRTIM block reset
HRTIMRST : APB2RSTR_HRTIMRST_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB2RSTR_Register use record
TIM1RST at 0 range 0 .. 0;
TIM8RST at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
USART1RST at 0 range 4 .. 4;
USART6RST at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
SPI1RST at 0 range 12 .. 12;
SPI4RST at 0 range 13 .. 13;
Reserved_14_15 at 0 range 14 .. 15;
TIM15RST at 0 range 16 .. 16;
TIM16RST at 0 range 17 .. 17;
TIM17RST at 0 range 18 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
SPI5RST at 0 range 20 .. 20;
Reserved_21_21 at 0 range 21 .. 21;
SAI1RST at 0 range 22 .. 22;
SAI2RST at 0 range 23 .. 23;
SAI3RST at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
DFSDM1RST at 0 range 28 .. 28;
HRTIMRST at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype APB4RSTR_SYSCFGRST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_LPUART1RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_SPI6RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_I2C4RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_LPTIM2RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_LPTIM3RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_LPTIM4RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_LPTIM5RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_COMP12RST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_VREFRST_Field is Interfaces.STM32.Bit;
subtype APB4RSTR_SAI4RST_Field is Interfaces.STM32.Bit;
-- RCC APB4 Peripheral Reset Register
type APB4RSTR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- SYSCFG block reset
SYSCFGRST : APB4RSTR_SYSCFGRST_Field := 16#0#;
-- unspecified
Reserved_2_2 : Interfaces.STM32.Bit := 16#0#;
-- LPUART1 block reset
LPUART1RST : APB4RSTR_LPUART1RST_Field := 16#0#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 block reset
SPI6RST : APB4RSTR_SPI6RST_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- I2C4 block reset
I2C4RST : APB4RSTR_I2C4RST_Field := 16#0#;
-- unspecified
Reserved_8_8 : Interfaces.STM32.Bit := 16#0#;
-- LPTIM2 block reset
LPTIM2RST : APB4RSTR_LPTIM2RST_Field := 16#0#;
-- LPTIM3 block reset
LPTIM3RST : APB4RSTR_LPTIM3RST_Field := 16#0#;
-- LPTIM4 block reset
LPTIM4RST : APB4RSTR_LPTIM4RST_Field := 16#0#;
-- LPTIM5 block reset
LPTIM5RST : APB4RSTR_LPTIM5RST_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- COMP12 Blocks Reset
COMP12RST : APB4RSTR_COMP12RST_Field := 16#0#;
-- VREF block reset
VREFRST : APB4RSTR_VREFRST_Field := 16#0#;
-- unspecified
Reserved_16_20 : Interfaces.STM32.UInt5 := 16#0#;
-- SAI4 block reset
SAI4RST : APB4RSTR_SAI4RST_Field := 16#0#;
-- unspecified
Reserved_22_31 : Interfaces.STM32.UInt10 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB4RSTR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
SYSCFGRST at 0 range 1 .. 1;
Reserved_2_2 at 0 range 2 .. 2;
LPUART1RST at 0 range 3 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
SPI6RST at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
I2C4RST at 0 range 7 .. 7;
Reserved_8_8 at 0 range 8 .. 8;
LPTIM2RST at 0 range 9 .. 9;
LPTIM3RST at 0 range 10 .. 10;
LPTIM4RST at 0 range 11 .. 11;
LPTIM5RST at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
COMP12RST at 0 range 14 .. 14;
VREFRST at 0 range 15 .. 15;
Reserved_16_20 at 0 range 16 .. 20;
SAI4RST at 0 range 21 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
subtype GCR_WW1RSC_Field is Interfaces.STM32.Bit;
-- RCC Global Control Register
type GCR_Register is record
-- WWDG1 reset scope control
WW1RSC : GCR_WW1RSC_Field := 16#0#;
-- unspecified
Reserved_1_31 : Interfaces.STM32.UInt31 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for GCR_Register use record
WW1RSC at 0 range 0 .. 0;
Reserved_1_31 at 0 range 1 .. 31;
end record;
subtype D3AMR_BDMAAMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_LPUART1AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_SPI6AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_I2C4AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_LPTIM2AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_LPTIM3AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_LPTIM4AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_LPTIM5AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_COMP12AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_VREFAMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_RTCAMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_CRCAMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_SAI4AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_ADC3AMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_BKPRAMAMEN_Field is Interfaces.STM32.Bit;
subtype D3AMR_SRAM4AMEN_Field is Interfaces.STM32.Bit;
-- RCC D3 Autonomous mode Register
type D3AMR_Register is record
-- BDMA and DMAMUX Autonomous mode enable
BDMAAMEN : D3AMR_BDMAAMEN_Field := 16#0#;
-- unspecified
Reserved_1_2 : Interfaces.STM32.UInt2 := 16#0#;
-- LPUART1 Autonomous mode enable
LPUART1AMEN : D3AMR_LPUART1AMEN_Field := 16#0#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 Autonomous mode enable
SPI6AMEN : D3AMR_SPI6AMEN_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- I2C4 Autonomous mode enable
I2C4AMEN : D3AMR_I2C4AMEN_Field := 16#0#;
-- unspecified
Reserved_8_8 : Interfaces.STM32.Bit := 16#0#;
-- LPTIM2 Autonomous mode enable
LPTIM2AMEN : D3AMR_LPTIM2AMEN_Field := 16#0#;
-- LPTIM3 Autonomous mode enable
LPTIM3AMEN : D3AMR_LPTIM3AMEN_Field := 16#0#;
-- LPTIM4 Autonomous mode enable
LPTIM4AMEN : D3AMR_LPTIM4AMEN_Field := 16#0#;
-- LPTIM5 Autonomous mode enable
LPTIM5AMEN : D3AMR_LPTIM5AMEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- COMP12 Autonomous mode enable
COMP12AMEN : D3AMR_COMP12AMEN_Field := 16#0#;
-- VREF Autonomous mode enable
VREFAMEN : D3AMR_VREFAMEN_Field := 16#0#;
-- RTC Autonomous mode enable
RTCAMEN : D3AMR_RTCAMEN_Field := 16#0#;
-- unspecified
Reserved_17_18 : Interfaces.STM32.UInt2 := 16#0#;
-- CRC Autonomous mode enable
CRCAMEN : D3AMR_CRCAMEN_Field := 16#0#;
-- unspecified
Reserved_20_20 : Interfaces.STM32.Bit := 16#0#;
-- SAI4 Autonomous mode enable
SAI4AMEN : D3AMR_SAI4AMEN_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- ADC3 Autonomous mode enable
ADC3AMEN : D3AMR_ADC3AMEN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- Backup RAM Autonomous mode enable
BKPRAMAMEN : D3AMR_BKPRAMAMEN_Field := 16#0#;
-- SRAM4 Autonomous mode enable
SRAM4AMEN : D3AMR_SRAM4AMEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for D3AMR_Register use record
BDMAAMEN at 0 range 0 .. 0;
Reserved_1_2 at 0 range 1 .. 2;
LPUART1AMEN at 0 range 3 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
SPI6AMEN at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
I2C4AMEN at 0 range 7 .. 7;
Reserved_8_8 at 0 range 8 .. 8;
LPTIM2AMEN at 0 range 9 .. 9;
LPTIM3AMEN at 0 range 10 .. 10;
LPTIM4AMEN at 0 range 11 .. 11;
LPTIM5AMEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
COMP12AMEN at 0 range 14 .. 14;
VREFAMEN at 0 range 15 .. 15;
RTCAMEN at 0 range 16 .. 16;
Reserved_17_18 at 0 range 17 .. 18;
CRCAMEN at 0 range 19 .. 19;
Reserved_20_20 at 0 range 20 .. 20;
SAI4AMEN at 0 range 21 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
ADC3AMEN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
BKPRAMAMEN at 0 range 28 .. 28;
SRAM4AMEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype RSR_RMVF_Field is Interfaces.STM32.Bit;
subtype RSR_CPURSTF_Field is Interfaces.STM32.Bit;
subtype RSR_D1RSTF_Field is Interfaces.STM32.Bit;
subtype RSR_D2RSTF_Field is Interfaces.STM32.Bit;
subtype RSR_BORRSTF_Field is Interfaces.STM32.Bit;
subtype RSR_PINRSTF_Field is Interfaces.STM32.Bit;
subtype RSR_PORRSTF_Field is Interfaces.STM32.Bit;
subtype RSR_SFTRSTF_Field is Interfaces.STM32.Bit;
subtype RSR_IWDG1RSTF_Field is Interfaces.STM32.Bit;
subtype RSR_WWDG1RSTF_Field is Interfaces.STM32.Bit;
subtype RSR_LPWRRSTF_Field is Interfaces.STM32.Bit;
-- RCC Reset Status Register
type RSR_Register is record
-- unspecified
Reserved_0_15 : Interfaces.STM32.UInt16 := 16#0#;
-- Remove reset flag
RMVF : RSR_RMVF_Field := 16#0#;
-- CPU reset flag
CPURSTF : RSR_CPURSTF_Field := 16#0#;
-- unspecified
Reserved_18_18 : Interfaces.STM32.Bit := 16#0#;
-- D1 domain power switch reset flag
D1RSTF : RSR_D1RSTF_Field := 16#0#;
-- D2 domain power switch reset flag
D2RSTF : RSR_D2RSTF_Field := 16#0#;
-- BOR reset flag
BORRSTF : RSR_BORRSTF_Field := 16#0#;
-- Pin reset flag (NRST)
PINRSTF : RSR_PINRSTF_Field := 16#0#;
-- POR/PDR reset flag
PORRSTF : RSR_PORRSTF_Field := 16#0#;
-- System reset from CPU reset flag
SFTRSTF : RSR_SFTRSTF_Field := 16#0#;
-- unspecified
Reserved_25_25 : Interfaces.STM32.Bit := 16#0#;
-- Independent Watchdog reset flag
IWDG1RSTF : RSR_IWDG1RSTF_Field := 16#0#;
-- unspecified
Reserved_27_27 : Interfaces.STM32.Bit := 16#0#;
-- Window Watchdog reset flag
WWDG1RSTF : RSR_WWDG1RSTF_Field := 16#0#;
-- unspecified
Reserved_29_29 : Interfaces.STM32.Bit := 16#0#;
-- Reset due to illegal D1 DStandby or CPU CStop flag
LPWRRSTF : RSR_LPWRRSTF_Field := 16#0#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RSR_Register use record
Reserved_0_15 at 0 range 0 .. 15;
RMVF at 0 range 16 .. 16;
CPURSTF at 0 range 17 .. 17;
Reserved_18_18 at 0 range 18 .. 18;
D1RSTF at 0 range 19 .. 19;
D2RSTF at 0 range 20 .. 20;
BORRSTF at 0 range 21 .. 21;
PINRSTF at 0 range 22 .. 22;
PORRSTF at 0 range 23 .. 23;
SFTRSTF at 0 range 24 .. 24;
Reserved_25_25 at 0 range 25 .. 25;
IWDG1RSTF at 0 range 26 .. 26;
Reserved_27_27 at 0 range 27 .. 27;
WWDG1RSTF at 0 range 28 .. 28;
Reserved_29_29 at 0 range 29 .. 29;
LPWRRSTF at 0 range 30 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype AHB3ENR_MDMAEN_Field is Interfaces.STM32.Bit;
subtype AHB3ENR_DMA2DEN_Field is Interfaces.STM32.Bit;
subtype AHB3ENR_JPGDECEN_Field is Interfaces.STM32.Bit;
subtype AHB3ENR_FMCEN_Field is Interfaces.STM32.Bit;
subtype AHB3ENR_QSPIEN_Field is Interfaces.STM32.Bit;
subtype AHB3ENR_SDMMC1EN_Field is Interfaces.STM32.Bit;
-- RCC AHB3 Clock Register
type AHB3ENR_Register is record
-- MDMA Peripheral Clock Enable
MDMAEN : AHB3ENR_MDMAEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- DMA2D Peripheral Clock Enable
DMA2DEN : AHB3ENR_DMA2DEN_Field := 16#0#;
-- JPGDEC Peripheral Clock Enable
JPGDECEN : AHB3ENR_JPGDECEN_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- FMC Peripheral Clocks Enable
FMCEN : AHB3ENR_FMCEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- QUADSPI and QUADSPI Delay Clock Enable
QSPIEN : AHB3ENR_QSPIEN_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.STM32.Bit := 16#0#;
-- SDMMC1 and SDMMC1 Delay Clock Enable
SDMMC1EN : AHB3ENR_SDMMC1EN_Field := 16#0#;
-- unspecified
Reserved_17_31 : Interfaces.STM32.UInt15 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB3ENR_Register use record
MDMAEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
DMA2DEN at 0 range 4 .. 4;
JPGDECEN at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
FMCEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
QSPIEN at 0 range 14 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
SDMMC1EN at 0 range 16 .. 16;
Reserved_17_31 at 0 range 17 .. 31;
end record;
subtype AHB1ENR_DMA1EN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_DMA2EN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_ADC12EN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_ETH1MACEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_ETH1TXEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_ETH1RXEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_USB2OTGHSULPIEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_USB1OTGEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_USB1ULPIEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_USB2OTGEN_Field is Interfaces.STM32.Bit;
subtype AHB1ENR_USB2ULPIEN_Field is Interfaces.STM32.Bit;
-- RCC AHB1 Clock Register
type AHB1ENR_Register is record
-- DMA1 Clock Enable
DMA1EN : AHB1ENR_DMA1EN_Field := 16#0#;
-- DMA2 Clock Enable
DMA2EN : AHB1ENR_DMA2EN_Field := 16#0#;
-- unspecified
Reserved_2_4 : Interfaces.STM32.UInt3 := 16#0#;
-- ADC1/2 Peripheral Clocks Enable
ADC12EN : AHB1ENR_ADC12EN_Field := 16#0#;
-- unspecified
Reserved_6_14 : Interfaces.STM32.UInt9 := 16#0#;
-- Ethernet MAC bus interface Clock Enable
ETH1MACEN : AHB1ENR_ETH1MACEN_Field := 16#0#;
-- Ethernet Transmission Clock Enable
ETH1TXEN : AHB1ENR_ETH1TXEN_Field := 16#0#;
-- Ethernet Reception Clock Enable
ETH1RXEN : AHB1ENR_ETH1RXEN_Field := 16#0#;
-- Enable USB_PHY2 clocks
USB2OTGHSULPIEN : AHB1ENR_USB2OTGHSULPIEN_Field := 16#0#;
-- unspecified
Reserved_19_24 : Interfaces.STM32.UInt6 := 16#0#;
-- USB1OTG Peripheral Clocks Enable
USB1OTGEN : AHB1ENR_USB1OTGEN_Field := 16#0#;
-- USB_PHY1 Clocks Enable
USB1ULPIEN : AHB1ENR_USB1ULPIEN_Field := 16#0#;
-- USB2OTG Peripheral Clocks Enable
USB2OTGEN : AHB1ENR_USB2OTGEN_Field := 16#0#;
-- USB_PHY2 Clocks Enable
USB2ULPIEN : AHB1ENR_USB2ULPIEN_Field := 16#0#;
-- unspecified
Reserved_29_31 : Interfaces.STM32.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB1ENR_Register use record
DMA1EN at 0 range 0 .. 0;
DMA2EN at 0 range 1 .. 1;
Reserved_2_4 at 0 range 2 .. 4;
ADC12EN at 0 range 5 .. 5;
Reserved_6_14 at 0 range 6 .. 14;
ETH1MACEN at 0 range 15 .. 15;
ETH1TXEN at 0 range 16 .. 16;
ETH1RXEN at 0 range 17 .. 17;
USB2OTGHSULPIEN at 0 range 18 .. 18;
Reserved_19_24 at 0 range 19 .. 24;
USB1OTGEN at 0 range 25 .. 25;
USB1ULPIEN at 0 range 26 .. 26;
USB2OTGEN at 0 range 27 .. 27;
USB2ULPIEN at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype AHB2ENR_CAMITFEN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_CRYPTEN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_HASHEN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_RNGEN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_SDMMC2EN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_SRAM1EN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_SRAM2EN_Field is Interfaces.STM32.Bit;
subtype AHB2ENR_SRAM3EN_Field is Interfaces.STM32.Bit;
-- RCC AHB2 Clock Register
type AHB2ENR_Register is record
-- CAMITF peripheral clock enable
CAMITFEN : AHB2ENR_CAMITFEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- CRYPT peripheral clock enable
CRYPTEN : AHB2ENR_CRYPTEN_Field := 16#0#;
-- HASH peripheral clock enable
HASHEN : AHB2ENR_HASHEN_Field := 16#0#;
-- RNG peripheral clocks enable
RNGEN : AHB2ENR_RNGEN_Field := 16#0#;
-- unspecified
Reserved_7_8 : Interfaces.STM32.UInt2 := 16#0#;
-- SDMMC2 and SDMMC2 delay clock enable
SDMMC2EN : AHB2ENR_SDMMC2EN_Field := 16#0#;
-- unspecified
Reserved_10_28 : Interfaces.STM32.UInt19 := 16#0#;
-- SRAM1 block enable
SRAM1EN : AHB2ENR_SRAM1EN_Field := 16#0#;
-- SRAM2 block enable
SRAM2EN : AHB2ENR_SRAM2EN_Field := 16#0#;
-- SRAM3 block enable
SRAM3EN : AHB2ENR_SRAM3EN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB2ENR_Register use record
CAMITFEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
CRYPTEN at 0 range 4 .. 4;
HASHEN at 0 range 5 .. 5;
RNGEN at 0 range 6 .. 6;
Reserved_7_8 at 0 range 7 .. 8;
SDMMC2EN at 0 range 9 .. 9;
Reserved_10_28 at 0 range 10 .. 28;
SRAM1EN at 0 range 29 .. 29;
SRAM2EN at 0 range 30 .. 30;
SRAM3EN at 0 range 31 .. 31;
end record;
subtype AHB4ENR_GPIOAEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOBEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOCEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIODEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOEEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOFEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOGEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOHEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOIEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOJEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_GPIOKEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_CRCEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_BDMAEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_ADC3EN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_HSEMEN_Field is Interfaces.STM32.Bit;
subtype AHB4ENR_BKPRAMEN_Field is Interfaces.STM32.Bit;
-- RCC AHB4 Clock Register
type AHB4ENR_Register is record
-- 0GPIO peripheral clock enable
GPIOAEN : AHB4ENR_GPIOAEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOBEN : AHB4ENR_GPIOBEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOCEN : AHB4ENR_GPIOCEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIODEN : AHB4ENR_GPIODEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOEEN : AHB4ENR_GPIOEEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOFEN : AHB4ENR_GPIOFEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOGEN : AHB4ENR_GPIOGEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOHEN : AHB4ENR_GPIOHEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOIEN : AHB4ENR_GPIOIEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOJEN : AHB4ENR_GPIOJEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOKEN : AHB4ENR_GPIOKEN_Field := 16#0#;
-- unspecified
Reserved_11_18 : Interfaces.STM32.Byte := 16#0#;
-- CRC peripheral clock enable
CRCEN : AHB4ENR_CRCEN_Field := 16#0#;
-- unspecified
Reserved_20_20 : Interfaces.STM32.Bit := 16#0#;
-- BDMA and DMAMUX2 Clock Enable
BDMAEN : AHB4ENR_BDMAEN_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- ADC3 Peripheral Clocks Enable
ADC3EN : AHB4ENR_ADC3EN_Field := 16#0#;
-- HSEM peripheral clock enable
HSEMEN : AHB4ENR_HSEMEN_Field := 16#0#;
-- unspecified
Reserved_26_27 : Interfaces.STM32.UInt2 := 16#0#;
-- Backup RAM Clock Enable
BKPRAMEN : AHB4ENR_BKPRAMEN_Field := 16#0#;
-- unspecified
Reserved_29_31 : Interfaces.STM32.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB4ENR_Register use record
GPIOAEN at 0 range 0 .. 0;
GPIOBEN at 0 range 1 .. 1;
GPIOCEN at 0 range 2 .. 2;
GPIODEN at 0 range 3 .. 3;
GPIOEEN at 0 range 4 .. 4;
GPIOFEN at 0 range 5 .. 5;
GPIOGEN at 0 range 6 .. 6;
GPIOHEN at 0 range 7 .. 7;
GPIOIEN at 0 range 8 .. 8;
GPIOJEN at 0 range 9 .. 9;
GPIOKEN at 0 range 10 .. 10;
Reserved_11_18 at 0 range 11 .. 18;
CRCEN at 0 range 19 .. 19;
Reserved_20_20 at 0 range 20 .. 20;
BDMAEN at 0 range 21 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
ADC3EN at 0 range 24 .. 24;
HSEMEN at 0 range 25 .. 25;
Reserved_26_27 at 0 range 26 .. 27;
BKPRAMEN at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype APB3ENR_LTDCEN_Field is Interfaces.STM32.Bit;
subtype APB3ENR_WWDG1EN_Field is Interfaces.STM32.Bit;
-- RCC APB3 Clock Register
type APB3ENR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- LTDC peripheral clock enable
LTDCEN : APB3ENR_LTDCEN_Field := 16#0#;
-- unspecified
Reserved_4_5 : Interfaces.STM32.UInt2 := 16#0#;
-- WWDG1 Clock Enable
WWDG1EN : APB3ENR_WWDG1EN_Field := 16#0#;
-- unspecified
Reserved_7_31 : Interfaces.STM32.UInt25 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB3ENR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
LTDCEN at 0 range 3 .. 3;
Reserved_4_5 at 0 range 4 .. 5;
WWDG1EN at 0 range 6 .. 6;
Reserved_7_31 at 0 range 7 .. 31;
end record;
subtype APB1LENR_TIM2EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM3EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM4EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM5EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM6EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM7EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM12EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM13EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_TIM14EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_LPTIM1EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_SPI2EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_SPI3EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_SPDIFRXEN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_USART2EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_USART3EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_UART4EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_UART5EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_I2C1EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_I2C2EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_I2C3EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_CECEN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_DAC12EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_UART7EN_Field is Interfaces.STM32.Bit;
subtype APB1LENR_UART8EN_Field is Interfaces.STM32.Bit;
-- RCC APB1 Clock Register
type APB1LENR_Register is record
-- TIM peripheral clock enable
TIM2EN : APB1LENR_TIM2EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM3EN : APB1LENR_TIM3EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM4EN : APB1LENR_TIM4EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM5EN : APB1LENR_TIM5EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM6EN : APB1LENR_TIM6EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM7EN : APB1LENR_TIM7EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM12EN : APB1LENR_TIM12EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM13EN : APB1LENR_TIM13EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM14EN : APB1LENR_TIM14EN_Field := 16#0#;
-- LPTIM1 Peripheral Clocks Enable
LPTIM1EN : APB1LENR_LPTIM1EN_Field := 16#0#;
-- unspecified
Reserved_10_13 : Interfaces.STM32.UInt4 := 16#0#;
-- SPI2 Peripheral Clocks Enable
SPI2EN : APB1LENR_SPI2EN_Field := 16#0#;
-- SPI3 Peripheral Clocks Enable
SPI3EN : APB1LENR_SPI3EN_Field := 16#0#;
-- SPDIFRX Peripheral Clocks Enable
SPDIFRXEN : APB1LENR_SPDIFRXEN_Field := 16#0#;
-- USART2 Peripheral Clocks Enable
USART2EN : APB1LENR_USART2EN_Field := 16#0#;
-- USART3 Peripheral Clocks Enable
USART3EN : APB1LENR_USART3EN_Field := 16#0#;
-- UART4 Peripheral Clocks Enable
UART4EN : APB1LENR_UART4EN_Field := 16#0#;
-- UART5 Peripheral Clocks Enable
UART5EN : APB1LENR_UART5EN_Field := 16#0#;
-- I2C1 Peripheral Clocks Enable
I2C1EN : APB1LENR_I2C1EN_Field := 16#0#;
-- I2C2 Peripheral Clocks Enable
I2C2EN : APB1LENR_I2C2EN_Field := 16#0#;
-- I2C3 Peripheral Clocks Enable
I2C3EN : APB1LENR_I2C3EN_Field := 16#0#;
-- unspecified
Reserved_24_26 : Interfaces.STM32.UInt3 := 16#0#;
-- HDMI-CEC peripheral clock enable
CECEN : APB1LENR_CECEN_Field := 16#0#;
-- unspecified
Reserved_28_28 : Interfaces.STM32.Bit := 16#0#;
-- DAC1&2 peripheral clock enable
DAC12EN : APB1LENR_DAC12EN_Field := 16#0#;
-- UART7 Peripheral Clocks Enable
UART7EN : APB1LENR_UART7EN_Field := 16#0#;
-- UART8 Peripheral Clocks Enable
UART8EN : APB1LENR_UART8EN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB1LENR_Register use record
TIM2EN at 0 range 0 .. 0;
TIM3EN at 0 range 1 .. 1;
TIM4EN at 0 range 2 .. 2;
TIM5EN at 0 range 3 .. 3;
TIM6EN at 0 range 4 .. 4;
TIM7EN at 0 range 5 .. 5;
TIM12EN at 0 range 6 .. 6;
TIM13EN at 0 range 7 .. 7;
TIM14EN at 0 range 8 .. 8;
LPTIM1EN at 0 range 9 .. 9;
Reserved_10_13 at 0 range 10 .. 13;
SPI2EN at 0 range 14 .. 14;
SPI3EN at 0 range 15 .. 15;
SPDIFRXEN at 0 range 16 .. 16;
USART2EN at 0 range 17 .. 17;
USART3EN at 0 range 18 .. 18;
UART4EN at 0 range 19 .. 19;
UART5EN at 0 range 20 .. 20;
I2C1EN at 0 range 21 .. 21;
I2C2EN at 0 range 22 .. 22;
I2C3EN at 0 range 23 .. 23;
Reserved_24_26 at 0 range 24 .. 26;
CECEN at 0 range 27 .. 27;
Reserved_28_28 at 0 range 28 .. 28;
DAC12EN at 0 range 29 .. 29;
UART7EN at 0 range 30 .. 30;
UART8EN at 0 range 31 .. 31;
end record;
subtype APB1HENR_CRSEN_Field is Interfaces.STM32.Bit;
subtype APB1HENR_SWPEN_Field is Interfaces.STM32.Bit;
subtype APB1HENR_OPAMPEN_Field is Interfaces.STM32.Bit;
subtype APB1HENR_MDIOSEN_Field is Interfaces.STM32.Bit;
subtype APB1HENR_FDCANEN_Field is Interfaces.STM32.Bit;
-- RCC APB1 Clock Register
type APB1HENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- Clock Recovery System peripheral clock enable
CRSEN : APB1HENR_CRSEN_Field := 16#0#;
-- SWPMI Peripheral Clocks Enable
SWPEN : APB1HENR_SWPEN_Field := 16#0#;
-- unspecified
Reserved_3_3 : Interfaces.STM32.Bit := 16#0#;
-- OPAMP peripheral clock enable
OPAMPEN : APB1HENR_OPAMPEN_Field := 16#0#;
-- MDIOS peripheral clock enable
MDIOSEN : APB1HENR_MDIOSEN_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FDCAN Peripheral Clocks Enable
FDCANEN : APB1HENR_FDCANEN_Field := 16#0#;
-- unspecified
Reserved_9_31 : Interfaces.STM32.UInt23 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB1HENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
CRSEN at 0 range 1 .. 1;
SWPEN at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
OPAMPEN at 0 range 4 .. 4;
MDIOSEN at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FDCANEN at 0 range 8 .. 8;
Reserved_9_31 at 0 range 9 .. 31;
end record;
subtype APB2ENR_TIM1EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_TIM8EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_USART1EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_USART6EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_SPI1EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_SPI4EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_TIM15EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_TIM16EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_TIM17EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_SPI5EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_SAI1EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_SAI2EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_SAI3EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_DFSDM1EN_Field is Interfaces.STM32.Bit;
subtype APB2ENR_HRTIMEN_Field is Interfaces.STM32.Bit;
-- RCC APB2 Clock Register
type APB2ENR_Register is record
-- TIM1 peripheral clock enable
TIM1EN : APB2ENR_TIM1EN_Field := 16#0#;
-- TIM8 peripheral clock enable
TIM8EN : APB2ENR_TIM8EN_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- USART1 Peripheral Clocks Enable
USART1EN : APB2ENR_USART1EN_Field := 16#0#;
-- USART6 Peripheral Clocks Enable
USART6EN : APB2ENR_USART6EN_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- SPI1 Peripheral Clocks Enable
SPI1EN : APB2ENR_SPI1EN_Field := 16#0#;
-- SPI4 Peripheral Clocks Enable
SPI4EN : APB2ENR_SPI4EN_Field := 16#0#;
-- unspecified
Reserved_14_15 : Interfaces.STM32.UInt2 := 16#0#;
-- TIM15 peripheral clock enable
TIM15EN : APB2ENR_TIM15EN_Field := 16#0#;
-- TIM16 peripheral clock enable
TIM16EN : APB2ENR_TIM16EN_Field := 16#0#;
-- TIM17 peripheral clock enable
TIM17EN : APB2ENR_TIM17EN_Field := 16#0#;
-- unspecified
Reserved_19_19 : Interfaces.STM32.Bit := 16#0#;
-- SPI5 Peripheral Clocks Enable
SPI5EN : APB2ENR_SPI5EN_Field := 16#0#;
-- unspecified
Reserved_21_21 : Interfaces.STM32.Bit := 16#0#;
-- SAI1 Peripheral Clocks Enable
SAI1EN : APB2ENR_SAI1EN_Field := 16#0#;
-- SAI2 Peripheral Clocks Enable
SAI2EN : APB2ENR_SAI2EN_Field := 16#0#;
-- SAI3 Peripheral Clocks Enable
SAI3EN : APB2ENR_SAI3EN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- DFSDM1 Peripheral Clocks Enable
DFSDM1EN : APB2ENR_DFSDM1EN_Field := 16#0#;
-- HRTIM peripheral clock enable
HRTIMEN : APB2ENR_HRTIMEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB2ENR_Register use record
TIM1EN at 0 range 0 .. 0;
TIM8EN at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
USART1EN at 0 range 4 .. 4;
USART6EN at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
SPI1EN at 0 range 12 .. 12;
SPI4EN at 0 range 13 .. 13;
Reserved_14_15 at 0 range 14 .. 15;
TIM15EN at 0 range 16 .. 16;
TIM16EN at 0 range 17 .. 17;
TIM17EN at 0 range 18 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
SPI5EN at 0 range 20 .. 20;
Reserved_21_21 at 0 range 21 .. 21;
SAI1EN at 0 range 22 .. 22;
SAI2EN at 0 range 23 .. 23;
SAI3EN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
DFSDM1EN at 0 range 28 .. 28;
HRTIMEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype APB4ENR_SYSCFGEN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_LPUART1EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_SPI6EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_I2C4EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_LPTIM2EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_LPTIM3EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_LPTIM4EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_LPTIM5EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_COMP12EN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_VREFEN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_RTCAPBEN_Field is Interfaces.STM32.Bit;
subtype APB4ENR_SAI4EN_Field is Interfaces.STM32.Bit;
-- RCC APB4 Clock Register
type APB4ENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- SYSCFG peripheral clock enable
SYSCFGEN : APB4ENR_SYSCFGEN_Field := 16#0#;
-- unspecified
Reserved_2_2 : Interfaces.STM32.Bit := 16#0#;
-- LPUART1 Peripheral Clocks Enable
LPUART1EN : APB4ENR_LPUART1EN_Field := 16#0#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 Peripheral Clocks Enable
SPI6EN : APB4ENR_SPI6EN_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- I2C4 Peripheral Clocks Enable
I2C4EN : APB4ENR_I2C4EN_Field := 16#0#;
-- unspecified
Reserved_8_8 : Interfaces.STM32.Bit := 16#0#;
-- LPTIM2 Peripheral Clocks Enable
LPTIM2EN : APB4ENR_LPTIM2EN_Field := 16#0#;
-- LPTIM3 Peripheral Clocks Enable
LPTIM3EN : APB4ENR_LPTIM3EN_Field := 16#0#;
-- LPTIM4 Peripheral Clocks Enable
LPTIM4EN : APB4ENR_LPTIM4EN_Field := 16#0#;
-- LPTIM5 Peripheral Clocks Enable
LPTIM5EN : APB4ENR_LPTIM5EN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- COMP1/2 peripheral clock enable
COMP12EN : APB4ENR_COMP12EN_Field := 16#0#;
-- VREF peripheral clock enable
VREFEN : APB4ENR_VREFEN_Field := 16#0#;
-- RTC APB Clock Enable
RTCAPBEN : APB4ENR_RTCAPBEN_Field := 16#0#;
-- unspecified
Reserved_17_20 : Interfaces.STM32.UInt4 := 16#0#;
-- SAI4 Peripheral Clocks Enable
SAI4EN : APB4ENR_SAI4EN_Field := 16#0#;
-- unspecified
Reserved_22_31 : Interfaces.STM32.UInt10 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB4ENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
SYSCFGEN at 0 range 1 .. 1;
Reserved_2_2 at 0 range 2 .. 2;
LPUART1EN at 0 range 3 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
SPI6EN at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
I2C4EN at 0 range 7 .. 7;
Reserved_8_8 at 0 range 8 .. 8;
LPTIM2EN at 0 range 9 .. 9;
LPTIM3EN at 0 range 10 .. 10;
LPTIM4EN at 0 range 11 .. 11;
LPTIM5EN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
COMP12EN at 0 range 14 .. 14;
VREFEN at 0 range 15 .. 15;
RTCAPBEN at 0 range 16 .. 16;
Reserved_17_20 at 0 range 17 .. 20;
SAI4EN at 0 range 21 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
subtype AHB3LPENR_MDMALPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_DMA2DLPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_JPGDECLPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_FLASHLPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_FMCLPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_QSPILPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_SDMMC1LPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_D1DTCM1LPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_DTCM2LPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_ITCMLPEN_Field is Interfaces.STM32.Bit;
subtype AHB3LPENR_AXISRAMLPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB3 Sleep Clock Register
type AHB3LPENR_Register is record
-- MDMA Clock Enable During CSleep Mode
MDMALPEN : AHB3LPENR_MDMALPEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- DMA2D Clock Enable During CSleep Mode
DMA2DLPEN : AHB3LPENR_DMA2DLPEN_Field := 16#0#;
-- JPGDEC Clock Enable During CSleep Mode
JPGDECLPEN : AHB3LPENR_JPGDECLPEN_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FLITF Clock Enable During CSleep Mode
FLASHLPEN : AHB3LPENR_FLASHLPEN_Field := 16#0#;
-- unspecified
Reserved_9_11 : Interfaces.STM32.UInt3 := 16#0#;
-- FMC Peripheral Clocks Enable During CSleep Mode
FMCLPEN : AHB3LPENR_FMCLPEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode
QSPILPEN : AHB3LPENR_QSPILPEN_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.STM32.Bit := 16#0#;
-- SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode
SDMMC1LPEN : AHB3LPENR_SDMMC1LPEN_Field := 16#0#;
-- unspecified
Reserved_17_27 : Interfaces.STM32.UInt11 := 16#0#;
-- D1DTCM1 Block Clock Enable During CSleep mode
D1DTCM1LPEN : AHB3LPENR_D1DTCM1LPEN_Field := 16#0#;
-- D1 DTCM2 Block Clock Enable During CSleep mode
DTCM2LPEN : AHB3LPENR_DTCM2LPEN_Field := 16#0#;
-- D1ITCM Block Clock Enable During CSleep mode
ITCMLPEN : AHB3LPENR_ITCMLPEN_Field := 16#0#;
-- AXISRAM Block Clock Enable During CSleep mode
AXISRAMLPEN : AHB3LPENR_AXISRAMLPEN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB3LPENR_Register use record
MDMALPEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
DMA2DLPEN at 0 range 4 .. 4;
JPGDECLPEN at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FLASHLPEN at 0 range 8 .. 8;
Reserved_9_11 at 0 range 9 .. 11;
FMCLPEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
QSPILPEN at 0 range 14 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
SDMMC1LPEN at 0 range 16 .. 16;
Reserved_17_27 at 0 range 17 .. 27;
D1DTCM1LPEN at 0 range 28 .. 28;
DTCM2LPEN at 0 range 29 .. 29;
ITCMLPEN at 0 range 30 .. 30;
AXISRAMLPEN at 0 range 31 .. 31;
end record;
subtype AHB1LPENR_DMA1LPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_DMA2LPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_ADC12LPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_ETH1MACLPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_ETH1TXLPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_ETH1RXLPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_USB1OTGHSLPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_USB1OTGHSULPILPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_USB2OTGHSLPEN_Field is Interfaces.STM32.Bit;
subtype AHB1LPENR_USB2OTGHSULPILPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB1 Sleep Clock Register
type AHB1LPENR_Register is record
-- DMA1 Clock Enable During CSleep Mode
DMA1LPEN : AHB1LPENR_DMA1LPEN_Field := 16#0#;
-- DMA2 Clock Enable During CSleep Mode
DMA2LPEN : AHB1LPENR_DMA2LPEN_Field := 16#0#;
-- unspecified
Reserved_2_4 : Interfaces.STM32.UInt3 := 16#0#;
-- ADC1/2 Peripheral Clocks Enable During CSleep Mode
ADC12LPEN : AHB1LPENR_ADC12LPEN_Field := 16#0#;
-- unspecified
Reserved_6_14 : Interfaces.STM32.UInt9 := 16#0#;
-- Ethernet MAC bus interface Clock Enable During CSleep Mode
ETH1MACLPEN : AHB1LPENR_ETH1MACLPEN_Field := 16#0#;
-- Ethernet Transmission Clock Enable During CSleep Mode
ETH1TXLPEN : AHB1LPENR_ETH1TXLPEN_Field := 16#0#;
-- Ethernet Reception Clock Enable During CSleep Mode
ETH1RXLPEN : AHB1LPENR_ETH1RXLPEN_Field := 16#0#;
-- unspecified
Reserved_18_24 : Interfaces.STM32.UInt7 := 16#0#;
-- USB1OTG peripheral clock enable during CSleep mode
USB1OTGHSLPEN : AHB1LPENR_USB1OTGHSLPEN_Field := 16#0#;
-- USB_PHY1 clock enable during CSleep mode
USB1OTGHSULPILPEN : AHB1LPENR_USB1OTGHSULPILPEN_Field := 16#0#;
-- USB2OTG peripheral clock enable during CSleep mode
USB2OTGHSLPEN : AHB1LPENR_USB2OTGHSLPEN_Field := 16#0#;
-- USB_PHY2 clocks enable during CSleep mode
USB2OTGHSULPILPEN : AHB1LPENR_USB2OTGHSULPILPEN_Field := 16#0#;
-- unspecified
Reserved_29_31 : Interfaces.STM32.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB1LPENR_Register use record
DMA1LPEN at 0 range 0 .. 0;
DMA2LPEN at 0 range 1 .. 1;
Reserved_2_4 at 0 range 2 .. 4;
ADC12LPEN at 0 range 5 .. 5;
Reserved_6_14 at 0 range 6 .. 14;
ETH1MACLPEN at 0 range 15 .. 15;
ETH1TXLPEN at 0 range 16 .. 16;
ETH1RXLPEN at 0 range 17 .. 17;
Reserved_18_24 at 0 range 18 .. 24;
USB1OTGHSLPEN at 0 range 25 .. 25;
USB1OTGHSULPILPEN at 0 range 26 .. 26;
USB2OTGHSLPEN at 0 range 27 .. 27;
USB2OTGHSULPILPEN at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype AHB2LPENR_CAMITFLPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_CRYPTLPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_HASHLPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_RNGLPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_SDMMC2LPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_SRAM1LPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_SRAM2LPEN_Field is Interfaces.STM32.Bit;
subtype AHB2LPENR_SRAM3LPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB2 Sleep Clock Register
type AHB2LPENR_Register is record
-- CAMITF peripheral clock enable during CSleep mode
CAMITFLPEN : AHB2LPENR_CAMITFLPEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- CRYPT peripheral clock enable during CSleep mode
CRYPTLPEN : AHB2LPENR_CRYPTLPEN_Field := 16#0#;
-- HASH peripheral clock enable during CSleep mode
HASHLPEN : AHB2LPENR_HASHLPEN_Field := 16#0#;
-- RNG peripheral clock enable during CSleep mode
RNGLPEN : AHB2LPENR_RNGLPEN_Field := 16#0#;
-- unspecified
Reserved_7_8 : Interfaces.STM32.UInt2 := 16#0#;
-- SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode
SDMMC2LPEN : AHB2LPENR_SDMMC2LPEN_Field := 16#0#;
-- unspecified
Reserved_10_28 : Interfaces.STM32.UInt19 := 16#0#;
-- SRAM1 Clock Enable During CSleep Mode
SRAM1LPEN : AHB2LPENR_SRAM1LPEN_Field := 16#0#;
-- SRAM2 Clock Enable During CSleep Mode
SRAM2LPEN : AHB2LPENR_SRAM2LPEN_Field := 16#0#;
-- SRAM3 Clock Enable During CSleep Mode
SRAM3LPEN : AHB2LPENR_SRAM3LPEN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB2LPENR_Register use record
CAMITFLPEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
CRYPTLPEN at 0 range 4 .. 4;
HASHLPEN at 0 range 5 .. 5;
RNGLPEN at 0 range 6 .. 6;
Reserved_7_8 at 0 range 7 .. 8;
SDMMC2LPEN at 0 range 9 .. 9;
Reserved_10_28 at 0 range 10 .. 28;
SRAM1LPEN at 0 range 29 .. 29;
SRAM2LPEN at 0 range 30 .. 30;
SRAM3LPEN at 0 range 31 .. 31;
end record;
subtype AHB4LPENR_GPIOALPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOBLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOCLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIODLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOELPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOFLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOGLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOHLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOILPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOJLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_GPIOKLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_CRCLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_BDMALPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_ADC3LPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_BKPRAMLPEN_Field is Interfaces.STM32.Bit;
subtype AHB4LPENR_SRAM4LPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB4 Sleep Clock Register
type AHB4LPENR_Register is record
-- GPIO peripheral clock enable during CSleep mode
GPIOALPEN : AHB4LPENR_GPIOALPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOBLPEN : AHB4LPENR_GPIOBLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOCLPEN : AHB4LPENR_GPIOCLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIODLPEN : AHB4LPENR_GPIODLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOELPEN : AHB4LPENR_GPIOELPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOFLPEN : AHB4LPENR_GPIOFLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOGLPEN : AHB4LPENR_GPIOGLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOHLPEN : AHB4LPENR_GPIOHLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOILPEN : AHB4LPENR_GPIOILPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOJLPEN : AHB4LPENR_GPIOJLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOKLPEN : AHB4LPENR_GPIOKLPEN_Field := 16#0#;
-- unspecified
Reserved_11_18 : Interfaces.STM32.Byte := 16#0#;
-- CRC peripheral clock enable during CSleep mode
CRCLPEN : AHB4LPENR_CRCLPEN_Field := 16#0#;
-- unspecified
Reserved_20_20 : Interfaces.STM32.Bit := 16#0#;
-- BDMA Clock Enable During CSleep Mode
BDMALPEN : AHB4LPENR_BDMALPEN_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- ADC3 Peripheral Clocks Enable During CSleep Mode
ADC3LPEN : AHB4LPENR_ADC3LPEN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- Backup RAM Clock Enable During CSleep Mode
BKPRAMLPEN : AHB4LPENR_BKPRAMLPEN_Field := 16#0#;
-- SRAM4 Clock Enable During CSleep Mode
SRAM4LPEN : AHB4LPENR_SRAM4LPEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for AHB4LPENR_Register use record
GPIOALPEN at 0 range 0 .. 0;
GPIOBLPEN at 0 range 1 .. 1;
GPIOCLPEN at 0 range 2 .. 2;
GPIODLPEN at 0 range 3 .. 3;
GPIOELPEN at 0 range 4 .. 4;
GPIOFLPEN at 0 range 5 .. 5;
GPIOGLPEN at 0 range 6 .. 6;
GPIOHLPEN at 0 range 7 .. 7;
GPIOILPEN at 0 range 8 .. 8;
GPIOJLPEN at 0 range 9 .. 9;
GPIOKLPEN at 0 range 10 .. 10;
Reserved_11_18 at 0 range 11 .. 18;
CRCLPEN at 0 range 19 .. 19;
Reserved_20_20 at 0 range 20 .. 20;
BDMALPEN at 0 range 21 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
ADC3LPEN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
BKPRAMLPEN at 0 range 28 .. 28;
SRAM4LPEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype APB3LPENR_LTDCLPEN_Field is Interfaces.STM32.Bit;
subtype APB3LPENR_WWDG1LPEN_Field is Interfaces.STM32.Bit;
-- RCC APB3 Sleep Clock Register
type APB3LPENR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- LTDC peripheral clock enable during CSleep mode
LTDCLPEN : APB3LPENR_LTDCLPEN_Field := 16#0#;
-- unspecified
Reserved_4_5 : Interfaces.STM32.UInt2 := 16#0#;
-- WWDG1 Clock Enable During CSleep Mode
WWDG1LPEN : APB3LPENR_WWDG1LPEN_Field := 16#0#;
-- unspecified
Reserved_7_31 : Interfaces.STM32.UInt25 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB3LPENR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
LTDCLPEN at 0 range 3 .. 3;
Reserved_4_5 at 0 range 4 .. 5;
WWDG1LPEN at 0 range 6 .. 6;
Reserved_7_31 at 0 range 7 .. 31;
end record;
subtype APB1LLPENR_TIM2LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM3LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM4LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM5LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM6LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM7LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM12LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM13LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_TIM14LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_LPTIM1LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_SPI2LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_SPI3LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_SPDIFRXLPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_USART2LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_USART3LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_UART4LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_UART5LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_I2C1LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_I2C2LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_I2C3LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_HDMICECLPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_DAC12LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_UART7LPEN_Field is Interfaces.STM32.Bit;
subtype APB1LLPENR_UART8LPEN_Field is Interfaces.STM32.Bit;
-- RCC APB1 Low Sleep Clock Register
type APB1LLPENR_Register is record
-- TIM2 peripheral clock enable during CSleep mode
TIM2LPEN : APB1LLPENR_TIM2LPEN_Field := 16#0#;
-- TIM3 peripheral clock enable during CSleep mode
TIM3LPEN : APB1LLPENR_TIM3LPEN_Field := 16#0#;
-- TIM4 peripheral clock enable during CSleep mode
TIM4LPEN : APB1LLPENR_TIM4LPEN_Field := 16#0#;
-- TIM5 peripheral clock enable during CSleep mode
TIM5LPEN : APB1LLPENR_TIM5LPEN_Field := 16#0#;
-- TIM6 peripheral clock enable during CSleep mode
TIM6LPEN : APB1LLPENR_TIM6LPEN_Field := 16#0#;
-- TIM7 peripheral clock enable during CSleep mode
TIM7LPEN : APB1LLPENR_TIM7LPEN_Field := 16#0#;
-- TIM12 peripheral clock enable during CSleep mode
TIM12LPEN : APB1LLPENR_TIM12LPEN_Field := 16#0#;
-- TIM13 peripheral clock enable during CSleep mode
TIM13LPEN : APB1LLPENR_TIM13LPEN_Field := 16#0#;
-- TIM14 peripheral clock enable during CSleep mode
TIM14LPEN : APB1LLPENR_TIM14LPEN_Field := 16#0#;
-- LPTIM1 Peripheral Clocks Enable During CSleep Mode
LPTIM1LPEN : APB1LLPENR_LPTIM1LPEN_Field := 16#0#;
-- unspecified
Reserved_10_13 : Interfaces.STM32.UInt4 := 16#0#;
-- SPI2 Peripheral Clocks Enable During CSleep Mode
SPI2LPEN : APB1LLPENR_SPI2LPEN_Field := 16#0#;
-- SPI3 Peripheral Clocks Enable During CSleep Mode
SPI3LPEN : APB1LLPENR_SPI3LPEN_Field := 16#0#;
-- SPDIFRX Peripheral Clocks Enable During CSleep Mode
SPDIFRXLPEN : APB1LLPENR_SPDIFRXLPEN_Field := 16#0#;
-- USART2 Peripheral Clocks Enable During CSleep Mode
USART2LPEN : APB1LLPENR_USART2LPEN_Field := 16#0#;
-- USART3 Peripheral Clocks Enable During CSleep Mode
USART3LPEN : APB1LLPENR_USART3LPEN_Field := 16#0#;
-- UART4 Peripheral Clocks Enable During CSleep Mode
UART4LPEN : APB1LLPENR_UART4LPEN_Field := 16#0#;
-- UART5 Peripheral Clocks Enable During CSleep Mode
UART5LPEN : APB1LLPENR_UART5LPEN_Field := 16#0#;
-- I2C1 Peripheral Clocks Enable During CSleep Mode
I2C1LPEN : APB1LLPENR_I2C1LPEN_Field := 16#0#;
-- I2C2 Peripheral Clocks Enable During CSleep Mode
I2C2LPEN : APB1LLPENR_I2C2LPEN_Field := 16#0#;
-- I2C3 Peripheral Clocks Enable During CSleep Mode
I2C3LPEN : APB1LLPENR_I2C3LPEN_Field := 16#0#;
-- unspecified
Reserved_24_26 : Interfaces.STM32.UInt3 := 16#0#;
-- HDMI-CEC Peripheral Clocks Enable During CSleep Mode
HDMICECLPEN : APB1LLPENR_HDMICECLPEN_Field := 16#0#;
-- unspecified
Reserved_28_28 : Interfaces.STM32.Bit := 16#0#;
-- DAC1/2 peripheral clock enable during CSleep mode
DAC12LPEN : APB1LLPENR_DAC12LPEN_Field := 16#0#;
-- UART7 Peripheral Clocks Enable During CSleep Mode
UART7LPEN : APB1LLPENR_UART7LPEN_Field := 16#0#;
-- UART8 Peripheral Clocks Enable During CSleep Mode
UART8LPEN : APB1LLPENR_UART8LPEN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB1LLPENR_Register use record
TIM2LPEN at 0 range 0 .. 0;
TIM3LPEN at 0 range 1 .. 1;
TIM4LPEN at 0 range 2 .. 2;
TIM5LPEN at 0 range 3 .. 3;
TIM6LPEN at 0 range 4 .. 4;
TIM7LPEN at 0 range 5 .. 5;
TIM12LPEN at 0 range 6 .. 6;
TIM13LPEN at 0 range 7 .. 7;
TIM14LPEN at 0 range 8 .. 8;
LPTIM1LPEN at 0 range 9 .. 9;
Reserved_10_13 at 0 range 10 .. 13;
SPI2LPEN at 0 range 14 .. 14;
SPI3LPEN at 0 range 15 .. 15;
SPDIFRXLPEN at 0 range 16 .. 16;
USART2LPEN at 0 range 17 .. 17;
USART3LPEN at 0 range 18 .. 18;
UART4LPEN at 0 range 19 .. 19;
UART5LPEN at 0 range 20 .. 20;
I2C1LPEN at 0 range 21 .. 21;
I2C2LPEN at 0 range 22 .. 22;
I2C3LPEN at 0 range 23 .. 23;
Reserved_24_26 at 0 range 24 .. 26;
HDMICECLPEN at 0 range 27 .. 27;
Reserved_28_28 at 0 range 28 .. 28;
DAC12LPEN at 0 range 29 .. 29;
UART7LPEN at 0 range 30 .. 30;
UART8LPEN at 0 range 31 .. 31;
end record;
subtype APB1HLPENR_CRSLPEN_Field is Interfaces.STM32.Bit;
subtype APB1HLPENR_SWPLPEN_Field is Interfaces.STM32.Bit;
subtype APB1HLPENR_OPAMPLPEN_Field is Interfaces.STM32.Bit;
subtype APB1HLPENR_MDIOSLPEN_Field is Interfaces.STM32.Bit;
subtype APB1HLPENR_FDCANLPEN_Field is Interfaces.STM32.Bit;
-- RCC APB1 High Sleep Clock Register
type APB1HLPENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- Clock Recovery System peripheral clock enable during CSleep mode
CRSLPEN : APB1HLPENR_CRSLPEN_Field := 16#0#;
-- SWPMI Peripheral Clocks Enable During CSleep Mode
SWPLPEN : APB1HLPENR_SWPLPEN_Field := 16#0#;
-- unspecified
Reserved_3_3 : Interfaces.STM32.Bit := 16#0#;
-- OPAMP peripheral clock enable during CSleep mode
OPAMPLPEN : APB1HLPENR_OPAMPLPEN_Field := 16#0#;
-- MDIOS peripheral clock enable during CSleep mode
MDIOSLPEN : APB1HLPENR_MDIOSLPEN_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FDCAN Peripheral Clocks Enable During CSleep Mode
FDCANLPEN : APB1HLPENR_FDCANLPEN_Field := 16#0#;
-- unspecified
Reserved_9_31 : Interfaces.STM32.UInt23 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB1HLPENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
CRSLPEN at 0 range 1 .. 1;
SWPLPEN at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
OPAMPLPEN at 0 range 4 .. 4;
MDIOSLPEN at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FDCANLPEN at 0 range 8 .. 8;
Reserved_9_31 at 0 range 9 .. 31;
end record;
subtype APB2LPENR_TIM1LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_TIM8LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_USART1LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_USART6LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_SPI1LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_SPI4LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_TIM15LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_TIM16LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_TIM17LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_SPI5LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_SAI1LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_SAI2LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_SAI3LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_DFSDM1LPEN_Field is Interfaces.STM32.Bit;
subtype APB2LPENR_HRTIMLPEN_Field is Interfaces.STM32.Bit;
-- RCC APB2 Sleep Clock Register
type APB2LPENR_Register is record
-- TIM1 peripheral clock enable during CSleep mode
TIM1LPEN : APB2LPENR_TIM1LPEN_Field := 16#0#;
-- TIM8 peripheral clock enable during CSleep mode
TIM8LPEN : APB2LPENR_TIM8LPEN_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- USART1 Peripheral Clocks Enable During CSleep Mode
USART1LPEN : APB2LPENR_USART1LPEN_Field := 16#0#;
-- USART6 Peripheral Clocks Enable During CSleep Mode
USART6LPEN : APB2LPENR_USART6LPEN_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- SPI1 Peripheral Clocks Enable During CSleep Mode
SPI1LPEN : APB2LPENR_SPI1LPEN_Field := 16#0#;
-- SPI4 Peripheral Clocks Enable During CSleep Mode
SPI4LPEN : APB2LPENR_SPI4LPEN_Field := 16#0#;
-- unspecified
Reserved_14_15 : Interfaces.STM32.UInt2 := 16#0#;
-- TIM15 peripheral clock enable during CSleep mode
TIM15LPEN : APB2LPENR_TIM15LPEN_Field := 16#0#;
-- TIM16 peripheral clock enable during CSleep mode
TIM16LPEN : APB2LPENR_TIM16LPEN_Field := 16#0#;
-- TIM17 peripheral clock enable during CSleep mode
TIM17LPEN : APB2LPENR_TIM17LPEN_Field := 16#0#;
-- unspecified
Reserved_19_19 : Interfaces.STM32.Bit := 16#0#;
-- SPI5 Peripheral Clocks Enable During CSleep Mode
SPI5LPEN : APB2LPENR_SPI5LPEN_Field := 16#0#;
-- unspecified
Reserved_21_21 : Interfaces.STM32.Bit := 16#0#;
-- SAI1 Peripheral Clocks Enable During CSleep Mode
SAI1LPEN : APB2LPENR_SAI1LPEN_Field := 16#0#;
-- SAI2 Peripheral Clocks Enable During CSleep Mode
SAI2LPEN : APB2LPENR_SAI2LPEN_Field := 16#0#;
-- SAI3 Peripheral Clocks Enable During CSleep Mode
SAI3LPEN : APB2LPENR_SAI3LPEN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- DFSDM1 Peripheral Clocks Enable During CSleep Mode
DFSDM1LPEN : APB2LPENR_DFSDM1LPEN_Field := 16#0#;
-- HRTIM peripheral clock enable during CSleep mode
HRTIMLPEN : APB2LPENR_HRTIMLPEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB2LPENR_Register use record
TIM1LPEN at 0 range 0 .. 0;
TIM8LPEN at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
USART1LPEN at 0 range 4 .. 4;
USART6LPEN at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
SPI1LPEN at 0 range 12 .. 12;
SPI4LPEN at 0 range 13 .. 13;
Reserved_14_15 at 0 range 14 .. 15;
TIM15LPEN at 0 range 16 .. 16;
TIM16LPEN at 0 range 17 .. 17;
TIM17LPEN at 0 range 18 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
SPI5LPEN at 0 range 20 .. 20;
Reserved_21_21 at 0 range 21 .. 21;
SAI1LPEN at 0 range 22 .. 22;
SAI2LPEN at 0 range 23 .. 23;
SAI3LPEN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
DFSDM1LPEN at 0 range 28 .. 28;
HRTIMLPEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype APB4LPENR_SYSCFGLPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_LPUART1LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_SPI6LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_I2C4LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_LPTIM2LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_LPTIM3LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_LPTIM4LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_LPTIM5LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_COMP12LPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_VREFLPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_RTCAPBLPEN_Field is Interfaces.STM32.Bit;
subtype APB4LPENR_SAI4LPEN_Field is Interfaces.STM32.Bit;
-- RCC APB4 Sleep Clock Register
type APB4LPENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- SYSCFG peripheral clock enable during CSleep mode
SYSCFGLPEN : APB4LPENR_SYSCFGLPEN_Field := 16#0#;
-- unspecified
Reserved_2_2 : Interfaces.STM32.Bit := 16#0#;
-- LPUART1 Peripheral Clocks Enable During CSleep Mode
LPUART1LPEN : APB4LPENR_LPUART1LPEN_Field := 16#0#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 Peripheral Clocks Enable During CSleep Mode
SPI6LPEN : APB4LPENR_SPI6LPEN_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- I2C4 Peripheral Clocks Enable During CSleep Mode
I2C4LPEN : APB4LPENR_I2C4LPEN_Field := 16#0#;
-- unspecified
Reserved_8_8 : Interfaces.STM32.Bit := 16#0#;
-- LPTIM2 Peripheral Clocks Enable During CSleep Mode
LPTIM2LPEN : APB4LPENR_LPTIM2LPEN_Field := 16#0#;
-- LPTIM3 Peripheral Clocks Enable During CSleep Mode
LPTIM3LPEN : APB4LPENR_LPTIM3LPEN_Field := 16#0#;
-- LPTIM4 Peripheral Clocks Enable During CSleep Mode
LPTIM4LPEN : APB4LPENR_LPTIM4LPEN_Field := 16#0#;
-- LPTIM5 Peripheral Clocks Enable During CSleep Mode
LPTIM5LPEN : APB4LPENR_LPTIM5LPEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- COMP1/2 peripheral clock enable during CSleep mode
COMP12LPEN : APB4LPENR_COMP12LPEN_Field := 16#0#;
-- VREF peripheral clock enable during CSleep mode
VREFLPEN : APB4LPENR_VREFLPEN_Field := 16#0#;
-- RTC APB Clock Enable During CSleep Mode
RTCAPBLPEN : APB4LPENR_RTCAPBLPEN_Field := 16#0#;
-- unspecified
Reserved_17_20 : Interfaces.STM32.UInt4 := 16#0#;
-- SAI4 Peripheral Clocks Enable During CSleep Mode
SAI4LPEN : APB4LPENR_SAI4LPEN_Field := 16#0#;
-- unspecified
Reserved_22_31 : Interfaces.STM32.UInt10 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for APB4LPENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
SYSCFGLPEN at 0 range 1 .. 1;
Reserved_2_2 at 0 range 2 .. 2;
LPUART1LPEN at 0 range 3 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
SPI6LPEN at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
I2C4LPEN at 0 range 7 .. 7;
Reserved_8_8 at 0 range 8 .. 8;
LPTIM2LPEN at 0 range 9 .. 9;
LPTIM3LPEN at 0 range 10 .. 10;
LPTIM4LPEN at 0 range 11 .. 11;
LPTIM5LPEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
COMP12LPEN at 0 range 14 .. 14;
VREFLPEN at 0 range 15 .. 15;
RTCAPBLPEN at 0 range 16 .. 16;
Reserved_17_20 at 0 range 17 .. 20;
SAI4LPEN at 0 range 21 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
subtype C1_RSR_RMVF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_CPURSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_D1RSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_D2RSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_BORRSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_PINRSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_PORRSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_SFTRSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_IWDG1RSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_WWDG1RSTF_Field is Interfaces.STM32.Bit;
subtype C1_RSR_LPWRRSTF_Field is Interfaces.STM32.Bit;
-- RCC Reset Status Register
type C1_RSR_Register is record
-- unspecified
Reserved_0_15 : Interfaces.STM32.UInt16 := 16#0#;
-- Remove reset flag
RMVF : C1_RSR_RMVF_Field := 16#0#;
-- CPU reset flag
CPURSTF : C1_RSR_CPURSTF_Field := 16#0#;
-- unspecified
Reserved_18_18 : Interfaces.STM32.Bit := 16#0#;
-- D1 domain power switch reset flag
D1RSTF : C1_RSR_D1RSTF_Field := 16#0#;
-- D2 domain power switch reset flag
D2RSTF : C1_RSR_D2RSTF_Field := 16#0#;
-- BOR reset flag
BORRSTF : C1_RSR_BORRSTF_Field := 16#0#;
-- Pin reset flag (NRST)
PINRSTF : C1_RSR_PINRSTF_Field := 16#0#;
-- POR/PDR reset flag
PORRSTF : C1_RSR_PORRSTF_Field := 16#0#;
-- System reset from CPU reset flag
SFTRSTF : C1_RSR_SFTRSTF_Field := 16#0#;
-- unspecified
Reserved_25_25 : Interfaces.STM32.Bit := 16#0#;
-- Independent Watchdog reset flag
IWDG1RSTF : C1_RSR_IWDG1RSTF_Field := 16#0#;
-- unspecified
Reserved_27_27 : Interfaces.STM32.Bit := 16#0#;
-- Window Watchdog reset flag
WWDG1RSTF : C1_RSR_WWDG1RSTF_Field := 16#0#;
-- unspecified
Reserved_29_29 : Interfaces.STM32.Bit := 16#0#;
-- Reset due to illegal D1 DStandby or CPU CStop flag
LPWRRSTF : C1_RSR_LPWRRSTF_Field := 16#0#;
-- unspecified
Reserved_31_31 : Interfaces.STM32.Bit := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_RSR_Register use record
Reserved_0_15 at 0 range 0 .. 15;
RMVF at 0 range 16 .. 16;
CPURSTF at 0 range 17 .. 17;
Reserved_18_18 at 0 range 18 .. 18;
D1RSTF at 0 range 19 .. 19;
D2RSTF at 0 range 20 .. 20;
BORRSTF at 0 range 21 .. 21;
PINRSTF at 0 range 22 .. 22;
PORRSTF at 0 range 23 .. 23;
SFTRSTF at 0 range 24 .. 24;
Reserved_25_25 at 0 range 25 .. 25;
IWDG1RSTF at 0 range 26 .. 26;
Reserved_27_27 at 0 range 27 .. 27;
WWDG1RSTF at 0 range 28 .. 28;
Reserved_29_29 at 0 range 29 .. 29;
LPWRRSTF at 0 range 30 .. 30;
Reserved_31_31 at 0 range 31 .. 31;
end record;
subtype C1_AHB3ENR_MDMAEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3ENR_DMA2DEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3ENR_JPGDECEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3ENR_FMCEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3ENR_QSPIEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3ENR_SDMMC1EN_Field is Interfaces.STM32.Bit;
-- RCC AHB3 Clock Register
type C1_AHB3ENR_Register is record
-- MDMA Peripheral Clock Enable
MDMAEN : C1_AHB3ENR_MDMAEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- DMA2D Peripheral Clock Enable
DMA2DEN : C1_AHB3ENR_DMA2DEN_Field := 16#0#;
-- JPGDEC Peripheral Clock Enable
JPGDECEN : C1_AHB3ENR_JPGDECEN_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- FMC Peripheral Clocks Enable
FMCEN : C1_AHB3ENR_FMCEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- QUADSPI and QUADSPI Delay Clock Enable
QSPIEN : C1_AHB3ENR_QSPIEN_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.STM32.Bit := 16#0#;
-- SDMMC1 and SDMMC1 Delay Clock Enable
SDMMC1EN : C1_AHB3ENR_SDMMC1EN_Field := 16#0#;
-- unspecified
Reserved_17_31 : Interfaces.STM32.UInt15 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB3ENR_Register use record
MDMAEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
DMA2DEN at 0 range 4 .. 4;
JPGDECEN at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
FMCEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
QSPIEN at 0 range 14 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
SDMMC1EN at 0 range 16 .. 16;
Reserved_17_31 at 0 range 17 .. 31;
end record;
subtype C1_AHB1ENR_DMA1EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_DMA2EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_ADC12EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_ETH1MACEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_ETH1TXEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_ETH1RXEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_USB1OTGEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_USB1ULPIEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_USB2OTGEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1ENR_USB2ULPIEN_Field is Interfaces.STM32.Bit;
-- RCC AHB1 Clock Register
type C1_AHB1ENR_Register is record
-- DMA1 Clock Enable
DMA1EN : C1_AHB1ENR_DMA1EN_Field := 16#0#;
-- DMA2 Clock Enable
DMA2EN : C1_AHB1ENR_DMA2EN_Field := 16#0#;
-- unspecified
Reserved_2_4 : Interfaces.STM32.UInt3 := 16#0#;
-- ADC1/2 Peripheral Clocks Enable
ADC12EN : C1_AHB1ENR_ADC12EN_Field := 16#0#;
-- unspecified
Reserved_6_14 : Interfaces.STM32.UInt9 := 16#0#;
-- Ethernet MAC bus interface Clock Enable
ETH1MACEN : C1_AHB1ENR_ETH1MACEN_Field := 16#0#;
-- Ethernet Transmission Clock Enable
ETH1TXEN : C1_AHB1ENR_ETH1TXEN_Field := 16#0#;
-- Ethernet Reception Clock Enable
ETH1RXEN : C1_AHB1ENR_ETH1RXEN_Field := 16#0#;
-- unspecified
Reserved_18_24 : Interfaces.STM32.UInt7 := 16#0#;
-- USB1OTG Peripheral Clocks Enable
USB1OTGEN : C1_AHB1ENR_USB1OTGEN_Field := 16#0#;
-- USB_PHY1 Clocks Enable
USB1ULPIEN : C1_AHB1ENR_USB1ULPIEN_Field := 16#0#;
-- USB2OTG Peripheral Clocks Enable
USB2OTGEN : C1_AHB1ENR_USB2OTGEN_Field := 16#0#;
-- USB_PHY2 Clocks Enable
USB2ULPIEN : C1_AHB1ENR_USB2ULPIEN_Field := 16#0#;
-- unspecified
Reserved_29_31 : Interfaces.STM32.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB1ENR_Register use record
DMA1EN at 0 range 0 .. 0;
DMA2EN at 0 range 1 .. 1;
Reserved_2_4 at 0 range 2 .. 4;
ADC12EN at 0 range 5 .. 5;
Reserved_6_14 at 0 range 6 .. 14;
ETH1MACEN at 0 range 15 .. 15;
ETH1TXEN at 0 range 16 .. 16;
ETH1RXEN at 0 range 17 .. 17;
Reserved_18_24 at 0 range 18 .. 24;
USB1OTGEN at 0 range 25 .. 25;
USB1ULPIEN at 0 range 26 .. 26;
USB2OTGEN at 0 range 27 .. 27;
USB2ULPIEN at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C1_AHB2ENR_CAMITFEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_CRYPTEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_HASHEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_RNGEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_SDMMC2EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_SRAM1EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_SRAM2EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2ENR_SRAM3EN_Field is Interfaces.STM32.Bit;
-- RCC AHB2 Clock Register
type C1_AHB2ENR_Register is record
-- CAMITF peripheral clock enable
CAMITFEN : C1_AHB2ENR_CAMITFEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- CRYPT peripheral clock enable
CRYPTEN : C1_AHB2ENR_CRYPTEN_Field := 16#0#;
-- HASH peripheral clock enable
HASHEN : C1_AHB2ENR_HASHEN_Field := 16#0#;
-- RNG peripheral clocks enable
RNGEN : C1_AHB2ENR_RNGEN_Field := 16#0#;
-- unspecified
Reserved_7_8 : Interfaces.STM32.UInt2 := 16#0#;
-- SDMMC2 and SDMMC2 delay clock enable
SDMMC2EN : C1_AHB2ENR_SDMMC2EN_Field := 16#0#;
-- unspecified
Reserved_10_28 : Interfaces.STM32.UInt19 := 16#0#;
-- SRAM1 block enable
SRAM1EN : C1_AHB2ENR_SRAM1EN_Field := 16#0#;
-- SRAM2 block enable
SRAM2EN : C1_AHB2ENR_SRAM2EN_Field := 16#0#;
-- SRAM3 block enable
SRAM3EN : C1_AHB2ENR_SRAM3EN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB2ENR_Register use record
CAMITFEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
CRYPTEN at 0 range 4 .. 4;
HASHEN at 0 range 5 .. 5;
RNGEN at 0 range 6 .. 6;
Reserved_7_8 at 0 range 7 .. 8;
SDMMC2EN at 0 range 9 .. 9;
Reserved_10_28 at 0 range 10 .. 28;
SRAM1EN at 0 range 29 .. 29;
SRAM2EN at 0 range 30 .. 30;
SRAM3EN at 0 range 31 .. 31;
end record;
subtype C1_AHB4ENR_GPIOAEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOBEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOCEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIODEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOEEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOFEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOGEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOHEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOIEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOJEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_GPIOKEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_CRCEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_BDMAEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_ADC3EN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_HSEMEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4ENR_BKPRAMEN_Field is Interfaces.STM32.Bit;
-- RCC AHB4 Clock Register
type C1_AHB4ENR_Register is record
-- 0GPIO peripheral clock enable
GPIOAEN : C1_AHB4ENR_GPIOAEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOBEN : C1_AHB4ENR_GPIOBEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOCEN : C1_AHB4ENR_GPIOCEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIODEN : C1_AHB4ENR_GPIODEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOEEN : C1_AHB4ENR_GPIOEEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOFEN : C1_AHB4ENR_GPIOFEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOGEN : C1_AHB4ENR_GPIOGEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOHEN : C1_AHB4ENR_GPIOHEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOIEN : C1_AHB4ENR_GPIOIEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOJEN : C1_AHB4ENR_GPIOJEN_Field := 16#0#;
-- 0GPIO peripheral clock enable
GPIOKEN : C1_AHB4ENR_GPIOKEN_Field := 16#0#;
-- unspecified
Reserved_11_18 : Interfaces.STM32.Byte := 16#0#;
-- CRC peripheral clock enable
CRCEN : C1_AHB4ENR_CRCEN_Field := 16#0#;
-- unspecified
Reserved_20_20 : Interfaces.STM32.Bit := 16#0#;
-- BDMA and DMAMUX2 Clock Enable
BDMAEN : C1_AHB4ENR_BDMAEN_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- ADC3 Peripheral Clocks Enable
ADC3EN : C1_AHB4ENR_ADC3EN_Field := 16#0#;
-- HSEM peripheral clock enable
HSEMEN : C1_AHB4ENR_HSEMEN_Field := 16#0#;
-- unspecified
Reserved_26_27 : Interfaces.STM32.UInt2 := 16#0#;
-- Backup RAM Clock Enable
BKPRAMEN : C1_AHB4ENR_BKPRAMEN_Field := 16#0#;
-- unspecified
Reserved_29_31 : Interfaces.STM32.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB4ENR_Register use record
GPIOAEN at 0 range 0 .. 0;
GPIOBEN at 0 range 1 .. 1;
GPIOCEN at 0 range 2 .. 2;
GPIODEN at 0 range 3 .. 3;
GPIOEEN at 0 range 4 .. 4;
GPIOFEN at 0 range 5 .. 5;
GPIOGEN at 0 range 6 .. 6;
GPIOHEN at 0 range 7 .. 7;
GPIOIEN at 0 range 8 .. 8;
GPIOJEN at 0 range 9 .. 9;
GPIOKEN at 0 range 10 .. 10;
Reserved_11_18 at 0 range 11 .. 18;
CRCEN at 0 range 19 .. 19;
Reserved_20_20 at 0 range 20 .. 20;
BDMAEN at 0 range 21 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
ADC3EN at 0 range 24 .. 24;
HSEMEN at 0 range 25 .. 25;
Reserved_26_27 at 0 range 26 .. 27;
BKPRAMEN at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C1_APB3ENR_LTDCEN_Field is Interfaces.STM32.Bit;
subtype C1_APB3ENR_WWDG1EN_Field is Interfaces.STM32.Bit;
-- RCC APB3 Clock Register
type C1_APB3ENR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- LTDC peripheral clock enable
LTDCEN : C1_APB3ENR_LTDCEN_Field := 16#0#;
-- unspecified
Reserved_4_5 : Interfaces.STM32.UInt2 := 16#0#;
-- WWDG1 Clock Enable
WWDG1EN : C1_APB3ENR_WWDG1EN_Field := 16#0#;
-- unspecified
Reserved_7_31 : Interfaces.STM32.UInt25 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB3ENR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
LTDCEN at 0 range 3 .. 3;
Reserved_4_5 at 0 range 4 .. 5;
WWDG1EN at 0 range 6 .. 6;
Reserved_7_31 at 0 range 7 .. 31;
end record;
subtype C1_APB1LENR_TIM2EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM3EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM4EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM5EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM6EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM7EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM12EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM13EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_TIM14EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_LPTIM1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_SPI2EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_SPI3EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_SPDIFRXEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_USART2EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_USART3EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_UART4EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_UART5EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_I2C1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_I2C2EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_I2C3EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_HDMICECEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_DAC12EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_UART7EN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LENR_UART8EN_Field is Interfaces.STM32.Bit;
-- RCC APB1 Clock Register
type C1_APB1LENR_Register is record
-- TIM peripheral clock enable
TIM2EN : C1_APB1LENR_TIM2EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM3EN : C1_APB1LENR_TIM3EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM4EN : C1_APB1LENR_TIM4EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM5EN : C1_APB1LENR_TIM5EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM6EN : C1_APB1LENR_TIM6EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM7EN : C1_APB1LENR_TIM7EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM12EN : C1_APB1LENR_TIM12EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM13EN : C1_APB1LENR_TIM13EN_Field := 16#0#;
-- TIM peripheral clock enable
TIM14EN : C1_APB1LENR_TIM14EN_Field := 16#0#;
-- LPTIM1 Peripheral Clocks Enable
LPTIM1EN : C1_APB1LENR_LPTIM1EN_Field := 16#0#;
-- unspecified
Reserved_10_13 : Interfaces.STM32.UInt4 := 16#0#;
-- SPI2 Peripheral Clocks Enable
SPI2EN : C1_APB1LENR_SPI2EN_Field := 16#0#;
-- SPI3 Peripheral Clocks Enable
SPI3EN : C1_APB1LENR_SPI3EN_Field := 16#0#;
-- SPDIFRX Peripheral Clocks Enable
SPDIFRXEN : C1_APB1LENR_SPDIFRXEN_Field := 16#0#;
-- USART2 Peripheral Clocks Enable
USART2EN : C1_APB1LENR_USART2EN_Field := 16#0#;
-- USART3 Peripheral Clocks Enable
USART3EN : C1_APB1LENR_USART3EN_Field := 16#0#;
-- UART4 Peripheral Clocks Enable
UART4EN : C1_APB1LENR_UART4EN_Field := 16#0#;
-- UART5 Peripheral Clocks Enable
UART5EN : C1_APB1LENR_UART5EN_Field := 16#0#;
-- I2C1 Peripheral Clocks Enable
I2C1EN : C1_APB1LENR_I2C1EN_Field := 16#0#;
-- I2C2 Peripheral Clocks Enable
I2C2EN : C1_APB1LENR_I2C2EN_Field := 16#0#;
-- I2C3 Peripheral Clocks Enable
I2C3EN : C1_APB1LENR_I2C3EN_Field := 16#0#;
-- unspecified
Reserved_24_26 : Interfaces.STM32.UInt3 := 16#0#;
-- HDMI-CEC peripheral clock enable
HDMICECEN : C1_APB1LENR_HDMICECEN_Field := 16#0#;
-- unspecified
Reserved_28_28 : Interfaces.STM32.Bit := 16#0#;
-- DAC1&2 peripheral clock enable
DAC12EN : C1_APB1LENR_DAC12EN_Field := 16#0#;
-- UART7 Peripheral Clocks Enable
UART7EN : C1_APB1LENR_UART7EN_Field := 16#0#;
-- UART8 Peripheral Clocks Enable
UART8EN : C1_APB1LENR_UART8EN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB1LENR_Register use record
TIM2EN at 0 range 0 .. 0;
TIM3EN at 0 range 1 .. 1;
TIM4EN at 0 range 2 .. 2;
TIM5EN at 0 range 3 .. 3;
TIM6EN at 0 range 4 .. 4;
TIM7EN at 0 range 5 .. 5;
TIM12EN at 0 range 6 .. 6;
TIM13EN at 0 range 7 .. 7;
TIM14EN at 0 range 8 .. 8;
LPTIM1EN at 0 range 9 .. 9;
Reserved_10_13 at 0 range 10 .. 13;
SPI2EN at 0 range 14 .. 14;
SPI3EN at 0 range 15 .. 15;
SPDIFRXEN at 0 range 16 .. 16;
USART2EN at 0 range 17 .. 17;
USART3EN at 0 range 18 .. 18;
UART4EN at 0 range 19 .. 19;
UART5EN at 0 range 20 .. 20;
I2C1EN at 0 range 21 .. 21;
I2C2EN at 0 range 22 .. 22;
I2C3EN at 0 range 23 .. 23;
Reserved_24_26 at 0 range 24 .. 26;
HDMICECEN at 0 range 27 .. 27;
Reserved_28_28 at 0 range 28 .. 28;
DAC12EN at 0 range 29 .. 29;
UART7EN at 0 range 30 .. 30;
UART8EN at 0 range 31 .. 31;
end record;
subtype C1_APB1HENR_CRSEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HENR_SWPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HENR_OPAMPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HENR_MDIOSEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HENR_FDCANEN_Field is Interfaces.STM32.Bit;
-- RCC APB1 Clock Register
type C1_APB1HENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- Clock Recovery System peripheral clock enable
CRSEN : C1_APB1HENR_CRSEN_Field := 16#0#;
-- SWPMI Peripheral Clocks Enable
SWPEN : C1_APB1HENR_SWPEN_Field := 16#0#;
-- unspecified
Reserved_3_3 : Interfaces.STM32.Bit := 16#0#;
-- OPAMP peripheral clock enable
OPAMPEN : C1_APB1HENR_OPAMPEN_Field := 16#0#;
-- MDIOS peripheral clock enable
MDIOSEN : C1_APB1HENR_MDIOSEN_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FDCAN Peripheral Clocks Enable
FDCANEN : C1_APB1HENR_FDCANEN_Field := 16#0#;
-- unspecified
Reserved_9_31 : Interfaces.STM32.UInt23 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB1HENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
CRSEN at 0 range 1 .. 1;
SWPEN at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
OPAMPEN at 0 range 4 .. 4;
MDIOSEN at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FDCANEN at 0 range 8 .. 8;
Reserved_9_31 at 0 range 9 .. 31;
end record;
subtype C1_APB2ENR_TIM1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_TIM8EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_USART1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_USART6EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_SPI1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_SPI4EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_TIM15EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_TIM16EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_TIM17EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_SPI5EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_SAI1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_SAI2EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_SAI3EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_DFSDM1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB2ENR_HRTIMEN_Field is Interfaces.STM32.Bit;
-- RCC APB2 Clock Register
type C1_APB2ENR_Register is record
-- TIM1 peripheral clock enable
TIM1EN : C1_APB2ENR_TIM1EN_Field := 16#0#;
-- TIM8 peripheral clock enable
TIM8EN : C1_APB2ENR_TIM8EN_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- USART1 Peripheral Clocks Enable
USART1EN : C1_APB2ENR_USART1EN_Field := 16#0#;
-- USART6 Peripheral Clocks Enable
USART6EN : C1_APB2ENR_USART6EN_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- SPI1 Peripheral Clocks Enable
SPI1EN : C1_APB2ENR_SPI1EN_Field := 16#0#;
-- SPI4 Peripheral Clocks Enable
SPI4EN : C1_APB2ENR_SPI4EN_Field := 16#0#;
-- unspecified
Reserved_14_15 : Interfaces.STM32.UInt2 := 16#0#;
-- TIM15 peripheral clock enable
TIM15EN : C1_APB2ENR_TIM15EN_Field := 16#0#;
-- TIM16 peripheral clock enable
TIM16EN : C1_APB2ENR_TIM16EN_Field := 16#0#;
-- TIM17 peripheral clock enable
TIM17EN : C1_APB2ENR_TIM17EN_Field := 16#0#;
-- unspecified
Reserved_19_19 : Interfaces.STM32.Bit := 16#0#;
-- SPI5 Peripheral Clocks Enable
SPI5EN : C1_APB2ENR_SPI5EN_Field := 16#0#;
-- unspecified
Reserved_21_21 : Interfaces.STM32.Bit := 16#0#;
-- SAI1 Peripheral Clocks Enable
SAI1EN : C1_APB2ENR_SAI1EN_Field := 16#0#;
-- SAI2 Peripheral Clocks Enable
SAI2EN : C1_APB2ENR_SAI2EN_Field := 16#0#;
-- SAI3 Peripheral Clocks Enable
SAI3EN : C1_APB2ENR_SAI3EN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- DFSDM1 Peripheral Clocks Enable
DFSDM1EN : C1_APB2ENR_DFSDM1EN_Field := 16#0#;
-- HRTIM peripheral clock enable
HRTIMEN : C1_APB2ENR_HRTIMEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB2ENR_Register use record
TIM1EN at 0 range 0 .. 0;
TIM8EN at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
USART1EN at 0 range 4 .. 4;
USART6EN at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
SPI1EN at 0 range 12 .. 12;
SPI4EN at 0 range 13 .. 13;
Reserved_14_15 at 0 range 14 .. 15;
TIM15EN at 0 range 16 .. 16;
TIM16EN at 0 range 17 .. 17;
TIM17EN at 0 range 18 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
SPI5EN at 0 range 20 .. 20;
Reserved_21_21 at 0 range 21 .. 21;
SAI1EN at 0 range 22 .. 22;
SAI2EN at 0 range 23 .. 23;
SAI3EN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
DFSDM1EN at 0 range 28 .. 28;
HRTIMEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype C1_APB4ENR_SYSCFGEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_LPUART1EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_SPI6EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_I2C4EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_LPTIM2EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_LPTIM3EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_LPTIM4EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_LPTIM5EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_COMP12EN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_VREFEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_RTCAPBEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4ENR_SAI4EN_Field is Interfaces.STM32.Bit;
-- RCC APB4 Clock Register
type C1_APB4ENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- SYSCFG peripheral clock enable
SYSCFGEN : C1_APB4ENR_SYSCFGEN_Field := 16#0#;
-- unspecified
Reserved_2_2 : Interfaces.STM32.Bit := 16#0#;
-- LPUART1 Peripheral Clocks Enable
LPUART1EN : C1_APB4ENR_LPUART1EN_Field := 16#0#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 Peripheral Clocks Enable
SPI6EN : C1_APB4ENR_SPI6EN_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- I2C4 Peripheral Clocks Enable
I2C4EN : C1_APB4ENR_I2C4EN_Field := 16#0#;
-- unspecified
Reserved_8_8 : Interfaces.STM32.Bit := 16#0#;
-- LPTIM2 Peripheral Clocks Enable
LPTIM2EN : C1_APB4ENR_LPTIM2EN_Field := 16#0#;
-- LPTIM3 Peripheral Clocks Enable
LPTIM3EN : C1_APB4ENR_LPTIM3EN_Field := 16#0#;
-- LPTIM4 Peripheral Clocks Enable
LPTIM4EN : C1_APB4ENR_LPTIM4EN_Field := 16#0#;
-- LPTIM5 Peripheral Clocks Enable
LPTIM5EN : C1_APB4ENR_LPTIM5EN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- COMP1/2 peripheral clock enable
COMP12EN : C1_APB4ENR_COMP12EN_Field := 16#0#;
-- VREF peripheral clock enable
VREFEN : C1_APB4ENR_VREFEN_Field := 16#0#;
-- RTC APB Clock Enable
RTCAPBEN : C1_APB4ENR_RTCAPBEN_Field := 16#0#;
-- unspecified
Reserved_17_20 : Interfaces.STM32.UInt4 := 16#0#;
-- SAI4 Peripheral Clocks Enable
SAI4EN : C1_APB4ENR_SAI4EN_Field := 16#0#;
-- unspecified
Reserved_22_31 : Interfaces.STM32.UInt10 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB4ENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
SYSCFGEN at 0 range 1 .. 1;
Reserved_2_2 at 0 range 2 .. 2;
LPUART1EN at 0 range 3 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
SPI6EN at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
I2C4EN at 0 range 7 .. 7;
Reserved_8_8 at 0 range 8 .. 8;
LPTIM2EN at 0 range 9 .. 9;
LPTIM3EN at 0 range 10 .. 10;
LPTIM4EN at 0 range 11 .. 11;
LPTIM5EN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
COMP12EN at 0 range 14 .. 14;
VREFEN at 0 range 15 .. 15;
RTCAPBEN at 0 range 16 .. 16;
Reserved_17_20 at 0 range 17 .. 20;
SAI4EN at 0 range 21 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
subtype C1_AHB3LPENR_MDMALPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_DMA2DLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_JPGDECLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_FLITFLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_FMCLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_QSPILPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_SDMMC1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_D1DTCM1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_DTCM2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_ITCMLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB3LPENR_AXISRAMLPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB3 Sleep Clock Register
type C1_AHB3LPENR_Register is record
-- MDMA Clock Enable During CSleep Mode
MDMALPEN : C1_AHB3LPENR_MDMALPEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- DMA2D Clock Enable During CSleep Mode
DMA2DLPEN : C1_AHB3LPENR_DMA2DLPEN_Field := 16#0#;
-- JPGDEC Clock Enable During CSleep Mode
JPGDECLPEN : C1_AHB3LPENR_JPGDECLPEN_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FLITF Clock Enable During CSleep Mode
FLITFLPEN : C1_AHB3LPENR_FLITFLPEN_Field := 16#0#;
-- unspecified
Reserved_9_11 : Interfaces.STM32.UInt3 := 16#0#;
-- FMC Peripheral Clocks Enable During CSleep Mode
FMCLPEN : C1_AHB3LPENR_FMCLPEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- QUADSPI and QUADSPI Delay Clock Enable During CSleep Mode
QSPILPEN : C1_AHB3LPENR_QSPILPEN_Field := 16#0#;
-- unspecified
Reserved_15_15 : Interfaces.STM32.Bit := 16#0#;
-- SDMMC1 and SDMMC1 Delay Clock Enable During CSleep Mode
SDMMC1LPEN : C1_AHB3LPENR_SDMMC1LPEN_Field := 16#0#;
-- unspecified
Reserved_17_27 : Interfaces.STM32.UInt11 := 16#0#;
-- D1DTCM1 Block Clock Enable During CSleep mode
D1DTCM1LPEN : C1_AHB3LPENR_D1DTCM1LPEN_Field := 16#0#;
-- D1 DTCM2 Block Clock Enable During CSleep mode
DTCM2LPEN : C1_AHB3LPENR_DTCM2LPEN_Field := 16#0#;
-- D1ITCM Block Clock Enable During CSleep mode
ITCMLPEN : C1_AHB3LPENR_ITCMLPEN_Field := 16#0#;
-- AXISRAM Block Clock Enable During CSleep mode
AXISRAMLPEN : C1_AHB3LPENR_AXISRAMLPEN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB3LPENR_Register use record
MDMALPEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
DMA2DLPEN at 0 range 4 .. 4;
JPGDECLPEN at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FLITFLPEN at 0 range 8 .. 8;
Reserved_9_11 at 0 range 9 .. 11;
FMCLPEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
QSPILPEN at 0 range 14 .. 14;
Reserved_15_15 at 0 range 15 .. 15;
SDMMC1LPEN at 0 range 16 .. 16;
Reserved_17_27 at 0 range 17 .. 27;
D1DTCM1LPEN at 0 range 28 .. 28;
DTCM2LPEN at 0 range 29 .. 29;
ITCMLPEN at 0 range 30 .. 30;
AXISRAMLPEN at 0 range 31 .. 31;
end record;
subtype C1_AHB1LPENR_DMA1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_DMA2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_ADC12LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_ETH1MACLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_ETH1TXLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_ETH1RXLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_USB1OTGLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_USB1ULPILPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_USB2OTGLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB1LPENR_USB2ULPILPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB1 Sleep Clock Register
type C1_AHB1LPENR_Register is record
-- DMA1 Clock Enable During CSleep Mode
DMA1LPEN : C1_AHB1LPENR_DMA1LPEN_Field := 16#0#;
-- DMA2 Clock Enable During CSleep Mode
DMA2LPEN : C1_AHB1LPENR_DMA2LPEN_Field := 16#0#;
-- unspecified
Reserved_2_4 : Interfaces.STM32.UInt3 := 16#0#;
-- ADC1/2 Peripheral Clocks Enable During CSleep Mode
ADC12LPEN : C1_AHB1LPENR_ADC12LPEN_Field := 16#0#;
-- unspecified
Reserved_6_14 : Interfaces.STM32.UInt9 := 16#0#;
-- Ethernet MAC bus interface Clock Enable During CSleep Mode
ETH1MACLPEN : C1_AHB1LPENR_ETH1MACLPEN_Field := 16#0#;
-- Ethernet Transmission Clock Enable During CSleep Mode
ETH1TXLPEN : C1_AHB1LPENR_ETH1TXLPEN_Field := 16#0#;
-- Ethernet Reception Clock Enable During CSleep Mode
ETH1RXLPEN : C1_AHB1LPENR_ETH1RXLPEN_Field := 16#0#;
-- unspecified
Reserved_18_24 : Interfaces.STM32.UInt7 := 16#0#;
-- USB1OTG peripheral clock enable during CSleep mode
USB1OTGLPEN : C1_AHB1LPENR_USB1OTGLPEN_Field := 16#0#;
-- USB_PHY1 clock enable during CSleep mode
USB1ULPILPEN : C1_AHB1LPENR_USB1ULPILPEN_Field := 16#0#;
-- USB2OTG peripheral clock enable during CSleep mode
USB2OTGLPEN : C1_AHB1LPENR_USB2OTGLPEN_Field := 16#0#;
-- USB_PHY2 clocks enable during CSleep mode
USB2ULPILPEN : C1_AHB1LPENR_USB2ULPILPEN_Field := 16#0#;
-- unspecified
Reserved_29_31 : Interfaces.STM32.UInt3 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB1LPENR_Register use record
DMA1LPEN at 0 range 0 .. 0;
DMA2LPEN at 0 range 1 .. 1;
Reserved_2_4 at 0 range 2 .. 4;
ADC12LPEN at 0 range 5 .. 5;
Reserved_6_14 at 0 range 6 .. 14;
ETH1MACLPEN at 0 range 15 .. 15;
ETH1TXLPEN at 0 range 16 .. 16;
ETH1RXLPEN at 0 range 17 .. 17;
Reserved_18_24 at 0 range 18 .. 24;
USB1OTGLPEN at 0 range 25 .. 25;
USB1ULPILPEN at 0 range 26 .. 26;
USB2OTGLPEN at 0 range 27 .. 27;
USB2ULPILPEN at 0 range 28 .. 28;
Reserved_29_31 at 0 range 29 .. 31;
end record;
subtype C1_AHB2LPENR_CAMITFLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_CRYPTLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_HASHLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_RNGLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_SDMMC2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_SRAM1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_SRAM2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB2LPENR_SRAM3LPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB2 Sleep Clock Register
type C1_AHB2LPENR_Register is record
-- CAMITF peripheral clock enable during CSleep mode
CAMITFLPEN : C1_AHB2LPENR_CAMITFLPEN_Field := 16#0#;
-- unspecified
Reserved_1_3 : Interfaces.STM32.UInt3 := 16#0#;
-- CRYPT peripheral clock enable during CSleep mode
CRYPTLPEN : C1_AHB2LPENR_CRYPTLPEN_Field := 16#0#;
-- HASH peripheral clock enable during CSleep mode
HASHLPEN : C1_AHB2LPENR_HASHLPEN_Field := 16#0#;
-- RNG peripheral clock enable during CSleep mode
RNGLPEN : C1_AHB2LPENR_RNGLPEN_Field := 16#0#;
-- unspecified
Reserved_7_8 : Interfaces.STM32.UInt2 := 16#0#;
-- SDMMC2 and SDMMC2 Delay Clock Enable During CSleep Mode
SDMMC2LPEN : C1_AHB2LPENR_SDMMC2LPEN_Field := 16#0#;
-- unspecified
Reserved_10_28 : Interfaces.STM32.UInt19 := 16#0#;
-- SRAM1 Clock Enable During CSleep Mode
SRAM1LPEN : C1_AHB2LPENR_SRAM1LPEN_Field := 16#0#;
-- SRAM2 Clock Enable During CSleep Mode
SRAM2LPEN : C1_AHB2LPENR_SRAM2LPEN_Field := 16#0#;
-- SRAM3 Clock Enable During CSleep Mode
SRAM3LPEN : C1_AHB2LPENR_SRAM3LPEN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB2LPENR_Register use record
CAMITFLPEN at 0 range 0 .. 0;
Reserved_1_3 at 0 range 1 .. 3;
CRYPTLPEN at 0 range 4 .. 4;
HASHLPEN at 0 range 5 .. 5;
RNGLPEN at 0 range 6 .. 6;
Reserved_7_8 at 0 range 7 .. 8;
SDMMC2LPEN at 0 range 9 .. 9;
Reserved_10_28 at 0 range 10 .. 28;
SRAM1LPEN at 0 range 29 .. 29;
SRAM2LPEN at 0 range 30 .. 30;
SRAM3LPEN at 0 range 31 .. 31;
end record;
subtype C1_AHB4LPENR_GPIOALPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOBLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOCLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIODLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOELPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOFLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOGLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOHLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOILPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOJLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_GPIOKLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_CRCLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_BDMALPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_ADC3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_BKPRAMLPEN_Field is Interfaces.STM32.Bit;
subtype C1_AHB4LPENR_SRAM4LPEN_Field is Interfaces.STM32.Bit;
-- RCC AHB4 Sleep Clock Register
type C1_AHB4LPENR_Register is record
-- GPIO peripheral clock enable during CSleep mode
GPIOALPEN : C1_AHB4LPENR_GPIOALPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOBLPEN : C1_AHB4LPENR_GPIOBLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOCLPEN : C1_AHB4LPENR_GPIOCLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIODLPEN : C1_AHB4LPENR_GPIODLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOELPEN : C1_AHB4LPENR_GPIOELPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOFLPEN : C1_AHB4LPENR_GPIOFLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOGLPEN : C1_AHB4LPENR_GPIOGLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOHLPEN : C1_AHB4LPENR_GPIOHLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOILPEN : C1_AHB4LPENR_GPIOILPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOJLPEN : C1_AHB4LPENR_GPIOJLPEN_Field := 16#0#;
-- GPIO peripheral clock enable during CSleep mode
GPIOKLPEN : C1_AHB4LPENR_GPIOKLPEN_Field := 16#0#;
-- unspecified
Reserved_11_18 : Interfaces.STM32.Byte := 16#0#;
-- CRC peripheral clock enable during CSleep mode
CRCLPEN : C1_AHB4LPENR_CRCLPEN_Field := 16#0#;
-- unspecified
Reserved_20_20 : Interfaces.STM32.Bit := 16#0#;
-- BDMA Clock Enable During CSleep Mode
BDMALPEN : C1_AHB4LPENR_BDMALPEN_Field := 16#0#;
-- unspecified
Reserved_22_23 : Interfaces.STM32.UInt2 := 16#0#;
-- ADC3 Peripheral Clocks Enable During CSleep Mode
ADC3LPEN : C1_AHB4LPENR_ADC3LPEN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- Backup RAM Clock Enable During CSleep Mode
BKPRAMLPEN : C1_AHB4LPENR_BKPRAMLPEN_Field := 16#0#;
-- SRAM4 Clock Enable During CSleep Mode
SRAM4LPEN : C1_AHB4LPENR_SRAM4LPEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_AHB4LPENR_Register use record
GPIOALPEN at 0 range 0 .. 0;
GPIOBLPEN at 0 range 1 .. 1;
GPIOCLPEN at 0 range 2 .. 2;
GPIODLPEN at 0 range 3 .. 3;
GPIOELPEN at 0 range 4 .. 4;
GPIOFLPEN at 0 range 5 .. 5;
GPIOGLPEN at 0 range 6 .. 6;
GPIOHLPEN at 0 range 7 .. 7;
GPIOILPEN at 0 range 8 .. 8;
GPIOJLPEN at 0 range 9 .. 9;
GPIOKLPEN at 0 range 10 .. 10;
Reserved_11_18 at 0 range 11 .. 18;
CRCLPEN at 0 range 19 .. 19;
Reserved_20_20 at 0 range 20 .. 20;
BDMALPEN at 0 range 21 .. 21;
Reserved_22_23 at 0 range 22 .. 23;
ADC3LPEN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
BKPRAMLPEN at 0 range 28 .. 28;
SRAM4LPEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype C1_APB3LPENR_LTDCLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB3LPENR_WWDG1LPEN_Field is Interfaces.STM32.Bit;
-- RCC APB3 Sleep Clock Register
type C1_APB3LPENR_Register is record
-- unspecified
Reserved_0_2 : Interfaces.STM32.UInt3 := 16#0#;
-- LTDC peripheral clock enable during CSleep mode
LTDCLPEN : C1_APB3LPENR_LTDCLPEN_Field := 16#0#;
-- unspecified
Reserved_4_5 : Interfaces.STM32.UInt2 := 16#0#;
-- WWDG1 Clock Enable During CSleep Mode
WWDG1LPEN : C1_APB3LPENR_WWDG1LPEN_Field := 16#0#;
-- unspecified
Reserved_7_31 : Interfaces.STM32.UInt25 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB3LPENR_Register use record
Reserved_0_2 at 0 range 0 .. 2;
LTDCLPEN at 0 range 3 .. 3;
Reserved_4_5 at 0 range 4 .. 5;
WWDG1LPEN at 0 range 6 .. 6;
Reserved_7_31 at 0 range 7 .. 31;
end record;
subtype C1_APB1LLPENR_TIM2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM4LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM5LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM6LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM7LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM12LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM13LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_TIM14LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_LPTIM1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_SPI2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_SPI3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_SPDIFRXLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_USART2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_USART3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_UART4LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_UART5LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_I2C1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_I2C2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_I2C3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_HDMICECLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_DAC12LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_UART7LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1LLPENR_UART8LPEN_Field is Interfaces.STM32.Bit;
-- RCC APB1 Low Sleep Clock Register
type C1_APB1LLPENR_Register is record
-- TIM2 peripheral clock enable during CSleep mode
TIM2LPEN : C1_APB1LLPENR_TIM2LPEN_Field := 16#0#;
-- TIM3 peripheral clock enable during CSleep mode
TIM3LPEN : C1_APB1LLPENR_TIM3LPEN_Field := 16#0#;
-- TIM4 peripheral clock enable during CSleep mode
TIM4LPEN : C1_APB1LLPENR_TIM4LPEN_Field := 16#0#;
-- TIM5 peripheral clock enable during CSleep mode
TIM5LPEN : C1_APB1LLPENR_TIM5LPEN_Field := 16#0#;
-- TIM6 peripheral clock enable during CSleep mode
TIM6LPEN : C1_APB1LLPENR_TIM6LPEN_Field := 16#0#;
-- TIM7 peripheral clock enable during CSleep mode
TIM7LPEN : C1_APB1LLPENR_TIM7LPEN_Field := 16#0#;
-- TIM12 peripheral clock enable during CSleep mode
TIM12LPEN : C1_APB1LLPENR_TIM12LPEN_Field := 16#0#;
-- TIM13 peripheral clock enable during CSleep mode
TIM13LPEN : C1_APB1LLPENR_TIM13LPEN_Field := 16#0#;
-- TIM14 peripheral clock enable during CSleep mode
TIM14LPEN : C1_APB1LLPENR_TIM14LPEN_Field := 16#0#;
-- LPTIM1 Peripheral Clocks Enable During CSleep Mode
LPTIM1LPEN : C1_APB1LLPENR_LPTIM1LPEN_Field := 16#0#;
-- unspecified
Reserved_10_13 : Interfaces.STM32.UInt4 := 16#0#;
-- SPI2 Peripheral Clocks Enable During CSleep Mode
SPI2LPEN : C1_APB1LLPENR_SPI2LPEN_Field := 16#0#;
-- SPI3 Peripheral Clocks Enable During CSleep Mode
SPI3LPEN : C1_APB1LLPENR_SPI3LPEN_Field := 16#0#;
-- SPDIFRX Peripheral Clocks Enable During CSleep Mode
SPDIFRXLPEN : C1_APB1LLPENR_SPDIFRXLPEN_Field := 16#0#;
-- USART2 Peripheral Clocks Enable During CSleep Mode
USART2LPEN : C1_APB1LLPENR_USART2LPEN_Field := 16#0#;
-- USART3 Peripheral Clocks Enable During CSleep Mode
USART3LPEN : C1_APB1LLPENR_USART3LPEN_Field := 16#0#;
-- UART4 Peripheral Clocks Enable During CSleep Mode
UART4LPEN : C1_APB1LLPENR_UART4LPEN_Field := 16#0#;
-- UART5 Peripheral Clocks Enable During CSleep Mode
UART5LPEN : C1_APB1LLPENR_UART5LPEN_Field := 16#0#;
-- I2C1 Peripheral Clocks Enable During CSleep Mode
I2C1LPEN : C1_APB1LLPENR_I2C1LPEN_Field := 16#0#;
-- I2C2 Peripheral Clocks Enable During CSleep Mode
I2C2LPEN : C1_APB1LLPENR_I2C2LPEN_Field := 16#0#;
-- I2C3 Peripheral Clocks Enable During CSleep Mode
I2C3LPEN : C1_APB1LLPENR_I2C3LPEN_Field := 16#0#;
-- unspecified
Reserved_24_26 : Interfaces.STM32.UInt3 := 16#0#;
-- HDMI-CEC Peripheral Clocks Enable During CSleep Mode
HDMICECLPEN : C1_APB1LLPENR_HDMICECLPEN_Field := 16#0#;
-- unspecified
Reserved_28_28 : Interfaces.STM32.Bit := 16#0#;
-- DAC1/2 peripheral clock enable during CSleep mode
DAC12LPEN : C1_APB1LLPENR_DAC12LPEN_Field := 16#0#;
-- UART7 Peripheral Clocks Enable During CSleep Mode
UART7LPEN : C1_APB1LLPENR_UART7LPEN_Field := 16#0#;
-- UART8 Peripheral Clocks Enable During CSleep Mode
UART8LPEN : C1_APB1LLPENR_UART8LPEN_Field := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB1LLPENR_Register use record
TIM2LPEN at 0 range 0 .. 0;
TIM3LPEN at 0 range 1 .. 1;
TIM4LPEN at 0 range 2 .. 2;
TIM5LPEN at 0 range 3 .. 3;
TIM6LPEN at 0 range 4 .. 4;
TIM7LPEN at 0 range 5 .. 5;
TIM12LPEN at 0 range 6 .. 6;
TIM13LPEN at 0 range 7 .. 7;
TIM14LPEN at 0 range 8 .. 8;
LPTIM1LPEN at 0 range 9 .. 9;
Reserved_10_13 at 0 range 10 .. 13;
SPI2LPEN at 0 range 14 .. 14;
SPI3LPEN at 0 range 15 .. 15;
SPDIFRXLPEN at 0 range 16 .. 16;
USART2LPEN at 0 range 17 .. 17;
USART3LPEN at 0 range 18 .. 18;
UART4LPEN at 0 range 19 .. 19;
UART5LPEN at 0 range 20 .. 20;
I2C1LPEN at 0 range 21 .. 21;
I2C2LPEN at 0 range 22 .. 22;
I2C3LPEN at 0 range 23 .. 23;
Reserved_24_26 at 0 range 24 .. 26;
HDMICECLPEN at 0 range 27 .. 27;
Reserved_28_28 at 0 range 28 .. 28;
DAC12LPEN at 0 range 29 .. 29;
UART7LPEN at 0 range 30 .. 30;
UART8LPEN at 0 range 31 .. 31;
end record;
subtype C1_APB1HLPENR_CRSLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HLPENR_SWPLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HLPENR_OPAMPLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HLPENR_MDIOSLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB1HLPENR_FDCANLPEN_Field is Interfaces.STM32.Bit;
-- RCC APB1 High Sleep Clock Register
type C1_APB1HLPENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- Clock Recovery System peripheral clock enable during CSleep mode
CRSLPEN : C1_APB1HLPENR_CRSLPEN_Field := 16#0#;
-- SWPMI Peripheral Clocks Enable During CSleep Mode
SWPLPEN : C1_APB1HLPENR_SWPLPEN_Field := 16#0#;
-- unspecified
Reserved_3_3 : Interfaces.STM32.Bit := 16#0#;
-- OPAMP peripheral clock enable during CSleep mode
OPAMPLPEN : C1_APB1HLPENR_OPAMPLPEN_Field := 16#0#;
-- MDIOS peripheral clock enable during CSleep mode
MDIOSLPEN : C1_APB1HLPENR_MDIOSLPEN_Field := 16#0#;
-- unspecified
Reserved_6_7 : Interfaces.STM32.UInt2 := 16#0#;
-- FDCAN Peripheral Clocks Enable During CSleep Mode
FDCANLPEN : C1_APB1HLPENR_FDCANLPEN_Field := 16#0#;
-- unspecified
Reserved_9_31 : Interfaces.STM32.UInt23 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB1HLPENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
CRSLPEN at 0 range 1 .. 1;
SWPLPEN at 0 range 2 .. 2;
Reserved_3_3 at 0 range 3 .. 3;
OPAMPLPEN at 0 range 4 .. 4;
MDIOSLPEN at 0 range 5 .. 5;
Reserved_6_7 at 0 range 6 .. 7;
FDCANLPEN at 0 range 8 .. 8;
Reserved_9_31 at 0 range 9 .. 31;
end record;
subtype C1_APB2LPENR_TIM1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_TIM8LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_USART1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_USART6LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_SPI1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_SPI4LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_TIM15LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_TIM16LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_TIM17LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_SPI5LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_SAI1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_SAI2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_SAI3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_DFSDM1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB2LPENR_HRTIMLPEN_Field is Interfaces.STM32.Bit;
-- RCC APB2 Sleep Clock Register
type C1_APB2LPENR_Register is record
-- TIM1 peripheral clock enable during CSleep mode
TIM1LPEN : C1_APB2LPENR_TIM1LPEN_Field := 16#0#;
-- TIM8 peripheral clock enable during CSleep mode
TIM8LPEN : C1_APB2LPENR_TIM8LPEN_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- USART1 Peripheral Clocks Enable During CSleep Mode
USART1LPEN : C1_APB2LPENR_USART1LPEN_Field := 16#0#;
-- USART6 Peripheral Clocks Enable During CSleep Mode
USART6LPEN : C1_APB2LPENR_USART6LPEN_Field := 16#0#;
-- unspecified
Reserved_6_11 : Interfaces.STM32.UInt6 := 16#0#;
-- SPI1 Peripheral Clocks Enable During CSleep Mode
SPI1LPEN : C1_APB2LPENR_SPI1LPEN_Field := 16#0#;
-- SPI4 Peripheral Clocks Enable During CSleep Mode
SPI4LPEN : C1_APB2LPENR_SPI4LPEN_Field := 16#0#;
-- unspecified
Reserved_14_15 : Interfaces.STM32.UInt2 := 16#0#;
-- TIM15 peripheral clock enable during CSleep mode
TIM15LPEN : C1_APB2LPENR_TIM15LPEN_Field := 16#0#;
-- TIM16 peripheral clock enable during CSleep mode
TIM16LPEN : C1_APB2LPENR_TIM16LPEN_Field := 16#0#;
-- TIM17 peripheral clock enable during CSleep mode
TIM17LPEN : C1_APB2LPENR_TIM17LPEN_Field := 16#0#;
-- unspecified
Reserved_19_19 : Interfaces.STM32.Bit := 16#0#;
-- SPI5 Peripheral Clocks Enable During CSleep Mode
SPI5LPEN : C1_APB2LPENR_SPI5LPEN_Field := 16#0#;
-- unspecified
Reserved_21_21 : Interfaces.STM32.Bit := 16#0#;
-- SAI1 Peripheral Clocks Enable During CSleep Mode
SAI1LPEN : C1_APB2LPENR_SAI1LPEN_Field := 16#0#;
-- SAI2 Peripheral Clocks Enable During CSleep Mode
SAI2LPEN : C1_APB2LPENR_SAI2LPEN_Field := 16#0#;
-- SAI3 Peripheral Clocks Enable During CSleep Mode
SAI3LPEN : C1_APB2LPENR_SAI3LPEN_Field := 16#0#;
-- unspecified
Reserved_25_27 : Interfaces.STM32.UInt3 := 16#0#;
-- DFSDM1 Peripheral Clocks Enable During CSleep Mode
DFSDM1LPEN : C1_APB2LPENR_DFSDM1LPEN_Field := 16#0#;
-- HRTIM peripheral clock enable during CSleep mode
HRTIMLPEN : C1_APB2LPENR_HRTIMLPEN_Field := 16#0#;
-- unspecified
Reserved_30_31 : Interfaces.STM32.UInt2 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB2LPENR_Register use record
TIM1LPEN at 0 range 0 .. 0;
TIM8LPEN at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
USART1LPEN at 0 range 4 .. 4;
USART6LPEN at 0 range 5 .. 5;
Reserved_6_11 at 0 range 6 .. 11;
SPI1LPEN at 0 range 12 .. 12;
SPI4LPEN at 0 range 13 .. 13;
Reserved_14_15 at 0 range 14 .. 15;
TIM15LPEN at 0 range 16 .. 16;
TIM16LPEN at 0 range 17 .. 17;
TIM17LPEN at 0 range 18 .. 18;
Reserved_19_19 at 0 range 19 .. 19;
SPI5LPEN at 0 range 20 .. 20;
Reserved_21_21 at 0 range 21 .. 21;
SAI1LPEN at 0 range 22 .. 22;
SAI2LPEN at 0 range 23 .. 23;
SAI3LPEN at 0 range 24 .. 24;
Reserved_25_27 at 0 range 25 .. 27;
DFSDM1LPEN at 0 range 28 .. 28;
HRTIMLPEN at 0 range 29 .. 29;
Reserved_30_31 at 0 range 30 .. 31;
end record;
subtype C1_APB4LPENR_SYSCFGLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_LPUART1LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_SPI6LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_I2C4LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_LPTIM2LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_LPTIM3LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_LPTIM4LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_LPTIM5LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_COMP12LPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_VREFLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_RTCAPBLPEN_Field is Interfaces.STM32.Bit;
subtype C1_APB4LPENR_SAI4LPEN_Field is Interfaces.STM32.Bit;
-- RCC APB4 Sleep Clock Register
type C1_APB4LPENR_Register is record
-- unspecified
Reserved_0_0 : Interfaces.STM32.Bit := 16#0#;
-- SYSCFG peripheral clock enable during CSleep mode
SYSCFGLPEN : C1_APB4LPENR_SYSCFGLPEN_Field := 16#0#;
-- unspecified
Reserved_2_2 : Interfaces.STM32.Bit := 16#0#;
-- LPUART1 Peripheral Clocks Enable During CSleep Mode
LPUART1LPEN : C1_APB4LPENR_LPUART1LPEN_Field := 16#0#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#0#;
-- SPI6 Peripheral Clocks Enable During CSleep Mode
SPI6LPEN : C1_APB4LPENR_SPI6LPEN_Field := 16#0#;
-- unspecified
Reserved_6_6 : Interfaces.STM32.Bit := 16#0#;
-- I2C4 Peripheral Clocks Enable During CSleep Mode
I2C4LPEN : C1_APB4LPENR_I2C4LPEN_Field := 16#0#;
-- unspecified
Reserved_8_8 : Interfaces.STM32.Bit := 16#0#;
-- LPTIM2 Peripheral Clocks Enable During CSleep Mode
LPTIM2LPEN : C1_APB4LPENR_LPTIM2LPEN_Field := 16#0#;
-- LPTIM3 Peripheral Clocks Enable During CSleep Mode
LPTIM3LPEN : C1_APB4LPENR_LPTIM3LPEN_Field := 16#0#;
-- LPTIM4 Peripheral Clocks Enable During CSleep Mode
LPTIM4LPEN : C1_APB4LPENR_LPTIM4LPEN_Field := 16#0#;
-- LPTIM5 Peripheral Clocks Enable During CSleep Mode
LPTIM5LPEN : C1_APB4LPENR_LPTIM5LPEN_Field := 16#0#;
-- unspecified
Reserved_13_13 : Interfaces.STM32.Bit := 16#0#;
-- COMP1/2 peripheral clock enable during CSleep mode
COMP12LPEN : C1_APB4LPENR_COMP12LPEN_Field := 16#0#;
-- VREF peripheral clock enable during CSleep mode
VREFLPEN : C1_APB4LPENR_VREFLPEN_Field := 16#0#;
-- RTC APB Clock Enable During CSleep Mode
RTCAPBLPEN : C1_APB4LPENR_RTCAPBLPEN_Field := 16#0#;
-- unspecified
Reserved_17_20 : Interfaces.STM32.UInt4 := 16#0#;
-- SAI4 Peripheral Clocks Enable During CSleep Mode
SAI4LPEN : C1_APB4LPENR_SAI4LPEN_Field := 16#0#;
-- unspecified
Reserved_22_31 : Interfaces.STM32.UInt10 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for C1_APB4LPENR_Register use record
Reserved_0_0 at 0 range 0 .. 0;
SYSCFGLPEN at 0 range 1 .. 1;
Reserved_2_2 at 0 range 2 .. 2;
LPUART1LPEN at 0 range 3 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
SPI6LPEN at 0 range 5 .. 5;
Reserved_6_6 at 0 range 6 .. 6;
I2C4LPEN at 0 range 7 .. 7;
Reserved_8_8 at 0 range 8 .. 8;
LPTIM2LPEN at 0 range 9 .. 9;
LPTIM3LPEN at 0 range 10 .. 10;
LPTIM4LPEN at 0 range 11 .. 11;
LPTIM5LPEN at 0 range 12 .. 12;
Reserved_13_13 at 0 range 13 .. 13;
COMP12LPEN at 0 range 14 .. 14;
VREFLPEN at 0 range 15 .. 15;
RTCAPBLPEN at 0 range 16 .. 16;
Reserved_17_20 at 0 range 17 .. 20;
SAI4LPEN at 0 range 21 .. 21;
Reserved_22_31 at 0 range 22 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- Reset and clock control
type RCC_Peripheral is record
-- clock control register
CR : aliased CR_Register;
-- RCC Internal Clock Source Calibration Register
ICSCR : aliased ICSCR_Register;
-- RCC Clock Recovery RC Register
CRRCR : aliased CRRCR_Register;
-- RCC Clock Configuration Register
CFGR : aliased CFGR_Register;
-- RCC Domain 1 Clock Configuration Register
D1CFGR : aliased D1CFGR_Register;
-- RCC Domain 2 Clock Configuration Register
D2CFGR : aliased D2CFGR_Register;
-- RCC Domain 3 Clock Configuration Register
D3CFGR : aliased D3CFGR_Register;
-- RCC PLLs Clock Source Selection Register
PLLCKSELR : aliased PLLCKSELR_Register;
-- RCC PLLs Configuration Register
PLLCFGR : aliased PLLCFGR_Register;
-- RCC PLL1 Dividers Configuration Register
PLL1DIVR : aliased PLL1DIVR_Register;
-- RCC PLL1 Fractional Divider Register
PLL1FRACR : aliased PLL1FRACR_Register;
-- RCC PLL2 Dividers Configuration Register
PLL2DIVR : aliased PLL2DIVR_Register;
-- RCC PLL2 Fractional Divider Register
PLL2FRACR : aliased PLL2FRACR_Register;
-- RCC PLL3 Dividers Configuration Register
PLL3DIVR : aliased PLL3DIVR_Register;
-- RCC PLL3 Fractional Divider Register
PLL3FRACR : aliased PLL3FRACR_Register;
-- RCC Domain 1 Kernel Clock Configuration Register
D1CCIPR : aliased D1CCIPR_Register;
-- RCC Domain 2 Kernel Clock Configuration Register
D2CCIP1R : aliased D2CCIP1R_Register;
-- RCC Domain 2 Kernel Clock Configuration Register
D2CCIP2R : aliased D2CCIP2R_Register;
-- RCC Domain 3 Kernel Clock Configuration Register
D3CCIPR : aliased D3CCIPR_Register;
-- RCC Clock Source Interrupt Enable Register
CIER : aliased CIER_Register;
-- RCC Clock Source Interrupt Flag Register
CIFR : aliased CIFR_Register;
-- RCC Clock Source Interrupt Clear Register
CICR : aliased CICR_Register;
-- RCC Backup Domain Control Register
BDCR : aliased BDCR_Register;
-- RCC Clock Control and Status Register
CSR : aliased CSR_Register;
-- RCC AHB3 Reset Register
AHB3RSTR : aliased AHB3RSTR_Register;
-- RCC AHB1 Peripheral Reset Register
AHB1RSTR : aliased AHB1RSTR_Register;
-- RCC AHB2 Peripheral Reset Register
AHB2RSTR : aliased AHB2RSTR_Register;
-- RCC AHB4 Peripheral Reset Register
AHB4RSTR : aliased AHB4RSTR_Register;
-- RCC APB3 Peripheral Reset Register
APB3RSTR : aliased APB3RSTR_Register;
-- RCC APB1 Peripheral Reset Register
APB1LRSTR : aliased APB1LRSTR_Register;
-- RCC APB1 Peripheral Reset Register
APB1HRSTR : aliased APB1HRSTR_Register;
-- RCC APB2 Peripheral Reset Register
APB2RSTR : aliased APB2RSTR_Register;
-- RCC APB4 Peripheral Reset Register
APB4RSTR : aliased APB4RSTR_Register;
-- RCC Global Control Register
GCR : aliased GCR_Register;
-- RCC D3 Autonomous mode Register
D3AMR : aliased D3AMR_Register;
-- RCC Reset Status Register
RSR : aliased RSR_Register;
-- RCC AHB3 Clock Register
AHB3ENR : aliased AHB3ENR_Register;
-- RCC AHB1 Clock Register
AHB1ENR : aliased AHB1ENR_Register;
-- RCC AHB2 Clock Register
AHB2ENR : aliased AHB2ENR_Register;
-- RCC AHB4 Clock Register
AHB4ENR : aliased AHB4ENR_Register;
-- RCC APB3 Clock Register
APB3ENR : aliased APB3ENR_Register;
-- RCC APB1 Clock Register
APB1LENR : aliased APB1LENR_Register;
-- RCC APB1 Clock Register
APB1HENR : aliased APB1HENR_Register;
-- RCC APB2 Clock Register
APB2ENR : aliased APB2ENR_Register;
-- RCC APB4 Clock Register
APB4ENR : aliased APB4ENR_Register;
-- RCC AHB3 Sleep Clock Register
AHB3LPENR : aliased AHB3LPENR_Register;
-- RCC AHB1 Sleep Clock Register
AHB1LPENR : aliased AHB1LPENR_Register;
-- RCC AHB2 Sleep Clock Register
AHB2LPENR : aliased AHB2LPENR_Register;
-- RCC AHB4 Sleep Clock Register
AHB4LPENR : aliased AHB4LPENR_Register;
-- RCC APB3 Sleep Clock Register
APB3LPENR : aliased APB3LPENR_Register;
-- RCC APB1 Low Sleep Clock Register
APB1LLPENR : aliased APB1LLPENR_Register;
-- RCC APB1 High Sleep Clock Register
APB1HLPENR : aliased APB1HLPENR_Register;
-- RCC APB2 Sleep Clock Register
APB2LPENR : aliased APB2LPENR_Register;
-- RCC APB4 Sleep Clock Register
APB4LPENR : aliased APB4LPENR_Register;
-- RCC Reset Status Register
C1_RSR : aliased C1_RSR_Register;
-- RCC AHB3 Clock Register
C1_AHB3ENR : aliased C1_AHB3ENR_Register;
-- RCC AHB1 Clock Register
C1_AHB1ENR : aliased C1_AHB1ENR_Register;
-- RCC AHB2 Clock Register
C1_AHB2ENR : aliased C1_AHB2ENR_Register;
-- RCC AHB4 Clock Register
C1_AHB4ENR : aliased C1_AHB4ENR_Register;
-- RCC APB3 Clock Register
C1_APB3ENR : aliased C1_APB3ENR_Register;
-- RCC APB1 Clock Register
C1_APB1LENR : aliased C1_APB1LENR_Register;
-- RCC APB1 Clock Register
C1_APB1HENR : aliased C1_APB1HENR_Register;
-- RCC APB2 Clock Register
C1_APB2ENR : aliased C1_APB2ENR_Register;
-- RCC APB4 Clock Register
C1_APB4ENR : aliased C1_APB4ENR_Register;
-- RCC AHB3 Sleep Clock Register
C1_AHB3LPENR : aliased C1_AHB3LPENR_Register;
-- RCC AHB1 Sleep Clock Register
C1_AHB1LPENR : aliased C1_AHB1LPENR_Register;
-- RCC AHB2 Sleep Clock Register
C1_AHB2LPENR : aliased C1_AHB2LPENR_Register;
-- RCC AHB4 Sleep Clock Register
C1_AHB4LPENR : aliased C1_AHB4LPENR_Register;
-- RCC APB3 Sleep Clock Register
C1_APB3LPENR : aliased C1_APB3LPENR_Register;
-- RCC APB1 Low Sleep Clock Register
C1_APB1LLPENR : aliased C1_APB1LLPENR_Register;
-- RCC APB1 High Sleep Clock Register
C1_APB1HLPENR : aliased C1_APB1HLPENR_Register;
-- RCC APB2 Sleep Clock Register
C1_APB2LPENR : aliased C1_APB2LPENR_Register;
-- RCC APB4 Sleep Clock Register
C1_APB4LPENR : aliased C1_APB4LPENR_Register;
end record
with Volatile;
for RCC_Peripheral use record
CR at 16#0# range 0 .. 31;
ICSCR at 16#4# range 0 .. 31;
CRRCR at 16#8# range 0 .. 31;
CFGR at 16#10# range 0 .. 31;
D1CFGR at 16#18# range 0 .. 31;
D2CFGR at 16#1C# range 0 .. 31;
D3CFGR at 16#20# range 0 .. 31;
PLLCKSELR at 16#28# range 0 .. 31;
PLLCFGR at 16#2C# range 0 .. 31;
PLL1DIVR at 16#30# range 0 .. 31;
PLL1FRACR at 16#34# range 0 .. 31;
PLL2DIVR at 16#38# range 0 .. 31;
PLL2FRACR at 16#3C# range 0 .. 31;
PLL3DIVR at 16#40# range 0 .. 31;
PLL3FRACR at 16#44# range 0 .. 31;
D1CCIPR at 16#4C# range 0 .. 31;
D2CCIP1R at 16#50# range 0 .. 31;
D2CCIP2R at 16#54# range 0 .. 31;
D3CCIPR at 16#58# range 0 .. 31;
CIER at 16#60# range 0 .. 31;
CIFR at 16#64# range 0 .. 31;
CICR at 16#68# range 0 .. 31;
BDCR at 16#70# range 0 .. 31;
CSR at 16#74# range 0 .. 31;
AHB3RSTR at 16#7C# range 0 .. 31;
AHB1RSTR at 16#80# range 0 .. 31;
AHB2RSTR at 16#84# range 0 .. 31;
AHB4RSTR at 16#88# range 0 .. 31;
APB3RSTR at 16#8C# range 0 .. 31;
APB1LRSTR at 16#90# range 0 .. 31;
APB1HRSTR at 16#94# range 0 .. 31;
APB2RSTR at 16#98# range 0 .. 31;
APB4RSTR at 16#9C# range 0 .. 31;
GCR at 16#A0# range 0 .. 31;
D3AMR at 16#A8# range 0 .. 31;
RSR at 16#D0# range 0 .. 31;
AHB3ENR at 16#D4# range 0 .. 31;
AHB1ENR at 16#D8# range 0 .. 31;
AHB2ENR at 16#DC# range 0 .. 31;
AHB4ENR at 16#E0# range 0 .. 31;
APB3ENR at 16#E4# range 0 .. 31;
APB1LENR at 16#E8# range 0 .. 31;
APB1HENR at 16#EC# range 0 .. 31;
APB2ENR at 16#F0# range 0 .. 31;
APB4ENR at 16#F4# range 0 .. 31;
AHB3LPENR at 16#FC# range 0 .. 31;
AHB1LPENR at 16#100# range 0 .. 31;
AHB2LPENR at 16#104# range 0 .. 31;
AHB4LPENR at 16#108# range 0 .. 31;
APB3LPENR at 16#10C# range 0 .. 31;
APB1LLPENR at 16#110# range 0 .. 31;
APB1HLPENR at 16#114# range 0 .. 31;
APB2LPENR at 16#118# range 0 .. 31;
APB4LPENR at 16#11C# range 0 .. 31;
C1_RSR at 16#130# range 0 .. 31;
C1_AHB3ENR at 16#134# range 0 .. 31;
C1_AHB1ENR at 16#138# range 0 .. 31;
C1_AHB2ENR at 16#13C# range 0 .. 31;
C1_AHB4ENR at 16#140# range 0 .. 31;
C1_APB3ENR at 16#144# range 0 .. 31;
C1_APB1LENR at 16#148# range 0 .. 31;
C1_APB1HENR at 16#14C# range 0 .. 31;
C1_APB2ENR at 16#150# range 0 .. 31;
C1_APB4ENR at 16#154# range 0 .. 31;
C1_AHB3LPENR at 16#15C# range 0 .. 31;
C1_AHB1LPENR at 16#160# range 0 .. 31;
C1_AHB2LPENR at 16#164# range 0 .. 31;
C1_AHB4LPENR at 16#168# range 0 .. 31;
C1_APB3LPENR at 16#16C# range 0 .. 31;
C1_APB1LLPENR at 16#170# range 0 .. 31;
C1_APB1HLPENR at 16#174# range 0 .. 31;
C1_APB2LPENR at 16#178# range 0 .. 31;
C1_APB4LPENR at 16#17C# range 0 .. 31;
end record;
-- Reset and clock control
RCC_Periph : aliased RCC_Peripheral
with Import, Address => RCC_Base;
end Interfaces.STM32.RCC;
|
kernel.asm | neha45556/cs153_lab3 | 0 | 6416 |
kernel: file format elf32-i386
Disassembly of section .text:
80100000 <multiboot_header>:
80100000: 02 b0 ad 1b 00 00 add 0x1bad(%eax),%dh
80100006: 00 00 add %al,(%eax)
80100008: fe 4f 52 decb 0x52(%edi)
8010000b: e4 .byte 0xe4
8010000c <entry>:
# Entering xv6 on boot processor, with paging off.
.globl entry
entry:
# Turn on page size extension for 4Mbyte pages
movl %cr4, %eax
8010000c: 0f 20 e0 mov %cr4,%eax
orl $(CR4_PSE), %eax
8010000f: 83 c8 10 or $0x10,%eax
movl %eax, %cr4
80100012: 0f 22 e0 mov %eax,%cr4
# Set page directory
movl $(V2P_WO(entrypgdir)), %eax
80100015: b8 00 90 10 00 mov $0x109000,%eax
movl %eax, %cr3
8010001a: 0f 22 d8 mov %eax,%cr3
# Turn on paging.
movl %cr0, %eax
8010001d: 0f 20 c0 mov %cr0,%eax
orl $(CR0_PG|CR0_WP), %eax
80100020: 0d 00 00 01 80 or $0x80010000,%eax
movl %eax, %cr0
80100025: 0f 22 c0 mov %eax,%cr0
# Set up the stack pointer.
movl $(stack + KSTACKSIZE), %esp
80100028: bc c0 b5 10 80 mov $0x8010b5c0,%esp
# Jump to main(), and switch to executing at
# high addresses. The indirect call is needed because
# the assembler produces a PC-relative instruction
# for a direct jump.
mov $main, %eax
8010002d: b8 f0 2d 10 80 mov $0x80102df0,%eax
jmp *%eax
80100032: ff e0 jmp *%eax
80100034: 66 90 xchg %ax,%ax
80100036: 66 90 xchg %ax,%ax
80100038: 66 90 xchg %ax,%ax
8010003a: 66 90 xchg %ax,%ax
8010003c: 66 90 xchg %ax,%ax
8010003e: 66 90 xchg %ax,%ax
80100040 <binit>:
struct buf head;
} bcache;
void
binit(void)
{
80100040: 55 push %ebp
80100041: 89 e5 mov %esp,%ebp
80100043: 53 push %ebx
//PAGEBREAK!
// Create linked list of buffers
bcache.head.prev = &bcache.head;
bcache.head.next = &bcache.head;
for(b = bcache.buf; b < bcache.buf+NBUF; b++){
80100044: bb f4 b5 10 80 mov $0x8010b5f4,%ebx
{
80100049: 83 ec 14 sub $0x14,%esp
initlock(&bcache.lock, "bcache");
8010004c: c7 44 24 04 60 6e 10 movl $0x80106e60,0x4(%esp)
80100053: 80
80100054: c7 04 24 c0 b5 10 80 movl $0x8010b5c0,(%esp)
8010005b: e8 f0 3f 00 00 call 80104050 <initlock>
bcache.head.next = &bcache.head;
80100060: ba bc fc 10 80 mov $0x8010fcbc,%edx
bcache.head.prev = &bcache.head;
80100065: c7 05 0c fd 10 80 bc movl $0x8010fcbc,0x8010fd0c
8010006c: fc 10 80
bcache.head.next = &bcache.head;
8010006f: c7 05 10 fd 10 80 bc movl $0x8010fcbc,0x8010fd10
80100076: fc 10 80
80100079: eb 09 jmp 80100084 <binit+0x44>
8010007b: 90 nop
8010007c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80100080: 89 da mov %ebx,%edx
for(b = bcache.buf; b < bcache.buf+NBUF; b++){
80100082: 89 c3 mov %eax,%ebx
80100084: 8d 43 0c lea 0xc(%ebx),%eax
b->next = bcache.head.next;
80100087: 89 53 54 mov %edx,0x54(%ebx)
b->prev = &bcache.head;
8010008a: c7 43 50 bc fc 10 80 movl $0x8010fcbc,0x50(%ebx)
initsleeplock(&b->lock, "buffer");
80100091: 89 04 24 mov %eax,(%esp)
80100094: c7 44 24 04 67 6e 10 movl $0x80106e67,0x4(%esp)
8010009b: 80
8010009c: e8 9f 3e 00 00 call 80103f40 <initsleeplock>
bcache.head.next->prev = b;
801000a1: a1 10 fd 10 80 mov 0x8010fd10,%eax
801000a6: 89 58 50 mov %ebx,0x50(%eax)
for(b = bcache.buf; b < bcache.buf+NBUF; b++){
801000a9: 8d 83 5c 02 00 00 lea 0x25c(%ebx),%eax
801000af: 3d bc fc 10 80 cmp $0x8010fcbc,%eax
bcache.head.next = b;
801000b4: 89 1d 10 fd 10 80 mov %ebx,0x8010fd10
for(b = bcache.buf; b < bcache.buf+NBUF; b++){
801000ba: 75 c4 jne 80100080 <binit+0x40>
}
}
801000bc: 83 c4 14 add $0x14,%esp
801000bf: 5b pop %ebx
801000c0: 5d pop %ebp
801000c1: c3 ret
801000c2: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
801000c9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801000d0 <bread>:
}
// Return a locked buf with the contents of the indicated block.
struct buf*
bread(uint dev, uint blockno)
{
801000d0: 55 push %ebp
801000d1: 89 e5 mov %esp,%ebp
801000d3: 57 push %edi
801000d4: 56 push %esi
801000d5: 53 push %ebx
801000d6: 83 ec 1c sub $0x1c,%esp
801000d9: 8b 75 08 mov 0x8(%ebp),%esi
acquire(&bcache.lock);
801000dc: c7 04 24 c0 b5 10 80 movl $0x8010b5c0,(%esp)
{
801000e3: 8b 7d 0c mov 0xc(%ebp),%edi
acquire(&bcache.lock);
801000e6: e8 55 40 00 00 call 80104140 <acquire>
for(b = bcache.head.next; b != &bcache.head; b = b->next){
801000eb: 8b 1d 10 fd 10 80 mov 0x8010fd10,%ebx
801000f1: 81 fb bc fc 10 80 cmp $0x8010fcbc,%ebx
801000f7: 75 12 jne 8010010b <bread+0x3b>
801000f9: eb 25 jmp 80100120 <bread+0x50>
801000fb: 90 nop
801000fc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80100100: 8b 5b 54 mov 0x54(%ebx),%ebx
80100103: 81 fb bc fc 10 80 cmp $0x8010fcbc,%ebx
80100109: 74 15 je 80100120 <bread+0x50>
if(b->dev == dev && b->blockno == blockno){
8010010b: 3b 73 04 cmp 0x4(%ebx),%esi
8010010e: 75 f0 jne 80100100 <bread+0x30>
80100110: 3b 7b 08 cmp 0x8(%ebx),%edi
80100113: 75 eb jne 80100100 <bread+0x30>
b->refcnt++;
80100115: 83 43 4c 01 addl $0x1,0x4c(%ebx)
80100119: eb 3f jmp 8010015a <bread+0x8a>
8010011b: 90 nop
8010011c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
for(b = bcache.head.prev; b != &bcache.head; b = b->prev){
80100120: 8b 1d 0c fd 10 80 mov 0x8010fd0c,%ebx
80100126: 81 fb bc fc 10 80 cmp $0x8010fcbc,%ebx
8010012c: 75 0d jne 8010013b <bread+0x6b>
8010012e: eb 58 jmp 80100188 <bread+0xb8>
80100130: 8b 5b 50 mov 0x50(%ebx),%ebx
80100133: 81 fb bc fc 10 80 cmp $0x8010fcbc,%ebx
80100139: 74 4d je 80100188 <bread+0xb8>
if(b->refcnt == 0 && (b->flags & B_DIRTY) == 0) {
8010013b: 8b 43 4c mov 0x4c(%ebx),%eax
8010013e: 85 c0 test %eax,%eax
80100140: 75 ee jne 80100130 <bread+0x60>
80100142: f6 03 04 testb $0x4,(%ebx)
80100145: 75 e9 jne 80100130 <bread+0x60>
b->dev = dev;
80100147: 89 73 04 mov %esi,0x4(%ebx)
b->blockno = blockno;
8010014a: 89 7b 08 mov %edi,0x8(%ebx)
b->flags = 0;
8010014d: c7 03 00 00 00 00 movl $0x0,(%ebx)
b->refcnt = 1;
80100153: c7 43 4c 01 00 00 00 movl $0x1,0x4c(%ebx)
release(&bcache.lock);
8010015a: c7 04 24 c0 b5 10 80 movl $0x8010b5c0,(%esp)
80100161: e8 ca 40 00 00 call 80104230 <release>
acquiresleep(&b->lock);
80100166: 8d 43 0c lea 0xc(%ebx),%eax
80100169: 89 04 24 mov %eax,(%esp)
8010016c: e8 0f 3e 00 00 call 80103f80 <acquiresleep>
struct buf *b;
b = bget(dev, blockno);
if((b->flags & B_VALID) == 0) {
80100171: f6 03 02 testb $0x2,(%ebx)
80100174: 75 08 jne 8010017e <bread+0xae>
iderw(b);
80100176: 89 1c 24 mov %ebx,(%esp)
80100179: e8 a2 1f 00 00 call 80102120 <iderw>
}
return b;
}
8010017e: 83 c4 1c add $0x1c,%esp
80100181: 89 d8 mov %ebx,%eax
80100183: 5b pop %ebx
80100184: 5e pop %esi
80100185: 5f pop %edi
80100186: 5d pop %ebp
80100187: c3 ret
panic("bget: no buffers");
80100188: c7 04 24 6e 6e 10 80 movl $0x80106e6e,(%esp)
8010018f: e8 cc 01 00 00 call 80100360 <panic>
80100194: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
8010019a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
801001a0 <bwrite>:
// Write b's contents to disk. Must be locked.
void
bwrite(struct buf *b)
{
801001a0: 55 push %ebp
801001a1: 89 e5 mov %esp,%ebp
801001a3: 53 push %ebx
801001a4: 83 ec 14 sub $0x14,%esp
801001a7: 8b 5d 08 mov 0x8(%ebp),%ebx
if(!holdingsleep(&b->lock))
801001aa: 8d 43 0c lea 0xc(%ebx),%eax
801001ad: 89 04 24 mov %eax,(%esp)
801001b0: e8 6b 3e 00 00 call 80104020 <holdingsleep>
801001b5: 85 c0 test %eax,%eax
801001b7: 74 10 je 801001c9 <bwrite+0x29>
panic("bwrite");
b->flags |= B_DIRTY;
801001b9: 83 0b 04 orl $0x4,(%ebx)
iderw(b);
801001bc: 89 5d 08 mov %ebx,0x8(%ebp)
}
801001bf: 83 c4 14 add $0x14,%esp
801001c2: 5b pop %ebx
801001c3: 5d pop %ebp
iderw(b);
801001c4: e9 57 1f 00 00 jmp 80102120 <iderw>
panic("bwrite");
801001c9: c7 04 24 7f 6e 10 80 movl $0x80106e7f,(%esp)
801001d0: e8 8b 01 00 00 call 80100360 <panic>
801001d5: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801001d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801001e0 <brelse>:
// Release a locked buffer.
// Move to the head of the MRU list.
void
brelse(struct buf *b)
{
801001e0: 55 push %ebp
801001e1: 89 e5 mov %esp,%ebp
801001e3: 56 push %esi
801001e4: 53 push %ebx
801001e5: 83 ec 10 sub $0x10,%esp
801001e8: 8b 5d 08 mov 0x8(%ebp),%ebx
if(!holdingsleep(&b->lock))
801001eb: 8d 73 0c lea 0xc(%ebx),%esi
801001ee: 89 34 24 mov %esi,(%esp)
801001f1: e8 2a 3e 00 00 call 80104020 <holdingsleep>
801001f6: 85 c0 test %eax,%eax
801001f8: 74 5b je 80100255 <brelse+0x75>
panic("brelse");
releasesleep(&b->lock);
801001fa: 89 34 24 mov %esi,(%esp)
801001fd: e8 de 3d 00 00 call 80103fe0 <releasesleep>
acquire(&bcache.lock);
80100202: c7 04 24 c0 b5 10 80 movl $0x8010b5c0,(%esp)
80100209: e8 32 3f 00 00 call 80104140 <acquire>
b->refcnt--;
if (b->refcnt == 0) {
8010020e: 83 6b 4c 01 subl $0x1,0x4c(%ebx)
80100212: 75 2f jne 80100243 <brelse+0x63>
// no one is waiting for it.
b->next->prev = b->prev;
80100214: 8b 43 54 mov 0x54(%ebx),%eax
80100217: 8b 53 50 mov 0x50(%ebx),%edx
8010021a: 89 50 50 mov %edx,0x50(%eax)
b->prev->next = b->next;
8010021d: 8b 43 50 mov 0x50(%ebx),%eax
80100220: 8b 53 54 mov 0x54(%ebx),%edx
80100223: 89 50 54 mov %edx,0x54(%eax)
b->next = bcache.head.next;
80100226: a1 10 fd 10 80 mov 0x8010fd10,%eax
b->prev = &bcache.head;
8010022b: c7 43 50 bc fc 10 80 movl $0x8010fcbc,0x50(%ebx)
b->next = bcache.head.next;
80100232: 89 43 54 mov %eax,0x54(%ebx)
bcache.head.next->prev = b;
80100235: a1 10 fd 10 80 mov 0x8010fd10,%eax
8010023a: 89 58 50 mov %ebx,0x50(%eax)
bcache.head.next = b;
8010023d: 89 1d 10 fd 10 80 mov %ebx,0x8010fd10
}
release(&bcache.lock);
80100243: c7 45 08 c0 b5 10 80 movl $0x8010b5c0,0x8(%ebp)
}
8010024a: 83 c4 10 add $0x10,%esp
8010024d: 5b pop %ebx
8010024e: 5e pop %esi
8010024f: 5d pop %ebp
release(&bcache.lock);
80100250: e9 db 3f 00 00 jmp 80104230 <release>
panic("brelse");
80100255: c7 04 24 86 6e 10 80 movl $0x80106e86,(%esp)
8010025c: e8 ff 00 00 00 call 80100360 <panic>
80100261: 66 90 xchg %ax,%ax
80100263: 66 90 xchg %ax,%ax
80100265: 66 90 xchg %ax,%ax
80100267: 66 90 xchg %ax,%ax
80100269: 66 90 xchg %ax,%ax
8010026b: 66 90 xchg %ax,%ax
8010026d: 66 90 xchg %ax,%ax
8010026f: 90 nop
80100270 <consoleread>:
}
}
int
consoleread(struct inode *ip, char *dst, int n)
{
80100270: 55 push %ebp
80100271: 89 e5 mov %esp,%ebp
80100273: 57 push %edi
80100274: 56 push %esi
80100275: 53 push %ebx
80100276: 83 ec 1c sub $0x1c,%esp
80100279: 8b 7d 08 mov 0x8(%ebp),%edi
8010027c: 8b 75 0c mov 0xc(%ebp),%esi
uint target;
int c;
iunlock(ip);
8010027f: 89 3c 24 mov %edi,(%esp)
80100282: e8 09 15 00 00 call 80101790 <iunlock>
target = n;
acquire(&cons.lock);
80100287: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
8010028e: e8 ad 3e 00 00 call 80104140 <acquire>
while(n > 0){
80100293: 8b 55 10 mov 0x10(%ebp),%edx
80100296: 85 d2 test %edx,%edx
80100298: 0f 8e bc 00 00 00 jle 8010035a <consoleread+0xea>
8010029e: 8b 5d 10 mov 0x10(%ebp),%ebx
801002a1: eb 25 jmp 801002c8 <consoleread+0x58>
801002a3: 90 nop
801002a4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
while(input.r == input.w){
if(myproc()->killed){
801002a8: e8 f3 33 00 00 call 801036a0 <myproc>
801002ad: 8b 40 28 mov 0x28(%eax),%eax
801002b0: 85 c0 test %eax,%eax
801002b2: 75 74 jne 80100328 <consoleread+0xb8>
release(&cons.lock);
ilock(ip);
return -1;
}
sleep(&input.r, &cons.lock);
801002b4: c7 44 24 04 20 a5 10 movl $0x8010a520,0x4(%esp)
801002bb: 80
801002bc: c7 04 24 a0 ff 10 80 movl $0x8010ffa0,(%esp)
801002c3: e8 38 39 00 00 call 80103c00 <sleep>
while(input.r == input.w){
801002c8: a1 a0 ff 10 80 mov 0x8010ffa0,%eax
801002cd: 3b 05 a4 ff 10 80 cmp 0x8010ffa4,%eax
801002d3: 74 d3 je 801002a8 <consoleread+0x38>
}
c = input.buf[input.r++ % INPUT_BUF];
801002d5: 8d 50 01 lea 0x1(%eax),%edx
801002d8: 89 15 a0 ff 10 80 mov %edx,0x8010ffa0
801002de: 89 c2 mov %eax,%edx
801002e0: 83 e2 7f and $0x7f,%edx
801002e3: 0f b6 8a 20 ff 10 80 movzbl -0x7fef00e0(%edx),%ecx
801002ea: 0f be d1 movsbl %cl,%edx
if(c == C('D')){ // EOF
801002ed: 83 fa 04 cmp $0x4,%edx
801002f0: 74 57 je 80100349 <consoleread+0xd9>
// caller gets a 0-byte result.
input.r--;
}
break;
}
*dst++ = c;
801002f2: 83 c6 01 add $0x1,%esi
--n;
801002f5: 83 eb 01 sub $0x1,%ebx
if(c == '\n')
801002f8: 83 fa 0a cmp $0xa,%edx
*dst++ = c;
801002fb: 88 4e ff mov %cl,-0x1(%esi)
if(c == '\n')
801002fe: 74 53 je 80100353 <consoleread+0xe3>
while(n > 0){
80100300: 85 db test %ebx,%ebx
80100302: 75 c4 jne 801002c8 <consoleread+0x58>
80100304: 8b 45 10 mov 0x10(%ebp),%eax
break;
}
release(&cons.lock);
80100307: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
8010030e: 89 45 e4 mov %eax,-0x1c(%ebp)
80100311: e8 1a 3f 00 00 call 80104230 <release>
ilock(ip);
80100316: 89 3c 24 mov %edi,(%esp)
80100319: e8 92 13 00 00 call 801016b0 <ilock>
8010031e: 8b 45 e4 mov -0x1c(%ebp),%eax
return target - n;
80100321: eb 1e jmp 80100341 <consoleread+0xd1>
80100323: 90 nop
80100324: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
release(&cons.lock);
80100328: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
8010032f: e8 fc 3e 00 00 call 80104230 <release>
ilock(ip);
80100334: 89 3c 24 mov %edi,(%esp)
80100337: e8 74 13 00 00 call 801016b0 <ilock>
return -1;
8010033c: b8 ff ff ff ff mov $0xffffffff,%eax
}
80100341: 83 c4 1c add $0x1c,%esp
80100344: 5b pop %ebx
80100345: 5e pop %esi
80100346: 5f pop %edi
80100347: 5d pop %ebp
80100348: c3 ret
if(n < target){
80100349: 39 5d 10 cmp %ebx,0x10(%ebp)
8010034c: 76 05 jbe 80100353 <consoleread+0xe3>
input.r--;
8010034e: a3 a0 ff 10 80 mov %eax,0x8010ffa0
80100353: 8b 45 10 mov 0x10(%ebp),%eax
80100356: 29 d8 sub %ebx,%eax
80100358: eb ad jmp 80100307 <consoleread+0x97>
while(n > 0){
8010035a: 31 c0 xor %eax,%eax
8010035c: eb a9 jmp 80100307 <consoleread+0x97>
8010035e: 66 90 xchg %ax,%ax
80100360 <panic>:
{
80100360: 55 push %ebp
80100361: 89 e5 mov %esp,%ebp
80100363: 56 push %esi
80100364: 53 push %ebx
80100365: 83 ec 40 sub $0x40,%esp
}
static inline void
cli(void)
{
asm volatile("cli");
80100368: fa cli
cons.locking = 0;
80100369: c7 05 54 a5 10 80 00 movl $0x0,0x8010a554
80100370: 00 00 00
getcallerpcs(&s, pcs);
80100373: 8d 5d d0 lea -0x30(%ebp),%ebx
cprintf("lapicid %d: panic: ", lapicid());
80100376: e8 e5 23 00 00 call 80102760 <lapicid>
8010037b: 8d 75 f8 lea -0x8(%ebp),%esi
8010037e: c7 04 24 8d 6e 10 80 movl $0x80106e8d,(%esp)
80100385: 89 44 24 04 mov %eax,0x4(%esp)
80100389: e8 c2 02 00 00 call 80100650 <cprintf>
cprintf(s);
8010038e: 8b 45 08 mov 0x8(%ebp),%eax
80100391: 89 04 24 mov %eax,(%esp)
80100394: e8 b7 02 00 00 call 80100650 <cprintf>
cprintf("\n");
80100399: c7 04 24 eb 78 10 80 movl $0x801078eb,(%esp)
801003a0: e8 ab 02 00 00 call 80100650 <cprintf>
getcallerpcs(&s, pcs);
801003a5: 8d 45 08 lea 0x8(%ebp),%eax
801003a8: 89 5c 24 04 mov %ebx,0x4(%esp)
801003ac: 89 04 24 mov %eax,(%esp)
801003af: e8 bc 3c 00 00 call 80104070 <getcallerpcs>
801003b4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
cprintf(" %p", pcs[i]);
801003b8: 8b 03 mov (%ebx),%eax
801003ba: 83 c3 04 add $0x4,%ebx
801003bd: c7 04 24 a1 6e 10 80 movl $0x80106ea1,(%esp)
801003c4: 89 44 24 04 mov %eax,0x4(%esp)
801003c8: e8 83 02 00 00 call 80100650 <cprintf>
for(i=0; i<10; i++)
801003cd: 39 f3 cmp %esi,%ebx
801003cf: 75 e7 jne 801003b8 <panic+0x58>
panicked = 1; // freeze other CPU
801003d1: c7 05 58 a5 10 80 01 movl $0x1,0x8010a558
801003d8: 00 00 00
801003db: eb fe jmp 801003db <panic+0x7b>
801003dd: 8d 76 00 lea 0x0(%esi),%esi
801003e0 <consputc>:
if(panicked){
801003e0: 8b 15 58 a5 10 80 mov 0x8010a558,%edx
801003e6: 85 d2 test %edx,%edx
801003e8: 74 06 je 801003f0 <consputc+0x10>
801003ea: fa cli
801003eb: eb fe jmp 801003eb <consputc+0xb>
801003ed: 8d 76 00 lea 0x0(%esi),%esi
{
801003f0: 55 push %ebp
801003f1: 89 e5 mov %esp,%ebp
801003f3: 57 push %edi
801003f4: 56 push %esi
801003f5: 53 push %ebx
801003f6: 89 c3 mov %eax,%ebx
801003f8: 83 ec 1c sub $0x1c,%esp
if(c == BACKSPACE){
801003fb: 3d 00 01 00 00 cmp $0x100,%eax
80100400: 0f 84 ac 00 00 00 je 801004b2 <consputc+0xd2>
uartputc(c);
80100406: 89 04 24 mov %eax,(%esp)
80100409: e8 52 54 00 00 call 80105860 <uartputc>
asm volatile("out %0,%1" : : "a" (data), "d" (port));
8010040e: bf d4 03 00 00 mov $0x3d4,%edi
80100413: b8 0e 00 00 00 mov $0xe,%eax
80100418: 89 fa mov %edi,%edx
8010041a: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
8010041b: be d5 03 00 00 mov $0x3d5,%esi
80100420: 89 f2 mov %esi,%edx
80100422: ec in (%dx),%al
pos = inb(CRTPORT+1) << 8;
80100423: 0f b6 c8 movzbl %al,%ecx
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80100426: 89 fa mov %edi,%edx
80100428: c1 e1 08 shl $0x8,%ecx
8010042b: b8 0f 00 00 00 mov $0xf,%eax
80100430: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80100431: 89 f2 mov %esi,%edx
80100433: ec in (%dx),%al
pos |= inb(CRTPORT+1);
80100434: 0f b6 c0 movzbl %al,%eax
80100437: 09 c1 or %eax,%ecx
if(c == '\n')
80100439: 83 fb 0a cmp $0xa,%ebx
8010043c: 0f 84 0d 01 00 00 je 8010054f <consputc+0x16f>
else if(c == BACKSPACE){
80100442: 81 fb 00 01 00 00 cmp $0x100,%ebx
80100448: 0f 84 e8 00 00 00 je 80100536 <consputc+0x156>
crt[pos++] = (c&0xff) | 0x0700; // black on white
8010044e: 0f b6 db movzbl %bl,%ebx
80100451: 80 cf 07 or $0x7,%bh
80100454: 8d 79 01 lea 0x1(%ecx),%edi
80100457: 66 89 9c 09 00 80 0b mov %bx,-0x7ff48000(%ecx,%ecx,1)
8010045e: 80
if(pos < 0 || pos > 25*80)
8010045f: 81 ff d0 07 00 00 cmp $0x7d0,%edi
80100465: 0f 87 bf 00 00 00 ja 8010052a <consputc+0x14a>
if((pos/80) >= 24){ // Scroll up.
8010046b: 81 ff 7f 07 00 00 cmp $0x77f,%edi
80100471: 7f 68 jg 801004db <consputc+0xfb>
80100473: 89 f8 mov %edi,%eax
80100475: 89 fb mov %edi,%ebx
80100477: c1 e8 08 shr $0x8,%eax
8010047a: 89 c6 mov %eax,%esi
8010047c: 8d 8c 3f 00 80 0b 80 lea -0x7ff48000(%edi,%edi,1),%ecx
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80100483: bf d4 03 00 00 mov $0x3d4,%edi
80100488: b8 0e 00 00 00 mov $0xe,%eax
8010048d: 89 fa mov %edi,%edx
8010048f: ee out %al,(%dx)
80100490: 89 f0 mov %esi,%eax
80100492: b2 d5 mov $0xd5,%dl
80100494: ee out %al,(%dx)
80100495: b8 0f 00 00 00 mov $0xf,%eax
8010049a: 89 fa mov %edi,%edx
8010049c: ee out %al,(%dx)
8010049d: 89 d8 mov %ebx,%eax
8010049f: b2 d5 mov $0xd5,%dl
801004a1: ee out %al,(%dx)
crt[pos] = ' ' | 0x0700;
801004a2: b8 20 07 00 00 mov $0x720,%eax
801004a7: 66 89 01 mov %ax,(%ecx)
}
801004aa: 83 c4 1c add $0x1c,%esp
801004ad: 5b pop %ebx
801004ae: 5e pop %esi
801004af: 5f pop %edi
801004b0: 5d pop %ebp
801004b1: c3 ret
uartputc('\b'); uartputc(' '); uartputc('\b');
801004b2: c7 04 24 08 00 00 00 movl $0x8,(%esp)
801004b9: e8 a2 53 00 00 call 80105860 <uartputc>
801004be: c7 04 24 20 00 00 00 movl $0x20,(%esp)
801004c5: e8 96 53 00 00 call 80105860 <uartputc>
801004ca: c7 04 24 08 00 00 00 movl $0x8,(%esp)
801004d1: e8 8a 53 00 00 call 80105860 <uartputc>
801004d6: e9 33 ff ff ff jmp 8010040e <consputc+0x2e>
memmove(crt, crt+80, sizeof(crt[0])*23*80);
801004db: c7 44 24 08 60 0e 00 movl $0xe60,0x8(%esp)
801004e2: 00
pos -= 80;
801004e3: 8d 5f b0 lea -0x50(%edi),%ebx
memmove(crt, crt+80, sizeof(crt[0])*23*80);
801004e6: c7 44 24 04 a0 80 0b movl $0x800b80a0,0x4(%esp)
801004ed: 80
memset(crt+pos, 0, sizeof(crt[0])*(24*80 - pos));
801004ee: 8d b4 1b 00 80 0b 80 lea -0x7ff48000(%ebx,%ebx,1),%esi
memmove(crt, crt+80, sizeof(crt[0])*23*80);
801004f5: c7 04 24 00 80 0b 80 movl $0x800b8000,(%esp)
801004fc: e8 1f 3e 00 00 call 80104320 <memmove>
memset(crt+pos, 0, sizeof(crt[0])*(24*80 - pos));
80100501: b8 d0 07 00 00 mov $0x7d0,%eax
80100506: 29 f8 sub %edi,%eax
80100508: 01 c0 add %eax,%eax
8010050a: 89 34 24 mov %esi,(%esp)
8010050d: 89 44 24 08 mov %eax,0x8(%esp)
80100511: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80100518: 00
80100519: e8 62 3d 00 00 call 80104280 <memset>
8010051e: 89 f1 mov %esi,%ecx
80100520: be 07 00 00 00 mov $0x7,%esi
80100525: e9 59 ff ff ff jmp 80100483 <consputc+0xa3>
panic("pos under/overflow");
8010052a: c7 04 24 a5 6e 10 80 movl $0x80106ea5,(%esp)
80100531: e8 2a fe ff ff call 80100360 <panic>
if(pos > 0) --pos;
80100536: 85 c9 test %ecx,%ecx
80100538: 8d 79 ff lea -0x1(%ecx),%edi
8010053b: 0f 85 1e ff ff ff jne 8010045f <consputc+0x7f>
80100541: b9 00 80 0b 80 mov $0x800b8000,%ecx
80100546: 31 db xor %ebx,%ebx
80100548: 31 f6 xor %esi,%esi
8010054a: e9 34 ff ff ff jmp 80100483 <consputc+0xa3>
pos += 80 - pos%80;
8010054f: 89 c8 mov %ecx,%eax
80100551: ba 67 66 66 66 mov $0x66666667,%edx
80100556: f7 ea imul %edx
80100558: c1 ea 05 shr $0x5,%edx
8010055b: 8d 04 92 lea (%edx,%edx,4),%eax
8010055e: c1 e0 04 shl $0x4,%eax
80100561: 8d 78 50 lea 0x50(%eax),%edi
80100564: e9 f6 fe ff ff jmp 8010045f <consputc+0x7f>
80100569: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80100570 <printint>:
{
80100570: 55 push %ebp
80100571: 89 e5 mov %esp,%ebp
80100573: 57 push %edi
80100574: 56 push %esi
80100575: 89 d6 mov %edx,%esi
80100577: 53 push %ebx
80100578: 83 ec 1c sub $0x1c,%esp
if(sign && (sign = xx < 0))
8010057b: 85 c9 test %ecx,%ecx
8010057d: 74 61 je 801005e0 <printint+0x70>
8010057f: 85 c0 test %eax,%eax
80100581: 79 5d jns 801005e0 <printint+0x70>
x = -xx;
80100583: f7 d8 neg %eax
80100585: bf 01 00 00 00 mov $0x1,%edi
i = 0;
8010058a: 31 c9 xor %ecx,%ecx
8010058c: eb 04 jmp 80100592 <printint+0x22>
8010058e: 66 90 xchg %ax,%ax
buf[i++] = digits[x % base];
80100590: 89 d9 mov %ebx,%ecx
80100592: 31 d2 xor %edx,%edx
80100594: f7 f6 div %esi
80100596: 8d 59 01 lea 0x1(%ecx),%ebx
80100599: 0f b6 92 d0 6e 10 80 movzbl -0x7fef9130(%edx),%edx
}while((x /= base) != 0);
801005a0: 85 c0 test %eax,%eax
buf[i++] = digits[x % base];
801005a2: 88 54 1d d7 mov %dl,-0x29(%ebp,%ebx,1)
}while((x /= base) != 0);
801005a6: 75 e8 jne 80100590 <printint+0x20>
if(sign)
801005a8: 85 ff test %edi,%edi
buf[i++] = digits[x % base];
801005aa: 89 d8 mov %ebx,%eax
if(sign)
801005ac: 74 08 je 801005b6 <printint+0x46>
buf[i++] = '-';
801005ae: 8d 59 02 lea 0x2(%ecx),%ebx
801005b1: c6 44 05 d8 2d movb $0x2d,-0x28(%ebp,%eax,1)
while(--i >= 0)
801005b6: 83 eb 01 sub $0x1,%ebx
801005b9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
consputc(buf[i]);
801005c0: 0f be 44 1d d8 movsbl -0x28(%ebp,%ebx,1),%eax
while(--i >= 0)
801005c5: 83 eb 01 sub $0x1,%ebx
consputc(buf[i]);
801005c8: e8 13 fe ff ff call 801003e0 <consputc>
while(--i >= 0)
801005cd: 83 fb ff cmp $0xffffffff,%ebx
801005d0: 75 ee jne 801005c0 <printint+0x50>
}
801005d2: 83 c4 1c add $0x1c,%esp
801005d5: 5b pop %ebx
801005d6: 5e pop %esi
801005d7: 5f pop %edi
801005d8: 5d pop %ebp
801005d9: c3 ret
801005da: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
x = xx;
801005e0: 31 ff xor %edi,%edi
801005e2: eb a6 jmp 8010058a <printint+0x1a>
801005e4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801005ea: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
801005f0 <consolewrite>:
int
consolewrite(struct inode *ip, char *buf, int n)
{
801005f0: 55 push %ebp
801005f1: 89 e5 mov %esp,%ebp
801005f3: 57 push %edi
801005f4: 56 push %esi
801005f5: 53 push %ebx
801005f6: 83 ec 1c sub $0x1c,%esp
int i;
iunlock(ip);
801005f9: 8b 45 08 mov 0x8(%ebp),%eax
{
801005fc: 8b 75 10 mov 0x10(%ebp),%esi
iunlock(ip);
801005ff: 89 04 24 mov %eax,(%esp)
80100602: e8 89 11 00 00 call 80101790 <iunlock>
acquire(&cons.lock);
80100607: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
8010060e: e8 2d 3b 00 00 call 80104140 <acquire>
80100613: 8b 7d 0c mov 0xc(%ebp),%edi
for(i = 0; i < n; i++)
80100616: 85 f6 test %esi,%esi
80100618: 8d 1c 37 lea (%edi,%esi,1),%ebx
8010061b: 7e 12 jle 8010062f <consolewrite+0x3f>
8010061d: 8d 76 00 lea 0x0(%esi),%esi
consputc(buf[i] & 0xff);
80100620: 0f b6 07 movzbl (%edi),%eax
80100623: 83 c7 01 add $0x1,%edi
80100626: e8 b5 fd ff ff call 801003e0 <consputc>
for(i = 0; i < n; i++)
8010062b: 39 df cmp %ebx,%edi
8010062d: 75 f1 jne 80100620 <consolewrite+0x30>
release(&cons.lock);
8010062f: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
80100636: e8 f5 3b 00 00 call 80104230 <release>
ilock(ip);
8010063b: 8b 45 08 mov 0x8(%ebp),%eax
8010063e: 89 04 24 mov %eax,(%esp)
80100641: e8 6a 10 00 00 call 801016b0 <ilock>
return n;
}
80100646: 83 c4 1c add $0x1c,%esp
80100649: 89 f0 mov %esi,%eax
8010064b: 5b pop %ebx
8010064c: 5e pop %esi
8010064d: 5f pop %edi
8010064e: 5d pop %ebp
8010064f: c3 ret
80100650 <cprintf>:
{
80100650: 55 push %ebp
80100651: 89 e5 mov %esp,%ebp
80100653: 57 push %edi
80100654: 56 push %esi
80100655: 53 push %ebx
80100656: 83 ec 1c sub $0x1c,%esp
locking = cons.locking;
80100659: a1 54 a5 10 80 mov 0x8010a554,%eax
if(locking)
8010065e: 85 c0 test %eax,%eax
locking = cons.locking;
80100660: 89 45 e0 mov %eax,-0x20(%ebp)
if(locking)
80100663: 0f 85 27 01 00 00 jne 80100790 <cprintf+0x140>
if (fmt == 0)
80100669: 8b 45 08 mov 0x8(%ebp),%eax
8010066c: 85 c0 test %eax,%eax
8010066e: 89 c1 mov %eax,%ecx
80100670: 0f 84 2b 01 00 00 je 801007a1 <cprintf+0x151>
for(i = 0; (c = fmt[i] & 0xff) != 0; i++){
80100676: 0f b6 00 movzbl (%eax),%eax
80100679: 31 db xor %ebx,%ebx
8010067b: 89 cf mov %ecx,%edi
8010067d: 8d 75 0c lea 0xc(%ebp),%esi
80100680: 85 c0 test %eax,%eax
80100682: 75 4c jne 801006d0 <cprintf+0x80>
80100684: eb 5f jmp 801006e5 <cprintf+0x95>
80100686: 66 90 xchg %ax,%ax
c = fmt[++i] & 0xff;
80100688: 83 c3 01 add $0x1,%ebx
8010068b: 0f b6 14 1f movzbl (%edi,%ebx,1),%edx
if(c == 0)
8010068f: 85 d2 test %edx,%edx
80100691: 74 52 je 801006e5 <cprintf+0x95>
switch(c){
80100693: 83 fa 70 cmp $0x70,%edx
80100696: 74 72 je 8010070a <cprintf+0xba>
80100698: 7f 66 jg 80100700 <cprintf+0xb0>
8010069a: 83 fa 25 cmp $0x25,%edx
8010069d: 8d 76 00 lea 0x0(%esi),%esi
801006a0: 0f 84 a2 00 00 00 je 80100748 <cprintf+0xf8>
801006a6: 83 fa 64 cmp $0x64,%edx
801006a9: 75 7d jne 80100728 <cprintf+0xd8>
printint(*argp++, 10, 1);
801006ab: 8d 46 04 lea 0x4(%esi),%eax
801006ae: b9 01 00 00 00 mov $0x1,%ecx
801006b3: 89 45 e4 mov %eax,-0x1c(%ebp)
801006b6: 8b 06 mov (%esi),%eax
801006b8: ba 0a 00 00 00 mov $0xa,%edx
801006bd: e8 ae fe ff ff call 80100570 <printint>
801006c2: 8b 75 e4 mov -0x1c(%ebp),%esi
for(i = 0; (c = fmt[i] & 0xff) != 0; i++){
801006c5: 83 c3 01 add $0x1,%ebx
801006c8: 0f b6 04 1f movzbl (%edi,%ebx,1),%eax
801006cc: 85 c0 test %eax,%eax
801006ce: 74 15 je 801006e5 <cprintf+0x95>
if(c != '%'){
801006d0: 83 f8 25 cmp $0x25,%eax
801006d3: 74 b3 je 80100688 <cprintf+0x38>
consputc(c);
801006d5: e8 06 fd ff ff call 801003e0 <consputc>
for(i = 0; (c = fmt[i] & 0xff) != 0; i++){
801006da: 83 c3 01 add $0x1,%ebx
801006dd: 0f b6 04 1f movzbl (%edi,%ebx,1),%eax
801006e1: 85 c0 test %eax,%eax
801006e3: 75 eb jne 801006d0 <cprintf+0x80>
if(locking)
801006e5: 8b 45 e0 mov -0x20(%ebp),%eax
801006e8: 85 c0 test %eax,%eax
801006ea: 74 0c je 801006f8 <cprintf+0xa8>
release(&cons.lock);
801006ec: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
801006f3: e8 38 3b 00 00 call 80104230 <release>
}
801006f8: 83 c4 1c add $0x1c,%esp
801006fb: 5b pop %ebx
801006fc: 5e pop %esi
801006fd: 5f pop %edi
801006fe: 5d pop %ebp
801006ff: c3 ret
switch(c){
80100700: 83 fa 73 cmp $0x73,%edx
80100703: 74 53 je 80100758 <cprintf+0x108>
80100705: 83 fa 78 cmp $0x78,%edx
80100708: 75 1e jne 80100728 <cprintf+0xd8>
printint(*argp++, 16, 0);
8010070a: 8d 46 04 lea 0x4(%esi),%eax
8010070d: 31 c9 xor %ecx,%ecx
8010070f: 89 45 e4 mov %eax,-0x1c(%ebp)
80100712: 8b 06 mov (%esi),%eax
80100714: ba 10 00 00 00 mov $0x10,%edx
80100719: e8 52 fe ff ff call 80100570 <printint>
8010071e: 8b 75 e4 mov -0x1c(%ebp),%esi
break;
80100721: eb a2 jmp 801006c5 <cprintf+0x75>
80100723: 90 nop
80100724: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
consputc('%');
80100728: b8 25 00 00 00 mov $0x25,%eax
8010072d: 89 55 e4 mov %edx,-0x1c(%ebp)
80100730: e8 ab fc ff ff call 801003e0 <consputc>
consputc(c);
80100735: 8b 55 e4 mov -0x1c(%ebp),%edx
80100738: 89 d0 mov %edx,%eax
8010073a: e8 a1 fc ff ff call 801003e0 <consputc>
8010073f: eb 99 jmp 801006da <cprintf+0x8a>
80100741: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
consputc('%');
80100748: b8 25 00 00 00 mov $0x25,%eax
8010074d: e8 8e fc ff ff call 801003e0 <consputc>
break;
80100752: e9 6e ff ff ff jmp 801006c5 <cprintf+0x75>
80100757: 90 nop
if((s = (char*)*argp++) == 0)
80100758: 8d 46 04 lea 0x4(%esi),%eax
8010075b: 8b 36 mov (%esi),%esi
8010075d: 89 45 e4 mov %eax,-0x1c(%ebp)
s = "(null)";
80100760: b8 b8 6e 10 80 mov $0x80106eb8,%eax
80100765: 85 f6 test %esi,%esi
80100767: 0f 44 f0 cmove %eax,%esi
for(; *s; s++)
8010076a: 0f be 06 movsbl (%esi),%eax
8010076d: 84 c0 test %al,%al
8010076f: 74 16 je 80100787 <cprintf+0x137>
80100771: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80100778: 83 c6 01 add $0x1,%esi
consputc(*s);
8010077b: e8 60 fc ff ff call 801003e0 <consputc>
for(; *s; s++)
80100780: 0f be 06 movsbl (%esi),%eax
80100783: 84 c0 test %al,%al
80100785: 75 f1 jne 80100778 <cprintf+0x128>
if((s = (char*)*argp++) == 0)
80100787: 8b 75 e4 mov -0x1c(%ebp),%esi
8010078a: e9 36 ff ff ff jmp 801006c5 <cprintf+0x75>
8010078f: 90 nop
acquire(&cons.lock);
80100790: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
80100797: e8 a4 39 00 00 call 80104140 <acquire>
8010079c: e9 c8 fe ff ff jmp 80100669 <cprintf+0x19>
panic("null fmt");
801007a1: c7 04 24 bf 6e 10 80 movl $0x80106ebf,(%esp)
801007a8: e8 b3 fb ff ff call 80100360 <panic>
801007ad: 8d 76 00 lea 0x0(%esi),%esi
801007b0 <consoleintr>:
{
801007b0: 55 push %ebp
801007b1: 89 e5 mov %esp,%ebp
801007b3: 57 push %edi
801007b4: 56 push %esi
int c, doprocdump = 0;
801007b5: 31 f6 xor %esi,%esi
{
801007b7: 53 push %ebx
801007b8: 83 ec 1c sub $0x1c,%esp
801007bb: 8b 5d 08 mov 0x8(%ebp),%ebx
acquire(&cons.lock);
801007be: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
801007c5: e8 76 39 00 00 call 80104140 <acquire>
801007ca: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
while((c = getc()) >= 0){
801007d0: ff d3 call *%ebx
801007d2: 85 c0 test %eax,%eax
801007d4: 89 c7 mov %eax,%edi
801007d6: 78 48 js 80100820 <consoleintr+0x70>
switch(c){
801007d8: 83 ff 10 cmp $0x10,%edi
801007db: 0f 84 2f 01 00 00 je 80100910 <consoleintr+0x160>
801007e1: 7e 5d jle 80100840 <consoleintr+0x90>
801007e3: 83 ff 15 cmp $0x15,%edi
801007e6: 0f 84 d4 00 00 00 je 801008c0 <consoleintr+0x110>
801007ec: 83 ff 7f cmp $0x7f,%edi
801007ef: 90 nop
801007f0: 75 53 jne 80100845 <consoleintr+0x95>
if(input.e != input.w){
801007f2: a1 a8 ff 10 80 mov 0x8010ffa8,%eax
801007f7: 3b 05 a4 ff 10 80 cmp 0x8010ffa4,%eax
801007fd: 74 d1 je 801007d0 <consoleintr+0x20>
input.e--;
801007ff: 83 e8 01 sub $0x1,%eax
80100802: a3 a8 ff 10 80 mov %eax,0x8010ffa8
consputc(BACKSPACE);
80100807: b8 00 01 00 00 mov $0x100,%eax
8010080c: e8 cf fb ff ff call 801003e0 <consputc>
while((c = getc()) >= 0){
80100811: ff d3 call *%ebx
80100813: 85 c0 test %eax,%eax
80100815: 89 c7 mov %eax,%edi
80100817: 79 bf jns 801007d8 <consoleintr+0x28>
80100819: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
release(&cons.lock);
80100820: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
80100827: e8 04 3a 00 00 call 80104230 <release>
if(doprocdump) {
8010082c: 85 f6 test %esi,%esi
8010082e: 0f 85 ec 00 00 00 jne 80100920 <consoleintr+0x170>
}
80100834: 83 c4 1c add $0x1c,%esp
80100837: 5b pop %ebx
80100838: 5e pop %esi
80100839: 5f pop %edi
8010083a: 5d pop %ebp
8010083b: c3 ret
8010083c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
switch(c){
80100840: 83 ff 08 cmp $0x8,%edi
80100843: 74 ad je 801007f2 <consoleintr+0x42>
if(c != 0 && input.e-input.r < INPUT_BUF){
80100845: 85 ff test %edi,%edi
80100847: 74 87 je 801007d0 <consoleintr+0x20>
80100849: a1 a8 ff 10 80 mov 0x8010ffa8,%eax
8010084e: 89 c2 mov %eax,%edx
80100850: 2b 15 a0 ff 10 80 sub 0x8010ffa0,%edx
80100856: 83 fa 7f cmp $0x7f,%edx
80100859: 0f 87 71 ff ff ff ja 801007d0 <consoleintr+0x20>
input.buf[input.e++ % INPUT_BUF] = c;
8010085f: 8d 50 01 lea 0x1(%eax),%edx
80100862: 83 e0 7f and $0x7f,%eax
c = (c == '\r') ? '\n' : c;
80100865: 83 ff 0d cmp $0xd,%edi
input.buf[input.e++ % INPUT_BUF] = c;
80100868: 89 15 a8 ff 10 80 mov %edx,0x8010ffa8
c = (c == '\r') ? '\n' : c;
8010086e: 0f 84 b8 00 00 00 je 8010092c <consoleintr+0x17c>
input.buf[input.e++ % INPUT_BUF] = c;
80100874: 89 f9 mov %edi,%ecx
80100876: 88 88 20 ff 10 80 mov %cl,-0x7fef00e0(%eax)
consputc(c);
8010087c: 89 f8 mov %edi,%eax
8010087e: e8 5d fb ff ff call 801003e0 <consputc>
if(c == '\n' || c == C('D') || input.e == input.r+INPUT_BUF){
80100883: 83 ff 04 cmp $0x4,%edi
80100886: a1 a8 ff 10 80 mov 0x8010ffa8,%eax
8010088b: 74 19 je 801008a6 <consoleintr+0xf6>
8010088d: 83 ff 0a cmp $0xa,%edi
80100890: 74 14 je 801008a6 <consoleintr+0xf6>
80100892: 8b 0d a0 ff 10 80 mov 0x8010ffa0,%ecx
80100898: 8d 91 80 00 00 00 lea 0x80(%ecx),%edx
8010089e: 39 d0 cmp %edx,%eax
801008a0: 0f 85 2a ff ff ff jne 801007d0 <consoleintr+0x20>
wakeup(&input.r);
801008a6: c7 04 24 a0 ff 10 80 movl $0x8010ffa0,(%esp)
input.w = input.e;
801008ad: a3 a4 ff 10 80 mov %eax,0x8010ffa4
wakeup(&input.r);
801008b2: e8 d9 34 00 00 call 80103d90 <wakeup>
801008b7: e9 14 ff ff ff jmp 801007d0 <consoleintr+0x20>
801008bc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
while(input.e != input.w &&
801008c0: a1 a8 ff 10 80 mov 0x8010ffa8,%eax
801008c5: 3b 05 a4 ff 10 80 cmp 0x8010ffa4,%eax
801008cb: 75 2b jne 801008f8 <consoleintr+0x148>
801008cd: e9 fe fe ff ff jmp 801007d0 <consoleintr+0x20>
801008d2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
input.e--;
801008d8: a3 a8 ff 10 80 mov %eax,0x8010ffa8
consputc(BACKSPACE);
801008dd: b8 00 01 00 00 mov $0x100,%eax
801008e2: e8 f9 fa ff ff call 801003e0 <consputc>
while(input.e != input.w &&
801008e7: a1 a8 ff 10 80 mov 0x8010ffa8,%eax
801008ec: 3b 05 a4 ff 10 80 cmp 0x8010ffa4,%eax
801008f2: 0f 84 d8 fe ff ff je 801007d0 <consoleintr+0x20>
input.buf[(input.e-1) % INPUT_BUF] != '\n'){
801008f8: 83 e8 01 sub $0x1,%eax
801008fb: 89 c2 mov %eax,%edx
801008fd: 83 e2 7f and $0x7f,%edx
while(input.e != input.w &&
80100900: 80 ba 20 ff 10 80 0a cmpb $0xa,-0x7fef00e0(%edx)
80100907: 75 cf jne 801008d8 <consoleintr+0x128>
80100909: e9 c2 fe ff ff jmp 801007d0 <consoleintr+0x20>
8010090e: 66 90 xchg %ax,%ax
doprocdump = 1;
80100910: be 01 00 00 00 mov $0x1,%esi
80100915: e9 b6 fe ff ff jmp 801007d0 <consoleintr+0x20>
8010091a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
}
80100920: 83 c4 1c add $0x1c,%esp
80100923: 5b pop %ebx
80100924: 5e pop %esi
80100925: 5f pop %edi
80100926: 5d pop %ebp
procdump(); // now call procdump() wo. cons.lock held
80100927: e9 44 35 00 00 jmp 80103e70 <procdump>
input.buf[input.e++ % INPUT_BUF] = c;
8010092c: c6 80 20 ff 10 80 0a movb $0xa,-0x7fef00e0(%eax)
consputc(c);
80100933: b8 0a 00 00 00 mov $0xa,%eax
80100938: e8 a3 fa ff ff call 801003e0 <consputc>
8010093d: a1 a8 ff 10 80 mov 0x8010ffa8,%eax
80100942: e9 5f ff ff ff jmp 801008a6 <consoleintr+0xf6>
80100947: 89 f6 mov %esi,%esi
80100949: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80100950 <consoleinit>:
void
consoleinit(void)
{
80100950: 55 push %ebp
80100951: 89 e5 mov %esp,%ebp
80100953: 83 ec 18 sub $0x18,%esp
initlock(&cons.lock, "console");
80100956: c7 44 24 04 c8 6e 10 movl $0x80106ec8,0x4(%esp)
8010095d: 80
8010095e: c7 04 24 20 a5 10 80 movl $0x8010a520,(%esp)
80100965: e8 e6 36 00 00 call 80104050 <initlock>
devsw[CONSOLE].write = consolewrite;
devsw[CONSOLE].read = consoleread;
cons.locking = 1;
ioapicenable(IRQ_KBD, 0);
8010096a: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80100971: 00
80100972: c7 04 24 01 00 00 00 movl $0x1,(%esp)
devsw[CONSOLE].write = consolewrite;
80100979: c7 05 6c 09 11 80 f0 movl $0x801005f0,0x8011096c
80100980: 05 10 80
devsw[CONSOLE].read = consoleread;
80100983: c7 05 68 09 11 80 70 movl $0x80100270,0x80110968
8010098a: 02 10 80
cons.locking = 1;
8010098d: c7 05 54 a5 10 80 01 movl $0x1,0x8010a554
80100994: 00 00 00
ioapicenable(IRQ_KBD, 0);
80100997: e8 14 19 00 00 call 801022b0 <ioapicenable>
}
8010099c: c9 leave
8010099d: c3 ret
8010099e: 66 90 xchg %ax,%ax
801009a0 <exec>:
#include "x86.h"
#include "elf.h"
int
exec(char *path, char **argv)
{
801009a0: 55 push %ebp
801009a1: 89 e5 mov %esp,%ebp
801009a3: 57 push %edi
801009a4: 56 push %esi
801009a5: 53 push %ebx
801009a6: 81 ec 2c 01 00 00 sub $0x12c,%esp
uint argc, sz, sp, ustack[3+MAXARG+1];
struct elfhdr elf;
struct inode *ip;
struct proghdr ph;
pde_t *pgdir, *oldpgdir;
struct proc *curproc = myproc();
801009ac: e8 ef 2c 00 00 call 801036a0 <myproc>
801009b1: 89 85 f4 fe ff ff mov %eax,-0x10c(%ebp)
// curproc->szStack = 1;
begin_op();
801009b7: e8 54 21 00 00 call 80102b10 <begin_op>
if((ip = namei(path)) == 0){
801009bc: 8b 45 08 mov 0x8(%ebp),%eax
801009bf: 89 04 24 mov %eax,(%esp)
801009c2: e8 39 15 00 00 call 80101f00 <namei>
801009c7: 85 c0 test %eax,%eax
801009c9: 89 c3 mov %eax,%ebx
801009cb: 0f 84 3f 02 00 00 je 80100c10 <exec+0x270>
end_op();
cprintf("exec: fail\n");
return -1;
}
ilock(ip);
801009d1: 89 04 24 mov %eax,(%esp)
801009d4: e8 d7 0c 00 00 call 801016b0 <ilock>
pgdir = 0;
// Check ELF header
if(readi(ip, (char*)&elf, 0, sizeof(elf)) != sizeof(elf))
801009d9: 8d 85 24 ff ff ff lea -0xdc(%ebp),%eax
801009df: c7 44 24 0c 34 00 00 movl $0x34,0xc(%esp)
801009e6: 00
801009e7: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
801009ee: 00
801009ef: 89 44 24 04 mov %eax,0x4(%esp)
801009f3: 89 1c 24 mov %ebx,(%esp)
801009f6: e8 65 0f 00 00 call 80101960 <readi>
801009fb: 83 f8 34 cmp $0x34,%eax
801009fe: 74 20 je 80100a20 <exec+0x80>
bad:
if(pgdir)
freevm(pgdir);
if(ip){
iunlockput(ip);
80100a00: 89 1c 24 mov %ebx,(%esp)
80100a03: e8 08 0f 00 00 call 80101910 <iunlockput>
end_op();
80100a08: e8 73 21 00 00 call 80102b80 <end_op>
}
return -1;
80100a0d: b8 ff ff ff ff mov $0xffffffff,%eax
}
80100a12: 81 c4 2c 01 00 00 add $0x12c,%esp
80100a18: 5b pop %ebx
80100a19: 5e pop %esi
80100a1a: 5f pop %edi
80100a1b: 5d pop %ebp
80100a1c: c3 ret
80100a1d: 8d 76 00 lea 0x0(%esi),%esi
if(elf.magic != ELF_MAGIC)
80100a20: 81 bd 24 ff ff ff 7f cmpl $0x464c457f,-0xdc(%ebp)
80100a27: 45 4c 46
80100a2a: 75 d4 jne 80100a00 <exec+0x60>
if((pgdir = setupkvm()) == 0)
80100a2c: e8 3f 60 00 00 call 80106a70 <setupkvm>
80100a31: 85 c0 test %eax,%eax
80100a33: 89 85 f0 fe ff ff mov %eax,-0x110(%ebp)
80100a39: 74 c5 je 80100a00 <exec+0x60>
for(i=0, off=elf.phoff; i<elf.phnum; i++, off+=sizeof(ph)){
80100a3b: 66 83 bd 50 ff ff ff cmpw $0x0,-0xb0(%ebp)
80100a42: 00
80100a43: 8b b5 40 ff ff ff mov -0xc0(%ebp),%esi
sz = 0;
80100a49: c7 85 ec fe ff ff 00 movl $0x0,-0x114(%ebp)
80100a50: 00 00 00
for(i=0, off=elf.phoff; i<elf.phnum; i++, off+=sizeof(ph)){
80100a53: 0f 84 da 00 00 00 je 80100b33 <exec+0x193>
80100a59: 31 ff xor %edi,%edi
80100a5b: eb 18 jmp 80100a75 <exec+0xd5>
80100a5d: 8d 76 00 lea 0x0(%esi),%esi
80100a60: 0f b7 85 50 ff ff ff movzwl -0xb0(%ebp),%eax
80100a67: 83 c7 01 add $0x1,%edi
80100a6a: 83 c6 20 add $0x20,%esi
80100a6d: 39 f8 cmp %edi,%eax
80100a6f: 0f 8e be 00 00 00 jle 80100b33 <exec+0x193>
if(readi(ip, (char*)&ph, off, sizeof(ph)) != sizeof(ph))
80100a75: 8d 85 04 ff ff ff lea -0xfc(%ebp),%eax
80100a7b: c7 44 24 0c 20 00 00 movl $0x20,0xc(%esp)
80100a82: 00
80100a83: 89 74 24 08 mov %esi,0x8(%esp)
80100a87: 89 44 24 04 mov %eax,0x4(%esp)
80100a8b: 89 1c 24 mov %ebx,(%esp)
80100a8e: e8 cd 0e 00 00 call 80101960 <readi>
80100a93: 83 f8 20 cmp $0x20,%eax
80100a96: 0f 85 84 00 00 00 jne 80100b20 <exec+0x180>
if(ph.type != ELF_PROG_LOAD)
80100a9c: 83 bd 04 ff ff ff 01 cmpl $0x1,-0xfc(%ebp)
80100aa3: 75 bb jne 80100a60 <exec+0xc0>
if(ph.memsz < ph.filesz)
80100aa5: 8b 85 18 ff ff ff mov -0xe8(%ebp),%eax
80100aab: 3b 85 14 ff ff ff cmp -0xec(%ebp),%eax
80100ab1: 72 6d jb 80100b20 <exec+0x180>
if(ph.vaddr + ph.memsz < ph.vaddr)
80100ab3: 03 85 0c ff ff ff add -0xf4(%ebp),%eax
80100ab9: 72 65 jb 80100b20 <exec+0x180>
if((sz = allocuvm(pgdir, sz, ph.vaddr + ph.memsz)) == 0)
80100abb: 89 44 24 08 mov %eax,0x8(%esp)
80100abf: 8b 85 ec fe ff ff mov -0x114(%ebp),%eax
80100ac5: 89 44 24 04 mov %eax,0x4(%esp)
80100ac9: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100acf: 89 04 24 mov %eax,(%esp)
80100ad2: e8 f9 5d 00 00 call 801068d0 <allocuvm>
80100ad7: 85 c0 test %eax,%eax
80100ad9: 89 85 ec fe ff ff mov %eax,-0x114(%ebp)
80100adf: 74 3f je 80100b20 <exec+0x180>
if(ph.vaddr % PGSIZE != 0)
80100ae1: 8b 85 0c ff ff ff mov -0xf4(%ebp),%eax
80100ae7: a9 ff 0f 00 00 test $0xfff,%eax
80100aec: 75 32 jne 80100b20 <exec+0x180>
if(loaduvm(pgdir, (char*)ph.vaddr, ip, ph.off, ph.filesz) < 0)
80100aee: 8b 95 14 ff ff ff mov -0xec(%ebp),%edx
80100af4: 89 44 24 04 mov %eax,0x4(%esp)
80100af8: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100afe: 89 5c 24 08 mov %ebx,0x8(%esp)
80100b02: 89 54 24 10 mov %edx,0x10(%esp)
80100b06: 8b 95 08 ff ff ff mov -0xf8(%ebp),%edx
80100b0c: 89 04 24 mov %eax,(%esp)
80100b0f: 89 54 24 0c mov %edx,0xc(%esp)
80100b13: e8 f8 5c 00 00 call 80106810 <loaduvm>
80100b18: 85 c0 test %eax,%eax
80100b1a: 0f 89 40 ff ff ff jns 80100a60 <exec+0xc0>
freevm(pgdir);
80100b20: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100b26: 89 04 24 mov %eax,(%esp)
80100b29: e8 c2 5e 00 00 call 801069f0 <freevm>
80100b2e: e9 cd fe ff ff jmp 80100a00 <exec+0x60>
iunlockput(ip);
80100b33: 89 1c 24 mov %ebx,(%esp)
80100b36: e8 d5 0d 00 00 call 80101910 <iunlockput>
80100b3b: 90 nop
80100b3c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
end_op();
80100b40: e8 3b 20 00 00 call 80102b80 <end_op>
if((stack2 = allocuvm(pgdir, stack2, stack2 + 2) == 0))// KERNBASE2, KERNBASE2 - PGSIZE)) == 0)
80100b45: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100b4b: c7 44 24 08 02 f0 ff movl $0x7ffff002,0x8(%esp)
80100b52: 7f
80100b53: c7 44 24 04 00 f0 ff movl $0x7ffff000,0x4(%esp)
80100b5a: 7f
80100b5b: 89 04 24 mov %eax,(%esp)
80100b5e: e8 6d 5d 00 00 call 801068d0 <allocuvm>
80100b63: 85 c0 test %eax,%eax
80100b65: 0f 84 8d 00 00 00 je 80100bf8 <exec+0x258>
for(argc = 0; argv[argc]; argc++) {
80100b6b: 8b 45 0c mov 0xc(%ebp),%eax
80100b6e: 8b 00 mov (%eax),%eax
80100b70: 85 c0 test %eax,%eax
80100b72: 0f 84 af 01 00 00 je 80100d27 <exec+0x387>
80100b78: 8b 4d 0c mov 0xc(%ebp),%ecx
80100b7b: 31 d2 xor %edx,%edx
80100b7d: bb ff ff ff 7f mov $0x7fffffff,%ebx
80100b82: 8d 71 04 lea 0x4(%ecx),%esi
80100b85: 89 cf mov %ecx,%edi
80100b87: 89 f1 mov %esi,%ecx
80100b89: 89 d6 mov %edx,%esi
80100b8b: 89 ca mov %ecx,%edx
80100b8d: eb 27 jmp 80100bb6 <exec+0x216>
80100b8f: 90 nop
80100b90: 8b 95 e8 fe ff ff mov -0x118(%ebp),%edx
ustack[3+argc] = sp;
80100b96: 8d 8d 58 ff ff ff lea -0xa8(%ebp),%ecx
80100b9c: 89 9c b5 64 ff ff ff mov %ebx,-0x9c(%ebp,%esi,4)
for(argc = 0; argv[argc]; argc++) {
80100ba3: 83 c6 01 add $0x1,%esi
80100ba6: 8b 02 mov (%edx),%eax
80100ba8: 89 d7 mov %edx,%edi
80100baa: 85 c0 test %eax,%eax
80100bac: 74 7d je 80100c2b <exec+0x28b>
80100bae: 83 c2 04 add $0x4,%edx
if(argc >= MAXARG)
80100bb1: 83 fe 20 cmp $0x20,%esi
80100bb4: 74 42 je 80100bf8 <exec+0x258>
sp = (sp - (strlen(argv[argc]) + 1)) & ~3;
80100bb6: 89 04 24 mov %eax,(%esp)
80100bb9: 89 95 e8 fe ff ff mov %edx,-0x118(%ebp)
80100bbf: e8 dc 38 00 00 call 801044a0 <strlen>
80100bc4: f7 d0 not %eax
80100bc6: 01 c3 add %eax,%ebx
if(copyout(pgdir, sp, argv[argc], strlen(argv[argc]) + 1) < 0)
80100bc8: 8b 07 mov (%edi),%eax
sp = (sp - (strlen(argv[argc]) + 1)) & ~3;
80100bca: 83 e3 fc and $0xfffffffc,%ebx
if(copyout(pgdir, sp, argv[argc], strlen(argv[argc]) + 1) < 0)
80100bcd: 89 04 24 mov %eax,(%esp)
80100bd0: e8 cb 38 00 00 call 801044a0 <strlen>
80100bd5: 83 c0 01 add $0x1,%eax
80100bd8: 89 44 24 0c mov %eax,0xc(%esp)
80100bdc: 8b 07 mov (%edi),%eax
80100bde: 89 5c 24 04 mov %ebx,0x4(%esp)
80100be2: 89 44 24 08 mov %eax,0x8(%esp)
80100be6: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100bec: 89 04 24 mov %eax,(%esp)
80100bef: e8 4c 61 00 00 call 80106d40 <copyout>
80100bf4: 85 c0 test %eax,%eax
80100bf6: 79 98 jns 80100b90 <exec+0x1f0>
freevm(pgdir);
80100bf8: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100bfe: 89 04 24 mov %eax,(%esp)
80100c01: e8 ea 5d 00 00 call 801069f0 <freevm>
return -1;
80100c06: b8 ff ff ff ff mov $0xffffffff,%eax
80100c0b: e9 02 fe ff ff jmp 80100a12 <exec+0x72>
end_op();
80100c10: e8 6b 1f 00 00 call 80102b80 <end_op>
cprintf("exec: fail\n");
80100c15: c7 04 24 e1 6e 10 80 movl $0x80106ee1,(%esp)
80100c1c: e8 2f fa ff ff call 80100650 <cprintf>
return -1;
80100c21: b8 ff ff ff ff mov $0xffffffff,%eax
80100c26: e9 e7 fd ff ff jmp 80100a12 <exec+0x72>
80100c2b: 89 f2 mov %esi,%edx
ustack[3+argc] = 0;
80100c2d: c7 84 95 64 ff ff ff movl $0x0,-0x9c(%ebp,%edx,4)
80100c34: 00 00 00 00
ustack[2] = sp - (argc+1)*4; // argv pointer
80100c38: 8d 04 95 04 00 00 00 lea 0x4(,%edx,4),%eax
ustack[1] = argc;
80100c3f: 89 95 5c ff ff ff mov %edx,-0xa4(%ebp)
ustack[2] = sp - (argc+1)*4; // argv pointer
80100c45: 89 da mov %ebx,%edx
80100c47: 29 c2 sub %eax,%edx
sp -= (3+argc+1) * 4;
80100c49: 83 c0 0c add $0xc,%eax
80100c4c: 29 c3 sub %eax,%ebx
if(copyout(pgdir, sp, ustack, (3+argc+1)*4) < 0)
80100c4e: 89 44 24 0c mov %eax,0xc(%esp)
80100c52: 8b 85 f0 fe ff ff mov -0x110(%ebp),%eax
80100c58: 89 4c 24 08 mov %ecx,0x8(%esp)
80100c5c: 89 5c 24 04 mov %ebx,0x4(%esp)
ustack[0] = 0xffffffff; // fake return PC
80100c60: c7 85 58 ff ff ff ff movl $0xffffffff,-0xa8(%ebp)
80100c67: ff ff ff
if(copyout(pgdir, sp, ustack, (3+argc+1)*4) < 0)
80100c6a: 89 04 24 mov %eax,(%esp)
ustack[2] = sp - (argc+1)*4; // argv pointer
80100c6d: 89 95 60 ff ff ff mov %edx,-0xa0(%ebp)
if(copyout(pgdir, sp, ustack, (3+argc+1)*4) < 0)
80100c73: e8 c8 60 00 00 call 80106d40 <copyout>
80100c78: 85 c0 test %eax,%eax
80100c7a: 0f 88 78 ff ff ff js 80100bf8 <exec+0x258>
for(last=s=path; *s; s++)
80100c80: 8b 45 08 mov 0x8(%ebp),%eax
80100c83: 0f b6 10 movzbl (%eax),%edx
80100c86: 84 d2 test %dl,%dl
80100c88: 74 19 je 80100ca3 <exec+0x303>
80100c8a: 8b 4d 08 mov 0x8(%ebp),%ecx
80100c8d: 83 c0 01 add $0x1,%eax
last = s+1;
80100c90: 80 fa 2f cmp $0x2f,%dl
for(last=s=path; *s; s++)
80100c93: 0f b6 10 movzbl (%eax),%edx
last = s+1;
80100c96: 0f 44 c8 cmove %eax,%ecx
80100c99: 83 c0 01 add $0x1,%eax
for(last=s=path; *s; s++)
80100c9c: 84 d2 test %dl,%dl
80100c9e: 75 f0 jne 80100c90 <exec+0x2f0>
80100ca0: 89 4d 08 mov %ecx,0x8(%ebp)
safestrcpy(curproc->name, last, sizeof(curproc->name));
80100ca3: 8b bd f4 fe ff ff mov -0x10c(%ebp),%edi
80100ca9: 8b 45 08 mov 0x8(%ebp),%eax
80100cac: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
80100cb3: 00
80100cb4: 89 44 24 04 mov %eax,0x4(%esp)
80100cb8: 89 f8 mov %edi,%eax
80100cba: 83 c0 70 add $0x70,%eax
80100cbd: 89 04 24 mov %eax,(%esp)
80100cc0: e8 9b 37 00 00 call 80104460 <safestrcpy>
sz = PGROUNDUP(sz);
80100cc5: 8b 85 ec fe ff ff mov -0x114(%ebp),%eax
curproc->pgdir = pgdir;
80100ccb: 8b 95 f0 fe ff ff mov -0x110(%ebp),%edx
oldpgdir = curproc->pgdir;
80100cd1: 8b 77 04 mov 0x4(%edi),%esi
curproc->szStack = 1;
80100cd4: c7 47 08 01 00 00 00 movl $0x1,0x8(%edi)
sz = PGROUNDUP(sz);
80100cdb: 05 ff 0f 00 00 add $0xfff,%eax
80100ce0: 25 00 f0 ff ff and $0xfffff000,%eax
curproc->pgdir = pgdir;
80100ce5: 89 57 04 mov %edx,0x4(%edi)
sz = PGROUNDUP(sz);
80100ce8: 89 07 mov %eax,(%edi)
cprintf("Initial number of pages by the process: %d\n", curproc->szStack);
80100cea: c7 44 24 04 01 00 00 movl $0x1,0x4(%esp)
80100cf1: 00
80100cf2: c7 04 24 f0 6e 10 80 movl $0x80106ef0,(%esp)
80100cf9: e8 52 f9 ff ff call 80100650 <cprintf>
curproc->tf->eip = elf.entry; // main
80100cfe: 8b 47 1c mov 0x1c(%edi),%eax
80100d01: 8b 95 3c ff ff ff mov -0xc4(%ebp),%edx
80100d07: 89 50 38 mov %edx,0x38(%eax)
curproc->tf->esp = sp;
80100d0a: 8b 47 1c mov 0x1c(%edi),%eax
80100d0d: 89 58 44 mov %ebx,0x44(%eax)
switchuvm(curproc);
80100d10: 89 3c 24 mov %edi,(%esp)
80100d13: e8 58 59 00 00 call 80106670 <switchuvm>
freevm(oldpgdir);
80100d18: 89 34 24 mov %esi,(%esp)
80100d1b: e8 d0 5c 00 00 call 801069f0 <freevm>
return 0;
80100d20: 31 c0 xor %eax,%eax
80100d22: e9 eb fc ff ff jmp 80100a12 <exec+0x72>
for(argc = 0; argv[argc]; argc++) {
80100d27: bb ff ff ff 7f mov $0x7fffffff,%ebx
80100d2c: 31 d2 xor %edx,%edx
80100d2e: 8d 8d 58 ff ff ff lea -0xa8(%ebp),%ecx
80100d34: e9 f4 fe ff ff jmp 80100c2d <exec+0x28d>
80100d39: 66 90 xchg %ax,%ax
80100d3b: 66 90 xchg %ax,%ax
80100d3d: 66 90 xchg %ax,%ax
80100d3f: 90 nop
80100d40 <fileinit>:
struct file file[NFILE];
} ftable;
void
fileinit(void)
{
80100d40: 55 push %ebp
80100d41: 89 e5 mov %esp,%ebp
80100d43: 83 ec 18 sub $0x18,%esp
initlock(&ftable.lock, "ftable");
80100d46: c7 44 24 04 1c 6f 10 movl $0x80106f1c,0x4(%esp)
80100d4d: 80
80100d4e: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
80100d55: e8 f6 32 00 00 call 80104050 <initlock>
}
80100d5a: c9 leave
80100d5b: c3 ret
80100d5c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80100d60 <filealloc>:
// Allocate a file structure.
struct file*
filealloc(void)
{
80100d60: 55 push %ebp
80100d61: 89 e5 mov %esp,%ebp
80100d63: 53 push %ebx
struct file *f;
acquire(&ftable.lock);
for(f = ftable.file; f < ftable.file + NFILE; f++){
80100d64: bb f4 ff 10 80 mov $0x8010fff4,%ebx
{
80100d69: 83 ec 14 sub $0x14,%esp
acquire(&ftable.lock);
80100d6c: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
80100d73: e8 c8 33 00 00 call 80104140 <acquire>
80100d78: eb 11 jmp 80100d8b <filealloc+0x2b>
80100d7a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
for(f = ftable.file; f < ftable.file + NFILE; f++){
80100d80: 83 c3 18 add $0x18,%ebx
80100d83: 81 fb 54 09 11 80 cmp $0x80110954,%ebx
80100d89: 74 25 je 80100db0 <filealloc+0x50>
if(f->ref == 0){
80100d8b: 8b 43 04 mov 0x4(%ebx),%eax
80100d8e: 85 c0 test %eax,%eax
80100d90: 75 ee jne 80100d80 <filealloc+0x20>
f->ref = 1;
release(&ftable.lock);
80100d92: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
f->ref = 1;
80100d99: c7 43 04 01 00 00 00 movl $0x1,0x4(%ebx)
release(&ftable.lock);
80100da0: e8 8b 34 00 00 call 80104230 <release>
return f;
}
}
release(&ftable.lock);
return 0;
}
80100da5: 83 c4 14 add $0x14,%esp
return f;
80100da8: 89 d8 mov %ebx,%eax
}
80100daa: 5b pop %ebx
80100dab: 5d pop %ebp
80100dac: c3 ret
80100dad: 8d 76 00 lea 0x0(%esi),%esi
release(&ftable.lock);
80100db0: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
80100db7: e8 74 34 00 00 call 80104230 <release>
}
80100dbc: 83 c4 14 add $0x14,%esp
return 0;
80100dbf: 31 c0 xor %eax,%eax
}
80100dc1: 5b pop %ebx
80100dc2: 5d pop %ebp
80100dc3: c3 ret
80100dc4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80100dca: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
80100dd0 <filedup>:
// Increment ref count for file f.
struct file*
filedup(struct file *f)
{
80100dd0: 55 push %ebp
80100dd1: 89 e5 mov %esp,%ebp
80100dd3: 53 push %ebx
80100dd4: 83 ec 14 sub $0x14,%esp
80100dd7: 8b 5d 08 mov 0x8(%ebp),%ebx
acquire(&ftable.lock);
80100dda: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
80100de1: e8 5a 33 00 00 call 80104140 <acquire>
if(f->ref < 1)
80100de6: 8b 43 04 mov 0x4(%ebx),%eax
80100de9: 85 c0 test %eax,%eax
80100deb: 7e 1a jle 80100e07 <filedup+0x37>
panic("filedup");
f->ref++;
80100ded: 83 c0 01 add $0x1,%eax
80100df0: 89 43 04 mov %eax,0x4(%ebx)
release(&ftable.lock);
80100df3: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
80100dfa: e8 31 34 00 00 call 80104230 <release>
return f;
}
80100dff: 83 c4 14 add $0x14,%esp
80100e02: 89 d8 mov %ebx,%eax
80100e04: 5b pop %ebx
80100e05: 5d pop %ebp
80100e06: c3 ret
panic("filedup");
80100e07: c7 04 24 23 6f 10 80 movl $0x80106f23,(%esp)
80100e0e: e8 4d f5 ff ff call 80100360 <panic>
80100e13: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80100e19: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80100e20 <fileclose>:
// Close file f. (Decrement ref count, close when reaches 0.)
void
fileclose(struct file *f)
{
80100e20: 55 push %ebp
80100e21: 89 e5 mov %esp,%ebp
80100e23: 57 push %edi
80100e24: 56 push %esi
80100e25: 53 push %ebx
80100e26: 83 ec 1c sub $0x1c,%esp
80100e29: 8b 7d 08 mov 0x8(%ebp),%edi
struct file ff;
acquire(&ftable.lock);
80100e2c: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
80100e33: e8 08 33 00 00 call 80104140 <acquire>
if(f->ref < 1)
80100e38: 8b 57 04 mov 0x4(%edi),%edx
80100e3b: 85 d2 test %edx,%edx
80100e3d: 0f 8e 89 00 00 00 jle 80100ecc <fileclose+0xac>
panic("fileclose");
if(--f->ref > 0){
80100e43: 83 ea 01 sub $0x1,%edx
80100e46: 85 d2 test %edx,%edx
80100e48: 89 57 04 mov %edx,0x4(%edi)
80100e4b: 74 13 je 80100e60 <fileclose+0x40>
release(&ftable.lock);
80100e4d: c7 45 08 c0 ff 10 80 movl $0x8010ffc0,0x8(%ebp)
else if(ff.type == FD_INODE){
begin_op();
iput(ff.ip);
end_op();
}
}
80100e54: 83 c4 1c add $0x1c,%esp
80100e57: 5b pop %ebx
80100e58: 5e pop %esi
80100e59: 5f pop %edi
80100e5a: 5d pop %ebp
release(&ftable.lock);
80100e5b: e9 d0 33 00 00 jmp 80104230 <release>
ff = *f;
80100e60: 0f b6 47 09 movzbl 0x9(%edi),%eax
80100e64: 8b 37 mov (%edi),%esi
80100e66: 8b 5f 0c mov 0xc(%edi),%ebx
f->type = FD_NONE;
80100e69: c7 07 00 00 00 00 movl $0x0,(%edi)
ff = *f;
80100e6f: 88 45 e7 mov %al,-0x19(%ebp)
80100e72: 8b 47 10 mov 0x10(%edi),%eax
release(&ftable.lock);
80100e75: c7 04 24 c0 ff 10 80 movl $0x8010ffc0,(%esp)
ff = *f;
80100e7c: 89 45 e0 mov %eax,-0x20(%ebp)
release(&ftable.lock);
80100e7f: e8 ac 33 00 00 call 80104230 <release>
if(ff.type == FD_PIPE)
80100e84: 83 fe 01 cmp $0x1,%esi
80100e87: 74 0f je 80100e98 <fileclose+0x78>
else if(ff.type == FD_INODE){
80100e89: 83 fe 02 cmp $0x2,%esi
80100e8c: 74 22 je 80100eb0 <fileclose+0x90>
}
80100e8e: 83 c4 1c add $0x1c,%esp
80100e91: 5b pop %ebx
80100e92: 5e pop %esi
80100e93: 5f pop %edi
80100e94: 5d pop %ebp
80100e95: c3 ret
80100e96: 66 90 xchg %ax,%ax
pipeclose(ff.pipe, ff.writable);
80100e98: 0f be 75 e7 movsbl -0x19(%ebp),%esi
80100e9c: 89 1c 24 mov %ebx,(%esp)
80100e9f: 89 74 24 04 mov %esi,0x4(%esp)
80100ea3: e8 b8 23 00 00 call 80103260 <pipeclose>
80100ea8: eb e4 jmp 80100e8e <fileclose+0x6e>
80100eaa: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
begin_op();
80100eb0: e8 5b 1c 00 00 call 80102b10 <begin_op>
iput(ff.ip);
80100eb5: 8b 45 e0 mov -0x20(%ebp),%eax
80100eb8: 89 04 24 mov %eax,(%esp)
80100ebb: e8 10 09 00 00 call 801017d0 <iput>
}
80100ec0: 83 c4 1c add $0x1c,%esp
80100ec3: 5b pop %ebx
80100ec4: 5e pop %esi
80100ec5: 5f pop %edi
80100ec6: 5d pop %ebp
end_op();
80100ec7: e9 b4 1c 00 00 jmp 80102b80 <end_op>
panic("fileclose");
80100ecc: c7 04 24 2b 6f 10 80 movl $0x80106f2b,(%esp)
80100ed3: e8 88 f4 ff ff call 80100360 <panic>
80100ed8: 90 nop
80100ed9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80100ee0 <filestat>:
// Get metadata about file f.
int
filestat(struct file *f, struct stat *st)
{
80100ee0: 55 push %ebp
80100ee1: 89 e5 mov %esp,%ebp
80100ee3: 53 push %ebx
80100ee4: 83 ec 14 sub $0x14,%esp
80100ee7: 8b 5d 08 mov 0x8(%ebp),%ebx
if(f->type == FD_INODE){
80100eea: 83 3b 02 cmpl $0x2,(%ebx)
80100eed: 75 31 jne 80100f20 <filestat+0x40>
ilock(f->ip);
80100eef: 8b 43 10 mov 0x10(%ebx),%eax
80100ef2: 89 04 24 mov %eax,(%esp)
80100ef5: e8 b6 07 00 00 call 801016b0 <ilock>
stati(f->ip, st);
80100efa: 8b 45 0c mov 0xc(%ebp),%eax
80100efd: 89 44 24 04 mov %eax,0x4(%esp)
80100f01: 8b 43 10 mov 0x10(%ebx),%eax
80100f04: 89 04 24 mov %eax,(%esp)
80100f07: e8 24 0a 00 00 call 80101930 <stati>
iunlock(f->ip);
80100f0c: 8b 43 10 mov 0x10(%ebx),%eax
80100f0f: 89 04 24 mov %eax,(%esp)
80100f12: e8 79 08 00 00 call 80101790 <iunlock>
return 0;
}
return -1;
}
80100f17: 83 c4 14 add $0x14,%esp
return 0;
80100f1a: 31 c0 xor %eax,%eax
}
80100f1c: 5b pop %ebx
80100f1d: 5d pop %ebp
80100f1e: c3 ret
80100f1f: 90 nop
80100f20: 83 c4 14 add $0x14,%esp
return -1;
80100f23: b8 ff ff ff ff mov $0xffffffff,%eax
}
80100f28: 5b pop %ebx
80100f29: 5d pop %ebp
80100f2a: c3 ret
80100f2b: 90 nop
80100f2c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80100f30 <fileread>:
// Read from file f.
int
fileread(struct file *f, char *addr, int n)
{
80100f30: 55 push %ebp
80100f31: 89 e5 mov %esp,%ebp
80100f33: 57 push %edi
80100f34: 56 push %esi
80100f35: 53 push %ebx
80100f36: 83 ec 1c sub $0x1c,%esp
80100f39: 8b 5d 08 mov 0x8(%ebp),%ebx
80100f3c: 8b 75 0c mov 0xc(%ebp),%esi
80100f3f: 8b 7d 10 mov 0x10(%ebp),%edi
int r;
if(f->readable == 0)
80100f42: 80 7b 08 00 cmpb $0x0,0x8(%ebx)
80100f46: 74 68 je 80100fb0 <fileread+0x80>
return -1;
if(f->type == FD_PIPE)
80100f48: 8b 03 mov (%ebx),%eax
80100f4a: 83 f8 01 cmp $0x1,%eax
80100f4d: 74 49 je 80100f98 <fileread+0x68>
return piperead(f->pipe, addr, n);
if(f->type == FD_INODE){
80100f4f: 83 f8 02 cmp $0x2,%eax
80100f52: 75 63 jne 80100fb7 <fileread+0x87>
ilock(f->ip);
80100f54: 8b 43 10 mov 0x10(%ebx),%eax
80100f57: 89 04 24 mov %eax,(%esp)
80100f5a: e8 51 07 00 00 call 801016b0 <ilock>
if((r = readi(f->ip, addr, f->off, n)) > 0)
80100f5f: 89 7c 24 0c mov %edi,0xc(%esp)
80100f63: 8b 43 14 mov 0x14(%ebx),%eax
80100f66: 89 74 24 04 mov %esi,0x4(%esp)
80100f6a: 89 44 24 08 mov %eax,0x8(%esp)
80100f6e: 8b 43 10 mov 0x10(%ebx),%eax
80100f71: 89 04 24 mov %eax,(%esp)
80100f74: e8 e7 09 00 00 call 80101960 <readi>
80100f79: 85 c0 test %eax,%eax
80100f7b: 89 c6 mov %eax,%esi
80100f7d: 7e 03 jle 80100f82 <fileread+0x52>
f->off += r;
80100f7f: 01 43 14 add %eax,0x14(%ebx)
iunlock(f->ip);
80100f82: 8b 43 10 mov 0x10(%ebx),%eax
80100f85: 89 04 24 mov %eax,(%esp)
80100f88: e8 03 08 00 00 call 80101790 <iunlock>
if((r = readi(f->ip, addr, f->off, n)) > 0)
80100f8d: 89 f0 mov %esi,%eax
return r;
}
panic("fileread");
}
80100f8f: 83 c4 1c add $0x1c,%esp
80100f92: 5b pop %ebx
80100f93: 5e pop %esi
80100f94: 5f pop %edi
80100f95: 5d pop %ebp
80100f96: c3 ret
80100f97: 90 nop
return piperead(f->pipe, addr, n);
80100f98: 8b 43 0c mov 0xc(%ebx),%eax
80100f9b: 89 45 08 mov %eax,0x8(%ebp)
}
80100f9e: 83 c4 1c add $0x1c,%esp
80100fa1: 5b pop %ebx
80100fa2: 5e pop %esi
80100fa3: 5f pop %edi
80100fa4: 5d pop %ebp
return piperead(f->pipe, addr, n);
80100fa5: e9 36 24 00 00 jmp 801033e0 <piperead>
80100faa: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
return -1;
80100fb0: b8 ff ff ff ff mov $0xffffffff,%eax
80100fb5: eb d8 jmp 80100f8f <fileread+0x5f>
panic("fileread");
80100fb7: c7 04 24 35 6f 10 80 movl $0x80106f35,(%esp)
80100fbe: e8 9d f3 ff ff call 80100360 <panic>
80100fc3: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80100fc9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80100fd0 <filewrite>:
//PAGEBREAK!
// Write to file f.
int
filewrite(struct file *f, char *addr, int n)
{
80100fd0: 55 push %ebp
80100fd1: 89 e5 mov %esp,%ebp
80100fd3: 57 push %edi
80100fd4: 56 push %esi
80100fd5: 53 push %ebx
80100fd6: 83 ec 2c sub $0x2c,%esp
80100fd9: 8b 45 0c mov 0xc(%ebp),%eax
80100fdc: 8b 7d 08 mov 0x8(%ebp),%edi
80100fdf: 89 45 dc mov %eax,-0x24(%ebp)
80100fe2: 8b 45 10 mov 0x10(%ebp),%eax
int r;
if(f->writable == 0)
80100fe5: 80 7f 09 00 cmpb $0x0,0x9(%edi)
{
80100fe9: 89 45 e4 mov %eax,-0x1c(%ebp)
if(f->writable == 0)
80100fec: 0f 84 ae 00 00 00 je 801010a0 <filewrite+0xd0>
return -1;
if(f->type == FD_PIPE)
80100ff2: 8b 07 mov (%edi),%eax
80100ff4: 83 f8 01 cmp $0x1,%eax
80100ff7: 0f 84 c2 00 00 00 je 801010bf <filewrite+0xef>
return pipewrite(f->pipe, addr, n);
if(f->type == FD_INODE){
80100ffd: 83 f8 02 cmp $0x2,%eax
80101000: 0f 85 d7 00 00 00 jne 801010dd <filewrite+0x10d>
// and 2 blocks of slop for non-aligned writes.
// this really belongs lower down, since writei()
// might be writing a device like the console.
int max = ((LOGSIZE-1-1-2) / 2) * 512;
int i = 0;
while(i < n){
80101006: 8b 45 e4 mov -0x1c(%ebp),%eax
80101009: 31 db xor %ebx,%ebx
8010100b: 85 c0 test %eax,%eax
8010100d: 7f 31 jg 80101040 <filewrite+0x70>
8010100f: e9 9c 00 00 00 jmp 801010b0 <filewrite+0xe0>
80101014: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
begin_op();
ilock(f->ip);
if ((r = writei(f->ip, addr + i, f->off, n1)) > 0)
f->off += r;
iunlock(f->ip);
80101018: 8b 4f 10 mov 0x10(%edi),%ecx
f->off += r;
8010101b: 01 47 14 add %eax,0x14(%edi)
8010101e: 89 45 e0 mov %eax,-0x20(%ebp)
iunlock(f->ip);
80101021: 89 0c 24 mov %ecx,(%esp)
80101024: e8 67 07 00 00 call 80101790 <iunlock>
end_op();
80101029: e8 52 1b 00 00 call 80102b80 <end_op>
8010102e: 8b 45 e0 mov -0x20(%ebp),%eax
if(r < 0)
break;
if(r != n1)
80101031: 39 f0 cmp %esi,%eax
80101033: 0f 85 98 00 00 00 jne 801010d1 <filewrite+0x101>
panic("short filewrite");
i += r;
80101039: 01 c3 add %eax,%ebx
while(i < n){
8010103b: 39 5d e4 cmp %ebx,-0x1c(%ebp)
8010103e: 7e 70 jle 801010b0 <filewrite+0xe0>
int n1 = n - i;
80101040: 8b 75 e4 mov -0x1c(%ebp),%esi
80101043: b8 00 1a 00 00 mov $0x1a00,%eax
80101048: 29 de sub %ebx,%esi
8010104a: 81 fe 00 1a 00 00 cmp $0x1a00,%esi
80101050: 0f 4f f0 cmovg %eax,%esi
begin_op();
80101053: e8 b8 1a 00 00 call 80102b10 <begin_op>
ilock(f->ip);
80101058: 8b 47 10 mov 0x10(%edi),%eax
8010105b: 89 04 24 mov %eax,(%esp)
8010105e: e8 4d 06 00 00 call 801016b0 <ilock>
if ((r = writei(f->ip, addr + i, f->off, n1)) > 0)
80101063: 89 74 24 0c mov %esi,0xc(%esp)
80101067: 8b 47 14 mov 0x14(%edi),%eax
8010106a: 89 44 24 08 mov %eax,0x8(%esp)
8010106e: 8b 45 dc mov -0x24(%ebp),%eax
80101071: 01 d8 add %ebx,%eax
80101073: 89 44 24 04 mov %eax,0x4(%esp)
80101077: 8b 47 10 mov 0x10(%edi),%eax
8010107a: 89 04 24 mov %eax,(%esp)
8010107d: e8 de 09 00 00 call 80101a60 <writei>
80101082: 85 c0 test %eax,%eax
80101084: 7f 92 jg 80101018 <filewrite+0x48>
iunlock(f->ip);
80101086: 8b 4f 10 mov 0x10(%edi),%ecx
80101089: 89 45 e0 mov %eax,-0x20(%ebp)
8010108c: 89 0c 24 mov %ecx,(%esp)
8010108f: e8 fc 06 00 00 call 80101790 <iunlock>
end_op();
80101094: e8 e7 1a 00 00 call 80102b80 <end_op>
if(r < 0)
80101099: 8b 45 e0 mov -0x20(%ebp),%eax
8010109c: 85 c0 test %eax,%eax
8010109e: 74 91 je 80101031 <filewrite+0x61>
}
return i == n ? n : -1;
}
panic("filewrite");
}
801010a0: 83 c4 2c add $0x2c,%esp
return -1;
801010a3: b8 ff ff ff ff mov $0xffffffff,%eax
}
801010a8: 5b pop %ebx
801010a9: 5e pop %esi
801010aa: 5f pop %edi
801010ab: 5d pop %ebp
801010ac: c3 ret
801010ad: 8d 76 00 lea 0x0(%esi),%esi
return i == n ? n : -1;
801010b0: 3b 5d e4 cmp -0x1c(%ebp),%ebx
801010b3: 89 d8 mov %ebx,%eax
801010b5: 75 e9 jne 801010a0 <filewrite+0xd0>
}
801010b7: 83 c4 2c add $0x2c,%esp
801010ba: 5b pop %ebx
801010bb: 5e pop %esi
801010bc: 5f pop %edi
801010bd: 5d pop %ebp
801010be: c3 ret
return pipewrite(f->pipe, addr, n);
801010bf: 8b 47 0c mov 0xc(%edi),%eax
801010c2: 89 45 08 mov %eax,0x8(%ebp)
}
801010c5: 83 c4 2c add $0x2c,%esp
801010c8: 5b pop %ebx
801010c9: 5e pop %esi
801010ca: 5f pop %edi
801010cb: 5d pop %ebp
return pipewrite(f->pipe, addr, n);
801010cc: e9 1f 22 00 00 jmp 801032f0 <pipewrite>
panic("short filewrite");
801010d1: c7 04 24 3e 6f 10 80 movl $0x80106f3e,(%esp)
801010d8: e8 83 f2 ff ff call 80100360 <panic>
panic("filewrite");
801010dd: c7 04 24 44 6f 10 80 movl $0x80106f44,(%esp)
801010e4: e8 77 f2 ff ff call 80100360 <panic>
801010e9: 66 90 xchg %ax,%ax
801010eb: 66 90 xchg %ax,%ax
801010ed: 66 90 xchg %ax,%ax
801010ef: 90 nop
801010f0 <balloc>:
// Blocks.
// Allocate a zeroed disk block.
static uint
balloc(uint dev)
{
801010f0: 55 push %ebp
801010f1: 89 e5 mov %esp,%ebp
801010f3: 57 push %edi
801010f4: 56 push %esi
801010f5: 53 push %ebx
801010f6: 83 ec 2c sub $0x2c,%esp
801010f9: 89 45 d8 mov %eax,-0x28(%ebp)
int b, bi, m;
struct buf *bp;
bp = 0;
for(b = 0; b < sb.size; b += BPB){
801010fc: a1 c0 09 11 80 mov 0x801109c0,%eax
80101101: 85 c0 test %eax,%eax
80101103: 0f 84 8c 00 00 00 je 80101195 <balloc+0xa5>
80101109: c7 45 dc 00 00 00 00 movl $0x0,-0x24(%ebp)
bp = bread(dev, BBLOCK(b, sb));
80101110: 8b 75 dc mov -0x24(%ebp),%esi
80101113: 89 f0 mov %esi,%eax
80101115: c1 f8 0c sar $0xc,%eax
80101118: 03 05 d8 09 11 80 add 0x801109d8,%eax
8010111e: 89 44 24 04 mov %eax,0x4(%esp)
80101122: 8b 45 d8 mov -0x28(%ebp),%eax
80101125: 89 04 24 mov %eax,(%esp)
80101128: e8 a3 ef ff ff call 801000d0 <bread>
8010112d: 89 45 e4 mov %eax,-0x1c(%ebp)
80101130: a1 c0 09 11 80 mov 0x801109c0,%eax
80101135: 89 45 e0 mov %eax,-0x20(%ebp)
for(bi = 0; bi < BPB && b + bi < sb.size; bi++){
80101138: 31 c0 xor %eax,%eax
8010113a: eb 33 jmp 8010116f <balloc+0x7f>
8010113c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
m = 1 << (bi % 8);
if((bp->data[bi/8] & m) == 0){ // Is block free?
80101140: 8b 5d e4 mov -0x1c(%ebp),%ebx
80101143: 89 c2 mov %eax,%edx
m = 1 << (bi % 8);
80101145: 89 c1 mov %eax,%ecx
if((bp->data[bi/8] & m) == 0){ // Is block free?
80101147: c1 fa 03 sar $0x3,%edx
m = 1 << (bi % 8);
8010114a: 83 e1 07 and $0x7,%ecx
8010114d: bf 01 00 00 00 mov $0x1,%edi
80101152: d3 e7 shl %cl,%edi
if((bp->data[bi/8] & m) == 0){ // Is block free?
80101154: 0f b6 5c 13 5c movzbl 0x5c(%ebx,%edx,1),%ebx
m = 1 << (bi % 8);
80101159: 89 f9 mov %edi,%ecx
if((bp->data[bi/8] & m) == 0){ // Is block free?
8010115b: 0f b6 fb movzbl %bl,%edi
8010115e: 85 cf test %ecx,%edi
80101160: 74 46 je 801011a8 <balloc+0xb8>
for(bi = 0; bi < BPB && b + bi < sb.size; bi++){
80101162: 83 c0 01 add $0x1,%eax
80101165: 83 c6 01 add $0x1,%esi
80101168: 3d 00 10 00 00 cmp $0x1000,%eax
8010116d: 74 05 je 80101174 <balloc+0x84>
8010116f: 3b 75 e0 cmp -0x20(%ebp),%esi
80101172: 72 cc jb 80101140 <balloc+0x50>
brelse(bp);
bzero(dev, b + bi);
return b + bi;
}
}
brelse(bp);
80101174: 8b 45 e4 mov -0x1c(%ebp),%eax
80101177: 89 04 24 mov %eax,(%esp)
8010117a: e8 61 f0 ff ff call 801001e0 <brelse>
for(b = 0; b < sb.size; b += BPB){
8010117f: 81 45 dc 00 10 00 00 addl $0x1000,-0x24(%ebp)
80101186: 8b 45 dc mov -0x24(%ebp),%eax
80101189: 3b 05 c0 09 11 80 cmp 0x801109c0,%eax
8010118f: 0f 82 7b ff ff ff jb 80101110 <balloc+0x20>
}
panic("balloc: out of blocks");
80101195: c7 04 24 4e 6f 10 80 movl $0x80106f4e,(%esp)
8010119c: e8 bf f1 ff ff call 80100360 <panic>
801011a1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
bp->data[bi/8] |= m; // Mark block in use.
801011a8: 09 d9 or %ebx,%ecx
801011aa: 8b 5d e4 mov -0x1c(%ebp),%ebx
801011ad: 88 4c 13 5c mov %cl,0x5c(%ebx,%edx,1)
log_write(bp);
801011b1: 89 1c 24 mov %ebx,(%esp)
801011b4: e8 f7 1a 00 00 call 80102cb0 <log_write>
brelse(bp);
801011b9: 89 1c 24 mov %ebx,(%esp)
801011bc: e8 1f f0 ff ff call 801001e0 <brelse>
bp = bread(dev, bno);
801011c1: 8b 45 d8 mov -0x28(%ebp),%eax
801011c4: 89 74 24 04 mov %esi,0x4(%esp)
801011c8: 89 04 24 mov %eax,(%esp)
801011cb: e8 00 ef ff ff call 801000d0 <bread>
memset(bp->data, 0, BSIZE);
801011d0: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp)
801011d7: 00
801011d8: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
801011df: 00
bp = bread(dev, bno);
801011e0: 89 c3 mov %eax,%ebx
memset(bp->data, 0, BSIZE);
801011e2: 8d 40 5c lea 0x5c(%eax),%eax
801011e5: 89 04 24 mov %eax,(%esp)
801011e8: e8 93 30 00 00 call 80104280 <memset>
log_write(bp);
801011ed: 89 1c 24 mov %ebx,(%esp)
801011f0: e8 bb 1a 00 00 call 80102cb0 <log_write>
brelse(bp);
801011f5: 89 1c 24 mov %ebx,(%esp)
801011f8: e8 e3 ef ff ff call 801001e0 <brelse>
}
801011fd: 83 c4 2c add $0x2c,%esp
80101200: 89 f0 mov %esi,%eax
80101202: 5b pop %ebx
80101203: 5e pop %esi
80101204: 5f pop %edi
80101205: 5d pop %ebp
80101206: c3 ret
80101207: 89 f6 mov %esi,%esi
80101209: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101210 <iget>:
// Find the inode with number inum on device dev
// and return the in-memory copy. Does not lock
// the inode and does not read it from disk.
static struct inode*
iget(uint dev, uint inum)
{
80101210: 55 push %ebp
80101211: 89 e5 mov %esp,%ebp
80101213: 57 push %edi
80101214: 89 c7 mov %eax,%edi
80101216: 56 push %esi
struct inode *ip, *empty;
acquire(&icache.lock);
// Is the inode already cached?
empty = 0;
80101217: 31 f6 xor %esi,%esi
{
80101219: 53 push %ebx
for(ip = &icache.inode[0]; ip < &icache.inode[NINODE]; ip++){
8010121a: bb 14 0a 11 80 mov $0x80110a14,%ebx
{
8010121f: 83 ec 1c sub $0x1c,%esp
acquire(&icache.lock);
80101222: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
{
80101229: 89 55 e4 mov %edx,-0x1c(%ebp)
acquire(&icache.lock);
8010122c: e8 0f 2f 00 00 call 80104140 <acquire>
for(ip = &icache.inode[0]; ip < &icache.inode[NINODE]; ip++){
80101231: 8b 55 e4 mov -0x1c(%ebp),%edx
80101234: eb 14 jmp 8010124a <iget+0x3a>
80101236: 66 90 xchg %ax,%ax
if(ip->ref > 0 && ip->dev == dev && ip->inum == inum){
ip->ref++;
release(&icache.lock);
return ip;
}
if(empty == 0 && ip->ref == 0) // Remember empty slot.
80101238: 85 f6 test %esi,%esi
8010123a: 74 3c je 80101278 <iget+0x68>
for(ip = &icache.inode[0]; ip < &icache.inode[NINODE]; ip++){
8010123c: 81 c3 90 00 00 00 add $0x90,%ebx
80101242: 81 fb 34 26 11 80 cmp $0x80112634,%ebx
80101248: 74 46 je 80101290 <iget+0x80>
if(ip->ref > 0 && ip->dev == dev && ip->inum == inum){
8010124a: 8b 4b 08 mov 0x8(%ebx),%ecx
8010124d: 85 c9 test %ecx,%ecx
8010124f: 7e e7 jle 80101238 <iget+0x28>
80101251: 39 3b cmp %edi,(%ebx)
80101253: 75 e3 jne 80101238 <iget+0x28>
80101255: 39 53 04 cmp %edx,0x4(%ebx)
80101258: 75 de jne 80101238 <iget+0x28>
ip->ref++;
8010125a: 83 c1 01 add $0x1,%ecx
return ip;
8010125d: 89 de mov %ebx,%esi
release(&icache.lock);
8010125f: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
ip->ref++;
80101266: 89 4b 08 mov %ecx,0x8(%ebx)
release(&icache.lock);
80101269: e8 c2 2f 00 00 call 80104230 <release>
ip->ref = 1;
ip->valid = 0;
release(&icache.lock);
return ip;
}
8010126e: 83 c4 1c add $0x1c,%esp
80101271: 89 f0 mov %esi,%eax
80101273: 5b pop %ebx
80101274: 5e pop %esi
80101275: 5f pop %edi
80101276: 5d pop %ebp
80101277: c3 ret
80101278: 85 c9 test %ecx,%ecx
8010127a: 0f 44 f3 cmove %ebx,%esi
for(ip = &icache.inode[0]; ip < &icache.inode[NINODE]; ip++){
8010127d: 81 c3 90 00 00 00 add $0x90,%ebx
80101283: 81 fb 34 26 11 80 cmp $0x80112634,%ebx
80101289: 75 bf jne 8010124a <iget+0x3a>
8010128b: 90 nop
8010128c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
if(empty == 0)
80101290: 85 f6 test %esi,%esi
80101292: 74 29 je 801012bd <iget+0xad>
ip->dev = dev;
80101294: 89 3e mov %edi,(%esi)
ip->inum = inum;
80101296: 89 56 04 mov %edx,0x4(%esi)
ip->ref = 1;
80101299: c7 46 08 01 00 00 00 movl $0x1,0x8(%esi)
ip->valid = 0;
801012a0: c7 46 4c 00 00 00 00 movl $0x0,0x4c(%esi)
release(&icache.lock);
801012a7: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
801012ae: e8 7d 2f 00 00 call 80104230 <release>
}
801012b3: 83 c4 1c add $0x1c,%esp
801012b6: 89 f0 mov %esi,%eax
801012b8: 5b pop %ebx
801012b9: 5e pop %esi
801012ba: 5f pop %edi
801012bb: 5d pop %ebp
801012bc: c3 ret
panic("iget: no inodes");
801012bd: c7 04 24 64 6f 10 80 movl $0x80106f64,(%esp)
801012c4: e8 97 f0 ff ff call 80100360 <panic>
801012c9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
801012d0 <bmap>:
// Return the disk block address of the nth block in inode ip.
// If there is no such block, bmap allocates one.
static uint
bmap(struct inode *ip, uint bn)
{
801012d0: 55 push %ebp
801012d1: 89 e5 mov %esp,%ebp
801012d3: 57 push %edi
801012d4: 56 push %esi
801012d5: 53 push %ebx
801012d6: 89 c3 mov %eax,%ebx
801012d8: 83 ec 1c sub $0x1c,%esp
uint addr, *a;
struct buf *bp;
if(bn < NDIRECT){
801012db: 83 fa 0b cmp $0xb,%edx
801012de: 77 18 ja 801012f8 <bmap+0x28>
801012e0: 8d 34 90 lea (%eax,%edx,4),%esi
if((addr = ip->addrs[bn]) == 0)
801012e3: 8b 46 5c mov 0x5c(%esi),%eax
801012e6: 85 c0 test %eax,%eax
801012e8: 74 66 je 80101350 <bmap+0x80>
brelse(bp);
return addr;
}
panic("bmap: out of range");
}
801012ea: 83 c4 1c add $0x1c,%esp
801012ed: 5b pop %ebx
801012ee: 5e pop %esi
801012ef: 5f pop %edi
801012f0: 5d pop %ebp
801012f1: c3 ret
801012f2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
bn -= NDIRECT;
801012f8: 8d 72 f4 lea -0xc(%edx),%esi
if(bn < NINDIRECT){
801012fb: 83 fe 7f cmp $0x7f,%esi
801012fe: 77 77 ja 80101377 <bmap+0xa7>
if((addr = ip->addrs[NDIRECT]) == 0)
80101300: 8b 80 8c 00 00 00 mov 0x8c(%eax),%eax
80101306: 85 c0 test %eax,%eax
80101308: 74 5e je 80101368 <bmap+0x98>
bp = bread(ip->dev, addr);
8010130a: 89 44 24 04 mov %eax,0x4(%esp)
8010130e: 8b 03 mov (%ebx),%eax
80101310: 89 04 24 mov %eax,(%esp)
80101313: e8 b8 ed ff ff call 801000d0 <bread>
if((addr = a[bn]) == 0){
80101318: 8d 54 b0 5c lea 0x5c(%eax,%esi,4),%edx
bp = bread(ip->dev, addr);
8010131c: 89 c7 mov %eax,%edi
if((addr = a[bn]) == 0){
8010131e: 8b 32 mov (%edx),%esi
80101320: 85 f6 test %esi,%esi
80101322: 75 19 jne 8010133d <bmap+0x6d>
a[bn] = addr = balloc(ip->dev);
80101324: 8b 03 mov (%ebx),%eax
80101326: 89 55 e4 mov %edx,-0x1c(%ebp)
80101329: e8 c2 fd ff ff call 801010f0 <balloc>
8010132e: 8b 55 e4 mov -0x1c(%ebp),%edx
80101331: 89 02 mov %eax,(%edx)
80101333: 89 c6 mov %eax,%esi
log_write(bp);
80101335: 89 3c 24 mov %edi,(%esp)
80101338: e8 73 19 00 00 call 80102cb0 <log_write>
brelse(bp);
8010133d: 89 3c 24 mov %edi,(%esp)
80101340: e8 9b ee ff ff call 801001e0 <brelse>
}
80101345: 83 c4 1c add $0x1c,%esp
brelse(bp);
80101348: 89 f0 mov %esi,%eax
}
8010134a: 5b pop %ebx
8010134b: 5e pop %esi
8010134c: 5f pop %edi
8010134d: 5d pop %ebp
8010134e: c3 ret
8010134f: 90 nop
ip->addrs[bn] = addr = balloc(ip->dev);
80101350: 8b 03 mov (%ebx),%eax
80101352: e8 99 fd ff ff call 801010f0 <balloc>
80101357: 89 46 5c mov %eax,0x5c(%esi)
}
8010135a: 83 c4 1c add $0x1c,%esp
8010135d: 5b pop %ebx
8010135e: 5e pop %esi
8010135f: 5f pop %edi
80101360: 5d pop %ebp
80101361: c3 ret
80101362: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
ip->addrs[NDIRECT] = addr = balloc(ip->dev);
80101368: 8b 03 mov (%ebx),%eax
8010136a: e8 81 fd ff ff call 801010f0 <balloc>
8010136f: 89 83 8c 00 00 00 mov %eax,0x8c(%ebx)
80101375: eb 93 jmp 8010130a <bmap+0x3a>
panic("bmap: out of range");
80101377: c7 04 24 74 6f 10 80 movl $0x80106f74,(%esp)
8010137e: e8 dd ef ff ff call 80100360 <panic>
80101383: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80101389: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101390 <readsb>:
{
80101390: 55 push %ebp
80101391: 89 e5 mov %esp,%ebp
80101393: 56 push %esi
80101394: 53 push %ebx
80101395: 83 ec 10 sub $0x10,%esp
bp = bread(dev, 1);
80101398: 8b 45 08 mov 0x8(%ebp),%eax
8010139b: c7 44 24 04 01 00 00 movl $0x1,0x4(%esp)
801013a2: 00
{
801013a3: 8b 75 0c mov 0xc(%ebp),%esi
bp = bread(dev, 1);
801013a6: 89 04 24 mov %eax,(%esp)
801013a9: e8 22 ed ff ff call 801000d0 <bread>
memmove(sb, bp->data, sizeof(*sb));
801013ae: 89 34 24 mov %esi,(%esp)
801013b1: c7 44 24 08 1c 00 00 movl $0x1c,0x8(%esp)
801013b8: 00
bp = bread(dev, 1);
801013b9: 89 c3 mov %eax,%ebx
memmove(sb, bp->data, sizeof(*sb));
801013bb: 8d 40 5c lea 0x5c(%eax),%eax
801013be: 89 44 24 04 mov %eax,0x4(%esp)
801013c2: e8 59 2f 00 00 call 80104320 <memmove>
brelse(bp);
801013c7: 89 5d 08 mov %ebx,0x8(%ebp)
}
801013ca: 83 c4 10 add $0x10,%esp
801013cd: 5b pop %ebx
801013ce: 5e pop %esi
801013cf: 5d pop %ebp
brelse(bp);
801013d0: e9 0b ee ff ff jmp 801001e0 <brelse>
801013d5: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801013d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801013e0 <bfree>:
{
801013e0: 55 push %ebp
801013e1: 89 e5 mov %esp,%ebp
801013e3: 57 push %edi
801013e4: 89 d7 mov %edx,%edi
801013e6: 56 push %esi
801013e7: 53 push %ebx
801013e8: 89 c3 mov %eax,%ebx
801013ea: 83 ec 1c sub $0x1c,%esp
readsb(dev, &sb);
801013ed: 89 04 24 mov %eax,(%esp)
801013f0: c7 44 24 04 c0 09 11 movl $0x801109c0,0x4(%esp)
801013f7: 80
801013f8: e8 93 ff ff ff call 80101390 <readsb>
bp = bread(dev, BBLOCK(b, sb));
801013fd: 89 fa mov %edi,%edx
801013ff: c1 ea 0c shr $0xc,%edx
80101402: 03 15 d8 09 11 80 add 0x801109d8,%edx
80101408: 89 1c 24 mov %ebx,(%esp)
m = 1 << (bi % 8);
8010140b: bb 01 00 00 00 mov $0x1,%ebx
bp = bread(dev, BBLOCK(b, sb));
80101410: 89 54 24 04 mov %edx,0x4(%esp)
80101414: e8 b7 ec ff ff call 801000d0 <bread>
m = 1 << (bi % 8);
80101419: 89 f9 mov %edi,%ecx
bi = b % BPB;
8010141b: 81 e7 ff 0f 00 00 and $0xfff,%edi
80101421: 89 fa mov %edi,%edx
m = 1 << (bi % 8);
80101423: 83 e1 07 and $0x7,%ecx
if((bp->data[bi/8] & m) == 0)
80101426: c1 fa 03 sar $0x3,%edx
m = 1 << (bi % 8);
80101429: d3 e3 shl %cl,%ebx
bp = bread(dev, BBLOCK(b, sb));
8010142b: 89 c6 mov %eax,%esi
if((bp->data[bi/8] & m) == 0)
8010142d: 0f b6 44 10 5c movzbl 0x5c(%eax,%edx,1),%eax
80101432: 0f b6 c8 movzbl %al,%ecx
80101435: 85 d9 test %ebx,%ecx
80101437: 74 20 je 80101459 <bfree+0x79>
bp->data[bi/8] &= ~m;
80101439: f7 d3 not %ebx
8010143b: 21 c3 and %eax,%ebx
8010143d: 88 5c 16 5c mov %bl,0x5c(%esi,%edx,1)
log_write(bp);
80101441: 89 34 24 mov %esi,(%esp)
80101444: e8 67 18 00 00 call 80102cb0 <log_write>
brelse(bp);
80101449: 89 34 24 mov %esi,(%esp)
8010144c: e8 8f ed ff ff call 801001e0 <brelse>
}
80101451: 83 c4 1c add $0x1c,%esp
80101454: 5b pop %ebx
80101455: 5e pop %esi
80101456: 5f pop %edi
80101457: 5d pop %ebp
80101458: c3 ret
panic("freeing free block");
80101459: c7 04 24 87 6f 10 80 movl $0x80106f87,(%esp)
80101460: e8 fb ee ff ff call 80100360 <panic>
80101465: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80101469: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101470 <iinit>:
{
80101470: 55 push %ebp
80101471: 89 e5 mov %esp,%ebp
80101473: 53 push %ebx
80101474: bb 20 0a 11 80 mov $0x80110a20,%ebx
80101479: 83 ec 24 sub $0x24,%esp
initlock(&icache.lock, "icache");
8010147c: c7 44 24 04 9a 6f 10 movl $0x80106f9a,0x4(%esp)
80101483: 80
80101484: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
8010148b: e8 c0 2b 00 00 call 80104050 <initlock>
initsleeplock(&icache.inode[i].lock, "inode");
80101490: 89 1c 24 mov %ebx,(%esp)
80101493: 81 c3 90 00 00 00 add $0x90,%ebx
80101499: c7 44 24 04 a1 6f 10 movl $0x80106fa1,0x4(%esp)
801014a0: 80
801014a1: e8 9a 2a 00 00 call 80103f40 <initsleeplock>
for(i = 0; i < NINODE; i++) {
801014a6: 81 fb 40 26 11 80 cmp $0x80112640,%ebx
801014ac: 75 e2 jne 80101490 <iinit+0x20>
readsb(dev, &sb);
801014ae: 8b 45 08 mov 0x8(%ebp),%eax
801014b1: c7 44 24 04 c0 09 11 movl $0x801109c0,0x4(%esp)
801014b8: 80
801014b9: 89 04 24 mov %eax,(%esp)
801014bc: e8 cf fe ff ff call 80101390 <readsb>
cprintf("sb: size %d nblocks %d ninodes %d nlog %d logstart %d\
801014c1: a1 d8 09 11 80 mov 0x801109d8,%eax
801014c6: c7 04 24 04 70 10 80 movl $0x80107004,(%esp)
801014cd: 89 44 24 1c mov %eax,0x1c(%esp)
801014d1: a1 d4 09 11 80 mov 0x801109d4,%eax
801014d6: 89 44 24 18 mov %eax,0x18(%esp)
801014da: a1 d0 09 11 80 mov 0x801109d0,%eax
801014df: 89 44 24 14 mov %eax,0x14(%esp)
801014e3: a1 cc 09 11 80 mov 0x801109cc,%eax
801014e8: 89 44 24 10 mov %eax,0x10(%esp)
801014ec: a1 c8 09 11 80 mov 0x801109c8,%eax
801014f1: 89 44 24 0c mov %eax,0xc(%esp)
801014f5: a1 c4 09 11 80 mov 0x801109c4,%eax
801014fa: 89 44 24 08 mov %eax,0x8(%esp)
801014fe: a1 c0 09 11 80 mov 0x801109c0,%eax
80101503: 89 44 24 04 mov %eax,0x4(%esp)
80101507: e8 44 f1 ff ff call 80100650 <cprintf>
}
8010150c: 83 c4 24 add $0x24,%esp
8010150f: 5b pop %ebx
80101510: 5d pop %ebp
80101511: c3 ret
80101512: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80101519: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101520 <ialloc>:
{
80101520: 55 push %ebp
80101521: 89 e5 mov %esp,%ebp
80101523: 57 push %edi
80101524: 56 push %esi
80101525: 53 push %ebx
80101526: 83 ec 2c sub $0x2c,%esp
80101529: 8b 45 0c mov 0xc(%ebp),%eax
for(inum = 1; inum < sb.ninodes; inum++){
8010152c: 83 3d c8 09 11 80 01 cmpl $0x1,0x801109c8
{
80101533: 8b 7d 08 mov 0x8(%ebp),%edi
80101536: 89 45 e4 mov %eax,-0x1c(%ebp)
for(inum = 1; inum < sb.ninodes; inum++){
80101539: 0f 86 a2 00 00 00 jbe 801015e1 <ialloc+0xc1>
8010153f: be 01 00 00 00 mov $0x1,%esi
80101544: bb 01 00 00 00 mov $0x1,%ebx
80101549: eb 1a jmp 80101565 <ialloc+0x45>
8010154b: 90 nop
8010154c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
brelse(bp);
80101550: 89 14 24 mov %edx,(%esp)
for(inum = 1; inum < sb.ninodes; inum++){
80101553: 83 c3 01 add $0x1,%ebx
brelse(bp);
80101556: e8 85 ec ff ff call 801001e0 <brelse>
for(inum = 1; inum < sb.ninodes; inum++){
8010155b: 89 de mov %ebx,%esi
8010155d: 3b 1d c8 09 11 80 cmp 0x801109c8,%ebx
80101563: 73 7c jae 801015e1 <ialloc+0xc1>
bp = bread(dev, IBLOCK(inum, sb));
80101565: 89 f0 mov %esi,%eax
80101567: c1 e8 03 shr $0x3,%eax
8010156a: 03 05 d4 09 11 80 add 0x801109d4,%eax
80101570: 89 3c 24 mov %edi,(%esp)
80101573: 89 44 24 04 mov %eax,0x4(%esp)
80101577: e8 54 eb ff ff call 801000d0 <bread>
8010157c: 89 c2 mov %eax,%edx
dip = (struct dinode*)bp->data + inum%IPB;
8010157e: 89 f0 mov %esi,%eax
80101580: 83 e0 07 and $0x7,%eax
80101583: c1 e0 06 shl $0x6,%eax
80101586: 8d 4c 02 5c lea 0x5c(%edx,%eax,1),%ecx
if(dip->type == 0){ // a free inode
8010158a: 66 83 39 00 cmpw $0x0,(%ecx)
8010158e: 75 c0 jne 80101550 <ialloc+0x30>
memset(dip, 0, sizeof(*dip));
80101590: 89 0c 24 mov %ecx,(%esp)
80101593: c7 44 24 08 40 00 00 movl $0x40,0x8(%esp)
8010159a: 00
8010159b: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
801015a2: 00
801015a3: 89 55 dc mov %edx,-0x24(%ebp)
801015a6: 89 4d e0 mov %ecx,-0x20(%ebp)
801015a9: e8 d2 2c 00 00 call 80104280 <memset>
dip->type = type;
801015ae: 0f b7 45 e4 movzwl -0x1c(%ebp),%eax
log_write(bp); // mark it allocated on the disk
801015b2: 8b 55 dc mov -0x24(%ebp),%edx
dip->type = type;
801015b5: 8b 4d e0 mov -0x20(%ebp),%ecx
log_write(bp); // mark it allocated on the disk
801015b8: 89 55 e4 mov %edx,-0x1c(%ebp)
dip->type = type;
801015bb: 66 89 01 mov %ax,(%ecx)
log_write(bp); // mark it allocated on the disk
801015be: 89 14 24 mov %edx,(%esp)
801015c1: e8 ea 16 00 00 call 80102cb0 <log_write>
brelse(bp);
801015c6: 8b 55 e4 mov -0x1c(%ebp),%edx
801015c9: 89 14 24 mov %edx,(%esp)
801015cc: e8 0f ec ff ff call 801001e0 <brelse>
}
801015d1: 83 c4 2c add $0x2c,%esp
return iget(dev, inum);
801015d4: 89 f2 mov %esi,%edx
}
801015d6: 5b pop %ebx
return iget(dev, inum);
801015d7: 89 f8 mov %edi,%eax
}
801015d9: 5e pop %esi
801015da: 5f pop %edi
801015db: 5d pop %ebp
return iget(dev, inum);
801015dc: e9 2f fc ff ff jmp 80101210 <iget>
panic("ialloc: no inodes");
801015e1: c7 04 24 a7 6f 10 80 movl $0x80106fa7,(%esp)
801015e8: e8 73 ed ff ff call 80100360 <panic>
801015ed: 8d 76 00 lea 0x0(%esi),%esi
801015f0 <iupdate>:
{
801015f0: 55 push %ebp
801015f1: 89 e5 mov %esp,%ebp
801015f3: 56 push %esi
801015f4: 53 push %ebx
801015f5: 83 ec 10 sub $0x10,%esp
801015f8: 8b 5d 08 mov 0x8(%ebp),%ebx
bp = bread(ip->dev, IBLOCK(ip->inum, sb));
801015fb: 8b 43 04 mov 0x4(%ebx),%eax
memmove(dip->addrs, ip->addrs, sizeof(ip->addrs));
801015fe: 83 c3 5c add $0x5c,%ebx
bp = bread(ip->dev, IBLOCK(ip->inum, sb));
80101601: c1 e8 03 shr $0x3,%eax
80101604: 03 05 d4 09 11 80 add 0x801109d4,%eax
8010160a: 89 44 24 04 mov %eax,0x4(%esp)
8010160e: 8b 43 a4 mov -0x5c(%ebx),%eax
80101611: 89 04 24 mov %eax,(%esp)
80101614: e8 b7 ea ff ff call 801000d0 <bread>
dip = (struct dinode*)bp->data + ip->inum%IPB;
80101619: 8b 53 a8 mov -0x58(%ebx),%edx
8010161c: 83 e2 07 and $0x7,%edx
8010161f: c1 e2 06 shl $0x6,%edx
80101622: 8d 54 10 5c lea 0x5c(%eax,%edx,1),%edx
bp = bread(ip->dev, IBLOCK(ip->inum, sb));
80101626: 89 c6 mov %eax,%esi
dip->type = ip->type;
80101628: 0f b7 43 f4 movzwl -0xc(%ebx),%eax
memmove(dip->addrs, ip->addrs, sizeof(ip->addrs));
8010162c: 83 c2 0c add $0xc,%edx
dip->type = ip->type;
8010162f: 66 89 42 f4 mov %ax,-0xc(%edx)
dip->major = ip->major;
80101633: 0f b7 43 f6 movzwl -0xa(%ebx),%eax
80101637: 66 89 42 f6 mov %ax,-0xa(%edx)
dip->minor = ip->minor;
8010163b: 0f b7 43 f8 movzwl -0x8(%ebx),%eax
8010163f: 66 89 42 f8 mov %ax,-0x8(%edx)
dip->nlink = ip->nlink;
80101643: 0f b7 43 fa movzwl -0x6(%ebx),%eax
80101647: 66 89 42 fa mov %ax,-0x6(%edx)
dip->size = ip->size;
8010164b: 8b 43 fc mov -0x4(%ebx),%eax
8010164e: 89 42 fc mov %eax,-0x4(%edx)
memmove(dip->addrs, ip->addrs, sizeof(ip->addrs));
80101651: 89 5c 24 04 mov %ebx,0x4(%esp)
80101655: 89 14 24 mov %edx,(%esp)
80101658: c7 44 24 08 34 00 00 movl $0x34,0x8(%esp)
8010165f: 00
80101660: e8 bb 2c 00 00 call 80104320 <memmove>
log_write(bp);
80101665: 89 34 24 mov %esi,(%esp)
80101668: e8 43 16 00 00 call 80102cb0 <log_write>
brelse(bp);
8010166d: 89 75 08 mov %esi,0x8(%ebp)
}
80101670: 83 c4 10 add $0x10,%esp
80101673: 5b pop %ebx
80101674: 5e pop %esi
80101675: 5d pop %ebp
brelse(bp);
80101676: e9 65 eb ff ff jmp 801001e0 <brelse>
8010167b: 90 nop
8010167c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80101680 <idup>:
{
80101680: 55 push %ebp
80101681: 89 e5 mov %esp,%ebp
80101683: 53 push %ebx
80101684: 83 ec 14 sub $0x14,%esp
80101687: 8b 5d 08 mov 0x8(%ebp),%ebx
acquire(&icache.lock);
8010168a: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
80101691: e8 aa 2a 00 00 call 80104140 <acquire>
ip->ref++;
80101696: 83 43 08 01 addl $0x1,0x8(%ebx)
release(&icache.lock);
8010169a: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
801016a1: e8 8a 2b 00 00 call 80104230 <release>
}
801016a6: 83 c4 14 add $0x14,%esp
801016a9: 89 d8 mov %ebx,%eax
801016ab: 5b pop %ebx
801016ac: 5d pop %ebp
801016ad: c3 ret
801016ae: 66 90 xchg %ax,%ax
801016b0 <ilock>:
{
801016b0: 55 push %ebp
801016b1: 89 e5 mov %esp,%ebp
801016b3: 56 push %esi
801016b4: 53 push %ebx
801016b5: 83 ec 10 sub $0x10,%esp
801016b8: 8b 5d 08 mov 0x8(%ebp),%ebx
if(ip == 0 || ip->ref < 1)
801016bb: 85 db test %ebx,%ebx
801016bd: 0f 84 b3 00 00 00 je 80101776 <ilock+0xc6>
801016c3: 8b 53 08 mov 0x8(%ebx),%edx
801016c6: 85 d2 test %edx,%edx
801016c8: 0f 8e a8 00 00 00 jle 80101776 <ilock+0xc6>
acquiresleep(&ip->lock);
801016ce: 8d 43 0c lea 0xc(%ebx),%eax
801016d1: 89 04 24 mov %eax,(%esp)
801016d4: e8 a7 28 00 00 call 80103f80 <acquiresleep>
if(ip->valid == 0){
801016d9: 8b 43 4c mov 0x4c(%ebx),%eax
801016dc: 85 c0 test %eax,%eax
801016de: 74 08 je 801016e8 <ilock+0x38>
}
801016e0: 83 c4 10 add $0x10,%esp
801016e3: 5b pop %ebx
801016e4: 5e pop %esi
801016e5: 5d pop %ebp
801016e6: c3 ret
801016e7: 90 nop
bp = bread(ip->dev, IBLOCK(ip->inum, sb));
801016e8: 8b 43 04 mov 0x4(%ebx),%eax
801016eb: c1 e8 03 shr $0x3,%eax
801016ee: 03 05 d4 09 11 80 add 0x801109d4,%eax
801016f4: 89 44 24 04 mov %eax,0x4(%esp)
801016f8: 8b 03 mov (%ebx),%eax
801016fa: 89 04 24 mov %eax,(%esp)
801016fd: e8 ce e9 ff ff call 801000d0 <bread>
dip = (struct dinode*)bp->data + ip->inum%IPB;
80101702: 8b 53 04 mov 0x4(%ebx),%edx
80101705: 83 e2 07 and $0x7,%edx
80101708: c1 e2 06 shl $0x6,%edx
8010170b: 8d 54 10 5c lea 0x5c(%eax,%edx,1),%edx
bp = bread(ip->dev, IBLOCK(ip->inum, sb));
8010170f: 89 c6 mov %eax,%esi
ip->type = dip->type;
80101711: 0f b7 02 movzwl (%edx),%eax
memmove(ip->addrs, dip->addrs, sizeof(ip->addrs));
80101714: 83 c2 0c add $0xc,%edx
ip->type = dip->type;
80101717: 66 89 43 50 mov %ax,0x50(%ebx)
ip->major = dip->major;
8010171b: 0f b7 42 f6 movzwl -0xa(%edx),%eax
8010171f: 66 89 43 52 mov %ax,0x52(%ebx)
ip->minor = dip->minor;
80101723: 0f b7 42 f8 movzwl -0x8(%edx),%eax
80101727: 66 89 43 54 mov %ax,0x54(%ebx)
ip->nlink = dip->nlink;
8010172b: 0f b7 42 fa movzwl -0x6(%edx),%eax
8010172f: 66 89 43 56 mov %ax,0x56(%ebx)
ip->size = dip->size;
80101733: 8b 42 fc mov -0x4(%edx),%eax
80101736: 89 43 58 mov %eax,0x58(%ebx)
memmove(ip->addrs, dip->addrs, sizeof(ip->addrs));
80101739: 8d 43 5c lea 0x5c(%ebx),%eax
8010173c: 89 54 24 04 mov %edx,0x4(%esp)
80101740: c7 44 24 08 34 00 00 movl $0x34,0x8(%esp)
80101747: 00
80101748: 89 04 24 mov %eax,(%esp)
8010174b: e8 d0 2b 00 00 call 80104320 <memmove>
brelse(bp);
80101750: 89 34 24 mov %esi,(%esp)
80101753: e8 88 ea ff ff call 801001e0 <brelse>
if(ip->type == 0)
80101758: 66 83 7b 50 00 cmpw $0x0,0x50(%ebx)
ip->valid = 1;
8010175d: c7 43 4c 01 00 00 00 movl $0x1,0x4c(%ebx)
if(ip->type == 0)
80101764: 0f 85 76 ff ff ff jne 801016e0 <ilock+0x30>
panic("ilock: no type");
8010176a: c7 04 24 bf 6f 10 80 movl $0x80106fbf,(%esp)
80101771: e8 ea eb ff ff call 80100360 <panic>
panic("ilock");
80101776: c7 04 24 b9 6f 10 80 movl $0x80106fb9,(%esp)
8010177d: e8 de eb ff ff call 80100360 <panic>
80101782: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80101789: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101790 <iunlock>:
{
80101790: 55 push %ebp
80101791: 89 e5 mov %esp,%ebp
80101793: 56 push %esi
80101794: 53 push %ebx
80101795: 83 ec 10 sub $0x10,%esp
80101798: 8b 5d 08 mov 0x8(%ebp),%ebx
if(ip == 0 || !holdingsleep(&ip->lock) || ip->ref < 1)
8010179b: 85 db test %ebx,%ebx
8010179d: 74 24 je 801017c3 <iunlock+0x33>
8010179f: 8d 73 0c lea 0xc(%ebx),%esi
801017a2: 89 34 24 mov %esi,(%esp)
801017a5: e8 76 28 00 00 call 80104020 <holdingsleep>
801017aa: 85 c0 test %eax,%eax
801017ac: 74 15 je 801017c3 <iunlock+0x33>
801017ae: 8b 43 08 mov 0x8(%ebx),%eax
801017b1: 85 c0 test %eax,%eax
801017b3: 7e 0e jle 801017c3 <iunlock+0x33>
releasesleep(&ip->lock);
801017b5: 89 75 08 mov %esi,0x8(%ebp)
}
801017b8: 83 c4 10 add $0x10,%esp
801017bb: 5b pop %ebx
801017bc: 5e pop %esi
801017bd: 5d pop %ebp
releasesleep(&ip->lock);
801017be: e9 1d 28 00 00 jmp 80103fe0 <releasesleep>
panic("iunlock");
801017c3: c7 04 24 ce 6f 10 80 movl $0x80106fce,(%esp)
801017ca: e8 91 eb ff ff call 80100360 <panic>
801017cf: 90 nop
801017d0 <iput>:
{
801017d0: 55 push %ebp
801017d1: 89 e5 mov %esp,%ebp
801017d3: 57 push %edi
801017d4: 56 push %esi
801017d5: 53 push %ebx
801017d6: 83 ec 1c sub $0x1c,%esp
801017d9: 8b 75 08 mov 0x8(%ebp),%esi
acquiresleep(&ip->lock);
801017dc: 8d 7e 0c lea 0xc(%esi),%edi
801017df: 89 3c 24 mov %edi,(%esp)
801017e2: e8 99 27 00 00 call 80103f80 <acquiresleep>
if(ip->valid && ip->nlink == 0){
801017e7: 8b 56 4c mov 0x4c(%esi),%edx
801017ea: 85 d2 test %edx,%edx
801017ec: 74 07 je 801017f5 <iput+0x25>
801017ee: 66 83 7e 56 00 cmpw $0x0,0x56(%esi)
801017f3: 74 2b je 80101820 <iput+0x50>
releasesleep(&ip->lock);
801017f5: 89 3c 24 mov %edi,(%esp)
801017f8: e8 e3 27 00 00 call 80103fe0 <releasesleep>
acquire(&icache.lock);
801017fd: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
80101804: e8 37 29 00 00 call 80104140 <acquire>
ip->ref--;
80101809: 83 6e 08 01 subl $0x1,0x8(%esi)
release(&icache.lock);
8010180d: c7 45 08 e0 09 11 80 movl $0x801109e0,0x8(%ebp)
}
80101814: 83 c4 1c add $0x1c,%esp
80101817: 5b pop %ebx
80101818: 5e pop %esi
80101819: 5f pop %edi
8010181a: 5d pop %ebp
release(&icache.lock);
8010181b: e9 10 2a 00 00 jmp 80104230 <release>
acquire(&icache.lock);
80101820: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
80101827: e8 14 29 00 00 call 80104140 <acquire>
int r = ip->ref;
8010182c: 8b 5e 08 mov 0x8(%esi),%ebx
release(&icache.lock);
8010182f: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
80101836: e8 f5 29 00 00 call 80104230 <release>
if(r == 1){
8010183b: 83 fb 01 cmp $0x1,%ebx
8010183e: 75 b5 jne 801017f5 <iput+0x25>
80101840: 8d 4e 30 lea 0x30(%esi),%ecx
80101843: 89 f3 mov %esi,%ebx
80101845: 89 7d e4 mov %edi,-0x1c(%ebp)
80101848: 89 cf mov %ecx,%edi
8010184a: eb 0b jmp 80101857 <iput+0x87>
8010184c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80101850: 83 c3 04 add $0x4,%ebx
{
int i, j;
struct buf *bp;
uint *a;
for(i = 0; i < NDIRECT; i++){
80101853: 39 fb cmp %edi,%ebx
80101855: 74 19 je 80101870 <iput+0xa0>
if(ip->addrs[i]){
80101857: 8b 53 5c mov 0x5c(%ebx),%edx
8010185a: 85 d2 test %edx,%edx
8010185c: 74 f2 je 80101850 <iput+0x80>
bfree(ip->dev, ip->addrs[i]);
8010185e: 8b 06 mov (%esi),%eax
80101860: e8 7b fb ff ff call 801013e0 <bfree>
ip->addrs[i] = 0;
80101865: c7 43 5c 00 00 00 00 movl $0x0,0x5c(%ebx)
8010186c: eb e2 jmp 80101850 <iput+0x80>
8010186e: 66 90 xchg %ax,%ax
}
}
if(ip->addrs[NDIRECT]){
80101870: 8b 86 8c 00 00 00 mov 0x8c(%esi),%eax
80101876: 8b 7d e4 mov -0x1c(%ebp),%edi
80101879: 85 c0 test %eax,%eax
8010187b: 75 2b jne 801018a8 <iput+0xd8>
brelse(bp);
bfree(ip->dev, ip->addrs[NDIRECT]);
ip->addrs[NDIRECT] = 0;
}
ip->size = 0;
8010187d: c7 46 58 00 00 00 00 movl $0x0,0x58(%esi)
iupdate(ip);
80101884: 89 34 24 mov %esi,(%esp)
80101887: e8 64 fd ff ff call 801015f0 <iupdate>
ip->type = 0;
8010188c: 31 c0 xor %eax,%eax
8010188e: 66 89 46 50 mov %ax,0x50(%esi)
iupdate(ip);
80101892: 89 34 24 mov %esi,(%esp)
80101895: e8 56 fd ff ff call 801015f0 <iupdate>
ip->valid = 0;
8010189a: c7 46 4c 00 00 00 00 movl $0x0,0x4c(%esi)
801018a1: e9 4f ff ff ff jmp 801017f5 <iput+0x25>
801018a6: 66 90 xchg %ax,%ax
bp = bread(ip->dev, ip->addrs[NDIRECT]);
801018a8: 89 44 24 04 mov %eax,0x4(%esp)
801018ac: 8b 06 mov (%esi),%eax
for(j = 0; j < NINDIRECT; j++){
801018ae: 31 db xor %ebx,%ebx
bp = bread(ip->dev, ip->addrs[NDIRECT]);
801018b0: 89 04 24 mov %eax,(%esp)
801018b3: e8 18 e8 ff ff call 801000d0 <bread>
for(j = 0; j < NINDIRECT; j++){
801018b8: 89 7d e0 mov %edi,-0x20(%ebp)
a = (uint*)bp->data;
801018bb: 8d 48 5c lea 0x5c(%eax),%ecx
bp = bread(ip->dev, ip->addrs[NDIRECT]);
801018be: 89 45 e4 mov %eax,-0x1c(%ebp)
for(j = 0; j < NINDIRECT; j++){
801018c1: 89 cf mov %ecx,%edi
801018c3: 31 c0 xor %eax,%eax
801018c5: eb 0e jmp 801018d5 <iput+0x105>
801018c7: 90 nop
801018c8: 83 c3 01 add $0x1,%ebx
801018cb: 81 fb 80 00 00 00 cmp $0x80,%ebx
801018d1: 89 d8 mov %ebx,%eax
801018d3: 74 10 je 801018e5 <iput+0x115>
if(a[j])
801018d5: 8b 14 87 mov (%edi,%eax,4),%edx
801018d8: 85 d2 test %edx,%edx
801018da: 74 ec je 801018c8 <iput+0xf8>
bfree(ip->dev, a[j]);
801018dc: 8b 06 mov (%esi),%eax
801018de: e8 fd fa ff ff call 801013e0 <bfree>
801018e3: eb e3 jmp 801018c8 <iput+0xf8>
brelse(bp);
801018e5: 8b 45 e4 mov -0x1c(%ebp),%eax
801018e8: 8b 7d e0 mov -0x20(%ebp),%edi
801018eb: 89 04 24 mov %eax,(%esp)
801018ee: e8 ed e8 ff ff call 801001e0 <brelse>
bfree(ip->dev, ip->addrs[NDIRECT]);
801018f3: 8b 96 8c 00 00 00 mov 0x8c(%esi),%edx
801018f9: 8b 06 mov (%esi),%eax
801018fb: e8 e0 fa ff ff call 801013e0 <bfree>
ip->addrs[NDIRECT] = 0;
80101900: c7 86 8c 00 00 00 00 movl $0x0,0x8c(%esi)
80101907: 00 00 00
8010190a: e9 6e ff ff ff jmp 8010187d <iput+0xad>
8010190f: 90 nop
80101910 <iunlockput>:
{
80101910: 55 push %ebp
80101911: 89 e5 mov %esp,%ebp
80101913: 53 push %ebx
80101914: 83 ec 14 sub $0x14,%esp
80101917: 8b 5d 08 mov 0x8(%ebp),%ebx
iunlock(ip);
8010191a: 89 1c 24 mov %ebx,(%esp)
8010191d: e8 6e fe ff ff call 80101790 <iunlock>
iput(ip);
80101922: 89 5d 08 mov %ebx,0x8(%ebp)
}
80101925: 83 c4 14 add $0x14,%esp
80101928: 5b pop %ebx
80101929: 5d pop %ebp
iput(ip);
8010192a: e9 a1 fe ff ff jmp 801017d0 <iput>
8010192f: 90 nop
80101930 <stati>:
// Copy stat information from inode.
// Caller must hold ip->lock.
void
stati(struct inode *ip, struct stat *st)
{
80101930: 55 push %ebp
80101931: 89 e5 mov %esp,%ebp
80101933: 8b 55 08 mov 0x8(%ebp),%edx
80101936: 8b 45 0c mov 0xc(%ebp),%eax
st->dev = ip->dev;
80101939: 8b 0a mov (%edx),%ecx
8010193b: 89 48 04 mov %ecx,0x4(%eax)
st->ino = ip->inum;
8010193e: 8b 4a 04 mov 0x4(%edx),%ecx
80101941: 89 48 08 mov %ecx,0x8(%eax)
st->type = ip->type;
80101944: 0f b7 4a 50 movzwl 0x50(%edx),%ecx
80101948: 66 89 08 mov %cx,(%eax)
st->nlink = ip->nlink;
8010194b: 0f b7 4a 56 movzwl 0x56(%edx),%ecx
8010194f: 66 89 48 0c mov %cx,0xc(%eax)
st->size = ip->size;
80101953: 8b 52 58 mov 0x58(%edx),%edx
80101956: 89 50 10 mov %edx,0x10(%eax)
}
80101959: 5d pop %ebp
8010195a: c3 ret
8010195b: 90 nop
8010195c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80101960 <readi>:
//PAGEBREAK!
// Read data from inode.
// Caller must hold ip->lock.
int
readi(struct inode *ip, char *dst, uint off, uint n)
{
80101960: 55 push %ebp
80101961: 89 e5 mov %esp,%ebp
80101963: 57 push %edi
80101964: 56 push %esi
80101965: 53 push %ebx
80101966: 83 ec 2c sub $0x2c,%esp
80101969: 8b 45 0c mov 0xc(%ebp),%eax
8010196c: 8b 7d 08 mov 0x8(%ebp),%edi
8010196f: 8b 75 10 mov 0x10(%ebp),%esi
80101972: 89 45 e0 mov %eax,-0x20(%ebp)
80101975: 8b 45 14 mov 0x14(%ebp),%eax
uint tot, m;
struct buf *bp;
if(ip->type == T_DEV){
80101978: 66 83 7f 50 03 cmpw $0x3,0x50(%edi)
{
8010197d: 89 45 e4 mov %eax,-0x1c(%ebp)
if(ip->type == T_DEV){
80101980: 0f 84 aa 00 00 00 je 80101a30 <readi+0xd0>
if(ip->major < 0 || ip->major >= NDEV || !devsw[ip->major].read)
return -1;
return devsw[ip->major].read(ip, dst, n);
}
if(off > ip->size || off + n < off)
80101986: 8b 47 58 mov 0x58(%edi),%eax
80101989: 39 f0 cmp %esi,%eax
8010198b: 0f 82 c7 00 00 00 jb 80101a58 <readi+0xf8>
80101991: 8b 5d e4 mov -0x1c(%ebp),%ebx
80101994: 89 da mov %ebx,%edx
80101996: 01 f2 add %esi,%edx
80101998: 0f 82 ba 00 00 00 jb 80101a58 <readi+0xf8>
return -1;
if(off + n > ip->size)
n = ip->size - off;
8010199e: 89 c1 mov %eax,%ecx
801019a0: 29 f1 sub %esi,%ecx
801019a2: 39 d0 cmp %edx,%eax
801019a4: 0f 43 cb cmovae %ebx,%ecx
for(tot=0; tot<n; tot+=m, off+=m, dst+=m){
801019a7: 31 c0 xor %eax,%eax
801019a9: 85 c9 test %ecx,%ecx
n = ip->size - off;
801019ab: 89 4d e4 mov %ecx,-0x1c(%ebp)
for(tot=0; tot<n; tot+=m, off+=m, dst+=m){
801019ae: 74 70 je 80101a20 <readi+0xc0>
801019b0: 89 7d d8 mov %edi,-0x28(%ebp)
801019b3: 89 c7 mov %eax,%edi
801019b5: 8d 76 00 lea 0x0(%esi),%esi
bp = bread(ip->dev, bmap(ip, off/BSIZE));
801019b8: 8b 5d d8 mov -0x28(%ebp),%ebx
801019bb: 89 f2 mov %esi,%edx
801019bd: c1 ea 09 shr $0x9,%edx
801019c0: 89 d8 mov %ebx,%eax
801019c2: e8 09 f9 ff ff call 801012d0 <bmap>
801019c7: 89 44 24 04 mov %eax,0x4(%esp)
801019cb: 8b 03 mov (%ebx),%eax
m = min(n - tot, BSIZE - off%BSIZE);
801019cd: bb 00 02 00 00 mov $0x200,%ebx
bp = bread(ip->dev, bmap(ip, off/BSIZE));
801019d2: 89 04 24 mov %eax,(%esp)
801019d5: e8 f6 e6 ff ff call 801000d0 <bread>
m = min(n - tot, BSIZE - off%BSIZE);
801019da: 8b 4d e4 mov -0x1c(%ebp),%ecx
801019dd: 29 f9 sub %edi,%ecx
bp = bread(ip->dev, bmap(ip, off/BSIZE));
801019df: 89 c2 mov %eax,%edx
m = min(n - tot, BSIZE - off%BSIZE);
801019e1: 89 f0 mov %esi,%eax
801019e3: 25 ff 01 00 00 and $0x1ff,%eax
801019e8: 29 c3 sub %eax,%ebx
memmove(dst, bp->data + off%BSIZE, m);
801019ea: 8d 44 02 5c lea 0x5c(%edx,%eax,1),%eax
m = min(n - tot, BSIZE - off%BSIZE);
801019ee: 39 cb cmp %ecx,%ebx
memmove(dst, bp->data + off%BSIZE, m);
801019f0: 89 44 24 04 mov %eax,0x4(%esp)
801019f4: 8b 45 e0 mov -0x20(%ebp),%eax
m = min(n - tot, BSIZE - off%BSIZE);
801019f7: 0f 47 d9 cmova %ecx,%ebx
memmove(dst, bp->data + off%BSIZE, m);
801019fa: 89 5c 24 08 mov %ebx,0x8(%esp)
for(tot=0; tot<n; tot+=m, off+=m, dst+=m){
801019fe: 01 df add %ebx,%edi
80101a00: 01 de add %ebx,%esi
memmove(dst, bp->data + off%BSIZE, m);
80101a02: 89 55 dc mov %edx,-0x24(%ebp)
80101a05: 89 04 24 mov %eax,(%esp)
80101a08: e8 13 29 00 00 call 80104320 <memmove>
brelse(bp);
80101a0d: 8b 55 dc mov -0x24(%ebp),%edx
80101a10: 89 14 24 mov %edx,(%esp)
80101a13: e8 c8 e7 ff ff call 801001e0 <brelse>
for(tot=0; tot<n; tot+=m, off+=m, dst+=m){
80101a18: 01 5d e0 add %ebx,-0x20(%ebp)
80101a1b: 39 7d e4 cmp %edi,-0x1c(%ebp)
80101a1e: 77 98 ja 801019b8 <readi+0x58>
}
return n;
80101a20: 8b 45 e4 mov -0x1c(%ebp),%eax
}
80101a23: 83 c4 2c add $0x2c,%esp
80101a26: 5b pop %ebx
80101a27: 5e pop %esi
80101a28: 5f pop %edi
80101a29: 5d pop %ebp
80101a2a: c3 ret
80101a2b: 90 nop
80101a2c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
if(ip->major < 0 || ip->major >= NDEV || !devsw[ip->major].read)
80101a30: 0f bf 47 52 movswl 0x52(%edi),%eax
80101a34: 66 83 f8 09 cmp $0x9,%ax
80101a38: 77 1e ja 80101a58 <readi+0xf8>
80101a3a: 8b 04 c5 60 09 11 80 mov -0x7feef6a0(,%eax,8),%eax
80101a41: 85 c0 test %eax,%eax
80101a43: 74 13 je 80101a58 <readi+0xf8>
return devsw[ip->major].read(ip, dst, n);
80101a45: 8b 75 e4 mov -0x1c(%ebp),%esi
80101a48: 89 75 10 mov %esi,0x10(%ebp)
}
80101a4b: 83 c4 2c add $0x2c,%esp
80101a4e: 5b pop %ebx
80101a4f: 5e pop %esi
80101a50: 5f pop %edi
80101a51: 5d pop %ebp
return devsw[ip->major].read(ip, dst, n);
80101a52: ff e0 jmp *%eax
80101a54: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
80101a58: b8 ff ff ff ff mov $0xffffffff,%eax
80101a5d: eb c4 jmp 80101a23 <readi+0xc3>
80101a5f: 90 nop
80101a60 <writei>:
// PAGEBREAK!
// Write data to inode.
// Caller must hold ip->lock.
int
writei(struct inode *ip, char *src, uint off, uint n)
{
80101a60: 55 push %ebp
80101a61: 89 e5 mov %esp,%ebp
80101a63: 57 push %edi
80101a64: 56 push %esi
80101a65: 53 push %ebx
80101a66: 83 ec 2c sub $0x2c,%esp
80101a69: 8b 45 08 mov 0x8(%ebp),%eax
80101a6c: 8b 75 0c mov 0xc(%ebp),%esi
80101a6f: 8b 4d 14 mov 0x14(%ebp),%ecx
uint tot, m;
struct buf *bp;
if(ip->type == T_DEV){
80101a72: 66 83 78 50 03 cmpw $0x3,0x50(%eax)
{
80101a77: 89 75 dc mov %esi,-0x24(%ebp)
80101a7a: 8b 75 10 mov 0x10(%ebp),%esi
80101a7d: 89 45 d8 mov %eax,-0x28(%ebp)
80101a80: 89 4d e0 mov %ecx,-0x20(%ebp)
if(ip->type == T_DEV){
80101a83: 0f 84 b7 00 00 00 je 80101b40 <writei+0xe0>
if(ip->major < 0 || ip->major >= NDEV || !devsw[ip->major].write)
return -1;
return devsw[ip->major].write(ip, src, n);
}
if(off > ip->size || off + n < off)
80101a89: 8b 45 d8 mov -0x28(%ebp),%eax
80101a8c: 39 70 58 cmp %esi,0x58(%eax)
80101a8f: 0f 82 e3 00 00 00 jb 80101b78 <writei+0x118>
80101a95: 8b 4d e0 mov -0x20(%ebp),%ecx
80101a98: 89 c8 mov %ecx,%eax
80101a9a: 01 f0 add %esi,%eax
80101a9c: 0f 82 d6 00 00 00 jb 80101b78 <writei+0x118>
return -1;
if(off + n > MAXFILE*BSIZE)
80101aa2: 3d 00 18 01 00 cmp $0x11800,%eax
80101aa7: 0f 87 cb 00 00 00 ja 80101b78 <writei+0x118>
return -1;
for(tot=0; tot<n; tot+=m, off+=m, src+=m){
80101aad: 85 c9 test %ecx,%ecx
80101aaf: c7 45 e4 00 00 00 00 movl $0x0,-0x1c(%ebp)
80101ab6: 74 77 je 80101b2f <writei+0xcf>
bp = bread(ip->dev, bmap(ip, off/BSIZE));
80101ab8: 8b 7d d8 mov -0x28(%ebp),%edi
80101abb: 89 f2 mov %esi,%edx
m = min(n - tot, BSIZE - off%BSIZE);
80101abd: bb 00 02 00 00 mov $0x200,%ebx
bp = bread(ip->dev, bmap(ip, off/BSIZE));
80101ac2: c1 ea 09 shr $0x9,%edx
80101ac5: 89 f8 mov %edi,%eax
80101ac7: e8 04 f8 ff ff call 801012d0 <bmap>
80101acc: 89 44 24 04 mov %eax,0x4(%esp)
80101ad0: 8b 07 mov (%edi),%eax
80101ad2: 89 04 24 mov %eax,(%esp)
80101ad5: e8 f6 e5 ff ff call 801000d0 <bread>
m = min(n - tot, BSIZE - off%BSIZE);
80101ada: 8b 4d e0 mov -0x20(%ebp),%ecx
80101add: 2b 4d e4 sub -0x1c(%ebp),%ecx
memmove(bp->data + off%BSIZE, src, m);
80101ae0: 8b 55 dc mov -0x24(%ebp),%edx
bp = bread(ip->dev, bmap(ip, off/BSIZE));
80101ae3: 89 c7 mov %eax,%edi
m = min(n - tot, BSIZE - off%BSIZE);
80101ae5: 89 f0 mov %esi,%eax
80101ae7: 25 ff 01 00 00 and $0x1ff,%eax
80101aec: 29 c3 sub %eax,%ebx
80101aee: 39 cb cmp %ecx,%ebx
80101af0: 0f 47 d9 cmova %ecx,%ebx
memmove(bp->data + off%BSIZE, src, m);
80101af3: 8d 44 07 5c lea 0x5c(%edi,%eax,1),%eax
for(tot=0; tot<n; tot+=m, off+=m, src+=m){
80101af7: 01 de add %ebx,%esi
memmove(bp->data + off%BSIZE, src, m);
80101af9: 89 54 24 04 mov %edx,0x4(%esp)
80101afd: 89 5c 24 08 mov %ebx,0x8(%esp)
80101b01: 89 04 24 mov %eax,(%esp)
80101b04: e8 17 28 00 00 call 80104320 <memmove>
log_write(bp);
80101b09: 89 3c 24 mov %edi,(%esp)
80101b0c: e8 9f 11 00 00 call 80102cb0 <log_write>
brelse(bp);
80101b11: 89 3c 24 mov %edi,(%esp)
80101b14: e8 c7 e6 ff ff call 801001e0 <brelse>
for(tot=0; tot<n; tot+=m, off+=m, src+=m){
80101b19: 01 5d e4 add %ebx,-0x1c(%ebp)
80101b1c: 8b 45 e4 mov -0x1c(%ebp),%eax
80101b1f: 01 5d dc add %ebx,-0x24(%ebp)
80101b22: 39 45 e0 cmp %eax,-0x20(%ebp)
80101b25: 77 91 ja 80101ab8 <writei+0x58>
}
if(n > 0 && off > ip->size){
80101b27: 8b 45 d8 mov -0x28(%ebp),%eax
80101b2a: 39 70 58 cmp %esi,0x58(%eax)
80101b2d: 72 39 jb 80101b68 <writei+0x108>
ip->size = off;
iupdate(ip);
}
return n;
80101b2f: 8b 45 e0 mov -0x20(%ebp),%eax
}
80101b32: 83 c4 2c add $0x2c,%esp
80101b35: 5b pop %ebx
80101b36: 5e pop %esi
80101b37: 5f pop %edi
80101b38: 5d pop %ebp
80101b39: c3 ret
80101b3a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if(ip->major < 0 || ip->major >= NDEV || !devsw[ip->major].write)
80101b40: 0f bf 40 52 movswl 0x52(%eax),%eax
80101b44: 66 83 f8 09 cmp $0x9,%ax
80101b48: 77 2e ja 80101b78 <writei+0x118>
80101b4a: 8b 04 c5 64 09 11 80 mov -0x7feef69c(,%eax,8),%eax
80101b51: 85 c0 test %eax,%eax
80101b53: 74 23 je 80101b78 <writei+0x118>
return devsw[ip->major].write(ip, src, n);
80101b55: 89 4d 10 mov %ecx,0x10(%ebp)
}
80101b58: 83 c4 2c add $0x2c,%esp
80101b5b: 5b pop %ebx
80101b5c: 5e pop %esi
80101b5d: 5f pop %edi
80101b5e: 5d pop %ebp
return devsw[ip->major].write(ip, src, n);
80101b5f: ff e0 jmp *%eax
80101b61: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
ip->size = off;
80101b68: 8b 45 d8 mov -0x28(%ebp),%eax
80101b6b: 89 70 58 mov %esi,0x58(%eax)
iupdate(ip);
80101b6e: 89 04 24 mov %eax,(%esp)
80101b71: e8 7a fa ff ff call 801015f0 <iupdate>
80101b76: eb b7 jmp 80101b2f <writei+0xcf>
}
80101b78: 83 c4 2c add $0x2c,%esp
return -1;
80101b7b: b8 ff ff ff ff mov $0xffffffff,%eax
}
80101b80: 5b pop %ebx
80101b81: 5e pop %esi
80101b82: 5f pop %edi
80101b83: 5d pop %ebp
80101b84: c3 ret
80101b85: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80101b89: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101b90 <namecmp>:
//PAGEBREAK!
// Directories
int
namecmp(const char *s, const char *t)
{
80101b90: 55 push %ebp
80101b91: 89 e5 mov %esp,%ebp
80101b93: 83 ec 18 sub $0x18,%esp
return strncmp(s, t, DIRSIZ);
80101b96: 8b 45 0c mov 0xc(%ebp),%eax
80101b99: c7 44 24 08 0e 00 00 movl $0xe,0x8(%esp)
80101ba0: 00
80101ba1: 89 44 24 04 mov %eax,0x4(%esp)
80101ba5: 8b 45 08 mov 0x8(%ebp),%eax
80101ba8: 89 04 24 mov %eax,(%esp)
80101bab: e8 f0 27 00 00 call 801043a0 <strncmp>
}
80101bb0: c9 leave
80101bb1: c3 ret
80101bb2: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80101bb9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101bc0 <dirlookup>:
// Look for a directory entry in a directory.
// If found, set *poff to byte offset of entry.
struct inode*
dirlookup(struct inode *dp, char *name, uint *poff)
{
80101bc0: 55 push %ebp
80101bc1: 89 e5 mov %esp,%ebp
80101bc3: 57 push %edi
80101bc4: 56 push %esi
80101bc5: 53 push %ebx
80101bc6: 83 ec 2c sub $0x2c,%esp
80101bc9: 8b 5d 08 mov 0x8(%ebp),%ebx
uint off, inum;
struct dirent de;
if(dp->type != T_DIR)
80101bcc: 66 83 7b 50 01 cmpw $0x1,0x50(%ebx)
80101bd1: 0f 85 97 00 00 00 jne 80101c6e <dirlookup+0xae>
panic("dirlookup not DIR");
for(off = 0; off < dp->size; off += sizeof(de)){
80101bd7: 8b 53 58 mov 0x58(%ebx),%edx
80101bda: 31 ff xor %edi,%edi
80101bdc: 8d 75 d8 lea -0x28(%ebp),%esi
80101bdf: 85 d2 test %edx,%edx
80101be1: 75 0d jne 80101bf0 <dirlookup+0x30>
80101be3: eb 73 jmp 80101c58 <dirlookup+0x98>
80101be5: 8d 76 00 lea 0x0(%esi),%esi
80101be8: 83 c7 10 add $0x10,%edi
80101beb: 39 7b 58 cmp %edi,0x58(%ebx)
80101bee: 76 68 jbe 80101c58 <dirlookup+0x98>
if(readi(dp, (char*)&de, off, sizeof(de)) != sizeof(de))
80101bf0: c7 44 24 0c 10 00 00 movl $0x10,0xc(%esp)
80101bf7: 00
80101bf8: 89 7c 24 08 mov %edi,0x8(%esp)
80101bfc: 89 74 24 04 mov %esi,0x4(%esp)
80101c00: 89 1c 24 mov %ebx,(%esp)
80101c03: e8 58 fd ff ff call 80101960 <readi>
80101c08: 83 f8 10 cmp $0x10,%eax
80101c0b: 75 55 jne 80101c62 <dirlookup+0xa2>
panic("dirlookup read");
if(de.inum == 0)
80101c0d: 66 83 7d d8 00 cmpw $0x0,-0x28(%ebp)
80101c12: 74 d4 je 80101be8 <dirlookup+0x28>
return strncmp(s, t, DIRSIZ);
80101c14: 8d 45 da lea -0x26(%ebp),%eax
80101c17: 89 44 24 04 mov %eax,0x4(%esp)
80101c1b: 8b 45 0c mov 0xc(%ebp),%eax
80101c1e: c7 44 24 08 0e 00 00 movl $0xe,0x8(%esp)
80101c25: 00
80101c26: 89 04 24 mov %eax,(%esp)
80101c29: e8 72 27 00 00 call 801043a0 <strncmp>
continue;
if(namecmp(name, de.name) == 0){
80101c2e: 85 c0 test %eax,%eax
80101c30: 75 b6 jne 80101be8 <dirlookup+0x28>
// entry matches path element
if(poff)
80101c32: 8b 45 10 mov 0x10(%ebp),%eax
80101c35: 85 c0 test %eax,%eax
80101c37: 74 05 je 80101c3e <dirlookup+0x7e>
*poff = off;
80101c39: 8b 45 10 mov 0x10(%ebp),%eax
80101c3c: 89 38 mov %edi,(%eax)
inum = de.inum;
80101c3e: 0f b7 55 d8 movzwl -0x28(%ebp),%edx
return iget(dp->dev, inum);
80101c42: 8b 03 mov (%ebx),%eax
80101c44: e8 c7 f5 ff ff call 80101210 <iget>
}
}
return 0;
}
80101c49: 83 c4 2c add $0x2c,%esp
80101c4c: 5b pop %ebx
80101c4d: 5e pop %esi
80101c4e: 5f pop %edi
80101c4f: 5d pop %ebp
80101c50: c3 ret
80101c51: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80101c58: 83 c4 2c add $0x2c,%esp
return 0;
80101c5b: 31 c0 xor %eax,%eax
}
80101c5d: 5b pop %ebx
80101c5e: 5e pop %esi
80101c5f: 5f pop %edi
80101c60: 5d pop %ebp
80101c61: c3 ret
panic("dirlookup read");
80101c62: c7 04 24 e8 6f 10 80 movl $0x80106fe8,(%esp)
80101c69: e8 f2 e6 ff ff call 80100360 <panic>
panic("dirlookup not DIR");
80101c6e: c7 04 24 d6 6f 10 80 movl $0x80106fd6,(%esp)
80101c75: e8 e6 e6 ff ff call 80100360 <panic>
80101c7a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80101c80 <namex>:
// If parent != 0, return the inode for the parent and copy the final
// path element into name, which must have room for DIRSIZ bytes.
// Must be called inside a transaction since it calls iput().
static struct inode*
namex(char *path, int nameiparent, char *name)
{
80101c80: 55 push %ebp
80101c81: 89 e5 mov %esp,%ebp
80101c83: 57 push %edi
80101c84: 89 cf mov %ecx,%edi
80101c86: 56 push %esi
80101c87: 53 push %ebx
80101c88: 89 c3 mov %eax,%ebx
80101c8a: 83 ec 2c sub $0x2c,%esp
struct inode *ip, *next;
if(*path == '/')
80101c8d: 80 38 2f cmpb $0x2f,(%eax)
{
80101c90: 89 55 e0 mov %edx,-0x20(%ebp)
if(*path == '/')
80101c93: 0f 84 51 01 00 00 je 80101dea <namex+0x16a>
ip = iget(ROOTDEV, ROOTINO);
else
ip = idup(myproc()->cwd);
80101c99: e8 02 1a 00 00 call 801036a0 <myproc>
80101c9e: 8b 70 6c mov 0x6c(%eax),%esi
acquire(&icache.lock);
80101ca1: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
80101ca8: e8 93 24 00 00 call 80104140 <acquire>
ip->ref++;
80101cad: 83 46 08 01 addl $0x1,0x8(%esi)
release(&icache.lock);
80101cb1: c7 04 24 e0 09 11 80 movl $0x801109e0,(%esp)
80101cb8: e8 73 25 00 00 call 80104230 <release>
80101cbd: eb 04 jmp 80101cc3 <namex+0x43>
80101cbf: 90 nop
path++;
80101cc0: 83 c3 01 add $0x1,%ebx
while(*path == '/')
80101cc3: 0f b6 03 movzbl (%ebx),%eax
80101cc6: 3c 2f cmp $0x2f,%al
80101cc8: 74 f6 je 80101cc0 <namex+0x40>
if(*path == 0)
80101cca: 84 c0 test %al,%al
80101ccc: 0f 84 ed 00 00 00 je 80101dbf <namex+0x13f>
while(*path != '/' && *path != 0)
80101cd2: 0f b6 03 movzbl (%ebx),%eax
80101cd5: 89 da mov %ebx,%edx
80101cd7: 84 c0 test %al,%al
80101cd9: 0f 84 b1 00 00 00 je 80101d90 <namex+0x110>
80101cdf: 3c 2f cmp $0x2f,%al
80101ce1: 75 0f jne 80101cf2 <namex+0x72>
80101ce3: e9 a8 00 00 00 jmp 80101d90 <namex+0x110>
80101ce8: 3c 2f cmp $0x2f,%al
80101cea: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80101cf0: 74 0a je 80101cfc <namex+0x7c>
path++;
80101cf2: 83 c2 01 add $0x1,%edx
while(*path != '/' && *path != 0)
80101cf5: 0f b6 02 movzbl (%edx),%eax
80101cf8: 84 c0 test %al,%al
80101cfa: 75 ec jne 80101ce8 <namex+0x68>
80101cfc: 89 d1 mov %edx,%ecx
80101cfe: 29 d9 sub %ebx,%ecx
if(len >= DIRSIZ)
80101d00: 83 f9 0d cmp $0xd,%ecx
80101d03: 0f 8e 8f 00 00 00 jle 80101d98 <namex+0x118>
memmove(name, s, DIRSIZ);
80101d09: 89 5c 24 04 mov %ebx,0x4(%esp)
80101d0d: c7 44 24 08 0e 00 00 movl $0xe,0x8(%esp)
80101d14: 00
80101d15: 89 3c 24 mov %edi,(%esp)
80101d18: 89 55 e4 mov %edx,-0x1c(%ebp)
80101d1b: e8 00 26 00 00 call 80104320 <memmove>
path++;
80101d20: 8b 55 e4 mov -0x1c(%ebp),%edx
80101d23: 89 d3 mov %edx,%ebx
while(*path == '/')
80101d25: 80 3a 2f cmpb $0x2f,(%edx)
80101d28: 75 0e jne 80101d38 <namex+0xb8>
80101d2a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
path++;
80101d30: 83 c3 01 add $0x1,%ebx
while(*path == '/')
80101d33: 80 3b 2f cmpb $0x2f,(%ebx)
80101d36: 74 f8 je 80101d30 <namex+0xb0>
while((path = skipelem(path, name)) != 0){
ilock(ip);
80101d38: 89 34 24 mov %esi,(%esp)
80101d3b: e8 70 f9 ff ff call 801016b0 <ilock>
if(ip->type != T_DIR){
80101d40: 66 83 7e 50 01 cmpw $0x1,0x50(%esi)
80101d45: 0f 85 85 00 00 00 jne 80101dd0 <namex+0x150>
iunlockput(ip);
return 0;
}
if(nameiparent && *path == '\0'){
80101d4b: 8b 55 e0 mov -0x20(%ebp),%edx
80101d4e: 85 d2 test %edx,%edx
80101d50: 74 09 je 80101d5b <namex+0xdb>
80101d52: 80 3b 00 cmpb $0x0,(%ebx)
80101d55: 0f 84 a5 00 00 00 je 80101e00 <namex+0x180>
// Stop one level early.
iunlock(ip);
return ip;
}
if((next = dirlookup(ip, name, 0)) == 0){
80101d5b: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
80101d62: 00
80101d63: 89 7c 24 04 mov %edi,0x4(%esp)
80101d67: 89 34 24 mov %esi,(%esp)
80101d6a: e8 51 fe ff ff call 80101bc0 <dirlookup>
80101d6f: 85 c0 test %eax,%eax
80101d71: 74 5d je 80101dd0 <namex+0x150>
iunlock(ip);
80101d73: 89 34 24 mov %esi,(%esp)
80101d76: 89 45 e4 mov %eax,-0x1c(%ebp)
80101d79: e8 12 fa ff ff call 80101790 <iunlock>
iput(ip);
80101d7e: 89 34 24 mov %esi,(%esp)
80101d81: e8 4a fa ff ff call 801017d0 <iput>
iunlockput(ip);
return 0;
}
iunlockput(ip);
ip = next;
80101d86: 8b 45 e4 mov -0x1c(%ebp),%eax
80101d89: 89 c6 mov %eax,%esi
80101d8b: e9 33 ff ff ff jmp 80101cc3 <namex+0x43>
while(*path != '/' && *path != 0)
80101d90: 31 c9 xor %ecx,%ecx
80101d92: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
memmove(name, s, len);
80101d98: 89 4c 24 08 mov %ecx,0x8(%esp)
80101d9c: 89 5c 24 04 mov %ebx,0x4(%esp)
80101da0: 89 3c 24 mov %edi,(%esp)
80101da3: 89 55 dc mov %edx,-0x24(%ebp)
80101da6: 89 4d e4 mov %ecx,-0x1c(%ebp)
80101da9: e8 72 25 00 00 call 80104320 <memmove>
name[len] = 0;
80101dae: 8b 4d e4 mov -0x1c(%ebp),%ecx
80101db1: 8b 55 dc mov -0x24(%ebp),%edx
80101db4: c6 04 0f 00 movb $0x0,(%edi,%ecx,1)
80101db8: 89 d3 mov %edx,%ebx
80101dba: e9 66 ff ff ff jmp 80101d25 <namex+0xa5>
}
if(nameiparent){
80101dbf: 8b 45 e0 mov -0x20(%ebp),%eax
80101dc2: 85 c0 test %eax,%eax
80101dc4: 75 4c jne 80101e12 <namex+0x192>
80101dc6: 89 f0 mov %esi,%eax
iput(ip);
return 0;
}
return ip;
}
80101dc8: 83 c4 2c add $0x2c,%esp
80101dcb: 5b pop %ebx
80101dcc: 5e pop %esi
80101dcd: 5f pop %edi
80101dce: 5d pop %ebp
80101dcf: c3 ret
iunlock(ip);
80101dd0: 89 34 24 mov %esi,(%esp)
80101dd3: e8 b8 f9 ff ff call 80101790 <iunlock>
iput(ip);
80101dd8: 89 34 24 mov %esi,(%esp)
80101ddb: e8 f0 f9 ff ff call 801017d0 <iput>
}
80101de0: 83 c4 2c add $0x2c,%esp
return 0;
80101de3: 31 c0 xor %eax,%eax
}
80101de5: 5b pop %ebx
80101de6: 5e pop %esi
80101de7: 5f pop %edi
80101de8: 5d pop %ebp
80101de9: c3 ret
ip = iget(ROOTDEV, ROOTINO);
80101dea: ba 01 00 00 00 mov $0x1,%edx
80101def: b8 01 00 00 00 mov $0x1,%eax
80101df4: e8 17 f4 ff ff call 80101210 <iget>
80101df9: 89 c6 mov %eax,%esi
80101dfb: e9 c3 fe ff ff jmp 80101cc3 <namex+0x43>
iunlock(ip);
80101e00: 89 34 24 mov %esi,(%esp)
80101e03: e8 88 f9 ff ff call 80101790 <iunlock>
}
80101e08: 83 c4 2c add $0x2c,%esp
return ip;
80101e0b: 89 f0 mov %esi,%eax
}
80101e0d: 5b pop %ebx
80101e0e: 5e pop %esi
80101e0f: 5f pop %edi
80101e10: 5d pop %ebp
80101e11: c3 ret
iput(ip);
80101e12: 89 34 24 mov %esi,(%esp)
80101e15: e8 b6 f9 ff ff call 801017d0 <iput>
return 0;
80101e1a: 31 c0 xor %eax,%eax
80101e1c: eb aa jmp 80101dc8 <namex+0x148>
80101e1e: 66 90 xchg %ax,%ax
80101e20 <dirlink>:
{
80101e20: 55 push %ebp
80101e21: 89 e5 mov %esp,%ebp
80101e23: 57 push %edi
80101e24: 56 push %esi
80101e25: 53 push %ebx
80101e26: 83 ec 2c sub $0x2c,%esp
80101e29: 8b 5d 08 mov 0x8(%ebp),%ebx
if((ip = dirlookup(dp, name, 0)) != 0){
80101e2c: 8b 45 0c mov 0xc(%ebp),%eax
80101e2f: c7 44 24 08 00 00 00 movl $0x0,0x8(%esp)
80101e36: 00
80101e37: 89 1c 24 mov %ebx,(%esp)
80101e3a: 89 44 24 04 mov %eax,0x4(%esp)
80101e3e: e8 7d fd ff ff call 80101bc0 <dirlookup>
80101e43: 85 c0 test %eax,%eax
80101e45: 0f 85 8b 00 00 00 jne 80101ed6 <dirlink+0xb6>
for(off = 0; off < dp->size; off += sizeof(de)){
80101e4b: 8b 43 58 mov 0x58(%ebx),%eax
80101e4e: 31 ff xor %edi,%edi
80101e50: 8d 75 d8 lea -0x28(%ebp),%esi
80101e53: 85 c0 test %eax,%eax
80101e55: 75 13 jne 80101e6a <dirlink+0x4a>
80101e57: eb 35 jmp 80101e8e <dirlink+0x6e>
80101e59: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80101e60: 8d 57 10 lea 0x10(%edi),%edx
80101e63: 39 53 58 cmp %edx,0x58(%ebx)
80101e66: 89 d7 mov %edx,%edi
80101e68: 76 24 jbe 80101e8e <dirlink+0x6e>
if(readi(dp, (char*)&de, off, sizeof(de)) != sizeof(de))
80101e6a: c7 44 24 0c 10 00 00 movl $0x10,0xc(%esp)
80101e71: 00
80101e72: 89 7c 24 08 mov %edi,0x8(%esp)
80101e76: 89 74 24 04 mov %esi,0x4(%esp)
80101e7a: 89 1c 24 mov %ebx,(%esp)
80101e7d: e8 de fa ff ff call 80101960 <readi>
80101e82: 83 f8 10 cmp $0x10,%eax
80101e85: 75 5e jne 80101ee5 <dirlink+0xc5>
if(de.inum == 0)
80101e87: 66 83 7d d8 00 cmpw $0x0,-0x28(%ebp)
80101e8c: 75 d2 jne 80101e60 <dirlink+0x40>
strncpy(de.name, name, DIRSIZ);
80101e8e: 8b 45 0c mov 0xc(%ebp),%eax
80101e91: c7 44 24 08 0e 00 00 movl $0xe,0x8(%esp)
80101e98: 00
80101e99: 89 44 24 04 mov %eax,0x4(%esp)
80101e9d: 8d 45 da lea -0x26(%ebp),%eax
80101ea0: 89 04 24 mov %eax,(%esp)
80101ea3: e8 68 25 00 00 call 80104410 <strncpy>
de.inum = inum;
80101ea8: 8b 45 10 mov 0x10(%ebp),%eax
if(writei(dp, (char*)&de, off, sizeof(de)) != sizeof(de))
80101eab: c7 44 24 0c 10 00 00 movl $0x10,0xc(%esp)
80101eb2: 00
80101eb3: 89 7c 24 08 mov %edi,0x8(%esp)
80101eb7: 89 74 24 04 mov %esi,0x4(%esp)
80101ebb: 89 1c 24 mov %ebx,(%esp)
de.inum = inum;
80101ebe: 66 89 45 d8 mov %ax,-0x28(%ebp)
if(writei(dp, (char*)&de, off, sizeof(de)) != sizeof(de))
80101ec2: e8 99 fb ff ff call 80101a60 <writei>
80101ec7: 83 f8 10 cmp $0x10,%eax
80101eca: 75 25 jne 80101ef1 <dirlink+0xd1>
return 0;
80101ecc: 31 c0 xor %eax,%eax
}
80101ece: 83 c4 2c add $0x2c,%esp
80101ed1: 5b pop %ebx
80101ed2: 5e pop %esi
80101ed3: 5f pop %edi
80101ed4: 5d pop %ebp
80101ed5: c3 ret
iput(ip);
80101ed6: 89 04 24 mov %eax,(%esp)
80101ed9: e8 f2 f8 ff ff call 801017d0 <iput>
return -1;
80101ede: b8 ff ff ff ff mov $0xffffffff,%eax
80101ee3: eb e9 jmp 80101ece <dirlink+0xae>
panic("dirlink read");
80101ee5: c7 04 24 f7 6f 10 80 movl $0x80106ff7,(%esp)
80101eec: e8 6f e4 ff ff call 80100360 <panic>
panic("dirlink");
80101ef1: c7 04 24 e6 75 10 80 movl $0x801075e6,(%esp)
80101ef8: e8 63 e4 ff ff call 80100360 <panic>
80101efd: 8d 76 00 lea 0x0(%esi),%esi
80101f00 <namei>:
struct inode*
namei(char *path)
{
80101f00: 55 push %ebp
char name[DIRSIZ];
return namex(path, 0, name);
80101f01: 31 d2 xor %edx,%edx
{
80101f03: 89 e5 mov %esp,%ebp
80101f05: 83 ec 18 sub $0x18,%esp
return namex(path, 0, name);
80101f08: 8b 45 08 mov 0x8(%ebp),%eax
80101f0b: 8d 4d ea lea -0x16(%ebp),%ecx
80101f0e: e8 6d fd ff ff call 80101c80 <namex>
}
80101f13: c9 leave
80101f14: c3 ret
80101f15: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80101f19: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80101f20 <nameiparent>:
struct inode*
nameiparent(char *path, char *name)
{
80101f20: 55 push %ebp
return namex(path, 1, name);
80101f21: ba 01 00 00 00 mov $0x1,%edx
{
80101f26: 89 e5 mov %esp,%ebp
return namex(path, 1, name);
80101f28: 8b 4d 0c mov 0xc(%ebp),%ecx
80101f2b: 8b 45 08 mov 0x8(%ebp),%eax
}
80101f2e: 5d pop %ebp
return namex(path, 1, name);
80101f2f: e9 4c fd ff ff jmp 80101c80 <namex>
80101f34: 66 90 xchg %ax,%ax
80101f36: 66 90 xchg %ax,%ax
80101f38: 66 90 xchg %ax,%ax
80101f3a: 66 90 xchg %ax,%ax
80101f3c: 66 90 xchg %ax,%ax
80101f3e: 66 90 xchg %ax,%ax
80101f40 <idestart>:
}
// Start the request for b. Caller must hold idelock.
static void
idestart(struct buf *b)
{
80101f40: 55 push %ebp
80101f41: 89 e5 mov %esp,%ebp
80101f43: 56 push %esi
80101f44: 89 c6 mov %eax,%esi
80101f46: 53 push %ebx
80101f47: 83 ec 10 sub $0x10,%esp
if(b == 0)
80101f4a: 85 c0 test %eax,%eax
80101f4c: 0f 84 99 00 00 00 je 80101feb <idestart+0xab>
panic("idestart");
if(b->blockno >= FSSIZE)
80101f52: 8b 48 08 mov 0x8(%eax),%ecx
80101f55: 81 f9 e7 03 00 00 cmp $0x3e7,%ecx
80101f5b: 0f 87 7e 00 00 00 ja 80101fdf <idestart+0x9f>
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80101f61: ba f7 01 00 00 mov $0x1f7,%edx
80101f66: 66 90 xchg %ax,%ax
80101f68: ec in (%dx),%al
while(((r = inb(0x1f7)) & (IDE_BSY|IDE_DRDY)) != IDE_DRDY)
80101f69: 83 e0 c0 and $0xffffffc0,%eax
80101f6c: 3c 40 cmp $0x40,%al
80101f6e: 75 f8 jne 80101f68 <idestart+0x28>
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80101f70: 31 db xor %ebx,%ebx
80101f72: ba f6 03 00 00 mov $0x3f6,%edx
80101f77: 89 d8 mov %ebx,%eax
80101f79: ee out %al,(%dx)
80101f7a: ba f2 01 00 00 mov $0x1f2,%edx
80101f7f: b8 01 00 00 00 mov $0x1,%eax
80101f84: ee out %al,(%dx)
80101f85: 0f b6 c1 movzbl %cl,%eax
80101f88: b2 f3 mov $0xf3,%dl
80101f8a: ee out %al,(%dx)
idewait(0);
outb(0x3f6, 0); // generate interrupt
outb(0x1f2, sector_per_block); // number of sectors
outb(0x1f3, sector & 0xff);
outb(0x1f4, (sector >> 8) & 0xff);
80101f8b: 89 c8 mov %ecx,%eax
80101f8d: b2 f4 mov $0xf4,%dl
80101f8f: c1 f8 08 sar $0x8,%eax
80101f92: ee out %al,(%dx)
80101f93: b2 f5 mov $0xf5,%dl
80101f95: 89 d8 mov %ebx,%eax
80101f97: ee out %al,(%dx)
outb(0x1f5, (sector >> 16) & 0xff);
outb(0x1f6, 0xe0 | ((b->dev&1)<<4) | ((sector>>24)&0x0f));
80101f98: 0f b6 46 04 movzbl 0x4(%esi),%eax
80101f9c: b2 f6 mov $0xf6,%dl
80101f9e: 83 e0 01 and $0x1,%eax
80101fa1: c1 e0 04 shl $0x4,%eax
80101fa4: 83 c8 e0 or $0xffffffe0,%eax
80101fa7: ee out %al,(%dx)
if(b->flags & B_DIRTY){
80101fa8: f6 06 04 testb $0x4,(%esi)
80101fab: 75 13 jne 80101fc0 <idestart+0x80>
80101fad: ba f7 01 00 00 mov $0x1f7,%edx
80101fb2: b8 20 00 00 00 mov $0x20,%eax
80101fb7: ee out %al,(%dx)
outb(0x1f7, write_cmd);
outsl(0x1f0, b->data, BSIZE/4);
} else {
outb(0x1f7, read_cmd);
}
}
80101fb8: 83 c4 10 add $0x10,%esp
80101fbb: 5b pop %ebx
80101fbc: 5e pop %esi
80101fbd: 5d pop %ebp
80101fbe: c3 ret
80101fbf: 90 nop
80101fc0: b2 f7 mov $0xf7,%dl
80101fc2: b8 30 00 00 00 mov $0x30,%eax
80101fc7: ee out %al,(%dx)
asm volatile("cld; rep outsl" :
80101fc8: b9 80 00 00 00 mov $0x80,%ecx
outsl(0x1f0, b->data, BSIZE/4);
80101fcd: 83 c6 5c add $0x5c,%esi
80101fd0: ba f0 01 00 00 mov $0x1f0,%edx
80101fd5: fc cld
80101fd6: f3 6f rep outsl %ds:(%esi),(%dx)
}
80101fd8: 83 c4 10 add $0x10,%esp
80101fdb: 5b pop %ebx
80101fdc: 5e pop %esi
80101fdd: 5d pop %ebp
80101fde: c3 ret
panic("incorrect blockno");
80101fdf: c7 04 24 60 70 10 80 movl $0x80107060,(%esp)
80101fe6: e8 75 e3 ff ff call 80100360 <panic>
panic("idestart");
80101feb: c7 04 24 57 70 10 80 movl $0x80107057,(%esp)
80101ff2: e8 69 e3 ff ff call 80100360 <panic>
80101ff7: 89 f6 mov %esi,%esi
80101ff9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102000 <ideinit>:
{
80102000: 55 push %ebp
80102001: 89 e5 mov %esp,%ebp
80102003: 83 ec 18 sub $0x18,%esp
initlock(&idelock, "ide");
80102006: c7 44 24 04 72 70 10 movl $0x80107072,0x4(%esp)
8010200d: 80
8010200e: c7 04 24 80 a5 10 80 movl $0x8010a580,(%esp)
80102015: e8 36 20 00 00 call 80104050 <initlock>
ioapicenable(IRQ_IDE, ncpu - 1);
8010201a: a1 00 2d 11 80 mov 0x80112d00,%eax
8010201f: c7 04 24 0e 00 00 00 movl $0xe,(%esp)
80102026: 83 e8 01 sub $0x1,%eax
80102029: 89 44 24 04 mov %eax,0x4(%esp)
8010202d: e8 7e 02 00 00 call 801022b0 <ioapicenable>
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102032: ba f7 01 00 00 mov $0x1f7,%edx
80102037: 90 nop
80102038: ec in (%dx),%al
while(((r = inb(0x1f7)) & (IDE_BSY|IDE_DRDY)) != IDE_DRDY)
80102039: 83 e0 c0 and $0xffffffc0,%eax
8010203c: 3c 40 cmp $0x40,%al
8010203e: 75 f8 jne 80102038 <ideinit+0x38>
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80102040: ba f6 01 00 00 mov $0x1f6,%edx
80102045: b8 f0 ff ff ff mov $0xfffffff0,%eax
8010204a: ee out %al,(%dx)
8010204b: b9 e8 03 00 00 mov $0x3e8,%ecx
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102050: b2 f7 mov $0xf7,%dl
80102052: eb 09 jmp 8010205d <ideinit+0x5d>
80102054: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
for(i=0; i<1000; i++){
80102058: 83 e9 01 sub $0x1,%ecx
8010205b: 74 0f je 8010206c <ideinit+0x6c>
8010205d: ec in (%dx),%al
if(inb(0x1f7) != 0){
8010205e: 84 c0 test %al,%al
80102060: 74 f6 je 80102058 <ideinit+0x58>
havedisk1 = 1;
80102062: c7 05 60 a5 10 80 01 movl $0x1,0x8010a560
80102069: 00 00 00
asm volatile("out %0,%1" : : "a" (data), "d" (port));
8010206c: ba f6 01 00 00 mov $0x1f6,%edx
80102071: b8 e0 ff ff ff mov $0xffffffe0,%eax
80102076: ee out %al,(%dx)
}
80102077: c9 leave
80102078: c3 ret
80102079: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80102080 <ideintr>:
// Interrupt handler.
void
ideintr(void)
{
80102080: 55 push %ebp
80102081: 89 e5 mov %esp,%ebp
80102083: 57 push %edi
80102084: 56 push %esi
80102085: 53 push %ebx
80102086: 83 ec 1c sub $0x1c,%esp
struct buf *b;
// First queued buffer is the active request.
acquire(&idelock);
80102089: c7 04 24 80 a5 10 80 movl $0x8010a580,(%esp)
80102090: e8 ab 20 00 00 call 80104140 <acquire>
if((b = idequeue) == 0){
80102095: 8b 1d 64 a5 10 80 mov 0x8010a564,%ebx
8010209b: 85 db test %ebx,%ebx
8010209d: 74 30 je 801020cf <ideintr+0x4f>
release(&idelock);
return;
}
idequeue = b->qnext;
8010209f: 8b 43 58 mov 0x58(%ebx),%eax
801020a2: a3 64 a5 10 80 mov %eax,0x8010a564
// Read data if needed.
if(!(b->flags & B_DIRTY) && idewait(1) >= 0)
801020a7: 8b 33 mov (%ebx),%esi
801020a9: f7 c6 04 00 00 00 test $0x4,%esi
801020af: 74 37 je 801020e8 <ideintr+0x68>
insl(0x1f0, b->data, BSIZE/4);
// Wake process waiting for this buf.
b->flags |= B_VALID;
b->flags &= ~B_DIRTY;
801020b1: 83 e6 fb and $0xfffffffb,%esi
801020b4: 83 ce 02 or $0x2,%esi
801020b7: 89 33 mov %esi,(%ebx)
wakeup(b);
801020b9: 89 1c 24 mov %ebx,(%esp)
801020bc: e8 cf 1c 00 00 call 80103d90 <wakeup>
// Start disk on next buf in queue.
if(idequeue != 0)
801020c1: a1 64 a5 10 80 mov 0x8010a564,%eax
801020c6: 85 c0 test %eax,%eax
801020c8: 74 05 je 801020cf <ideintr+0x4f>
idestart(idequeue);
801020ca: e8 71 fe ff ff call 80101f40 <idestart>
release(&idelock);
801020cf: c7 04 24 80 a5 10 80 movl $0x8010a580,(%esp)
801020d6: e8 55 21 00 00 call 80104230 <release>
release(&idelock);
}
801020db: 83 c4 1c add $0x1c,%esp
801020de: 5b pop %ebx
801020df: 5e pop %esi
801020e0: 5f pop %edi
801020e1: 5d pop %ebp
801020e2: c3 ret
801020e3: 90 nop
801020e4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
801020e8: ba f7 01 00 00 mov $0x1f7,%edx
801020ed: 8d 76 00 lea 0x0(%esi),%esi
801020f0: ec in (%dx),%al
while(((r = inb(0x1f7)) & (IDE_BSY|IDE_DRDY)) != IDE_DRDY)
801020f1: 89 c1 mov %eax,%ecx
801020f3: 83 e1 c0 and $0xffffffc0,%ecx
801020f6: 80 f9 40 cmp $0x40,%cl
801020f9: 75 f5 jne 801020f0 <ideintr+0x70>
if(checkerr && (r & (IDE_DF|IDE_ERR)) != 0)
801020fb: a8 21 test $0x21,%al
801020fd: 75 b2 jne 801020b1 <ideintr+0x31>
insl(0x1f0, b->data, BSIZE/4);
801020ff: 8d 7b 5c lea 0x5c(%ebx),%edi
asm volatile("cld; rep insl" :
80102102: b9 80 00 00 00 mov $0x80,%ecx
80102107: ba f0 01 00 00 mov $0x1f0,%edx
8010210c: fc cld
8010210d: f3 6d rep insl (%dx),%es:(%edi)
8010210f: 8b 33 mov (%ebx),%esi
80102111: eb 9e jmp 801020b1 <ideintr+0x31>
80102113: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80102119: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102120 <iderw>:
// Sync buf with disk.
// If B_DIRTY is set, write buf to disk, clear B_DIRTY, set B_VALID.
// Else if B_VALID is not set, read buf from disk, set B_VALID.
void
iderw(struct buf *b)
{
80102120: 55 push %ebp
80102121: 89 e5 mov %esp,%ebp
80102123: 53 push %ebx
80102124: 83 ec 14 sub $0x14,%esp
80102127: 8b 5d 08 mov 0x8(%ebp),%ebx
struct buf **pp;
if(!holdingsleep(&b->lock))
8010212a: 8d 43 0c lea 0xc(%ebx),%eax
8010212d: 89 04 24 mov %eax,(%esp)
80102130: e8 eb 1e 00 00 call 80104020 <holdingsleep>
80102135: 85 c0 test %eax,%eax
80102137: 0f 84 9e 00 00 00 je 801021db <iderw+0xbb>
panic("iderw: buf not locked");
if((b->flags & (B_VALID|B_DIRTY)) == B_VALID)
8010213d: 8b 03 mov (%ebx),%eax
8010213f: 83 e0 06 and $0x6,%eax
80102142: 83 f8 02 cmp $0x2,%eax
80102145: 0f 84 a8 00 00 00 je 801021f3 <iderw+0xd3>
panic("iderw: nothing to do");
if(b->dev != 0 && !havedisk1)
8010214b: 8b 53 04 mov 0x4(%ebx),%edx
8010214e: 85 d2 test %edx,%edx
80102150: 74 0d je 8010215f <iderw+0x3f>
80102152: a1 60 a5 10 80 mov 0x8010a560,%eax
80102157: 85 c0 test %eax,%eax
80102159: 0f 84 88 00 00 00 je 801021e7 <iderw+0xc7>
panic("iderw: ide disk 1 not present");
acquire(&idelock); //DOC:acquire-lock
8010215f: c7 04 24 80 a5 10 80 movl $0x8010a580,(%esp)
80102166: e8 d5 1f 00 00 call 80104140 <acquire>
// Append b to idequeue.
b->qnext = 0;
for(pp=&idequeue; *pp; pp=&(*pp)->qnext) //DOC:insert-queue
8010216b: a1 64 a5 10 80 mov 0x8010a564,%eax
b->qnext = 0;
80102170: c7 43 58 00 00 00 00 movl $0x0,0x58(%ebx)
for(pp=&idequeue; *pp; pp=&(*pp)->qnext) //DOC:insert-queue
80102177: 85 c0 test %eax,%eax
80102179: 75 07 jne 80102182 <iderw+0x62>
8010217b: eb 4e jmp 801021cb <iderw+0xab>
8010217d: 8d 76 00 lea 0x0(%esi),%esi
80102180: 89 d0 mov %edx,%eax
80102182: 8b 50 58 mov 0x58(%eax),%edx
80102185: 85 d2 test %edx,%edx
80102187: 75 f7 jne 80102180 <iderw+0x60>
80102189: 83 c0 58 add $0x58,%eax
;
*pp = b;
8010218c: 89 18 mov %ebx,(%eax)
// Start disk if necessary.
if(idequeue == b)
8010218e: 39 1d 64 a5 10 80 cmp %ebx,0x8010a564
80102194: 74 3c je 801021d2 <iderw+0xb2>
idestart(b);
// Wait for request to finish.
while((b->flags & (B_VALID|B_DIRTY)) != B_VALID){
80102196: 8b 03 mov (%ebx),%eax
80102198: 83 e0 06 and $0x6,%eax
8010219b: 83 f8 02 cmp $0x2,%eax
8010219e: 74 1a je 801021ba <iderw+0x9a>
sleep(b, &idelock);
801021a0: c7 44 24 04 80 a5 10 movl $0x8010a580,0x4(%esp)
801021a7: 80
801021a8: 89 1c 24 mov %ebx,(%esp)
801021ab: e8 50 1a 00 00 call 80103c00 <sleep>
while((b->flags & (B_VALID|B_DIRTY)) != B_VALID){
801021b0: 8b 13 mov (%ebx),%edx
801021b2: 83 e2 06 and $0x6,%edx
801021b5: 83 fa 02 cmp $0x2,%edx
801021b8: 75 e6 jne 801021a0 <iderw+0x80>
}
release(&idelock);
801021ba: c7 45 08 80 a5 10 80 movl $0x8010a580,0x8(%ebp)
}
801021c1: 83 c4 14 add $0x14,%esp
801021c4: 5b pop %ebx
801021c5: 5d pop %ebp
release(&idelock);
801021c6: e9 65 20 00 00 jmp 80104230 <release>
for(pp=&idequeue; *pp; pp=&(*pp)->qnext) //DOC:insert-queue
801021cb: b8 64 a5 10 80 mov $0x8010a564,%eax
801021d0: eb ba jmp 8010218c <iderw+0x6c>
idestart(b);
801021d2: 89 d8 mov %ebx,%eax
801021d4: e8 67 fd ff ff call 80101f40 <idestart>
801021d9: eb bb jmp 80102196 <iderw+0x76>
panic("iderw: buf not locked");
801021db: c7 04 24 76 70 10 80 movl $0x80107076,(%esp)
801021e2: e8 79 e1 ff ff call 80100360 <panic>
panic("iderw: ide disk 1 not present");
801021e7: c7 04 24 a1 70 10 80 movl $0x801070a1,(%esp)
801021ee: e8 6d e1 ff ff call 80100360 <panic>
panic("iderw: nothing to do");
801021f3: c7 04 24 8c 70 10 80 movl $0x8010708c,(%esp)
801021fa: e8 61 e1 ff ff call 80100360 <panic>
801021ff: 90 nop
80102200 <ioapicinit>:
ioapic->data = data;
}
void
ioapicinit(void)
{
80102200: 55 push %ebp
80102201: 89 e5 mov %esp,%ebp
80102203: 56 push %esi
80102204: 53 push %ebx
80102205: 83 ec 10 sub $0x10,%esp
int i, id, maxintr;
ioapic = (volatile struct ioapic*)IOAPIC;
80102208: c7 05 34 26 11 80 00 movl $0xfec00000,0x80112634
8010220f: 00 c0 fe
ioapic->reg = reg;
80102212: c7 05 00 00 c0 fe 01 movl $0x1,0xfec00000
80102219: 00 00 00
return ioapic->data;
8010221c: 8b 15 34 26 11 80 mov 0x80112634,%edx
80102222: 8b 42 10 mov 0x10(%edx),%eax
ioapic->reg = reg;
80102225: c7 02 00 00 00 00 movl $0x0,(%edx)
return ioapic->data;
8010222b: 8b 1d 34 26 11 80 mov 0x80112634,%ebx
maxintr = (ioapicread(REG_VER) >> 16) & 0xFF;
id = ioapicread(REG_ID) >> 24;
if(id != ioapicid)
80102231: 0f b6 15 60 27 11 80 movzbl 0x80112760,%edx
maxintr = (ioapicread(REG_VER) >> 16) & 0xFF;
80102238: c1 e8 10 shr $0x10,%eax
8010223b: 0f b6 f0 movzbl %al,%esi
return ioapic->data;
8010223e: 8b 43 10 mov 0x10(%ebx),%eax
id = ioapicread(REG_ID) >> 24;
80102241: c1 e8 18 shr $0x18,%eax
if(id != ioapicid)
80102244: 39 c2 cmp %eax,%edx
80102246: 74 12 je 8010225a <ioapicinit+0x5a>
cprintf("ioapicinit: id isn't equal to ioapicid; not a MP\n");
80102248: c7 04 24 c0 70 10 80 movl $0x801070c0,(%esp)
8010224f: e8 fc e3 ff ff call 80100650 <cprintf>
80102254: 8b 1d 34 26 11 80 mov 0x80112634,%ebx
8010225a: ba 10 00 00 00 mov $0x10,%edx
8010225f: 31 c0 xor %eax,%eax
80102261: eb 07 jmp 8010226a <ioapicinit+0x6a>
80102263: 90 nop
80102264: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80102268: 89 cb mov %ecx,%ebx
ioapic->reg = reg;
8010226a: 89 13 mov %edx,(%ebx)
ioapic->data = data;
8010226c: 8b 1d 34 26 11 80 mov 0x80112634,%ebx
80102272: 8d 48 20 lea 0x20(%eax),%ecx
// Mark all interrupts edge-triggered, active high, disabled,
// and not routed to any CPUs.
for(i = 0; i <= maxintr; i++){
ioapicwrite(REG_TABLE+2*i, INT_DISABLED | (T_IRQ0 + i));
80102275: 81 c9 00 00 01 00 or $0x10000,%ecx
for(i = 0; i <= maxintr; i++){
8010227b: 83 c0 01 add $0x1,%eax
ioapic->data = data;
8010227e: 89 4b 10 mov %ecx,0x10(%ebx)
80102281: 8d 4a 01 lea 0x1(%edx),%ecx
80102284: 83 c2 02 add $0x2,%edx
ioapic->reg = reg;
80102287: 89 0b mov %ecx,(%ebx)
ioapic->data = data;
80102289: 8b 0d 34 26 11 80 mov 0x80112634,%ecx
for(i = 0; i <= maxintr; i++){
8010228f: 39 c6 cmp %eax,%esi
ioapic->data = data;
80102291: c7 41 10 00 00 00 00 movl $0x0,0x10(%ecx)
for(i = 0; i <= maxintr; i++){
80102298: 7d ce jge 80102268 <ioapicinit+0x68>
ioapicwrite(REG_TABLE+2*i+1, 0);
}
}
8010229a: 83 c4 10 add $0x10,%esp
8010229d: 5b pop %ebx
8010229e: 5e pop %esi
8010229f: 5d pop %ebp
801022a0: c3 ret
801022a1: eb 0d jmp 801022b0 <ioapicenable>
801022a3: 90 nop
801022a4: 90 nop
801022a5: 90 nop
801022a6: 90 nop
801022a7: 90 nop
801022a8: 90 nop
801022a9: 90 nop
801022aa: 90 nop
801022ab: 90 nop
801022ac: 90 nop
801022ad: 90 nop
801022ae: 90 nop
801022af: 90 nop
801022b0 <ioapicenable>:
void
ioapicenable(int irq, int cpunum)
{
801022b0: 55 push %ebp
801022b1: 89 e5 mov %esp,%ebp
801022b3: 8b 55 08 mov 0x8(%ebp),%edx
801022b6: 53 push %ebx
801022b7: 8b 45 0c mov 0xc(%ebp),%eax
// Mark interrupt edge-triggered, active high,
// enabled, and routed to the given cpunum,
// which happens to be that cpu's APIC ID.
ioapicwrite(REG_TABLE+2*irq, T_IRQ0 + irq);
801022ba: 8d 5a 20 lea 0x20(%edx),%ebx
801022bd: 8d 4c 12 10 lea 0x10(%edx,%edx,1),%ecx
ioapic->reg = reg;
801022c1: 8b 15 34 26 11 80 mov 0x80112634,%edx
ioapicwrite(REG_TABLE+2*irq+1, cpunum << 24);
801022c7: c1 e0 18 shl $0x18,%eax
ioapic->reg = reg;
801022ca: 89 0a mov %ecx,(%edx)
ioapic->data = data;
801022cc: 8b 15 34 26 11 80 mov 0x80112634,%edx
ioapicwrite(REG_TABLE+2*irq+1, cpunum << 24);
801022d2: 83 c1 01 add $0x1,%ecx
ioapic->data = data;
801022d5: 89 5a 10 mov %ebx,0x10(%edx)
ioapic->reg = reg;
801022d8: 89 0a mov %ecx,(%edx)
ioapic->data = data;
801022da: 8b 15 34 26 11 80 mov 0x80112634,%edx
801022e0: 89 42 10 mov %eax,0x10(%edx)
}
801022e3: 5b pop %ebx
801022e4: 5d pop %ebp
801022e5: c3 ret
801022e6: 66 90 xchg %ax,%ax
801022e8: 66 90 xchg %ax,%ax
801022ea: 66 90 xchg %ax,%ax
801022ec: 66 90 xchg %ax,%ax
801022ee: 66 90 xchg %ax,%ax
801022f0 <kfree>:
// which normally should have been returned by a
// call to kalloc(). (The exception is when
// initializing the allocator; see kinit above.)
void
kfree(char *v)
{
801022f0: 55 push %ebp
801022f1: 89 e5 mov %esp,%ebp
801022f3: 53 push %ebx
801022f4: 83 ec 14 sub $0x14,%esp
801022f7: 8b 5d 08 mov 0x8(%ebp),%ebx
struct run *r;
if((uint)v % PGSIZE || v < end || V2P(v) >= PHYSTOP)
801022fa: f7 c3 ff 0f 00 00 test $0xfff,%ebx
80102300: 75 7c jne 8010237e <kfree+0x8e>
80102302: 81 fb f4 58 11 80 cmp $0x801158f4,%ebx
80102308: 72 74 jb 8010237e <kfree+0x8e>
8010230a: 8d 83 00 00 00 80 lea -0x80000000(%ebx),%eax
80102310: 3d ff ff ff 0d cmp $0xdffffff,%eax
80102315: 77 67 ja 8010237e <kfree+0x8e>
panic("kfree");
// Fill with junk to catch dangling refs.
memset(v, 1, PGSIZE);
80102317: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
8010231e: 00
8010231f: c7 44 24 04 01 00 00 movl $0x1,0x4(%esp)
80102326: 00
80102327: 89 1c 24 mov %ebx,(%esp)
8010232a: e8 51 1f 00 00 call 80104280 <memset>
if(kmem.use_lock)
8010232f: 8b 15 74 26 11 80 mov 0x80112674,%edx
80102335: 85 d2 test %edx,%edx
80102337: 75 37 jne 80102370 <kfree+0x80>
acquire(&kmem.lock);
r = (struct run*)v;
r->next = kmem.freelist;
80102339: a1 78 26 11 80 mov 0x80112678,%eax
8010233e: 89 03 mov %eax,(%ebx)
kmem.freelist = r;
if(kmem.use_lock)
80102340: a1 74 26 11 80 mov 0x80112674,%eax
kmem.freelist = r;
80102345: 89 1d 78 26 11 80 mov %ebx,0x80112678
if(kmem.use_lock)
8010234b: 85 c0 test %eax,%eax
8010234d: 75 09 jne 80102358 <kfree+0x68>
release(&kmem.lock);
}
8010234f: 83 c4 14 add $0x14,%esp
80102352: 5b pop %ebx
80102353: 5d pop %ebp
80102354: c3 ret
80102355: 8d 76 00 lea 0x0(%esi),%esi
release(&kmem.lock);
80102358: c7 45 08 40 26 11 80 movl $0x80112640,0x8(%ebp)
}
8010235f: 83 c4 14 add $0x14,%esp
80102362: 5b pop %ebx
80102363: 5d pop %ebp
release(&kmem.lock);
80102364: e9 c7 1e 00 00 jmp 80104230 <release>
80102369: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
acquire(&kmem.lock);
80102370: c7 04 24 40 26 11 80 movl $0x80112640,(%esp)
80102377: e8 c4 1d 00 00 call 80104140 <acquire>
8010237c: eb bb jmp 80102339 <kfree+0x49>
panic("kfree");
8010237e: c7 04 24 f2 70 10 80 movl $0x801070f2,(%esp)
80102385: e8 d6 df ff ff call 80100360 <panic>
8010238a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80102390 <freerange>:
{
80102390: 55 push %ebp
80102391: 89 e5 mov %esp,%ebp
80102393: 56 push %esi
80102394: 53 push %ebx
80102395: 83 ec 10 sub $0x10,%esp
p = (char*)PGROUNDUP((uint)vstart);
80102398: 8b 45 08 mov 0x8(%ebp),%eax
{
8010239b: 8b 75 0c mov 0xc(%ebp),%esi
p = (char*)PGROUNDUP((uint)vstart);
8010239e: 8d 90 ff 0f 00 00 lea 0xfff(%eax),%edx
801023a4: 81 e2 00 f0 ff ff and $0xfffff000,%edx
for(; p + PGSIZE <= (char*)vend; p += PGSIZE)
801023aa: 8d 9a 00 10 00 00 lea 0x1000(%edx),%ebx
801023b0: 39 de cmp %ebx,%esi
801023b2: 73 08 jae 801023bc <freerange+0x2c>
801023b4: eb 18 jmp 801023ce <freerange+0x3e>
801023b6: 66 90 xchg %ax,%ax
801023b8: 89 da mov %ebx,%edx
801023ba: 89 c3 mov %eax,%ebx
kfree(p);
801023bc: 89 14 24 mov %edx,(%esp)
801023bf: e8 2c ff ff ff call 801022f0 <kfree>
for(; p + PGSIZE <= (char*)vend; p += PGSIZE)
801023c4: 8d 83 00 10 00 00 lea 0x1000(%ebx),%eax
801023ca: 39 f0 cmp %esi,%eax
801023cc: 76 ea jbe 801023b8 <freerange+0x28>
}
801023ce: 83 c4 10 add $0x10,%esp
801023d1: 5b pop %ebx
801023d2: 5e pop %esi
801023d3: 5d pop %ebp
801023d4: c3 ret
801023d5: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801023d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801023e0 <kinit1>:
{
801023e0: 55 push %ebp
801023e1: 89 e5 mov %esp,%ebp
801023e3: 56 push %esi
801023e4: 53 push %ebx
801023e5: 83 ec 10 sub $0x10,%esp
801023e8: 8b 75 0c mov 0xc(%ebp),%esi
initlock(&kmem.lock, "kmem");
801023eb: c7 44 24 04 f8 70 10 movl $0x801070f8,0x4(%esp)
801023f2: 80
801023f3: c7 04 24 40 26 11 80 movl $0x80112640,(%esp)
801023fa: e8 51 1c 00 00 call 80104050 <initlock>
p = (char*)PGROUNDUP((uint)vstart);
801023ff: 8b 45 08 mov 0x8(%ebp),%eax
kmem.use_lock = 0;
80102402: c7 05 74 26 11 80 00 movl $0x0,0x80112674
80102409: 00 00 00
p = (char*)PGROUNDUP((uint)vstart);
8010240c: 8d 90 ff 0f 00 00 lea 0xfff(%eax),%edx
80102412: 81 e2 00 f0 ff ff and $0xfffff000,%edx
for(; p + PGSIZE <= (char*)vend; p += PGSIZE)
80102418: 8d 9a 00 10 00 00 lea 0x1000(%edx),%ebx
8010241e: 39 de cmp %ebx,%esi
80102420: 73 0a jae 8010242c <kinit1+0x4c>
80102422: eb 1a jmp 8010243e <kinit1+0x5e>
80102424: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80102428: 89 da mov %ebx,%edx
8010242a: 89 c3 mov %eax,%ebx
kfree(p);
8010242c: 89 14 24 mov %edx,(%esp)
8010242f: e8 bc fe ff ff call 801022f0 <kfree>
for(; p + PGSIZE <= (char*)vend; p += PGSIZE)
80102434: 8d 83 00 10 00 00 lea 0x1000(%ebx),%eax
8010243a: 39 c6 cmp %eax,%esi
8010243c: 73 ea jae 80102428 <kinit1+0x48>
}
8010243e: 83 c4 10 add $0x10,%esp
80102441: 5b pop %ebx
80102442: 5e pop %esi
80102443: 5d pop %ebp
80102444: c3 ret
80102445: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80102449: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102450 <kinit2>:
{
80102450: 55 push %ebp
80102451: 89 e5 mov %esp,%ebp
80102453: 56 push %esi
80102454: 53 push %ebx
80102455: 83 ec 10 sub $0x10,%esp
p = (char*)PGROUNDUP((uint)vstart);
80102458: 8b 45 08 mov 0x8(%ebp),%eax
{
8010245b: 8b 75 0c mov 0xc(%ebp),%esi
p = (char*)PGROUNDUP((uint)vstart);
8010245e: 8d 90 ff 0f 00 00 lea 0xfff(%eax),%edx
80102464: 81 e2 00 f0 ff ff and $0xfffff000,%edx
for(; p + PGSIZE <= (char*)vend; p += PGSIZE)
8010246a: 8d 9a 00 10 00 00 lea 0x1000(%edx),%ebx
80102470: 39 de cmp %ebx,%esi
80102472: 73 08 jae 8010247c <kinit2+0x2c>
80102474: eb 18 jmp 8010248e <kinit2+0x3e>
80102476: 66 90 xchg %ax,%ax
80102478: 89 da mov %ebx,%edx
8010247a: 89 c3 mov %eax,%ebx
kfree(p);
8010247c: 89 14 24 mov %edx,(%esp)
8010247f: e8 6c fe ff ff call 801022f0 <kfree>
for(; p + PGSIZE <= (char*)vend; p += PGSIZE)
80102484: 8d 83 00 10 00 00 lea 0x1000(%ebx),%eax
8010248a: 39 c6 cmp %eax,%esi
8010248c: 73 ea jae 80102478 <kinit2+0x28>
kmem.use_lock = 1;
8010248e: c7 05 74 26 11 80 01 movl $0x1,0x80112674
80102495: 00 00 00
}
80102498: 83 c4 10 add $0x10,%esp
8010249b: 5b pop %ebx
8010249c: 5e pop %esi
8010249d: 5d pop %ebp
8010249e: c3 ret
8010249f: 90 nop
801024a0 <kalloc>:
// Allocate one 4096-byte page of physical memory.
// Returns a pointer that the kernel can use.
// Returns 0 if the memory cannot be allocated.
char*
kalloc(void)
{
801024a0: 55 push %ebp
801024a1: 89 e5 mov %esp,%ebp
801024a3: 53 push %ebx
801024a4: 83 ec 14 sub $0x14,%esp
struct run *r;
if(kmem.use_lock)
801024a7: a1 74 26 11 80 mov 0x80112674,%eax
801024ac: 85 c0 test %eax,%eax
801024ae: 75 30 jne 801024e0 <kalloc+0x40>
acquire(&kmem.lock);
r = kmem.freelist;
801024b0: 8b 1d 78 26 11 80 mov 0x80112678,%ebx
if(r)
801024b6: 85 db test %ebx,%ebx
801024b8: 74 08 je 801024c2 <kalloc+0x22>
kmem.freelist = r->next;
801024ba: 8b 13 mov (%ebx),%edx
801024bc: 89 15 78 26 11 80 mov %edx,0x80112678
if(kmem.use_lock)
801024c2: 85 c0 test %eax,%eax
801024c4: 74 0c je 801024d2 <kalloc+0x32>
release(&kmem.lock);
801024c6: c7 04 24 40 26 11 80 movl $0x80112640,(%esp)
801024cd: e8 5e 1d 00 00 call 80104230 <release>
return (char*)r;
}
801024d2: 83 c4 14 add $0x14,%esp
801024d5: 89 d8 mov %ebx,%eax
801024d7: 5b pop %ebx
801024d8: 5d pop %ebp
801024d9: c3 ret
801024da: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
acquire(&kmem.lock);
801024e0: c7 04 24 40 26 11 80 movl $0x80112640,(%esp)
801024e7: e8 54 1c 00 00 call 80104140 <acquire>
801024ec: a1 74 26 11 80 mov 0x80112674,%eax
801024f1: eb bd jmp 801024b0 <kalloc+0x10>
801024f3: 66 90 xchg %ax,%ax
801024f5: 66 90 xchg %ax,%ax
801024f7: 66 90 xchg %ax,%ax
801024f9: 66 90 xchg %ax,%ax
801024fb: 66 90 xchg %ax,%ax
801024fd: 66 90 xchg %ax,%ax
801024ff: 90 nop
80102500 <kbdgetc>:
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102500: ba 64 00 00 00 mov $0x64,%edx
80102505: ec in (%dx),%al
normalmap, shiftmap, ctlmap, ctlmap
};
uint st, data, c;
st = inb(KBSTATP);
if((st & KBS_DIB) == 0)
80102506: a8 01 test $0x1,%al
80102508: 0f 84 ba 00 00 00 je 801025c8 <kbdgetc+0xc8>
8010250e: b2 60 mov $0x60,%dl
80102510: ec in (%dx),%al
return -1;
data = inb(KBDATAP);
80102511: 0f b6 c8 movzbl %al,%ecx
if(data == 0xE0){
80102514: 81 f9 e0 00 00 00 cmp $0xe0,%ecx
8010251a: 0f 84 88 00 00 00 je 801025a8 <kbdgetc+0xa8>
shift |= E0ESC;
return 0;
} else if(data & 0x80){
80102520: 84 c0 test %al,%al
80102522: 79 2c jns 80102550 <kbdgetc+0x50>
// Key released
data = (shift & E0ESC ? data : data & 0x7F);
80102524: 8b 15 b4 a5 10 80 mov 0x8010a5b4,%edx
8010252a: f6 c2 40 test $0x40,%dl
8010252d: 75 05 jne 80102534 <kbdgetc+0x34>
8010252f: 89 c1 mov %eax,%ecx
80102531: 83 e1 7f and $0x7f,%ecx
shift &= ~(shiftcode[data] | E0ESC);
80102534: 0f b6 81 20 72 10 80 movzbl -0x7fef8de0(%ecx),%eax
8010253b: 83 c8 40 or $0x40,%eax
8010253e: 0f b6 c0 movzbl %al,%eax
80102541: f7 d0 not %eax
80102543: 21 d0 and %edx,%eax
80102545: a3 b4 a5 10 80 mov %eax,0x8010a5b4
return 0;
8010254a: 31 c0 xor %eax,%eax
8010254c: c3 ret
8010254d: 8d 76 00 lea 0x0(%esi),%esi
{
80102550: 55 push %ebp
80102551: 89 e5 mov %esp,%ebp
80102553: 53 push %ebx
80102554: 8b 1d b4 a5 10 80 mov 0x8010a5b4,%ebx
} else if(shift & E0ESC){
8010255a: f6 c3 40 test $0x40,%bl
8010255d: 74 09 je 80102568 <kbdgetc+0x68>
// Last character was an E0 escape; or with 0x80
data |= 0x80;
8010255f: 83 c8 80 or $0xffffff80,%eax
shift &= ~E0ESC;
80102562: 83 e3 bf and $0xffffffbf,%ebx
data |= 0x80;
80102565: 0f b6 c8 movzbl %al,%ecx
}
shift |= shiftcode[data];
80102568: 0f b6 91 20 72 10 80 movzbl -0x7fef8de0(%ecx),%edx
shift ^= togglecode[data];
8010256f: 0f b6 81 20 71 10 80 movzbl -0x7fef8ee0(%ecx),%eax
shift |= shiftcode[data];
80102576: 09 da or %ebx,%edx
shift ^= togglecode[data];
80102578: 31 c2 xor %eax,%edx
c = charcode[shift & (CTL | SHIFT)][data];
8010257a: 89 d0 mov %edx,%eax
8010257c: 83 e0 03 and $0x3,%eax
8010257f: 8b 04 85 00 71 10 80 mov -0x7fef8f00(,%eax,4),%eax
shift ^= togglecode[data];
80102586: 89 15 b4 a5 10 80 mov %edx,0x8010a5b4
if(shift & CAPSLOCK){
8010258c: 83 e2 08 and $0x8,%edx
c = charcode[shift & (CTL | SHIFT)][data];
8010258f: 0f b6 04 08 movzbl (%eax,%ecx,1),%eax
if(shift & CAPSLOCK){
80102593: 74 0b je 801025a0 <kbdgetc+0xa0>
if('a' <= c && c <= 'z')
80102595: 8d 50 9f lea -0x61(%eax),%edx
80102598: 83 fa 19 cmp $0x19,%edx
8010259b: 77 1b ja 801025b8 <kbdgetc+0xb8>
c += 'A' - 'a';
8010259d: 83 e8 20 sub $0x20,%eax
else if('A' <= c && c <= 'Z')
c += 'a' - 'A';
}
return c;
}
801025a0: 5b pop %ebx
801025a1: 5d pop %ebp
801025a2: c3 ret
801025a3: 90 nop
801025a4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
shift |= E0ESC;
801025a8: 83 0d b4 a5 10 80 40 orl $0x40,0x8010a5b4
return 0;
801025af: 31 c0 xor %eax,%eax
801025b1: c3 ret
801025b2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
else if('A' <= c && c <= 'Z')
801025b8: 8d 48 bf lea -0x41(%eax),%ecx
c += 'a' - 'A';
801025bb: 8d 50 20 lea 0x20(%eax),%edx
801025be: 83 f9 19 cmp $0x19,%ecx
801025c1: 0f 46 c2 cmovbe %edx,%eax
return c;
801025c4: eb da jmp 801025a0 <kbdgetc+0xa0>
801025c6: 66 90 xchg %ax,%ax
return -1;
801025c8: b8 ff ff ff ff mov $0xffffffff,%eax
801025cd: c3 ret
801025ce: 66 90 xchg %ax,%ax
801025d0 <kbdintr>:
void
kbdintr(void)
{
801025d0: 55 push %ebp
801025d1: 89 e5 mov %esp,%ebp
801025d3: 83 ec 18 sub $0x18,%esp
consoleintr(kbdgetc);
801025d6: c7 04 24 00 25 10 80 movl $0x80102500,(%esp)
801025dd: e8 ce e1 ff ff call 801007b0 <consoleintr>
}
801025e2: c9 leave
801025e3: c3 ret
801025e4: 66 90 xchg %ax,%ax
801025e6: 66 90 xchg %ax,%ax
801025e8: 66 90 xchg %ax,%ax
801025ea: 66 90 xchg %ax,%ax
801025ec: 66 90 xchg %ax,%ax
801025ee: 66 90 xchg %ax,%ax
801025f0 <fill_rtcdate>:
return inb(CMOS_RETURN);
}
static void fill_rtcdate(struct rtcdate *r)
{
801025f0: 55 push %ebp
801025f1: 89 c1 mov %eax,%ecx
801025f3: 89 e5 mov %esp,%ebp
asm volatile("out %0,%1" : : "a" (data), "d" (port));
801025f5: ba 70 00 00 00 mov $0x70,%edx
801025fa: 53 push %ebx
801025fb: 31 c0 xor %eax,%eax
801025fd: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
801025fe: bb 71 00 00 00 mov $0x71,%ebx
80102603: 89 da mov %ebx,%edx
80102605: ec in (%dx),%al
return inb(CMOS_RETURN);
80102606: 0f b6 c0 movzbl %al,%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80102609: b2 70 mov $0x70,%dl
8010260b: 89 01 mov %eax,(%ecx)
8010260d: b8 02 00 00 00 mov $0x2,%eax
80102612: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102613: 89 da mov %ebx,%edx
80102615: ec in (%dx),%al
80102616: 0f b6 c0 movzbl %al,%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80102619: b2 70 mov $0x70,%dl
8010261b: 89 41 04 mov %eax,0x4(%ecx)
8010261e: b8 04 00 00 00 mov $0x4,%eax
80102623: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102624: 89 da mov %ebx,%edx
80102626: ec in (%dx),%al
80102627: 0f b6 c0 movzbl %al,%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
8010262a: b2 70 mov $0x70,%dl
8010262c: 89 41 08 mov %eax,0x8(%ecx)
8010262f: b8 07 00 00 00 mov $0x7,%eax
80102634: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102635: 89 da mov %ebx,%edx
80102637: ec in (%dx),%al
80102638: 0f b6 c0 movzbl %al,%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
8010263b: b2 70 mov $0x70,%dl
8010263d: 89 41 0c mov %eax,0xc(%ecx)
80102640: b8 08 00 00 00 mov $0x8,%eax
80102645: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102646: 89 da mov %ebx,%edx
80102648: ec in (%dx),%al
80102649: 0f b6 c0 movzbl %al,%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
8010264c: b2 70 mov $0x70,%dl
8010264e: 89 41 10 mov %eax,0x10(%ecx)
80102651: b8 09 00 00 00 mov $0x9,%eax
80102656: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102657: 89 da mov %ebx,%edx
80102659: ec in (%dx),%al
8010265a: 0f b6 d8 movzbl %al,%ebx
8010265d: 89 59 14 mov %ebx,0x14(%ecx)
r->minute = cmos_read(MINS);
r->hour = cmos_read(HOURS);
r->day = cmos_read(DAY);
r->month = cmos_read(MONTH);
r->year = cmos_read(YEAR);
}
80102660: 5b pop %ebx
80102661: 5d pop %ebp
80102662: c3 ret
80102663: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80102669: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102670 <lapicinit>:
if(!lapic)
80102670: a1 7c 26 11 80 mov 0x8011267c,%eax
{
80102675: 55 push %ebp
80102676: 89 e5 mov %esp,%ebp
if(!lapic)
80102678: 85 c0 test %eax,%eax
8010267a: 0f 84 c0 00 00 00 je 80102740 <lapicinit+0xd0>
lapic[index] = value;
80102680: c7 80 f0 00 00 00 3f movl $0x13f,0xf0(%eax)
80102687: 01 00 00
lapic[ID]; // wait for write to finish, by reading
8010268a: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
8010268d: c7 80 e0 03 00 00 0b movl $0xb,0x3e0(%eax)
80102694: 00 00 00
lapic[ID]; // wait for write to finish, by reading
80102697: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
8010269a: c7 80 20 03 00 00 20 movl $0x20020,0x320(%eax)
801026a1: 00 02 00
lapic[ID]; // wait for write to finish, by reading
801026a4: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
801026a7: c7 80 80 03 00 00 80 movl $0x989680,0x380(%eax)
801026ae: 96 98 00
lapic[ID]; // wait for write to finish, by reading
801026b1: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
801026b4: c7 80 50 03 00 00 00 movl $0x10000,0x350(%eax)
801026bb: 00 01 00
lapic[ID]; // wait for write to finish, by reading
801026be: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
801026c1: c7 80 60 03 00 00 00 movl $0x10000,0x360(%eax)
801026c8: 00 01 00
lapic[ID]; // wait for write to finish, by reading
801026cb: 8b 50 20 mov 0x20(%eax),%edx
if(((lapic[VER]>>16) & 0xFF) >= 4)
801026ce: 8b 50 30 mov 0x30(%eax),%edx
801026d1: c1 ea 10 shr $0x10,%edx
801026d4: 80 fa 03 cmp $0x3,%dl
801026d7: 77 6f ja 80102748 <lapicinit+0xd8>
lapic[index] = value;
801026d9: c7 80 70 03 00 00 33 movl $0x33,0x370(%eax)
801026e0: 00 00 00
lapic[ID]; // wait for write to finish, by reading
801026e3: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
801026e6: c7 80 80 02 00 00 00 movl $0x0,0x280(%eax)
801026ed: 00 00 00
lapic[ID]; // wait for write to finish, by reading
801026f0: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
801026f3: c7 80 80 02 00 00 00 movl $0x0,0x280(%eax)
801026fa: 00 00 00
lapic[ID]; // wait for write to finish, by reading
801026fd: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
80102700: c7 80 b0 00 00 00 00 movl $0x0,0xb0(%eax)
80102707: 00 00 00
lapic[ID]; // wait for write to finish, by reading
8010270a: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
8010270d: c7 80 10 03 00 00 00 movl $0x0,0x310(%eax)
80102714: 00 00 00
lapic[ID]; // wait for write to finish, by reading
80102717: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
8010271a: c7 80 00 03 00 00 00 movl $0x88500,0x300(%eax)
80102721: 85 08 00
lapic[ID]; // wait for write to finish, by reading
80102724: 8b 50 20 mov 0x20(%eax),%edx
80102727: 90 nop
while(lapic[ICRLO] & DELIVS)
80102728: 8b 90 00 03 00 00 mov 0x300(%eax),%edx
8010272e: 80 e6 10 and $0x10,%dh
80102731: 75 f5 jne 80102728 <lapicinit+0xb8>
lapic[index] = value;
80102733: c7 80 80 00 00 00 00 movl $0x0,0x80(%eax)
8010273a: 00 00 00
lapic[ID]; // wait for write to finish, by reading
8010273d: 8b 40 20 mov 0x20(%eax),%eax
}
80102740: 5d pop %ebp
80102741: c3 ret
80102742: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
lapic[index] = value;
80102748: c7 80 40 03 00 00 00 movl $0x10000,0x340(%eax)
8010274f: 00 01 00
lapic[ID]; // wait for write to finish, by reading
80102752: 8b 50 20 mov 0x20(%eax),%edx
80102755: eb 82 jmp 801026d9 <lapicinit+0x69>
80102757: 89 f6 mov %esi,%esi
80102759: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102760 <lapicid>:
if (!lapic)
80102760: a1 7c 26 11 80 mov 0x8011267c,%eax
{
80102765: 55 push %ebp
80102766: 89 e5 mov %esp,%ebp
if (!lapic)
80102768: 85 c0 test %eax,%eax
8010276a: 74 0c je 80102778 <lapicid+0x18>
return lapic[ID] >> 24;
8010276c: 8b 40 20 mov 0x20(%eax),%eax
}
8010276f: 5d pop %ebp
return lapic[ID] >> 24;
80102770: c1 e8 18 shr $0x18,%eax
}
80102773: c3 ret
80102774: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return 0;
80102778: 31 c0 xor %eax,%eax
}
8010277a: 5d pop %ebp
8010277b: c3 ret
8010277c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80102780 <lapiceoi>:
if(lapic)
80102780: a1 7c 26 11 80 mov 0x8011267c,%eax
{
80102785: 55 push %ebp
80102786: 89 e5 mov %esp,%ebp
if(lapic)
80102788: 85 c0 test %eax,%eax
8010278a: 74 0d je 80102799 <lapiceoi+0x19>
lapic[index] = value;
8010278c: c7 80 b0 00 00 00 00 movl $0x0,0xb0(%eax)
80102793: 00 00 00
lapic[ID]; // wait for write to finish, by reading
80102796: 8b 40 20 mov 0x20(%eax),%eax
}
80102799: 5d pop %ebp
8010279a: c3 ret
8010279b: 90 nop
8010279c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801027a0 <microdelay>:
{
801027a0: 55 push %ebp
801027a1: 89 e5 mov %esp,%ebp
}
801027a3: 5d pop %ebp
801027a4: c3 ret
801027a5: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801027a9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801027b0 <lapicstartap>:
{
801027b0: 55 push %ebp
asm volatile("out %0,%1" : : "a" (data), "d" (port));
801027b1: ba 70 00 00 00 mov $0x70,%edx
801027b6: 89 e5 mov %esp,%ebp
801027b8: b8 0f 00 00 00 mov $0xf,%eax
801027bd: 53 push %ebx
801027be: 8b 4d 08 mov 0x8(%ebp),%ecx
801027c1: 8b 5d 0c mov 0xc(%ebp),%ebx
801027c4: ee out %al,(%dx)
801027c5: b8 0a 00 00 00 mov $0xa,%eax
801027ca: b2 71 mov $0x71,%dl
801027cc: ee out %al,(%dx)
wrv[0] = 0;
801027cd: 31 c0 xor %eax,%eax
801027cf: 66 a3 67 04 00 80 mov %ax,0x80000467
wrv[1] = addr >> 4;
801027d5: 89 d8 mov %ebx,%eax
801027d7: c1 e8 04 shr $0x4,%eax
801027da: 66 a3 69 04 00 80 mov %ax,0x80000469
lapic[index] = value;
801027e0: a1 7c 26 11 80 mov 0x8011267c,%eax
lapicw(ICRHI, apicid<<24);
801027e5: c1 e1 18 shl $0x18,%ecx
lapicw(ICRLO, STARTUP | (addr>>12));
801027e8: c1 eb 0c shr $0xc,%ebx
lapic[index] = value;
801027eb: 89 88 10 03 00 00 mov %ecx,0x310(%eax)
lapic[ID]; // wait for write to finish, by reading
801027f1: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
801027f4: c7 80 00 03 00 00 00 movl $0xc500,0x300(%eax)
801027fb: c5 00 00
lapic[ID]; // wait for write to finish, by reading
801027fe: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
80102801: c7 80 00 03 00 00 00 movl $0x8500,0x300(%eax)
80102808: 85 00 00
lapic[ID]; // wait for write to finish, by reading
8010280b: 8b 50 20 mov 0x20(%eax),%edx
lapic[index] = value;
8010280e: 89 88 10 03 00 00 mov %ecx,0x310(%eax)
lapic[ID]; // wait for write to finish, by reading
80102814: 8b 50 20 mov 0x20(%eax),%edx
lapicw(ICRLO, STARTUP | (addr>>12));
80102817: 89 da mov %ebx,%edx
80102819: 80 ce 06 or $0x6,%dh
lapic[index] = value;
8010281c: 89 90 00 03 00 00 mov %edx,0x300(%eax)
lapic[ID]; // wait for write to finish, by reading
80102822: 8b 58 20 mov 0x20(%eax),%ebx
lapic[index] = value;
80102825: 89 88 10 03 00 00 mov %ecx,0x310(%eax)
lapic[ID]; // wait for write to finish, by reading
8010282b: 8b 48 20 mov 0x20(%eax),%ecx
lapic[index] = value;
8010282e: 89 90 00 03 00 00 mov %edx,0x300(%eax)
lapic[ID]; // wait for write to finish, by reading
80102834: 8b 40 20 mov 0x20(%eax),%eax
}
80102837: 5b pop %ebx
80102838: 5d pop %ebp
80102839: c3 ret
8010283a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80102840 <cmostime>:
// qemu seems to use 24-hour GWT and the values are BCD encoded
void cmostime(struct rtcdate *r)
{
80102840: 55 push %ebp
80102841: ba 70 00 00 00 mov $0x70,%edx
80102846: 89 e5 mov %esp,%ebp
80102848: b8 0b 00 00 00 mov $0xb,%eax
8010284d: 57 push %edi
8010284e: 56 push %esi
8010284f: 53 push %ebx
80102850: 83 ec 4c sub $0x4c,%esp
80102853: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
80102854: b2 71 mov $0x71,%dl
80102856: ec in (%dx),%al
80102857: 88 45 b7 mov %al,-0x49(%ebp)
8010285a: 8d 5d b8 lea -0x48(%ebp),%ebx
struct rtcdate t1, t2;
int sb, bcd;
sb = cmos_read(CMOS_STATB);
bcd = (sb & (1 << 2)) == 0;
8010285d: 80 65 b7 04 andb $0x4,-0x49(%ebp)
80102861: 8d 7d d0 lea -0x30(%ebp),%edi
80102864: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
asm volatile("out %0,%1" : : "a" (data), "d" (port));
80102868: be 70 00 00 00 mov $0x70,%esi
// make sure CMOS doesn't modify time while we read it
for(;;) {
fill_rtcdate(&t1);
8010286d: 89 d8 mov %ebx,%eax
8010286f: e8 7c fd ff ff call 801025f0 <fill_rtcdate>
80102874: b8 0a 00 00 00 mov $0xa,%eax
80102879: 89 f2 mov %esi,%edx
8010287b: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
8010287c: ba 71 00 00 00 mov $0x71,%edx
80102881: ec in (%dx),%al
if(cmos_read(CMOS_STATA) & CMOS_UIP)
80102882: 84 c0 test %al,%al
80102884: 78 e7 js 8010286d <cmostime+0x2d>
continue;
fill_rtcdate(&t2);
80102886: 89 f8 mov %edi,%eax
80102888: e8 63 fd ff ff call 801025f0 <fill_rtcdate>
if(memcmp(&t1, &t2, sizeof(t1)) == 0)
8010288d: c7 44 24 08 18 00 00 movl $0x18,0x8(%esp)
80102894: 00
80102895: 89 7c 24 04 mov %edi,0x4(%esp)
80102899: 89 1c 24 mov %ebx,(%esp)
8010289c: e8 2f 1a 00 00 call 801042d0 <memcmp>
801028a1: 85 c0 test %eax,%eax
801028a3: 75 c3 jne 80102868 <cmostime+0x28>
break;
}
// convert
if(bcd) {
801028a5: 80 7d b7 00 cmpb $0x0,-0x49(%ebp)
801028a9: 75 78 jne 80102923 <cmostime+0xe3>
#define CONV(x) (t1.x = ((t1.x >> 4) * 10) + (t1.x & 0xf))
CONV(second);
801028ab: 8b 45 b8 mov -0x48(%ebp),%eax
801028ae: 89 c2 mov %eax,%edx
801028b0: 83 e0 0f and $0xf,%eax
801028b3: c1 ea 04 shr $0x4,%edx
801028b6: 8d 14 92 lea (%edx,%edx,4),%edx
801028b9: 8d 04 50 lea (%eax,%edx,2),%eax
801028bc: 89 45 b8 mov %eax,-0x48(%ebp)
CONV(minute);
801028bf: 8b 45 bc mov -0x44(%ebp),%eax
801028c2: 89 c2 mov %eax,%edx
801028c4: 83 e0 0f and $0xf,%eax
801028c7: c1 ea 04 shr $0x4,%edx
801028ca: 8d 14 92 lea (%edx,%edx,4),%edx
801028cd: 8d 04 50 lea (%eax,%edx,2),%eax
801028d0: 89 45 bc mov %eax,-0x44(%ebp)
CONV(hour );
801028d3: 8b 45 c0 mov -0x40(%ebp),%eax
801028d6: 89 c2 mov %eax,%edx
801028d8: 83 e0 0f and $0xf,%eax
801028db: c1 ea 04 shr $0x4,%edx
801028de: 8d 14 92 lea (%edx,%edx,4),%edx
801028e1: 8d 04 50 lea (%eax,%edx,2),%eax
801028e4: 89 45 c0 mov %eax,-0x40(%ebp)
CONV(day );
801028e7: 8b 45 c4 mov -0x3c(%ebp),%eax
801028ea: 89 c2 mov %eax,%edx
801028ec: 83 e0 0f and $0xf,%eax
801028ef: c1 ea 04 shr $0x4,%edx
801028f2: 8d 14 92 lea (%edx,%edx,4),%edx
801028f5: 8d 04 50 lea (%eax,%edx,2),%eax
801028f8: 89 45 c4 mov %eax,-0x3c(%ebp)
CONV(month );
801028fb: 8b 45 c8 mov -0x38(%ebp),%eax
801028fe: 89 c2 mov %eax,%edx
80102900: 83 e0 0f and $0xf,%eax
80102903: c1 ea 04 shr $0x4,%edx
80102906: 8d 14 92 lea (%edx,%edx,4),%edx
80102909: 8d 04 50 lea (%eax,%edx,2),%eax
8010290c: 89 45 c8 mov %eax,-0x38(%ebp)
CONV(year );
8010290f: 8b 45 cc mov -0x34(%ebp),%eax
80102912: 89 c2 mov %eax,%edx
80102914: 83 e0 0f and $0xf,%eax
80102917: c1 ea 04 shr $0x4,%edx
8010291a: 8d 14 92 lea (%edx,%edx,4),%edx
8010291d: 8d 04 50 lea (%eax,%edx,2),%eax
80102920: 89 45 cc mov %eax,-0x34(%ebp)
#undef CONV
}
*r = t1;
80102923: 8b 4d 08 mov 0x8(%ebp),%ecx
80102926: 8b 45 b8 mov -0x48(%ebp),%eax
80102929: 89 01 mov %eax,(%ecx)
8010292b: 8b 45 bc mov -0x44(%ebp),%eax
8010292e: 89 41 04 mov %eax,0x4(%ecx)
80102931: 8b 45 c0 mov -0x40(%ebp),%eax
80102934: 89 41 08 mov %eax,0x8(%ecx)
80102937: 8b 45 c4 mov -0x3c(%ebp),%eax
8010293a: 89 41 0c mov %eax,0xc(%ecx)
8010293d: 8b 45 c8 mov -0x38(%ebp),%eax
80102940: 89 41 10 mov %eax,0x10(%ecx)
80102943: 8b 45 cc mov -0x34(%ebp),%eax
80102946: 89 41 14 mov %eax,0x14(%ecx)
r->year += 2000;
80102949: 81 41 14 d0 07 00 00 addl $0x7d0,0x14(%ecx)
}
80102950: 83 c4 4c add $0x4c,%esp
80102953: 5b pop %ebx
80102954: 5e pop %esi
80102955: 5f pop %edi
80102956: 5d pop %ebp
80102957: c3 ret
80102958: 66 90 xchg %ax,%ax
8010295a: 66 90 xchg %ax,%ax
8010295c: 66 90 xchg %ax,%ax
8010295e: 66 90 xchg %ax,%ax
80102960 <install_trans>:
}
// Copy committed blocks from log to their home location
static void
install_trans(void)
{
80102960: 55 push %ebp
80102961: 89 e5 mov %esp,%ebp
80102963: 57 push %edi
80102964: 56 push %esi
80102965: 53 push %ebx
int tail;
for (tail = 0; tail < log.lh.n; tail++) {
80102966: 31 db xor %ebx,%ebx
{
80102968: 83 ec 1c sub $0x1c,%esp
for (tail = 0; tail < log.lh.n; tail++) {
8010296b: a1 c8 26 11 80 mov 0x801126c8,%eax
80102970: 85 c0 test %eax,%eax
80102972: 7e 78 jle 801029ec <install_trans+0x8c>
80102974: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
struct buf *lbuf = bread(log.dev, log.start+tail+1); // read log block
80102978: a1 b4 26 11 80 mov 0x801126b4,%eax
8010297d: 01 d8 add %ebx,%eax
8010297f: 83 c0 01 add $0x1,%eax
80102982: 89 44 24 04 mov %eax,0x4(%esp)
80102986: a1 c4 26 11 80 mov 0x801126c4,%eax
8010298b: 89 04 24 mov %eax,(%esp)
8010298e: e8 3d d7 ff ff call 801000d0 <bread>
80102993: 89 c7 mov %eax,%edi
struct buf *dbuf = bread(log.dev, log.lh.block[tail]); // read dst
80102995: 8b 04 9d cc 26 11 80 mov -0x7feed934(,%ebx,4),%eax
for (tail = 0; tail < log.lh.n; tail++) {
8010299c: 83 c3 01 add $0x1,%ebx
struct buf *dbuf = bread(log.dev, log.lh.block[tail]); // read dst
8010299f: 89 44 24 04 mov %eax,0x4(%esp)
801029a3: a1 c4 26 11 80 mov 0x801126c4,%eax
801029a8: 89 04 24 mov %eax,(%esp)
801029ab: e8 20 d7 ff ff call 801000d0 <bread>
memmove(dbuf->data, lbuf->data, BSIZE); // copy block to dst
801029b0: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp)
801029b7: 00
struct buf *dbuf = bread(log.dev, log.lh.block[tail]); // read dst
801029b8: 89 c6 mov %eax,%esi
memmove(dbuf->data, lbuf->data, BSIZE); // copy block to dst
801029ba: 8d 47 5c lea 0x5c(%edi),%eax
801029bd: 89 44 24 04 mov %eax,0x4(%esp)
801029c1: 8d 46 5c lea 0x5c(%esi),%eax
801029c4: 89 04 24 mov %eax,(%esp)
801029c7: e8 54 19 00 00 call 80104320 <memmove>
bwrite(dbuf); // write dst to disk
801029cc: 89 34 24 mov %esi,(%esp)
801029cf: e8 cc d7 ff ff call 801001a0 <bwrite>
brelse(lbuf);
801029d4: 89 3c 24 mov %edi,(%esp)
801029d7: e8 04 d8 ff ff call 801001e0 <brelse>
brelse(dbuf);
801029dc: 89 34 24 mov %esi,(%esp)
801029df: e8 fc d7 ff ff call 801001e0 <brelse>
for (tail = 0; tail < log.lh.n; tail++) {
801029e4: 39 1d c8 26 11 80 cmp %ebx,0x801126c8
801029ea: 7f 8c jg 80102978 <install_trans+0x18>
}
}
801029ec: 83 c4 1c add $0x1c,%esp
801029ef: 5b pop %ebx
801029f0: 5e pop %esi
801029f1: 5f pop %edi
801029f2: 5d pop %ebp
801029f3: c3 ret
801029f4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801029fa: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
80102a00 <write_head>:
// Write in-memory log header to disk.
// This is the true point at which the
// current transaction commits.
static void
write_head(void)
{
80102a00: 55 push %ebp
80102a01: 89 e5 mov %esp,%ebp
80102a03: 57 push %edi
80102a04: 56 push %esi
80102a05: 53 push %ebx
80102a06: 83 ec 1c sub $0x1c,%esp
struct buf *buf = bread(log.dev, log.start);
80102a09: a1 b4 26 11 80 mov 0x801126b4,%eax
80102a0e: 89 44 24 04 mov %eax,0x4(%esp)
80102a12: a1 c4 26 11 80 mov 0x801126c4,%eax
80102a17: 89 04 24 mov %eax,(%esp)
80102a1a: e8 b1 d6 ff ff call 801000d0 <bread>
struct logheader *hb = (struct logheader *) (buf->data);
int i;
hb->n = log.lh.n;
80102a1f: 8b 1d c8 26 11 80 mov 0x801126c8,%ebx
for (i = 0; i < log.lh.n; i++) {
80102a25: 31 d2 xor %edx,%edx
80102a27: 85 db test %ebx,%ebx
struct buf *buf = bread(log.dev, log.start);
80102a29: 89 c7 mov %eax,%edi
hb->n = log.lh.n;
80102a2b: 89 58 5c mov %ebx,0x5c(%eax)
80102a2e: 8d 70 5c lea 0x5c(%eax),%esi
for (i = 0; i < log.lh.n; i++) {
80102a31: 7e 17 jle 80102a4a <write_head+0x4a>
80102a33: 90 nop
80102a34: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
hb->block[i] = log.lh.block[i];
80102a38: 8b 0c 95 cc 26 11 80 mov -0x7feed934(,%edx,4),%ecx
80102a3f: 89 4c 96 04 mov %ecx,0x4(%esi,%edx,4)
for (i = 0; i < log.lh.n; i++) {
80102a43: 83 c2 01 add $0x1,%edx
80102a46: 39 da cmp %ebx,%edx
80102a48: 75 ee jne 80102a38 <write_head+0x38>
}
bwrite(buf);
80102a4a: 89 3c 24 mov %edi,(%esp)
80102a4d: e8 4e d7 ff ff call 801001a0 <bwrite>
brelse(buf);
80102a52: 89 3c 24 mov %edi,(%esp)
80102a55: e8 86 d7 ff ff call 801001e0 <brelse>
}
80102a5a: 83 c4 1c add $0x1c,%esp
80102a5d: 5b pop %ebx
80102a5e: 5e pop %esi
80102a5f: 5f pop %edi
80102a60: 5d pop %ebp
80102a61: c3 ret
80102a62: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80102a69: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102a70 <initlog>:
{
80102a70: 55 push %ebp
80102a71: 89 e5 mov %esp,%ebp
80102a73: 56 push %esi
80102a74: 53 push %ebx
80102a75: 83 ec 30 sub $0x30,%esp
80102a78: 8b 5d 08 mov 0x8(%ebp),%ebx
initlock(&log.lock, "log");
80102a7b: c7 44 24 04 20 73 10 movl $0x80107320,0x4(%esp)
80102a82: 80
80102a83: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102a8a: e8 c1 15 00 00 call 80104050 <initlock>
readsb(dev, &sb);
80102a8f: 8d 45 dc lea -0x24(%ebp),%eax
80102a92: 89 44 24 04 mov %eax,0x4(%esp)
80102a96: 89 1c 24 mov %ebx,(%esp)
80102a99: e8 f2 e8 ff ff call 80101390 <readsb>
log.start = sb.logstart;
80102a9e: 8b 45 ec mov -0x14(%ebp),%eax
log.size = sb.nlog;
80102aa1: 8b 55 e8 mov -0x18(%ebp),%edx
struct buf *buf = bread(log.dev, log.start);
80102aa4: 89 1c 24 mov %ebx,(%esp)
log.dev = dev;
80102aa7: 89 1d c4 26 11 80 mov %ebx,0x801126c4
struct buf *buf = bread(log.dev, log.start);
80102aad: 89 44 24 04 mov %eax,0x4(%esp)
log.size = sb.nlog;
80102ab1: 89 15 b8 26 11 80 mov %edx,0x801126b8
log.start = sb.logstart;
80102ab7: a3 b4 26 11 80 mov %eax,0x801126b4
struct buf *buf = bread(log.dev, log.start);
80102abc: e8 0f d6 ff ff call 801000d0 <bread>
for (i = 0; i < log.lh.n; i++) {
80102ac1: 31 d2 xor %edx,%edx
log.lh.n = lh->n;
80102ac3: 8b 58 5c mov 0x5c(%eax),%ebx
80102ac6: 8d 70 5c lea 0x5c(%eax),%esi
for (i = 0; i < log.lh.n; i++) {
80102ac9: 85 db test %ebx,%ebx
log.lh.n = lh->n;
80102acb: 89 1d c8 26 11 80 mov %ebx,0x801126c8
for (i = 0; i < log.lh.n; i++) {
80102ad1: 7e 17 jle 80102aea <initlog+0x7a>
80102ad3: 90 nop
80102ad4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
log.lh.block[i] = lh->block[i];
80102ad8: 8b 4c 96 04 mov 0x4(%esi,%edx,4),%ecx
80102adc: 89 0c 95 cc 26 11 80 mov %ecx,-0x7feed934(,%edx,4)
for (i = 0; i < log.lh.n; i++) {
80102ae3: 83 c2 01 add $0x1,%edx
80102ae6: 39 da cmp %ebx,%edx
80102ae8: 75 ee jne 80102ad8 <initlog+0x68>
brelse(buf);
80102aea: 89 04 24 mov %eax,(%esp)
80102aed: e8 ee d6 ff ff call 801001e0 <brelse>
static void
recover_from_log(void)
{
read_head();
install_trans(); // if committed, copy from log to disk
80102af2: e8 69 fe ff ff call 80102960 <install_trans>
log.lh.n = 0;
80102af7: c7 05 c8 26 11 80 00 movl $0x0,0x801126c8
80102afe: 00 00 00
write_head(); // clear the log
80102b01: e8 fa fe ff ff call 80102a00 <write_head>
}
80102b06: 83 c4 30 add $0x30,%esp
80102b09: 5b pop %ebx
80102b0a: 5e pop %esi
80102b0b: 5d pop %ebp
80102b0c: c3 ret
80102b0d: 8d 76 00 lea 0x0(%esi),%esi
80102b10 <begin_op>:
}
// called at the start of each FS system call.
void
begin_op(void)
{
80102b10: 55 push %ebp
80102b11: 89 e5 mov %esp,%ebp
80102b13: 83 ec 18 sub $0x18,%esp
acquire(&log.lock);
80102b16: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102b1d: e8 1e 16 00 00 call 80104140 <acquire>
80102b22: eb 18 jmp 80102b3c <begin_op+0x2c>
80102b24: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
while(1){
if(log.committing){
sleep(&log, &log.lock);
80102b28: c7 44 24 04 80 26 11 movl $0x80112680,0x4(%esp)
80102b2f: 80
80102b30: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102b37: e8 c4 10 00 00 call 80103c00 <sleep>
if(log.committing){
80102b3c: a1 c0 26 11 80 mov 0x801126c0,%eax
80102b41: 85 c0 test %eax,%eax
80102b43: 75 e3 jne 80102b28 <begin_op+0x18>
} else if(log.lh.n + (log.outstanding+1)*MAXOPBLOCKS > LOGSIZE){
80102b45: a1 bc 26 11 80 mov 0x801126bc,%eax
80102b4a: 8b 15 c8 26 11 80 mov 0x801126c8,%edx
80102b50: 83 c0 01 add $0x1,%eax
80102b53: 8d 0c 80 lea (%eax,%eax,4),%ecx
80102b56: 8d 14 4a lea (%edx,%ecx,2),%edx
80102b59: 83 fa 1e cmp $0x1e,%edx
80102b5c: 7f ca jg 80102b28 <begin_op+0x18>
// this op might exhaust log space; wait for commit.
sleep(&log, &log.lock);
} else {
log.outstanding += 1;
release(&log.lock);
80102b5e: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
log.outstanding += 1;
80102b65: a3 bc 26 11 80 mov %eax,0x801126bc
release(&log.lock);
80102b6a: e8 c1 16 00 00 call 80104230 <release>
break;
}
}
}
80102b6f: c9 leave
80102b70: c3 ret
80102b71: eb 0d jmp 80102b80 <end_op>
80102b73: 90 nop
80102b74: 90 nop
80102b75: 90 nop
80102b76: 90 nop
80102b77: 90 nop
80102b78: 90 nop
80102b79: 90 nop
80102b7a: 90 nop
80102b7b: 90 nop
80102b7c: 90 nop
80102b7d: 90 nop
80102b7e: 90 nop
80102b7f: 90 nop
80102b80 <end_op>:
// called at the end of each FS system call.
// commits if this was the last outstanding operation.
void
end_op(void)
{
80102b80: 55 push %ebp
80102b81: 89 e5 mov %esp,%ebp
80102b83: 57 push %edi
80102b84: 56 push %esi
80102b85: 53 push %ebx
80102b86: 83 ec 1c sub $0x1c,%esp
int do_commit = 0;
acquire(&log.lock);
80102b89: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102b90: e8 ab 15 00 00 call 80104140 <acquire>
log.outstanding -= 1;
80102b95: a1 bc 26 11 80 mov 0x801126bc,%eax
if(log.committing)
80102b9a: 8b 15 c0 26 11 80 mov 0x801126c0,%edx
log.outstanding -= 1;
80102ba0: 83 e8 01 sub $0x1,%eax
if(log.committing)
80102ba3: 85 d2 test %edx,%edx
log.outstanding -= 1;
80102ba5: a3 bc 26 11 80 mov %eax,0x801126bc
if(log.committing)
80102baa: 0f 85 f3 00 00 00 jne 80102ca3 <end_op+0x123>
panic("log.committing");
if(log.outstanding == 0){
80102bb0: 85 c0 test %eax,%eax
80102bb2: 0f 85 cb 00 00 00 jne 80102c83 <end_op+0x103>
// begin_op() may be waiting for log space,
// and decrementing log.outstanding has decreased
// the amount of reserved space.
wakeup(&log);
}
release(&log.lock);
80102bb8: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
}
static void
commit()
{
if (log.lh.n > 0) {
80102bbf: 31 db xor %ebx,%ebx
log.committing = 1;
80102bc1: c7 05 c0 26 11 80 01 movl $0x1,0x801126c0
80102bc8: 00 00 00
release(&log.lock);
80102bcb: e8 60 16 00 00 call 80104230 <release>
if (log.lh.n > 0) {
80102bd0: a1 c8 26 11 80 mov 0x801126c8,%eax
80102bd5: 85 c0 test %eax,%eax
80102bd7: 0f 8e 90 00 00 00 jle 80102c6d <end_op+0xed>
80102bdd: 8d 76 00 lea 0x0(%esi),%esi
struct buf *to = bread(log.dev, log.start+tail+1); // log block
80102be0: a1 b4 26 11 80 mov 0x801126b4,%eax
80102be5: 01 d8 add %ebx,%eax
80102be7: 83 c0 01 add $0x1,%eax
80102bea: 89 44 24 04 mov %eax,0x4(%esp)
80102bee: a1 c4 26 11 80 mov 0x801126c4,%eax
80102bf3: 89 04 24 mov %eax,(%esp)
80102bf6: e8 d5 d4 ff ff call 801000d0 <bread>
80102bfb: 89 c6 mov %eax,%esi
struct buf *from = bread(log.dev, log.lh.block[tail]); // cache block
80102bfd: 8b 04 9d cc 26 11 80 mov -0x7feed934(,%ebx,4),%eax
for (tail = 0; tail < log.lh.n; tail++) {
80102c04: 83 c3 01 add $0x1,%ebx
struct buf *from = bread(log.dev, log.lh.block[tail]); // cache block
80102c07: 89 44 24 04 mov %eax,0x4(%esp)
80102c0b: a1 c4 26 11 80 mov 0x801126c4,%eax
80102c10: 89 04 24 mov %eax,(%esp)
80102c13: e8 b8 d4 ff ff call 801000d0 <bread>
memmove(to->data, from->data, BSIZE);
80102c18: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp)
80102c1f: 00
struct buf *from = bread(log.dev, log.lh.block[tail]); // cache block
80102c20: 89 c7 mov %eax,%edi
memmove(to->data, from->data, BSIZE);
80102c22: 8d 40 5c lea 0x5c(%eax),%eax
80102c25: 89 44 24 04 mov %eax,0x4(%esp)
80102c29: 8d 46 5c lea 0x5c(%esi),%eax
80102c2c: 89 04 24 mov %eax,(%esp)
80102c2f: e8 ec 16 00 00 call 80104320 <memmove>
bwrite(to); // write the log
80102c34: 89 34 24 mov %esi,(%esp)
80102c37: e8 64 d5 ff ff call 801001a0 <bwrite>
brelse(from);
80102c3c: 89 3c 24 mov %edi,(%esp)
80102c3f: e8 9c d5 ff ff call 801001e0 <brelse>
brelse(to);
80102c44: 89 34 24 mov %esi,(%esp)
80102c47: e8 94 d5 ff ff call 801001e0 <brelse>
for (tail = 0; tail < log.lh.n; tail++) {
80102c4c: 3b 1d c8 26 11 80 cmp 0x801126c8,%ebx
80102c52: 7c 8c jl 80102be0 <end_op+0x60>
write_log(); // Write modified blocks from cache to log
write_head(); // Write header to disk -- the real commit
80102c54: e8 a7 fd ff ff call 80102a00 <write_head>
install_trans(); // Now install writes to home locations
80102c59: e8 02 fd ff ff call 80102960 <install_trans>
log.lh.n = 0;
80102c5e: c7 05 c8 26 11 80 00 movl $0x0,0x801126c8
80102c65: 00 00 00
write_head(); // Erase the transaction from the log
80102c68: e8 93 fd ff ff call 80102a00 <write_head>
acquire(&log.lock);
80102c6d: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102c74: e8 c7 14 00 00 call 80104140 <acquire>
log.committing = 0;
80102c79: c7 05 c0 26 11 80 00 movl $0x0,0x801126c0
80102c80: 00 00 00
wakeup(&log);
80102c83: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102c8a: e8 01 11 00 00 call 80103d90 <wakeup>
release(&log.lock);
80102c8f: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102c96: e8 95 15 00 00 call 80104230 <release>
}
80102c9b: 83 c4 1c add $0x1c,%esp
80102c9e: 5b pop %ebx
80102c9f: 5e pop %esi
80102ca0: 5f pop %edi
80102ca1: 5d pop %ebp
80102ca2: c3 ret
panic("log.committing");
80102ca3: c7 04 24 24 73 10 80 movl $0x80107324,(%esp)
80102caa: e8 b1 d6 ff ff call 80100360 <panic>
80102caf: 90 nop
80102cb0 <log_write>:
// modify bp->data[]
// log_write(bp)
// brelse(bp)
void
log_write(struct buf *b)
{
80102cb0: 55 push %ebp
80102cb1: 89 e5 mov %esp,%ebp
80102cb3: 53 push %ebx
80102cb4: 83 ec 14 sub $0x14,%esp
int i;
if (log.lh.n >= LOGSIZE || log.lh.n >= log.size - 1)
80102cb7: a1 c8 26 11 80 mov 0x801126c8,%eax
{
80102cbc: 8b 5d 08 mov 0x8(%ebp),%ebx
if (log.lh.n >= LOGSIZE || log.lh.n >= log.size - 1)
80102cbf: 83 f8 1d cmp $0x1d,%eax
80102cc2: 0f 8f 98 00 00 00 jg 80102d60 <log_write+0xb0>
80102cc8: 8b 0d b8 26 11 80 mov 0x801126b8,%ecx
80102cce: 8d 51 ff lea -0x1(%ecx),%edx
80102cd1: 39 d0 cmp %edx,%eax
80102cd3: 0f 8d 87 00 00 00 jge 80102d60 <log_write+0xb0>
panic("too big a transaction");
if (log.outstanding < 1)
80102cd9: a1 bc 26 11 80 mov 0x801126bc,%eax
80102cde: 85 c0 test %eax,%eax
80102ce0: 0f 8e 86 00 00 00 jle 80102d6c <log_write+0xbc>
panic("log_write outside of trans");
acquire(&log.lock);
80102ce6: c7 04 24 80 26 11 80 movl $0x80112680,(%esp)
80102ced: e8 4e 14 00 00 call 80104140 <acquire>
for (i = 0; i < log.lh.n; i++) {
80102cf2: 8b 15 c8 26 11 80 mov 0x801126c8,%edx
80102cf8: 83 fa 00 cmp $0x0,%edx
80102cfb: 7e 54 jle 80102d51 <log_write+0xa1>
if (log.lh.block[i] == b->blockno) // log absorbtion
80102cfd: 8b 4b 08 mov 0x8(%ebx),%ecx
for (i = 0; i < log.lh.n; i++) {
80102d00: 31 c0 xor %eax,%eax
if (log.lh.block[i] == b->blockno) // log absorbtion
80102d02: 39 0d cc 26 11 80 cmp %ecx,0x801126cc
80102d08: 75 0f jne 80102d19 <log_write+0x69>
80102d0a: eb 3c jmp 80102d48 <log_write+0x98>
80102d0c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80102d10: 39 0c 85 cc 26 11 80 cmp %ecx,-0x7feed934(,%eax,4)
80102d17: 74 2f je 80102d48 <log_write+0x98>
for (i = 0; i < log.lh.n; i++) {
80102d19: 83 c0 01 add $0x1,%eax
80102d1c: 39 d0 cmp %edx,%eax
80102d1e: 75 f0 jne 80102d10 <log_write+0x60>
break;
}
log.lh.block[i] = b->blockno;
80102d20: 89 0c 95 cc 26 11 80 mov %ecx,-0x7feed934(,%edx,4)
if (i == log.lh.n)
log.lh.n++;
80102d27: 83 c2 01 add $0x1,%edx
80102d2a: 89 15 c8 26 11 80 mov %edx,0x801126c8
b->flags |= B_DIRTY; // prevent eviction
80102d30: 83 0b 04 orl $0x4,(%ebx)
release(&log.lock);
80102d33: c7 45 08 80 26 11 80 movl $0x80112680,0x8(%ebp)
}
80102d3a: 83 c4 14 add $0x14,%esp
80102d3d: 5b pop %ebx
80102d3e: 5d pop %ebp
release(&log.lock);
80102d3f: e9 ec 14 00 00 jmp 80104230 <release>
80102d44: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
log.lh.block[i] = b->blockno;
80102d48: 89 0c 85 cc 26 11 80 mov %ecx,-0x7feed934(,%eax,4)
80102d4f: eb df jmp 80102d30 <log_write+0x80>
80102d51: 8b 43 08 mov 0x8(%ebx),%eax
80102d54: a3 cc 26 11 80 mov %eax,0x801126cc
if (i == log.lh.n)
80102d59: 75 d5 jne 80102d30 <log_write+0x80>
80102d5b: eb ca jmp 80102d27 <log_write+0x77>
80102d5d: 8d 76 00 lea 0x0(%esi),%esi
panic("too big a transaction");
80102d60: c7 04 24 33 73 10 80 movl $0x80107333,(%esp)
80102d67: e8 f4 d5 ff ff call 80100360 <panic>
panic("log_write outside of trans");
80102d6c: c7 04 24 49 73 10 80 movl $0x80107349,(%esp)
80102d73: e8 e8 d5 ff ff call 80100360 <panic>
80102d78: 66 90 xchg %ax,%ax
80102d7a: 66 90 xchg %ax,%ax
80102d7c: 66 90 xchg %ax,%ax
80102d7e: 66 90 xchg %ax,%ax
80102d80 <mpmain>:
}
// Common CPU setup code.
static void
mpmain(void)
{
80102d80: 55 push %ebp
80102d81: 89 e5 mov %esp,%ebp
80102d83: 53 push %ebx
80102d84: 83 ec 14 sub $0x14,%esp
cprintf("cpu%d: starting %d\n", cpuid(), cpuid());
80102d87: e8 f4 08 00 00 call 80103680 <cpuid>
80102d8c: 89 c3 mov %eax,%ebx
80102d8e: e8 ed 08 00 00 call 80103680 <cpuid>
80102d93: 89 5c 24 08 mov %ebx,0x8(%esp)
80102d97: c7 04 24 64 73 10 80 movl $0x80107364,(%esp)
80102d9e: 89 44 24 04 mov %eax,0x4(%esp)
80102da2: e8 a9 d8 ff ff call 80100650 <cprintf>
idtinit(); // load idt register
80102da7: e8 34 27 00 00 call 801054e0 <idtinit>
xchg(&(mycpu()->started), 1); // tell startothers() we're up
80102dac: e8 4f 08 00 00 call 80103600 <mycpu>
80102db1: 89 c2 mov %eax,%edx
xchg(volatile uint *addr, uint newval)
{
uint result;
// The + in "+m" denotes a read-modify-write operand.
asm volatile("lock; xchgl %0, %1" :
80102db3: b8 01 00 00 00 mov $0x1,%eax
80102db8: f0 87 82 a0 00 00 00 lock xchg %eax,0xa0(%edx)
scheduler(); // start running processes
80102dbf: e8 9c 0b 00 00 call 80103960 <scheduler>
80102dc4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80102dca: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
80102dd0 <mpenter>:
{
80102dd0: 55 push %ebp
80102dd1: 89 e5 mov %esp,%ebp
80102dd3: 83 ec 08 sub $0x8,%esp
switchkvm();
80102dd6: e8 75 38 00 00 call 80106650 <switchkvm>
seginit();
80102ddb: e8 30 37 00 00 call 80106510 <seginit>
lapicinit();
80102de0: e8 8b f8 ff ff call 80102670 <lapicinit>
mpmain();
80102de5: e8 96 ff ff ff call 80102d80 <mpmain>
80102dea: 66 90 xchg %ax,%ax
80102dec: 66 90 xchg %ax,%ax
80102dee: 66 90 xchg %ax,%ax
80102df0 <main>:
{
80102df0: 55 push %ebp
80102df1: 89 e5 mov %esp,%ebp
80102df3: 53 push %ebx
// The linker has placed the image of entryother.S in
// _binary_entryother_start.
code = P2V(0x7000);
memmove(code, _binary_entryother_start, (uint)_binary_entryother_size);
for(c = cpus; c < cpus+ncpu; c++){
80102df4: bb 80 27 11 80 mov $0x80112780,%ebx
{
80102df9: 83 e4 f0 and $0xfffffff0,%esp
80102dfc: 83 ec 10 sub $0x10,%esp
kinit1(end, P2V(4*1024*1024)); // phys page allocator
80102dff: c7 44 24 04 00 00 40 movl $0x80400000,0x4(%esp)
80102e06: 80
80102e07: c7 04 24 f4 58 11 80 movl $0x801158f4,(%esp)
80102e0e: e8 cd f5 ff ff call 801023e0 <kinit1>
kvmalloc(); // kernel page table
80102e13: e8 e8 3c 00 00 call 80106b00 <kvmalloc>
mpinit(); // detect other processors
80102e18: e8 73 01 00 00 call 80102f90 <mpinit>
80102e1d: 8d 76 00 lea 0x0(%esi),%esi
lapicinit(); // interrupt controller
80102e20: e8 4b f8 ff ff call 80102670 <lapicinit>
seginit(); // segment descriptors
80102e25: e8 e6 36 00 00 call 80106510 <seginit>
picinit(); // disable pic
80102e2a: e8 21 03 00 00 call 80103150 <picinit>
80102e2f: 90 nop
ioapicinit(); // another interrupt controller
80102e30: e8 cb f3 ff ff call 80102200 <ioapicinit>
consoleinit(); // console hardware
80102e35: e8 16 db ff ff call 80100950 <consoleinit>
uartinit(); // serial port
80102e3a: e8 71 2a 00 00 call 801058b0 <uartinit>
80102e3f: 90 nop
pinit(); // process table
80102e40: e8 9b 07 00 00 call 801035e0 <pinit>
shminit(); // shared memory
80102e45: e8 86 3f 00 00 call 80106dd0 <shminit>
tvinit(); // trap vectors
80102e4a: e8 f1 25 00 00 call 80105440 <tvinit>
80102e4f: 90 nop
binit(); // buffer cache
80102e50: e8 eb d1 ff ff call 80100040 <binit>
fileinit(); // file table
80102e55: e8 e6 de ff ff call 80100d40 <fileinit>
ideinit(); // disk
80102e5a: e8 a1 f1 ff ff call 80102000 <ideinit>
memmove(code, _binary_entryother_start, (uint)_binary_entryother_size);
80102e5f: c7 44 24 08 8a 00 00 movl $0x8a,0x8(%esp)
80102e66: 00
80102e67: c7 44 24 04 8c a4 10 movl $0x8010a48c,0x4(%esp)
80102e6e: 80
80102e6f: c7 04 24 00 70 00 80 movl $0x80007000,(%esp)
80102e76: e8 a5 14 00 00 call 80104320 <memmove>
for(c = cpus; c < cpus+ncpu; c++){
80102e7b: 69 05 00 2d 11 80 b0 imul $0xb0,0x80112d00,%eax
80102e82: 00 00 00
80102e85: 05 80 27 11 80 add $0x80112780,%eax
80102e8a: 39 d8 cmp %ebx,%eax
80102e8c: 76 65 jbe 80102ef3 <main+0x103>
80102e8e: 66 90 xchg %ax,%ax
if(c == mycpu()) // We've started already.
80102e90: e8 6b 07 00 00 call 80103600 <mycpu>
80102e95: 39 d8 cmp %ebx,%eax
80102e97: 74 41 je 80102eda <main+0xea>
continue;
// Tell entryother.S what stack to use, where to enter, and what
// pgdir to use. We cannot use kpgdir yet, because the AP processor
// is running in low memory, so we use entrypgdir for the APs too.
stack = kalloc();
80102e99: e8 02 f6 ff ff call 801024a0 <kalloc>
*(void**)(code-4) = stack + KSTACKSIZE;
*(void**)(code-8) = mpenter;
80102e9e: c7 05 f8 6f 00 80 d0 movl $0x80102dd0,0x80006ff8
80102ea5: 2d 10 80
*(int**)(code-12) = (void *) V2P(entrypgdir);
80102ea8: c7 05 f4 6f 00 80 00 movl $0x109000,0x80006ff4
80102eaf: 90 10 00
*(void**)(code-4) = stack + KSTACKSIZE;
80102eb2: 05 00 10 00 00 add $0x1000,%eax
80102eb7: a3 fc 6f 00 80 mov %eax,0x80006ffc
lapicstartap(c->apicid, V2P(code));
80102ebc: 0f b6 03 movzbl (%ebx),%eax
80102ebf: c7 44 24 04 00 70 00 movl $0x7000,0x4(%esp)
80102ec6: 00
80102ec7: 89 04 24 mov %eax,(%esp)
80102eca: e8 e1 f8 ff ff call 801027b0 <lapicstartap>
80102ecf: 90 nop
// wait for cpu to finish mpmain()
while(c->started == 0)
80102ed0: 8b 83 a0 00 00 00 mov 0xa0(%ebx),%eax
80102ed6: 85 c0 test %eax,%eax
80102ed8: 74 f6 je 80102ed0 <main+0xe0>
for(c = cpus; c < cpus+ncpu; c++){
80102eda: 69 05 00 2d 11 80 b0 imul $0xb0,0x80112d00,%eax
80102ee1: 00 00 00
80102ee4: 81 c3 b0 00 00 00 add $0xb0,%ebx
80102eea: 05 80 27 11 80 add $0x80112780,%eax
80102eef: 39 c3 cmp %eax,%ebx
80102ef1: 72 9d jb 80102e90 <main+0xa0>
kinit2(P2V(4*1024*1024), P2V(PHYSTOP)); // must come after startothers()
80102ef3: c7 44 24 04 00 00 00 movl $0x8e000000,0x4(%esp)
80102efa: 8e
80102efb: c7 04 24 00 00 40 80 movl $0x80400000,(%esp)
80102f02: e8 49 f5 ff ff call 80102450 <kinit2>
userinit(); // first user process
80102f07: e8 c4 07 00 00 call 801036d0 <userinit>
mpmain(); // finish this processor's setup
80102f0c: e8 6f fe ff ff call 80102d80 <mpmain>
80102f11: 66 90 xchg %ax,%ax
80102f13: 66 90 xchg %ax,%ax
80102f15: 66 90 xchg %ax,%ax
80102f17: 66 90 xchg %ax,%ax
80102f19: 66 90 xchg %ax,%ax
80102f1b: 66 90 xchg %ax,%ax
80102f1d: 66 90 xchg %ax,%ax
80102f1f: 90 nop
80102f20 <mpsearch1>:
}
// Look for an MP structure in the len bytes at addr.
static struct mp*
mpsearch1(uint a, int len)
{
80102f20: 55 push %ebp
80102f21: 89 e5 mov %esp,%ebp
80102f23: 56 push %esi
uchar *e, *p, *addr;
addr = P2V(a);
80102f24: 8d b0 00 00 00 80 lea -0x80000000(%eax),%esi
{
80102f2a: 53 push %ebx
e = addr+len;
80102f2b: 8d 1c 16 lea (%esi,%edx,1),%ebx
{
80102f2e: 83 ec 10 sub $0x10,%esp
for(p = addr; p < e; p += sizeof(struct mp))
80102f31: 39 de cmp %ebx,%esi
80102f33: 73 3c jae 80102f71 <mpsearch1+0x51>
80102f35: 8d 76 00 lea 0x0(%esi),%esi
if(memcmp(p, "_MP_", 4) == 0 && sum(p, sizeof(struct mp)) == 0)
80102f38: c7 44 24 08 04 00 00 movl $0x4,0x8(%esp)
80102f3f: 00
80102f40: c7 44 24 04 78 73 10 movl $0x80107378,0x4(%esp)
80102f47: 80
80102f48: 89 34 24 mov %esi,(%esp)
80102f4b: e8 80 13 00 00 call 801042d0 <memcmp>
80102f50: 85 c0 test %eax,%eax
80102f52: 75 16 jne 80102f6a <mpsearch1+0x4a>
80102f54: 31 c9 xor %ecx,%ecx
80102f56: 31 d2 xor %edx,%edx
sum += addr[i];
80102f58: 0f b6 04 16 movzbl (%esi,%edx,1),%eax
for(i=0; i<len; i++)
80102f5c: 83 c2 01 add $0x1,%edx
sum += addr[i];
80102f5f: 01 c1 add %eax,%ecx
for(i=0; i<len; i++)
80102f61: 83 fa 10 cmp $0x10,%edx
80102f64: 75 f2 jne 80102f58 <mpsearch1+0x38>
if(memcmp(p, "_MP_", 4) == 0 && sum(p, sizeof(struct mp)) == 0)
80102f66: 84 c9 test %cl,%cl
80102f68: 74 10 je 80102f7a <mpsearch1+0x5a>
for(p = addr; p < e; p += sizeof(struct mp))
80102f6a: 83 c6 10 add $0x10,%esi
80102f6d: 39 f3 cmp %esi,%ebx
80102f6f: 77 c7 ja 80102f38 <mpsearch1+0x18>
return (struct mp*)p;
return 0;
}
80102f71: 83 c4 10 add $0x10,%esp
return 0;
80102f74: 31 c0 xor %eax,%eax
}
80102f76: 5b pop %ebx
80102f77: 5e pop %esi
80102f78: 5d pop %ebp
80102f79: c3 ret
80102f7a: 83 c4 10 add $0x10,%esp
80102f7d: 89 f0 mov %esi,%eax
80102f7f: 5b pop %ebx
80102f80: 5e pop %esi
80102f81: 5d pop %ebp
80102f82: c3 ret
80102f83: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80102f89: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80102f90 <mpinit>:
return conf;
}
void
mpinit(void)
{
80102f90: 55 push %ebp
80102f91: 89 e5 mov %esp,%ebp
80102f93: 57 push %edi
80102f94: 56 push %esi
80102f95: 53 push %ebx
80102f96: 83 ec 1c sub $0x1c,%esp
if((p = ((bda[0x0F]<<8)| bda[0x0E]) << 4)){
80102f99: 0f b6 05 0f 04 00 80 movzbl 0x8000040f,%eax
80102fa0: 0f b6 15 0e 04 00 80 movzbl 0x8000040e,%edx
80102fa7: c1 e0 08 shl $0x8,%eax
80102faa: 09 d0 or %edx,%eax
80102fac: c1 e0 04 shl $0x4,%eax
80102faf: 85 c0 test %eax,%eax
80102fb1: 75 1b jne 80102fce <mpinit+0x3e>
p = ((bda[0x14]<<8)|bda[0x13])*1024;
80102fb3: 0f b6 05 14 04 00 80 movzbl 0x80000414,%eax
80102fba: 0f b6 15 13 04 00 80 movzbl 0x80000413,%edx
80102fc1: c1 e0 08 shl $0x8,%eax
80102fc4: 09 d0 or %edx,%eax
80102fc6: c1 e0 0a shl $0xa,%eax
if((mp = mpsearch1(p-1024, 1024)))
80102fc9: 2d 00 04 00 00 sub $0x400,%eax
if((mp = mpsearch1(p, 1024)))
80102fce: ba 00 04 00 00 mov $0x400,%edx
80102fd3: e8 48 ff ff ff call 80102f20 <mpsearch1>
80102fd8: 85 c0 test %eax,%eax
80102fda: 89 c7 mov %eax,%edi
80102fdc: 0f 84 22 01 00 00 je 80103104 <mpinit+0x174>
if((mp = mpsearch()) == 0 || mp->physaddr == 0)
80102fe2: 8b 77 04 mov 0x4(%edi),%esi
80102fe5: 85 f6 test %esi,%esi
80102fe7: 0f 84 30 01 00 00 je 8010311d <mpinit+0x18d>
conf = (struct mpconf*) P2V((uint) mp->physaddr);
80102fed: 8d 86 00 00 00 80 lea -0x80000000(%esi),%eax
if(memcmp(conf, "PCMP", 4) != 0)
80102ff3: c7 44 24 08 04 00 00 movl $0x4,0x8(%esp)
80102ffa: 00
80102ffb: c7 44 24 04 7d 73 10 movl $0x8010737d,0x4(%esp)
80103002: 80
80103003: 89 04 24 mov %eax,(%esp)
conf = (struct mpconf*) P2V((uint) mp->physaddr);
80103006: 89 45 e4 mov %eax,-0x1c(%ebp)
if(memcmp(conf, "PCMP", 4) != 0)
80103009: e8 c2 12 00 00 call 801042d0 <memcmp>
8010300e: 85 c0 test %eax,%eax
80103010: 0f 85 07 01 00 00 jne 8010311d <mpinit+0x18d>
if(conf->version != 1 && conf->version != 4)
80103016: 0f b6 86 06 00 00 80 movzbl -0x7ffffffa(%esi),%eax
8010301d: 3c 04 cmp $0x4,%al
8010301f: 0f 85 0b 01 00 00 jne 80103130 <mpinit+0x1a0>
if(sum((uchar*)conf, conf->length) != 0)
80103025: 0f b7 86 04 00 00 80 movzwl -0x7ffffffc(%esi),%eax
for(i=0; i<len; i++)
8010302c: 85 c0 test %eax,%eax
8010302e: 74 21 je 80103051 <mpinit+0xc1>
sum = 0;
80103030: 31 c9 xor %ecx,%ecx
for(i=0; i<len; i++)
80103032: 31 d2 xor %edx,%edx
80103034: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
sum += addr[i];
80103038: 0f b6 9c 16 00 00 00 movzbl -0x80000000(%esi,%edx,1),%ebx
8010303f: 80
for(i=0; i<len; i++)
80103040: 83 c2 01 add $0x1,%edx
sum += addr[i];
80103043: 01 d9 add %ebx,%ecx
for(i=0; i<len; i++)
80103045: 39 d0 cmp %edx,%eax
80103047: 7f ef jg 80103038 <mpinit+0xa8>
if(sum((uchar*)conf, conf->length) != 0)
80103049: 84 c9 test %cl,%cl
8010304b: 0f 85 cc 00 00 00 jne 8010311d <mpinit+0x18d>
struct mp *mp;
struct mpconf *conf;
struct mpproc *proc;
struct mpioapic *ioapic;
if((conf = mpconfig(&mp)) == 0)
80103051: 8b 45 e4 mov -0x1c(%ebp),%eax
80103054: 85 c0 test %eax,%eax
80103056: 0f 84 c1 00 00 00 je 8010311d <mpinit+0x18d>
panic("Expect to run on an SMP");
ismp = 1;
lapic = (uint*)conf->lapicaddr;
8010305c: 8b 86 24 00 00 80 mov -0x7fffffdc(%esi),%eax
ismp = 1;
80103062: bb 01 00 00 00 mov $0x1,%ebx
lapic = (uint*)conf->lapicaddr;
80103067: a3 7c 26 11 80 mov %eax,0x8011267c
for(p=(uchar*)(conf+1), e=(uchar*)conf+conf->length; p<e; ){
8010306c: 0f b7 96 04 00 00 80 movzwl -0x7ffffffc(%esi),%edx
80103073: 8d 86 2c 00 00 80 lea -0x7fffffd4(%esi),%eax
80103079: 03 55 e4 add -0x1c(%ebp),%edx
8010307c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80103080: 39 c2 cmp %eax,%edx
80103082: 76 1b jbe 8010309f <mpinit+0x10f>
80103084: 0f b6 08 movzbl (%eax),%ecx
switch(*p){
80103087: 80 f9 04 cmp $0x4,%cl
8010308a: 77 74 ja 80103100 <mpinit+0x170>
8010308c: ff 24 8d bc 73 10 80 jmp *-0x7fef8c44(,%ecx,4)
80103093: 90 nop
80103094: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
p += sizeof(struct mpioapic);
continue;
case MPBUS:
case MPIOINTR:
case MPLINTR:
p += 8;
80103098: 83 c0 08 add $0x8,%eax
for(p=(uchar*)(conf+1), e=(uchar*)conf+conf->length; p<e; ){
8010309b: 39 c2 cmp %eax,%edx
8010309d: 77 e5 ja 80103084 <mpinit+0xf4>
default:
ismp = 0;
break;
}
}
if(!ismp)
8010309f: 85 db test %ebx,%ebx
801030a1: 0f 84 93 00 00 00 je 8010313a <mpinit+0x1aa>
panic("Didn't find a suitable machine");
if(mp->imcrp){
801030a7: 80 7f 0c 00 cmpb $0x0,0xc(%edi)
801030ab: 74 12 je 801030bf <mpinit+0x12f>
asm volatile("out %0,%1" : : "a" (data), "d" (port));
801030ad: ba 22 00 00 00 mov $0x22,%edx
801030b2: b8 70 00 00 00 mov $0x70,%eax
801030b7: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
801030b8: b2 23 mov $0x23,%dl
801030ba: ec in (%dx),%al
// Bochs doesn't support IMCR, so this doesn't run on Bochs.
// But it would on real hardware.
outb(0x22, 0x70); // Select IMCR
outb(0x23, inb(0x23) | 1); // Mask external interrupts.
801030bb: 83 c8 01 or $0x1,%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
801030be: ee out %al,(%dx)
}
}
801030bf: 83 c4 1c add $0x1c,%esp
801030c2: 5b pop %ebx
801030c3: 5e pop %esi
801030c4: 5f pop %edi
801030c5: 5d pop %ebp
801030c6: c3 ret
801030c7: 90 nop
if(ncpu < NCPU) {
801030c8: 8b 35 00 2d 11 80 mov 0x80112d00,%esi
801030ce: 83 fe 07 cmp $0x7,%esi
801030d1: 7f 17 jg 801030ea <mpinit+0x15a>
cpus[ncpu].apicid = proc->apicid; // apicid may differ from ncpu
801030d3: 0f b6 48 01 movzbl 0x1(%eax),%ecx
801030d7: 69 f6 b0 00 00 00 imul $0xb0,%esi,%esi
ncpu++;
801030dd: 83 05 00 2d 11 80 01 addl $0x1,0x80112d00
cpus[ncpu].apicid = proc->apicid; // apicid may differ from ncpu
801030e4: 88 8e 80 27 11 80 mov %cl,-0x7feed880(%esi)
p += sizeof(struct mpproc);
801030ea: 83 c0 14 add $0x14,%eax
continue;
801030ed: eb 91 jmp 80103080 <mpinit+0xf0>
801030ef: 90 nop
ioapicid = ioapic->apicno;
801030f0: 0f b6 48 01 movzbl 0x1(%eax),%ecx
p += sizeof(struct mpioapic);
801030f4: 83 c0 08 add $0x8,%eax
ioapicid = ioapic->apicno;
801030f7: 88 0d 60 27 11 80 mov %cl,0x80112760
continue;
801030fd: eb 81 jmp 80103080 <mpinit+0xf0>
801030ff: 90 nop
ismp = 0;
80103100: 31 db xor %ebx,%ebx
80103102: eb 83 jmp 80103087 <mpinit+0xf7>
return mpsearch1(0xF0000, 0x10000);
80103104: ba 00 00 01 00 mov $0x10000,%edx
80103109: b8 00 00 0f 00 mov $0xf0000,%eax
8010310e: e8 0d fe ff ff call 80102f20 <mpsearch1>
if((mp = mpsearch()) == 0 || mp->physaddr == 0)
80103113: 85 c0 test %eax,%eax
return mpsearch1(0xF0000, 0x10000);
80103115: 89 c7 mov %eax,%edi
if((mp = mpsearch()) == 0 || mp->physaddr == 0)
80103117: 0f 85 c5 fe ff ff jne 80102fe2 <mpinit+0x52>
panic("Expect to run on an SMP");
8010311d: c7 04 24 82 73 10 80 movl $0x80107382,(%esp)
80103124: e8 37 d2 ff ff call 80100360 <panic>
80103129: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
if(conf->version != 1 && conf->version != 4)
80103130: 3c 01 cmp $0x1,%al
80103132: 0f 84 ed fe ff ff je 80103025 <mpinit+0x95>
80103138: eb e3 jmp 8010311d <mpinit+0x18d>
panic("Didn't find a suitable machine");
8010313a: c7 04 24 9c 73 10 80 movl $0x8010739c,(%esp)
80103141: e8 1a d2 ff ff call 80100360 <panic>
80103146: 66 90 xchg %ax,%ax
80103148: 66 90 xchg %ax,%ax
8010314a: 66 90 xchg %ax,%ax
8010314c: 66 90 xchg %ax,%ax
8010314e: 66 90 xchg %ax,%ax
80103150 <picinit>:
#define IO_PIC2 0xA0 // Slave (IRQs 8-15)
// Don't use the 8259A interrupt controllers. Xv6 assumes SMP hardware.
void
picinit(void)
{
80103150: 55 push %ebp
80103151: ba 21 00 00 00 mov $0x21,%edx
80103156: 89 e5 mov %esp,%ebp
80103158: b8 ff ff ff ff mov $0xffffffff,%eax
8010315d: ee out %al,(%dx)
8010315e: b2 a1 mov $0xa1,%dl
80103160: ee out %al,(%dx)
// mask all interrupts
outb(IO_PIC1+1, 0xFF);
outb(IO_PIC2+1, 0xFF);
}
80103161: 5d pop %ebp
80103162: c3 ret
80103163: 66 90 xchg %ax,%ax
80103165: 66 90 xchg %ax,%ax
80103167: 66 90 xchg %ax,%ax
80103169: 66 90 xchg %ax,%ax
8010316b: 66 90 xchg %ax,%ax
8010316d: 66 90 xchg %ax,%ax
8010316f: 90 nop
80103170 <pipealloc>:
int writeopen; // write fd is still open
};
int
pipealloc(struct file **f0, struct file **f1)
{
80103170: 55 push %ebp
80103171: 89 e5 mov %esp,%ebp
80103173: 57 push %edi
80103174: 56 push %esi
80103175: 53 push %ebx
80103176: 83 ec 1c sub $0x1c,%esp
80103179: 8b 75 08 mov 0x8(%ebp),%esi
8010317c: 8b 5d 0c mov 0xc(%ebp),%ebx
struct pipe *p;
p = 0;
*f0 = *f1 = 0;
8010317f: c7 03 00 00 00 00 movl $0x0,(%ebx)
80103185: c7 06 00 00 00 00 movl $0x0,(%esi)
if((*f0 = filealloc()) == 0 || (*f1 = filealloc()) == 0)
8010318b: e8 d0 db ff ff call 80100d60 <filealloc>
80103190: 85 c0 test %eax,%eax
80103192: 89 06 mov %eax,(%esi)
80103194: 0f 84 a4 00 00 00 je 8010323e <pipealloc+0xce>
8010319a: e8 c1 db ff ff call 80100d60 <filealloc>
8010319f: 85 c0 test %eax,%eax
801031a1: 89 03 mov %eax,(%ebx)
801031a3: 0f 84 87 00 00 00 je 80103230 <pipealloc+0xc0>
goto bad;
if((p = (struct pipe*)kalloc()) == 0)
801031a9: e8 f2 f2 ff ff call 801024a0 <kalloc>
801031ae: 85 c0 test %eax,%eax
801031b0: 89 c7 mov %eax,%edi
801031b2: 74 7c je 80103230 <pipealloc+0xc0>
goto bad;
p->readopen = 1;
801031b4: c7 80 3c 02 00 00 01 movl $0x1,0x23c(%eax)
801031bb: 00 00 00
p->writeopen = 1;
801031be: c7 80 40 02 00 00 01 movl $0x1,0x240(%eax)
801031c5: 00 00 00
p->nwrite = 0;
801031c8: c7 80 38 02 00 00 00 movl $0x0,0x238(%eax)
801031cf: 00 00 00
p->nread = 0;
801031d2: c7 80 34 02 00 00 00 movl $0x0,0x234(%eax)
801031d9: 00 00 00
initlock(&p->lock, "pipe");
801031dc: 89 04 24 mov %eax,(%esp)
801031df: c7 44 24 04 d0 73 10 movl $0x801073d0,0x4(%esp)
801031e6: 80
801031e7: e8 64 0e 00 00 call 80104050 <initlock>
(*f0)->type = FD_PIPE;
801031ec: 8b 06 mov (%esi),%eax
801031ee: c7 00 01 00 00 00 movl $0x1,(%eax)
(*f0)->readable = 1;
801031f4: 8b 06 mov (%esi),%eax
801031f6: c6 40 08 01 movb $0x1,0x8(%eax)
(*f0)->writable = 0;
801031fa: 8b 06 mov (%esi),%eax
801031fc: c6 40 09 00 movb $0x0,0x9(%eax)
(*f0)->pipe = p;
80103200: 8b 06 mov (%esi),%eax
80103202: 89 78 0c mov %edi,0xc(%eax)
(*f1)->type = FD_PIPE;
80103205: 8b 03 mov (%ebx),%eax
80103207: c7 00 01 00 00 00 movl $0x1,(%eax)
(*f1)->readable = 0;
8010320d: 8b 03 mov (%ebx),%eax
8010320f: c6 40 08 00 movb $0x0,0x8(%eax)
(*f1)->writable = 1;
80103213: 8b 03 mov (%ebx),%eax
80103215: c6 40 09 01 movb $0x1,0x9(%eax)
(*f1)->pipe = p;
80103219: 8b 03 mov (%ebx),%eax
return 0;
8010321b: 31 db xor %ebx,%ebx
(*f1)->pipe = p;
8010321d: 89 78 0c mov %edi,0xc(%eax)
if(*f0)
fileclose(*f0);
if(*f1)
fileclose(*f1);
return -1;
}
80103220: 83 c4 1c add $0x1c,%esp
80103223: 89 d8 mov %ebx,%eax
80103225: 5b pop %ebx
80103226: 5e pop %esi
80103227: 5f pop %edi
80103228: 5d pop %ebp
80103229: c3 ret
8010322a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if(*f0)
80103230: 8b 06 mov (%esi),%eax
80103232: 85 c0 test %eax,%eax
80103234: 74 08 je 8010323e <pipealloc+0xce>
fileclose(*f0);
80103236: 89 04 24 mov %eax,(%esp)
80103239: e8 e2 db ff ff call 80100e20 <fileclose>
if(*f1)
8010323e: 8b 03 mov (%ebx),%eax
return -1;
80103240: bb ff ff ff ff mov $0xffffffff,%ebx
if(*f1)
80103245: 85 c0 test %eax,%eax
80103247: 74 d7 je 80103220 <pipealloc+0xb0>
fileclose(*f1);
80103249: 89 04 24 mov %eax,(%esp)
8010324c: e8 cf db ff ff call 80100e20 <fileclose>
}
80103251: 83 c4 1c add $0x1c,%esp
80103254: 89 d8 mov %ebx,%eax
80103256: 5b pop %ebx
80103257: 5e pop %esi
80103258: 5f pop %edi
80103259: 5d pop %ebp
8010325a: c3 ret
8010325b: 90 nop
8010325c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80103260 <pipeclose>:
void
pipeclose(struct pipe *p, int writable)
{
80103260: 55 push %ebp
80103261: 89 e5 mov %esp,%ebp
80103263: 56 push %esi
80103264: 53 push %ebx
80103265: 83 ec 10 sub $0x10,%esp
80103268: 8b 5d 08 mov 0x8(%ebp),%ebx
8010326b: 8b 75 0c mov 0xc(%ebp),%esi
acquire(&p->lock);
8010326e: 89 1c 24 mov %ebx,(%esp)
80103271: e8 ca 0e 00 00 call 80104140 <acquire>
if(writable){
80103276: 85 f6 test %esi,%esi
80103278: 74 3e je 801032b8 <pipeclose+0x58>
p->writeopen = 0;
wakeup(&p->nread);
8010327a: 8d 83 34 02 00 00 lea 0x234(%ebx),%eax
p->writeopen = 0;
80103280: c7 83 40 02 00 00 00 movl $0x0,0x240(%ebx)
80103287: 00 00 00
wakeup(&p->nread);
8010328a: 89 04 24 mov %eax,(%esp)
8010328d: e8 fe 0a 00 00 call 80103d90 <wakeup>
} else {
p->readopen = 0;
wakeup(&p->nwrite);
}
if(p->readopen == 0 && p->writeopen == 0){
80103292: 8b 93 3c 02 00 00 mov 0x23c(%ebx),%edx
80103298: 85 d2 test %edx,%edx
8010329a: 75 0a jne 801032a6 <pipeclose+0x46>
8010329c: 8b 83 40 02 00 00 mov 0x240(%ebx),%eax
801032a2: 85 c0 test %eax,%eax
801032a4: 74 32 je 801032d8 <pipeclose+0x78>
release(&p->lock);
kfree((char*)p);
} else
release(&p->lock);
801032a6: 89 5d 08 mov %ebx,0x8(%ebp)
}
801032a9: 83 c4 10 add $0x10,%esp
801032ac: 5b pop %ebx
801032ad: 5e pop %esi
801032ae: 5d pop %ebp
release(&p->lock);
801032af: e9 7c 0f 00 00 jmp 80104230 <release>
801032b4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
wakeup(&p->nwrite);
801032b8: 8d 83 38 02 00 00 lea 0x238(%ebx),%eax
p->readopen = 0;
801032be: c7 83 3c 02 00 00 00 movl $0x0,0x23c(%ebx)
801032c5: 00 00 00
wakeup(&p->nwrite);
801032c8: 89 04 24 mov %eax,(%esp)
801032cb: e8 c0 0a 00 00 call 80103d90 <wakeup>
801032d0: eb c0 jmp 80103292 <pipeclose+0x32>
801032d2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
release(&p->lock);
801032d8: 89 1c 24 mov %ebx,(%esp)
801032db: e8 50 0f 00 00 call 80104230 <release>
kfree((char*)p);
801032e0: 89 5d 08 mov %ebx,0x8(%ebp)
}
801032e3: 83 c4 10 add $0x10,%esp
801032e6: 5b pop %ebx
801032e7: 5e pop %esi
801032e8: 5d pop %ebp
kfree((char*)p);
801032e9: e9 02 f0 ff ff jmp 801022f0 <kfree>
801032ee: 66 90 xchg %ax,%ax
801032f0 <pipewrite>:
//PAGEBREAK: 40
int
pipewrite(struct pipe *p, char *addr, int n)
{
801032f0: 55 push %ebp
801032f1: 89 e5 mov %esp,%ebp
801032f3: 57 push %edi
801032f4: 56 push %esi
801032f5: 53 push %ebx
801032f6: 83 ec 1c sub $0x1c,%esp
801032f9: 8b 5d 08 mov 0x8(%ebp),%ebx
int i;
acquire(&p->lock);
801032fc: 89 1c 24 mov %ebx,(%esp)
801032ff: e8 3c 0e 00 00 call 80104140 <acquire>
for(i = 0; i < n; i++){
80103304: 8b 4d 10 mov 0x10(%ebp),%ecx
80103307: 85 c9 test %ecx,%ecx
80103309: 0f 8e b2 00 00 00 jle 801033c1 <pipewrite+0xd1>
8010330f: 8b 4d 0c mov 0xc(%ebp),%ecx
while(p->nwrite == p->nread + PIPESIZE){ //DOC: pipewrite-full
if(p->readopen == 0 || myproc()->killed){
release(&p->lock);
return -1;
}
wakeup(&p->nread);
80103312: 8d bb 34 02 00 00 lea 0x234(%ebx),%edi
80103318: 8b 83 38 02 00 00 mov 0x238(%ebx),%eax
sleep(&p->nwrite, &p->lock); //DOC: pipewrite-sleep
8010331e: 8d b3 38 02 00 00 lea 0x238(%ebx),%esi
80103324: 89 4d e4 mov %ecx,-0x1c(%ebp)
80103327: 03 4d 10 add 0x10(%ebp),%ecx
8010332a: 89 4d e0 mov %ecx,-0x20(%ebp)
while(p->nwrite == p->nread + PIPESIZE){ //DOC: pipewrite-full
8010332d: 8b 8b 34 02 00 00 mov 0x234(%ebx),%ecx
80103333: 81 c1 00 02 00 00 add $0x200,%ecx
80103339: 39 c8 cmp %ecx,%eax
8010333b: 74 38 je 80103375 <pipewrite+0x85>
8010333d: eb 55 jmp 80103394 <pipewrite+0xa4>
8010333f: 90 nop
if(p->readopen == 0 || myproc()->killed){
80103340: e8 5b 03 00 00 call 801036a0 <myproc>
80103345: 8b 40 28 mov 0x28(%eax),%eax
80103348: 85 c0 test %eax,%eax
8010334a: 75 33 jne 8010337f <pipewrite+0x8f>
wakeup(&p->nread);
8010334c: 89 3c 24 mov %edi,(%esp)
8010334f: e8 3c 0a 00 00 call 80103d90 <wakeup>
sleep(&p->nwrite, &p->lock); //DOC: pipewrite-sleep
80103354: 89 5c 24 04 mov %ebx,0x4(%esp)
80103358: 89 34 24 mov %esi,(%esp)
8010335b: e8 a0 08 00 00 call 80103c00 <sleep>
while(p->nwrite == p->nread + PIPESIZE){ //DOC: pipewrite-full
80103360: 8b 83 34 02 00 00 mov 0x234(%ebx),%eax
80103366: 8b 93 38 02 00 00 mov 0x238(%ebx),%edx
8010336c: 05 00 02 00 00 add $0x200,%eax
80103371: 39 c2 cmp %eax,%edx
80103373: 75 23 jne 80103398 <pipewrite+0xa8>
if(p->readopen == 0 || myproc()->killed){
80103375: 8b 93 3c 02 00 00 mov 0x23c(%ebx),%edx
8010337b: 85 d2 test %edx,%edx
8010337d: 75 c1 jne 80103340 <pipewrite+0x50>
release(&p->lock);
8010337f: 89 1c 24 mov %ebx,(%esp)
80103382: e8 a9 0e 00 00 call 80104230 <release>
return -1;
80103387: b8 ff ff ff ff mov $0xffffffff,%eax
p->data[p->nwrite++ % PIPESIZE] = addr[i];
}
wakeup(&p->nread); //DOC: pipewrite-wakeup1
release(&p->lock);
return n;
}
8010338c: 83 c4 1c add $0x1c,%esp
8010338f: 5b pop %ebx
80103390: 5e pop %esi
80103391: 5f pop %edi
80103392: 5d pop %ebp
80103393: c3 ret
while(p->nwrite == p->nread + PIPESIZE){ //DOC: pipewrite-full
80103394: 89 c2 mov %eax,%edx
80103396: 66 90 xchg %ax,%ax
p->data[p->nwrite++ % PIPESIZE] = addr[i];
80103398: 8b 4d e4 mov -0x1c(%ebp),%ecx
8010339b: 8d 42 01 lea 0x1(%edx),%eax
8010339e: 81 e2 ff 01 00 00 and $0x1ff,%edx
801033a4: 89 83 38 02 00 00 mov %eax,0x238(%ebx)
801033aa: 83 45 e4 01 addl $0x1,-0x1c(%ebp)
801033ae: 0f b6 09 movzbl (%ecx),%ecx
801033b1: 88 4c 13 34 mov %cl,0x34(%ebx,%edx,1)
for(i = 0; i < n; i++){
801033b5: 8b 4d e4 mov -0x1c(%ebp),%ecx
801033b8: 3b 4d e0 cmp -0x20(%ebp),%ecx
801033bb: 0f 85 6c ff ff ff jne 8010332d <pipewrite+0x3d>
wakeup(&p->nread); //DOC: pipewrite-wakeup1
801033c1: 8d 83 34 02 00 00 lea 0x234(%ebx),%eax
801033c7: 89 04 24 mov %eax,(%esp)
801033ca: e8 c1 09 00 00 call 80103d90 <wakeup>
release(&p->lock);
801033cf: 89 1c 24 mov %ebx,(%esp)
801033d2: e8 59 0e 00 00 call 80104230 <release>
return n;
801033d7: 8b 45 10 mov 0x10(%ebp),%eax
801033da: eb b0 jmp 8010338c <pipewrite+0x9c>
801033dc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801033e0 <piperead>:
int
piperead(struct pipe *p, char *addr, int n)
{
801033e0: 55 push %ebp
801033e1: 89 e5 mov %esp,%ebp
801033e3: 57 push %edi
801033e4: 56 push %esi
801033e5: 53 push %ebx
801033e6: 83 ec 1c sub $0x1c,%esp
801033e9: 8b 75 08 mov 0x8(%ebp),%esi
801033ec: 8b 7d 0c mov 0xc(%ebp),%edi
int i;
acquire(&p->lock);
801033ef: 89 34 24 mov %esi,(%esp)
801033f2: e8 49 0d 00 00 call 80104140 <acquire>
while(p->nread == p->nwrite && p->writeopen){ //DOC: pipe-empty
801033f7: 8b 86 34 02 00 00 mov 0x234(%esi),%eax
801033fd: 3b 86 38 02 00 00 cmp 0x238(%esi),%eax
80103403: 75 5b jne 80103460 <piperead+0x80>
80103405: 8b 9e 40 02 00 00 mov 0x240(%esi),%ebx
8010340b: 85 db test %ebx,%ebx
8010340d: 74 51 je 80103460 <piperead+0x80>
if(myproc()->killed){
release(&p->lock);
return -1;
}
sleep(&p->nread, &p->lock); //DOC: piperead-sleep
8010340f: 8d 9e 34 02 00 00 lea 0x234(%esi),%ebx
80103415: eb 25 jmp 8010343c <piperead+0x5c>
80103417: 90 nop
80103418: 89 74 24 04 mov %esi,0x4(%esp)
8010341c: 89 1c 24 mov %ebx,(%esp)
8010341f: e8 dc 07 00 00 call 80103c00 <sleep>
while(p->nread == p->nwrite && p->writeopen){ //DOC: pipe-empty
80103424: 8b 86 34 02 00 00 mov 0x234(%esi),%eax
8010342a: 3b 86 38 02 00 00 cmp 0x238(%esi),%eax
80103430: 75 2e jne 80103460 <piperead+0x80>
80103432: 8b 96 40 02 00 00 mov 0x240(%esi),%edx
80103438: 85 d2 test %edx,%edx
8010343a: 74 24 je 80103460 <piperead+0x80>
if(myproc()->killed){
8010343c: e8 5f 02 00 00 call 801036a0 <myproc>
80103441: 8b 48 28 mov 0x28(%eax),%ecx
80103444: 85 c9 test %ecx,%ecx
80103446: 74 d0 je 80103418 <piperead+0x38>
release(&p->lock);
80103448: 89 34 24 mov %esi,(%esp)
8010344b: e8 e0 0d 00 00 call 80104230 <release>
addr[i] = p->data[p->nread++ % PIPESIZE];
}
wakeup(&p->nwrite); //DOC: piperead-wakeup
release(&p->lock);
return i;
}
80103450: 83 c4 1c add $0x1c,%esp
return -1;
80103453: b8 ff ff ff ff mov $0xffffffff,%eax
}
80103458: 5b pop %ebx
80103459: 5e pop %esi
8010345a: 5f pop %edi
8010345b: 5d pop %ebp
8010345c: c3 ret
8010345d: 8d 76 00 lea 0x0(%esi),%esi
for(i = 0; i < n; i++){ //DOC: piperead-copy
80103460: 8b 55 10 mov 0x10(%ebp),%edx
if(p->nread == p->nwrite)
80103463: 31 db xor %ebx,%ebx
for(i = 0; i < n; i++){ //DOC: piperead-copy
80103465: 85 d2 test %edx,%edx
80103467: 7f 2b jg 80103494 <piperead+0xb4>
80103469: eb 31 jmp 8010349c <piperead+0xbc>
8010346b: 90 nop
8010346c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
addr[i] = p->data[p->nread++ % PIPESIZE];
80103470: 8d 48 01 lea 0x1(%eax),%ecx
80103473: 25 ff 01 00 00 and $0x1ff,%eax
80103478: 89 8e 34 02 00 00 mov %ecx,0x234(%esi)
8010347e: 0f b6 44 06 34 movzbl 0x34(%esi,%eax,1),%eax
80103483: 88 04 1f mov %al,(%edi,%ebx,1)
for(i = 0; i < n; i++){ //DOC: piperead-copy
80103486: 83 c3 01 add $0x1,%ebx
80103489: 3b 5d 10 cmp 0x10(%ebp),%ebx
8010348c: 74 0e je 8010349c <piperead+0xbc>
if(p->nread == p->nwrite)
8010348e: 8b 86 34 02 00 00 mov 0x234(%esi),%eax
80103494: 3b 86 38 02 00 00 cmp 0x238(%esi),%eax
8010349a: 75 d4 jne 80103470 <piperead+0x90>
wakeup(&p->nwrite); //DOC: piperead-wakeup
8010349c: 8d 86 38 02 00 00 lea 0x238(%esi),%eax
801034a2: 89 04 24 mov %eax,(%esp)
801034a5: e8 e6 08 00 00 call 80103d90 <wakeup>
release(&p->lock);
801034aa: 89 34 24 mov %esi,(%esp)
801034ad: e8 7e 0d 00 00 call 80104230 <release>
}
801034b2: 83 c4 1c add $0x1c,%esp
return i;
801034b5: 89 d8 mov %ebx,%eax
}
801034b7: 5b pop %ebx
801034b8: 5e pop %esi
801034b9: 5f pop %edi
801034ba: 5d pop %ebp
801034bb: c3 ret
801034bc: 66 90 xchg %ax,%ax
801034be: 66 90 xchg %ax,%ax
801034c0 <allocproc>:
// If found, change state to EMBRYO and initialize
// state required to run in the kernel.
// Otherwise return 0.
static struct proc*
allocproc(void)
{
801034c0: 55 push %ebp
801034c1: 89 e5 mov %esp,%ebp
801034c3: 53 push %ebx
struct proc *p;
char *sp;
acquire(&ptable.lock);
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
801034c4: bb 54 2d 11 80 mov $0x80112d54,%ebx
{
801034c9: 83 ec 14 sub $0x14,%esp
acquire(&ptable.lock);
801034cc: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
801034d3: e8 68 0c 00 00 call 80104140 <acquire>
801034d8: eb 11 jmp 801034eb <allocproc+0x2b>
801034da: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
801034e0: 83 eb 80 sub $0xffffff80,%ebx
801034e3: 81 fb 54 4d 11 80 cmp $0x80114d54,%ebx
801034e9: 74 7d je 80103568 <allocproc+0xa8>
if(p->state == UNUSED)
801034eb: 8b 43 10 mov 0x10(%ebx),%eax
801034ee: 85 c0 test %eax,%eax
801034f0: 75 ee jne 801034e0 <allocproc+0x20>
release(&ptable.lock);
return 0;
found:
p->state = EMBRYO;
p->pid = nextpid++;
801034f2: a1 04 a0 10 80 mov 0x8010a004,%eax
release(&ptable.lock);
801034f7: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
p->state = EMBRYO;
801034fe: c7 43 10 01 00 00 00 movl $0x1,0x10(%ebx)
p->pid = nextpid++;
80103505: 8d 50 01 lea 0x1(%eax),%edx
80103508: 89 15 04 a0 10 80 mov %edx,0x8010a004
8010350e: 89 43 14 mov %eax,0x14(%ebx)
release(&ptable.lock);
80103511: e8 1a 0d 00 00 call 80104230 <release>
// Allocate kernel stack.
if((p->kstack = kalloc()) == 0){
80103516: e8 85 ef ff ff call 801024a0 <kalloc>
8010351b: 85 c0 test %eax,%eax
8010351d: 89 43 0c mov %eax,0xc(%ebx)
80103520: 74 5a je 8010357c <allocproc+0xbc>
return 0;
}
sp = p->kstack + KSTACKSIZE;
// Leave room for trap frame.
sp -= sizeof *p->tf;
80103522: 8d 90 b4 0f 00 00 lea 0xfb4(%eax),%edx
// Set up new context to start executing at forkret,
// which returns to trapret.
sp -= 4;
*(uint*)sp = (uint)trapret;
sp -= sizeof *p->context;
80103528: 05 9c 0f 00 00 add $0xf9c,%eax
sp -= sizeof *p->tf;
8010352d: 89 53 1c mov %edx,0x1c(%ebx)
*(uint*)sp = (uint)trapret;
80103530: c7 40 14 35 54 10 80 movl $0x80105435,0x14(%eax)
p->context = (struct context*)sp;
memset(p->context, 0, sizeof *p->context);
80103537: c7 44 24 08 14 00 00 movl $0x14,0x8(%esp)
8010353e: 00
8010353f: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80103546: 00
80103547: 89 04 24 mov %eax,(%esp)
p->context = (struct context*)sp;
8010354a: 89 43 20 mov %eax,0x20(%ebx)
memset(p->context, 0, sizeof *p->context);
8010354d: e8 2e 0d 00 00 call 80104280 <memset>
p->context->eip = (uint)forkret;
80103552: 8b 43 20 mov 0x20(%ebx),%eax
80103555: c7 40 10 90 35 10 80 movl $0x80103590,0x10(%eax)
return p;
8010355c: 89 d8 mov %ebx,%eax
}
8010355e: 83 c4 14 add $0x14,%esp
80103561: 5b pop %ebx
80103562: 5d pop %ebp
80103563: c3 ret
80103564: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
release(&ptable.lock);
80103568: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
8010356f: e8 bc 0c 00 00 call 80104230 <release>
}
80103574: 83 c4 14 add $0x14,%esp
return 0;
80103577: 31 c0 xor %eax,%eax
}
80103579: 5b pop %ebx
8010357a: 5d pop %ebp
8010357b: c3 ret
p->state = UNUSED;
8010357c: c7 43 10 00 00 00 00 movl $0x0,0x10(%ebx)
return 0;
80103583: eb d9 jmp 8010355e <allocproc+0x9e>
80103585: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80103589: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103590 <forkret>:
// A fork child's very first scheduling by scheduler()
// will swtch here. "Return" to user space.
void
forkret(void)
{
80103590: 55 push %ebp
80103591: 89 e5 mov %esp,%ebp
80103593: 83 ec 18 sub $0x18,%esp
static int first = 1;
// Still holding ptable.lock from scheduler.
release(&ptable.lock);
80103596: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
8010359d: e8 8e 0c 00 00 call 80104230 <release>
if (first) {
801035a2: a1 00 a0 10 80 mov 0x8010a000,%eax
801035a7: 85 c0 test %eax,%eax
801035a9: 75 05 jne 801035b0 <forkret+0x20>
iinit(ROOTDEV);
initlog(ROOTDEV);
}
// Return to "caller", actually trapret (see allocproc).
}
801035ab: c9 leave
801035ac: c3 ret
801035ad: 8d 76 00 lea 0x0(%esi),%esi
iinit(ROOTDEV);
801035b0: c7 04 24 01 00 00 00 movl $0x1,(%esp)
first = 0;
801035b7: c7 05 00 a0 10 80 00 movl $0x0,0x8010a000
801035be: 00 00 00
iinit(ROOTDEV);
801035c1: e8 aa de ff ff call 80101470 <iinit>
initlog(ROOTDEV);
801035c6: c7 04 24 01 00 00 00 movl $0x1,(%esp)
801035cd: e8 9e f4 ff ff call 80102a70 <initlog>
}
801035d2: c9 leave
801035d3: c3 ret
801035d4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801035da: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
801035e0 <pinit>:
{
801035e0: 55 push %ebp
801035e1: 89 e5 mov %esp,%ebp
801035e3: 83 ec 18 sub $0x18,%esp
initlock(&ptable.lock, "ptable");
801035e6: c7 44 24 04 d5 73 10 movl $0x801073d5,0x4(%esp)
801035ed: 80
801035ee: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
801035f5: e8 56 0a 00 00 call 80104050 <initlock>
}
801035fa: c9 leave
801035fb: c3 ret
801035fc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80103600 <mycpu>:
{
80103600: 55 push %ebp
80103601: 89 e5 mov %esp,%ebp
80103603: 56 push %esi
80103604: 53 push %ebx
80103605: 83 ec 10 sub $0x10,%esp
asm volatile("pushfl; popl %0" : "=r" (eflags));
80103608: 9c pushf
80103609: 58 pop %eax
if(readeflags()&FL_IF)
8010360a: f6 c4 02 test $0x2,%ah
8010360d: 75 57 jne 80103666 <mycpu+0x66>
apicid = lapicid();
8010360f: e8 4c f1 ff ff call 80102760 <lapicid>
for (i = 0; i < ncpu; ++i) {
80103614: 8b 35 00 2d 11 80 mov 0x80112d00,%esi
8010361a: 85 f6 test %esi,%esi
8010361c: 7e 3c jle 8010365a <mycpu+0x5a>
if (cpus[i].apicid == apicid)
8010361e: 0f b6 15 80 27 11 80 movzbl 0x80112780,%edx
80103625: 39 c2 cmp %eax,%edx
80103627: 74 2d je 80103656 <mycpu+0x56>
80103629: b9 30 28 11 80 mov $0x80112830,%ecx
for (i = 0; i < ncpu; ++i) {
8010362e: 31 d2 xor %edx,%edx
80103630: 83 c2 01 add $0x1,%edx
80103633: 39 f2 cmp %esi,%edx
80103635: 74 23 je 8010365a <mycpu+0x5a>
if (cpus[i].apicid == apicid)
80103637: 0f b6 19 movzbl (%ecx),%ebx
8010363a: 81 c1 b0 00 00 00 add $0xb0,%ecx
80103640: 39 c3 cmp %eax,%ebx
80103642: 75 ec jne 80103630 <mycpu+0x30>
return &cpus[i];
80103644: 69 c2 b0 00 00 00 imul $0xb0,%edx,%eax
}
8010364a: 83 c4 10 add $0x10,%esp
8010364d: 5b pop %ebx
8010364e: 5e pop %esi
8010364f: 5d pop %ebp
return &cpus[i];
80103650: 05 80 27 11 80 add $0x80112780,%eax
}
80103655: c3 ret
for (i = 0; i < ncpu; ++i) {
80103656: 31 d2 xor %edx,%edx
80103658: eb ea jmp 80103644 <mycpu+0x44>
panic("unknown apicid\n");
8010365a: c7 04 24 dc 73 10 80 movl $0x801073dc,(%esp)
80103661: e8 fa cc ff ff call 80100360 <panic>
panic("mycpu called with interrupts enabled\n");
80103666: c7 04 24 b8 74 10 80 movl $0x801074b8,(%esp)
8010366d: e8 ee cc ff ff call 80100360 <panic>
80103672: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80103679: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103680 <cpuid>:
cpuid() {
80103680: 55 push %ebp
80103681: 89 e5 mov %esp,%ebp
80103683: 83 ec 08 sub $0x8,%esp
return mycpu()-cpus;
80103686: e8 75 ff ff ff call 80103600 <mycpu>
}
8010368b: c9 leave
return mycpu()-cpus;
8010368c: 2d 80 27 11 80 sub $0x80112780,%eax
80103691: c1 f8 04 sar $0x4,%eax
80103694: 69 c0 a3 8b 2e ba imul $0xba2e8ba3,%eax,%eax
}
8010369a: c3 ret
8010369b: 90 nop
8010369c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801036a0 <myproc>:
myproc(void) {
801036a0: 55 push %ebp
801036a1: 89 e5 mov %esp,%ebp
801036a3: 53 push %ebx
801036a4: 83 ec 04 sub $0x4,%esp
pushcli();
801036a7: e8 54 0a 00 00 call 80104100 <pushcli>
c = mycpu();
801036ac: e8 4f ff ff ff call 80103600 <mycpu>
p = c->proc;
801036b1: 8b 98 ac 00 00 00 mov 0xac(%eax),%ebx
popcli();
801036b7: e8 04 0b 00 00 call 801041c0 <popcli>
}
801036bc: 83 c4 04 add $0x4,%esp
801036bf: 89 d8 mov %ebx,%eax
801036c1: 5b pop %ebx
801036c2: 5d pop %ebp
801036c3: c3 ret
801036c4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801036ca: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
801036d0 <userinit>:
{
801036d0: 55 push %ebp
801036d1: 89 e5 mov %esp,%ebp
801036d3: 53 push %ebx
801036d4: 83 ec 14 sub $0x14,%esp
p = allocproc();
801036d7: e8 e4 fd ff ff call 801034c0 <allocproc>
801036dc: 89 c3 mov %eax,%ebx
initproc = p;
801036de: a3 b8 a5 10 80 mov %eax,0x8010a5b8
if((p->pgdir = setupkvm()) == 0)
801036e3: e8 88 33 00 00 call 80106a70 <setupkvm>
801036e8: 85 c0 test %eax,%eax
801036ea: 89 43 04 mov %eax,0x4(%ebx)
801036ed: 0f 84 d4 00 00 00 je 801037c7 <userinit+0xf7>
inituvm(p->pgdir, _binary_initcode_start, (int)_binary_initcode_size);
801036f3: 89 04 24 mov %eax,(%esp)
801036f6: c7 44 24 08 2c 00 00 movl $0x2c,0x8(%esp)
801036fd: 00
801036fe: c7 44 24 04 60 a4 10 movl $0x8010a460,0x4(%esp)
80103705: 80
80103706: e8 75 30 00 00 call 80106780 <inituvm>
p->sz = PGSIZE;
8010370b: c7 03 00 10 00 00 movl $0x1000,(%ebx)
memset(p->tf, 0, sizeof(*p->tf));
80103711: c7 44 24 08 4c 00 00 movl $0x4c,0x8(%esp)
80103718: 00
80103719: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80103720: 00
80103721: 8b 43 1c mov 0x1c(%ebx),%eax
80103724: 89 04 24 mov %eax,(%esp)
80103727: e8 54 0b 00 00 call 80104280 <memset>
p->tf->cs = (SEG_UCODE << 3) | DPL_USER;
8010372c: 8b 43 1c mov 0x1c(%ebx),%eax
8010372f: ba 1b 00 00 00 mov $0x1b,%edx
p->tf->ds = (SEG_UDATA << 3) | DPL_USER;
80103734: b9 23 00 00 00 mov $0x23,%ecx
p->tf->cs = (SEG_UCODE << 3) | DPL_USER;
80103739: 66 89 50 3c mov %dx,0x3c(%eax)
p->tf->ds = (SEG_UDATA << 3) | DPL_USER;
8010373d: 8b 43 1c mov 0x1c(%ebx),%eax
80103740: 66 89 48 2c mov %cx,0x2c(%eax)
p->tf->es = p->tf->ds;
80103744: 8b 43 1c mov 0x1c(%ebx),%eax
80103747: 0f b7 50 2c movzwl 0x2c(%eax),%edx
8010374b: 66 89 50 28 mov %dx,0x28(%eax)
p->tf->ss = p->tf->ds;
8010374f: 8b 43 1c mov 0x1c(%ebx),%eax
80103752: 0f b7 50 2c movzwl 0x2c(%eax),%edx
80103756: 66 89 50 48 mov %dx,0x48(%eax)
p->tf->eflags = FL_IF;
8010375a: 8b 43 1c mov 0x1c(%ebx),%eax
8010375d: c7 40 40 00 02 00 00 movl $0x200,0x40(%eax)
p->tf->esp = PGSIZE;
80103764: 8b 43 1c mov 0x1c(%ebx),%eax
80103767: c7 40 44 00 10 00 00 movl $0x1000,0x44(%eax)
p->tf->eip = 0; // beginning of initcode.S
8010376e: 8b 43 1c mov 0x1c(%ebx),%eax
80103771: c7 40 38 00 00 00 00 movl $0x0,0x38(%eax)
safestrcpy(p->name, "initcode", sizeof(p->name));
80103778: 8d 43 70 lea 0x70(%ebx),%eax
8010377b: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
80103782: 00
80103783: c7 44 24 04 05 74 10 movl $0x80107405,0x4(%esp)
8010378a: 80
8010378b: 89 04 24 mov %eax,(%esp)
8010378e: e8 cd 0c 00 00 call 80104460 <safestrcpy>
p->cwd = namei("/");
80103793: c7 04 24 0e 74 10 80 movl $0x8010740e,(%esp)
8010379a: e8 61 e7 ff ff call 80101f00 <namei>
8010379f: 89 43 6c mov %eax,0x6c(%ebx)
acquire(&ptable.lock);
801037a2: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
801037a9: e8 92 09 00 00 call 80104140 <acquire>
p->state = RUNNABLE;
801037ae: c7 43 10 03 00 00 00 movl $0x3,0x10(%ebx)
release(&ptable.lock);
801037b5: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
801037bc: e8 6f 0a 00 00 call 80104230 <release>
}
801037c1: 83 c4 14 add $0x14,%esp
801037c4: 5b pop %ebx
801037c5: 5d pop %ebp
801037c6: c3 ret
panic("userinit: out of memory?");
801037c7: c7 04 24 ec 73 10 80 movl $0x801073ec,(%esp)
801037ce: e8 8d cb ff ff call 80100360 <panic>
801037d3: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801037d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801037e0 <growproc>:
{
801037e0: 55 push %ebp
801037e1: 89 e5 mov %esp,%ebp
801037e3: 56 push %esi
801037e4: 53 push %ebx
801037e5: 83 ec 10 sub $0x10,%esp
801037e8: 8b 75 08 mov 0x8(%ebp),%esi
struct proc *curproc = myproc();
801037eb: e8 b0 fe ff ff call 801036a0 <myproc>
if(n > 0){
801037f0: 83 fe 00 cmp $0x0,%esi
struct proc *curproc = myproc();
801037f3: 89 c3 mov %eax,%ebx
sz = curproc->sz;
801037f5: 8b 00 mov (%eax),%eax
if(n > 0){
801037f7: 7e 2f jle 80103828 <growproc+0x48>
if((sz = allocuvm(curproc->pgdir, sz, sz + n)) == 0)
801037f9: 01 c6 add %eax,%esi
801037fb: 89 74 24 08 mov %esi,0x8(%esp)
801037ff: 89 44 24 04 mov %eax,0x4(%esp)
80103803: 8b 43 04 mov 0x4(%ebx),%eax
80103806: 89 04 24 mov %eax,(%esp)
80103809: e8 c2 30 00 00 call 801068d0 <allocuvm>
8010380e: 85 c0 test %eax,%eax
80103810: 74 36 je 80103848 <growproc+0x68>
curproc->sz = sz;
80103812: 89 03 mov %eax,(%ebx)
switchuvm(curproc);
80103814: 89 1c 24 mov %ebx,(%esp)
80103817: e8 54 2e 00 00 call 80106670 <switchuvm>
return 0;
8010381c: 31 c0 xor %eax,%eax
}
8010381e: 83 c4 10 add $0x10,%esp
80103821: 5b pop %ebx
80103822: 5e pop %esi
80103823: 5d pop %ebp
80103824: c3 ret
80103825: 8d 76 00 lea 0x0(%esi),%esi
} else if(n < 0){
80103828: 74 e8 je 80103812 <growproc+0x32>
if((sz = deallocuvm(curproc->pgdir, sz, sz + n)) == 0)
8010382a: 01 c6 add %eax,%esi
8010382c: 89 74 24 08 mov %esi,0x8(%esp)
80103830: 89 44 24 04 mov %eax,0x4(%esp)
80103834: 8b 43 04 mov 0x4(%ebx),%eax
80103837: 89 04 24 mov %eax,(%esp)
8010383a: e8 91 31 00 00 call 801069d0 <deallocuvm>
8010383f: 85 c0 test %eax,%eax
80103841: 75 cf jne 80103812 <growproc+0x32>
80103843: 90 nop
80103844: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
80103848: b8 ff ff ff ff mov $0xffffffff,%eax
8010384d: eb cf jmp 8010381e <growproc+0x3e>
8010384f: 90 nop
80103850 <fork>:
{
80103850: 55 push %ebp
80103851: 89 e5 mov %esp,%ebp
80103853: 57 push %edi
80103854: 56 push %esi
80103855: 53 push %ebx
80103856: 83 ec 1c sub $0x1c,%esp
struct proc *curproc = myproc();
80103859: e8 42 fe ff ff call 801036a0 <myproc>
8010385e: 89 c3 mov %eax,%ebx
if((np = allocproc()) == 0){
80103860: e8 5b fc ff ff call 801034c0 <allocproc>
80103865: 85 c0 test %eax,%eax
80103867: 89 c7 mov %eax,%edi
80103869: 89 45 e4 mov %eax,-0x1c(%ebp)
8010386c: 0f 84 c4 00 00 00 je 80103936 <fork+0xe6>
if((np->pgdir = copyuvm(curproc->pgdir, curproc->sz,curproc->szStack)) == 0){
80103872: 8b 43 08 mov 0x8(%ebx),%eax
80103875: 89 44 24 08 mov %eax,0x8(%esp)
80103879: 8b 03 mov (%ebx),%eax
8010387b: 89 44 24 04 mov %eax,0x4(%esp)
8010387f: 8b 43 04 mov 0x4(%ebx),%eax
80103882: 89 04 24 mov %eax,(%esp)
80103885: e8 c6 32 00 00 call 80106b50 <copyuvm>
8010388a: 85 c0 test %eax,%eax
8010388c: 89 47 04 mov %eax,0x4(%edi)
8010388f: 0f 84 a8 00 00 00 je 8010393d <fork+0xed>
np->sz = curproc->sz;
80103895: 8b 03 mov (%ebx),%eax
80103897: 8b 4d e4 mov -0x1c(%ebp),%ecx
8010389a: 89 01 mov %eax,(%ecx)
*np->tf = *curproc->tf;
8010389c: 8b 79 1c mov 0x1c(%ecx),%edi
8010389f: 89 c8 mov %ecx,%eax
np->parent = curproc;
801038a1: 89 59 18 mov %ebx,0x18(%ecx)
*np->tf = *curproc->tf;
801038a4: 8b 73 1c mov 0x1c(%ebx),%esi
801038a7: b9 13 00 00 00 mov $0x13,%ecx
801038ac: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
for(i = 0; i < NOFILE; i++)
801038ae: 31 f6 xor %esi,%esi
np->tf->eax = 0;
801038b0: 8b 40 1c mov 0x1c(%eax),%eax
801038b3: c7 40 1c 00 00 00 00 movl $0x0,0x1c(%eax)
801038ba: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if(curproc->ofile[i])
801038c0: 8b 44 b3 2c mov 0x2c(%ebx,%esi,4),%eax
801038c4: 85 c0 test %eax,%eax
801038c6: 74 0f je 801038d7 <fork+0x87>
np->ofile[i] = filedup(curproc->ofile[i]);
801038c8: 89 04 24 mov %eax,(%esp)
801038cb: e8 00 d5 ff ff call 80100dd0 <filedup>
801038d0: 8b 55 e4 mov -0x1c(%ebp),%edx
801038d3: 89 44 b2 2c mov %eax,0x2c(%edx,%esi,4)
for(i = 0; i < NOFILE; i++)
801038d7: 83 c6 01 add $0x1,%esi
801038da: 83 fe 10 cmp $0x10,%esi
801038dd: 75 e1 jne 801038c0 <fork+0x70>
np->cwd = idup(curproc->cwd);
801038df: 8b 43 6c mov 0x6c(%ebx),%eax
safestrcpy(np->name, curproc->name, sizeof(curproc->name));
801038e2: 83 c3 70 add $0x70,%ebx
np->cwd = idup(curproc->cwd);
801038e5: 89 04 24 mov %eax,(%esp)
801038e8: e8 93 dd ff ff call 80101680 <idup>
801038ed: 8b 7d e4 mov -0x1c(%ebp),%edi
801038f0: 89 47 6c mov %eax,0x6c(%edi)
safestrcpy(np->name, curproc->name, sizeof(curproc->name));
801038f3: 8d 47 70 lea 0x70(%edi),%eax
801038f6: 89 5c 24 04 mov %ebx,0x4(%esp)
801038fa: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
80103901: 00
80103902: 89 04 24 mov %eax,(%esp)
80103905: e8 56 0b 00 00 call 80104460 <safestrcpy>
pid = np->pid;
8010390a: 8b 5f 14 mov 0x14(%edi),%ebx
acquire(&ptable.lock);
8010390d: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103914: e8 27 08 00 00 call 80104140 <acquire>
np->state = RUNNABLE;
80103919: c7 47 10 03 00 00 00 movl $0x3,0x10(%edi)
release(&ptable.lock);
80103920: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103927: e8 04 09 00 00 call 80104230 <release>
return pid;
8010392c: 89 d8 mov %ebx,%eax
}
8010392e: 83 c4 1c add $0x1c,%esp
80103931: 5b pop %ebx
80103932: 5e pop %esi
80103933: 5f pop %edi
80103934: 5d pop %ebp
80103935: c3 ret
return -1;
80103936: b8 ff ff ff ff mov $0xffffffff,%eax
8010393b: eb f1 jmp 8010392e <fork+0xde>
kfree(np->kstack);
8010393d: 8b 7d e4 mov -0x1c(%ebp),%edi
80103940: 8b 47 0c mov 0xc(%edi),%eax
80103943: 89 04 24 mov %eax,(%esp)
80103946: e8 a5 e9 ff ff call 801022f0 <kfree>
return -1;
8010394b: b8 ff ff ff ff mov $0xffffffff,%eax
np->kstack = 0;
80103950: c7 47 0c 00 00 00 00 movl $0x0,0xc(%edi)
np->state = UNUSED;
80103957: c7 47 10 00 00 00 00 movl $0x0,0x10(%edi)
return -1;
8010395e: eb ce jmp 8010392e <fork+0xde>
80103960 <scheduler>:
{
80103960: 55 push %ebp
80103961: 89 e5 mov %esp,%ebp
80103963: 57 push %edi
80103964: 56 push %esi
80103965: 53 push %ebx
80103966: 83 ec 1c sub $0x1c,%esp
struct cpu *c = mycpu();
80103969: e8 92 fc ff ff call 80103600 <mycpu>
8010396e: 89 c6 mov %eax,%esi
c->proc = 0;
80103970: c7 80 ac 00 00 00 00 movl $0x0,0xac(%eax)
80103977: 00 00 00
8010397a: 8d 78 04 lea 0x4(%eax),%edi
8010397d: 8d 76 00 lea 0x0(%esi),%esi
asm volatile("sti");
80103980: fb sti
acquire(&ptable.lock);
80103981: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103988: bb 54 2d 11 80 mov $0x80112d54,%ebx
acquire(&ptable.lock);
8010398d: e8 ae 07 00 00 call 80104140 <acquire>
80103992: eb 0f jmp 801039a3 <scheduler+0x43>
80103994: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103998: 83 eb 80 sub $0xffffff80,%ebx
8010399b: 81 fb 54 4d 11 80 cmp $0x80114d54,%ebx
801039a1: 74 45 je 801039e8 <scheduler+0x88>
if(p->state != RUNNABLE)
801039a3: 83 7b 10 03 cmpl $0x3,0x10(%ebx)
801039a7: 75 ef jne 80103998 <scheduler+0x38>
c->proc = p;
801039a9: 89 9e ac 00 00 00 mov %ebx,0xac(%esi)
switchuvm(p);
801039af: 89 1c 24 mov %ebx,(%esp)
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
801039b2: 83 eb 80 sub $0xffffff80,%ebx
switchuvm(p);
801039b5: e8 b6 2c 00 00 call 80106670 <switchuvm>
swtch(&(c->scheduler), p->context);
801039ba: 8b 43 a0 mov -0x60(%ebx),%eax
p->state = RUNNING;
801039bd: c7 43 90 04 00 00 00 movl $0x4,-0x70(%ebx)
swtch(&(c->scheduler), p->context);
801039c4: 89 3c 24 mov %edi,(%esp)
801039c7: 89 44 24 04 mov %eax,0x4(%esp)
801039cb: e8 eb 0a 00 00 call 801044bb <swtch>
switchkvm();
801039d0: e8 7b 2c 00 00 call 80106650 <switchkvm>
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
801039d5: 81 fb 54 4d 11 80 cmp $0x80114d54,%ebx
c->proc = 0;
801039db: c7 86 ac 00 00 00 00 movl $0x0,0xac(%esi)
801039e2: 00 00 00
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
801039e5: 75 bc jne 801039a3 <scheduler+0x43>
801039e7: 90 nop
release(&ptable.lock);
801039e8: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
801039ef: e8 3c 08 00 00 call 80104230 <release>
}
801039f4: eb 8a jmp 80103980 <scheduler+0x20>
801039f6: 8d 76 00 lea 0x0(%esi),%esi
801039f9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103a00 <sched>:
{
80103a00: 55 push %ebp
80103a01: 89 e5 mov %esp,%ebp
80103a03: 56 push %esi
80103a04: 53 push %ebx
80103a05: 83 ec 10 sub $0x10,%esp
struct proc *p = myproc();
80103a08: e8 93 fc ff ff call 801036a0 <myproc>
if(!holding(&ptable.lock))
80103a0d: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
struct proc *p = myproc();
80103a14: 89 c3 mov %eax,%ebx
if(!holding(&ptable.lock))
80103a16: e8 b5 06 00 00 call 801040d0 <holding>
80103a1b: 85 c0 test %eax,%eax
80103a1d: 74 4f je 80103a6e <sched+0x6e>
if(mycpu()->ncli != 1)
80103a1f: e8 dc fb ff ff call 80103600 <mycpu>
80103a24: 83 b8 a4 00 00 00 01 cmpl $0x1,0xa4(%eax)
80103a2b: 75 65 jne 80103a92 <sched+0x92>
if(p->state == RUNNING)
80103a2d: 83 7b 10 04 cmpl $0x4,0x10(%ebx)
80103a31: 74 53 je 80103a86 <sched+0x86>
asm volatile("pushfl; popl %0" : "=r" (eflags));
80103a33: 9c pushf
80103a34: 58 pop %eax
if(readeflags()&FL_IF)
80103a35: f6 c4 02 test $0x2,%ah
80103a38: 75 40 jne 80103a7a <sched+0x7a>
intena = mycpu()->intena;
80103a3a: e8 c1 fb ff ff call 80103600 <mycpu>
swtch(&p->context, mycpu()->scheduler);
80103a3f: 83 c3 20 add $0x20,%ebx
intena = mycpu()->intena;
80103a42: 8b b0 a8 00 00 00 mov 0xa8(%eax),%esi
swtch(&p->context, mycpu()->scheduler);
80103a48: e8 b3 fb ff ff call 80103600 <mycpu>
80103a4d: 8b 40 04 mov 0x4(%eax),%eax
80103a50: 89 1c 24 mov %ebx,(%esp)
80103a53: 89 44 24 04 mov %eax,0x4(%esp)
80103a57: e8 5f 0a 00 00 call 801044bb <swtch>
mycpu()->intena = intena;
80103a5c: e8 9f fb ff ff call 80103600 <mycpu>
80103a61: 89 b0 a8 00 00 00 mov %esi,0xa8(%eax)
}
80103a67: 83 c4 10 add $0x10,%esp
80103a6a: 5b pop %ebx
80103a6b: 5e pop %esi
80103a6c: 5d pop %ebp
80103a6d: c3 ret
panic("sched ptable.lock");
80103a6e: c7 04 24 10 74 10 80 movl $0x80107410,(%esp)
80103a75: e8 e6 c8 ff ff call 80100360 <panic>
panic("sched interruptible");
80103a7a: c7 04 24 3c 74 10 80 movl $0x8010743c,(%esp)
80103a81: e8 da c8 ff ff call 80100360 <panic>
panic("sched running");
80103a86: c7 04 24 2e 74 10 80 movl $0x8010742e,(%esp)
80103a8d: e8 ce c8 ff ff call 80100360 <panic>
panic("sched locks");
80103a92: c7 04 24 22 74 10 80 movl $0x80107422,(%esp)
80103a99: e8 c2 c8 ff ff call 80100360 <panic>
80103a9e: 66 90 xchg %ax,%ax
80103aa0 <exit>:
{
80103aa0: 55 push %ebp
80103aa1: 89 e5 mov %esp,%ebp
80103aa3: 56 push %esi
if(curproc == initproc)
80103aa4: 31 f6 xor %esi,%esi
{
80103aa6: 53 push %ebx
80103aa7: 83 ec 10 sub $0x10,%esp
struct proc *curproc = myproc();
80103aaa: e8 f1 fb ff ff call 801036a0 <myproc>
if(curproc == initproc)
80103aaf: 3b 05 b8 a5 10 80 cmp 0x8010a5b8,%eax
struct proc *curproc = myproc();
80103ab5: 89 c3 mov %eax,%ebx
if(curproc == initproc)
80103ab7: 0f 84 ea 00 00 00 je 80103ba7 <exit+0x107>
80103abd: 8d 76 00 lea 0x0(%esi),%esi
if(curproc->ofile[fd]){
80103ac0: 8b 44 b3 2c mov 0x2c(%ebx,%esi,4),%eax
80103ac4: 85 c0 test %eax,%eax
80103ac6: 74 10 je 80103ad8 <exit+0x38>
fileclose(curproc->ofile[fd]);
80103ac8: 89 04 24 mov %eax,(%esp)
80103acb: e8 50 d3 ff ff call 80100e20 <fileclose>
curproc->ofile[fd] = 0;
80103ad0: c7 44 b3 2c 00 00 00 movl $0x0,0x2c(%ebx,%esi,4)
80103ad7: 00
for(fd = 0; fd < NOFILE; fd++){
80103ad8: 83 c6 01 add $0x1,%esi
80103adb: 83 fe 10 cmp $0x10,%esi
80103ade: 75 e0 jne 80103ac0 <exit+0x20>
begin_op();
80103ae0: e8 2b f0 ff ff call 80102b10 <begin_op>
iput(curproc->cwd);
80103ae5: 8b 43 6c mov 0x6c(%ebx),%eax
80103ae8: 89 04 24 mov %eax,(%esp)
80103aeb: e8 e0 dc ff ff call 801017d0 <iput>
end_op();
80103af0: e8 8b f0 ff ff call 80102b80 <end_op>
curproc->cwd = 0;
80103af5: c7 43 6c 00 00 00 00 movl $0x0,0x6c(%ebx)
acquire(&ptable.lock);
80103afc: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103b03: e8 38 06 00 00 call 80104140 <acquire>
wakeup1(curproc->parent);
80103b08: 8b 43 18 mov 0x18(%ebx),%eax
static void
wakeup1(void *chan)
{
struct proc *p;
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
80103b0b: ba 54 2d 11 80 mov $0x80112d54,%edx
80103b10: eb 11 jmp 80103b23 <exit+0x83>
80103b12: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80103b18: 83 ea 80 sub $0xffffff80,%edx
80103b1b: 81 fa 54 4d 11 80 cmp $0x80114d54,%edx
80103b21: 74 1d je 80103b40 <exit+0xa0>
if(p->state == SLEEPING && p->chan == chan)
80103b23: 83 7a 10 02 cmpl $0x2,0x10(%edx)
80103b27: 75 ef jne 80103b18 <exit+0x78>
80103b29: 3b 42 24 cmp 0x24(%edx),%eax
80103b2c: 75 ea jne 80103b18 <exit+0x78>
p->state = RUNNABLE;
80103b2e: c7 42 10 03 00 00 00 movl $0x3,0x10(%edx)
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
80103b35: 83 ea 80 sub $0xffffff80,%edx
80103b38: 81 fa 54 4d 11 80 cmp $0x80114d54,%edx
80103b3e: 75 e3 jne 80103b23 <exit+0x83>
p->parent = initproc;
80103b40: a1 b8 a5 10 80 mov 0x8010a5b8,%eax
80103b45: b9 54 2d 11 80 mov $0x80112d54,%ecx
80103b4a: eb 0f jmp 80103b5b <exit+0xbb>
80103b4c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103b50: 83 e9 80 sub $0xffffff80,%ecx
80103b53: 81 f9 54 4d 11 80 cmp $0x80114d54,%ecx
80103b59: 74 34 je 80103b8f <exit+0xef>
if(p->parent == curproc){
80103b5b: 39 59 18 cmp %ebx,0x18(%ecx)
80103b5e: 75 f0 jne 80103b50 <exit+0xb0>
if(p->state == ZOMBIE)
80103b60: 83 79 10 05 cmpl $0x5,0x10(%ecx)
p->parent = initproc;
80103b64: 89 41 18 mov %eax,0x18(%ecx)
if(p->state == ZOMBIE)
80103b67: 75 e7 jne 80103b50 <exit+0xb0>
80103b69: ba 54 2d 11 80 mov $0x80112d54,%edx
80103b6e: eb 0b jmp 80103b7b <exit+0xdb>
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
80103b70: 83 ea 80 sub $0xffffff80,%edx
80103b73: 81 fa 54 4d 11 80 cmp $0x80114d54,%edx
80103b79: 74 d5 je 80103b50 <exit+0xb0>
if(p->state == SLEEPING && p->chan == chan)
80103b7b: 83 7a 10 02 cmpl $0x2,0x10(%edx)
80103b7f: 75 ef jne 80103b70 <exit+0xd0>
80103b81: 3b 42 24 cmp 0x24(%edx),%eax
80103b84: 75 ea jne 80103b70 <exit+0xd0>
p->state = RUNNABLE;
80103b86: c7 42 10 03 00 00 00 movl $0x3,0x10(%edx)
80103b8d: eb e1 jmp 80103b70 <exit+0xd0>
curproc->state = ZOMBIE;
80103b8f: c7 43 10 05 00 00 00 movl $0x5,0x10(%ebx)
sched();
80103b96: e8 65 fe ff ff call 80103a00 <sched>
panic("zombie exit");
80103b9b: c7 04 24 5d 74 10 80 movl $0x8010745d,(%esp)
80103ba2: e8 b9 c7 ff ff call 80100360 <panic>
panic("init exiting");
80103ba7: c7 04 24 50 74 10 80 movl $0x80107450,(%esp)
80103bae: e8 ad c7 ff ff call 80100360 <panic>
80103bb3: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80103bb9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103bc0 <yield>:
{
80103bc0: 55 push %ebp
80103bc1: 89 e5 mov %esp,%ebp
80103bc3: 83 ec 18 sub $0x18,%esp
acquire(&ptable.lock); //DOC: yieldlock
80103bc6: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103bcd: e8 6e 05 00 00 call 80104140 <acquire>
myproc()->state = RUNNABLE;
80103bd2: e8 c9 fa ff ff call 801036a0 <myproc>
80103bd7: c7 40 10 03 00 00 00 movl $0x3,0x10(%eax)
sched();
80103bde: e8 1d fe ff ff call 80103a00 <sched>
release(&ptable.lock);
80103be3: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103bea: e8 41 06 00 00 call 80104230 <release>
}
80103bef: c9 leave
80103bf0: c3 ret
80103bf1: eb 0d jmp 80103c00 <sleep>
80103bf3: 90 nop
80103bf4: 90 nop
80103bf5: 90 nop
80103bf6: 90 nop
80103bf7: 90 nop
80103bf8: 90 nop
80103bf9: 90 nop
80103bfa: 90 nop
80103bfb: 90 nop
80103bfc: 90 nop
80103bfd: 90 nop
80103bfe: 90 nop
80103bff: 90 nop
80103c00 <sleep>:
{
80103c00: 55 push %ebp
80103c01: 89 e5 mov %esp,%ebp
80103c03: 57 push %edi
80103c04: 56 push %esi
80103c05: 53 push %ebx
80103c06: 83 ec 1c sub $0x1c,%esp
80103c09: 8b 7d 08 mov 0x8(%ebp),%edi
80103c0c: 8b 75 0c mov 0xc(%ebp),%esi
struct proc *p = myproc();
80103c0f: e8 8c fa ff ff call 801036a0 <myproc>
if(p == 0)
80103c14: 85 c0 test %eax,%eax
struct proc *p = myproc();
80103c16: 89 c3 mov %eax,%ebx
if(p == 0)
80103c18: 0f 84 7c 00 00 00 je 80103c9a <sleep+0x9a>
if(lk == 0)
80103c1e: 85 f6 test %esi,%esi
80103c20: 74 6c je 80103c8e <sleep+0x8e>
if(lk != &ptable.lock){ //DOC: sleeplock0
80103c22: 81 fe 20 2d 11 80 cmp $0x80112d20,%esi
80103c28: 74 46 je 80103c70 <sleep+0x70>
acquire(&ptable.lock); //DOC: sleeplock1
80103c2a: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103c31: e8 0a 05 00 00 call 80104140 <acquire>
release(lk);
80103c36: 89 34 24 mov %esi,(%esp)
80103c39: e8 f2 05 00 00 call 80104230 <release>
p->chan = chan;
80103c3e: 89 7b 24 mov %edi,0x24(%ebx)
p->state = SLEEPING;
80103c41: c7 43 10 02 00 00 00 movl $0x2,0x10(%ebx)
sched();
80103c48: e8 b3 fd ff ff call 80103a00 <sched>
p->chan = 0;
80103c4d: c7 43 24 00 00 00 00 movl $0x0,0x24(%ebx)
release(&ptable.lock);
80103c54: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103c5b: e8 d0 05 00 00 call 80104230 <release>
acquire(lk);
80103c60: 89 75 08 mov %esi,0x8(%ebp)
}
80103c63: 83 c4 1c add $0x1c,%esp
80103c66: 5b pop %ebx
80103c67: 5e pop %esi
80103c68: 5f pop %edi
80103c69: 5d pop %ebp
acquire(lk);
80103c6a: e9 d1 04 00 00 jmp 80104140 <acquire>
80103c6f: 90 nop
p->chan = chan;
80103c70: 89 78 24 mov %edi,0x24(%eax)
p->state = SLEEPING;
80103c73: c7 40 10 02 00 00 00 movl $0x2,0x10(%eax)
sched();
80103c7a: e8 81 fd ff ff call 80103a00 <sched>
p->chan = 0;
80103c7f: c7 43 24 00 00 00 00 movl $0x0,0x24(%ebx)
}
80103c86: 83 c4 1c add $0x1c,%esp
80103c89: 5b pop %ebx
80103c8a: 5e pop %esi
80103c8b: 5f pop %edi
80103c8c: 5d pop %ebp
80103c8d: c3 ret
panic("sleep without lk");
80103c8e: c7 04 24 6f 74 10 80 movl $0x8010746f,(%esp)
80103c95: e8 c6 c6 ff ff call 80100360 <panic>
panic("sleep");
80103c9a: c7 04 24 69 74 10 80 movl $0x80107469,(%esp)
80103ca1: e8 ba c6 ff ff call 80100360 <panic>
80103ca6: 8d 76 00 lea 0x0(%esi),%esi
80103ca9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103cb0 <wait>:
{
80103cb0: 55 push %ebp
80103cb1: 89 e5 mov %esp,%ebp
80103cb3: 56 push %esi
80103cb4: 53 push %ebx
80103cb5: 83 ec 10 sub $0x10,%esp
struct proc *curproc = myproc();
80103cb8: e8 e3 f9 ff ff call 801036a0 <myproc>
acquire(&ptable.lock);
80103cbd: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
struct proc *curproc = myproc();
80103cc4: 89 c6 mov %eax,%esi
acquire(&ptable.lock);
80103cc6: e8 75 04 00 00 call 80104140 <acquire>
havekids = 0;
80103ccb: 31 c0 xor %eax,%eax
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103ccd: bb 54 2d 11 80 mov $0x80112d54,%ebx
80103cd2: eb 0f jmp 80103ce3 <wait+0x33>
80103cd4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80103cd8: 83 eb 80 sub $0xffffff80,%ebx
80103cdb: 81 fb 54 4d 11 80 cmp $0x80114d54,%ebx
80103ce1: 74 1d je 80103d00 <wait+0x50>
if(p->parent != curproc)
80103ce3: 39 73 18 cmp %esi,0x18(%ebx)
80103ce6: 75 f0 jne 80103cd8 <wait+0x28>
if(p->state == ZOMBIE){
80103ce8: 83 7b 10 05 cmpl $0x5,0x10(%ebx)
80103cec: 74 2f je 80103d1d <wait+0x6d>
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103cee: 83 eb 80 sub $0xffffff80,%ebx
havekids = 1;
80103cf1: b8 01 00 00 00 mov $0x1,%eax
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103cf6: 81 fb 54 4d 11 80 cmp $0x80114d54,%ebx
80103cfc: 75 e5 jne 80103ce3 <wait+0x33>
80103cfe: 66 90 xchg %ax,%ax
if(!havekids || curproc->killed){
80103d00: 85 c0 test %eax,%eax
80103d02: 74 6e je 80103d72 <wait+0xc2>
80103d04: 8b 46 28 mov 0x28(%esi),%eax
80103d07: 85 c0 test %eax,%eax
80103d09: 75 67 jne 80103d72 <wait+0xc2>
sleep(curproc, &ptable.lock); //DOC: wait-sleep
80103d0b: c7 44 24 04 20 2d 11 movl $0x80112d20,0x4(%esp)
80103d12: 80
80103d13: 89 34 24 mov %esi,(%esp)
80103d16: e8 e5 fe ff ff call 80103c00 <sleep>
}
80103d1b: eb ae jmp 80103ccb <wait+0x1b>
kfree(p->kstack);
80103d1d: 8b 43 0c mov 0xc(%ebx),%eax
pid = p->pid;
80103d20: 8b 73 14 mov 0x14(%ebx),%esi
kfree(p->kstack);
80103d23: 89 04 24 mov %eax,(%esp)
80103d26: e8 c5 e5 ff ff call 801022f0 <kfree>
freevm(p->pgdir);
80103d2b: 8b 43 04 mov 0x4(%ebx),%eax
p->kstack = 0;
80103d2e: c7 43 0c 00 00 00 00 movl $0x0,0xc(%ebx)
freevm(p->pgdir);
80103d35: 89 04 24 mov %eax,(%esp)
80103d38: e8 b3 2c 00 00 call 801069f0 <freevm>
release(&ptable.lock);
80103d3d: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
p->pid = 0;
80103d44: c7 43 14 00 00 00 00 movl $0x0,0x14(%ebx)
p->parent = 0;
80103d4b: c7 43 18 00 00 00 00 movl $0x0,0x18(%ebx)
p->name[0] = 0;
80103d52: c6 43 70 00 movb $0x0,0x70(%ebx)
p->killed = 0;
80103d56: c7 43 28 00 00 00 00 movl $0x0,0x28(%ebx)
p->state = UNUSED;
80103d5d: c7 43 10 00 00 00 00 movl $0x0,0x10(%ebx)
release(&ptable.lock);
80103d64: e8 c7 04 00 00 call 80104230 <release>
}
80103d69: 83 c4 10 add $0x10,%esp
return pid;
80103d6c: 89 f0 mov %esi,%eax
}
80103d6e: 5b pop %ebx
80103d6f: 5e pop %esi
80103d70: 5d pop %ebp
80103d71: c3 ret
release(&ptable.lock);
80103d72: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103d79: e8 b2 04 00 00 call 80104230 <release>
}
80103d7e: 83 c4 10 add $0x10,%esp
return -1;
80103d81: b8 ff ff ff ff mov $0xffffffff,%eax
}
80103d86: 5b pop %ebx
80103d87: 5e pop %esi
80103d88: 5d pop %ebp
80103d89: c3 ret
80103d8a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80103d90 <wakeup>:
}
// Wake up all processes sleeping on chan.
void
wakeup(void *chan)
{
80103d90: 55 push %ebp
80103d91: 89 e5 mov %esp,%ebp
80103d93: 53 push %ebx
80103d94: 83 ec 14 sub $0x14,%esp
80103d97: 8b 5d 08 mov 0x8(%ebp),%ebx
acquire(&ptable.lock);
80103d9a: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103da1: e8 9a 03 00 00 call 80104140 <acquire>
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
80103da6: b8 54 2d 11 80 mov $0x80112d54,%eax
80103dab: eb 0d jmp 80103dba <wakeup+0x2a>
80103dad: 8d 76 00 lea 0x0(%esi),%esi
80103db0: 83 e8 80 sub $0xffffff80,%eax
80103db3: 3d 54 4d 11 80 cmp $0x80114d54,%eax
80103db8: 74 1e je 80103dd8 <wakeup+0x48>
if(p->state == SLEEPING && p->chan == chan)
80103dba: 83 78 10 02 cmpl $0x2,0x10(%eax)
80103dbe: 75 f0 jne 80103db0 <wakeup+0x20>
80103dc0: 3b 58 24 cmp 0x24(%eax),%ebx
80103dc3: 75 eb jne 80103db0 <wakeup+0x20>
p->state = RUNNABLE;
80103dc5: c7 40 10 03 00 00 00 movl $0x3,0x10(%eax)
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++)
80103dcc: 83 e8 80 sub $0xffffff80,%eax
80103dcf: 3d 54 4d 11 80 cmp $0x80114d54,%eax
80103dd4: 75 e4 jne 80103dba <wakeup+0x2a>
80103dd6: 66 90 xchg %ax,%ax
wakeup1(chan);
release(&ptable.lock);
80103dd8: c7 45 08 20 2d 11 80 movl $0x80112d20,0x8(%ebp)
}
80103ddf: 83 c4 14 add $0x14,%esp
80103de2: 5b pop %ebx
80103de3: 5d pop %ebp
release(&ptable.lock);
80103de4: e9 47 04 00 00 jmp 80104230 <release>
80103de9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80103df0 <kill>:
// Kill the process with the given pid.
// Process won't exit until it returns
// to user space (see trap in trap.c).
int
kill(int pid)
{
80103df0: 55 push %ebp
80103df1: 89 e5 mov %esp,%ebp
80103df3: 53 push %ebx
80103df4: 83 ec 14 sub $0x14,%esp
80103df7: 8b 5d 08 mov 0x8(%ebp),%ebx
struct proc *p;
acquire(&ptable.lock);
80103dfa: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103e01: e8 3a 03 00 00 call 80104140 <acquire>
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103e06: b8 54 2d 11 80 mov $0x80112d54,%eax
80103e0b: eb 0d jmp 80103e1a <kill+0x2a>
80103e0d: 8d 76 00 lea 0x0(%esi),%esi
80103e10: 83 e8 80 sub $0xffffff80,%eax
80103e13: 3d 54 4d 11 80 cmp $0x80114d54,%eax
80103e18: 74 36 je 80103e50 <kill+0x60>
if(p->pid == pid){
80103e1a: 39 58 14 cmp %ebx,0x14(%eax)
80103e1d: 75 f1 jne 80103e10 <kill+0x20>
p->killed = 1;
// Wake process from sleep if necessary.
if(p->state == SLEEPING)
80103e1f: 83 78 10 02 cmpl $0x2,0x10(%eax)
p->killed = 1;
80103e23: c7 40 28 01 00 00 00 movl $0x1,0x28(%eax)
if(p->state == SLEEPING)
80103e2a: 74 14 je 80103e40 <kill+0x50>
p->state = RUNNABLE;
release(&ptable.lock);
80103e2c: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103e33: e8 f8 03 00 00 call 80104230 <release>
return 0;
}
}
release(&ptable.lock);
return -1;
}
80103e38: 83 c4 14 add $0x14,%esp
return 0;
80103e3b: 31 c0 xor %eax,%eax
}
80103e3d: 5b pop %ebx
80103e3e: 5d pop %ebp
80103e3f: c3 ret
p->state = RUNNABLE;
80103e40: c7 40 10 03 00 00 00 movl $0x3,0x10(%eax)
80103e47: eb e3 jmp 80103e2c <kill+0x3c>
80103e49: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
release(&ptable.lock);
80103e50: c7 04 24 20 2d 11 80 movl $0x80112d20,(%esp)
80103e57: e8 d4 03 00 00 call 80104230 <release>
}
80103e5c: 83 c4 14 add $0x14,%esp
return -1;
80103e5f: b8 ff ff ff ff mov $0xffffffff,%eax
}
80103e64: 5b pop %ebx
80103e65: 5d pop %ebp
80103e66: c3 ret
80103e67: 89 f6 mov %esi,%esi
80103e69: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103e70 <procdump>:
// Print a process listing to console. For debugging.
// Runs when user types ^P on console.
// No lock to avoid wedging a stuck machine further.
void
procdump(void)
{
80103e70: 55 push %ebp
80103e71: 89 e5 mov %esp,%ebp
80103e73: 57 push %edi
80103e74: 56 push %esi
80103e75: 53 push %ebx
80103e76: bb c4 2d 11 80 mov $0x80112dc4,%ebx
80103e7b: 83 ec 4c sub $0x4c,%esp
80103e7e: 8d 75 e8 lea -0x18(%ebp),%esi
80103e81: eb 20 jmp 80103ea3 <procdump+0x33>
80103e83: 90 nop
80103e84: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
if(p->state == SLEEPING){
getcallerpcs((uint*)p->context->ebp+2, pc);
for(i=0; i<10 && pc[i] != 0; i++)
cprintf(" %p", pc[i]);
}
cprintf("\n");
80103e88: c7 04 24 eb 78 10 80 movl $0x801078eb,(%esp)
80103e8f: e8 bc c7 ff ff call 80100650 <cprintf>
80103e94: 83 eb 80 sub $0xffffff80,%ebx
for(p = ptable.proc; p < &ptable.proc[NPROC]; p++){
80103e97: 81 fb c4 4d 11 80 cmp $0x80114dc4,%ebx
80103e9d: 0f 84 8d 00 00 00 je 80103f30 <procdump+0xc0>
if(p->state == UNUSED)
80103ea3: 8b 43 a0 mov -0x60(%ebx),%eax
80103ea6: 85 c0 test %eax,%eax
80103ea8: 74 ea je 80103e94 <procdump+0x24>
if(p->state >= 0 && p->state < NELEM(states) && states[p->state])
80103eaa: 83 f8 05 cmp $0x5,%eax
state = "???";
80103ead: ba 80 74 10 80 mov $0x80107480,%edx
if(p->state >= 0 && p->state < NELEM(states) && states[p->state])
80103eb2: 77 11 ja 80103ec5 <procdump+0x55>
80103eb4: 8b 14 85 e0 74 10 80 mov -0x7fef8b20(,%eax,4),%edx
state = "???";
80103ebb: b8 80 74 10 80 mov $0x80107480,%eax
80103ec0: 85 d2 test %edx,%edx
80103ec2: 0f 44 d0 cmove %eax,%edx
cprintf("%d %s %s", p->pid, state, p->name);
80103ec5: 8b 43 a4 mov -0x5c(%ebx),%eax
80103ec8: 89 5c 24 0c mov %ebx,0xc(%esp)
80103ecc: 89 54 24 08 mov %edx,0x8(%esp)
80103ed0: c7 04 24 84 74 10 80 movl $0x80107484,(%esp)
80103ed7: 89 44 24 04 mov %eax,0x4(%esp)
80103edb: e8 70 c7 ff ff call 80100650 <cprintf>
if(p->state == SLEEPING){
80103ee0: 83 7b a0 02 cmpl $0x2,-0x60(%ebx)
80103ee4: 75 a2 jne 80103e88 <procdump+0x18>
getcallerpcs((uint*)p->context->ebp+2, pc);
80103ee6: 8d 45 c0 lea -0x40(%ebp),%eax
80103ee9: 89 44 24 04 mov %eax,0x4(%esp)
80103eed: 8b 43 b0 mov -0x50(%ebx),%eax
80103ef0: 8d 7d c0 lea -0x40(%ebp),%edi
80103ef3: 8b 40 0c mov 0xc(%eax),%eax
80103ef6: 83 c0 08 add $0x8,%eax
80103ef9: 89 04 24 mov %eax,(%esp)
80103efc: e8 6f 01 00 00 call 80104070 <getcallerpcs>
80103f01: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
for(i=0; i<10 && pc[i] != 0; i++)
80103f08: 8b 17 mov (%edi),%edx
80103f0a: 85 d2 test %edx,%edx
80103f0c: 0f 84 76 ff ff ff je 80103e88 <procdump+0x18>
cprintf(" %p", pc[i]);
80103f12: 89 54 24 04 mov %edx,0x4(%esp)
80103f16: 83 c7 04 add $0x4,%edi
80103f19: c7 04 24 a1 6e 10 80 movl $0x80106ea1,(%esp)
80103f20: e8 2b c7 ff ff call 80100650 <cprintf>
for(i=0; i<10 && pc[i] != 0; i++)
80103f25: 39 f7 cmp %esi,%edi
80103f27: 75 df jne 80103f08 <procdump+0x98>
80103f29: e9 5a ff ff ff jmp 80103e88 <procdump+0x18>
80103f2e: 66 90 xchg %ax,%ax
}
}
80103f30: 83 c4 4c add $0x4c,%esp
80103f33: 5b pop %ebx
80103f34: 5e pop %esi
80103f35: 5f pop %edi
80103f36: 5d pop %ebp
80103f37: c3 ret
80103f38: 66 90 xchg %ax,%ax
80103f3a: 66 90 xchg %ax,%ax
80103f3c: 66 90 xchg %ax,%ax
80103f3e: 66 90 xchg %ax,%ax
80103f40 <initsleeplock>:
#include "spinlock.h"
#include "sleeplock.h"
void
initsleeplock(struct sleeplock *lk, char *name)
{
80103f40: 55 push %ebp
80103f41: 89 e5 mov %esp,%ebp
80103f43: 53 push %ebx
80103f44: 83 ec 14 sub $0x14,%esp
80103f47: 8b 5d 08 mov 0x8(%ebp),%ebx
initlock(&lk->lk, "sleep lock");
80103f4a: c7 44 24 04 f8 74 10 movl $0x801074f8,0x4(%esp)
80103f51: 80
80103f52: 8d 43 04 lea 0x4(%ebx),%eax
80103f55: 89 04 24 mov %eax,(%esp)
80103f58: e8 f3 00 00 00 call 80104050 <initlock>
lk->name = name;
80103f5d: 8b 45 0c mov 0xc(%ebp),%eax
lk->locked = 0;
80103f60: c7 03 00 00 00 00 movl $0x0,(%ebx)
lk->pid = 0;
80103f66: c7 43 3c 00 00 00 00 movl $0x0,0x3c(%ebx)
lk->name = name;
80103f6d: 89 43 38 mov %eax,0x38(%ebx)
}
80103f70: 83 c4 14 add $0x14,%esp
80103f73: 5b pop %ebx
80103f74: 5d pop %ebp
80103f75: c3 ret
80103f76: 8d 76 00 lea 0x0(%esi),%esi
80103f79: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80103f80 <acquiresleep>:
void
acquiresleep(struct sleeplock *lk)
{
80103f80: 55 push %ebp
80103f81: 89 e5 mov %esp,%ebp
80103f83: 56 push %esi
80103f84: 53 push %ebx
80103f85: 83 ec 10 sub $0x10,%esp
80103f88: 8b 5d 08 mov 0x8(%ebp),%ebx
acquire(&lk->lk);
80103f8b: 8d 73 04 lea 0x4(%ebx),%esi
80103f8e: 89 34 24 mov %esi,(%esp)
80103f91: e8 aa 01 00 00 call 80104140 <acquire>
while (lk->locked) {
80103f96: 8b 13 mov (%ebx),%edx
80103f98: 85 d2 test %edx,%edx
80103f9a: 74 16 je 80103fb2 <acquiresleep+0x32>
80103f9c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
sleep(lk, &lk->lk);
80103fa0: 89 74 24 04 mov %esi,0x4(%esp)
80103fa4: 89 1c 24 mov %ebx,(%esp)
80103fa7: e8 54 fc ff ff call 80103c00 <sleep>
while (lk->locked) {
80103fac: 8b 03 mov (%ebx),%eax
80103fae: 85 c0 test %eax,%eax
80103fb0: 75 ee jne 80103fa0 <acquiresleep+0x20>
}
lk->locked = 1;
80103fb2: c7 03 01 00 00 00 movl $0x1,(%ebx)
lk->pid = myproc()->pid;
80103fb8: e8 e3 f6 ff ff call 801036a0 <myproc>
80103fbd: 8b 40 14 mov 0x14(%eax),%eax
80103fc0: 89 43 3c mov %eax,0x3c(%ebx)
release(&lk->lk);
80103fc3: 89 75 08 mov %esi,0x8(%ebp)
}
80103fc6: 83 c4 10 add $0x10,%esp
80103fc9: 5b pop %ebx
80103fca: 5e pop %esi
80103fcb: 5d pop %ebp
release(&lk->lk);
80103fcc: e9 5f 02 00 00 jmp 80104230 <release>
80103fd1: eb 0d jmp 80103fe0 <releasesleep>
80103fd3: 90 nop
80103fd4: 90 nop
80103fd5: 90 nop
80103fd6: 90 nop
80103fd7: 90 nop
80103fd8: 90 nop
80103fd9: 90 nop
80103fda: 90 nop
80103fdb: 90 nop
80103fdc: 90 nop
80103fdd: 90 nop
80103fde: 90 nop
80103fdf: 90 nop
80103fe0 <releasesleep>:
void
releasesleep(struct sleeplock *lk)
{
80103fe0: 55 push %ebp
80103fe1: 89 e5 mov %esp,%ebp
80103fe3: 56 push %esi
80103fe4: 53 push %ebx
80103fe5: 83 ec 10 sub $0x10,%esp
80103fe8: 8b 5d 08 mov 0x8(%ebp),%ebx
acquire(&lk->lk);
80103feb: 8d 73 04 lea 0x4(%ebx),%esi
80103fee: 89 34 24 mov %esi,(%esp)
80103ff1: e8 4a 01 00 00 call 80104140 <acquire>
lk->locked = 0;
80103ff6: c7 03 00 00 00 00 movl $0x0,(%ebx)
lk->pid = 0;
80103ffc: c7 43 3c 00 00 00 00 movl $0x0,0x3c(%ebx)
wakeup(lk);
80104003: 89 1c 24 mov %ebx,(%esp)
80104006: e8 85 fd ff ff call 80103d90 <wakeup>
release(&lk->lk);
8010400b: 89 75 08 mov %esi,0x8(%ebp)
}
8010400e: 83 c4 10 add $0x10,%esp
80104011: 5b pop %ebx
80104012: 5e pop %esi
80104013: 5d pop %ebp
release(&lk->lk);
80104014: e9 17 02 00 00 jmp 80104230 <release>
80104019: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80104020 <holdingsleep>:
int
holdingsleep(struct sleeplock *lk)
{
80104020: 55 push %ebp
80104021: 89 e5 mov %esp,%ebp
80104023: 56 push %esi
80104024: 53 push %ebx
80104025: 83 ec 10 sub $0x10,%esp
80104028: 8b 5d 08 mov 0x8(%ebp),%ebx
int r;
acquire(&lk->lk);
8010402b: 8d 73 04 lea 0x4(%ebx),%esi
8010402e: 89 34 24 mov %esi,(%esp)
80104031: e8 0a 01 00 00 call 80104140 <acquire>
r = lk->locked;
80104036: 8b 1b mov (%ebx),%ebx
release(&lk->lk);
80104038: 89 34 24 mov %esi,(%esp)
8010403b: e8 f0 01 00 00 call 80104230 <release>
return r;
}
80104040: 83 c4 10 add $0x10,%esp
80104043: 89 d8 mov %ebx,%eax
80104045: 5b pop %ebx
80104046: 5e pop %esi
80104047: 5d pop %ebp
80104048: c3 ret
80104049: 66 90 xchg %ax,%ax
8010404b: 66 90 xchg %ax,%ax
8010404d: 66 90 xchg %ax,%ax
8010404f: 90 nop
80104050 <initlock>:
#include "proc.h"
#include "spinlock.h"
void
initlock(struct spinlock *lk, char *name)
{
80104050: 55 push %ebp
80104051: 89 e5 mov %esp,%ebp
80104053: 8b 45 08 mov 0x8(%ebp),%eax
lk->name = name;
80104056: 8b 55 0c mov 0xc(%ebp),%edx
lk->locked = 0;
80104059: c7 00 00 00 00 00 movl $0x0,(%eax)
lk->name = name;
8010405f: 89 50 04 mov %edx,0x4(%eax)
lk->cpu = 0;
80104062: c7 40 08 00 00 00 00 movl $0x0,0x8(%eax)
}
80104069: 5d pop %ebp
8010406a: c3 ret
8010406b: 90 nop
8010406c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104070 <getcallerpcs>:
}
// Record the current call stack in pcs[] by following the %ebp chain.
void
getcallerpcs(void *v, uint pcs[])
{
80104070: 55 push %ebp
80104071: 89 e5 mov %esp,%ebp
uint *ebp;
int i;
ebp = (uint*)v - 2;
80104073: 8b 45 08 mov 0x8(%ebp),%eax
{
80104076: 8b 4d 0c mov 0xc(%ebp),%ecx
80104079: 53 push %ebx
ebp = (uint*)v - 2;
8010407a: 8d 50 f8 lea -0x8(%eax),%edx
for(i = 0; i < 10; i++){
8010407d: 31 c0 xor %eax,%eax
8010407f: 90 nop
if(ebp == 0 || ebp < (uint*)KERNBASE || ebp == (uint*)0xffffffff)
80104080: 8d 9a 00 00 00 80 lea -0x80000000(%edx),%ebx
80104086: 81 fb fe ff ff 7f cmp $0x7ffffffe,%ebx
8010408c: 77 1a ja 801040a8 <getcallerpcs+0x38>
break;
pcs[i] = ebp[1]; // saved %eip
8010408e: 8b 5a 04 mov 0x4(%edx),%ebx
80104091: 89 1c 81 mov %ebx,(%ecx,%eax,4)
for(i = 0; i < 10; i++){
80104094: 83 c0 01 add $0x1,%eax
ebp = (uint*)ebp[0]; // saved %ebp
80104097: 8b 12 mov (%edx),%edx
for(i = 0; i < 10; i++){
80104099: 83 f8 0a cmp $0xa,%eax
8010409c: 75 e2 jne 80104080 <getcallerpcs+0x10>
}
for(; i < 10; i++)
pcs[i] = 0;
}
8010409e: 5b pop %ebx
8010409f: 5d pop %ebp
801040a0: c3 ret
801040a1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
pcs[i] = 0;
801040a8: c7 04 81 00 00 00 00 movl $0x0,(%ecx,%eax,4)
for(; i < 10; i++)
801040af: 83 c0 01 add $0x1,%eax
801040b2: 83 f8 0a cmp $0xa,%eax
801040b5: 74 e7 je 8010409e <getcallerpcs+0x2e>
pcs[i] = 0;
801040b7: c7 04 81 00 00 00 00 movl $0x0,(%ecx,%eax,4)
for(; i < 10; i++)
801040be: 83 c0 01 add $0x1,%eax
801040c1: 83 f8 0a cmp $0xa,%eax
801040c4: 75 e2 jne 801040a8 <getcallerpcs+0x38>
801040c6: eb d6 jmp 8010409e <getcallerpcs+0x2e>
801040c8: 90 nop
801040c9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
801040d0 <holding>:
// Check whether this cpu is holding the lock.
int
holding(struct spinlock *lock)
{
801040d0: 55 push %ebp
return lock->locked && lock->cpu == mycpu();
801040d1: 31 c0 xor %eax,%eax
{
801040d3: 89 e5 mov %esp,%ebp
801040d5: 53 push %ebx
801040d6: 83 ec 04 sub $0x4,%esp
801040d9: 8b 55 08 mov 0x8(%ebp),%edx
return lock->locked && lock->cpu == mycpu();
801040dc: 8b 0a mov (%edx),%ecx
801040de: 85 c9 test %ecx,%ecx
801040e0: 74 10 je 801040f2 <holding+0x22>
801040e2: 8b 5a 08 mov 0x8(%edx),%ebx
801040e5: e8 16 f5 ff ff call 80103600 <mycpu>
801040ea: 39 c3 cmp %eax,%ebx
801040ec: 0f 94 c0 sete %al
801040ef: 0f b6 c0 movzbl %al,%eax
}
801040f2: 83 c4 04 add $0x4,%esp
801040f5: 5b pop %ebx
801040f6: 5d pop %ebp
801040f7: c3 ret
801040f8: 90 nop
801040f9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80104100 <pushcli>:
// it takes two popcli to undo two pushcli. Also, if interrupts
// are off, then pushcli, popcli leaves them off.
void
pushcli(void)
{
80104100: 55 push %ebp
80104101: 89 e5 mov %esp,%ebp
80104103: 53 push %ebx
80104104: 83 ec 04 sub $0x4,%esp
80104107: 9c pushf
80104108: 5b pop %ebx
asm volatile("cli");
80104109: fa cli
int eflags;
eflags = readeflags();
cli();
if(mycpu()->ncli == 0)
8010410a: e8 f1 f4 ff ff call 80103600 <mycpu>
8010410f: 8b 80 a4 00 00 00 mov 0xa4(%eax),%eax
80104115: 85 c0 test %eax,%eax
80104117: 75 11 jne 8010412a <pushcli+0x2a>
mycpu()->intena = eflags & FL_IF;
80104119: e8 e2 f4 ff ff call 80103600 <mycpu>
8010411e: 81 e3 00 02 00 00 and $0x200,%ebx
80104124: 89 98 a8 00 00 00 mov %ebx,0xa8(%eax)
mycpu()->ncli += 1;
8010412a: e8 d1 f4 ff ff call 80103600 <mycpu>
8010412f: 83 80 a4 00 00 00 01 addl $0x1,0xa4(%eax)
}
80104136: 83 c4 04 add $0x4,%esp
80104139: 5b pop %ebx
8010413a: 5d pop %ebp
8010413b: c3 ret
8010413c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104140 <acquire>:
{
80104140: 55 push %ebp
80104141: 89 e5 mov %esp,%ebp
80104143: 53 push %ebx
80104144: 83 ec 14 sub $0x14,%esp
pushcli(); // disable interrupts to avoid deadlock.
80104147: e8 b4 ff ff ff call 80104100 <pushcli>
if(holding(lk))
8010414c: 8b 55 08 mov 0x8(%ebp),%edx
return lock->locked && lock->cpu == mycpu();
8010414f: 8b 02 mov (%edx),%eax
80104151: 85 c0 test %eax,%eax
80104153: 75 43 jne 80104198 <acquire+0x58>
asm volatile("lock; xchgl %0, %1" :
80104155: b9 01 00 00 00 mov $0x1,%ecx
8010415a: eb 07 jmp 80104163 <acquire+0x23>
8010415c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104160: 8b 55 08 mov 0x8(%ebp),%edx
80104163: 89 c8 mov %ecx,%eax
80104165: f0 87 02 lock xchg %eax,(%edx)
while(xchg(&lk->locked, 1) != 0)
80104168: 85 c0 test %eax,%eax
8010416a: 75 f4 jne 80104160 <acquire+0x20>
__sync_synchronize();
8010416c: 0f ae f0 mfence
lk->cpu = mycpu();
8010416f: 8b 5d 08 mov 0x8(%ebp),%ebx
80104172: e8 89 f4 ff ff call 80103600 <mycpu>
80104177: 89 43 08 mov %eax,0x8(%ebx)
getcallerpcs(&lk, lk->pcs);
8010417a: 8b 45 08 mov 0x8(%ebp),%eax
8010417d: 83 c0 0c add $0xc,%eax
80104180: 89 44 24 04 mov %eax,0x4(%esp)
80104184: 8d 45 08 lea 0x8(%ebp),%eax
80104187: 89 04 24 mov %eax,(%esp)
8010418a: e8 e1 fe ff ff call 80104070 <getcallerpcs>
}
8010418f: 83 c4 14 add $0x14,%esp
80104192: 5b pop %ebx
80104193: 5d pop %ebp
80104194: c3 ret
80104195: 8d 76 00 lea 0x0(%esi),%esi
return lock->locked && lock->cpu == mycpu();
80104198: 8b 5a 08 mov 0x8(%edx),%ebx
8010419b: e8 60 f4 ff ff call 80103600 <mycpu>
if(holding(lk))
801041a0: 39 c3 cmp %eax,%ebx
801041a2: 74 05 je 801041a9 <acquire+0x69>
801041a4: 8b 55 08 mov 0x8(%ebp),%edx
801041a7: eb ac jmp 80104155 <acquire+0x15>
panic("acquire");
801041a9: c7 04 24 03 75 10 80 movl $0x80107503,(%esp)
801041b0: e8 ab c1 ff ff call 80100360 <panic>
801041b5: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801041b9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801041c0 <popcli>:
void
popcli(void)
{
801041c0: 55 push %ebp
801041c1: 89 e5 mov %esp,%ebp
801041c3: 83 ec 18 sub $0x18,%esp
asm volatile("pushfl; popl %0" : "=r" (eflags));
801041c6: 9c pushf
801041c7: 58 pop %eax
if(readeflags()&FL_IF)
801041c8: f6 c4 02 test $0x2,%ah
801041cb: 75 49 jne 80104216 <popcli+0x56>
panic("popcli - interruptible");
if(--mycpu()->ncli < 0)
801041cd: e8 2e f4 ff ff call 80103600 <mycpu>
801041d2: 8b 88 a4 00 00 00 mov 0xa4(%eax),%ecx
801041d8: 8d 51 ff lea -0x1(%ecx),%edx
801041db: 85 d2 test %edx,%edx
801041dd: 89 90 a4 00 00 00 mov %edx,0xa4(%eax)
801041e3: 78 25 js 8010420a <popcli+0x4a>
panic("popcli");
if(mycpu()->ncli == 0 && mycpu()->intena)
801041e5: e8 16 f4 ff ff call 80103600 <mycpu>
801041ea: 8b 90 a4 00 00 00 mov 0xa4(%eax),%edx
801041f0: 85 d2 test %edx,%edx
801041f2: 74 04 je 801041f8 <popcli+0x38>
sti();
}
801041f4: c9 leave
801041f5: c3 ret
801041f6: 66 90 xchg %ax,%ax
if(mycpu()->ncli == 0 && mycpu()->intena)
801041f8: e8 03 f4 ff ff call 80103600 <mycpu>
801041fd: 8b 80 a8 00 00 00 mov 0xa8(%eax),%eax
80104203: 85 c0 test %eax,%eax
80104205: 74 ed je 801041f4 <popcli+0x34>
asm volatile("sti");
80104207: fb sti
}
80104208: c9 leave
80104209: c3 ret
panic("popcli");
8010420a: c7 04 24 22 75 10 80 movl $0x80107522,(%esp)
80104211: e8 4a c1 ff ff call 80100360 <panic>
panic("popcli - interruptible");
80104216: c7 04 24 0b 75 10 80 movl $0x8010750b,(%esp)
8010421d: e8 3e c1 ff ff call 80100360 <panic>
80104222: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80104229: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80104230 <release>:
{
80104230: 55 push %ebp
80104231: 89 e5 mov %esp,%ebp
80104233: 56 push %esi
80104234: 53 push %ebx
80104235: 83 ec 10 sub $0x10,%esp
80104238: 8b 5d 08 mov 0x8(%ebp),%ebx
return lock->locked && lock->cpu == mycpu();
8010423b: 8b 03 mov (%ebx),%eax
8010423d: 85 c0 test %eax,%eax
8010423f: 75 0f jne 80104250 <release+0x20>
panic("release");
80104241: c7 04 24 29 75 10 80 movl $0x80107529,(%esp)
80104248: e8 13 c1 ff ff call 80100360 <panic>
8010424d: 8d 76 00 lea 0x0(%esi),%esi
return lock->locked && lock->cpu == mycpu();
80104250: 8b 73 08 mov 0x8(%ebx),%esi
80104253: e8 a8 f3 ff ff call 80103600 <mycpu>
if(!holding(lk))
80104258: 39 c6 cmp %eax,%esi
8010425a: 75 e5 jne 80104241 <release+0x11>
lk->pcs[0] = 0;
8010425c: c7 43 0c 00 00 00 00 movl $0x0,0xc(%ebx)
lk->cpu = 0;
80104263: c7 43 08 00 00 00 00 movl $0x0,0x8(%ebx)
__sync_synchronize();
8010426a: 0f ae f0 mfence
asm volatile("movl $0, %0" : "+m" (lk->locked) : );
8010426d: c7 03 00 00 00 00 movl $0x0,(%ebx)
}
80104273: 83 c4 10 add $0x10,%esp
80104276: 5b pop %ebx
80104277: 5e pop %esi
80104278: 5d pop %ebp
popcli();
80104279: e9 42 ff ff ff jmp 801041c0 <popcli>
8010427e: 66 90 xchg %ax,%ax
80104280 <memset>:
#include "types.h"
#include "x86.h"
void*
memset(void *dst, int c, uint n)
{
80104280: 55 push %ebp
80104281: 89 e5 mov %esp,%ebp
80104283: 8b 55 08 mov 0x8(%ebp),%edx
80104286: 57 push %edi
80104287: 8b 4d 10 mov 0x10(%ebp),%ecx
8010428a: 53 push %ebx
if ((int)dst%4 == 0 && n%4 == 0){
8010428b: f6 c2 03 test $0x3,%dl
8010428e: 75 05 jne 80104295 <memset+0x15>
80104290: f6 c1 03 test $0x3,%cl
80104293: 74 13 je 801042a8 <memset+0x28>
asm volatile("cld; rep stosb" :
80104295: 89 d7 mov %edx,%edi
80104297: 8b 45 0c mov 0xc(%ebp),%eax
8010429a: fc cld
8010429b: f3 aa rep stos %al,%es:(%edi)
c &= 0xFF;
stosl(dst, (c<<24)|(c<<16)|(c<<8)|c, n/4);
} else
stosb(dst, c, n);
return dst;
}
8010429d: 5b pop %ebx
8010429e: 89 d0 mov %edx,%eax
801042a0: 5f pop %edi
801042a1: 5d pop %ebp
801042a2: c3 ret
801042a3: 90 nop
801042a4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
c &= 0xFF;
801042a8: 0f b6 7d 0c movzbl 0xc(%ebp),%edi
stosl(dst, (c<<24)|(c<<16)|(c<<8)|c, n/4);
801042ac: c1 e9 02 shr $0x2,%ecx
801042af: 89 f8 mov %edi,%eax
801042b1: 89 fb mov %edi,%ebx
801042b3: c1 e0 18 shl $0x18,%eax
801042b6: c1 e3 10 shl $0x10,%ebx
801042b9: 09 d8 or %ebx,%eax
801042bb: 09 f8 or %edi,%eax
801042bd: c1 e7 08 shl $0x8,%edi
801042c0: 09 f8 or %edi,%eax
asm volatile("cld; rep stosl" :
801042c2: 89 d7 mov %edx,%edi
801042c4: fc cld
801042c5: f3 ab rep stos %eax,%es:(%edi)
}
801042c7: 5b pop %ebx
801042c8: 89 d0 mov %edx,%eax
801042ca: 5f pop %edi
801042cb: 5d pop %ebp
801042cc: c3 ret
801042cd: 8d 76 00 lea 0x0(%esi),%esi
801042d0 <memcmp>:
int
memcmp(const void *v1, const void *v2, uint n)
{
801042d0: 55 push %ebp
801042d1: 89 e5 mov %esp,%ebp
801042d3: 8b 45 10 mov 0x10(%ebp),%eax
801042d6: 57 push %edi
801042d7: 56 push %esi
801042d8: 8b 75 0c mov 0xc(%ebp),%esi
801042db: 53 push %ebx
801042dc: 8b 5d 08 mov 0x8(%ebp),%ebx
const uchar *s1, *s2;
s1 = v1;
s2 = v2;
while(n-- > 0){
801042df: 85 c0 test %eax,%eax
801042e1: 8d 78 ff lea -0x1(%eax),%edi
801042e4: 74 26 je 8010430c <memcmp+0x3c>
if(*s1 != *s2)
801042e6: 0f b6 03 movzbl (%ebx),%eax
801042e9: 31 d2 xor %edx,%edx
801042eb: 0f b6 0e movzbl (%esi),%ecx
801042ee: 38 c8 cmp %cl,%al
801042f0: 74 16 je 80104308 <memcmp+0x38>
801042f2: eb 24 jmp 80104318 <memcmp+0x48>
801042f4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801042f8: 0f b6 44 13 01 movzbl 0x1(%ebx,%edx,1),%eax
801042fd: 83 c2 01 add $0x1,%edx
80104300: 0f b6 0c 16 movzbl (%esi,%edx,1),%ecx
80104304: 38 c8 cmp %cl,%al
80104306: 75 10 jne 80104318 <memcmp+0x48>
while(n-- > 0){
80104308: 39 fa cmp %edi,%edx
8010430a: 75 ec jne 801042f8 <memcmp+0x28>
return *s1 - *s2;
s1++, s2++;
}
return 0;
}
8010430c: 5b pop %ebx
return 0;
8010430d: 31 c0 xor %eax,%eax
}
8010430f: 5e pop %esi
80104310: 5f pop %edi
80104311: 5d pop %ebp
80104312: c3 ret
80104313: 90 nop
80104314: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104318: 5b pop %ebx
return *s1 - *s2;
80104319: 29 c8 sub %ecx,%eax
}
8010431b: 5e pop %esi
8010431c: 5f pop %edi
8010431d: 5d pop %ebp
8010431e: c3 ret
8010431f: 90 nop
80104320 <memmove>:
void*
memmove(void *dst, const void *src, uint n)
{
80104320: 55 push %ebp
80104321: 89 e5 mov %esp,%ebp
80104323: 57 push %edi
80104324: 8b 45 08 mov 0x8(%ebp),%eax
80104327: 56 push %esi
80104328: 8b 75 0c mov 0xc(%ebp),%esi
8010432b: 53 push %ebx
8010432c: 8b 5d 10 mov 0x10(%ebp),%ebx
const char *s;
char *d;
s = src;
d = dst;
if(s < d && s + n > d){
8010432f: 39 c6 cmp %eax,%esi
80104331: 73 35 jae 80104368 <memmove+0x48>
80104333: 8d 0c 1e lea (%esi,%ebx,1),%ecx
80104336: 39 c8 cmp %ecx,%eax
80104338: 73 2e jae 80104368 <memmove+0x48>
s += n;
d += n;
while(n-- > 0)
8010433a: 85 db test %ebx,%ebx
d += n;
8010433c: 8d 3c 18 lea (%eax,%ebx,1),%edi
while(n-- > 0)
8010433f: 8d 53 ff lea -0x1(%ebx),%edx
80104342: 74 1b je 8010435f <memmove+0x3f>
80104344: f7 db neg %ebx
80104346: 8d 34 19 lea (%ecx,%ebx,1),%esi
80104349: 01 fb add %edi,%ebx
8010434b: 90 nop
8010434c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
*--d = *--s;
80104350: 0f b6 0c 16 movzbl (%esi,%edx,1),%ecx
80104354: 88 0c 13 mov %cl,(%ebx,%edx,1)
while(n-- > 0)
80104357: 83 ea 01 sub $0x1,%edx
8010435a: 83 fa ff cmp $0xffffffff,%edx
8010435d: 75 f1 jne 80104350 <memmove+0x30>
} else
while(n-- > 0)
*d++ = *s++;
return dst;
}
8010435f: 5b pop %ebx
80104360: 5e pop %esi
80104361: 5f pop %edi
80104362: 5d pop %ebp
80104363: c3 ret
80104364: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
while(n-- > 0)
80104368: 31 d2 xor %edx,%edx
8010436a: 85 db test %ebx,%ebx
8010436c: 74 f1 je 8010435f <memmove+0x3f>
8010436e: 66 90 xchg %ax,%ax
*d++ = *s++;
80104370: 0f b6 0c 16 movzbl (%esi,%edx,1),%ecx
80104374: 88 0c 10 mov %cl,(%eax,%edx,1)
80104377: 83 c2 01 add $0x1,%edx
while(n-- > 0)
8010437a: 39 da cmp %ebx,%edx
8010437c: 75 f2 jne 80104370 <memmove+0x50>
}
8010437e: 5b pop %ebx
8010437f: 5e pop %esi
80104380: 5f pop %edi
80104381: 5d pop %ebp
80104382: c3 ret
80104383: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80104389: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80104390 <memcpy>:
// memcpy exists to placate GCC. Use memmove.
void*
memcpy(void *dst, const void *src, uint n)
{
80104390: 55 push %ebp
80104391: 89 e5 mov %esp,%ebp
return memmove(dst, src, n);
}
80104393: 5d pop %ebp
return memmove(dst, src, n);
80104394: eb 8a jmp 80104320 <memmove>
80104396: 8d 76 00 lea 0x0(%esi),%esi
80104399: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801043a0 <strncmp>:
int
strncmp(const char *p, const char *q, uint n)
{
801043a0: 55 push %ebp
801043a1: 89 e5 mov %esp,%ebp
801043a3: 56 push %esi
801043a4: 8b 75 10 mov 0x10(%ebp),%esi
801043a7: 53 push %ebx
801043a8: 8b 4d 08 mov 0x8(%ebp),%ecx
801043ab: 8b 5d 0c mov 0xc(%ebp),%ebx
while(n > 0 && *p && *p == *q)
801043ae: 85 f6 test %esi,%esi
801043b0: 74 30 je 801043e2 <strncmp+0x42>
801043b2: 0f b6 01 movzbl (%ecx),%eax
801043b5: 84 c0 test %al,%al
801043b7: 74 2f je 801043e8 <strncmp+0x48>
801043b9: 0f b6 13 movzbl (%ebx),%edx
801043bc: 38 d0 cmp %dl,%al
801043be: 75 46 jne 80104406 <strncmp+0x66>
801043c0: 8d 51 01 lea 0x1(%ecx),%edx
801043c3: 01 ce add %ecx,%esi
801043c5: eb 14 jmp 801043db <strncmp+0x3b>
801043c7: 90 nop
801043c8: 0f b6 02 movzbl (%edx),%eax
801043cb: 84 c0 test %al,%al
801043cd: 74 31 je 80104400 <strncmp+0x60>
801043cf: 0f b6 19 movzbl (%ecx),%ebx
801043d2: 83 c2 01 add $0x1,%edx
801043d5: 38 d8 cmp %bl,%al
801043d7: 75 17 jne 801043f0 <strncmp+0x50>
n--, p++, q++;
801043d9: 89 cb mov %ecx,%ebx
while(n > 0 && *p && *p == *q)
801043db: 39 f2 cmp %esi,%edx
n--, p++, q++;
801043dd: 8d 4b 01 lea 0x1(%ebx),%ecx
while(n > 0 && *p && *p == *q)
801043e0: 75 e6 jne 801043c8 <strncmp+0x28>
if(n == 0)
return 0;
return (uchar)*p - (uchar)*q;
}
801043e2: 5b pop %ebx
return 0;
801043e3: 31 c0 xor %eax,%eax
}
801043e5: 5e pop %esi
801043e6: 5d pop %ebp
801043e7: c3 ret
801043e8: 0f b6 1b movzbl (%ebx),%ebx
while(n > 0 && *p && *p == *q)
801043eb: 31 c0 xor %eax,%eax
801043ed: 8d 76 00 lea 0x0(%esi),%esi
return (uchar)*p - (uchar)*q;
801043f0: 0f b6 d3 movzbl %bl,%edx
801043f3: 29 d0 sub %edx,%eax
}
801043f5: 5b pop %ebx
801043f6: 5e pop %esi
801043f7: 5d pop %ebp
801043f8: c3 ret
801043f9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80104400: 0f b6 5b 01 movzbl 0x1(%ebx),%ebx
80104404: eb ea jmp 801043f0 <strncmp+0x50>
while(n > 0 && *p && *p == *q)
80104406: 89 d3 mov %edx,%ebx
80104408: eb e6 jmp 801043f0 <strncmp+0x50>
8010440a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80104410 <strncpy>:
char*
strncpy(char *s, const char *t, int n)
{
80104410: 55 push %ebp
80104411: 89 e5 mov %esp,%ebp
80104413: 8b 45 08 mov 0x8(%ebp),%eax
80104416: 56 push %esi
80104417: 8b 4d 10 mov 0x10(%ebp),%ecx
8010441a: 53 push %ebx
8010441b: 8b 5d 0c mov 0xc(%ebp),%ebx
char *os;
os = s;
while(n-- > 0 && (*s++ = *t++) != 0)
8010441e: 89 c2 mov %eax,%edx
80104420: eb 19 jmp 8010443b <strncpy+0x2b>
80104422: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80104428: 83 c3 01 add $0x1,%ebx
8010442b: 0f b6 4b ff movzbl -0x1(%ebx),%ecx
8010442f: 83 c2 01 add $0x1,%edx
80104432: 84 c9 test %cl,%cl
80104434: 88 4a ff mov %cl,-0x1(%edx)
80104437: 74 09 je 80104442 <strncpy+0x32>
80104439: 89 f1 mov %esi,%ecx
8010443b: 85 c9 test %ecx,%ecx
8010443d: 8d 71 ff lea -0x1(%ecx),%esi
80104440: 7f e6 jg 80104428 <strncpy+0x18>
;
while(n-- > 0)
80104442: 31 c9 xor %ecx,%ecx
80104444: 85 f6 test %esi,%esi
80104446: 7e 0f jle 80104457 <strncpy+0x47>
*s++ = 0;
80104448: c6 04 0a 00 movb $0x0,(%edx,%ecx,1)
8010444c: 89 f3 mov %esi,%ebx
8010444e: 83 c1 01 add $0x1,%ecx
80104451: 29 cb sub %ecx,%ebx
while(n-- > 0)
80104453: 85 db test %ebx,%ebx
80104455: 7f f1 jg 80104448 <strncpy+0x38>
return os;
}
80104457: 5b pop %ebx
80104458: 5e pop %esi
80104459: 5d pop %ebp
8010445a: c3 ret
8010445b: 90 nop
8010445c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104460 <safestrcpy>:
// Like strncpy but guaranteed to NUL-terminate.
char*
safestrcpy(char *s, const char *t, int n)
{
80104460: 55 push %ebp
80104461: 89 e5 mov %esp,%ebp
80104463: 8b 4d 10 mov 0x10(%ebp),%ecx
80104466: 56 push %esi
80104467: 8b 45 08 mov 0x8(%ebp),%eax
8010446a: 53 push %ebx
8010446b: 8b 55 0c mov 0xc(%ebp),%edx
char *os;
os = s;
if(n <= 0)
8010446e: 85 c9 test %ecx,%ecx
80104470: 7e 26 jle 80104498 <safestrcpy+0x38>
80104472: 8d 74 0a ff lea -0x1(%edx,%ecx,1),%esi
80104476: 89 c1 mov %eax,%ecx
80104478: eb 17 jmp 80104491 <safestrcpy+0x31>
8010447a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
return os;
while(--n > 0 && (*s++ = *t++) != 0)
80104480: 83 c2 01 add $0x1,%edx
80104483: 0f b6 5a ff movzbl -0x1(%edx),%ebx
80104487: 83 c1 01 add $0x1,%ecx
8010448a: 84 db test %bl,%bl
8010448c: 88 59 ff mov %bl,-0x1(%ecx)
8010448f: 74 04 je 80104495 <safestrcpy+0x35>
80104491: 39 f2 cmp %esi,%edx
80104493: 75 eb jne 80104480 <safestrcpy+0x20>
;
*s = 0;
80104495: c6 01 00 movb $0x0,(%ecx)
return os;
}
80104498: 5b pop %ebx
80104499: 5e pop %esi
8010449a: 5d pop %ebp
8010449b: c3 ret
8010449c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801044a0 <strlen>:
int
strlen(const char *s)
{
801044a0: 55 push %ebp
int n;
for(n = 0; s[n]; n++)
801044a1: 31 c0 xor %eax,%eax
{
801044a3: 89 e5 mov %esp,%ebp
801044a5: 8b 55 08 mov 0x8(%ebp),%edx
for(n = 0; s[n]; n++)
801044a8: 80 3a 00 cmpb $0x0,(%edx)
801044ab: 74 0c je 801044b9 <strlen+0x19>
801044ad: 8d 76 00 lea 0x0(%esi),%esi
801044b0: 83 c0 01 add $0x1,%eax
801044b3: 80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
801044b7: 75 f7 jne 801044b0 <strlen+0x10>
;
return n;
}
801044b9: 5d pop %ebp
801044ba: c3 ret
801044bb <swtch>:
# Save current register context in old
# and then load register context from new.
.globl swtch
swtch:
movl 4(%esp), %eax
801044bb: 8b 44 24 04 mov 0x4(%esp),%eax
movl 8(%esp), %edx
801044bf: 8b 54 24 08 mov 0x8(%esp),%edx
# Save old callee-save registers
pushl %ebp
801044c3: 55 push %ebp
pushl %ebx
801044c4: 53 push %ebx
pushl %esi
801044c5: 56 push %esi
pushl %edi
801044c6: 57 push %edi
# Switch stacks
movl %esp, (%eax)
801044c7: 89 20 mov %esp,(%eax)
movl %edx, %esp
801044c9: 89 d4 mov %edx,%esp
# Load new callee-save registers
popl %edi
801044cb: 5f pop %edi
popl %esi
801044cc: 5e pop %esi
popl %ebx
801044cd: 5b pop %ebx
popl %ebp
801044ce: 5d pop %ebp
ret
801044cf: c3 ret
801044d0 <fetchint>:
// to a saved program counter, and then the first argument.
// Fetch the int at addr from the current process.
int
fetchint(uint addr, int *ip)
{
801044d0: 55 push %ebp
801044d1: 89 e5 mov %esp,%ebp
801044d3: 8b 45 08 mov 0x8(%ebp),%eax
// struct proc *curproc = myproc();
if(addr >= KERNBASE2 || addr+4 > KERNBASE2)
801044d6: 3d fb ff ff 7f cmp $0x7ffffffb,%eax
801044db: 77 0b ja 801044e8 <fetchint+0x18>
return -1;
*ip = *(int*)(addr);
801044dd: 8b 10 mov (%eax),%edx
801044df: 8b 45 0c mov 0xc(%ebp),%eax
801044e2: 89 10 mov %edx,(%eax)
return 0;
801044e4: 31 c0 xor %eax,%eax
}
801044e6: 5d pop %ebp
801044e7: c3 ret
return -1;
801044e8: b8 ff ff ff ff mov $0xffffffff,%eax
}
801044ed: 5d pop %ebp
801044ee: c3 ret
801044ef: 90 nop
801044f0 <fetchstr>:
// Fetch the nul-terminated string at addr from the current process.
// Doesn't actually copy the string - just sets *pp to point at it.
// Returns length of string, not including nul.
int
fetchstr(uint addr, char **pp)
{
801044f0: 55 push %ebp
801044f1: 89 e5 mov %esp,%ebp
801044f3: 8b 55 08 mov 0x8(%ebp),%edx
char *s, *ep;
// struct proc *curproc = myproc();
if(addr >= KERNBASE2)
801044f6: 81 fa fe ff ff 7f cmp $0x7ffffffe,%edx
801044fc: 77 21 ja 8010451f <fetchstr+0x2f>
return -1;
*pp = (char*)addr;
801044fe: 8b 4d 0c mov 0xc(%ebp),%ecx
80104501: 89 d0 mov %edx,%eax
80104503: 89 11 mov %edx,(%ecx)
ep = (char*)KERNBASE2; // changedit?????
for(s = *pp; s < ep; s++){
if(*s == 0)
80104505: 80 3a 00 cmpb $0x0,(%edx)
80104508: 75 0b jne 80104515 <fetchstr+0x25>
8010450a: eb 1c jmp 80104528 <fetchstr+0x38>
8010450c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104510: 80 38 00 cmpb $0x0,(%eax)
80104513: 74 13 je 80104528 <fetchstr+0x38>
for(s = *pp; s < ep; s++){
80104515: 83 c0 01 add $0x1,%eax
80104518: 3d ff ff ff 7f cmp $0x7fffffff,%eax
8010451d: 75 f1 jne 80104510 <fetchstr+0x20>
return -1;
8010451f: b8 ff ff ff ff mov $0xffffffff,%eax
return s - *pp;
}
return -1;
}
80104524: 5d pop %ebp
80104525: c3 ret
80104526: 66 90 xchg %ax,%ax
return s - *pp;
80104528: 29 d0 sub %edx,%eax
}
8010452a: 5d pop %ebp
8010452b: c3 ret
8010452c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104530 <argint>:
// Fetch the nth 32-bit system call argument.
int
argint(int n, int *ip)
{
80104530: 55 push %ebp
80104531: 89 e5 mov %esp,%ebp
80104533: 83 ec 08 sub $0x8,%esp
return fetchint((myproc()->tf->esp) + 4 + 4*n, ip);
80104536: e8 65 f1 ff ff call 801036a0 <myproc>
8010453b: 8b 55 08 mov 0x8(%ebp),%edx
8010453e: 8b 40 1c mov 0x1c(%eax),%eax
80104541: 8b 40 44 mov 0x44(%eax),%eax
80104544: 8d 44 90 04 lea 0x4(%eax,%edx,4),%eax
if(addr >= KERNBASE2 || addr+4 > KERNBASE2)
80104548: 3d fb ff ff 7f cmp $0x7ffffffb,%eax
8010454d: 77 11 ja 80104560 <argint+0x30>
*ip = *(int*)(addr);
8010454f: 8b 10 mov (%eax),%edx
80104551: 8b 45 0c mov 0xc(%ebp),%eax
80104554: 89 10 mov %edx,(%eax)
return 0;
80104556: 31 c0 xor %eax,%eax
}
80104558: c9 leave
80104559: c3 ret
8010455a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
return -1;
80104560: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104565: c9 leave
80104566: c3 ret
80104567: 89 f6 mov %esi,%esi
80104569: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80104570 <argptr>:
// Fetch the nth word-sized system call argument as a pointer
// to a block of memory of size bytes. Check that the pointer
// lies within the process address space.
int
argptr(int n, char **pp, int size)
{
80104570: 55 push %ebp
80104571: 89 e5 mov %esp,%ebp
80104573: 53 push %ebx
80104574: 83 ec 24 sub $0x24,%esp
80104577: 8b 5d 10 mov 0x10(%ebp),%ebx
int i;
// struct proc *curproc = myproc();
if(argint(n, &i) < 0)
8010457a: 8d 45 f4 lea -0xc(%ebp),%eax
8010457d: 89 44 24 04 mov %eax,0x4(%esp)
80104581: 8b 45 08 mov 0x8(%ebp),%eax
80104584: 89 04 24 mov %eax,(%esp)
80104587: e8 a4 ff ff ff call 80104530 <argint>
8010458c: 85 c0 test %eax,%eax
8010458e: 78 20 js 801045b0 <argptr+0x40>
return -1;
if(size < 0 || (uint)i >= KERNBASE2 || (uint)i+size > KERNBASE2)
80104590: 85 db test %ebx,%ebx
80104592: 78 1c js 801045b0 <argptr+0x40>
80104594: 8b 45 f4 mov -0xc(%ebp),%eax
80104597: 3d fe ff ff 7f cmp $0x7ffffffe,%eax
8010459c: 77 12 ja 801045b0 <argptr+0x40>
8010459e: 01 c3 add %eax,%ebx
801045a0: 78 0e js 801045b0 <argptr+0x40>
return -1;
*pp = (char*)i;
801045a2: 8b 55 0c mov 0xc(%ebp),%edx
801045a5: 89 02 mov %eax,(%edx)
return 0;
801045a7: 31 c0 xor %eax,%eax
}
801045a9: 83 c4 24 add $0x24,%esp
801045ac: 5b pop %ebx
801045ad: 5d pop %ebp
801045ae: c3 ret
801045af: 90 nop
return -1;
801045b0: b8 ff ff ff ff mov $0xffffffff,%eax
801045b5: eb f2 jmp 801045a9 <argptr+0x39>
801045b7: 89 f6 mov %esi,%esi
801045b9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801045c0 <argstr>:
// Check that the pointer is valid and the string is nul-terminated.
// (There is no shared writable memory, so the string can't change
// between this check and being used by the kernel.)
int
argstr(int n, char **pp)
{
801045c0: 55 push %ebp
801045c1: 89 e5 mov %esp,%ebp
801045c3: 83 ec 28 sub $0x28,%esp
int addr;
if(argint(n, &addr) < 0)
801045c6: 8d 45 f4 lea -0xc(%ebp),%eax
801045c9: 89 44 24 04 mov %eax,0x4(%esp)
801045cd: 8b 45 08 mov 0x8(%ebp),%eax
801045d0: 89 04 24 mov %eax,(%esp)
801045d3: e8 58 ff ff ff call 80104530 <argint>
801045d8: 85 c0 test %eax,%eax
801045da: 78 2b js 80104607 <argstr+0x47>
return -1;
return fetchstr(addr, pp);
801045dc: 8b 55 f4 mov -0xc(%ebp),%edx
if(addr >= KERNBASE2)
801045df: 81 fa fe ff ff 7f cmp $0x7ffffffe,%edx
801045e5: 77 20 ja 80104607 <argstr+0x47>
*pp = (char*)addr;
801045e7: 8b 4d 0c mov 0xc(%ebp),%ecx
801045ea: 89 d0 mov %edx,%eax
801045ec: 89 11 mov %edx,(%ecx)
if(*s == 0)
801045ee: 80 3a 00 cmpb $0x0,(%edx)
801045f1: 75 0a jne 801045fd <argstr+0x3d>
801045f3: eb 1b jmp 80104610 <argstr+0x50>
801045f5: 8d 76 00 lea 0x0(%esi),%esi
801045f8: 80 38 00 cmpb $0x0,(%eax)
801045fb: 74 13 je 80104610 <argstr+0x50>
for(s = *pp; s < ep; s++){
801045fd: 83 c0 01 add $0x1,%eax
80104600: 3d fe ff ff 7f cmp $0x7ffffffe,%eax
80104605: 76 f1 jbe 801045f8 <argstr+0x38>
return -1;
80104607: b8 ff ff ff ff mov $0xffffffff,%eax
}
8010460c: c9 leave
8010460d: c3 ret
8010460e: 66 90 xchg %ax,%ax
return s - *pp;
80104610: 29 d0 sub %edx,%eax
}
80104612: c9 leave
80104613: c3 ret
80104614: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
8010461a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
80104620 <syscall>:
[SYS_shm_close] sys_shm_close
};
void
syscall(void)
{
80104620: 55 push %ebp
80104621: 89 e5 mov %esp,%ebp
80104623: 56 push %esi
80104624: 53 push %ebx
80104625: 83 ec 10 sub $0x10,%esp
int num;
struct proc *curproc = myproc();
80104628: e8 73 f0 ff ff call 801036a0 <myproc>
num = curproc->tf->eax;
8010462d: 8b 70 1c mov 0x1c(%eax),%esi
struct proc *curproc = myproc();
80104630: 89 c3 mov %eax,%ebx
num = curproc->tf->eax;
80104632: 8b 46 1c mov 0x1c(%esi),%eax
if(num > 0 && num < NELEM(syscalls) && syscalls[num]) {
80104635: 8d 50 ff lea -0x1(%eax),%edx
80104638: 83 fa 16 cmp $0x16,%edx
8010463b: 77 1b ja 80104658 <syscall+0x38>
8010463d: 8b 14 85 60 75 10 80 mov -0x7fef8aa0(,%eax,4),%edx
80104644: 85 d2 test %edx,%edx
80104646: 74 10 je 80104658 <syscall+0x38>
curproc->tf->eax = syscalls[num]();
80104648: ff d2 call *%edx
8010464a: 89 46 1c mov %eax,0x1c(%esi)
} else {
cprintf("%d %s: unknown sys call %d\n",
curproc->pid, curproc->name, num);
curproc->tf->eax = -1;
}
}
8010464d: 83 c4 10 add $0x10,%esp
80104650: 5b pop %ebx
80104651: 5e pop %esi
80104652: 5d pop %ebp
80104653: c3 ret
80104654: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
cprintf("%d %s: unknown sys call %d\n",
80104658: 89 44 24 0c mov %eax,0xc(%esp)
curproc->pid, curproc->name, num);
8010465c: 8d 43 70 lea 0x70(%ebx),%eax
8010465f: 89 44 24 08 mov %eax,0x8(%esp)
cprintf("%d %s: unknown sys call %d\n",
80104663: 8b 43 14 mov 0x14(%ebx),%eax
80104666: c7 04 24 31 75 10 80 movl $0x80107531,(%esp)
8010466d: 89 44 24 04 mov %eax,0x4(%esp)
80104671: e8 da bf ff ff call 80100650 <cprintf>
curproc->tf->eax = -1;
80104676: 8b 43 1c mov 0x1c(%ebx),%eax
80104679: c7 40 1c ff ff ff ff movl $0xffffffff,0x1c(%eax)
}
80104680: 83 c4 10 add $0x10,%esp
80104683: 5b pop %ebx
80104684: 5e pop %esi
80104685: 5d pop %ebp
80104686: c3 ret
80104687: 66 90 xchg %ax,%ax
80104689: 66 90 xchg %ax,%ax
8010468b: 66 90 xchg %ax,%ax
8010468d: 66 90 xchg %ax,%ax
8010468f: 90 nop
80104690 <fdalloc>:
// Allocate a file descriptor for the given file.
// Takes over file reference from caller on success.
static int
fdalloc(struct file *f)
{
80104690: 55 push %ebp
80104691: 89 e5 mov %esp,%ebp
80104693: 53 push %ebx
80104694: 89 c3 mov %eax,%ebx
80104696: 83 ec 04 sub $0x4,%esp
int fd;
struct proc *curproc = myproc();
80104699: e8 02 f0 ff ff call 801036a0 <myproc>
for(fd = 0; fd < NOFILE; fd++){
8010469e: 31 d2 xor %edx,%edx
if(curproc->ofile[fd] == 0){
801046a0: 8b 4c 90 2c mov 0x2c(%eax,%edx,4),%ecx
801046a4: 85 c9 test %ecx,%ecx
801046a6: 74 18 je 801046c0 <fdalloc+0x30>
for(fd = 0; fd < NOFILE; fd++){
801046a8: 83 c2 01 add $0x1,%edx
801046ab: 83 fa 10 cmp $0x10,%edx
801046ae: 75 f0 jne 801046a0 <fdalloc+0x10>
curproc->ofile[fd] = f;
return fd;
}
}
return -1;
}
801046b0: 83 c4 04 add $0x4,%esp
return -1;
801046b3: b8 ff ff ff ff mov $0xffffffff,%eax
}
801046b8: 5b pop %ebx
801046b9: 5d pop %ebp
801046ba: c3 ret
801046bb: 90 nop
801046bc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
curproc->ofile[fd] = f;
801046c0: 89 5c 90 2c mov %ebx,0x2c(%eax,%edx,4)
}
801046c4: 83 c4 04 add $0x4,%esp
return fd;
801046c7: 89 d0 mov %edx,%eax
}
801046c9: 5b pop %ebx
801046ca: 5d pop %ebp
801046cb: c3 ret
801046cc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801046d0 <create>:
return -1;
}
static struct inode*
create(char *path, short type, short major, short minor)
{
801046d0: 55 push %ebp
801046d1: 89 e5 mov %esp,%ebp
801046d3: 57 push %edi
801046d4: 56 push %esi
801046d5: 53 push %ebx
801046d6: 83 ec 4c sub $0x4c,%esp
801046d9: 89 4d c0 mov %ecx,-0x40(%ebp)
801046dc: 8b 4d 08 mov 0x8(%ebp),%ecx
uint off;
struct inode *ip, *dp;
char name[DIRSIZ];
if((dp = nameiparent(path, name)) == 0)
801046df: 8d 5d da lea -0x26(%ebp),%ebx
801046e2: 89 5c 24 04 mov %ebx,0x4(%esp)
801046e6: 89 04 24 mov %eax,(%esp)
{
801046e9: 89 55 c4 mov %edx,-0x3c(%ebp)
801046ec: 89 4d bc mov %ecx,-0x44(%ebp)
if((dp = nameiparent(path, name)) == 0)
801046ef: e8 2c d8 ff ff call 80101f20 <nameiparent>
801046f4: 85 c0 test %eax,%eax
801046f6: 89 c7 mov %eax,%edi
801046f8: 0f 84 da 00 00 00 je 801047d8 <create+0x108>
return 0;
ilock(dp);
801046fe: 89 04 24 mov %eax,(%esp)
80104701: e8 aa cf ff ff call 801016b0 <ilock>
if((ip = dirlookup(dp, name, &off)) != 0){
80104706: 8d 45 d4 lea -0x2c(%ebp),%eax
80104709: 89 44 24 08 mov %eax,0x8(%esp)
8010470d: 89 5c 24 04 mov %ebx,0x4(%esp)
80104711: 89 3c 24 mov %edi,(%esp)
80104714: e8 a7 d4 ff ff call 80101bc0 <dirlookup>
80104719: 85 c0 test %eax,%eax
8010471b: 89 c6 mov %eax,%esi
8010471d: 74 41 je 80104760 <create+0x90>
iunlockput(dp);
8010471f: 89 3c 24 mov %edi,(%esp)
80104722: e8 e9 d1 ff ff call 80101910 <iunlockput>
ilock(ip);
80104727: 89 34 24 mov %esi,(%esp)
8010472a: e8 81 cf ff ff call 801016b0 <ilock>
if(type == T_FILE && ip->type == T_FILE)
8010472f: 66 83 7d c4 02 cmpw $0x2,-0x3c(%ebp)
80104734: 75 12 jne 80104748 <create+0x78>
80104736: 66 83 7e 50 02 cmpw $0x2,0x50(%esi)
8010473b: 89 f0 mov %esi,%eax
8010473d: 75 09 jne 80104748 <create+0x78>
panic("create: dirlink");
iunlockput(dp);
return ip;
}
8010473f: 83 c4 4c add $0x4c,%esp
80104742: 5b pop %ebx
80104743: 5e pop %esi
80104744: 5f pop %edi
80104745: 5d pop %ebp
80104746: c3 ret
80104747: 90 nop
iunlockput(ip);
80104748: 89 34 24 mov %esi,(%esp)
8010474b: e8 c0 d1 ff ff call 80101910 <iunlockput>
}
80104750: 83 c4 4c add $0x4c,%esp
return 0;
80104753: 31 c0 xor %eax,%eax
}
80104755: 5b pop %ebx
80104756: 5e pop %esi
80104757: 5f pop %edi
80104758: 5d pop %ebp
80104759: c3 ret
8010475a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if((ip = ialloc(dp->dev, type)) == 0)
80104760: 0f bf 45 c4 movswl -0x3c(%ebp),%eax
80104764: 89 44 24 04 mov %eax,0x4(%esp)
80104768: 8b 07 mov (%edi),%eax
8010476a: 89 04 24 mov %eax,(%esp)
8010476d: e8 ae cd ff ff call 80101520 <ialloc>
80104772: 85 c0 test %eax,%eax
80104774: 89 c6 mov %eax,%esi
80104776: 0f 84 bf 00 00 00 je 8010483b <create+0x16b>
ilock(ip);
8010477c: 89 04 24 mov %eax,(%esp)
8010477f: e8 2c cf ff ff call 801016b0 <ilock>
ip->major = major;
80104784: 0f b7 45 c0 movzwl -0x40(%ebp),%eax
80104788: 66 89 46 52 mov %ax,0x52(%esi)
ip->minor = minor;
8010478c: 0f b7 45 bc movzwl -0x44(%ebp),%eax
80104790: 66 89 46 54 mov %ax,0x54(%esi)
ip->nlink = 1;
80104794: b8 01 00 00 00 mov $0x1,%eax
80104799: 66 89 46 56 mov %ax,0x56(%esi)
iupdate(ip);
8010479d: 89 34 24 mov %esi,(%esp)
801047a0: e8 4b ce ff ff call 801015f0 <iupdate>
if(type == T_DIR){ // Create . and .. entries.
801047a5: 66 83 7d c4 01 cmpw $0x1,-0x3c(%ebp)
801047aa: 74 34 je 801047e0 <create+0x110>
if(dirlink(dp, name, ip->inum) < 0)
801047ac: 8b 46 04 mov 0x4(%esi),%eax
801047af: 89 5c 24 04 mov %ebx,0x4(%esp)
801047b3: 89 3c 24 mov %edi,(%esp)
801047b6: 89 44 24 08 mov %eax,0x8(%esp)
801047ba: e8 61 d6 ff ff call 80101e20 <dirlink>
801047bf: 85 c0 test %eax,%eax
801047c1: 78 6c js 8010482f <create+0x15f>
iunlockput(dp);
801047c3: 89 3c 24 mov %edi,(%esp)
801047c6: e8 45 d1 ff ff call 80101910 <iunlockput>
}
801047cb: 83 c4 4c add $0x4c,%esp
return ip;
801047ce: 89 f0 mov %esi,%eax
}
801047d0: 5b pop %ebx
801047d1: 5e pop %esi
801047d2: 5f pop %edi
801047d3: 5d pop %ebp
801047d4: c3 ret
801047d5: 8d 76 00 lea 0x0(%esi),%esi
return 0;
801047d8: 31 c0 xor %eax,%eax
801047da: e9 60 ff ff ff jmp 8010473f <create+0x6f>
801047df: 90 nop
dp->nlink++; // for ".."
801047e0: 66 83 47 56 01 addw $0x1,0x56(%edi)
iupdate(dp);
801047e5: 89 3c 24 mov %edi,(%esp)
801047e8: e8 03 ce ff ff call 801015f0 <iupdate>
if(dirlink(ip, ".", ip->inum) < 0 || dirlink(ip, "..", dp->inum) < 0)
801047ed: 8b 46 04 mov 0x4(%esi),%eax
801047f0: c7 44 24 04 dc 75 10 movl $0x801075dc,0x4(%esp)
801047f7: 80
801047f8: 89 34 24 mov %esi,(%esp)
801047fb: 89 44 24 08 mov %eax,0x8(%esp)
801047ff: e8 1c d6 ff ff call 80101e20 <dirlink>
80104804: 85 c0 test %eax,%eax
80104806: 78 1b js 80104823 <create+0x153>
80104808: 8b 47 04 mov 0x4(%edi),%eax
8010480b: c7 44 24 04 db 75 10 movl $0x801075db,0x4(%esp)
80104812: 80
80104813: 89 34 24 mov %esi,(%esp)
80104816: 89 44 24 08 mov %eax,0x8(%esp)
8010481a: e8 01 d6 ff ff call 80101e20 <dirlink>
8010481f: 85 c0 test %eax,%eax
80104821: 79 89 jns 801047ac <create+0xdc>
panic("create dots");
80104823: c7 04 24 cf 75 10 80 movl $0x801075cf,(%esp)
8010482a: e8 31 bb ff ff call 80100360 <panic>
panic("create: dirlink");
8010482f: c7 04 24 de 75 10 80 movl $0x801075de,(%esp)
80104836: e8 25 bb ff ff call 80100360 <panic>
panic("create: ialloc");
8010483b: c7 04 24 c0 75 10 80 movl $0x801075c0,(%esp)
80104842: e8 19 bb ff ff call 80100360 <panic>
80104847: 89 f6 mov %esi,%esi
80104849: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80104850 <argfd.constprop.0>:
argfd(int n, int *pfd, struct file **pf)
80104850: 55 push %ebp
80104851: 89 e5 mov %esp,%ebp
80104853: 56 push %esi
80104854: 89 c6 mov %eax,%esi
80104856: 53 push %ebx
80104857: 89 d3 mov %edx,%ebx
80104859: 83 ec 20 sub $0x20,%esp
if(argint(n, &fd) < 0)
8010485c: 8d 45 f4 lea -0xc(%ebp),%eax
8010485f: 89 44 24 04 mov %eax,0x4(%esp)
80104863: c7 04 24 00 00 00 00 movl $0x0,(%esp)
8010486a: e8 c1 fc ff ff call 80104530 <argint>
8010486f: 85 c0 test %eax,%eax
80104871: 78 2d js 801048a0 <argfd.constprop.0+0x50>
if(fd < 0 || fd >= NOFILE || (f=myproc()->ofile[fd]) == 0)
80104873: 83 7d f4 0f cmpl $0xf,-0xc(%ebp)
80104877: 77 27 ja 801048a0 <argfd.constprop.0+0x50>
80104879: e8 22 ee ff ff call 801036a0 <myproc>
8010487e: 8b 55 f4 mov -0xc(%ebp),%edx
80104881: 8b 44 90 2c mov 0x2c(%eax,%edx,4),%eax
80104885: 85 c0 test %eax,%eax
80104887: 74 17 je 801048a0 <argfd.constprop.0+0x50>
if(pfd)
80104889: 85 f6 test %esi,%esi
8010488b: 74 02 je 8010488f <argfd.constprop.0+0x3f>
*pfd = fd;
8010488d: 89 16 mov %edx,(%esi)
if(pf)
8010488f: 85 db test %ebx,%ebx
80104891: 74 1d je 801048b0 <argfd.constprop.0+0x60>
*pf = f;
80104893: 89 03 mov %eax,(%ebx)
return 0;
80104895: 31 c0 xor %eax,%eax
}
80104897: 83 c4 20 add $0x20,%esp
8010489a: 5b pop %ebx
8010489b: 5e pop %esi
8010489c: 5d pop %ebp
8010489d: c3 ret
8010489e: 66 90 xchg %ax,%ax
801048a0: 83 c4 20 add $0x20,%esp
return -1;
801048a3: b8 ff ff ff ff mov $0xffffffff,%eax
}
801048a8: 5b pop %ebx
801048a9: 5e pop %esi
801048aa: 5d pop %ebp
801048ab: c3 ret
801048ac: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return 0;
801048b0: 31 c0 xor %eax,%eax
801048b2: eb e3 jmp 80104897 <argfd.constprop.0+0x47>
801048b4: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801048ba: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
801048c0 <sys_dup>:
{
801048c0: 55 push %ebp
if(argfd(0, 0, &f) < 0)
801048c1: 31 c0 xor %eax,%eax
{
801048c3: 89 e5 mov %esp,%ebp
801048c5: 53 push %ebx
801048c6: 83 ec 24 sub $0x24,%esp
if(argfd(0, 0, &f) < 0)
801048c9: 8d 55 f4 lea -0xc(%ebp),%edx
801048cc: e8 7f ff ff ff call 80104850 <argfd.constprop.0>
801048d1: 85 c0 test %eax,%eax
801048d3: 78 23 js 801048f8 <sys_dup+0x38>
if((fd=fdalloc(f)) < 0)
801048d5: 8b 45 f4 mov -0xc(%ebp),%eax
801048d8: e8 b3 fd ff ff call 80104690 <fdalloc>
801048dd: 85 c0 test %eax,%eax
801048df: 89 c3 mov %eax,%ebx
801048e1: 78 15 js 801048f8 <sys_dup+0x38>
filedup(f);
801048e3: 8b 45 f4 mov -0xc(%ebp),%eax
801048e6: 89 04 24 mov %eax,(%esp)
801048e9: e8 e2 c4 ff ff call 80100dd0 <filedup>
return fd;
801048ee: 89 d8 mov %ebx,%eax
}
801048f0: 83 c4 24 add $0x24,%esp
801048f3: 5b pop %ebx
801048f4: 5d pop %ebp
801048f5: c3 ret
801048f6: 66 90 xchg %ax,%ax
return -1;
801048f8: b8 ff ff ff ff mov $0xffffffff,%eax
801048fd: eb f1 jmp 801048f0 <sys_dup+0x30>
801048ff: 90 nop
80104900 <sys_read>:
{
80104900: 55 push %ebp
if(argfd(0, 0, &f) < 0 || argint(2, &n) < 0 || argptr(1, &p, n) < 0)
80104901: 31 c0 xor %eax,%eax
{
80104903: 89 e5 mov %esp,%ebp
80104905: 83 ec 28 sub $0x28,%esp
if(argfd(0, 0, &f) < 0 || argint(2, &n) < 0 || argptr(1, &p, n) < 0)
80104908: 8d 55 ec lea -0x14(%ebp),%edx
8010490b: e8 40 ff ff ff call 80104850 <argfd.constprop.0>
80104910: 85 c0 test %eax,%eax
80104912: 78 54 js 80104968 <sys_read+0x68>
80104914: 8d 45 f0 lea -0x10(%ebp),%eax
80104917: 89 44 24 04 mov %eax,0x4(%esp)
8010491b: c7 04 24 02 00 00 00 movl $0x2,(%esp)
80104922: e8 09 fc ff ff call 80104530 <argint>
80104927: 85 c0 test %eax,%eax
80104929: 78 3d js 80104968 <sys_read+0x68>
8010492b: 8b 45 f0 mov -0x10(%ebp),%eax
8010492e: c7 04 24 01 00 00 00 movl $0x1,(%esp)
80104935: 89 44 24 08 mov %eax,0x8(%esp)
80104939: 8d 45 f4 lea -0xc(%ebp),%eax
8010493c: 89 44 24 04 mov %eax,0x4(%esp)
80104940: e8 2b fc ff ff call 80104570 <argptr>
80104945: 85 c0 test %eax,%eax
80104947: 78 1f js 80104968 <sys_read+0x68>
return fileread(f, p, n);
80104949: 8b 45 f0 mov -0x10(%ebp),%eax
8010494c: 89 44 24 08 mov %eax,0x8(%esp)
80104950: 8b 45 f4 mov -0xc(%ebp),%eax
80104953: 89 44 24 04 mov %eax,0x4(%esp)
80104957: 8b 45 ec mov -0x14(%ebp),%eax
8010495a: 89 04 24 mov %eax,(%esp)
8010495d: e8 ce c5 ff ff call 80100f30 <fileread>
}
80104962: c9 leave
80104963: c3 ret
80104964: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
80104968: b8 ff ff ff ff mov $0xffffffff,%eax
}
8010496d: c9 leave
8010496e: c3 ret
8010496f: 90 nop
80104970 <sys_write>:
{
80104970: 55 push %ebp
if(argfd(0, 0, &f) < 0 || argint(2, &n) < 0 || argptr(1, &p, n) < 0)
80104971: 31 c0 xor %eax,%eax
{
80104973: 89 e5 mov %esp,%ebp
80104975: 83 ec 28 sub $0x28,%esp
if(argfd(0, 0, &f) < 0 || argint(2, &n) < 0 || argptr(1, &p, n) < 0)
80104978: 8d 55 ec lea -0x14(%ebp),%edx
8010497b: e8 d0 fe ff ff call 80104850 <argfd.constprop.0>
80104980: 85 c0 test %eax,%eax
80104982: 78 54 js 801049d8 <sys_write+0x68>
80104984: 8d 45 f0 lea -0x10(%ebp),%eax
80104987: 89 44 24 04 mov %eax,0x4(%esp)
8010498b: c7 04 24 02 00 00 00 movl $0x2,(%esp)
80104992: e8 99 fb ff ff call 80104530 <argint>
80104997: 85 c0 test %eax,%eax
80104999: 78 3d js 801049d8 <sys_write+0x68>
8010499b: 8b 45 f0 mov -0x10(%ebp),%eax
8010499e: c7 04 24 01 00 00 00 movl $0x1,(%esp)
801049a5: 89 44 24 08 mov %eax,0x8(%esp)
801049a9: 8d 45 f4 lea -0xc(%ebp),%eax
801049ac: 89 44 24 04 mov %eax,0x4(%esp)
801049b0: e8 bb fb ff ff call 80104570 <argptr>
801049b5: 85 c0 test %eax,%eax
801049b7: 78 1f js 801049d8 <sys_write+0x68>
return filewrite(f, p, n);
801049b9: 8b 45 f0 mov -0x10(%ebp),%eax
801049bc: 89 44 24 08 mov %eax,0x8(%esp)
801049c0: 8b 45 f4 mov -0xc(%ebp),%eax
801049c3: 89 44 24 04 mov %eax,0x4(%esp)
801049c7: 8b 45 ec mov -0x14(%ebp),%eax
801049ca: 89 04 24 mov %eax,(%esp)
801049cd: e8 fe c5 ff ff call 80100fd0 <filewrite>
}
801049d2: c9 leave
801049d3: c3 ret
801049d4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
801049d8: b8 ff ff ff ff mov $0xffffffff,%eax
}
801049dd: c9 leave
801049de: c3 ret
801049df: 90 nop
801049e0 <sys_close>:
{
801049e0: 55 push %ebp
801049e1: 89 e5 mov %esp,%ebp
801049e3: 83 ec 28 sub $0x28,%esp
if(argfd(0, &fd, &f) < 0)
801049e6: 8d 55 f4 lea -0xc(%ebp),%edx
801049e9: 8d 45 f0 lea -0x10(%ebp),%eax
801049ec: e8 5f fe ff ff call 80104850 <argfd.constprop.0>
801049f1: 85 c0 test %eax,%eax
801049f3: 78 23 js 80104a18 <sys_close+0x38>
myproc()->ofile[fd] = 0;
801049f5: e8 a6 ec ff ff call 801036a0 <myproc>
801049fa: 8b 55 f0 mov -0x10(%ebp),%edx
801049fd: c7 44 90 2c 00 00 00 movl $0x0,0x2c(%eax,%edx,4)
80104a04: 00
fileclose(f);
80104a05: 8b 45 f4 mov -0xc(%ebp),%eax
80104a08: 89 04 24 mov %eax,(%esp)
80104a0b: e8 10 c4 ff ff call 80100e20 <fileclose>
return 0;
80104a10: 31 c0 xor %eax,%eax
}
80104a12: c9 leave
80104a13: c3 ret
80104a14: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
80104a18: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104a1d: c9 leave
80104a1e: c3 ret
80104a1f: 90 nop
80104a20 <sys_fstat>:
{
80104a20: 55 push %ebp
if(argfd(0, 0, &f) < 0 || argptr(1, (void*)&st, sizeof(*st)) < 0)
80104a21: 31 c0 xor %eax,%eax
{
80104a23: 89 e5 mov %esp,%ebp
80104a25: 83 ec 28 sub $0x28,%esp
if(argfd(0, 0, &f) < 0 || argptr(1, (void*)&st, sizeof(*st)) < 0)
80104a28: 8d 55 f0 lea -0x10(%ebp),%edx
80104a2b: e8 20 fe ff ff call 80104850 <argfd.constprop.0>
80104a30: 85 c0 test %eax,%eax
80104a32: 78 34 js 80104a68 <sys_fstat+0x48>
80104a34: 8d 45 f4 lea -0xc(%ebp),%eax
80104a37: c7 44 24 08 14 00 00 movl $0x14,0x8(%esp)
80104a3e: 00
80104a3f: 89 44 24 04 mov %eax,0x4(%esp)
80104a43: c7 04 24 01 00 00 00 movl $0x1,(%esp)
80104a4a: e8 21 fb ff ff call 80104570 <argptr>
80104a4f: 85 c0 test %eax,%eax
80104a51: 78 15 js 80104a68 <sys_fstat+0x48>
return filestat(f, st);
80104a53: 8b 45 f4 mov -0xc(%ebp),%eax
80104a56: 89 44 24 04 mov %eax,0x4(%esp)
80104a5a: 8b 45 f0 mov -0x10(%ebp),%eax
80104a5d: 89 04 24 mov %eax,(%esp)
80104a60: e8 7b c4 ff ff call 80100ee0 <filestat>
}
80104a65: c9 leave
80104a66: c3 ret
80104a67: 90 nop
return -1;
80104a68: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104a6d: c9 leave
80104a6e: c3 ret
80104a6f: 90 nop
80104a70 <sys_link>:
{
80104a70: 55 push %ebp
80104a71: 89 e5 mov %esp,%ebp
80104a73: 57 push %edi
80104a74: 56 push %esi
80104a75: 53 push %ebx
80104a76: 83 ec 3c sub $0x3c,%esp
if(argstr(0, &old) < 0 || argstr(1, &new) < 0)
80104a79: 8d 45 d4 lea -0x2c(%ebp),%eax
80104a7c: 89 44 24 04 mov %eax,0x4(%esp)
80104a80: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104a87: e8 34 fb ff ff call 801045c0 <argstr>
80104a8c: 85 c0 test %eax,%eax
80104a8e: 0f 88 e6 00 00 00 js 80104b7a <sys_link+0x10a>
80104a94: 8d 45 d0 lea -0x30(%ebp),%eax
80104a97: 89 44 24 04 mov %eax,0x4(%esp)
80104a9b: c7 04 24 01 00 00 00 movl $0x1,(%esp)
80104aa2: e8 19 fb ff ff call 801045c0 <argstr>
80104aa7: 85 c0 test %eax,%eax
80104aa9: 0f 88 cb 00 00 00 js 80104b7a <sys_link+0x10a>
begin_op();
80104aaf: e8 5c e0 ff ff call 80102b10 <begin_op>
if((ip = namei(old)) == 0){
80104ab4: 8b 45 d4 mov -0x2c(%ebp),%eax
80104ab7: 89 04 24 mov %eax,(%esp)
80104aba: e8 41 d4 ff ff call 80101f00 <namei>
80104abf: 85 c0 test %eax,%eax
80104ac1: 89 c3 mov %eax,%ebx
80104ac3: 0f 84 ac 00 00 00 je 80104b75 <sys_link+0x105>
ilock(ip);
80104ac9: 89 04 24 mov %eax,(%esp)
80104acc: e8 df cb ff ff call 801016b0 <ilock>
if(ip->type == T_DIR){
80104ad1: 66 83 7b 50 01 cmpw $0x1,0x50(%ebx)
80104ad6: 0f 84 91 00 00 00 je 80104b6d <sys_link+0xfd>
ip->nlink++;
80104adc: 66 83 43 56 01 addw $0x1,0x56(%ebx)
if((dp = nameiparent(new, name)) == 0)
80104ae1: 8d 7d da lea -0x26(%ebp),%edi
iupdate(ip);
80104ae4: 89 1c 24 mov %ebx,(%esp)
80104ae7: e8 04 cb ff ff call 801015f0 <iupdate>
iunlock(ip);
80104aec: 89 1c 24 mov %ebx,(%esp)
80104aef: e8 9c cc ff ff call 80101790 <iunlock>
if((dp = nameiparent(new, name)) == 0)
80104af4: 8b 45 d0 mov -0x30(%ebp),%eax
80104af7: 89 7c 24 04 mov %edi,0x4(%esp)
80104afb: 89 04 24 mov %eax,(%esp)
80104afe: e8 1d d4 ff ff call 80101f20 <nameiparent>
80104b03: 85 c0 test %eax,%eax
80104b05: 89 c6 mov %eax,%esi
80104b07: 74 4f je 80104b58 <sys_link+0xe8>
ilock(dp);
80104b09: 89 04 24 mov %eax,(%esp)
80104b0c: e8 9f cb ff ff call 801016b0 <ilock>
if(dp->dev != ip->dev || dirlink(dp, name, ip->inum) < 0){
80104b11: 8b 03 mov (%ebx),%eax
80104b13: 39 06 cmp %eax,(%esi)
80104b15: 75 39 jne 80104b50 <sys_link+0xe0>
80104b17: 8b 43 04 mov 0x4(%ebx),%eax
80104b1a: 89 7c 24 04 mov %edi,0x4(%esp)
80104b1e: 89 34 24 mov %esi,(%esp)
80104b21: 89 44 24 08 mov %eax,0x8(%esp)
80104b25: e8 f6 d2 ff ff call 80101e20 <dirlink>
80104b2a: 85 c0 test %eax,%eax
80104b2c: 78 22 js 80104b50 <sys_link+0xe0>
iunlockput(dp);
80104b2e: 89 34 24 mov %esi,(%esp)
80104b31: e8 da cd ff ff call 80101910 <iunlockput>
iput(ip);
80104b36: 89 1c 24 mov %ebx,(%esp)
80104b39: e8 92 cc ff ff call 801017d0 <iput>
end_op();
80104b3e: e8 3d e0 ff ff call 80102b80 <end_op>
}
80104b43: 83 c4 3c add $0x3c,%esp
return 0;
80104b46: 31 c0 xor %eax,%eax
}
80104b48: 5b pop %ebx
80104b49: 5e pop %esi
80104b4a: 5f pop %edi
80104b4b: 5d pop %ebp
80104b4c: c3 ret
80104b4d: 8d 76 00 lea 0x0(%esi),%esi
iunlockput(dp);
80104b50: 89 34 24 mov %esi,(%esp)
80104b53: e8 b8 cd ff ff call 80101910 <iunlockput>
ilock(ip);
80104b58: 89 1c 24 mov %ebx,(%esp)
80104b5b: e8 50 cb ff ff call 801016b0 <ilock>
ip->nlink--;
80104b60: 66 83 6b 56 01 subw $0x1,0x56(%ebx)
iupdate(ip);
80104b65: 89 1c 24 mov %ebx,(%esp)
80104b68: e8 83 ca ff ff call 801015f0 <iupdate>
iunlockput(ip);
80104b6d: 89 1c 24 mov %ebx,(%esp)
80104b70: e8 9b cd ff ff call 80101910 <iunlockput>
end_op();
80104b75: e8 06 e0 ff ff call 80102b80 <end_op>
}
80104b7a: 83 c4 3c add $0x3c,%esp
return -1;
80104b7d: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104b82: 5b pop %ebx
80104b83: 5e pop %esi
80104b84: 5f pop %edi
80104b85: 5d pop %ebp
80104b86: c3 ret
80104b87: 89 f6 mov %esi,%esi
80104b89: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80104b90 <sys_unlink>:
{
80104b90: 55 push %ebp
80104b91: 89 e5 mov %esp,%ebp
80104b93: 57 push %edi
80104b94: 56 push %esi
80104b95: 53 push %ebx
80104b96: 83 ec 5c sub $0x5c,%esp
if(argstr(0, &path) < 0)
80104b99: 8d 45 c0 lea -0x40(%ebp),%eax
80104b9c: 89 44 24 04 mov %eax,0x4(%esp)
80104ba0: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104ba7: e8 14 fa ff ff call 801045c0 <argstr>
80104bac: 85 c0 test %eax,%eax
80104bae: 0f 88 76 01 00 00 js 80104d2a <sys_unlink+0x19a>
begin_op();
80104bb4: e8 57 df ff ff call 80102b10 <begin_op>
if((dp = nameiparent(path, name)) == 0){
80104bb9: 8b 45 c0 mov -0x40(%ebp),%eax
80104bbc: 8d 5d ca lea -0x36(%ebp),%ebx
80104bbf: 89 5c 24 04 mov %ebx,0x4(%esp)
80104bc3: 89 04 24 mov %eax,(%esp)
80104bc6: e8 55 d3 ff ff call 80101f20 <nameiparent>
80104bcb: 85 c0 test %eax,%eax
80104bcd: 89 45 b4 mov %eax,-0x4c(%ebp)
80104bd0: 0f 84 4f 01 00 00 je 80104d25 <sys_unlink+0x195>
ilock(dp);
80104bd6: 8b 75 b4 mov -0x4c(%ebp),%esi
80104bd9: 89 34 24 mov %esi,(%esp)
80104bdc: e8 cf ca ff ff call 801016b0 <ilock>
if(namecmp(name, ".") == 0 || namecmp(name, "..") == 0)
80104be1: c7 44 24 04 dc 75 10 movl $0x801075dc,0x4(%esp)
80104be8: 80
80104be9: 89 1c 24 mov %ebx,(%esp)
80104bec: e8 9f cf ff ff call 80101b90 <namecmp>
80104bf1: 85 c0 test %eax,%eax
80104bf3: 0f 84 21 01 00 00 je 80104d1a <sys_unlink+0x18a>
80104bf9: c7 44 24 04 db 75 10 movl $0x801075db,0x4(%esp)
80104c00: 80
80104c01: 89 1c 24 mov %ebx,(%esp)
80104c04: e8 87 cf ff ff call 80101b90 <namecmp>
80104c09: 85 c0 test %eax,%eax
80104c0b: 0f 84 09 01 00 00 je 80104d1a <sys_unlink+0x18a>
if((ip = dirlookup(dp, name, &off)) == 0)
80104c11: 8d 45 c4 lea -0x3c(%ebp),%eax
80104c14: 89 5c 24 04 mov %ebx,0x4(%esp)
80104c18: 89 44 24 08 mov %eax,0x8(%esp)
80104c1c: 89 34 24 mov %esi,(%esp)
80104c1f: e8 9c cf ff ff call 80101bc0 <dirlookup>
80104c24: 85 c0 test %eax,%eax
80104c26: 89 c3 mov %eax,%ebx
80104c28: 0f 84 ec 00 00 00 je 80104d1a <sys_unlink+0x18a>
ilock(ip);
80104c2e: 89 04 24 mov %eax,(%esp)
80104c31: e8 7a ca ff ff call 801016b0 <ilock>
if(ip->nlink < 1)
80104c36: 66 83 7b 56 00 cmpw $0x0,0x56(%ebx)
80104c3b: 0f 8e 24 01 00 00 jle 80104d65 <sys_unlink+0x1d5>
if(ip->type == T_DIR && !isdirempty(ip)){
80104c41: 66 83 7b 50 01 cmpw $0x1,0x50(%ebx)
80104c46: 8d 75 d8 lea -0x28(%ebp),%esi
80104c49: 74 7d je 80104cc8 <sys_unlink+0x138>
memset(&de, 0, sizeof(de));
80104c4b: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
80104c52: 00
80104c53: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80104c5a: 00
80104c5b: 89 34 24 mov %esi,(%esp)
80104c5e: e8 1d f6 ff ff call 80104280 <memset>
if(writei(dp, (char*)&de, off, sizeof(de)) != sizeof(de))
80104c63: 8b 45 c4 mov -0x3c(%ebp),%eax
80104c66: c7 44 24 0c 10 00 00 movl $0x10,0xc(%esp)
80104c6d: 00
80104c6e: 89 74 24 04 mov %esi,0x4(%esp)
80104c72: 89 44 24 08 mov %eax,0x8(%esp)
80104c76: 8b 45 b4 mov -0x4c(%ebp),%eax
80104c79: 89 04 24 mov %eax,(%esp)
80104c7c: e8 df cd ff ff call 80101a60 <writei>
80104c81: 83 f8 10 cmp $0x10,%eax
80104c84: 0f 85 cf 00 00 00 jne 80104d59 <sys_unlink+0x1c9>
if(ip->type == T_DIR){
80104c8a: 66 83 7b 50 01 cmpw $0x1,0x50(%ebx)
80104c8f: 0f 84 a3 00 00 00 je 80104d38 <sys_unlink+0x1a8>
iunlockput(dp);
80104c95: 8b 45 b4 mov -0x4c(%ebp),%eax
80104c98: 89 04 24 mov %eax,(%esp)
80104c9b: e8 70 cc ff ff call 80101910 <iunlockput>
ip->nlink--;
80104ca0: 66 83 6b 56 01 subw $0x1,0x56(%ebx)
iupdate(ip);
80104ca5: 89 1c 24 mov %ebx,(%esp)
80104ca8: e8 43 c9 ff ff call 801015f0 <iupdate>
iunlockput(ip);
80104cad: 89 1c 24 mov %ebx,(%esp)
80104cb0: e8 5b cc ff ff call 80101910 <iunlockput>
end_op();
80104cb5: e8 c6 de ff ff call 80102b80 <end_op>
}
80104cba: 83 c4 5c add $0x5c,%esp
return 0;
80104cbd: 31 c0 xor %eax,%eax
}
80104cbf: 5b pop %ebx
80104cc0: 5e pop %esi
80104cc1: 5f pop %edi
80104cc2: 5d pop %ebp
80104cc3: c3 ret
80104cc4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
for(off=2*sizeof(de); off<dp->size; off+=sizeof(de)){
80104cc8: 83 7b 58 20 cmpl $0x20,0x58(%ebx)
80104ccc: 0f 86 79 ff ff ff jbe 80104c4b <sys_unlink+0xbb>
80104cd2: bf 20 00 00 00 mov $0x20,%edi
80104cd7: eb 15 jmp 80104cee <sys_unlink+0x15e>
80104cd9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80104ce0: 8d 57 10 lea 0x10(%edi),%edx
80104ce3: 3b 53 58 cmp 0x58(%ebx),%edx
80104ce6: 0f 83 5f ff ff ff jae 80104c4b <sys_unlink+0xbb>
80104cec: 89 d7 mov %edx,%edi
if(readi(dp, (char*)&de, off, sizeof(de)) != sizeof(de))
80104cee: c7 44 24 0c 10 00 00 movl $0x10,0xc(%esp)
80104cf5: 00
80104cf6: 89 7c 24 08 mov %edi,0x8(%esp)
80104cfa: 89 74 24 04 mov %esi,0x4(%esp)
80104cfe: 89 1c 24 mov %ebx,(%esp)
80104d01: e8 5a cc ff ff call 80101960 <readi>
80104d06: 83 f8 10 cmp $0x10,%eax
80104d09: 75 42 jne 80104d4d <sys_unlink+0x1bd>
if(de.inum != 0)
80104d0b: 66 83 7d d8 00 cmpw $0x0,-0x28(%ebp)
80104d10: 74 ce je 80104ce0 <sys_unlink+0x150>
iunlockput(ip);
80104d12: 89 1c 24 mov %ebx,(%esp)
80104d15: e8 f6 cb ff ff call 80101910 <iunlockput>
iunlockput(dp);
80104d1a: 8b 45 b4 mov -0x4c(%ebp),%eax
80104d1d: 89 04 24 mov %eax,(%esp)
80104d20: e8 eb cb ff ff call 80101910 <iunlockput>
end_op();
80104d25: e8 56 de ff ff call 80102b80 <end_op>
}
80104d2a: 83 c4 5c add $0x5c,%esp
return -1;
80104d2d: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104d32: 5b pop %ebx
80104d33: 5e pop %esi
80104d34: 5f pop %edi
80104d35: 5d pop %ebp
80104d36: c3 ret
80104d37: 90 nop
dp->nlink--;
80104d38: 8b 45 b4 mov -0x4c(%ebp),%eax
80104d3b: 66 83 68 56 01 subw $0x1,0x56(%eax)
iupdate(dp);
80104d40: 89 04 24 mov %eax,(%esp)
80104d43: e8 a8 c8 ff ff call 801015f0 <iupdate>
80104d48: e9 48 ff ff ff jmp 80104c95 <sys_unlink+0x105>
panic("isdirempty: readi");
80104d4d: c7 04 24 00 76 10 80 movl $0x80107600,(%esp)
80104d54: e8 07 b6 ff ff call 80100360 <panic>
panic("unlink: writei");
80104d59: c7 04 24 12 76 10 80 movl $0x80107612,(%esp)
80104d60: e8 fb b5 ff ff call 80100360 <panic>
panic("unlink: nlink < 1");
80104d65: c7 04 24 ee 75 10 80 movl $0x801075ee,(%esp)
80104d6c: e8 ef b5 ff ff call 80100360 <panic>
80104d71: eb 0d jmp 80104d80 <sys_open>
80104d73: 90 nop
80104d74: 90 nop
80104d75: 90 nop
80104d76: 90 nop
80104d77: 90 nop
80104d78: 90 nop
80104d79: 90 nop
80104d7a: 90 nop
80104d7b: 90 nop
80104d7c: 90 nop
80104d7d: 90 nop
80104d7e: 90 nop
80104d7f: 90 nop
80104d80 <sys_open>:
int
sys_open(void)
{
80104d80: 55 push %ebp
80104d81: 89 e5 mov %esp,%ebp
80104d83: 57 push %edi
80104d84: 56 push %esi
80104d85: 53 push %ebx
80104d86: 83 ec 2c sub $0x2c,%esp
char *path;
int fd, omode;
struct file *f;
struct inode *ip;
if(argstr(0, &path) < 0 || argint(1, &omode) < 0)
80104d89: 8d 45 e0 lea -0x20(%ebp),%eax
80104d8c: 89 44 24 04 mov %eax,0x4(%esp)
80104d90: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104d97: e8 24 f8 ff ff call 801045c0 <argstr>
80104d9c: 85 c0 test %eax,%eax
80104d9e: 0f 88 d1 00 00 00 js 80104e75 <sys_open+0xf5>
80104da4: 8d 45 e4 lea -0x1c(%ebp),%eax
80104da7: 89 44 24 04 mov %eax,0x4(%esp)
80104dab: c7 04 24 01 00 00 00 movl $0x1,(%esp)
80104db2: e8 79 f7 ff ff call 80104530 <argint>
80104db7: 85 c0 test %eax,%eax
80104db9: 0f 88 b6 00 00 00 js 80104e75 <sys_open+0xf5>
return -1;
begin_op();
80104dbf: e8 4c dd ff ff call 80102b10 <begin_op>
if(omode & O_CREATE){
80104dc4: f6 45 e5 02 testb $0x2,-0x1b(%ebp)
80104dc8: 0f 85 82 00 00 00 jne 80104e50 <sys_open+0xd0>
if(ip == 0){
end_op();
return -1;
}
} else {
if((ip = namei(path)) == 0){
80104dce: 8b 45 e0 mov -0x20(%ebp),%eax
80104dd1: 89 04 24 mov %eax,(%esp)
80104dd4: e8 27 d1 ff ff call 80101f00 <namei>
80104dd9: 85 c0 test %eax,%eax
80104ddb: 89 c6 mov %eax,%esi
80104ddd: 0f 84 8d 00 00 00 je 80104e70 <sys_open+0xf0>
end_op();
return -1;
}
ilock(ip);
80104de3: 89 04 24 mov %eax,(%esp)
80104de6: e8 c5 c8 ff ff call 801016b0 <ilock>
if(ip->type == T_DIR && omode != O_RDONLY){
80104deb: 66 83 7e 50 01 cmpw $0x1,0x50(%esi)
80104df0: 0f 84 92 00 00 00 je 80104e88 <sys_open+0x108>
end_op();
return -1;
}
}
if((f = filealloc()) == 0 || (fd = fdalloc(f)) < 0){
80104df6: e8 65 bf ff ff call 80100d60 <filealloc>
80104dfb: 85 c0 test %eax,%eax
80104dfd: 89 c3 mov %eax,%ebx
80104dff: 0f 84 93 00 00 00 je 80104e98 <sys_open+0x118>
80104e05: e8 86 f8 ff ff call 80104690 <fdalloc>
80104e0a: 85 c0 test %eax,%eax
80104e0c: 89 c7 mov %eax,%edi
80104e0e: 0f 88 94 00 00 00 js 80104ea8 <sys_open+0x128>
fileclose(f);
iunlockput(ip);
end_op();
return -1;
}
iunlock(ip);
80104e14: 89 34 24 mov %esi,(%esp)
80104e17: e8 74 c9 ff ff call 80101790 <iunlock>
end_op();
80104e1c: e8 5f dd ff ff call 80102b80 <end_op>
f->type = FD_INODE;
80104e21: c7 03 02 00 00 00 movl $0x2,(%ebx)
f->ip = ip;
f->off = 0;
f->readable = !(omode & O_WRONLY);
80104e27: 8b 45 e4 mov -0x1c(%ebp),%eax
f->ip = ip;
80104e2a: 89 73 10 mov %esi,0x10(%ebx)
f->off = 0;
80104e2d: c7 43 14 00 00 00 00 movl $0x0,0x14(%ebx)
f->readable = !(omode & O_WRONLY);
80104e34: 89 c2 mov %eax,%edx
80104e36: 83 e2 01 and $0x1,%edx
80104e39: 83 f2 01 xor $0x1,%edx
f->writable = (omode & O_WRONLY) || (omode & O_RDWR);
80104e3c: a8 03 test $0x3,%al
f->readable = !(omode & O_WRONLY);
80104e3e: 88 53 08 mov %dl,0x8(%ebx)
return fd;
80104e41: 89 f8 mov %edi,%eax
f->writable = (omode & O_WRONLY) || (omode & O_RDWR);
80104e43: 0f 95 43 09 setne 0x9(%ebx)
}
80104e47: 83 c4 2c add $0x2c,%esp
80104e4a: 5b pop %ebx
80104e4b: 5e pop %esi
80104e4c: 5f pop %edi
80104e4d: 5d pop %ebp
80104e4e: c3 ret
80104e4f: 90 nop
ip = create(path, T_FILE, 0, 0);
80104e50: 8b 45 e0 mov -0x20(%ebp),%eax
80104e53: 31 c9 xor %ecx,%ecx
80104e55: ba 02 00 00 00 mov $0x2,%edx
80104e5a: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104e61: e8 6a f8 ff ff call 801046d0 <create>
if(ip == 0){
80104e66: 85 c0 test %eax,%eax
ip = create(path, T_FILE, 0, 0);
80104e68: 89 c6 mov %eax,%esi
if(ip == 0){
80104e6a: 75 8a jne 80104df6 <sys_open+0x76>
80104e6c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
end_op();
80104e70: e8 0b dd ff ff call 80102b80 <end_op>
}
80104e75: 83 c4 2c add $0x2c,%esp
return -1;
80104e78: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104e7d: 5b pop %ebx
80104e7e: 5e pop %esi
80104e7f: 5f pop %edi
80104e80: 5d pop %ebp
80104e81: c3 ret
80104e82: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if(ip->type == T_DIR && omode != O_RDONLY){
80104e88: 8b 45 e4 mov -0x1c(%ebp),%eax
80104e8b: 85 c0 test %eax,%eax
80104e8d: 0f 84 63 ff ff ff je 80104df6 <sys_open+0x76>
80104e93: 90 nop
80104e94: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
iunlockput(ip);
80104e98: 89 34 24 mov %esi,(%esp)
80104e9b: e8 70 ca ff ff call 80101910 <iunlockput>
80104ea0: eb ce jmp 80104e70 <sys_open+0xf0>
80104ea2: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
fileclose(f);
80104ea8: 89 1c 24 mov %ebx,(%esp)
80104eab: e8 70 bf ff ff call 80100e20 <fileclose>
80104eb0: eb e6 jmp 80104e98 <sys_open+0x118>
80104eb2: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80104eb9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80104ec0 <sys_mkdir>:
int
sys_mkdir(void)
{
80104ec0: 55 push %ebp
80104ec1: 89 e5 mov %esp,%ebp
80104ec3: 83 ec 28 sub $0x28,%esp
char *path;
struct inode *ip;
begin_op();
80104ec6: e8 45 dc ff ff call 80102b10 <begin_op>
if(argstr(0, &path) < 0 || (ip = create(path, T_DIR, 0, 0)) == 0){
80104ecb: 8d 45 f4 lea -0xc(%ebp),%eax
80104ece: 89 44 24 04 mov %eax,0x4(%esp)
80104ed2: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104ed9: e8 e2 f6 ff ff call 801045c0 <argstr>
80104ede: 85 c0 test %eax,%eax
80104ee0: 78 2e js 80104f10 <sys_mkdir+0x50>
80104ee2: 8b 45 f4 mov -0xc(%ebp),%eax
80104ee5: 31 c9 xor %ecx,%ecx
80104ee7: ba 01 00 00 00 mov $0x1,%edx
80104eec: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104ef3: e8 d8 f7 ff ff call 801046d0 <create>
80104ef8: 85 c0 test %eax,%eax
80104efa: 74 14 je 80104f10 <sys_mkdir+0x50>
end_op();
return -1;
}
iunlockput(ip);
80104efc: 89 04 24 mov %eax,(%esp)
80104eff: e8 0c ca ff ff call 80101910 <iunlockput>
end_op();
80104f04: e8 77 dc ff ff call 80102b80 <end_op>
return 0;
80104f09: 31 c0 xor %eax,%eax
}
80104f0b: c9 leave
80104f0c: c3 ret
80104f0d: 8d 76 00 lea 0x0(%esi),%esi
end_op();
80104f10: e8 6b dc ff ff call 80102b80 <end_op>
return -1;
80104f15: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104f1a: c9 leave
80104f1b: c3 ret
80104f1c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104f20 <sys_mknod>:
int
sys_mknod(void)
{
80104f20: 55 push %ebp
80104f21: 89 e5 mov %esp,%ebp
80104f23: 83 ec 28 sub $0x28,%esp
struct inode *ip;
char *path;
int major, minor;
begin_op();
80104f26: e8 e5 db ff ff call 80102b10 <begin_op>
if((argstr(0, &path)) < 0 ||
80104f2b: 8d 45 ec lea -0x14(%ebp),%eax
80104f2e: 89 44 24 04 mov %eax,0x4(%esp)
80104f32: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104f39: e8 82 f6 ff ff call 801045c0 <argstr>
80104f3e: 85 c0 test %eax,%eax
80104f40: 78 5e js 80104fa0 <sys_mknod+0x80>
argint(1, &major) < 0 ||
80104f42: 8d 45 f0 lea -0x10(%ebp),%eax
80104f45: 89 44 24 04 mov %eax,0x4(%esp)
80104f49: c7 04 24 01 00 00 00 movl $0x1,(%esp)
80104f50: e8 db f5 ff ff call 80104530 <argint>
if((argstr(0, &path)) < 0 ||
80104f55: 85 c0 test %eax,%eax
80104f57: 78 47 js 80104fa0 <sys_mknod+0x80>
argint(2, &minor) < 0 ||
80104f59: 8d 45 f4 lea -0xc(%ebp),%eax
80104f5c: 89 44 24 04 mov %eax,0x4(%esp)
80104f60: c7 04 24 02 00 00 00 movl $0x2,(%esp)
80104f67: e8 c4 f5 ff ff call 80104530 <argint>
argint(1, &major) < 0 ||
80104f6c: 85 c0 test %eax,%eax
80104f6e: 78 30 js 80104fa0 <sys_mknod+0x80>
(ip = create(path, T_DEV, major, minor)) == 0){
80104f70: 0f bf 45 f4 movswl -0xc(%ebp),%eax
argint(2, &minor) < 0 ||
80104f74: ba 03 00 00 00 mov $0x3,%edx
(ip = create(path, T_DEV, major, minor)) == 0){
80104f79: 0f bf 4d f0 movswl -0x10(%ebp),%ecx
80104f7d: 89 04 24 mov %eax,(%esp)
argint(2, &minor) < 0 ||
80104f80: 8b 45 ec mov -0x14(%ebp),%eax
80104f83: e8 48 f7 ff ff call 801046d0 <create>
80104f88: 85 c0 test %eax,%eax
80104f8a: 74 14 je 80104fa0 <sys_mknod+0x80>
end_op();
return -1;
}
iunlockput(ip);
80104f8c: 89 04 24 mov %eax,(%esp)
80104f8f: e8 7c c9 ff ff call 80101910 <iunlockput>
end_op();
80104f94: e8 e7 db ff ff call 80102b80 <end_op>
return 0;
80104f99: 31 c0 xor %eax,%eax
}
80104f9b: c9 leave
80104f9c: c3 ret
80104f9d: 8d 76 00 lea 0x0(%esi),%esi
end_op();
80104fa0: e8 db db ff ff call 80102b80 <end_op>
return -1;
80104fa5: b8 ff ff ff ff mov $0xffffffff,%eax
}
80104faa: c9 leave
80104fab: c3 ret
80104fac: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80104fb0 <sys_chdir>:
int
sys_chdir(void)
{
80104fb0: 55 push %ebp
80104fb1: 89 e5 mov %esp,%ebp
80104fb3: 56 push %esi
80104fb4: 53 push %ebx
80104fb5: 83 ec 20 sub $0x20,%esp
char *path;
struct inode *ip;
struct proc *curproc = myproc();
80104fb8: e8 e3 e6 ff ff call 801036a0 <myproc>
80104fbd: 89 c6 mov %eax,%esi
begin_op();
80104fbf: e8 4c db ff ff call 80102b10 <begin_op>
if(argstr(0, &path) < 0 || (ip = namei(path)) == 0){
80104fc4: 8d 45 f4 lea -0xc(%ebp),%eax
80104fc7: 89 44 24 04 mov %eax,0x4(%esp)
80104fcb: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80104fd2: e8 e9 f5 ff ff call 801045c0 <argstr>
80104fd7: 85 c0 test %eax,%eax
80104fd9: 78 4a js 80105025 <sys_chdir+0x75>
80104fdb: 8b 45 f4 mov -0xc(%ebp),%eax
80104fde: 89 04 24 mov %eax,(%esp)
80104fe1: e8 1a cf ff ff call 80101f00 <namei>
80104fe6: 85 c0 test %eax,%eax
80104fe8: 89 c3 mov %eax,%ebx
80104fea: 74 39 je 80105025 <sys_chdir+0x75>
end_op();
return -1;
}
ilock(ip);
80104fec: 89 04 24 mov %eax,(%esp)
80104fef: e8 bc c6 ff ff call 801016b0 <ilock>
if(ip->type != T_DIR){
80104ff4: 66 83 7b 50 01 cmpw $0x1,0x50(%ebx)
iunlockput(ip);
80104ff9: 89 1c 24 mov %ebx,(%esp)
if(ip->type != T_DIR){
80104ffc: 75 22 jne 80105020 <sys_chdir+0x70>
end_op();
return -1;
}
iunlock(ip);
80104ffe: e8 8d c7 ff ff call 80101790 <iunlock>
iput(curproc->cwd);
80105003: 8b 46 6c mov 0x6c(%esi),%eax
80105006: 89 04 24 mov %eax,(%esp)
80105009: e8 c2 c7 ff ff call 801017d0 <iput>
end_op();
8010500e: e8 6d db ff ff call 80102b80 <end_op>
curproc->cwd = ip;
return 0;
80105013: 31 c0 xor %eax,%eax
curproc->cwd = ip;
80105015: 89 5e 6c mov %ebx,0x6c(%esi)
}
80105018: 83 c4 20 add $0x20,%esp
8010501b: 5b pop %ebx
8010501c: 5e pop %esi
8010501d: 5d pop %ebp
8010501e: c3 ret
8010501f: 90 nop
iunlockput(ip);
80105020: e8 eb c8 ff ff call 80101910 <iunlockput>
end_op();
80105025: e8 56 db ff ff call 80102b80 <end_op>
}
8010502a: 83 c4 20 add $0x20,%esp
return -1;
8010502d: b8 ff ff ff ff mov $0xffffffff,%eax
}
80105032: 5b pop %ebx
80105033: 5e pop %esi
80105034: 5d pop %ebp
80105035: c3 ret
80105036: 8d 76 00 lea 0x0(%esi),%esi
80105039: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80105040 <sys_exec>:
int
sys_exec(void)
{
80105040: 55 push %ebp
80105041: 89 e5 mov %esp,%ebp
80105043: 57 push %edi
80105044: 56 push %esi
80105045: 53 push %ebx
80105046: 81 ec ac 00 00 00 sub $0xac,%esp
char *path, *argv[MAXARG];
int i;
uint uargv, uarg;
if(argstr(0, &path) < 0 || argint(1, (int*)&uargv) < 0){
8010504c: 8d 85 5c ff ff ff lea -0xa4(%ebp),%eax
80105052: 89 44 24 04 mov %eax,0x4(%esp)
80105056: c7 04 24 00 00 00 00 movl $0x0,(%esp)
8010505d: e8 5e f5 ff ff call 801045c0 <argstr>
80105062: 85 c0 test %eax,%eax
80105064: 0f 88 84 00 00 00 js 801050ee <sys_exec+0xae>
8010506a: 8d 85 60 ff ff ff lea -0xa0(%ebp),%eax
80105070: 89 44 24 04 mov %eax,0x4(%esp)
80105074: c7 04 24 01 00 00 00 movl $0x1,(%esp)
8010507b: e8 b0 f4 ff ff call 80104530 <argint>
80105080: 85 c0 test %eax,%eax
80105082: 78 6a js 801050ee <sys_exec+0xae>
return -1;
}
memset(argv, 0, sizeof(argv));
80105084: 8d 85 68 ff ff ff lea -0x98(%ebp),%eax
for(i=0;; i++){
8010508a: 31 db xor %ebx,%ebx
memset(argv, 0, sizeof(argv));
8010508c: c7 44 24 08 80 00 00 movl $0x80,0x8(%esp)
80105093: 00
80105094: 8d b5 68 ff ff ff lea -0x98(%ebp),%esi
8010509a: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
801050a1: 00
801050a2: 8d bd 64 ff ff ff lea -0x9c(%ebp),%edi
801050a8: 89 04 24 mov %eax,(%esp)
801050ab: e8 d0 f1 ff ff call 80104280 <memset>
if(i >= NELEM(argv))
return -1;
if(fetchint(uargv+4*i, (int*)&uarg) < 0)
801050b0: 8b 85 60 ff ff ff mov -0xa0(%ebp),%eax
801050b6: 89 7c 24 04 mov %edi,0x4(%esp)
801050ba: 8d 04 98 lea (%eax,%ebx,4),%eax
801050bd: 89 04 24 mov %eax,(%esp)
801050c0: e8 0b f4 ff ff call 801044d0 <fetchint>
801050c5: 85 c0 test %eax,%eax
801050c7: 78 25 js 801050ee <sys_exec+0xae>
return -1;
if(uarg == 0){
801050c9: 8b 85 64 ff ff ff mov -0x9c(%ebp),%eax
801050cf: 85 c0 test %eax,%eax
801050d1: 74 2d je 80105100 <sys_exec+0xc0>
argv[i] = 0;
break;
}
if(fetchstr(uarg, &argv[i]) < 0)
801050d3: 89 74 24 04 mov %esi,0x4(%esp)
801050d7: 89 04 24 mov %eax,(%esp)
801050da: e8 11 f4 ff ff call 801044f0 <fetchstr>
801050df: 85 c0 test %eax,%eax
801050e1: 78 0b js 801050ee <sys_exec+0xae>
for(i=0;; i++){
801050e3: 83 c3 01 add $0x1,%ebx
801050e6: 83 c6 04 add $0x4,%esi
if(i >= NELEM(argv))
801050e9: 83 fb 20 cmp $0x20,%ebx
801050ec: 75 c2 jne 801050b0 <sys_exec+0x70>
return -1;
}
return exec(path, argv);
}
801050ee: 81 c4 ac 00 00 00 add $0xac,%esp
return -1;
801050f4: b8 ff ff ff ff mov $0xffffffff,%eax
}
801050f9: 5b pop %ebx
801050fa: 5e pop %esi
801050fb: 5f pop %edi
801050fc: 5d pop %ebp
801050fd: c3 ret
801050fe: 66 90 xchg %ax,%ax
return exec(path, argv);
80105100: 8d 85 68 ff ff ff lea -0x98(%ebp),%eax
80105106: 89 44 24 04 mov %eax,0x4(%esp)
8010510a: 8b 85 5c ff ff ff mov -0xa4(%ebp),%eax
argv[i] = 0;
80105110: c7 84 9d 68 ff ff ff movl $0x0,-0x98(%ebp,%ebx,4)
80105117: 00 00 00 00
return exec(path, argv);
8010511b: 89 04 24 mov %eax,(%esp)
8010511e: e8 7d b8 ff ff call 801009a0 <exec>
}
80105123: 81 c4 ac 00 00 00 add $0xac,%esp
80105129: 5b pop %ebx
8010512a: 5e pop %esi
8010512b: 5f pop %edi
8010512c: 5d pop %ebp
8010512d: c3 ret
8010512e: 66 90 xchg %ax,%ax
80105130 <sys_pipe>:
int
sys_pipe(void)
{
80105130: 55 push %ebp
80105131: 89 e5 mov %esp,%ebp
80105133: 53 push %ebx
80105134: 83 ec 24 sub $0x24,%esp
int *fd;
struct file *rf, *wf;
int fd0, fd1;
if(argptr(0, (void*)&fd, 2*sizeof(fd[0])) < 0)
80105137: 8d 45 ec lea -0x14(%ebp),%eax
8010513a: c7 44 24 08 08 00 00 movl $0x8,0x8(%esp)
80105141: 00
80105142: 89 44 24 04 mov %eax,0x4(%esp)
80105146: c7 04 24 00 00 00 00 movl $0x0,(%esp)
8010514d: e8 1e f4 ff ff call 80104570 <argptr>
80105152: 85 c0 test %eax,%eax
80105154: 78 6d js 801051c3 <sys_pipe+0x93>
return -1;
if(pipealloc(&rf, &wf) < 0)
80105156: 8d 45 f4 lea -0xc(%ebp),%eax
80105159: 89 44 24 04 mov %eax,0x4(%esp)
8010515d: 8d 45 f0 lea -0x10(%ebp),%eax
80105160: 89 04 24 mov %eax,(%esp)
80105163: e8 08 e0 ff ff call 80103170 <pipealloc>
80105168: 85 c0 test %eax,%eax
8010516a: 78 57 js 801051c3 <sys_pipe+0x93>
return -1;
fd0 = -1;
if((fd0 = fdalloc(rf)) < 0 || (fd1 = fdalloc(wf)) < 0){
8010516c: 8b 45 f0 mov -0x10(%ebp),%eax
8010516f: e8 1c f5 ff ff call 80104690 <fdalloc>
80105174: 85 c0 test %eax,%eax
80105176: 89 c3 mov %eax,%ebx
80105178: 78 33 js 801051ad <sys_pipe+0x7d>
8010517a: 8b 45 f4 mov -0xc(%ebp),%eax
8010517d: e8 0e f5 ff ff call 80104690 <fdalloc>
80105182: 85 c0 test %eax,%eax
80105184: 78 1a js 801051a0 <sys_pipe+0x70>
myproc()->ofile[fd0] = 0;
fileclose(rf);
fileclose(wf);
return -1;
}
fd[0] = fd0;
80105186: 8b 55 ec mov -0x14(%ebp),%edx
80105189: 89 1a mov %ebx,(%edx)
fd[1] = fd1;
8010518b: 8b 55 ec mov -0x14(%ebp),%edx
8010518e: 89 42 04 mov %eax,0x4(%edx)
return 0;
}
80105191: 83 c4 24 add $0x24,%esp
return 0;
80105194: 31 c0 xor %eax,%eax
}
80105196: 5b pop %ebx
80105197: 5d pop %ebp
80105198: c3 ret
80105199: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
myproc()->ofile[fd0] = 0;
801051a0: e8 fb e4 ff ff call 801036a0 <myproc>
801051a5: c7 44 98 2c 00 00 00 movl $0x0,0x2c(%eax,%ebx,4)
801051ac: 00
fileclose(rf);
801051ad: 8b 45 f0 mov -0x10(%ebp),%eax
801051b0: 89 04 24 mov %eax,(%esp)
801051b3: e8 68 bc ff ff call 80100e20 <fileclose>
fileclose(wf);
801051b8: 8b 45 f4 mov -0xc(%ebp),%eax
801051bb: 89 04 24 mov %eax,(%esp)
801051be: e8 5d bc ff ff call 80100e20 <fileclose>
}
801051c3: 83 c4 24 add $0x24,%esp
return -1;
801051c6: b8 ff ff ff ff mov $0xffffffff,%eax
}
801051cb: 5b pop %ebx
801051cc: 5d pop %ebp
801051cd: c3 ret
801051ce: 66 90 xchg %ax,%ax
801051d0 <sys_shm_open>:
#include "param.h"
#include "memlayout.h"
#include "mmu.h"
#include "proc.h"
int sys_shm_open(void) {
801051d0: 55 push %ebp
801051d1: 89 e5 mov %esp,%ebp
801051d3: 83 ec 28 sub $0x28,%esp
int id;
char **pointer;
if(argint(0, &id) < 0)
801051d6: 8d 45 f0 lea -0x10(%ebp),%eax
801051d9: 89 44 24 04 mov %eax,0x4(%esp)
801051dd: c7 04 24 00 00 00 00 movl $0x0,(%esp)
801051e4: e8 47 f3 ff ff call 80104530 <argint>
801051e9: 85 c0 test %eax,%eax
801051eb: 78 33 js 80105220 <sys_shm_open+0x50>
return -1;
if(argptr(1, (char **) (&pointer),4)<0)
801051ed: 8d 45 f4 lea -0xc(%ebp),%eax
801051f0: c7 44 24 08 04 00 00 movl $0x4,0x8(%esp)
801051f7: 00
801051f8: 89 44 24 04 mov %eax,0x4(%esp)
801051fc: c7 04 24 01 00 00 00 movl $0x1,(%esp)
80105203: e8 68 f3 ff ff call 80104570 <argptr>
80105208: 85 c0 test %eax,%eax
8010520a: 78 14 js 80105220 <sys_shm_open+0x50>
return -1;
return shm_open(id, pointer);
8010520c: 8b 45 f4 mov -0xc(%ebp),%eax
8010520f: 89 44 24 04 mov %eax,0x4(%esp)
80105213: 8b 45 f0 mov -0x10(%ebp),%eax
80105216: 89 04 24 mov %eax,(%esp)
80105219: e8 12 1c 00 00 call 80106e30 <shm_open>
}
8010521e: c9 leave
8010521f: c3 ret
return -1;
80105220: b8 ff ff ff ff mov $0xffffffff,%eax
}
80105225: c9 leave
80105226: c3 ret
80105227: 89 f6 mov %esi,%esi
80105229: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80105230 <sys_shm_close>:
int sys_shm_close(void) {
80105230: 55 push %ebp
80105231: 89 e5 mov %esp,%ebp
80105233: 83 ec 28 sub $0x28,%esp
int id;
if(argint(0, &id) < 0)
80105236: 8d 45 f4 lea -0xc(%ebp),%eax
80105239: 89 44 24 04 mov %eax,0x4(%esp)
8010523d: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80105244: e8 e7 f2 ff ff call 80104530 <argint>
80105249: 85 c0 test %eax,%eax
8010524b: 78 13 js 80105260 <sys_shm_close+0x30>
return -1;
return shm_close(id);
8010524d: 8b 45 f4 mov -0xc(%ebp),%eax
80105250: 89 04 24 mov %eax,(%esp)
80105253: e8 e8 1b 00 00 call 80106e40 <shm_close>
}
80105258: c9 leave
80105259: c3 ret
8010525a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
return -1;
80105260: b8 ff ff ff ff mov $0xffffffff,%eax
}
80105265: c9 leave
80105266: c3 ret
80105267: 89 f6 mov %esi,%esi
80105269: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80105270 <sys_fork>:
int
sys_fork(void)
{
80105270: 55 push %ebp
80105271: 89 e5 mov %esp,%ebp
return fork();
}
80105273: 5d pop %ebp
return fork();
80105274: e9 d7 e5 ff ff jmp 80103850 <fork>
80105279: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80105280 <sys_exit>:
int
sys_exit(void)
{
80105280: 55 push %ebp
80105281: 89 e5 mov %esp,%ebp
80105283: 83 ec 08 sub $0x8,%esp
exit();
80105286: e8 15 e8 ff ff call 80103aa0 <exit>
return 0; // not reached
}
8010528b: 31 c0 xor %eax,%eax
8010528d: c9 leave
8010528e: c3 ret
8010528f: 90 nop
80105290 <sys_wait>:
int
sys_wait(void)
{
80105290: 55 push %ebp
80105291: 89 e5 mov %esp,%ebp
return wait();
}
80105293: 5d pop %ebp
return wait();
80105294: e9 17 ea ff ff jmp 80103cb0 <wait>
80105299: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
801052a0 <sys_kill>:
int
sys_kill(void)
{
801052a0: 55 push %ebp
801052a1: 89 e5 mov %esp,%ebp
801052a3: 83 ec 28 sub $0x28,%esp
int pid;
if(argint(0, &pid) < 0)
801052a6: 8d 45 f4 lea -0xc(%ebp),%eax
801052a9: 89 44 24 04 mov %eax,0x4(%esp)
801052ad: c7 04 24 00 00 00 00 movl $0x0,(%esp)
801052b4: e8 77 f2 ff ff call 80104530 <argint>
801052b9: 85 c0 test %eax,%eax
801052bb: 78 13 js 801052d0 <sys_kill+0x30>
return -1;
return kill(pid);
801052bd: 8b 45 f4 mov -0xc(%ebp),%eax
801052c0: 89 04 24 mov %eax,(%esp)
801052c3: e8 28 eb ff ff call 80103df0 <kill>
}
801052c8: c9 leave
801052c9: c3 ret
801052ca: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
return -1;
801052d0: b8 ff ff ff ff mov $0xffffffff,%eax
}
801052d5: c9 leave
801052d6: c3 ret
801052d7: 89 f6 mov %esi,%esi
801052d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801052e0 <sys_getpid>:
int
sys_getpid(void)
{
801052e0: 55 push %ebp
801052e1: 89 e5 mov %esp,%ebp
801052e3: 83 ec 08 sub $0x8,%esp
return myproc()->pid;
801052e6: e8 b5 e3 ff ff call 801036a0 <myproc>
801052eb: 8b 40 14 mov 0x14(%eax),%eax
}
801052ee: c9 leave
801052ef: c3 ret
801052f0 <sys_sbrk>:
int
sys_sbrk(void)
{
801052f0: 55 push %ebp
801052f1: 89 e5 mov %esp,%ebp
801052f3: 53 push %ebx
801052f4: 83 ec 24 sub $0x24,%esp
int addr;
int n;
if(argint(0, &n) < 0)
801052f7: 8d 45 f4 lea -0xc(%ebp),%eax
801052fa: 89 44 24 04 mov %eax,0x4(%esp)
801052fe: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80105305: e8 26 f2 ff ff call 80104530 <argint>
8010530a: 85 c0 test %eax,%eax
8010530c: 78 22 js 80105330 <sys_sbrk+0x40>
return -1;
addr = myproc()->sz;
8010530e: e8 8d e3 ff ff call 801036a0 <myproc>
if(growproc(n) < 0)
80105313: 8b 55 f4 mov -0xc(%ebp),%edx
addr = myproc()->sz;
80105316: 8b 18 mov (%eax),%ebx
if(growproc(n) < 0)
80105318: 89 14 24 mov %edx,(%esp)
8010531b: e8 c0 e4 ff ff call 801037e0 <growproc>
80105320: 85 c0 test %eax,%eax
80105322: 78 0c js 80105330 <sys_sbrk+0x40>
return -1;
return addr;
80105324: 89 d8 mov %ebx,%eax
}
80105326: 83 c4 24 add $0x24,%esp
80105329: 5b pop %ebx
8010532a: 5d pop %ebp
8010532b: c3 ret
8010532c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return -1;
80105330: b8 ff ff ff ff mov $0xffffffff,%eax
80105335: eb ef jmp 80105326 <sys_sbrk+0x36>
80105337: 89 f6 mov %esi,%esi
80105339: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80105340 <sys_sleep>:
int
sys_sleep(void)
{
80105340: 55 push %ebp
80105341: 89 e5 mov %esp,%ebp
80105343: 53 push %ebx
80105344: 83 ec 24 sub $0x24,%esp
int n;
uint ticks0;
if(argint(0, &n) < 0)
80105347: 8d 45 f4 lea -0xc(%ebp),%eax
8010534a: 89 44 24 04 mov %eax,0x4(%esp)
8010534e: c7 04 24 00 00 00 00 movl $0x0,(%esp)
80105355: e8 d6 f1 ff ff call 80104530 <argint>
8010535a: 85 c0 test %eax,%eax
8010535c: 78 7e js 801053dc <sys_sleep+0x9c>
return -1;
acquire(&tickslock);
8010535e: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
80105365: e8 d6 ed ff ff call 80104140 <acquire>
ticks0 = ticks;
while(ticks - ticks0 < n){
8010536a: 8b 55 f4 mov -0xc(%ebp),%edx
ticks0 = ticks;
8010536d: 8b 1d a0 55 11 80 mov 0x801155a0,%ebx
while(ticks - ticks0 < n){
80105373: 85 d2 test %edx,%edx
80105375: 75 29 jne 801053a0 <sys_sleep+0x60>
80105377: eb 4f jmp 801053c8 <sys_sleep+0x88>
80105379: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
if(myproc()->killed){
release(&tickslock);
return -1;
}
sleep(&ticks, &tickslock);
80105380: c7 44 24 04 60 4d 11 movl $0x80114d60,0x4(%esp)
80105387: 80
80105388: c7 04 24 a0 55 11 80 movl $0x801155a0,(%esp)
8010538f: e8 6c e8 ff ff call 80103c00 <sleep>
while(ticks - ticks0 < n){
80105394: a1 a0 55 11 80 mov 0x801155a0,%eax
80105399: 29 d8 sub %ebx,%eax
8010539b: 3b 45 f4 cmp -0xc(%ebp),%eax
8010539e: 73 28 jae 801053c8 <sys_sleep+0x88>
if(myproc()->killed){
801053a0: e8 fb e2 ff ff call 801036a0 <myproc>
801053a5: 8b 40 28 mov 0x28(%eax),%eax
801053a8: 85 c0 test %eax,%eax
801053aa: 74 d4 je 80105380 <sys_sleep+0x40>
release(&tickslock);
801053ac: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
801053b3: e8 78 ee ff ff call 80104230 <release>
return -1;
801053b8: b8 ff ff ff ff mov $0xffffffff,%eax
}
release(&tickslock);
return 0;
}
801053bd: 83 c4 24 add $0x24,%esp
801053c0: 5b pop %ebx
801053c1: 5d pop %ebp
801053c2: c3 ret
801053c3: 90 nop
801053c4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
release(&tickslock);
801053c8: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
801053cf: e8 5c ee ff ff call 80104230 <release>
}
801053d4: 83 c4 24 add $0x24,%esp
return 0;
801053d7: 31 c0 xor %eax,%eax
}
801053d9: 5b pop %ebx
801053da: 5d pop %ebp
801053db: c3 ret
return -1;
801053dc: b8 ff ff ff ff mov $0xffffffff,%eax
801053e1: eb da jmp 801053bd <sys_sleep+0x7d>
801053e3: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801053e9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801053f0 <sys_uptime>:
// return how many clock tick interrupts have occurred
// since start.
int
sys_uptime(void)
{
801053f0: 55 push %ebp
801053f1: 89 e5 mov %esp,%ebp
801053f3: 53 push %ebx
801053f4: 83 ec 14 sub $0x14,%esp
uint xticks;
acquire(&tickslock);
801053f7: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
801053fe: e8 3d ed ff ff call 80104140 <acquire>
xticks = ticks;
80105403: 8b 1d a0 55 11 80 mov 0x801155a0,%ebx
release(&tickslock);
80105409: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
80105410: e8 1b ee ff ff call 80104230 <release>
return xticks;
}
80105415: 83 c4 14 add $0x14,%esp
80105418: 89 d8 mov %ebx,%eax
8010541a: 5b pop %ebx
8010541b: 5d pop %ebp
8010541c: c3 ret
8010541d <alltraps>:
# vectors.S sends all traps here.
.globl alltraps
alltraps:
# Build trap frame.
pushl %ds
8010541d: 1e push %ds
pushl %es
8010541e: 06 push %es
pushl %fs
8010541f: 0f a0 push %fs
pushl %gs
80105421: 0f a8 push %gs
pushal
80105423: 60 pusha
# Set up data segments.
movw $(SEG_KDATA<<3), %ax
80105424: 66 b8 10 00 mov $0x10,%ax
movw %ax, %ds
80105428: 8e d8 mov %eax,%ds
movw %ax, %es
8010542a: 8e c0 mov %eax,%es
# Call trap(tf), where tf=%esp
pushl %esp
8010542c: 54 push %esp
call trap
8010542d: e8 de 00 00 00 call 80105510 <trap>
addl $4, %esp
80105432: 83 c4 04 add $0x4,%esp
80105435 <trapret>:
# Return falls through to trapret...
.globl trapret
trapret:
popal
80105435: 61 popa
popl %gs
80105436: 0f a9 pop %gs
popl %fs
80105438: 0f a1 pop %fs
popl %es
8010543a: 07 pop %es
popl %ds
8010543b: 1f pop %ds
addl $0x8, %esp # trapno and errcode
8010543c: 83 c4 08 add $0x8,%esp
iret
8010543f: cf iret
80105440 <tvinit>:
void
tvinit(void)
{
int i;
for(i = 0; i < 256; i++)
80105440: 31 c0 xor %eax,%eax
80105442: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
SETGATE(idt[i], 0, SEG_KCODE<<3, vectors[i], 0);
80105448: 8b 14 85 08 a0 10 80 mov -0x7fef5ff8(,%eax,4),%edx
8010544f: b9 08 00 00 00 mov $0x8,%ecx
80105454: 66 89 0c c5 a2 4d 11 mov %cx,-0x7feeb25e(,%eax,8)
8010545b: 80
8010545c: c6 04 c5 a4 4d 11 80 movb $0x0,-0x7feeb25c(,%eax,8)
80105463: 00
80105464: c6 04 c5 a5 4d 11 80 movb $0x8e,-0x7feeb25b(,%eax,8)
8010546b: 8e
8010546c: 66 89 14 c5 a0 4d 11 mov %dx,-0x7feeb260(,%eax,8)
80105473: 80
80105474: c1 ea 10 shr $0x10,%edx
80105477: 66 89 14 c5 a6 4d 11 mov %dx,-0x7feeb25a(,%eax,8)
8010547e: 80
for(i = 0; i < 256; i++)
8010547f: 83 c0 01 add $0x1,%eax
80105482: 3d 00 01 00 00 cmp $0x100,%eax
80105487: 75 bf jne 80105448 <tvinit+0x8>
{
80105489: 55 push %ebp
SETGATE(idt[T_SYSCALL], 1, SEG_KCODE<<3, vectors[T_SYSCALL], DPL_USER);
8010548a: ba 08 00 00 00 mov $0x8,%edx
{
8010548f: 89 e5 mov %esp,%ebp
80105491: 83 ec 18 sub $0x18,%esp
SETGATE(idt[T_SYSCALL], 1, SEG_KCODE<<3, vectors[T_SYSCALL], DPL_USER);
80105494: a1 08 a1 10 80 mov 0x8010a108,%eax
initlock(&tickslock, "time");
80105499: c7 44 24 04 21 76 10 movl $0x80107621,0x4(%esp)
801054a0: 80
801054a1: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
SETGATE(idt[T_SYSCALL], 1, SEG_KCODE<<3, vectors[T_SYSCALL], DPL_USER);
801054a8: 66 89 15 a2 4f 11 80 mov %dx,0x80114fa2
801054af: 66 a3 a0 4f 11 80 mov %ax,0x80114fa0
801054b5: c1 e8 10 shr $0x10,%eax
801054b8: c6 05 a4 4f 11 80 00 movb $0x0,0x80114fa4
801054bf: c6 05 a5 4f 11 80 ef movb $0xef,0x80114fa5
801054c6: 66 a3 a6 4f 11 80 mov %ax,0x80114fa6
initlock(&tickslock, "time");
801054cc: e8 7f eb ff ff call 80104050 <initlock>
}
801054d1: c9 leave
801054d2: c3 ret
801054d3: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801054d9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
801054e0 <idtinit>:
void
idtinit(void)
{
801054e0: 55 push %ebp
pd[0] = size-1;
801054e1: b8 ff 07 00 00 mov $0x7ff,%eax
801054e6: 89 e5 mov %esp,%ebp
801054e8: 83 ec 10 sub $0x10,%esp
801054eb: 66 89 45 fa mov %ax,-0x6(%ebp)
pd[1] = (uint)p;
801054ef: b8 a0 4d 11 80 mov $0x80114da0,%eax
801054f4: 66 89 45 fc mov %ax,-0x4(%ebp)
pd[2] = (uint)p >> 16;
801054f8: c1 e8 10 shr $0x10,%eax
801054fb: 66 89 45 fe mov %ax,-0x2(%ebp)
asm volatile("lidt (%0)" : : "r" (pd));
801054ff: 8d 45 fa lea -0x6(%ebp),%eax
80105502: 0f 01 18 lidtl (%eax)
lidt(idt, sizeof(idt));
}
80105505: c9 leave
80105506: c3 ret
80105507: 89 f6 mov %esi,%esi
80105509: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80105510 <trap>:
//PAGEBREAK: 41
void
trap(struct trapframe *tf)
{
80105510: 55 push %ebp
80105511: 89 e5 mov %esp,%ebp
80105513: 57 push %edi
80105514: 56 push %esi
80105515: 53 push %ebx
80105516: 83 ec 3c sub $0x3c,%esp
80105519: 8b 5d 08 mov 0x8(%ebp),%ebx
if(tf->trapno == T_SYSCALL){
8010551c: 8b 43 30 mov 0x30(%ebx),%eax
8010551f: 83 f8 40 cmp $0x40,%eax
80105522: 0f 84 30 02 00 00 je 80105758 <trap+0x248>
if(myproc()->killed)
exit();
return;
}
switch(tf->trapno){
80105528: 83 e8 0e sub $0xe,%eax
8010552b: 83 f8 31 cmp $0x31,%eax
8010552e: 77 08 ja 80105538 <trap+0x28>
80105530: ff 24 85 6c 77 10 80 jmp *-0x7fef8894(,%eax,4)
80105537: 90 nop
cprintf("case T_PGFLT from trap.c: allocuvm succeeded. Number of pages allocated: %d\n", myproc()->szStack);
}
break;
//PAGEBREAK: 13
default:
if(myproc() == 0 || (tf->cs&3) == 0){
80105538: e8 63 e1 ff ff call 801036a0 <myproc>
8010553d: 85 c0 test %eax,%eax
8010553f: 90 nop
80105540: 0f 84 ac 02 00 00 je 801057f2 <trap+0x2e2>
80105546: f6 43 3c 03 testb $0x3,0x3c(%ebx)
8010554a: 0f 84 a2 02 00 00 je 801057f2 <trap+0x2e2>
static inline uint
rcr2(void)
{
uint val;
asm volatile("movl %%cr2,%0" : "=r" (val));
80105550: 0f 20 d1 mov %cr2,%ecx
cprintf("unexpected trap %d from cpu %d eip %x (cr2=0x%x)\n",
tf->trapno, cpuid(), tf->eip, rcr2());
panic("trap");
}
// In user space, assume process misbehaved.
cprintf("pid %d %s: trap %d err %d on cpu %d "
80105553: 8b 53 38 mov 0x38(%ebx),%edx
80105556: 89 4d d8 mov %ecx,-0x28(%ebp)
80105559: 89 55 dc mov %edx,-0x24(%ebp)
8010555c: e8 1f e1 ff ff call 80103680 <cpuid>
80105561: 8b 73 30 mov 0x30(%ebx),%esi
80105564: 89 c7 mov %eax,%edi
80105566: 8b 43 34 mov 0x34(%ebx),%eax
80105569: 89 45 e4 mov %eax,-0x1c(%ebp)
"eip 0x%x addr 0x%x--kill proc\n",
myproc()->pid, myproc()->name, tf->trapno,
8010556c: e8 2f e1 ff ff call 801036a0 <myproc>
80105571: 89 45 e0 mov %eax,-0x20(%ebp)
80105574: e8 27 e1 ff ff call 801036a0 <myproc>
cprintf("pid %d %s: trap %d err %d on cpu %d "
80105579: 8b 55 dc mov -0x24(%ebp),%edx
8010557c: 89 74 24 0c mov %esi,0xc(%esp)
myproc()->pid, myproc()->name, tf->trapno,
80105580: 8b 75 e0 mov -0x20(%ebp),%esi
cprintf("pid %d %s: trap %d err %d on cpu %d "
80105583: 8b 4d d8 mov -0x28(%ebp),%ecx
80105586: 89 7c 24 14 mov %edi,0x14(%esp)
8010558a: 89 54 24 18 mov %edx,0x18(%esp)
8010558e: 8b 55 e4 mov -0x1c(%ebp),%edx
myproc()->pid, myproc()->name, tf->trapno,
80105591: 83 c6 70 add $0x70,%esi
cprintf("pid %d %s: trap %d err %d on cpu %d "
80105594: 89 4c 24 1c mov %ecx,0x1c(%esp)
myproc()->pid, myproc()->name, tf->trapno,
80105598: 89 74 24 08 mov %esi,0x8(%esp)
cprintf("pid %d %s: trap %d err %d on cpu %d "
8010559c: 89 54 24 10 mov %edx,0x10(%esp)
801055a0: 8b 40 14 mov 0x14(%eax),%eax
801055a3: c7 04 24 28 77 10 80 movl $0x80107728,(%esp)
801055aa: 89 44 24 04 mov %eax,0x4(%esp)
801055ae: e8 9d b0 ff ff call 80100650 <cprintf>
tf->err, cpuid(), tf->eip, rcr2());
myproc()->killed = 1;
801055b3: e8 e8 e0 ff ff call 801036a0 <myproc>
801055b8: c7 40 28 01 00 00 00 movl $0x1,0x28(%eax)
801055bf: 90 nop
}
// Force process exit if it has been killed and is in user space.
// (If it is still executing in the kernel, let it keep running
// until it gets to the regular system call return.)
if(myproc() && myproc()->killed && (tf->cs&3) == DPL_USER)
801055c0: e8 db e0 ff ff call 801036a0 <myproc>
801055c5: 85 c0 test %eax,%eax
801055c7: 74 0c je 801055d5 <trap+0xc5>
801055c9: e8 d2 e0 ff ff call 801036a0 <myproc>
801055ce: 8b 50 28 mov 0x28(%eax),%edx
801055d1: 85 d2 test %edx,%edx
801055d3: 75 4b jne 80105620 <trap+0x110>
exit();
// Force process to give up CPU on clock tick.
// If interrupts were on while locks held, would need to check nlock.
if(myproc() && myproc()->state == RUNNING &&
801055d5: e8 c6 e0 ff ff call 801036a0 <myproc>
801055da: 85 c0 test %eax,%eax
801055dc: 74 0d je 801055eb <trap+0xdb>
801055de: 66 90 xchg %ax,%ax
801055e0: e8 bb e0 ff ff call 801036a0 <myproc>
801055e5: 83 78 10 04 cmpl $0x4,0x10(%eax)
801055e9: 74 4d je 80105638 <trap+0x128>
tf->trapno == T_IRQ0+IRQ_TIMER)
yield();
// Check if the process has been killed since we yielded
if(myproc() && myproc()->killed && (tf->cs&3) == DPL_USER)
801055eb: e8 b0 e0 ff ff call 801036a0 <myproc>
801055f0: 85 c0 test %eax,%eax
801055f2: 74 1d je 80105611 <trap+0x101>
801055f4: e8 a7 e0 ff ff call 801036a0 <myproc>
801055f9: 8b 40 28 mov 0x28(%eax),%eax
801055fc: 85 c0 test %eax,%eax
801055fe: 74 11 je 80105611 <trap+0x101>
80105600: 0f b7 43 3c movzwl 0x3c(%ebx),%eax
80105604: 83 e0 03 and $0x3,%eax
80105607: 66 83 f8 03 cmp $0x3,%ax
8010560b: 0f 84 78 01 00 00 je 80105789 <trap+0x279>
exit();
}
80105611: 83 c4 3c add $0x3c,%esp
80105614: 5b pop %ebx
80105615: 5e pop %esi
80105616: 5f pop %edi
80105617: 5d pop %ebp
80105618: c3 ret
80105619: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
if(myproc() && myproc()->killed && (tf->cs&3) == DPL_USER)
80105620: 0f b7 43 3c movzwl 0x3c(%ebx),%eax
80105624: 83 e0 03 and $0x3,%eax
80105627: 66 83 f8 03 cmp $0x3,%ax
8010562b: 75 a8 jne 801055d5 <trap+0xc5>
exit();
8010562d: e8 6e e4 ff ff call 80103aa0 <exit>
80105632: eb a1 jmp 801055d5 <trap+0xc5>
80105634: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
if(myproc() && myproc()->state == RUNNING &&
80105638: 83 7b 30 20 cmpl $0x20,0x30(%ebx)
8010563c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80105640: 75 a9 jne 801055eb <trap+0xdb>
yield();
80105642: e8 79 e5 ff ff call 80103bc0 <yield>
80105647: eb a2 jmp 801055eb <trap+0xdb>
80105649: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80105650: 0f 20 d6 mov %cr2,%esi
if(rcr2() > KERNBASE - ((myproc()->szStack + 1) * PGSIZE)){
80105653: e8 48 e0 ff ff call 801036a0 <myproc>
80105658: 8b 40 08 mov 0x8(%eax),%eax
8010565b: f7 d8 neg %eax
8010565d: c1 e0 0c shl $0xc,%eax
80105660: 05 00 f0 ff 7f add $0x7ffff000,%eax
80105665: 39 f0 cmp %esi,%eax
80105667: 0f 83 53 ff ff ff jae 801055c0 <trap+0xb0>
if(allocuvm(myproc()->pgdir, KERNBASE - ((myproc()->szStack + 1) * PGSIZE) , KERNBASE - ((myproc()->szStack + 1) * PGSIZE)+ 2) == 0){
8010566d: e8 2e e0 ff ff call 801036a0 <myproc>
80105672: 8b 40 08 mov 0x8(%eax),%eax
80105675: f7 d8 neg %eax
80105677: c1 e0 0c shl $0xc,%eax
8010567a: 8d b0 02 f0 ff 7f lea 0x7ffff002(%eax),%esi
80105680: e8 1b e0 ff ff call 801036a0 <myproc>
80105685: 8b 40 08 mov 0x8(%eax),%eax
80105688: f7 d8 neg %eax
8010568a: c1 e0 0c shl $0xc,%eax
8010568d: 8d b8 00 f0 ff 7f lea 0x7ffff000(%eax),%edi
80105693: e8 08 e0 ff ff call 801036a0 <myproc>
80105698: 89 74 24 08 mov %esi,0x8(%esp)
8010569c: 89 7c 24 04 mov %edi,0x4(%esp)
801056a0: 8b 40 04 mov 0x4(%eax),%eax
801056a3: 89 04 24 mov %eax,(%esp)
801056a6: e8 25 12 00 00 call 801068d0 <allocuvm>
801056ab: 85 c0 test %eax,%eax
801056ad: 0f 84 1d 01 00 00 je 801057d0 <trap+0x2c0>
myproc()->szStack++;
801056b3: e8 e8 df ff ff call 801036a0 <myproc>
801056b8: 83 40 08 01 addl $0x1,0x8(%eax)
cprintf("case T_PGFLT from trap.c: allocuvm succeeded. Number of pages allocated: %d\n", myproc()->szStack);
801056bc: e8 df df ff ff call 801036a0 <myproc>
801056c1: 8b 40 08 mov 0x8(%eax),%eax
801056c4: c7 04 24 a4 76 10 80 movl $0x801076a4,(%esp)
801056cb: 89 44 24 04 mov %eax,0x4(%esp)
801056cf: e8 7c af ff ff call 80100650 <cprintf>
801056d4: e9 e7 fe ff ff jmp 801055c0 <trap+0xb0>
801056d9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
if(cpuid() == 0){
801056e0: e8 9b df ff ff call 80103680 <cpuid>
801056e5: 85 c0 test %eax,%eax
801056e7: 0f 84 b3 00 00 00 je 801057a0 <trap+0x290>
801056ed: 8d 76 00 lea 0x0(%esi),%esi
lapiceoi();
801056f0: e8 8b d0 ff ff call 80102780 <lapiceoi>
break;
801056f5: e9 c6 fe ff ff jmp 801055c0 <trap+0xb0>
801056fa: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
kbdintr();
80105700: e8 cb ce ff ff call 801025d0 <kbdintr>
lapiceoi();
80105705: e8 76 d0 ff ff call 80102780 <lapiceoi>
break;
8010570a: e9 b1 fe ff ff jmp 801055c0 <trap+0xb0>
8010570f: 90 nop
uartintr();
80105710: e8 3b 02 00 00 call 80105950 <uartintr>
lapiceoi();
80105715: e8 66 d0 ff ff call 80102780 <lapiceoi>
break;
8010571a: e9 a1 fe ff ff jmp 801055c0 <trap+0xb0>
8010571f: 90 nop
cprintf("cpu%d: spurious interrupt at %x:%x\n",
80105720: 8b 7b 38 mov 0x38(%ebx),%edi
80105723: 0f b7 73 3c movzwl 0x3c(%ebx),%esi
80105727: e8 54 df ff ff call 80103680 <cpuid>
8010572c: c7 04 24 2c 76 10 80 movl $0x8010762c,(%esp)
80105733: 89 7c 24 0c mov %edi,0xc(%esp)
80105737: 89 74 24 08 mov %esi,0x8(%esp)
8010573b: 89 44 24 04 mov %eax,0x4(%esp)
8010573f: e8 0c af ff ff call 80100650 <cprintf>
lapiceoi();
80105744: e8 37 d0 ff ff call 80102780 <lapiceoi>
break;
80105749: e9 72 fe ff ff jmp 801055c0 <trap+0xb0>
8010574e: 66 90 xchg %ax,%ax
ideintr();
80105750: e8 2b c9 ff ff call 80102080 <ideintr>
80105755: eb 96 jmp 801056ed <trap+0x1dd>
80105757: 90 nop
80105758: 90 nop
80105759: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
if(myproc()->killed)
80105760: e8 3b df ff ff call 801036a0 <myproc>
80105765: 8b 70 28 mov 0x28(%eax),%esi
80105768: 85 f6 test %esi,%esi
8010576a: 75 2c jne 80105798 <trap+0x288>
myproc()->tf = tf;
8010576c: e8 2f df ff ff call 801036a0 <myproc>
80105771: 89 58 1c mov %ebx,0x1c(%eax)
syscall();
80105774: e8 a7 ee ff ff call 80104620 <syscall>
if(myproc()->killed)
80105779: e8 22 df ff ff call 801036a0 <myproc>
8010577e: 8b 48 28 mov 0x28(%eax),%ecx
80105781: 85 c9 test %ecx,%ecx
80105783: 0f 84 88 fe ff ff je 80105611 <trap+0x101>
}
80105789: 83 c4 3c add $0x3c,%esp
8010578c: 5b pop %ebx
8010578d: 5e pop %esi
8010578e: 5f pop %edi
8010578f: 5d pop %ebp
exit();
80105790: e9 0b e3 ff ff jmp 80103aa0 <exit>
80105795: 8d 76 00 lea 0x0(%esi),%esi
exit();
80105798: e8 03 e3 ff ff call 80103aa0 <exit>
8010579d: eb cd jmp 8010576c <trap+0x25c>
8010579f: 90 nop
acquire(&tickslock);
801057a0: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
801057a7: e8 94 e9 ff ff call 80104140 <acquire>
wakeup(&ticks);
801057ac: c7 04 24 a0 55 11 80 movl $0x801155a0,(%esp)
ticks++;
801057b3: 83 05 a0 55 11 80 01 addl $0x1,0x801155a0
wakeup(&ticks);
801057ba: e8 d1 e5 ff ff call 80103d90 <wakeup>
release(&tickslock);
801057bf: c7 04 24 60 4d 11 80 movl $0x80114d60,(%esp)
801057c6: e8 65 ea ff ff call 80104230 <release>
801057cb: e9 1d ff ff ff jmp 801056ed <trap+0x1dd>
cprintf("case T_PGFLT from trap.c: allocuvm failed. Number of current allocated pages: %d \n", myproc()->szStack);
801057d0: e8 cb de ff ff call 801036a0 <myproc>
801057d5: 8b 40 08 mov 0x8(%eax),%eax
801057d8: c7 04 24 50 76 10 80 movl $0x80107650,(%esp)
801057df: 89 44 24 04 mov %eax,0x4(%esp)
801057e3: e8 68 ae ff ff call 80100650 <cprintf>
exit();
801057e8: e8 b3 e2 ff ff call 80103aa0 <exit>
801057ed: e9 c1 fe ff ff jmp 801056b3 <trap+0x1a3>
801057f2: 0f 20 d7 mov %cr2,%edi
cprintf("unexpected trap %d from cpu %d eip %x (cr2=0x%x)\n",
801057f5: 8b 73 38 mov 0x38(%ebx),%esi
801057f8: e8 83 de ff ff call 80103680 <cpuid>
801057fd: 89 7c 24 10 mov %edi,0x10(%esp)
80105801: 89 74 24 0c mov %esi,0xc(%esp)
80105805: 89 44 24 08 mov %eax,0x8(%esp)
80105809: 8b 43 30 mov 0x30(%ebx),%eax
8010580c: c7 04 24 f4 76 10 80 movl $0x801076f4,(%esp)
80105813: 89 44 24 04 mov %eax,0x4(%esp)
80105817: e8 34 ae ff ff call 80100650 <cprintf>
panic("trap");
8010581c: c7 04 24 26 76 10 80 movl $0x80107626,(%esp)
80105823: e8 38 ab ff ff call 80100360 <panic>
80105828: 66 90 xchg %ax,%ax
8010582a: 66 90 xchg %ax,%ax
8010582c: 66 90 xchg %ax,%ax
8010582e: 66 90 xchg %ax,%ax
80105830 <uartgetc>:
}
static int
uartgetc(void)
{
if(!uart)
80105830: a1 bc a5 10 80 mov 0x8010a5bc,%eax
{
80105835: 55 push %ebp
80105836: 89 e5 mov %esp,%ebp
if(!uart)
80105838: 85 c0 test %eax,%eax
8010583a: 74 14 je 80105850 <uartgetc+0x20>
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
8010583c: ba fd 03 00 00 mov $0x3fd,%edx
80105841: ec in (%dx),%al
return -1;
if(!(inb(COM1+5) & 0x01))
80105842: a8 01 test $0x1,%al
80105844: 74 0a je 80105850 <uartgetc+0x20>
80105846: b2 f8 mov $0xf8,%dl
80105848: ec in (%dx),%al
return -1;
return inb(COM1+0);
80105849: 0f b6 c0 movzbl %al,%eax
}
8010584c: 5d pop %ebp
8010584d: c3 ret
8010584e: 66 90 xchg %ax,%ax
return -1;
80105850: b8 ff ff ff ff mov $0xffffffff,%eax
}
80105855: 5d pop %ebp
80105856: c3 ret
80105857: 89 f6 mov %esi,%esi
80105859: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80105860 <uartputc>:
if(!uart)
80105860: a1 bc a5 10 80 mov 0x8010a5bc,%eax
80105865: 85 c0 test %eax,%eax
80105867: 74 3f je 801058a8 <uartputc+0x48>
{
80105869: 55 push %ebp
8010586a: 89 e5 mov %esp,%ebp
8010586c: 56 push %esi
8010586d: be fd 03 00 00 mov $0x3fd,%esi
80105872: 53 push %ebx
if(!uart)
80105873: bb 80 00 00 00 mov $0x80,%ebx
{
80105878: 83 ec 10 sub $0x10,%esp
8010587b: eb 14 jmp 80105891 <uartputc+0x31>
8010587d: 8d 76 00 lea 0x0(%esi),%esi
microdelay(10);
80105880: c7 04 24 0a 00 00 00 movl $0xa,(%esp)
80105887: e8 14 cf ff ff call 801027a0 <microdelay>
for(i = 0; i < 128 && !(inb(COM1+5) & 0x20); i++)
8010588c: 83 eb 01 sub $0x1,%ebx
8010588f: 74 07 je 80105898 <uartputc+0x38>
80105891: 89 f2 mov %esi,%edx
80105893: ec in (%dx),%al
80105894: a8 20 test $0x20,%al
80105896: 74 e8 je 80105880 <uartputc+0x20>
outb(COM1+0, c);
80105898: 0f b6 45 08 movzbl 0x8(%ebp),%eax
asm volatile("out %0,%1" : : "a" (data), "d" (port));
8010589c: ba f8 03 00 00 mov $0x3f8,%edx
801058a1: ee out %al,(%dx)
}
801058a2: 83 c4 10 add $0x10,%esp
801058a5: 5b pop %ebx
801058a6: 5e pop %esi
801058a7: 5d pop %ebp
801058a8: f3 c3 repz ret
801058aa: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801058b0 <uartinit>:
{
801058b0: 55 push %ebp
801058b1: 31 c9 xor %ecx,%ecx
801058b3: 89 e5 mov %esp,%ebp
801058b5: 89 c8 mov %ecx,%eax
801058b7: 57 push %edi
801058b8: bf fa 03 00 00 mov $0x3fa,%edi
801058bd: 56 push %esi
801058be: 89 fa mov %edi,%edx
801058c0: 53 push %ebx
801058c1: 83 ec 1c sub $0x1c,%esp
801058c4: ee out %al,(%dx)
801058c5: be fb 03 00 00 mov $0x3fb,%esi
801058ca: b8 80 ff ff ff mov $0xffffff80,%eax
801058cf: 89 f2 mov %esi,%edx
801058d1: ee out %al,(%dx)
801058d2: b8 0c 00 00 00 mov $0xc,%eax
801058d7: b2 f8 mov $0xf8,%dl
801058d9: ee out %al,(%dx)
801058da: bb f9 03 00 00 mov $0x3f9,%ebx
801058df: 89 c8 mov %ecx,%eax
801058e1: 89 da mov %ebx,%edx
801058e3: ee out %al,(%dx)
801058e4: b8 03 00 00 00 mov $0x3,%eax
801058e9: 89 f2 mov %esi,%edx
801058eb: ee out %al,(%dx)
801058ec: b2 fc mov $0xfc,%dl
801058ee: 89 c8 mov %ecx,%eax
801058f0: ee out %al,(%dx)
801058f1: b8 01 00 00 00 mov $0x1,%eax
801058f6: 89 da mov %ebx,%edx
801058f8: ee out %al,(%dx)
asm volatile("in %1,%0" : "=a" (data) : "d" (port));
801058f9: b2 fd mov $0xfd,%dl
801058fb: ec in (%dx),%al
if(inb(COM1+5) == 0xFF)
801058fc: 3c ff cmp $0xff,%al
801058fe: 74 42 je 80105942 <uartinit+0x92>
uart = 1;
80105900: c7 05 bc a5 10 80 01 movl $0x1,0x8010a5bc
80105907: 00 00 00
8010590a: 89 fa mov %edi,%edx
8010590c: ec in (%dx),%al
8010590d: b2 f8 mov $0xf8,%dl
8010590f: ec in (%dx),%al
ioapicenable(IRQ_COM1, 0);
80105910: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80105917: 00
for(p="xv6...\n"; *p; p++)
80105918: bb 34 78 10 80 mov $0x80107834,%ebx
ioapicenable(IRQ_COM1, 0);
8010591d: c7 04 24 04 00 00 00 movl $0x4,(%esp)
80105924: e8 87 c9 ff ff call 801022b0 <ioapicenable>
for(p="xv6...\n"; *p; p++)
80105929: b8 78 00 00 00 mov $0x78,%eax
8010592e: 66 90 xchg %ax,%ax
uartputc(*p);
80105930: 89 04 24 mov %eax,(%esp)
for(p="xv6...\n"; *p; p++)
80105933: 83 c3 01 add $0x1,%ebx
uartputc(*p);
80105936: e8 25 ff ff ff call 80105860 <uartputc>
for(p="xv6...\n"; *p; p++)
8010593b: 0f be 03 movsbl (%ebx),%eax
8010593e: 84 c0 test %al,%al
80105940: 75 ee jne 80105930 <uartinit+0x80>
}
80105942: 83 c4 1c add $0x1c,%esp
80105945: 5b pop %ebx
80105946: 5e pop %esi
80105947: 5f pop %edi
80105948: 5d pop %ebp
80105949: c3 ret
8010594a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80105950 <uartintr>:
void
uartintr(void)
{
80105950: 55 push %ebp
80105951: 89 e5 mov %esp,%ebp
80105953: 83 ec 18 sub $0x18,%esp
consoleintr(uartgetc);
80105956: c7 04 24 30 58 10 80 movl $0x80105830,(%esp)
8010595d: e8 4e ae ff ff call 801007b0 <consoleintr>
}
80105962: c9 leave
80105963: c3 ret
80105964 <vector0>:
# generated by vectors.pl - do not edit
# handlers
.globl alltraps
.globl vector0
vector0:
pushl $0
80105964: 6a 00 push $0x0
pushl $0
80105966: 6a 00 push $0x0
jmp alltraps
80105968: e9 b0 fa ff ff jmp 8010541d <alltraps>
8010596d <vector1>:
.globl vector1
vector1:
pushl $0
8010596d: 6a 00 push $0x0
pushl $1
8010596f: 6a 01 push $0x1
jmp alltraps
80105971: e9 a7 fa ff ff jmp 8010541d <alltraps>
80105976 <vector2>:
.globl vector2
vector2:
pushl $0
80105976: 6a 00 push $0x0
pushl $2
80105978: 6a 02 push $0x2
jmp alltraps
8010597a: e9 9e fa ff ff jmp 8010541d <alltraps>
8010597f <vector3>:
.globl vector3
vector3:
pushl $0
8010597f: 6a 00 push $0x0
pushl $3
80105981: 6a 03 push $0x3
jmp alltraps
80105983: e9 95 fa ff ff jmp 8010541d <alltraps>
80105988 <vector4>:
.globl vector4
vector4:
pushl $0
80105988: 6a 00 push $0x0
pushl $4
8010598a: 6a 04 push $0x4
jmp alltraps
8010598c: e9 8c fa ff ff jmp 8010541d <alltraps>
80105991 <vector5>:
.globl vector5
vector5:
pushl $0
80105991: 6a 00 push $0x0
pushl $5
80105993: 6a 05 push $0x5
jmp alltraps
80105995: e9 83 fa ff ff jmp 8010541d <alltraps>
8010599a <vector6>:
.globl vector6
vector6:
pushl $0
8010599a: 6a 00 push $0x0
pushl $6
8010599c: 6a 06 push $0x6
jmp alltraps
8010599e: e9 7a fa ff ff jmp 8010541d <alltraps>
801059a3 <vector7>:
.globl vector7
vector7:
pushl $0
801059a3: 6a 00 push $0x0
pushl $7
801059a5: 6a 07 push $0x7
jmp alltraps
801059a7: e9 71 fa ff ff jmp 8010541d <alltraps>
801059ac <vector8>:
.globl vector8
vector8:
pushl $8
801059ac: 6a 08 push $0x8
jmp alltraps
801059ae: e9 6a fa ff ff jmp 8010541d <alltraps>
801059b3 <vector9>:
.globl vector9
vector9:
pushl $0
801059b3: 6a 00 push $0x0
pushl $9
801059b5: 6a 09 push $0x9
jmp alltraps
801059b7: e9 61 fa ff ff jmp 8010541d <alltraps>
801059bc <vector10>:
.globl vector10
vector10:
pushl $10
801059bc: 6a 0a push $0xa
jmp alltraps
801059be: e9 5a fa ff ff jmp 8010541d <alltraps>
801059c3 <vector11>:
.globl vector11
vector11:
pushl $11
801059c3: 6a 0b push $0xb
jmp alltraps
801059c5: e9 53 fa ff ff jmp 8010541d <alltraps>
801059ca <vector12>:
.globl vector12
vector12:
pushl $12
801059ca: 6a 0c push $0xc
jmp alltraps
801059cc: e9 4c fa ff ff jmp 8010541d <alltraps>
801059d1 <vector13>:
.globl vector13
vector13:
pushl $13
801059d1: 6a 0d push $0xd
jmp alltraps
801059d3: e9 45 fa ff ff jmp 8010541d <alltraps>
801059d8 <vector14>:
.globl vector14
vector14:
pushl $14
801059d8: 6a 0e push $0xe
jmp alltraps
801059da: e9 3e fa ff ff jmp 8010541d <alltraps>
801059df <vector15>:
.globl vector15
vector15:
pushl $0
801059df: 6a 00 push $0x0
pushl $15
801059e1: 6a 0f push $0xf
jmp alltraps
801059e3: e9 35 fa ff ff jmp 8010541d <alltraps>
801059e8 <vector16>:
.globl vector16
vector16:
pushl $0
801059e8: 6a 00 push $0x0
pushl $16
801059ea: 6a 10 push $0x10
jmp alltraps
801059ec: e9 2c fa ff ff jmp 8010541d <alltraps>
801059f1 <vector17>:
.globl vector17
vector17:
pushl $17
801059f1: 6a 11 push $0x11
jmp alltraps
801059f3: e9 25 fa ff ff jmp 8010541d <alltraps>
801059f8 <vector18>:
.globl vector18
vector18:
pushl $0
801059f8: 6a 00 push $0x0
pushl $18
801059fa: 6a 12 push $0x12
jmp alltraps
801059fc: e9 1c fa ff ff jmp 8010541d <alltraps>
80105a01 <vector19>:
.globl vector19
vector19:
pushl $0
80105a01: 6a 00 push $0x0
pushl $19
80105a03: 6a 13 push $0x13
jmp alltraps
80105a05: e9 13 fa ff ff jmp 8010541d <alltraps>
80105a0a <vector20>:
.globl vector20
vector20:
pushl $0
80105a0a: 6a 00 push $0x0
pushl $20
80105a0c: 6a 14 push $0x14
jmp alltraps
80105a0e: e9 0a fa ff ff jmp 8010541d <alltraps>
80105a13 <vector21>:
.globl vector21
vector21:
pushl $0
80105a13: 6a 00 push $0x0
pushl $21
80105a15: 6a 15 push $0x15
jmp alltraps
80105a17: e9 01 fa ff ff jmp 8010541d <alltraps>
80105a1c <vector22>:
.globl vector22
vector22:
pushl $0
80105a1c: 6a 00 push $0x0
pushl $22
80105a1e: 6a 16 push $0x16
jmp alltraps
80105a20: e9 f8 f9 ff ff jmp 8010541d <alltraps>
80105a25 <vector23>:
.globl vector23
vector23:
pushl $0
80105a25: 6a 00 push $0x0
pushl $23
80105a27: 6a 17 push $0x17
jmp alltraps
80105a29: e9 ef f9 ff ff jmp 8010541d <alltraps>
80105a2e <vector24>:
.globl vector24
vector24:
pushl $0
80105a2e: 6a 00 push $0x0
pushl $24
80105a30: 6a 18 push $0x18
jmp alltraps
80105a32: e9 e6 f9 ff ff jmp 8010541d <alltraps>
80105a37 <vector25>:
.globl vector25
vector25:
pushl $0
80105a37: 6a 00 push $0x0
pushl $25
80105a39: 6a 19 push $0x19
jmp alltraps
80105a3b: e9 dd f9 ff ff jmp 8010541d <alltraps>
80105a40 <vector26>:
.globl vector26
vector26:
pushl $0
80105a40: 6a 00 push $0x0
pushl $26
80105a42: 6a 1a push $0x1a
jmp alltraps
80105a44: e9 d4 f9 ff ff jmp 8010541d <alltraps>
80105a49 <vector27>:
.globl vector27
vector27:
pushl $0
80105a49: 6a 00 push $0x0
pushl $27
80105a4b: 6a 1b push $0x1b
jmp alltraps
80105a4d: e9 cb f9 ff ff jmp 8010541d <alltraps>
80105a52 <vector28>:
.globl vector28
vector28:
pushl $0
80105a52: 6a 00 push $0x0
pushl $28
80105a54: 6a 1c push $0x1c
jmp alltraps
80105a56: e9 c2 f9 ff ff jmp 8010541d <alltraps>
80105a5b <vector29>:
.globl vector29
vector29:
pushl $0
80105a5b: 6a 00 push $0x0
pushl $29
80105a5d: 6a 1d push $0x1d
jmp alltraps
80105a5f: e9 b9 f9 ff ff jmp 8010541d <alltraps>
80105a64 <vector30>:
.globl vector30
vector30:
pushl $0
80105a64: 6a 00 push $0x0
pushl $30
80105a66: 6a 1e push $0x1e
jmp alltraps
80105a68: e9 b0 f9 ff ff jmp 8010541d <alltraps>
80105a6d <vector31>:
.globl vector31
vector31:
pushl $0
80105a6d: 6a 00 push $0x0
pushl $31
80105a6f: 6a 1f push $0x1f
jmp alltraps
80105a71: e9 a7 f9 ff ff jmp 8010541d <alltraps>
80105a76 <vector32>:
.globl vector32
vector32:
pushl $0
80105a76: 6a 00 push $0x0
pushl $32
80105a78: 6a 20 push $0x20
jmp alltraps
80105a7a: e9 9e f9 ff ff jmp 8010541d <alltraps>
80105a7f <vector33>:
.globl vector33
vector33:
pushl $0
80105a7f: 6a 00 push $0x0
pushl $33
80105a81: 6a 21 push $0x21
jmp alltraps
80105a83: e9 95 f9 ff ff jmp 8010541d <alltraps>
80105a88 <vector34>:
.globl vector34
vector34:
pushl $0
80105a88: 6a 00 push $0x0
pushl $34
80105a8a: 6a 22 push $0x22
jmp alltraps
80105a8c: e9 8c f9 ff ff jmp 8010541d <alltraps>
80105a91 <vector35>:
.globl vector35
vector35:
pushl $0
80105a91: 6a 00 push $0x0
pushl $35
80105a93: 6a 23 push $0x23
jmp alltraps
80105a95: e9 83 f9 ff ff jmp 8010541d <alltraps>
80105a9a <vector36>:
.globl vector36
vector36:
pushl $0
80105a9a: 6a 00 push $0x0
pushl $36
80105a9c: 6a 24 push $0x24
jmp alltraps
80105a9e: e9 7a f9 ff ff jmp 8010541d <alltraps>
80105aa3 <vector37>:
.globl vector37
vector37:
pushl $0
80105aa3: 6a 00 push $0x0
pushl $37
80105aa5: 6a 25 push $0x25
jmp alltraps
80105aa7: e9 71 f9 ff ff jmp 8010541d <alltraps>
80105aac <vector38>:
.globl vector38
vector38:
pushl $0
80105aac: 6a 00 push $0x0
pushl $38
80105aae: 6a 26 push $0x26
jmp alltraps
80105ab0: e9 68 f9 ff ff jmp 8010541d <alltraps>
80105ab5 <vector39>:
.globl vector39
vector39:
pushl $0
80105ab5: 6a 00 push $0x0
pushl $39
80105ab7: 6a 27 push $0x27
jmp alltraps
80105ab9: e9 5f f9 ff ff jmp 8010541d <alltraps>
80105abe <vector40>:
.globl vector40
vector40:
pushl $0
80105abe: 6a 00 push $0x0
pushl $40
80105ac0: 6a 28 push $0x28
jmp alltraps
80105ac2: e9 56 f9 ff ff jmp 8010541d <alltraps>
80105ac7 <vector41>:
.globl vector41
vector41:
pushl $0
80105ac7: 6a 00 push $0x0
pushl $41
80105ac9: 6a 29 push $0x29
jmp alltraps
80105acb: e9 4d f9 ff ff jmp 8010541d <alltraps>
80105ad0 <vector42>:
.globl vector42
vector42:
pushl $0
80105ad0: 6a 00 push $0x0
pushl $42
80105ad2: 6a 2a push $0x2a
jmp alltraps
80105ad4: e9 44 f9 ff ff jmp 8010541d <alltraps>
80105ad9 <vector43>:
.globl vector43
vector43:
pushl $0
80105ad9: 6a 00 push $0x0
pushl $43
80105adb: 6a 2b push $0x2b
jmp alltraps
80105add: e9 3b f9 ff ff jmp 8010541d <alltraps>
80105ae2 <vector44>:
.globl vector44
vector44:
pushl $0
80105ae2: 6a 00 push $0x0
pushl $44
80105ae4: 6a 2c push $0x2c
jmp alltraps
80105ae6: e9 32 f9 ff ff jmp 8010541d <alltraps>
80105aeb <vector45>:
.globl vector45
vector45:
pushl $0
80105aeb: 6a 00 push $0x0
pushl $45
80105aed: 6a 2d push $0x2d
jmp alltraps
80105aef: e9 29 f9 ff ff jmp 8010541d <alltraps>
80105af4 <vector46>:
.globl vector46
vector46:
pushl $0
80105af4: 6a 00 push $0x0
pushl $46
80105af6: 6a 2e push $0x2e
jmp alltraps
80105af8: e9 20 f9 ff ff jmp 8010541d <alltraps>
80105afd <vector47>:
.globl vector47
vector47:
pushl $0
80105afd: 6a 00 push $0x0
pushl $47
80105aff: 6a 2f push $0x2f
jmp alltraps
80105b01: e9 17 f9 ff ff jmp 8010541d <alltraps>
80105b06 <vector48>:
.globl vector48
vector48:
pushl $0
80105b06: 6a 00 push $0x0
pushl $48
80105b08: 6a 30 push $0x30
jmp alltraps
80105b0a: e9 0e f9 ff ff jmp 8010541d <alltraps>
80105b0f <vector49>:
.globl vector49
vector49:
pushl $0
80105b0f: 6a 00 push $0x0
pushl $49
80105b11: 6a 31 push $0x31
jmp alltraps
80105b13: e9 05 f9 ff ff jmp 8010541d <alltraps>
80105b18 <vector50>:
.globl vector50
vector50:
pushl $0
80105b18: 6a 00 push $0x0
pushl $50
80105b1a: 6a 32 push $0x32
jmp alltraps
80105b1c: e9 fc f8 ff ff jmp 8010541d <alltraps>
80105b21 <vector51>:
.globl vector51
vector51:
pushl $0
80105b21: 6a 00 push $0x0
pushl $51
80105b23: 6a 33 push $0x33
jmp alltraps
80105b25: e9 f3 f8 ff ff jmp 8010541d <alltraps>
80105b2a <vector52>:
.globl vector52
vector52:
pushl $0
80105b2a: 6a 00 push $0x0
pushl $52
80105b2c: 6a 34 push $0x34
jmp alltraps
80105b2e: e9 ea f8 ff ff jmp 8010541d <alltraps>
80105b33 <vector53>:
.globl vector53
vector53:
pushl $0
80105b33: 6a 00 push $0x0
pushl $53
80105b35: 6a 35 push $0x35
jmp alltraps
80105b37: e9 e1 f8 ff ff jmp 8010541d <alltraps>
80105b3c <vector54>:
.globl vector54
vector54:
pushl $0
80105b3c: 6a 00 push $0x0
pushl $54
80105b3e: 6a 36 push $0x36
jmp alltraps
80105b40: e9 d8 f8 ff ff jmp 8010541d <alltraps>
80105b45 <vector55>:
.globl vector55
vector55:
pushl $0
80105b45: 6a 00 push $0x0
pushl $55
80105b47: 6a 37 push $0x37
jmp alltraps
80105b49: e9 cf f8 ff ff jmp 8010541d <alltraps>
80105b4e <vector56>:
.globl vector56
vector56:
pushl $0
80105b4e: 6a 00 push $0x0
pushl $56
80105b50: 6a 38 push $0x38
jmp alltraps
80105b52: e9 c6 f8 ff ff jmp 8010541d <alltraps>
80105b57 <vector57>:
.globl vector57
vector57:
pushl $0
80105b57: 6a 00 push $0x0
pushl $57
80105b59: 6a 39 push $0x39
jmp alltraps
80105b5b: e9 bd f8 ff ff jmp 8010541d <alltraps>
80105b60 <vector58>:
.globl vector58
vector58:
pushl $0
80105b60: 6a 00 push $0x0
pushl $58
80105b62: 6a 3a push $0x3a
jmp alltraps
80105b64: e9 b4 f8 ff ff jmp 8010541d <alltraps>
80105b69 <vector59>:
.globl vector59
vector59:
pushl $0
80105b69: 6a 00 push $0x0
pushl $59
80105b6b: 6a 3b push $0x3b
jmp alltraps
80105b6d: e9 ab f8 ff ff jmp 8010541d <alltraps>
80105b72 <vector60>:
.globl vector60
vector60:
pushl $0
80105b72: 6a 00 push $0x0
pushl $60
80105b74: 6a 3c push $0x3c
jmp alltraps
80105b76: e9 a2 f8 ff ff jmp 8010541d <alltraps>
80105b7b <vector61>:
.globl vector61
vector61:
pushl $0
80105b7b: 6a 00 push $0x0
pushl $61
80105b7d: 6a 3d push $0x3d
jmp alltraps
80105b7f: e9 99 f8 ff ff jmp 8010541d <alltraps>
80105b84 <vector62>:
.globl vector62
vector62:
pushl $0
80105b84: 6a 00 push $0x0
pushl $62
80105b86: 6a 3e push $0x3e
jmp alltraps
80105b88: e9 90 f8 ff ff jmp 8010541d <alltraps>
80105b8d <vector63>:
.globl vector63
vector63:
pushl $0
80105b8d: 6a 00 push $0x0
pushl $63
80105b8f: 6a 3f push $0x3f
jmp alltraps
80105b91: e9 87 f8 ff ff jmp 8010541d <alltraps>
80105b96 <vector64>:
.globl vector64
vector64:
pushl $0
80105b96: 6a 00 push $0x0
pushl $64
80105b98: 6a 40 push $0x40
jmp alltraps
80105b9a: e9 7e f8 ff ff jmp 8010541d <alltraps>
80105b9f <vector65>:
.globl vector65
vector65:
pushl $0
80105b9f: 6a 00 push $0x0
pushl $65
80105ba1: 6a 41 push $0x41
jmp alltraps
80105ba3: e9 75 f8 ff ff jmp 8010541d <alltraps>
80105ba8 <vector66>:
.globl vector66
vector66:
pushl $0
80105ba8: 6a 00 push $0x0
pushl $66
80105baa: 6a 42 push $0x42
jmp alltraps
80105bac: e9 6c f8 ff ff jmp 8010541d <alltraps>
80105bb1 <vector67>:
.globl vector67
vector67:
pushl $0
80105bb1: 6a 00 push $0x0
pushl $67
80105bb3: 6a 43 push $0x43
jmp alltraps
80105bb5: e9 63 f8 ff ff jmp 8010541d <alltraps>
80105bba <vector68>:
.globl vector68
vector68:
pushl $0
80105bba: 6a 00 push $0x0
pushl $68
80105bbc: 6a 44 push $0x44
jmp alltraps
80105bbe: e9 5a f8 ff ff jmp 8010541d <alltraps>
80105bc3 <vector69>:
.globl vector69
vector69:
pushl $0
80105bc3: 6a 00 push $0x0
pushl $69
80105bc5: 6a 45 push $0x45
jmp alltraps
80105bc7: e9 51 f8 ff ff jmp 8010541d <alltraps>
80105bcc <vector70>:
.globl vector70
vector70:
pushl $0
80105bcc: 6a 00 push $0x0
pushl $70
80105bce: 6a 46 push $0x46
jmp alltraps
80105bd0: e9 48 f8 ff ff jmp 8010541d <alltraps>
80105bd5 <vector71>:
.globl vector71
vector71:
pushl $0
80105bd5: 6a 00 push $0x0
pushl $71
80105bd7: 6a 47 push $0x47
jmp alltraps
80105bd9: e9 3f f8 ff ff jmp 8010541d <alltraps>
80105bde <vector72>:
.globl vector72
vector72:
pushl $0
80105bde: 6a 00 push $0x0
pushl $72
80105be0: 6a 48 push $0x48
jmp alltraps
80105be2: e9 36 f8 ff ff jmp 8010541d <alltraps>
80105be7 <vector73>:
.globl vector73
vector73:
pushl $0
80105be7: 6a 00 push $0x0
pushl $73
80105be9: 6a 49 push $0x49
jmp alltraps
80105beb: e9 2d f8 ff ff jmp 8010541d <alltraps>
80105bf0 <vector74>:
.globl vector74
vector74:
pushl $0
80105bf0: 6a 00 push $0x0
pushl $74
80105bf2: 6a 4a push $0x4a
jmp alltraps
80105bf4: e9 24 f8 ff ff jmp 8010541d <alltraps>
80105bf9 <vector75>:
.globl vector75
vector75:
pushl $0
80105bf9: 6a 00 push $0x0
pushl $75
80105bfb: 6a 4b push $0x4b
jmp alltraps
80105bfd: e9 1b f8 ff ff jmp 8010541d <alltraps>
80105c02 <vector76>:
.globl vector76
vector76:
pushl $0
80105c02: 6a 00 push $0x0
pushl $76
80105c04: 6a 4c push $0x4c
jmp alltraps
80105c06: e9 12 f8 ff ff jmp 8010541d <alltraps>
80105c0b <vector77>:
.globl vector77
vector77:
pushl $0
80105c0b: 6a 00 push $0x0
pushl $77
80105c0d: 6a 4d push $0x4d
jmp alltraps
80105c0f: e9 09 f8 ff ff jmp 8010541d <alltraps>
80105c14 <vector78>:
.globl vector78
vector78:
pushl $0
80105c14: 6a 00 push $0x0
pushl $78
80105c16: 6a 4e push $0x4e
jmp alltraps
80105c18: e9 00 f8 ff ff jmp 8010541d <alltraps>
80105c1d <vector79>:
.globl vector79
vector79:
pushl $0
80105c1d: 6a 00 push $0x0
pushl $79
80105c1f: 6a 4f push $0x4f
jmp alltraps
80105c21: e9 f7 f7 ff ff jmp 8010541d <alltraps>
80105c26 <vector80>:
.globl vector80
vector80:
pushl $0
80105c26: 6a 00 push $0x0
pushl $80
80105c28: 6a 50 push $0x50
jmp alltraps
80105c2a: e9 ee f7 ff ff jmp 8010541d <alltraps>
80105c2f <vector81>:
.globl vector81
vector81:
pushl $0
80105c2f: 6a 00 push $0x0
pushl $81
80105c31: 6a 51 push $0x51
jmp alltraps
80105c33: e9 e5 f7 ff ff jmp 8010541d <alltraps>
80105c38 <vector82>:
.globl vector82
vector82:
pushl $0
80105c38: 6a 00 push $0x0
pushl $82
80105c3a: 6a 52 push $0x52
jmp alltraps
80105c3c: e9 dc f7 ff ff jmp 8010541d <alltraps>
80105c41 <vector83>:
.globl vector83
vector83:
pushl $0
80105c41: 6a 00 push $0x0
pushl $83
80105c43: 6a 53 push $0x53
jmp alltraps
80105c45: e9 d3 f7 ff ff jmp 8010541d <alltraps>
80105c4a <vector84>:
.globl vector84
vector84:
pushl $0
80105c4a: 6a 00 push $0x0
pushl $84
80105c4c: 6a 54 push $0x54
jmp alltraps
80105c4e: e9 ca f7 ff ff jmp 8010541d <alltraps>
80105c53 <vector85>:
.globl vector85
vector85:
pushl $0
80105c53: 6a 00 push $0x0
pushl $85
80105c55: 6a 55 push $0x55
jmp alltraps
80105c57: e9 c1 f7 ff ff jmp 8010541d <alltraps>
80105c5c <vector86>:
.globl vector86
vector86:
pushl $0
80105c5c: 6a 00 push $0x0
pushl $86
80105c5e: 6a 56 push $0x56
jmp alltraps
80105c60: e9 b8 f7 ff ff jmp 8010541d <alltraps>
80105c65 <vector87>:
.globl vector87
vector87:
pushl $0
80105c65: 6a 00 push $0x0
pushl $87
80105c67: 6a 57 push $0x57
jmp alltraps
80105c69: e9 af f7 ff ff jmp 8010541d <alltraps>
80105c6e <vector88>:
.globl vector88
vector88:
pushl $0
80105c6e: 6a 00 push $0x0
pushl $88
80105c70: 6a 58 push $0x58
jmp alltraps
80105c72: e9 a6 f7 ff ff jmp 8010541d <alltraps>
80105c77 <vector89>:
.globl vector89
vector89:
pushl $0
80105c77: 6a 00 push $0x0
pushl $89
80105c79: 6a 59 push $0x59
jmp alltraps
80105c7b: e9 9d f7 ff ff jmp 8010541d <alltraps>
80105c80 <vector90>:
.globl vector90
vector90:
pushl $0
80105c80: 6a 00 push $0x0
pushl $90
80105c82: 6a 5a push $0x5a
jmp alltraps
80105c84: e9 94 f7 ff ff jmp 8010541d <alltraps>
80105c89 <vector91>:
.globl vector91
vector91:
pushl $0
80105c89: 6a 00 push $0x0
pushl $91
80105c8b: 6a 5b push $0x5b
jmp alltraps
80105c8d: e9 8b f7 ff ff jmp 8010541d <alltraps>
80105c92 <vector92>:
.globl vector92
vector92:
pushl $0
80105c92: 6a 00 push $0x0
pushl $92
80105c94: 6a 5c push $0x5c
jmp alltraps
80105c96: e9 82 f7 ff ff jmp 8010541d <alltraps>
80105c9b <vector93>:
.globl vector93
vector93:
pushl $0
80105c9b: 6a 00 push $0x0
pushl $93
80105c9d: 6a 5d push $0x5d
jmp alltraps
80105c9f: e9 79 f7 ff ff jmp 8010541d <alltraps>
80105ca4 <vector94>:
.globl vector94
vector94:
pushl $0
80105ca4: 6a 00 push $0x0
pushl $94
80105ca6: 6a 5e push $0x5e
jmp alltraps
80105ca8: e9 70 f7 ff ff jmp 8010541d <alltraps>
80105cad <vector95>:
.globl vector95
vector95:
pushl $0
80105cad: 6a 00 push $0x0
pushl $95
80105caf: 6a 5f push $0x5f
jmp alltraps
80105cb1: e9 67 f7 ff ff jmp 8010541d <alltraps>
80105cb6 <vector96>:
.globl vector96
vector96:
pushl $0
80105cb6: 6a 00 push $0x0
pushl $96
80105cb8: 6a 60 push $0x60
jmp alltraps
80105cba: e9 5e f7 ff ff jmp 8010541d <alltraps>
80105cbf <vector97>:
.globl vector97
vector97:
pushl $0
80105cbf: 6a 00 push $0x0
pushl $97
80105cc1: 6a 61 push $0x61
jmp alltraps
80105cc3: e9 55 f7 ff ff jmp 8010541d <alltraps>
80105cc8 <vector98>:
.globl vector98
vector98:
pushl $0
80105cc8: 6a 00 push $0x0
pushl $98
80105cca: 6a 62 push $0x62
jmp alltraps
80105ccc: e9 4c f7 ff ff jmp 8010541d <alltraps>
80105cd1 <vector99>:
.globl vector99
vector99:
pushl $0
80105cd1: 6a 00 push $0x0
pushl $99
80105cd3: 6a 63 push $0x63
jmp alltraps
80105cd5: e9 43 f7 ff ff jmp 8010541d <alltraps>
80105cda <vector100>:
.globl vector100
vector100:
pushl $0
80105cda: 6a 00 push $0x0
pushl $100
80105cdc: 6a 64 push $0x64
jmp alltraps
80105cde: e9 3a f7 ff ff jmp 8010541d <alltraps>
80105ce3 <vector101>:
.globl vector101
vector101:
pushl $0
80105ce3: 6a 00 push $0x0
pushl $101
80105ce5: 6a 65 push $0x65
jmp alltraps
80105ce7: e9 31 f7 ff ff jmp 8010541d <alltraps>
80105cec <vector102>:
.globl vector102
vector102:
pushl $0
80105cec: 6a 00 push $0x0
pushl $102
80105cee: 6a 66 push $0x66
jmp alltraps
80105cf0: e9 28 f7 ff ff jmp 8010541d <alltraps>
80105cf5 <vector103>:
.globl vector103
vector103:
pushl $0
80105cf5: 6a 00 push $0x0
pushl $103
80105cf7: 6a 67 push $0x67
jmp alltraps
80105cf9: e9 1f f7 ff ff jmp 8010541d <alltraps>
80105cfe <vector104>:
.globl vector104
vector104:
pushl $0
80105cfe: 6a 00 push $0x0
pushl $104
80105d00: 6a 68 push $0x68
jmp alltraps
80105d02: e9 16 f7 ff ff jmp 8010541d <alltraps>
80105d07 <vector105>:
.globl vector105
vector105:
pushl $0
80105d07: 6a 00 push $0x0
pushl $105
80105d09: 6a 69 push $0x69
jmp alltraps
80105d0b: e9 0d f7 ff ff jmp 8010541d <alltraps>
80105d10 <vector106>:
.globl vector106
vector106:
pushl $0
80105d10: 6a 00 push $0x0
pushl $106
80105d12: 6a 6a push $0x6a
jmp alltraps
80105d14: e9 04 f7 ff ff jmp 8010541d <alltraps>
80105d19 <vector107>:
.globl vector107
vector107:
pushl $0
80105d19: 6a 00 push $0x0
pushl $107
80105d1b: 6a 6b push $0x6b
jmp alltraps
80105d1d: e9 fb f6 ff ff jmp 8010541d <alltraps>
80105d22 <vector108>:
.globl vector108
vector108:
pushl $0
80105d22: 6a 00 push $0x0
pushl $108
80105d24: 6a 6c push $0x6c
jmp alltraps
80105d26: e9 f2 f6 ff ff jmp 8010541d <alltraps>
80105d2b <vector109>:
.globl vector109
vector109:
pushl $0
80105d2b: 6a 00 push $0x0
pushl $109
80105d2d: 6a 6d push $0x6d
jmp alltraps
80105d2f: e9 e9 f6 ff ff jmp 8010541d <alltraps>
80105d34 <vector110>:
.globl vector110
vector110:
pushl $0
80105d34: 6a 00 push $0x0
pushl $110
80105d36: 6a 6e push $0x6e
jmp alltraps
80105d38: e9 e0 f6 ff ff jmp 8010541d <alltraps>
80105d3d <vector111>:
.globl vector111
vector111:
pushl $0
80105d3d: 6a 00 push $0x0
pushl $111
80105d3f: 6a 6f push $0x6f
jmp alltraps
80105d41: e9 d7 f6 ff ff jmp 8010541d <alltraps>
80105d46 <vector112>:
.globl vector112
vector112:
pushl $0
80105d46: 6a 00 push $0x0
pushl $112
80105d48: 6a 70 push $0x70
jmp alltraps
80105d4a: e9 ce f6 ff ff jmp 8010541d <alltraps>
80105d4f <vector113>:
.globl vector113
vector113:
pushl $0
80105d4f: 6a 00 push $0x0
pushl $113
80105d51: 6a 71 push $0x71
jmp alltraps
80105d53: e9 c5 f6 ff ff jmp 8010541d <alltraps>
80105d58 <vector114>:
.globl vector114
vector114:
pushl $0
80105d58: 6a 00 push $0x0
pushl $114
80105d5a: 6a 72 push $0x72
jmp alltraps
80105d5c: e9 bc f6 ff ff jmp 8010541d <alltraps>
80105d61 <vector115>:
.globl vector115
vector115:
pushl $0
80105d61: 6a 00 push $0x0
pushl $115
80105d63: 6a 73 push $0x73
jmp alltraps
80105d65: e9 b3 f6 ff ff jmp 8010541d <alltraps>
80105d6a <vector116>:
.globl vector116
vector116:
pushl $0
80105d6a: 6a 00 push $0x0
pushl $116
80105d6c: 6a 74 push $0x74
jmp alltraps
80105d6e: e9 aa f6 ff ff jmp 8010541d <alltraps>
80105d73 <vector117>:
.globl vector117
vector117:
pushl $0
80105d73: 6a 00 push $0x0
pushl $117
80105d75: 6a 75 push $0x75
jmp alltraps
80105d77: e9 a1 f6 ff ff jmp 8010541d <alltraps>
80105d7c <vector118>:
.globl vector118
vector118:
pushl $0
80105d7c: 6a 00 push $0x0
pushl $118
80105d7e: 6a 76 push $0x76
jmp alltraps
80105d80: e9 98 f6 ff ff jmp 8010541d <alltraps>
80105d85 <vector119>:
.globl vector119
vector119:
pushl $0
80105d85: 6a 00 push $0x0
pushl $119
80105d87: 6a 77 push $0x77
jmp alltraps
80105d89: e9 8f f6 ff ff jmp 8010541d <alltraps>
80105d8e <vector120>:
.globl vector120
vector120:
pushl $0
80105d8e: 6a 00 push $0x0
pushl $120
80105d90: 6a 78 push $0x78
jmp alltraps
80105d92: e9 86 f6 ff ff jmp 8010541d <alltraps>
80105d97 <vector121>:
.globl vector121
vector121:
pushl $0
80105d97: 6a 00 push $0x0
pushl $121
80105d99: 6a 79 push $0x79
jmp alltraps
80105d9b: e9 7d f6 ff ff jmp 8010541d <alltraps>
80105da0 <vector122>:
.globl vector122
vector122:
pushl $0
80105da0: 6a 00 push $0x0
pushl $122
80105da2: 6a 7a push $0x7a
jmp alltraps
80105da4: e9 74 f6 ff ff jmp 8010541d <alltraps>
80105da9 <vector123>:
.globl vector123
vector123:
pushl $0
80105da9: 6a 00 push $0x0
pushl $123
80105dab: 6a 7b push $0x7b
jmp alltraps
80105dad: e9 6b f6 ff ff jmp 8010541d <alltraps>
80105db2 <vector124>:
.globl vector124
vector124:
pushl $0
80105db2: 6a 00 push $0x0
pushl $124
80105db4: 6a 7c push $0x7c
jmp alltraps
80105db6: e9 62 f6 ff ff jmp 8010541d <alltraps>
80105dbb <vector125>:
.globl vector125
vector125:
pushl $0
80105dbb: 6a 00 push $0x0
pushl $125
80105dbd: 6a 7d push $0x7d
jmp alltraps
80105dbf: e9 59 f6 ff ff jmp 8010541d <alltraps>
80105dc4 <vector126>:
.globl vector126
vector126:
pushl $0
80105dc4: 6a 00 push $0x0
pushl $126
80105dc6: 6a 7e push $0x7e
jmp alltraps
80105dc8: e9 50 f6 ff ff jmp 8010541d <alltraps>
80105dcd <vector127>:
.globl vector127
vector127:
pushl $0
80105dcd: 6a 00 push $0x0
pushl $127
80105dcf: 6a 7f push $0x7f
jmp alltraps
80105dd1: e9 47 f6 ff ff jmp 8010541d <alltraps>
80105dd6 <vector128>:
.globl vector128
vector128:
pushl $0
80105dd6: 6a 00 push $0x0
pushl $128
80105dd8: 68 80 00 00 00 push $0x80
jmp alltraps
80105ddd: e9 3b f6 ff ff jmp 8010541d <alltraps>
80105de2 <vector129>:
.globl vector129
vector129:
pushl $0
80105de2: 6a 00 push $0x0
pushl $129
80105de4: 68 81 00 00 00 push $0x81
jmp alltraps
80105de9: e9 2f f6 ff ff jmp 8010541d <alltraps>
80105dee <vector130>:
.globl vector130
vector130:
pushl $0
80105dee: 6a 00 push $0x0
pushl $130
80105df0: 68 82 00 00 00 push $0x82
jmp alltraps
80105df5: e9 23 f6 ff ff jmp 8010541d <alltraps>
80105dfa <vector131>:
.globl vector131
vector131:
pushl $0
80105dfa: 6a 00 push $0x0
pushl $131
80105dfc: 68 83 00 00 00 push $0x83
jmp alltraps
80105e01: e9 17 f6 ff ff jmp 8010541d <alltraps>
80105e06 <vector132>:
.globl vector132
vector132:
pushl $0
80105e06: 6a 00 push $0x0
pushl $132
80105e08: 68 84 00 00 00 push $0x84
jmp alltraps
80105e0d: e9 0b f6 ff ff jmp 8010541d <alltraps>
80105e12 <vector133>:
.globl vector133
vector133:
pushl $0
80105e12: 6a 00 push $0x0
pushl $133
80105e14: 68 85 00 00 00 push $0x85
jmp alltraps
80105e19: e9 ff f5 ff ff jmp 8010541d <alltraps>
80105e1e <vector134>:
.globl vector134
vector134:
pushl $0
80105e1e: 6a 00 push $0x0
pushl $134
80105e20: 68 86 00 00 00 push $0x86
jmp alltraps
80105e25: e9 f3 f5 ff ff jmp 8010541d <alltraps>
80105e2a <vector135>:
.globl vector135
vector135:
pushl $0
80105e2a: 6a 00 push $0x0
pushl $135
80105e2c: 68 87 00 00 00 push $0x87
jmp alltraps
80105e31: e9 e7 f5 ff ff jmp 8010541d <alltraps>
80105e36 <vector136>:
.globl vector136
vector136:
pushl $0
80105e36: 6a 00 push $0x0
pushl $136
80105e38: 68 88 00 00 00 push $0x88
jmp alltraps
80105e3d: e9 db f5 ff ff jmp 8010541d <alltraps>
80105e42 <vector137>:
.globl vector137
vector137:
pushl $0
80105e42: 6a 00 push $0x0
pushl $137
80105e44: 68 89 00 00 00 push $0x89
jmp alltraps
80105e49: e9 cf f5 ff ff jmp 8010541d <alltraps>
80105e4e <vector138>:
.globl vector138
vector138:
pushl $0
80105e4e: 6a 00 push $0x0
pushl $138
80105e50: 68 8a 00 00 00 push $0x8a
jmp alltraps
80105e55: e9 c3 f5 ff ff jmp 8010541d <alltraps>
80105e5a <vector139>:
.globl vector139
vector139:
pushl $0
80105e5a: 6a 00 push $0x0
pushl $139
80105e5c: 68 8b 00 00 00 push $0x8b
jmp alltraps
80105e61: e9 b7 f5 ff ff jmp 8010541d <alltraps>
80105e66 <vector140>:
.globl vector140
vector140:
pushl $0
80105e66: 6a 00 push $0x0
pushl $140
80105e68: 68 8c 00 00 00 push $0x8c
jmp alltraps
80105e6d: e9 ab f5 ff ff jmp 8010541d <alltraps>
80105e72 <vector141>:
.globl vector141
vector141:
pushl $0
80105e72: 6a 00 push $0x0
pushl $141
80105e74: 68 8d 00 00 00 push $0x8d
jmp alltraps
80105e79: e9 9f f5 ff ff jmp 8010541d <alltraps>
80105e7e <vector142>:
.globl vector142
vector142:
pushl $0
80105e7e: 6a 00 push $0x0
pushl $142
80105e80: 68 8e 00 00 00 push $0x8e
jmp alltraps
80105e85: e9 93 f5 ff ff jmp 8010541d <alltraps>
80105e8a <vector143>:
.globl vector143
vector143:
pushl $0
80105e8a: 6a 00 push $0x0
pushl $143
80105e8c: 68 8f 00 00 00 push $0x8f
jmp alltraps
80105e91: e9 87 f5 ff ff jmp 8010541d <alltraps>
80105e96 <vector144>:
.globl vector144
vector144:
pushl $0
80105e96: 6a 00 push $0x0
pushl $144
80105e98: 68 90 00 00 00 push $0x90
jmp alltraps
80105e9d: e9 7b f5 ff ff jmp 8010541d <alltraps>
80105ea2 <vector145>:
.globl vector145
vector145:
pushl $0
80105ea2: 6a 00 push $0x0
pushl $145
80105ea4: 68 91 00 00 00 push $0x91
jmp alltraps
80105ea9: e9 6f f5 ff ff jmp 8010541d <alltraps>
80105eae <vector146>:
.globl vector146
vector146:
pushl $0
80105eae: 6a 00 push $0x0
pushl $146
80105eb0: 68 92 00 00 00 push $0x92
jmp alltraps
80105eb5: e9 63 f5 ff ff jmp 8010541d <alltraps>
80105eba <vector147>:
.globl vector147
vector147:
pushl $0
80105eba: 6a 00 push $0x0
pushl $147
80105ebc: 68 93 00 00 00 push $0x93
jmp alltraps
80105ec1: e9 57 f5 ff ff jmp 8010541d <alltraps>
80105ec6 <vector148>:
.globl vector148
vector148:
pushl $0
80105ec6: 6a 00 push $0x0
pushl $148
80105ec8: 68 94 00 00 00 push $0x94
jmp alltraps
80105ecd: e9 4b f5 ff ff jmp 8010541d <alltraps>
80105ed2 <vector149>:
.globl vector149
vector149:
pushl $0
80105ed2: 6a 00 push $0x0
pushl $149
80105ed4: 68 95 00 00 00 push $0x95
jmp alltraps
80105ed9: e9 3f f5 ff ff jmp 8010541d <alltraps>
80105ede <vector150>:
.globl vector150
vector150:
pushl $0
80105ede: 6a 00 push $0x0
pushl $150
80105ee0: 68 96 00 00 00 push $0x96
jmp alltraps
80105ee5: e9 33 f5 ff ff jmp 8010541d <alltraps>
80105eea <vector151>:
.globl vector151
vector151:
pushl $0
80105eea: 6a 00 push $0x0
pushl $151
80105eec: 68 97 00 00 00 push $0x97
jmp alltraps
80105ef1: e9 27 f5 ff ff jmp 8010541d <alltraps>
80105ef6 <vector152>:
.globl vector152
vector152:
pushl $0
80105ef6: 6a 00 push $0x0
pushl $152
80105ef8: 68 98 00 00 00 push $0x98
jmp alltraps
80105efd: e9 1b f5 ff ff jmp 8010541d <alltraps>
80105f02 <vector153>:
.globl vector153
vector153:
pushl $0
80105f02: 6a 00 push $0x0
pushl $153
80105f04: 68 99 00 00 00 push $0x99
jmp alltraps
80105f09: e9 0f f5 ff ff jmp 8010541d <alltraps>
80105f0e <vector154>:
.globl vector154
vector154:
pushl $0
80105f0e: 6a 00 push $0x0
pushl $154
80105f10: 68 9a 00 00 00 push $0x9a
jmp alltraps
80105f15: e9 03 f5 ff ff jmp 8010541d <alltraps>
80105f1a <vector155>:
.globl vector155
vector155:
pushl $0
80105f1a: 6a 00 push $0x0
pushl $155
80105f1c: 68 9b 00 00 00 push $0x9b
jmp alltraps
80105f21: e9 f7 f4 ff ff jmp 8010541d <alltraps>
80105f26 <vector156>:
.globl vector156
vector156:
pushl $0
80105f26: 6a 00 push $0x0
pushl $156
80105f28: 68 9c 00 00 00 push $0x9c
jmp alltraps
80105f2d: e9 eb f4 ff ff jmp 8010541d <alltraps>
80105f32 <vector157>:
.globl vector157
vector157:
pushl $0
80105f32: 6a 00 push $0x0
pushl $157
80105f34: 68 9d 00 00 00 push $0x9d
jmp alltraps
80105f39: e9 df f4 ff ff jmp 8010541d <alltraps>
80105f3e <vector158>:
.globl vector158
vector158:
pushl $0
80105f3e: 6a 00 push $0x0
pushl $158
80105f40: 68 9e 00 00 00 push $0x9e
jmp alltraps
80105f45: e9 d3 f4 ff ff jmp 8010541d <alltraps>
80105f4a <vector159>:
.globl vector159
vector159:
pushl $0
80105f4a: 6a 00 push $0x0
pushl $159
80105f4c: 68 9f 00 00 00 push $0x9f
jmp alltraps
80105f51: e9 c7 f4 ff ff jmp 8010541d <alltraps>
80105f56 <vector160>:
.globl vector160
vector160:
pushl $0
80105f56: 6a 00 push $0x0
pushl $160
80105f58: 68 a0 00 00 00 push $0xa0
jmp alltraps
80105f5d: e9 bb f4 ff ff jmp 8010541d <alltraps>
80105f62 <vector161>:
.globl vector161
vector161:
pushl $0
80105f62: 6a 00 push $0x0
pushl $161
80105f64: 68 a1 00 00 00 push $0xa1
jmp alltraps
80105f69: e9 af f4 ff ff jmp 8010541d <alltraps>
80105f6e <vector162>:
.globl vector162
vector162:
pushl $0
80105f6e: 6a 00 push $0x0
pushl $162
80105f70: 68 a2 00 00 00 push $0xa2
jmp alltraps
80105f75: e9 a3 f4 ff ff jmp 8010541d <alltraps>
80105f7a <vector163>:
.globl vector163
vector163:
pushl $0
80105f7a: 6a 00 push $0x0
pushl $163
80105f7c: 68 a3 00 00 00 push $0xa3
jmp alltraps
80105f81: e9 97 f4 ff ff jmp 8010541d <alltraps>
80105f86 <vector164>:
.globl vector164
vector164:
pushl $0
80105f86: 6a 00 push $0x0
pushl $164
80105f88: 68 a4 00 00 00 push $0xa4
jmp alltraps
80105f8d: e9 8b f4 ff ff jmp 8010541d <alltraps>
80105f92 <vector165>:
.globl vector165
vector165:
pushl $0
80105f92: 6a 00 push $0x0
pushl $165
80105f94: 68 a5 00 00 00 push $0xa5
jmp alltraps
80105f99: e9 7f f4 ff ff jmp 8010541d <alltraps>
80105f9e <vector166>:
.globl vector166
vector166:
pushl $0
80105f9e: 6a 00 push $0x0
pushl $166
80105fa0: 68 a6 00 00 00 push $0xa6
jmp alltraps
80105fa5: e9 73 f4 ff ff jmp 8010541d <alltraps>
80105faa <vector167>:
.globl vector167
vector167:
pushl $0
80105faa: 6a 00 push $0x0
pushl $167
80105fac: 68 a7 00 00 00 push $0xa7
jmp alltraps
80105fb1: e9 67 f4 ff ff jmp 8010541d <alltraps>
80105fb6 <vector168>:
.globl vector168
vector168:
pushl $0
80105fb6: 6a 00 push $0x0
pushl $168
80105fb8: 68 a8 00 00 00 push $0xa8
jmp alltraps
80105fbd: e9 5b f4 ff ff jmp 8010541d <alltraps>
80105fc2 <vector169>:
.globl vector169
vector169:
pushl $0
80105fc2: 6a 00 push $0x0
pushl $169
80105fc4: 68 a9 00 00 00 push $0xa9
jmp alltraps
80105fc9: e9 4f f4 ff ff jmp 8010541d <alltraps>
80105fce <vector170>:
.globl vector170
vector170:
pushl $0
80105fce: 6a 00 push $0x0
pushl $170
80105fd0: 68 aa 00 00 00 push $0xaa
jmp alltraps
80105fd5: e9 43 f4 ff ff jmp 8010541d <alltraps>
80105fda <vector171>:
.globl vector171
vector171:
pushl $0
80105fda: 6a 00 push $0x0
pushl $171
80105fdc: 68 ab 00 00 00 push $0xab
jmp alltraps
80105fe1: e9 37 f4 ff ff jmp 8010541d <alltraps>
80105fe6 <vector172>:
.globl vector172
vector172:
pushl $0
80105fe6: 6a 00 push $0x0
pushl $172
80105fe8: 68 ac 00 00 00 push $0xac
jmp alltraps
80105fed: e9 2b f4 ff ff jmp 8010541d <alltraps>
80105ff2 <vector173>:
.globl vector173
vector173:
pushl $0
80105ff2: 6a 00 push $0x0
pushl $173
80105ff4: 68 ad 00 00 00 push $0xad
jmp alltraps
80105ff9: e9 1f f4 ff ff jmp 8010541d <alltraps>
80105ffe <vector174>:
.globl vector174
vector174:
pushl $0
80105ffe: 6a 00 push $0x0
pushl $174
80106000: 68 ae 00 00 00 push $0xae
jmp alltraps
80106005: e9 13 f4 ff ff jmp 8010541d <alltraps>
8010600a <vector175>:
.globl vector175
vector175:
pushl $0
8010600a: 6a 00 push $0x0
pushl $175
8010600c: 68 af 00 00 00 push $0xaf
jmp alltraps
80106011: e9 07 f4 ff ff jmp 8010541d <alltraps>
80106016 <vector176>:
.globl vector176
vector176:
pushl $0
80106016: 6a 00 push $0x0
pushl $176
80106018: 68 b0 00 00 00 push $0xb0
jmp alltraps
8010601d: e9 fb f3 ff ff jmp 8010541d <alltraps>
80106022 <vector177>:
.globl vector177
vector177:
pushl $0
80106022: 6a 00 push $0x0
pushl $177
80106024: 68 b1 00 00 00 push $0xb1
jmp alltraps
80106029: e9 ef f3 ff ff jmp 8010541d <alltraps>
8010602e <vector178>:
.globl vector178
vector178:
pushl $0
8010602e: 6a 00 push $0x0
pushl $178
80106030: 68 b2 00 00 00 push $0xb2
jmp alltraps
80106035: e9 e3 f3 ff ff jmp 8010541d <alltraps>
8010603a <vector179>:
.globl vector179
vector179:
pushl $0
8010603a: 6a 00 push $0x0
pushl $179
8010603c: 68 b3 00 00 00 push $0xb3
jmp alltraps
80106041: e9 d7 f3 ff ff jmp 8010541d <alltraps>
80106046 <vector180>:
.globl vector180
vector180:
pushl $0
80106046: 6a 00 push $0x0
pushl $180
80106048: 68 b4 00 00 00 push $0xb4
jmp alltraps
8010604d: e9 cb f3 ff ff jmp 8010541d <alltraps>
80106052 <vector181>:
.globl vector181
vector181:
pushl $0
80106052: 6a 00 push $0x0
pushl $181
80106054: 68 b5 00 00 00 push $0xb5
jmp alltraps
80106059: e9 bf f3 ff ff jmp 8010541d <alltraps>
8010605e <vector182>:
.globl vector182
vector182:
pushl $0
8010605e: 6a 00 push $0x0
pushl $182
80106060: 68 b6 00 00 00 push $0xb6
jmp alltraps
80106065: e9 b3 f3 ff ff jmp 8010541d <alltraps>
8010606a <vector183>:
.globl vector183
vector183:
pushl $0
8010606a: 6a 00 push $0x0
pushl $183
8010606c: 68 b7 00 00 00 push $0xb7
jmp alltraps
80106071: e9 a7 f3 ff ff jmp 8010541d <alltraps>
80106076 <vector184>:
.globl vector184
vector184:
pushl $0
80106076: 6a 00 push $0x0
pushl $184
80106078: 68 b8 00 00 00 push $0xb8
jmp alltraps
8010607d: e9 9b f3 ff ff jmp 8010541d <alltraps>
80106082 <vector185>:
.globl vector185
vector185:
pushl $0
80106082: 6a 00 push $0x0
pushl $185
80106084: 68 b9 00 00 00 push $0xb9
jmp alltraps
80106089: e9 8f f3 ff ff jmp 8010541d <alltraps>
8010608e <vector186>:
.globl vector186
vector186:
pushl $0
8010608e: 6a 00 push $0x0
pushl $186
80106090: 68 ba 00 00 00 push $0xba
jmp alltraps
80106095: e9 83 f3 ff ff jmp 8010541d <alltraps>
8010609a <vector187>:
.globl vector187
vector187:
pushl $0
8010609a: 6a 00 push $0x0
pushl $187
8010609c: 68 bb 00 00 00 push $0xbb
jmp alltraps
801060a1: e9 77 f3 ff ff jmp 8010541d <alltraps>
801060a6 <vector188>:
.globl vector188
vector188:
pushl $0
801060a6: 6a 00 push $0x0
pushl $188
801060a8: 68 bc 00 00 00 push $0xbc
jmp alltraps
801060ad: e9 6b f3 ff ff jmp 8010541d <alltraps>
801060b2 <vector189>:
.globl vector189
vector189:
pushl $0
801060b2: 6a 00 push $0x0
pushl $189
801060b4: 68 bd 00 00 00 push $0xbd
jmp alltraps
801060b9: e9 5f f3 ff ff jmp 8010541d <alltraps>
801060be <vector190>:
.globl vector190
vector190:
pushl $0
801060be: 6a 00 push $0x0
pushl $190
801060c0: 68 be 00 00 00 push $0xbe
jmp alltraps
801060c5: e9 53 f3 ff ff jmp 8010541d <alltraps>
801060ca <vector191>:
.globl vector191
vector191:
pushl $0
801060ca: 6a 00 push $0x0
pushl $191
801060cc: 68 bf 00 00 00 push $0xbf
jmp alltraps
801060d1: e9 47 f3 ff ff jmp 8010541d <alltraps>
801060d6 <vector192>:
.globl vector192
vector192:
pushl $0
801060d6: 6a 00 push $0x0
pushl $192
801060d8: 68 c0 00 00 00 push $0xc0
jmp alltraps
801060dd: e9 3b f3 ff ff jmp 8010541d <alltraps>
801060e2 <vector193>:
.globl vector193
vector193:
pushl $0
801060e2: 6a 00 push $0x0
pushl $193
801060e4: 68 c1 00 00 00 push $0xc1
jmp alltraps
801060e9: e9 2f f3 ff ff jmp 8010541d <alltraps>
801060ee <vector194>:
.globl vector194
vector194:
pushl $0
801060ee: 6a 00 push $0x0
pushl $194
801060f0: 68 c2 00 00 00 push $0xc2
jmp alltraps
801060f5: e9 23 f3 ff ff jmp 8010541d <alltraps>
801060fa <vector195>:
.globl vector195
vector195:
pushl $0
801060fa: 6a 00 push $0x0
pushl $195
801060fc: 68 c3 00 00 00 push $0xc3
jmp alltraps
80106101: e9 17 f3 ff ff jmp 8010541d <alltraps>
80106106 <vector196>:
.globl vector196
vector196:
pushl $0
80106106: 6a 00 push $0x0
pushl $196
80106108: 68 c4 00 00 00 push $0xc4
jmp alltraps
8010610d: e9 0b f3 ff ff jmp 8010541d <alltraps>
80106112 <vector197>:
.globl vector197
vector197:
pushl $0
80106112: 6a 00 push $0x0
pushl $197
80106114: 68 c5 00 00 00 push $0xc5
jmp alltraps
80106119: e9 ff f2 ff ff jmp 8010541d <alltraps>
8010611e <vector198>:
.globl vector198
vector198:
pushl $0
8010611e: 6a 00 push $0x0
pushl $198
80106120: 68 c6 00 00 00 push $0xc6
jmp alltraps
80106125: e9 f3 f2 ff ff jmp 8010541d <alltraps>
8010612a <vector199>:
.globl vector199
vector199:
pushl $0
8010612a: 6a 00 push $0x0
pushl $199
8010612c: 68 c7 00 00 00 push $0xc7
jmp alltraps
80106131: e9 e7 f2 ff ff jmp 8010541d <alltraps>
80106136 <vector200>:
.globl vector200
vector200:
pushl $0
80106136: 6a 00 push $0x0
pushl $200
80106138: 68 c8 00 00 00 push $0xc8
jmp alltraps
8010613d: e9 db f2 ff ff jmp 8010541d <alltraps>
80106142 <vector201>:
.globl vector201
vector201:
pushl $0
80106142: 6a 00 push $0x0
pushl $201
80106144: 68 c9 00 00 00 push $0xc9
jmp alltraps
80106149: e9 cf f2 ff ff jmp 8010541d <alltraps>
8010614e <vector202>:
.globl vector202
vector202:
pushl $0
8010614e: 6a 00 push $0x0
pushl $202
80106150: 68 ca 00 00 00 push $0xca
jmp alltraps
80106155: e9 c3 f2 ff ff jmp 8010541d <alltraps>
8010615a <vector203>:
.globl vector203
vector203:
pushl $0
8010615a: 6a 00 push $0x0
pushl $203
8010615c: 68 cb 00 00 00 push $0xcb
jmp alltraps
80106161: e9 b7 f2 ff ff jmp 8010541d <alltraps>
80106166 <vector204>:
.globl vector204
vector204:
pushl $0
80106166: 6a 00 push $0x0
pushl $204
80106168: 68 cc 00 00 00 push $0xcc
jmp alltraps
8010616d: e9 ab f2 ff ff jmp 8010541d <alltraps>
80106172 <vector205>:
.globl vector205
vector205:
pushl $0
80106172: 6a 00 push $0x0
pushl $205
80106174: 68 cd 00 00 00 push $0xcd
jmp alltraps
80106179: e9 9f f2 ff ff jmp 8010541d <alltraps>
8010617e <vector206>:
.globl vector206
vector206:
pushl $0
8010617e: 6a 00 push $0x0
pushl $206
80106180: 68 ce 00 00 00 push $0xce
jmp alltraps
80106185: e9 93 f2 ff ff jmp 8010541d <alltraps>
8010618a <vector207>:
.globl vector207
vector207:
pushl $0
8010618a: 6a 00 push $0x0
pushl $207
8010618c: 68 cf 00 00 00 push $0xcf
jmp alltraps
80106191: e9 87 f2 ff ff jmp 8010541d <alltraps>
80106196 <vector208>:
.globl vector208
vector208:
pushl $0
80106196: 6a 00 push $0x0
pushl $208
80106198: 68 d0 00 00 00 push $0xd0
jmp alltraps
8010619d: e9 7b f2 ff ff jmp 8010541d <alltraps>
801061a2 <vector209>:
.globl vector209
vector209:
pushl $0
801061a2: 6a 00 push $0x0
pushl $209
801061a4: 68 d1 00 00 00 push $0xd1
jmp alltraps
801061a9: e9 6f f2 ff ff jmp 8010541d <alltraps>
801061ae <vector210>:
.globl vector210
vector210:
pushl $0
801061ae: 6a 00 push $0x0
pushl $210
801061b0: 68 d2 00 00 00 push $0xd2
jmp alltraps
801061b5: e9 63 f2 ff ff jmp 8010541d <alltraps>
801061ba <vector211>:
.globl vector211
vector211:
pushl $0
801061ba: 6a 00 push $0x0
pushl $211
801061bc: 68 d3 00 00 00 push $0xd3
jmp alltraps
801061c1: e9 57 f2 ff ff jmp 8010541d <alltraps>
801061c6 <vector212>:
.globl vector212
vector212:
pushl $0
801061c6: 6a 00 push $0x0
pushl $212
801061c8: 68 d4 00 00 00 push $0xd4
jmp alltraps
801061cd: e9 4b f2 ff ff jmp 8010541d <alltraps>
801061d2 <vector213>:
.globl vector213
vector213:
pushl $0
801061d2: 6a 00 push $0x0
pushl $213
801061d4: 68 d5 00 00 00 push $0xd5
jmp alltraps
801061d9: e9 3f f2 ff ff jmp 8010541d <alltraps>
801061de <vector214>:
.globl vector214
vector214:
pushl $0
801061de: 6a 00 push $0x0
pushl $214
801061e0: 68 d6 00 00 00 push $0xd6
jmp alltraps
801061e5: e9 33 f2 ff ff jmp 8010541d <alltraps>
801061ea <vector215>:
.globl vector215
vector215:
pushl $0
801061ea: 6a 00 push $0x0
pushl $215
801061ec: 68 d7 00 00 00 push $0xd7
jmp alltraps
801061f1: e9 27 f2 ff ff jmp 8010541d <alltraps>
801061f6 <vector216>:
.globl vector216
vector216:
pushl $0
801061f6: 6a 00 push $0x0
pushl $216
801061f8: 68 d8 00 00 00 push $0xd8
jmp alltraps
801061fd: e9 1b f2 ff ff jmp 8010541d <alltraps>
80106202 <vector217>:
.globl vector217
vector217:
pushl $0
80106202: 6a 00 push $0x0
pushl $217
80106204: 68 d9 00 00 00 push $0xd9
jmp alltraps
80106209: e9 0f f2 ff ff jmp 8010541d <alltraps>
8010620e <vector218>:
.globl vector218
vector218:
pushl $0
8010620e: 6a 00 push $0x0
pushl $218
80106210: 68 da 00 00 00 push $0xda
jmp alltraps
80106215: e9 03 f2 ff ff jmp 8010541d <alltraps>
8010621a <vector219>:
.globl vector219
vector219:
pushl $0
8010621a: 6a 00 push $0x0
pushl $219
8010621c: 68 db 00 00 00 push $0xdb
jmp alltraps
80106221: e9 f7 f1 ff ff jmp 8010541d <alltraps>
80106226 <vector220>:
.globl vector220
vector220:
pushl $0
80106226: 6a 00 push $0x0
pushl $220
80106228: 68 dc 00 00 00 push $0xdc
jmp alltraps
8010622d: e9 eb f1 ff ff jmp 8010541d <alltraps>
80106232 <vector221>:
.globl vector221
vector221:
pushl $0
80106232: 6a 00 push $0x0
pushl $221
80106234: 68 dd 00 00 00 push $0xdd
jmp alltraps
80106239: e9 df f1 ff ff jmp 8010541d <alltraps>
8010623e <vector222>:
.globl vector222
vector222:
pushl $0
8010623e: 6a 00 push $0x0
pushl $222
80106240: 68 de 00 00 00 push $0xde
jmp alltraps
80106245: e9 d3 f1 ff ff jmp 8010541d <alltraps>
8010624a <vector223>:
.globl vector223
vector223:
pushl $0
8010624a: 6a 00 push $0x0
pushl $223
8010624c: 68 df 00 00 00 push $0xdf
jmp alltraps
80106251: e9 c7 f1 ff ff jmp 8010541d <alltraps>
80106256 <vector224>:
.globl vector224
vector224:
pushl $0
80106256: 6a 00 push $0x0
pushl $224
80106258: 68 e0 00 00 00 push $0xe0
jmp alltraps
8010625d: e9 bb f1 ff ff jmp 8010541d <alltraps>
80106262 <vector225>:
.globl vector225
vector225:
pushl $0
80106262: 6a 00 push $0x0
pushl $225
80106264: 68 e1 00 00 00 push $0xe1
jmp alltraps
80106269: e9 af f1 ff ff jmp 8010541d <alltraps>
8010626e <vector226>:
.globl vector226
vector226:
pushl $0
8010626e: 6a 00 push $0x0
pushl $226
80106270: 68 e2 00 00 00 push $0xe2
jmp alltraps
80106275: e9 a3 f1 ff ff jmp 8010541d <alltraps>
8010627a <vector227>:
.globl vector227
vector227:
pushl $0
8010627a: 6a 00 push $0x0
pushl $227
8010627c: 68 e3 00 00 00 push $0xe3
jmp alltraps
80106281: e9 97 f1 ff ff jmp 8010541d <alltraps>
80106286 <vector228>:
.globl vector228
vector228:
pushl $0
80106286: 6a 00 push $0x0
pushl $228
80106288: 68 e4 00 00 00 push $0xe4
jmp alltraps
8010628d: e9 8b f1 ff ff jmp 8010541d <alltraps>
80106292 <vector229>:
.globl vector229
vector229:
pushl $0
80106292: 6a 00 push $0x0
pushl $229
80106294: 68 e5 00 00 00 push $0xe5
jmp alltraps
80106299: e9 7f f1 ff ff jmp 8010541d <alltraps>
8010629e <vector230>:
.globl vector230
vector230:
pushl $0
8010629e: 6a 00 push $0x0
pushl $230
801062a0: 68 e6 00 00 00 push $0xe6
jmp alltraps
801062a5: e9 73 f1 ff ff jmp 8010541d <alltraps>
801062aa <vector231>:
.globl vector231
vector231:
pushl $0
801062aa: 6a 00 push $0x0
pushl $231
801062ac: 68 e7 00 00 00 push $0xe7
jmp alltraps
801062b1: e9 67 f1 ff ff jmp 8010541d <alltraps>
801062b6 <vector232>:
.globl vector232
vector232:
pushl $0
801062b6: 6a 00 push $0x0
pushl $232
801062b8: 68 e8 00 00 00 push $0xe8
jmp alltraps
801062bd: e9 5b f1 ff ff jmp 8010541d <alltraps>
801062c2 <vector233>:
.globl vector233
vector233:
pushl $0
801062c2: 6a 00 push $0x0
pushl $233
801062c4: 68 e9 00 00 00 push $0xe9
jmp alltraps
801062c9: e9 4f f1 ff ff jmp 8010541d <alltraps>
801062ce <vector234>:
.globl vector234
vector234:
pushl $0
801062ce: 6a 00 push $0x0
pushl $234
801062d0: 68 ea 00 00 00 push $0xea
jmp alltraps
801062d5: e9 43 f1 ff ff jmp 8010541d <alltraps>
801062da <vector235>:
.globl vector235
vector235:
pushl $0
801062da: 6a 00 push $0x0
pushl $235
801062dc: 68 eb 00 00 00 push $0xeb
jmp alltraps
801062e1: e9 37 f1 ff ff jmp 8010541d <alltraps>
801062e6 <vector236>:
.globl vector236
vector236:
pushl $0
801062e6: 6a 00 push $0x0
pushl $236
801062e8: 68 ec 00 00 00 push $0xec
jmp alltraps
801062ed: e9 2b f1 ff ff jmp 8010541d <alltraps>
801062f2 <vector237>:
.globl vector237
vector237:
pushl $0
801062f2: 6a 00 push $0x0
pushl $237
801062f4: 68 ed 00 00 00 push $0xed
jmp alltraps
801062f9: e9 1f f1 ff ff jmp 8010541d <alltraps>
801062fe <vector238>:
.globl vector238
vector238:
pushl $0
801062fe: 6a 00 push $0x0
pushl $238
80106300: 68 ee 00 00 00 push $0xee
jmp alltraps
80106305: e9 13 f1 ff ff jmp 8010541d <alltraps>
8010630a <vector239>:
.globl vector239
vector239:
pushl $0
8010630a: 6a 00 push $0x0
pushl $239
8010630c: 68 ef 00 00 00 push $0xef
jmp alltraps
80106311: e9 07 f1 ff ff jmp 8010541d <alltraps>
80106316 <vector240>:
.globl vector240
vector240:
pushl $0
80106316: 6a 00 push $0x0
pushl $240
80106318: 68 f0 00 00 00 push $0xf0
jmp alltraps
8010631d: e9 fb f0 ff ff jmp 8010541d <alltraps>
80106322 <vector241>:
.globl vector241
vector241:
pushl $0
80106322: 6a 00 push $0x0
pushl $241
80106324: 68 f1 00 00 00 push $0xf1
jmp alltraps
80106329: e9 ef f0 ff ff jmp 8010541d <alltraps>
8010632e <vector242>:
.globl vector242
vector242:
pushl $0
8010632e: 6a 00 push $0x0
pushl $242
80106330: 68 f2 00 00 00 push $0xf2
jmp alltraps
80106335: e9 e3 f0 ff ff jmp 8010541d <alltraps>
8010633a <vector243>:
.globl vector243
vector243:
pushl $0
8010633a: 6a 00 push $0x0
pushl $243
8010633c: 68 f3 00 00 00 push $0xf3
jmp alltraps
80106341: e9 d7 f0 ff ff jmp 8010541d <alltraps>
80106346 <vector244>:
.globl vector244
vector244:
pushl $0
80106346: 6a 00 push $0x0
pushl $244
80106348: 68 f4 00 00 00 push $0xf4
jmp alltraps
8010634d: e9 cb f0 ff ff jmp 8010541d <alltraps>
80106352 <vector245>:
.globl vector245
vector245:
pushl $0
80106352: 6a 00 push $0x0
pushl $245
80106354: 68 f5 00 00 00 push $0xf5
jmp alltraps
80106359: e9 bf f0 ff ff jmp 8010541d <alltraps>
8010635e <vector246>:
.globl vector246
vector246:
pushl $0
8010635e: 6a 00 push $0x0
pushl $246
80106360: 68 f6 00 00 00 push $0xf6
jmp alltraps
80106365: e9 b3 f0 ff ff jmp 8010541d <alltraps>
8010636a <vector247>:
.globl vector247
vector247:
pushl $0
8010636a: 6a 00 push $0x0
pushl $247
8010636c: 68 f7 00 00 00 push $0xf7
jmp alltraps
80106371: e9 a7 f0 ff ff jmp 8010541d <alltraps>
80106376 <vector248>:
.globl vector248
vector248:
pushl $0
80106376: 6a 00 push $0x0
pushl $248
80106378: 68 f8 00 00 00 push $0xf8
jmp alltraps
8010637d: e9 9b f0 ff ff jmp 8010541d <alltraps>
80106382 <vector249>:
.globl vector249
vector249:
pushl $0
80106382: 6a 00 push $0x0
pushl $249
80106384: 68 f9 00 00 00 push $0xf9
jmp alltraps
80106389: e9 8f f0 ff ff jmp 8010541d <alltraps>
8010638e <vector250>:
.globl vector250
vector250:
pushl $0
8010638e: 6a 00 push $0x0
pushl $250
80106390: 68 fa 00 00 00 push $0xfa
jmp alltraps
80106395: e9 83 f0 ff ff jmp 8010541d <alltraps>
8010639a <vector251>:
.globl vector251
vector251:
pushl $0
8010639a: 6a 00 push $0x0
pushl $251
8010639c: 68 fb 00 00 00 push $0xfb
jmp alltraps
801063a1: e9 77 f0 ff ff jmp 8010541d <alltraps>
801063a6 <vector252>:
.globl vector252
vector252:
pushl $0
801063a6: 6a 00 push $0x0
pushl $252
801063a8: 68 fc 00 00 00 push $0xfc
jmp alltraps
801063ad: e9 6b f0 ff ff jmp 8010541d <alltraps>
801063b2 <vector253>:
.globl vector253
vector253:
pushl $0
801063b2: 6a 00 push $0x0
pushl $253
801063b4: 68 fd 00 00 00 push $0xfd
jmp alltraps
801063b9: e9 5f f0 ff ff jmp 8010541d <alltraps>
801063be <vector254>:
.globl vector254
vector254:
pushl $0
801063be: 6a 00 push $0x0
pushl $254
801063c0: 68 fe 00 00 00 push $0xfe
jmp alltraps
801063c5: e9 53 f0 ff ff jmp 8010541d <alltraps>
801063ca <vector255>:
.globl vector255
vector255:
pushl $0
801063ca: 6a 00 push $0x0
pushl $255
801063cc: 68 ff 00 00 00 push $0xff
jmp alltraps
801063d1: e9 47 f0 ff ff jmp 8010541d <alltraps>
801063d6: 66 90 xchg %ax,%ax
801063d8: 66 90 xchg %ax,%ax
801063da: 66 90 xchg %ax,%ax
801063dc: 66 90 xchg %ax,%ax
801063de: 66 90 xchg %ax,%ax
801063e0 <walkpgdir>:
// Return the address of the PTE in page table pgdir
// that corresponds to virtual address va. If alloc!=0,
// create any required page table pages.
static pte_t *
walkpgdir(pde_t *pgdir, const void *va, int alloc)
{
801063e0: 55 push %ebp
801063e1: 89 e5 mov %esp,%ebp
801063e3: 57 push %edi
801063e4: 56 push %esi
801063e5: 89 d6 mov %edx,%esi
pde_t *pde;
pte_t *pgtab;
pde = &pgdir[PDX(va)];
801063e7: c1 ea 16 shr $0x16,%edx
{
801063ea: 53 push %ebx
pde = &pgdir[PDX(va)];
801063eb: 8d 3c 90 lea (%eax,%edx,4),%edi
{
801063ee: 83 ec 1c sub $0x1c,%esp
if(*pde & PTE_P){
801063f1: 8b 1f mov (%edi),%ebx
801063f3: f6 c3 01 test $0x1,%bl
801063f6: 74 28 je 80106420 <walkpgdir+0x40>
pgtab = (pte_t*)P2V(PTE_ADDR(*pde));
801063f8: 81 e3 00 f0 ff ff and $0xfffff000,%ebx
801063fe: 81 c3 00 00 00 80 add $0x80000000,%ebx
// The permissions here are overly generous, but they can
// be further restricted by the permissions in the page table
// entries, if necessary.
*pde = V2P(pgtab) | PTE_P | PTE_W | PTE_U;
}
return &pgtab[PTX(va)];
80106404: c1 ee 0a shr $0xa,%esi
}
80106407: 83 c4 1c add $0x1c,%esp
return &pgtab[PTX(va)];
8010640a: 89 f2 mov %esi,%edx
8010640c: 81 e2 fc 0f 00 00 and $0xffc,%edx
80106412: 8d 04 13 lea (%ebx,%edx,1),%eax
}
80106415: 5b pop %ebx
80106416: 5e pop %esi
80106417: 5f pop %edi
80106418: 5d pop %ebp
80106419: c3 ret
8010641a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
if(!alloc || (pgtab = (pte_t*)kalloc()) == 0)
80106420: 85 c9 test %ecx,%ecx
80106422: 74 34 je 80106458 <walkpgdir+0x78>
80106424: e8 77 c0 ff ff call 801024a0 <kalloc>
80106429: 85 c0 test %eax,%eax
8010642b: 89 c3 mov %eax,%ebx
8010642d: 74 29 je 80106458 <walkpgdir+0x78>
memset(pgtab, 0, PGSIZE);
8010642f: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
80106436: 00
80106437: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
8010643e: 00
8010643f: 89 04 24 mov %eax,(%esp)
80106442: e8 39 de ff ff call 80104280 <memset>
*pde = V2P(pgtab) | PTE_P | PTE_W | PTE_U;
80106447: 8d 83 00 00 00 80 lea -0x80000000(%ebx),%eax
8010644d: 83 c8 07 or $0x7,%eax
80106450: 89 07 mov %eax,(%edi)
80106452: eb b0 jmp 80106404 <walkpgdir+0x24>
80106454: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
}
80106458: 83 c4 1c add $0x1c,%esp
return 0;
8010645b: 31 c0 xor %eax,%eax
}
8010645d: 5b pop %ebx
8010645e: 5e pop %esi
8010645f: 5f pop %edi
80106460: 5d pop %ebp
80106461: c3 ret
80106462: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80106469: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80106470 <deallocuvm.part.0>:
// Deallocate user pages to bring the process size from oldsz to
// newsz. oldsz and newsz need not be page-aligned, nor does newsz
// need to be less than oldsz. oldsz can be larger than the actual
// process size. Returns the new process size.
int
deallocuvm(pde_t *pgdir, uint oldsz, uint newsz)
80106470: 55 push %ebp
80106471: 89 e5 mov %esp,%ebp
80106473: 57 push %edi
80106474: 89 c7 mov %eax,%edi
80106476: 56 push %esi
80106477: 89 d6 mov %edx,%esi
80106479: 53 push %ebx
uint a, pa;
if(newsz >= oldsz)
return oldsz;
a = PGROUNDUP(newsz);
8010647a: 8d 99 ff 0f 00 00 lea 0xfff(%ecx),%ebx
deallocuvm(pde_t *pgdir, uint oldsz, uint newsz)
80106480: 83 ec 1c sub $0x1c,%esp
a = PGROUNDUP(newsz);
80106483: 81 e3 00 f0 ff ff and $0xfffff000,%ebx
for(; a < oldsz; a += PGSIZE){
80106489: 39 d3 cmp %edx,%ebx
deallocuvm(pde_t *pgdir, uint oldsz, uint newsz)
8010648b: 89 4d e0 mov %ecx,-0x20(%ebp)
for(; a < oldsz; a += PGSIZE){
8010648e: 72 3b jb 801064cb <deallocuvm.part.0+0x5b>
80106490: eb 5e jmp 801064f0 <deallocuvm.part.0+0x80>
80106492: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
pte = walkpgdir(pgdir, (char*)a, 0);
if(!pte)
a = PGADDR(PDX(a) + 1, 0, 0) - PGSIZE;
else if((*pte & PTE_P) != 0){
80106498: 8b 10 mov (%eax),%edx
8010649a: f6 c2 01 test $0x1,%dl
8010649d: 74 22 je 801064c1 <deallocuvm.part.0+0x51>
pa = PTE_ADDR(*pte);
if(pa == 0)
8010649f: 81 e2 00 f0 ff ff and $0xfffff000,%edx
801064a5: 74 54 je 801064fb <deallocuvm.part.0+0x8b>
panic("kfree");
char *v = P2V(pa);
801064a7: 81 c2 00 00 00 80 add $0x80000000,%edx
kfree(v);
801064ad: 89 14 24 mov %edx,(%esp)
801064b0: 89 45 e4 mov %eax,-0x1c(%ebp)
801064b3: e8 38 be ff ff call 801022f0 <kfree>
*pte = 0;
801064b8: 8b 45 e4 mov -0x1c(%ebp),%eax
801064bb: c7 00 00 00 00 00 movl $0x0,(%eax)
for(; a < oldsz; a += PGSIZE){
801064c1: 81 c3 00 10 00 00 add $0x1000,%ebx
801064c7: 39 f3 cmp %esi,%ebx
801064c9: 73 25 jae 801064f0 <deallocuvm.part.0+0x80>
pte = walkpgdir(pgdir, (char*)a, 0);
801064cb: 31 c9 xor %ecx,%ecx
801064cd: 89 da mov %ebx,%edx
801064cf: 89 f8 mov %edi,%eax
801064d1: e8 0a ff ff ff call 801063e0 <walkpgdir>
if(!pte)
801064d6: 85 c0 test %eax,%eax
801064d8: 75 be jne 80106498 <deallocuvm.part.0+0x28>
a = PGADDR(PDX(a) + 1, 0, 0) - PGSIZE;
801064da: 81 e3 00 00 c0 ff and $0xffc00000,%ebx
801064e0: 81 c3 00 f0 3f 00 add $0x3ff000,%ebx
for(; a < oldsz; a += PGSIZE){
801064e6: 81 c3 00 10 00 00 add $0x1000,%ebx
801064ec: 39 f3 cmp %esi,%ebx
801064ee: 72 db jb 801064cb <deallocuvm.part.0+0x5b>
}
}
return newsz;
}
801064f0: 8b 45 e0 mov -0x20(%ebp),%eax
801064f3: 83 c4 1c add $0x1c,%esp
801064f6: 5b pop %ebx
801064f7: 5e pop %esi
801064f8: 5f pop %edi
801064f9: 5d pop %ebp
801064fa: c3 ret
panic("kfree");
801064fb: c7 04 24 f2 70 10 80 movl $0x801070f2,(%esp)
80106502: e8 59 9e ff ff call 80100360 <panic>
80106507: 89 f6 mov %esi,%esi
80106509: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80106510 <seginit>:
{
80106510: 55 push %ebp
80106511: 89 e5 mov %esp,%ebp
80106513: 83 ec 18 sub $0x18,%esp
c = &cpus[cpuid()];
80106516: e8 65 d1 ff ff call 80103680 <cpuid>
c->gdt[SEG_KCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, 0);
8010651b: 31 c9 xor %ecx,%ecx
8010651d: ba ff ff ff ff mov $0xffffffff,%edx
c = &cpus[cpuid()];
80106522: 69 c0 b0 00 00 00 imul $0xb0,%eax,%eax
80106528: 05 80 27 11 80 add $0x80112780,%eax
c->gdt[SEG_KCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, 0);
8010652d: 66 89 50 78 mov %dx,0x78(%eax)
c->gdt[SEG_KDATA] = SEG(STA_W, 0, 0xffffffff, 0);
80106531: ba ff ff ff ff mov $0xffffffff,%edx
lgdt(c->gdt, sizeof(c->gdt));
80106536: 83 c0 70 add $0x70,%eax
c->gdt[SEG_KCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, 0);
80106539: 66 89 48 0a mov %cx,0xa(%eax)
c->gdt[SEG_KDATA] = SEG(STA_W, 0, 0xffffffff, 0);
8010653d: 31 c9 xor %ecx,%ecx
8010653f: 66 89 50 10 mov %dx,0x10(%eax)
c->gdt[SEG_UCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, DPL_USER);
80106543: ba ff ff ff ff mov $0xffffffff,%edx
c->gdt[SEG_KDATA] = SEG(STA_W, 0, 0xffffffff, 0);
80106548: 66 89 48 12 mov %cx,0x12(%eax)
c->gdt[SEG_UCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, DPL_USER);
8010654c: 31 c9 xor %ecx,%ecx
8010654e: 66 89 50 18 mov %dx,0x18(%eax)
c->gdt[SEG_UDATA] = SEG(STA_W, 0, 0xffffffff, DPL_USER);
80106552: ba ff ff ff ff mov $0xffffffff,%edx
c->gdt[SEG_UCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, DPL_USER);
80106557: 66 89 48 1a mov %cx,0x1a(%eax)
c->gdt[SEG_UDATA] = SEG(STA_W, 0, 0xffffffff, DPL_USER);
8010655b: 31 c9 xor %ecx,%ecx
c->gdt[SEG_KCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, 0);
8010655d: c6 40 0d 9a movb $0x9a,0xd(%eax)
80106561: c6 40 0e cf movb $0xcf,0xe(%eax)
c->gdt[SEG_KDATA] = SEG(STA_W, 0, 0xffffffff, 0);
80106565: c6 40 15 92 movb $0x92,0x15(%eax)
80106569: c6 40 16 cf movb $0xcf,0x16(%eax)
c->gdt[SEG_UCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, DPL_USER);
8010656d: c6 40 1d fa movb $0xfa,0x1d(%eax)
80106571: c6 40 1e cf movb $0xcf,0x1e(%eax)
c->gdt[SEG_UDATA] = SEG(STA_W, 0, 0xffffffff, DPL_USER);
80106575: c6 40 25 f2 movb $0xf2,0x25(%eax)
80106579: c6 40 26 cf movb $0xcf,0x26(%eax)
8010657d: 66 89 50 20 mov %dx,0x20(%eax)
pd[0] = size-1;
80106581: ba 2f 00 00 00 mov $0x2f,%edx
c->gdt[SEG_KCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, 0);
80106586: c6 40 0c 00 movb $0x0,0xc(%eax)
8010658a: c6 40 0f 00 movb $0x0,0xf(%eax)
c->gdt[SEG_KDATA] = SEG(STA_W, 0, 0xffffffff, 0);
8010658e: c6 40 14 00 movb $0x0,0x14(%eax)
80106592: c6 40 17 00 movb $0x0,0x17(%eax)
c->gdt[SEG_UCODE] = SEG(STA_X|STA_R, 0, 0xffffffff, DPL_USER);
80106596: c6 40 1c 00 movb $0x0,0x1c(%eax)
8010659a: c6 40 1f 00 movb $0x0,0x1f(%eax)
c->gdt[SEG_UDATA] = SEG(STA_W, 0, 0xffffffff, DPL_USER);
8010659e: 66 89 48 22 mov %cx,0x22(%eax)
801065a2: c6 40 24 00 movb $0x0,0x24(%eax)
801065a6: c6 40 27 00 movb $0x0,0x27(%eax)
801065aa: 66 89 55 f2 mov %dx,-0xe(%ebp)
pd[1] = (uint)p;
801065ae: 66 89 45 f4 mov %ax,-0xc(%ebp)
pd[2] = (uint)p >> 16;
801065b2: c1 e8 10 shr $0x10,%eax
801065b5: 66 89 45 f6 mov %ax,-0xa(%ebp)
asm volatile("lgdt (%0)" : : "r" (pd));
801065b9: 8d 45 f2 lea -0xe(%ebp),%eax
801065bc: 0f 01 10 lgdtl (%eax)
}
801065bf: c9 leave
801065c0: c3 ret
801065c1: eb 0d jmp 801065d0 <mappages>
801065c3: 90 nop
801065c4: 90 nop
801065c5: 90 nop
801065c6: 90 nop
801065c7: 90 nop
801065c8: 90 nop
801065c9: 90 nop
801065ca: 90 nop
801065cb: 90 nop
801065cc: 90 nop
801065cd: 90 nop
801065ce: 90 nop
801065cf: 90 nop
801065d0 <mappages>:
{
801065d0: 55 push %ebp
801065d1: 89 e5 mov %esp,%ebp
801065d3: 57 push %edi
801065d4: 56 push %esi
801065d5: 53 push %ebx
801065d6: 83 ec 1c sub $0x1c,%esp
801065d9: 8b 45 0c mov 0xc(%ebp),%eax
last = (char*)PGROUNDDOWN(((uint)va) + size - 1);
801065dc: 8b 55 10 mov 0x10(%ebp),%edx
{
801065df: 8b 7d 14 mov 0x14(%ebp),%edi
*pte = pa | perm | PTE_P;
801065e2: 83 4d 18 01 orl $0x1,0x18(%ebp)
a = (char*)PGROUNDDOWN((uint)va);
801065e6: 89 c3 mov %eax,%ebx
801065e8: 81 e3 00 f0 ff ff and $0xfffff000,%ebx
last = (char*)PGROUNDDOWN(((uint)va) + size - 1);
801065ee: 8d 44 10 ff lea -0x1(%eax,%edx,1),%eax
801065f2: 29 df sub %ebx,%edi
801065f4: 89 45 e4 mov %eax,-0x1c(%ebp)
801065f7: 81 65 e4 00 f0 ff ff andl $0xfffff000,-0x1c(%ebp)
801065fe: eb 15 jmp 80106615 <mappages+0x45>
if(*pte & PTE_P)
80106600: f6 00 01 testb $0x1,(%eax)
80106603: 75 3d jne 80106642 <mappages+0x72>
*pte = pa | perm | PTE_P;
80106605: 0b 75 18 or 0x18(%ebp),%esi
if(a == last)
80106608: 3b 5d e4 cmp -0x1c(%ebp),%ebx
*pte = pa | perm | PTE_P;
8010660b: 89 30 mov %esi,(%eax)
if(a == last)
8010660d: 74 29 je 80106638 <mappages+0x68>
a += PGSIZE;
8010660f: 81 c3 00 10 00 00 add $0x1000,%ebx
if((pte = walkpgdir(pgdir, a, 1)) == 0)
80106615: 8b 45 08 mov 0x8(%ebp),%eax
80106618: b9 01 00 00 00 mov $0x1,%ecx
8010661d: 89 da mov %ebx,%edx
8010661f: 8d 34 3b lea (%ebx,%edi,1),%esi
80106622: e8 b9 fd ff ff call 801063e0 <walkpgdir>
80106627: 85 c0 test %eax,%eax
80106629: 75 d5 jne 80106600 <mappages+0x30>
}
8010662b: 83 c4 1c add $0x1c,%esp
return -1;
8010662e: b8 ff ff ff ff mov $0xffffffff,%eax
}
80106633: 5b pop %ebx
80106634: 5e pop %esi
80106635: 5f pop %edi
80106636: 5d pop %ebp
80106637: c3 ret
80106638: 83 c4 1c add $0x1c,%esp
return 0;
8010663b: 31 c0 xor %eax,%eax
}
8010663d: 5b pop %ebx
8010663e: 5e pop %esi
8010663f: 5f pop %edi
80106640: 5d pop %ebp
80106641: c3 ret
panic("remap");
80106642: c7 04 24 3c 78 10 80 movl $0x8010783c,(%esp)
80106649: e8 12 9d ff ff call 80100360 <panic>
8010664e: 66 90 xchg %ax,%ax
80106650 <switchkvm>:
lcr3(V2P(kpgdir)); // switch to the kernel page table
80106650: a1 a4 55 11 80 mov 0x801155a4,%eax
{
80106655: 55 push %ebp
80106656: 89 e5 mov %esp,%ebp
lcr3(V2P(kpgdir)); // switch to the kernel page table
80106658: 05 00 00 00 80 add $0x80000000,%eax
}
static inline void
lcr3(uint val)
{
asm volatile("movl %0,%%cr3" : : "r" (val));
8010665d: 0f 22 d8 mov %eax,%cr3
}
80106660: 5d pop %ebp
80106661: c3 ret
80106662: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80106669: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80106670 <switchuvm>:
{
80106670: 55 push %ebp
80106671: 89 e5 mov %esp,%ebp
80106673: 57 push %edi
80106674: 56 push %esi
80106675: 53 push %ebx
80106676: 83 ec 1c sub $0x1c,%esp
80106679: 8b 75 08 mov 0x8(%ebp),%esi
if(p == 0)
8010667c: 85 f6 test %esi,%esi
8010667e: 0f 84 cd 00 00 00 je 80106751 <switchuvm+0xe1>
if(p->kstack == 0)
80106684: 8b 46 0c mov 0xc(%esi),%eax
80106687: 85 c0 test %eax,%eax
80106689: 0f 84 da 00 00 00 je 80106769 <switchuvm+0xf9>
if(p->pgdir == 0)
8010668f: 8b 7e 04 mov 0x4(%esi),%edi
80106692: 85 ff test %edi,%edi
80106694: 0f 84 c3 00 00 00 je 8010675d <switchuvm+0xed>
pushcli();
8010669a: e8 61 da ff ff call 80104100 <pushcli>
mycpu()->gdt[SEG_TSS] = SEG16(STS_T32A, &mycpu()->ts,
8010669f: e8 5c cf ff ff call 80103600 <mycpu>
801066a4: 89 c3 mov %eax,%ebx
801066a6: e8 55 cf ff ff call 80103600 <mycpu>
801066ab: 89 c7 mov %eax,%edi
801066ad: e8 4e cf ff ff call 80103600 <mycpu>
801066b2: 83 c7 08 add $0x8,%edi
801066b5: 89 45 e4 mov %eax,-0x1c(%ebp)
801066b8: e8 43 cf ff ff call 80103600 <mycpu>
801066bd: 8b 4d e4 mov -0x1c(%ebp),%ecx
801066c0: ba 67 00 00 00 mov $0x67,%edx
801066c5: 66 89 93 98 00 00 00 mov %dx,0x98(%ebx)
801066cc: 66 89 bb 9a 00 00 00 mov %di,0x9a(%ebx)
801066d3: c6 83 9d 00 00 00 99 movb $0x99,0x9d(%ebx)
801066da: 83 c1 08 add $0x8,%ecx
801066dd: c1 e9 10 shr $0x10,%ecx
801066e0: 83 c0 08 add $0x8,%eax
801066e3: c1 e8 18 shr $0x18,%eax
801066e6: 88 8b 9c 00 00 00 mov %cl,0x9c(%ebx)
801066ec: c6 83 9e 00 00 00 40 movb $0x40,0x9e(%ebx)
801066f3: 88 83 9f 00 00 00 mov %al,0x9f(%ebx)
mycpu()->ts.iomb = (ushort) 0xFFFF;
801066f9: bb ff ff ff ff mov $0xffffffff,%ebx
mycpu()->gdt[SEG_TSS].s = 0;
801066fe: e8 fd ce ff ff call 80103600 <mycpu>
80106703: 80 a0 9d 00 00 00 ef andb $0xef,0x9d(%eax)
mycpu()->ts.ss0 = SEG_KDATA << 3;
8010670a: e8 f1 ce ff ff call 80103600 <mycpu>
8010670f: b9 10 00 00 00 mov $0x10,%ecx
80106714: 66 89 48 10 mov %cx,0x10(%eax)
mycpu()->ts.esp0 = (uint)p->kstack + KSTACKSIZE;
80106718: e8 e3 ce ff ff call 80103600 <mycpu>
8010671d: 8b 56 0c mov 0xc(%esi),%edx
80106720: 8d 8a 00 10 00 00 lea 0x1000(%edx),%ecx
80106726: 89 48 0c mov %ecx,0xc(%eax)
mycpu()->ts.iomb = (ushort) 0xFFFF;
80106729: e8 d2 ce ff ff call 80103600 <mycpu>
8010672e: 66 89 58 6e mov %bx,0x6e(%eax)
asm volatile("ltr %0" : : "r" (sel));
80106732: b8 28 00 00 00 mov $0x28,%eax
80106737: 0f 00 d8 ltr %ax
lcr3(V2P(p->pgdir)); // switch to process's address space
8010673a: 8b 46 04 mov 0x4(%esi),%eax
8010673d: 05 00 00 00 80 add $0x80000000,%eax
asm volatile("movl %0,%%cr3" : : "r" (val));
80106742: 0f 22 d8 mov %eax,%cr3
}
80106745: 83 c4 1c add $0x1c,%esp
80106748: 5b pop %ebx
80106749: 5e pop %esi
8010674a: 5f pop %edi
8010674b: 5d pop %ebp
popcli();
8010674c: e9 6f da ff ff jmp 801041c0 <popcli>
panic("switchuvm: no process");
80106751: c7 04 24 42 78 10 80 movl $0x80107842,(%esp)
80106758: e8 03 9c ff ff call 80100360 <panic>
panic("switchuvm: no pgdir");
8010675d: c7 04 24 6d 78 10 80 movl $0x8010786d,(%esp)
80106764: e8 f7 9b ff ff call 80100360 <panic>
panic("switchuvm: no kstack");
80106769: c7 04 24 58 78 10 80 movl $0x80107858,(%esp)
80106770: e8 eb 9b ff ff call 80100360 <panic>
80106775: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80106779: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80106780 <inituvm>:
{
80106780: 55 push %ebp
80106781: 89 e5 mov %esp,%ebp
80106783: 57 push %edi
80106784: 56 push %esi
80106785: 53 push %ebx
80106786: 83 ec 2c sub $0x2c,%esp
80106789: 8b 75 10 mov 0x10(%ebp),%esi
8010678c: 8b 55 08 mov 0x8(%ebp),%edx
8010678f: 8b 7d 0c mov 0xc(%ebp),%edi
if(sz >= PGSIZE)
80106792: 81 fe ff 0f 00 00 cmp $0xfff,%esi
80106798: 77 64 ja 801067fe <inituvm+0x7e>
8010679a: 89 55 e4 mov %edx,-0x1c(%ebp)
mem = kalloc();
8010679d: e8 fe bc ff ff call 801024a0 <kalloc>
memset(mem, 0, PGSIZE);
801067a2: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
801067a9: 00
801067aa: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
801067b1: 00
801067b2: 89 04 24 mov %eax,(%esp)
mem = kalloc();
801067b5: 89 c3 mov %eax,%ebx
memset(mem, 0, PGSIZE);
801067b7: e8 c4 da ff ff call 80104280 <memset>
mappages(pgdir, 0, PGSIZE, V2P(mem), PTE_W|PTE_U);
801067bc: 8b 55 e4 mov -0x1c(%ebp),%edx
801067bf: 8d 83 00 00 00 80 lea -0x80000000(%ebx),%eax
801067c5: c7 44 24 10 06 00 00 movl $0x6,0x10(%esp)
801067cc: 00
801067cd: 89 44 24 0c mov %eax,0xc(%esp)
801067d1: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
801067d8: 00
801067d9: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
801067e0: 00
801067e1: 89 14 24 mov %edx,(%esp)
801067e4: e8 e7 fd ff ff call 801065d0 <mappages>
memmove(mem, init, sz);
801067e9: 89 75 10 mov %esi,0x10(%ebp)
801067ec: 89 7d 0c mov %edi,0xc(%ebp)
801067ef: 89 5d 08 mov %ebx,0x8(%ebp)
}
801067f2: 83 c4 2c add $0x2c,%esp
801067f5: 5b pop %ebx
801067f6: 5e pop %esi
801067f7: 5f pop %edi
801067f8: 5d pop %ebp
memmove(mem, init, sz);
801067f9: e9 22 db ff ff jmp 80104320 <memmove>
panic("inituvm: more than a page");
801067fe: c7 04 24 81 78 10 80 movl $0x80107881,(%esp)
80106805: e8 56 9b ff ff call 80100360 <panic>
8010680a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80106810 <loaduvm>:
{
80106810: 55 push %ebp
80106811: 89 e5 mov %esp,%ebp
80106813: 57 push %edi
80106814: 56 push %esi
80106815: 53 push %ebx
80106816: 83 ec 1c sub $0x1c,%esp
if((uint) addr % PGSIZE != 0)
80106819: f7 45 0c ff 0f 00 00 testl $0xfff,0xc(%ebp)
80106820: 0f 85 98 00 00 00 jne 801068be <loaduvm+0xae>
for(i = 0; i < sz; i += PGSIZE){
80106826: 8b 75 18 mov 0x18(%ebp),%esi
80106829: 31 db xor %ebx,%ebx
8010682b: 85 f6 test %esi,%esi
8010682d: 75 1a jne 80106849 <loaduvm+0x39>
8010682f: eb 77 jmp 801068a8 <loaduvm+0x98>
80106831: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80106838: 81 c3 00 10 00 00 add $0x1000,%ebx
8010683e: 81 ee 00 10 00 00 sub $0x1000,%esi
80106844: 39 5d 18 cmp %ebx,0x18(%ebp)
80106847: 76 5f jbe 801068a8 <loaduvm+0x98>
80106849: 8b 55 0c mov 0xc(%ebp),%edx
if((pte = walkpgdir(pgdir, addr+i, 0)) == 0)
8010684c: 31 c9 xor %ecx,%ecx
8010684e: 8b 45 08 mov 0x8(%ebp),%eax
80106851: 01 da add %ebx,%edx
80106853: e8 88 fb ff ff call 801063e0 <walkpgdir>
80106858: 85 c0 test %eax,%eax
8010685a: 74 56 je 801068b2 <loaduvm+0xa2>
pa = PTE_ADDR(*pte);
8010685c: 8b 00 mov (%eax),%eax
n = PGSIZE;
8010685e: bf 00 10 00 00 mov $0x1000,%edi
80106863: 8b 4d 14 mov 0x14(%ebp),%ecx
pa = PTE_ADDR(*pte);
80106866: 25 00 f0 ff ff and $0xfffff000,%eax
n = PGSIZE;
8010686b: 81 fe 00 10 00 00 cmp $0x1000,%esi
80106871: 0f 42 fe cmovb %esi,%edi
if(readi(ip, P2V(pa), offset+i, n) != n)
80106874: 05 00 00 00 80 add $0x80000000,%eax
80106879: 89 44 24 04 mov %eax,0x4(%esp)
8010687d: 8b 45 10 mov 0x10(%ebp),%eax
80106880: 01 d9 add %ebx,%ecx
80106882: 89 7c 24 0c mov %edi,0xc(%esp)
80106886: 89 4c 24 08 mov %ecx,0x8(%esp)
8010688a: 89 04 24 mov %eax,(%esp)
8010688d: e8 ce b0 ff ff call 80101960 <readi>
80106892: 39 f8 cmp %edi,%eax
80106894: 74 a2 je 80106838 <loaduvm+0x28>
}
80106896: 83 c4 1c add $0x1c,%esp
return -1;
80106899: b8 ff ff ff ff mov $0xffffffff,%eax
}
8010689e: 5b pop %ebx
8010689f: 5e pop %esi
801068a0: 5f pop %edi
801068a1: 5d pop %ebp
801068a2: c3 ret
801068a3: 90 nop
801068a4: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801068a8: 83 c4 1c add $0x1c,%esp
return 0;
801068ab: 31 c0 xor %eax,%eax
}
801068ad: 5b pop %ebx
801068ae: 5e pop %esi
801068af: 5f pop %edi
801068b0: 5d pop %ebp
801068b1: c3 ret
panic("loaduvm: address should exist");
801068b2: c7 04 24 9b 78 10 80 movl $0x8010789b,(%esp)
801068b9: e8 a2 9a ff ff call 80100360 <panic>
panic("loaduvm: addr must be page aligned");
801068be: c7 04 24 3c 79 10 80 movl $0x8010793c,(%esp)
801068c5: e8 96 9a ff ff call 80100360 <panic>
801068ca: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
801068d0 <allocuvm>:
{
801068d0: 55 push %ebp
801068d1: 89 e5 mov %esp,%ebp
801068d3: 57 push %edi
801068d4: 56 push %esi
801068d5: 53 push %ebx
801068d6: 83 ec 2c sub $0x2c,%esp
801068d9: 8b 7d 10 mov 0x10(%ebp),%edi
if(newsz >= KERNBASE)
801068dc: 85 ff test %edi,%edi
801068de: 0f 88 8f 00 00 00 js 80106973 <allocuvm+0xa3>
if(newsz < oldsz)
801068e4: 3b 7d 0c cmp 0xc(%ebp),%edi
return oldsz;
801068e7: 8b 45 0c mov 0xc(%ebp),%eax
if(newsz < oldsz)
801068ea: 0f 82 85 00 00 00 jb 80106975 <allocuvm+0xa5>
a = PGROUNDUP(oldsz);
801068f0: 8d 98 ff 0f 00 00 lea 0xfff(%eax),%ebx
801068f6: 81 e3 00 f0 ff ff and $0xfffff000,%ebx
for(; a < newsz; a += PGSIZE){
801068fc: 39 df cmp %ebx,%edi
801068fe: 77 57 ja 80106957 <allocuvm+0x87>
80106900: eb 7e jmp 80106980 <allocuvm+0xb0>
80106902: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
memset(mem, 0, PGSIZE);
80106908: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
8010690f: 00
80106910: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80106917: 00
80106918: 89 04 24 mov %eax,(%esp)
8010691b: e8 60 d9 ff ff call 80104280 <memset>
if(mappages(pgdir, (char*)a, PGSIZE, V2P(mem), PTE_W|PTE_U) < 0){
80106920: 8d 86 00 00 00 80 lea -0x80000000(%esi),%eax
80106926: 89 44 24 0c mov %eax,0xc(%esp)
8010692a: 8b 45 08 mov 0x8(%ebp),%eax
8010692d: c7 44 24 10 06 00 00 movl $0x6,0x10(%esp)
80106934: 00
80106935: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
8010693c: 00
8010693d: 89 5c 24 04 mov %ebx,0x4(%esp)
80106941: 89 04 24 mov %eax,(%esp)
80106944: e8 87 fc ff ff call 801065d0 <mappages>
80106949: 85 c0 test %eax,%eax
8010694b: 78 43 js 80106990 <allocuvm+0xc0>
for(; a < newsz; a += PGSIZE){
8010694d: 81 c3 00 10 00 00 add $0x1000,%ebx
80106953: 39 df cmp %ebx,%edi
80106955: 76 29 jbe 80106980 <allocuvm+0xb0>
mem = kalloc();
80106957: e8 44 bb ff ff call 801024a0 <kalloc>
if(mem == 0){
8010695c: 85 c0 test %eax,%eax
mem = kalloc();
8010695e: 89 c6 mov %eax,%esi
if(mem == 0){
80106960: 75 a6 jne 80106908 <allocuvm+0x38>
cprintf("allocuvm out of memory\n");
80106962: c7 04 24 b9 78 10 80 movl $0x801078b9,(%esp)
80106969: e8 e2 9c ff ff call 80100650 <cprintf>
if(newsz >= oldsz)
8010696e: 3b 7d 0c cmp 0xc(%ebp),%edi
80106971: 77 47 ja 801069ba <allocuvm+0xea>
return 0;
80106973: 31 c0 xor %eax,%eax
}
80106975: 83 c4 2c add $0x2c,%esp
80106978: 5b pop %ebx
80106979: 5e pop %esi
8010697a: 5f pop %edi
8010697b: 5d pop %ebp
8010697c: c3 ret
8010697d: 8d 76 00 lea 0x0(%esi),%esi
80106980: 83 c4 2c add $0x2c,%esp
80106983: 89 f8 mov %edi,%eax
80106985: 5b pop %ebx
80106986: 5e pop %esi
80106987: 5f pop %edi
80106988: 5d pop %ebp
80106989: c3 ret
8010698a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
cprintf("allocuvm out of memory (2)\n");
80106990: c7 04 24 d1 78 10 80 movl $0x801078d1,(%esp)
80106997: e8 b4 9c ff ff call 80100650 <cprintf>
if(newsz >= oldsz)
8010699c: 3b 7d 0c cmp 0xc(%ebp),%edi
8010699f: 76 0d jbe 801069ae <allocuvm+0xde>
801069a1: 8b 4d 0c mov 0xc(%ebp),%ecx
801069a4: 89 fa mov %edi,%edx
801069a6: 8b 45 08 mov 0x8(%ebp),%eax
801069a9: e8 c2 fa ff ff call 80106470 <deallocuvm.part.0>
kfree(mem);
801069ae: 89 34 24 mov %esi,(%esp)
801069b1: e8 3a b9 ff ff call 801022f0 <kfree>
return 0;
801069b6: 31 c0 xor %eax,%eax
801069b8: eb bb jmp 80106975 <allocuvm+0xa5>
801069ba: 8b 4d 0c mov 0xc(%ebp),%ecx
801069bd: 89 fa mov %edi,%edx
801069bf: 8b 45 08 mov 0x8(%ebp),%eax
801069c2: e8 a9 fa ff ff call 80106470 <deallocuvm.part.0>
return 0;
801069c7: 31 c0 xor %eax,%eax
801069c9: eb aa jmp 80106975 <allocuvm+0xa5>
801069cb: 90 nop
801069cc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801069d0 <deallocuvm>:
{
801069d0: 55 push %ebp
801069d1: 89 e5 mov %esp,%ebp
801069d3: 8b 55 0c mov 0xc(%ebp),%edx
801069d6: 8b 4d 10 mov 0x10(%ebp),%ecx
801069d9: 8b 45 08 mov 0x8(%ebp),%eax
if(newsz >= oldsz)
801069dc: 39 d1 cmp %edx,%ecx
801069de: 73 08 jae 801069e8 <deallocuvm+0x18>
}
801069e0: 5d pop %ebp
801069e1: e9 8a fa ff ff jmp 80106470 <deallocuvm.part.0>
801069e6: 66 90 xchg %ax,%ax
801069e8: 89 d0 mov %edx,%eax
801069ea: 5d pop %ebp
801069eb: c3 ret
801069ec: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
801069f0 <freevm>:
// Free a page table and all the physical memory pages
// in the user part.
void
freevm(pde_t *pgdir)
{
801069f0: 55 push %ebp
801069f1: 89 e5 mov %esp,%ebp
801069f3: 56 push %esi
801069f4: 53 push %ebx
801069f5: 83 ec 10 sub $0x10,%esp
801069f8: 8b 75 08 mov 0x8(%ebp),%esi
uint i;
if(pgdir == 0)
801069fb: 85 f6 test %esi,%esi
801069fd: 74 59 je 80106a58 <freevm+0x68>
801069ff: 31 c9 xor %ecx,%ecx
80106a01: ba 00 00 00 80 mov $0x80000000,%edx
80106a06: 89 f0 mov %esi,%eax
panic("freevm: no pgdir");
deallocuvm(pgdir, KERNBASE, 0);
for(i = 0; i < NPDENTRIES; i++){
80106a08: 31 db xor %ebx,%ebx
80106a0a: e8 61 fa ff ff call 80106470 <deallocuvm.part.0>
80106a0f: eb 12 jmp 80106a23 <freevm+0x33>
80106a11: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80106a18: 83 c3 01 add $0x1,%ebx
80106a1b: 81 fb 00 04 00 00 cmp $0x400,%ebx
80106a21: 74 27 je 80106a4a <freevm+0x5a>
if(pgdir[i] & PTE_P){
80106a23: 8b 14 9e mov (%esi,%ebx,4),%edx
80106a26: f6 c2 01 test $0x1,%dl
80106a29: 74 ed je 80106a18 <freevm+0x28>
char * v = P2V(PTE_ADDR(pgdir[i]));
80106a2b: 81 e2 00 f0 ff ff and $0xfffff000,%edx
for(i = 0; i < NPDENTRIES; i++){
80106a31: 83 c3 01 add $0x1,%ebx
char * v = P2V(PTE_ADDR(pgdir[i]));
80106a34: 81 c2 00 00 00 80 add $0x80000000,%edx
kfree(v);
80106a3a: 89 14 24 mov %edx,(%esp)
80106a3d: e8 ae b8 ff ff call 801022f0 <kfree>
for(i = 0; i < NPDENTRIES; i++){
80106a42: 81 fb 00 04 00 00 cmp $0x400,%ebx
80106a48: 75 d9 jne 80106a23 <freevm+0x33>
}
}
kfree((char*)pgdir);
80106a4a: 89 75 08 mov %esi,0x8(%ebp)
}
80106a4d: 83 c4 10 add $0x10,%esp
80106a50: 5b pop %ebx
80106a51: 5e pop %esi
80106a52: 5d pop %ebp
kfree((char*)pgdir);
80106a53: e9 98 b8 ff ff jmp 801022f0 <kfree>
panic("freevm: no pgdir");
80106a58: c7 04 24 ed 78 10 80 movl $0x801078ed,(%esp)
80106a5f: e8 fc 98 ff ff call 80100360 <panic>
80106a64: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80106a6a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
80106a70 <setupkvm>:
{
80106a70: 55 push %ebp
80106a71: 89 e5 mov %esp,%ebp
80106a73: 56 push %esi
80106a74: 53 push %ebx
80106a75: 83 ec 20 sub $0x20,%esp
if((pgdir = (pde_t*)kalloc()) == 0)
80106a78: e8 23 ba ff ff call 801024a0 <kalloc>
80106a7d: 85 c0 test %eax,%eax
80106a7f: 89 c6 mov %eax,%esi
80106a81: 74 75 je 80106af8 <setupkvm+0x88>
memset(pgdir, 0, PGSIZE);
80106a83: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
80106a8a: 00
for(k = kmap; k < &kmap[NELEM(kmap)]; k++)
80106a8b: bb 20 a4 10 80 mov $0x8010a420,%ebx
memset(pgdir, 0, PGSIZE);
80106a90: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
80106a97: 00
80106a98: 89 04 24 mov %eax,(%esp)
80106a9b: e8 e0 d7 ff ff call 80104280 <memset>
if(mappages(pgdir, k->virt, k->phys_end - k->phys_start,
80106aa0: 8b 53 0c mov 0xc(%ebx),%edx
80106aa3: 8b 43 04 mov 0x4(%ebx),%eax
80106aa6: 89 34 24 mov %esi,(%esp)
80106aa9: 89 54 24 10 mov %edx,0x10(%esp)
80106aad: 8b 53 08 mov 0x8(%ebx),%edx
80106ab0: 89 44 24 0c mov %eax,0xc(%esp)
80106ab4: 29 c2 sub %eax,%edx
80106ab6: 8b 03 mov (%ebx),%eax
80106ab8: 89 54 24 08 mov %edx,0x8(%esp)
80106abc: 89 44 24 04 mov %eax,0x4(%esp)
80106ac0: e8 0b fb ff ff call 801065d0 <mappages>
80106ac5: 85 c0 test %eax,%eax
80106ac7: 78 17 js 80106ae0 <setupkvm+0x70>
for(k = kmap; k < &kmap[NELEM(kmap)]; k++)
80106ac9: 83 c3 10 add $0x10,%ebx
80106acc: 81 fb 60 a4 10 80 cmp $0x8010a460,%ebx
80106ad2: 72 cc jb 80106aa0 <setupkvm+0x30>
80106ad4: 89 f0 mov %esi,%eax
}
80106ad6: 83 c4 20 add $0x20,%esp
80106ad9: 5b pop %ebx
80106ada: 5e pop %esi
80106adb: 5d pop %ebp
80106adc: c3 ret
80106add: 8d 76 00 lea 0x0(%esi),%esi
freevm(pgdir);
80106ae0: 89 34 24 mov %esi,(%esp)
80106ae3: e8 08 ff ff ff call 801069f0 <freevm>
}
80106ae8: 83 c4 20 add $0x20,%esp
return 0;
80106aeb: 31 c0 xor %eax,%eax
}
80106aed: 5b pop %ebx
80106aee: 5e pop %esi
80106aef: 5d pop %ebp
80106af0: c3 ret
80106af1: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
return 0;
80106af8: 31 c0 xor %eax,%eax
80106afa: eb da jmp 80106ad6 <setupkvm+0x66>
80106afc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80106b00 <kvmalloc>:
{
80106b00: 55 push %ebp
80106b01: 89 e5 mov %esp,%ebp
80106b03: 83 ec 08 sub $0x8,%esp
kpgdir = setupkvm();
80106b06: e8 65 ff ff ff call 80106a70 <setupkvm>
80106b0b: a3 a4 55 11 80 mov %eax,0x801155a4
lcr3(V2P(kpgdir)); // switch to the kernel page table
80106b10: 05 00 00 00 80 add $0x80000000,%eax
80106b15: 0f 22 d8 mov %eax,%cr3
}
80106b18: c9 leave
80106b19: c3 ret
80106b1a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80106b20 <clearpteu>:
// Clear PTE_U on a page. Used to create an inaccessible
// page beneath the user stack.
void
clearpteu(pde_t *pgdir, char *uva)
{
80106b20: 55 push %ebp
pte_t *pte;
pte = walkpgdir(pgdir, uva, 0);
80106b21: 31 c9 xor %ecx,%ecx
{
80106b23: 89 e5 mov %esp,%ebp
80106b25: 83 ec 18 sub $0x18,%esp
pte = walkpgdir(pgdir, uva, 0);
80106b28: 8b 55 0c mov 0xc(%ebp),%edx
80106b2b: 8b 45 08 mov 0x8(%ebp),%eax
80106b2e: e8 ad f8 ff ff call 801063e0 <walkpgdir>
if(pte == 0)
80106b33: 85 c0 test %eax,%eax
80106b35: 74 05 je 80106b3c <clearpteu+0x1c>
panic("clearpteu");
*pte &= ~PTE_U;
80106b37: 83 20 fb andl $0xfffffffb,(%eax)
}
80106b3a: c9 leave
80106b3b: c3 ret
panic("clearpteu");
80106b3c: c7 04 24 fe 78 10 80 movl $0x801078fe,(%esp)
80106b43: e8 18 98 ff ff call 80100360 <panic>
80106b48: 90 nop
80106b49: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
80106b50 <copyuvm>:
// Given a parent process's page table, create a copy
// of it for a child.
pde_t*
copyuvm(pde_t *pgdir, uint sz, uint szStack)
{
80106b50: 55 push %ebp
80106b51: 89 e5 mov %esp,%ebp
80106b53: 57 push %edi
80106b54: 56 push %esi
80106b55: 53 push %ebx
80106b56: 83 ec 2c sub $0x2c,%esp
pte_t *pte;
uint pa, i,j, flags;
//struct proc *currproc = myproc();
char *mem;
if((d = setupkvm()) == 0)
80106b59: e8 12 ff ff ff call 80106a70 <setupkvm>
80106b5e: 85 c0 test %eax,%eax
80106b60: 89 45 e0 mov %eax,-0x20(%ebp)
80106b63: 0f 84 6b 01 00 00 je 80106cd4 <copyuvm+0x184>
return 0;
for(i = 0; i < sz; i += PGSIZE){
80106b69: 8b 55 0c mov 0xc(%ebp),%edx
80106b6c: 85 d2 test %edx,%edx
80106b6e: 0f 84 ac 00 00 00 je 80106c20 <copyuvm+0xd0>
80106b74: 31 db xor %ebx,%ebx
80106b76: eb 51 jmp 80106bc9 <copyuvm+0x79>
panic("copyuvm: page not present");
pa = PTE_ADDR(*pte);
flags = PTE_FLAGS(*pte);
if((mem = kalloc()) == 0)
goto bad;
memmove(mem, (char*)P2V(pa), PGSIZE);
80106b78: 81 c7 00 00 00 80 add $0x80000000,%edi
80106b7e: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
80106b85: 00
80106b86: 89 7c 24 04 mov %edi,0x4(%esp)
80106b8a: 89 04 24 mov %eax,(%esp)
80106b8d: e8 8e d7 ff ff call 80104320 <memmove>
if(mappages(d, (void*)i, PGSIZE, V2P(mem), flags) < 0)
80106b92: 8b 45 e4 mov -0x1c(%ebp),%eax
80106b95: 8d 96 00 00 00 80 lea -0x80000000(%esi),%edx
80106b9b: 89 54 24 0c mov %edx,0xc(%esp)
80106b9f: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
80106ba6: 00
80106ba7: 89 5c 24 04 mov %ebx,0x4(%esp)
80106bab: 89 44 24 10 mov %eax,0x10(%esp)
80106baf: 8b 45 e0 mov -0x20(%ebp),%eax
80106bb2: 89 04 24 mov %eax,(%esp)
80106bb5: e8 16 fa ff ff call 801065d0 <mappages>
80106bba: 85 c0 test %eax,%eax
80106bbc: 78 4d js 80106c0b <copyuvm+0xbb>
for(i = 0; i < sz; i += PGSIZE){
80106bbe: 81 c3 00 10 00 00 add $0x1000,%ebx
80106bc4: 39 5d 0c cmp %ebx,0xc(%ebp)
80106bc7: 76 57 jbe 80106c20 <copyuvm+0xd0>
if((pte = walkpgdir(pgdir, (void *) i, 0)) == 0)
80106bc9: 8b 45 08 mov 0x8(%ebp),%eax
80106bcc: 31 c9 xor %ecx,%ecx
80106bce: 89 da mov %ebx,%edx
80106bd0: e8 0b f8 ff ff call 801063e0 <walkpgdir>
80106bd5: 85 c0 test %eax,%eax
80106bd7: 0f 84 0a 01 00 00 je 80106ce7 <copyuvm+0x197>
if(!(*pte & PTE_P))
80106bdd: 8b 30 mov (%eax),%esi
80106bdf: f7 c6 01 00 00 00 test $0x1,%esi
80106be5: 0f 84 f0 00 00 00 je 80106cdb <copyuvm+0x18b>
pa = PTE_ADDR(*pte);
80106beb: 89 f7 mov %esi,%edi
flags = PTE_FLAGS(*pte);
80106bed: 81 e6 ff 0f 00 00 and $0xfff,%esi
80106bf3: 89 75 e4 mov %esi,-0x1c(%ebp)
pa = PTE_ADDR(*pte);
80106bf6: 81 e7 00 f0 ff ff and $0xfffff000,%edi
if((mem = kalloc()) == 0)
80106bfc: e8 9f b8 ff ff call 801024a0 <kalloc>
80106c01: 85 c0 test %eax,%eax
80106c03: 89 c6 mov %eax,%esi
80106c05: 0f 85 6d ff ff ff jne 80106b78 <copyuvm+0x28>
return d;
bad:
freevm(d);
80106c0b: 8b 45 e0 mov -0x20(%ebp),%eax
80106c0e: 89 04 24 mov %eax,(%esp)
80106c11: e8 da fd ff ff call 801069f0 <freevm>
return 0;
80106c16: 31 c0 xor %eax,%eax
}
80106c18: 83 c4 2c add $0x2c,%esp
80106c1b: 5b pop %ebx
80106c1c: 5e pop %esi
80106c1d: 5f pop %edi
80106c1e: 5d pop %ebp
80106c1f: c3 ret
for(j = KERNBASE2 - PGSIZE +1 ; szStack > 0; j-= PGSIZE,szStack--){ //do we increment or decrement pgsize
80106c20: 8b 45 10 mov 0x10(%ebp),%eax
80106c23: 85 c0 test %eax,%eax
80106c25: 0f 84 9e 00 00 00 je 80106cc9 <copyuvm+0x179>
80106c2b: bb 00 f0 ff 7f mov $0x7ffff000,%ebx
80106c30: eb 58 jmp 80106c8a <copyuvm+0x13a>
80106c32: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
memmove(mem, (char*)P2V(pa), PGSIZE);
80106c38: 81 c7 00 00 00 80 add $0x80000000,%edi
80106c3e: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
80106c45: 00
80106c46: 89 7c 24 04 mov %edi,0x4(%esp)
80106c4a: 89 04 24 mov %eax,(%esp)
80106c4d: e8 ce d6 ff ff call 80104320 <memmove>
if(mappages(d, (void*)j, PGSIZE, V2P(mem), flags) < 0)
80106c52: 8b 45 e4 mov -0x1c(%ebp),%eax
80106c55: 8d 96 00 00 00 80 lea -0x80000000(%esi),%edx
80106c5b: 89 54 24 0c mov %edx,0xc(%esp)
80106c5f: c7 44 24 08 00 10 00 movl $0x1000,0x8(%esp)
80106c66: 00
80106c67: 89 5c 24 04 mov %ebx,0x4(%esp)
80106c6b: 89 44 24 10 mov %eax,0x10(%esp)
80106c6f: 8b 45 e0 mov -0x20(%ebp),%eax
80106c72: 89 04 24 mov %eax,(%esp)
80106c75: e8 56 f9 ff ff call 801065d0 <mappages>
80106c7a: 85 c0 test %eax,%eax
80106c7c: 78 8d js 80106c0b <copyuvm+0xbb>
for(j = KERNBASE2 - PGSIZE +1 ; szStack > 0; j-= PGSIZE,szStack--){ //do we increment or decrement pgsize
80106c7e: 81 eb 00 10 00 00 sub $0x1000,%ebx
80106c84: 83 6d 10 01 subl $0x1,0x10(%ebp)
80106c88: 74 3f je 80106cc9 <copyuvm+0x179>
if((pte = walkpgdir(pgdir, (void *) j, 0)) == 0)
80106c8a: 8b 45 08 mov 0x8(%ebp),%eax
80106c8d: 31 c9 xor %ecx,%ecx
80106c8f: 89 da mov %ebx,%edx
80106c91: e8 4a f7 ff ff call 801063e0 <walkpgdir>
80106c96: 85 c0 test %eax,%eax
80106c98: 74 4d je 80106ce7 <copyuvm+0x197>
if(!(*pte & PTE_P))
80106c9a: 8b 30 mov (%eax),%esi
80106c9c: f7 c6 01 00 00 00 test $0x1,%esi
80106ca2: 74 37 je 80106cdb <copyuvm+0x18b>
pa = PTE_ADDR(*pte);
80106ca4: 89 f7 mov %esi,%edi
flags = PTE_FLAGS(*pte);
80106ca6: 81 e6 ff 0f 00 00 and $0xfff,%esi
80106cac: 89 75 e4 mov %esi,-0x1c(%ebp)
pa = PTE_ADDR(*pte);
80106caf: 81 e7 00 f0 ff ff and $0xfffff000,%edi
if((mem = kalloc()) == 0)
80106cb5: e8 e6 b7 ff ff call 801024a0 <kalloc>
80106cba: 85 c0 test %eax,%eax
80106cbc: 89 c6 mov %eax,%esi
80106cbe: 0f 85 74 ff ff ff jne 80106c38 <copyuvm+0xe8>
80106cc4: e9 42 ff ff ff jmp 80106c0b <copyuvm+0xbb>
80106cc9: 8b 45 e0 mov -0x20(%ebp),%eax
}
80106ccc: 83 c4 2c add $0x2c,%esp
80106ccf: 5b pop %ebx
80106cd0: 5e pop %esi
80106cd1: 5f pop %edi
80106cd2: 5d pop %ebp
80106cd3: c3 ret
return 0;
80106cd4: 31 c0 xor %eax,%eax
80106cd6: e9 3d ff ff ff jmp 80106c18 <copyuvm+0xc8>
panic("copyuvm: page not present");
80106cdb: c7 04 24 22 79 10 80 movl $0x80107922,(%esp)
80106ce2: e8 79 96 ff ff call 80100360 <panic>
panic("copyuvm: pte should exist");
80106ce7: c7 04 24 08 79 10 80 movl $0x80107908,(%esp)
80106cee: e8 6d 96 ff ff call 80100360 <panic>
80106cf3: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80106cf9: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80106d00 <uva2ka>:
//PAGEBREAK!
// Map user virtual address to kernel address.
char*
uva2ka(pde_t *pgdir, char *uva)
{
80106d00: 55 push %ebp
pte_t *pte;
pte = walkpgdir(pgdir, uva, 0);
80106d01: 31 c9 xor %ecx,%ecx
{
80106d03: 89 e5 mov %esp,%ebp
80106d05: 83 ec 08 sub $0x8,%esp
pte = walkpgdir(pgdir, uva, 0);
80106d08: 8b 55 0c mov 0xc(%ebp),%edx
80106d0b: 8b 45 08 mov 0x8(%ebp),%eax
80106d0e: e8 cd f6 ff ff call 801063e0 <walkpgdir>
if((*pte & PTE_P) == 0)
80106d13: 8b 00 mov (%eax),%eax
80106d15: 89 c2 mov %eax,%edx
80106d17: 83 e2 05 and $0x5,%edx
return 0;
if((*pte & PTE_U) == 0)
80106d1a: 83 fa 05 cmp $0x5,%edx
80106d1d: 75 11 jne 80106d30 <uva2ka+0x30>
return 0;
return (char*)P2V(PTE_ADDR(*pte));
80106d1f: 25 00 f0 ff ff and $0xfffff000,%eax
80106d24: 05 00 00 00 80 add $0x80000000,%eax
}
80106d29: c9 leave
80106d2a: c3 ret
80106d2b: 90 nop
80106d2c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
return 0;
80106d30: 31 c0 xor %eax,%eax
}
80106d32: c9 leave
80106d33: c3 ret
80106d34: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
80106d3a: 8d bf 00 00 00 00 lea 0x0(%edi),%edi
80106d40 <copyout>:
// Copy len bytes from p to user address va in page table pgdir.
// Most useful when pgdir is not the current page table.
// uva2ka ensures this only works for PTE_U pages.
int
copyout(pde_t *pgdir, uint va, void *p, uint len)
{
80106d40: 55 push %ebp
80106d41: 89 e5 mov %esp,%ebp
80106d43: 57 push %edi
80106d44: 56 push %esi
80106d45: 53 push %ebx
80106d46: 83 ec 1c sub $0x1c,%esp
80106d49: 8b 5d 14 mov 0x14(%ebp),%ebx
80106d4c: 8b 4d 0c mov 0xc(%ebp),%ecx
80106d4f: 8b 7d 10 mov 0x10(%ebp),%edi
char *buf, *pa0;
uint n, va0;
buf = (char*)p;
while(len > 0){
80106d52: 85 db test %ebx,%ebx
80106d54: 75 3a jne 80106d90 <copyout+0x50>
80106d56: eb 68 jmp 80106dc0 <copyout+0x80>
va0 = (uint)PGROUNDDOWN(va);
pa0 = uva2ka(pgdir, (char*)va0);
if(pa0 == 0)
return -1;
n = PGSIZE - (va - va0);
80106d58: 8b 4d e4 mov -0x1c(%ebp),%ecx
80106d5b: 89 f2 mov %esi,%edx
if(n > len)
n = len;
memmove(pa0 + (va - va0), buf, n);
80106d5d: 89 7c 24 04 mov %edi,0x4(%esp)
n = PGSIZE - (va - va0);
80106d61: 29 ca sub %ecx,%edx
80106d63: 81 c2 00 10 00 00 add $0x1000,%edx
80106d69: 39 da cmp %ebx,%edx
80106d6b: 0f 47 d3 cmova %ebx,%edx
memmove(pa0 + (va - va0), buf, n);
80106d6e: 29 f1 sub %esi,%ecx
80106d70: 01 c8 add %ecx,%eax
80106d72: 89 54 24 08 mov %edx,0x8(%esp)
80106d76: 89 04 24 mov %eax,(%esp)
80106d79: 89 55 e4 mov %edx,-0x1c(%ebp)
80106d7c: e8 9f d5 ff ff call 80104320 <memmove>
len -= n;
buf += n;
80106d81: 8b 55 e4 mov -0x1c(%ebp),%edx
va = va0 + PGSIZE;
80106d84: 8d 8e 00 10 00 00 lea 0x1000(%esi),%ecx
buf += n;
80106d8a: 01 d7 add %edx,%edi
while(len > 0){
80106d8c: 29 d3 sub %edx,%ebx
80106d8e: 74 30 je 80106dc0 <copyout+0x80>
pa0 = uva2ka(pgdir, (char*)va0);
80106d90: 8b 45 08 mov 0x8(%ebp),%eax
va0 = (uint)PGROUNDDOWN(va);
80106d93: 89 ce mov %ecx,%esi
80106d95: 81 e6 00 f0 ff ff and $0xfffff000,%esi
pa0 = uva2ka(pgdir, (char*)va0);
80106d9b: 89 74 24 04 mov %esi,0x4(%esp)
va0 = (uint)PGROUNDDOWN(va);
80106d9f: 89 4d e4 mov %ecx,-0x1c(%ebp)
pa0 = uva2ka(pgdir, (char*)va0);
80106da2: 89 04 24 mov %eax,(%esp)
80106da5: e8 56 ff ff ff call 80106d00 <uva2ka>
if(pa0 == 0)
80106daa: 85 c0 test %eax,%eax
80106dac: 75 aa jne 80106d58 <copyout+0x18>
}
return 0;
}
80106dae: 83 c4 1c add $0x1c,%esp
return -1;
80106db1: b8 ff ff ff ff mov $0xffffffff,%eax
}
80106db6: 5b pop %ebx
80106db7: 5e pop %esi
80106db8: 5f pop %edi
80106db9: 5d pop %ebp
80106dba: c3 ret
80106dbb: 90 nop
80106dbc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80106dc0: 83 c4 1c add $0x1c,%esp
return 0;
80106dc3: 31 c0 xor %eax,%eax
}
80106dc5: 5b pop %ebx
80106dc6: 5e pop %esi
80106dc7: 5f pop %edi
80106dc8: 5d pop %ebp
80106dc9: c3 ret
80106dca: 66 90 xchg %ax,%ax
80106dcc: 66 90 xchg %ax,%ax
80106dce: 66 90 xchg %ax,%ax
80106dd0 <shminit>:
char *frame;
int refcnt;
} shm_pages[64];
} shm_table;
void shminit() {
80106dd0: 55 push %ebp
80106dd1: 89 e5 mov %esp,%ebp
80106dd3: 83 ec 18 sub $0x18,%esp
int i;
initlock(&(shm_table.lock), "SHM lock");
80106dd6: c7 44 24 04 60 79 10 movl $0x80107960,0x4(%esp)
80106ddd: 80
80106dde: c7 04 24 c0 55 11 80 movl $0x801155c0,(%esp)
80106de5: e8 66 d2 ff ff call 80104050 <initlock>
acquire(&(shm_table.lock));
80106dea: c7 04 24 c0 55 11 80 movl $0x801155c0,(%esp)
80106df1: e8 4a d3 ff ff call 80104140 <acquire>
80106df6: b8 f4 55 11 80 mov $0x801155f4,%eax
80106dfb: 90 nop
80106dfc: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
for (i = 0; i< 64; i++) {
shm_table.shm_pages[i].id =0;
80106e00: c7 00 00 00 00 00 movl $0x0,(%eax)
80106e06: 83 c0 0c add $0xc,%eax
shm_table.shm_pages[i].frame =0;
80106e09: c7 40 f8 00 00 00 00 movl $0x0,-0x8(%eax)
shm_table.shm_pages[i].refcnt =0;
80106e10: c7 40 fc 00 00 00 00 movl $0x0,-0x4(%eax)
for (i = 0; i< 64; i++) {
80106e17: 3d f4 58 11 80 cmp $0x801158f4,%eax
80106e1c: 75 e2 jne 80106e00 <shminit+0x30>
}
release(&(shm_table.lock));
80106e1e: c7 04 24 c0 55 11 80 movl $0x801155c0,(%esp)
80106e25: e8 06 d4 ff ff call 80104230 <release>
}
80106e2a: c9 leave
80106e2b: c3 ret
80106e2c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80106e30 <shm_open>:
int shm_open(int id, char **pointer) {
80106e30: 55 push %ebp
return 0; //added to remove compiler warning -- you should decide what to return
}
80106e31: 31 c0 xor %eax,%eax
int shm_open(int id, char **pointer) {
80106e33: 89 e5 mov %esp,%ebp
}
80106e35: 5d pop %ebp
80106e36: c3 ret
80106e37: 89 f6 mov %esi,%esi
80106e39: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
80106e40 <shm_close>:
int shm_close(int id) {
80106e40: 55 push %ebp
return 0; //added to remove compiler warning -- you should decide what to return
}
80106e41: 31 c0 xor %eax,%eax
int shm_close(int id) {
80106e43: 89 e5 mov %esp,%ebp
}
80106e45: 5d pop %ebp
80106e46: c3 ret
|
programs/oeis/011/A011931.asm | neoneye/loda | 22 | 406 | ; A011931: [ n(n-1)(n-2)(n-3)/21 ].
; 0,0,0,0,1,5,17,40,80,144,240,377,565,817,1144,1560,2080,2720,3497,4429,5537,6840,8360,10120,12144,14457,17085,20057,23400,27144,31320,35960,41097,46765,53001,59840
bin $0,4
mul $0,8
div $0,7
|
ARM-Cortex-M/ARMv6-M/ARM/cpu_a.asm | nykytenko/uC-CPU | 0 | 93256 | ;********************************************************************************************************
; uC/CPU
; CPU CONFIGURATION & PORT LAYER
;
; Copyright 2004-2020 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
; This software is subject to an open source license and is distributed by
; Silicon Laboratories Inc. pursuant to the terms of the Apache License,
; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
;
;********************************************************************************************************
;********************************************************************************************************
;
; CPU PORT FILE
;
; ARMv6-M
; ARM C Compiler
;
; Filename : cpu_a.asm
; Version : v1.32.00
;********************************************************************************************************
; Note(s) : This port supports the ARM Cortex-M0, and Cortex-M0+ architectures.
;********************************************************************************************************
;********************************************************************************************************
; PUBLIC FUNCTIONS
;********************************************************************************************************
EXPORT CPU_IntDis
EXPORT CPU_IntEn
EXPORT CPU_SR_Save
EXPORT CPU_SR_Restore
EXPORT CPU_WaitForInt
EXPORT CPU_WaitForExcept
;********************************************************************************************************
; CODE GENERATION DIRECTIVES
;********************************************************************************************************
AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
;********************************************************************************************************
; DISABLE and ENABLE INTERRUPTS
;
; Description : Disable/Enable interrupts.
;
; Prototypes : void CPU_IntDis(void);
; void CPU_IntEn (void);
;********************************************************************************************************
CPU_IntDis
CPSID I
BX LR
CPU_IntEn
CPSIE I
BX LR
;********************************************************************************************************
; CRITICAL SECTION FUNCTIONS
;
; Description : Disable/Enable interrupts by preserving the state of interrupts. Generally speaking, the
; state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
; are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
; The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
;
; Prototypes : CPU_SR CPU_SR_Save (void);
; void CPU_SR_Restore(CPU_SR cpu_sr);
;
; Note(s) : (1) These functions are used in general like this :
;
; void Task (void *p_arg)
; {
; CPU_SR_ALLOC(); /* Allocate storage for CPU status register */
; :
; :
; CPU_CRITICAL_ENTER(); /* cpu_sr = CPU_SR_Save(); */
; :
; :
; CPU_CRITICAL_EXIT(); /* CPU_SR_Restore(cpu_sr); */
; :
; }
;********************************************************************************************************
CPU_SR_Save
MRS R0, PRIMASK ; Set prio int mask to mask all (except faults)
CPSID I
BX LR
CPU_SR_Restore ; See Note #2.
MSR PRIMASK, R0
BX LR
;********************************************************************************************************
; WAIT FOR INTERRUPT
;
; Description : Enters sleep state, which will be exited when an interrupt is received.
;
; Prototypes : void CPU_WaitForInt (void)
;
; Argument(s) : none.
;********************************************************************************************************
CPU_WaitForInt
WFI ; Wait for interrupt
BX LR
;********************************************************************************************************
; WAIT FOR EXCEPTION
;
; Description : Enters sleep state, which will be exited when an exception is received.
;
; Prototypes : void CPU_WaitForExcept (void)
;
; Argument(s) : none.
;********************************************************************************************************
CPU_WaitForExcept
WFE ; Wait for exception
BX LR
;********************************************************************************************************
; CPU ASSEMBLY PORT FILE END
;********************************************************************************************************
END
|
oeis/222/A222068.asm | neoneye/loda-programs | 11 | 165048 | <reponame>neoneye/loda-programs
; A222068: Decimal expansion of (1/16)*Pi^2.
; Submitted by <NAME>
; 6,1,6,8,5,0,2,7,5,0,6,8,0,8,4,9,1,3,6,7,7,1,5,5,6,8,7,4,9,2,2,5,9,4,4,5,9,5,7,1,0,6,2,1,2,9,5,2,5,4,9,4,1,4,1,5,0,8,3,4,3,3,6,0,1,3,7,5,2,8,0,1,4,0,1,2,0,0,3,2,7,6,8,7,6,1,0,8,3,7,7,3,2,4,0,9,5,1,4,4
add $0,1
mov $1,1
mov $2,1
mov $3,$0
mul $3,5
sub $3,1
lpb $3
mul $1,$3
mov $5,$3
mul $5,2
add $5,1
mul $2,$5
add $1,$2
div $1,$0
div $2,$0
sub $3,1
lpe
pow $1,2
pow $2,2
mul $2,2
mov $4,10
pow $4,$0
div $2,$4
mul $2,2
div $1,$2
mov $0,$1
mod $0,10
|
VS/CSHARP/asm-dude-vsix/Resources/examples/TextFile1.asm | YellowAfterlife/asm-dude | 4,075 | 178320 |
mov rax, -10
|
programs/oeis/070/A070412.asm | neoneye/loda | 22 | 6273 | ; A070412: a(n) = 7^n mod 27.
; 1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1,7,22,19,25,13,10,16,4,1
mov $1,$0
mul $0,15
add $0,14
mul $1,$0
lpb $1
mod $1,9
lpe
mov $0,$1
mul $0,3
add $0,1
|
Working Disassembly/General/Special Stage/Map - Sphere.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 5 | 3995 | Map_A464: dc.w word_A48A-Map_A464
dc.w word_A492-Map_A464
dc.w word_A49A-Map_A464
dc.w word_A4A2-Map_A464
dc.w word_A4AA-Map_A464
dc.w word_A4B2-Map_A464
dc.w word_A4BA-Map_A464
dc.w word_A4C2-Map_A464
dc.w word_A4CA-Map_A464
dc.w word_A4D2-Map_A464
dc.w word_A4DA-Map_A464
dc.w word_A4DA-Map_A464
dc.w word_A4E2-Map_A464
dc.w word_A4E2-Map_A464
dc.w word_A4EA-Map_A464
dc.w word_A4EA-Map_A464
dc.w word_A4F2-Map_A464
dc.w word_A4FA-Map_A464
dc.w word_A502-Map_A464
word_A48A: dc.w 1
dc.b $F0, $F, 0, 0, $FF, $F0
word_A492: dc.w 1
dc.b $F0, $F, 0, $10, $FF, $F0
word_A49A: dc.w 1
dc.b $F0, $F, 0, $20, $FF, $F0
word_A4A2: dc.w 1
dc.b $F0, $F, 0, $30, $FF, $F0
word_A4AA: dc.w 1
dc.b $F4, $A, 0, $40, $FF, $F4
word_A4B2: dc.w 1
dc.b $F4, $A, 0, $49, $FF, $F4
word_A4BA: dc.w 1
dc.b $F4, $A, 0, $52, $FF, $F4
word_A4C2: dc.w 1
dc.b $F4, $A, 0, $5B, $FF, $F4
word_A4CA: dc.w 1
dc.b $F8, 5, 0, $64, $FF, $F8
word_A4D2: dc.w 1
dc.b $F8, 5, 0, $68, $FF, $F8
word_A4DA: dc.w 1
dc.b $F8, 5, 0, $6C, $FF, $F8
word_A4E2: dc.w 1
dc.b $F8, 5, 0, $70, $FF, $F8
word_A4EA: dc.w 1
dc.b $FC, 0, 0, $74, $FF, $FC
word_A4F2: dc.w 1
dc.b $FC, 0, 0, $75, $FF, $FC
word_A4FA: dc.w 1
dc.b $FC, 0, 0, $76, $FF, $FC
word_A502: dc.w 1
dc.b $FC, 0, 0, $77, $FF, $FC
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1034.asm | ljhsiun2/medusa | 9 | 163295 | <filename>Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_1034.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x1671b, %rsi
lea addresses_UC_ht+0x39db, %rdi
nop
nop
nop
sub $11283, %r9
mov $101, %rcx
rep movsb
nop
nop
nop
add $40686, %r12
lea addresses_WC_ht+0x995b, %rbx
nop
nop
nop
nop
cmp $35697, %rbp
movl $0x61626364, (%rbx)
and %rsi, %rsi
lea addresses_D_ht+0x405b, %rsi
lea addresses_A_ht+0x45eb, %rdi
nop
nop
nop
nop
nop
sub $6609, %r14
mov $57, %rcx
rep movsw
nop
nop
add %rbx, %rbx
lea addresses_D_ht+0x1445b, %rdi
nop
nop
sub $9858, %rbx
movb (%rdi), %cl
and %rbp, %rbp
lea addresses_normal_ht+0xd85b, %rsi
nop
nop
nop
nop
and $6948, %rbx
mov $0x6162636465666768, %rbp
movq %rbp, %xmm6
movups %xmm6, (%rsi)
dec %rcx
lea addresses_WC_ht+0xec42, %r9
nop
add $24438, %rcx
mov $0x6162636465666768, %r12
movq %r12, %xmm0
and $0xffffffffffffffc0, %r9
movntdq %xmm0, (%r9)
nop
nop
nop
inc %r12
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r15
push %rbx
push %rcx
push %rdi
push %rsi
// REPMOV
lea addresses_D+0x1185b, %rsi
lea addresses_UC+0x126af, %rdi
nop
nop
nop
xor $35338, %r14
mov $114, %rcx
rep movsq
dec %r14
// REPMOV
lea addresses_WC+0x3f5b, %rsi
lea addresses_normal+0xcc5b, %rdi
nop
nop
nop
nop
nop
sub $5812, %r13
mov $1, %rcx
rep movsw
nop
nop
nop
nop
add $1212, %rcx
// Store
mov $0x75b, %rdi
nop
nop
nop
nop
nop
sub %rsi, %rsi
movb $0x51, (%rdi)
nop
nop
nop
sub %rbx, %rbx
// Faulty Load
lea addresses_D+0x1185b, %r15
nop
nop
nop
nop
xor %rbx, %rbx
mov (%r15), %di
lea oracles, %rcx
and $0xff, %rdi
shlq $12, %rdi
mov (%rcx,%rdi,1), %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r15
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 4, 'NT': True, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D', 'congruent': 0, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC', 'congruent': 2, 'same': False}}
{'src': {'type': 'addresses_WC', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal', 'congruent': 10, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 8}}
[Faulty Load]
{'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 2, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 8}}
{'src': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}}
{'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 10}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 16, 'NT': True, 'same': False, 'congruent': 0}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
|
src/agate-syscalls.ads | Fabien-Chouteau/AGATE | 3 | 3450 | <reponame>Fabien-Chouteau/AGATE
------------------------------------------------------------------------------
-- --
-- Copyright (C) 2017-2018, <NAME> --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions are --
-- met: --
-- 1. Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- 2. Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in --
-- the documentation and/or other materials provided with the --
-- distribution. --
-- 3. Neither the name of the copyright holder nor the names of its --
-- contributors may be used to endorse or promote products derived --
-- from this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT --
-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, --
-- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY --
-- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT --
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --
-- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
private package AGATE.SysCalls is
type Syscall_ID is (Yield, Clock, Delay_Until, Sem_Signal, Sem_Wait,
Shutdown, Mutex_Wait_Lock, Mutex_Try_Lock,
Mutex_Release, Print);
function Call (ID : Syscall_ID;
Arg1, Arg2, Arg3 : Word := 0)
return UInt64;
procedure Call (ID : Syscall_ID;
Arg1, Arg2, Arg3 : Word := 0);
type Syscall_Handler is access
function (Arg1, Arg2, Arg3 : Word) return UInt64;
function Registred (ID : Syscall_ID) return Boolean;
-- Return True if a handler is registered for the given syscall
procedure Register (ID : Syscall_ID;
Handler : not null Syscall_Handler)
with Pre => not Registred (ID);
-- Register a handler for the given syscall
end AGATE.SysCalls;
|
programs/oeis/040/A040309.asm | karttu/loda | 1 | 13164 | ; A040309: Continued fraction for sqrt(328).
; 18,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36,9,36
add $0,1
mov $1,$0
mul $1,$0
trn $1,3
sub $1,2
gcd $1,8
mul $1,9
|
programs/oeis/055/A055881.asm | jmorken/loda | 1 | 99302 | <filename>programs/oeis/055/A055881.asm
; A055881: a(n) = largest m such that m! divides n.
; 1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,5,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,4,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,3,1,2,1,2,1,5,1,2,1,2,1,3,1,2,1,2
mov $9,$0
mov $11,2
lpb $11
clr $0,9
mov $0,$9
sub $11,1
add $0,$11
mov $2,1
lpb $0
add $2,1
div $0,$2
add $7,$0
lpe
mov $1,$7
mov $12,$11
lpb $12
mov $10,$1
sub $12,1
lpe
lpe
lpb $9
mov $9,0
sub $10,$1
lpe
mov $1,$10
add $1,1
|
app/prelude1/src/player-6.asm | ern0/549notes | 2 | 176875 | ;-----------------------------------------------------------------------
; Prelude1 - PC-DOS 256-byte intro by ern0 & TomCat
; Prototype-2: raw-diff-5 nctab nutab
;
; Target: 80386 real mode, assembler: FASM
;
;-----------------------------------------------------------------------
; Register allocation:
;
; AL - local, bit counter (SHL until carry) + result
; AH - local, data sub correction
; BL - global, line counter
; BH - global, delay
; DX - global, constant, 330H - the midi data port
; CX - local, line counter, note counter
; SI - local, 5-byte rotation
; DI - global, used in 5+3 repeat
; BP - global, load bit pointer
; ES - global, =DS
;
;-----------------------------------------------------------------------
TEST_MODE = 0
FFWD_TO = 0
;-----------------------------------------------------------------------
org 100H
DB 3FH
MOV DX,331H
OUTSB
DEC DX
SUB CX,CX
.1:
XOR AL,13H
INT 10H
MOV AX,CX
MUL AH
AND AL,15
MOV AH,0CH
LOOP .1
SUB BP,BP
MOV BH,5+1
@next_line:
MOV DI,data_start+5
MOV CL,5
@five_of_eight:
call load_play_note
LOOP @five_of_eight
SUB SI,3 ; SI is from rotate_notes
MOV CL,3+8
@three_of_eight:
call play_note
LOOP @three_of_eight
ADC BL,DH ; ADD BL,4
JNS @next_line ; LOOP 32x (BP:26CH)
MOV CL,5+16+16-1
@next:
CMP CL,16-1 ; tempo: slow down
JA @set_delay
MOV BH,6+1
CMP CL,5-1 ; tempo: final 5 notes
JA @set_delay
MOV BH,1+1
@set_delay:
call load_play_note
LOOP @next
if TEST_MODE > 0
call load_play_note
jmp test_summary
end if
; fall load_play_note
;-----------------------------------------------------------------------
load_play_note:
MOV SI,data_start
MOV AL,16 ; AL:%xxx1'0000: 4 SHL to carry
@load_uncompressed:
SUB BYTE [SI],DL ; DL = DATA_USUB - DATA_CSUB
@read_bit:
BT [SI-data_start+data_notes],BP
INC BP
RCL AL,1
JNC @read_bit
;word_read:
CMP AL,2 ; check for special value, AL:%xxxx'xx10: 7 SHL to carry
JE @load_uncompressed
;adjust_word:
ADD AL,DATA_USUB - 2*DATA_CSUB
;rotate_notes:
if TEST_MODE > 0
call test_diff
end if
ADD AL,[SI]
PUSH DI
MOV DI,SI
INC SI
MOVSW
MOVSW
STOSB
DEC SI
POP DI
; fall play_note
;-----------------------------------------------------------------------
play_note:
PUSHA
MOV AX,0E90H
OUT DX,AL
LODSB
if TEST_MODE > 0
call test_note
MOV BL,AL
MOV AX,7FH
INT 1AH
CMP BP,DX
MOV BP,DX
DEC BH
jmp skip_wait
end if
if FFWD_TO > 0
push ax
in al,60H
cmp al,1
jne .noquit
mov ax,4c00H
int 21H
.noquit:
pop ax
test word [ffwd_counter],-1
jz ffwd_cont
dec word [ffwd_counter]
MOV BL,AL
MOV AX,7FH
INT 1AH
CMP BP,DX
MOV BP,DX
DEC BH
jmp skip_wait
ffwd_counter:
dw FFWD_TO
ffwd_cont:
end if
OUT DX,AL
MOV BL,AL
INT 10H ; dump note
MOV AX,2C7FH
OUT DX,AL
; fall wait
;-----------------------------------------------------------------------
@wait_tick:
INT 21H
CMP BP,DX
je @wait_tick
MOV BP,DX
DEC BH
jne @wait_tick
skip_wait:
POPA
MOVSB
ret
;-----------------------------------------------------------------------
if TEST_MODE > 0
display "----[ Test mode, result will be written to TEST-6.TXT ]--------"
include "test.asm"
include "test-6.inc"
test_file_name:
db "TEST-6.TXT",0
end if
;-----------------------------------------------------------------------
include "data-6.inc"
|
scripts/get-path-without-extension.applescript | retifrav/ASs | 0 | 4650 | on getPathWithoutExtension(fname)
set pathWithoutExtension to ""
set defaultTID to AppleScript's text item delimiters
try
# debug
#set fname to "/Users/yourname/temp/some.log"
# set new delimiters to "."
set AppleScript's text item delimiters to {"."}
# get the list of fname items separated by the new delimiter
set fnameSeparated to fname's text items
# some magic here to exclude the last item which is extension
set pathWithoutExtension to reverse of rest of reverse of fnameSeparated as string
# return original delimiters back on error
set AppleScript's text item delimiters to defaultTID
on error
# just in case, return original delimiters back on error
set AppleScript's text item delimiters to defaultTID
end try
return pathWithoutExtension
end getPathWithoutExtension |
tests/mac.watcher.scpt | PetroccoCo/AdapterJS | 421 | 2586 | <filename>tests/mac.watcher.scpt
repeat
if application "Safari" is running then
tell application "System Events" to tell process "npTemWebRTCPlugin (Safari Internet plug-in)"
if window 1 exists then
if exists (button "OK" of front window) then
click (button "OK" of front window)
end if
end if
end tell
end if
if application "Opera" is running then
tell application "System Events" to tell process "Opera"
if front window exists then
if exists (button "Allow" of front window) then
click (button "Allow" of front window)
end if
end if
end tell
end if
delay 1
end repeat
|
data/baseStats_weird/wigglytuff_alt.asm | longlostsoul/EvoYellow | 16 | 179904 | db DEX_WIGGLYTUFF ; pokedex id
db 140 ; base hp
db 70 ; base attack
db 45 ; base defense
db 45 ; base speed
db 85 ; base special
db FIGHTING ; species type 1
db FAIRY ; species type 2
db FULL_HEAL ; catch rate
db 60 ; base exp yield
INCBIN "pic/ymon/wigglytuff.pic",0,1 ; 66, sprite dimensions
dw WigglytuffPicFront
dw WigglytuffPicBack
; attacks known at lvl 0
db SING
db DISABLE
db SUBMISSION
db DOUBLESLAP
db 4 ; growth rate
; learnset
tmlearn 1,5,6,8
tmlearn 9,10,11,12,13,14,15
tmlearn 17,18,19,20,22,24
tmlearn 25,29,30,31,32
tmlearn 33,34,38,40
tmlearn 44,45,46
tmlearn 49,50,54,55
db BANK(WigglytuffPicFront)
|
src/main.asm | hundredrabbits/Donsol | 113 | 9864 |
;; main
;; timers
handleTimer: ; when auto@room is 1, do post flip actions
LDA auto@room
CMP #$01
BNE @skip
DEC auto@room
JSR flipPost@room
@skip: ;
;; skip if no input
handleJoy: ;
LDA next@input
CMP #$00
BNE releaseJoy
INC seed1@deck ; increment seed1
JMP __MAIN
;; release input, store in regA
releaseJoy: ;
LDA next@input
LDX #$00 ; release
STX next@input
INC seed2@deck ; increment seed2 on input
;;
checkJoy: ;
LDX view@game
CPX #$00
BNE @game
@splash: ;
CMP BUTTON_RIGHT
BEQ onRight@splash
CMP BUTTON_LEFT
BEQ onLeft@splash
CMP BUTTON_B
BEQ onB@splash
CMP BUTTON_A
BEQ onA@splash
JMP __MAIN
@game: ;
CMP BUTTON_RIGHT
BEQ onRight@game
CMP BUTTON_LEFT
BEQ onLeft@game
CMP BUTTON_SELECT
BEQ onSelect@game
CMP BUTTON_B
BEQ onB@game
CMP BUTTON_A
BEQ onA@game
JMP __MAIN
;;
onRight@splash: ;
INC cursor@splash
LDA cursor@splash
CMP #$03
BNE @done
; wrap around
LDA #$00
STA cursor@splash
@done: ;
LDA #$01 ; request draw for cursor
STA reqdraw_cursor
JMP __MAIN
;;
onLeft@splash: ;
DEC cursor@splash
LDA cursor@splash
CMP #$FF
BNE @done
; wrap around
LDA #$02
STA cursor@splash
@done: ;
LDA #$01 ; request draw for cursor
STA reqdraw_cursor
JMP __MAIN
;;
onB@splash: ;
LDA cursor@splash
STA difficulty@player ; store difficulty
JSR show@game
JMP __MAIN
;;
onA@splash: ;
LDA cursor@splash
STA difficulty@player ; store difficulty
JSR show@game
JMP __MAIN
;;
onRight@game: ;
INC cursor@game
LDA cursor@game
CMP #$04
BNE @done
; wrap around
LDA #$00
STA cursor@game
@done: ;
LDA #$01 ; request draw for cursor
STA reqdraw_cursor
STA reqdraw_name
JMP __MAIN
;;
onLeft@game: ;
DEC cursor@game
LDA cursor@game
CMP #$FF
BNE @done
; wrap around
LDA #$03
STA cursor@game
@done: ;
LDA #$01 ; request draw for cursor
STA reqdraw_cursor
STA reqdraw_name
JMP __MAIN
;;
onSelect@game: ;
JSR show@splash
JMP __MAIN
;;
onB@game: ;
JSR tryRun@player
JMP __MAIN
;;
onA@game: ;
JSR tryFlip@room ; flip selected card
JMP __MAIN |
src/Categories/Category/Exact.agda | Akshobhya1234/agda-categories | 0 | 1166 | {-# OPTIONS --without-K --safe #-}
-- Exact category (https://ncatlab.org/nlab/show/exact+category)
-- is a regular category
-- in which every internal equivalence is a kernel pair
module Categories.Category.Exact where
open import Level
open import Categories.Category.Core
open import Categories.Diagram.Pullback
open import Categories.Category.Cocartesian
open import Categories.Object.Coproduct
open import Categories.Morphism
open import Categories.Category.Complete.Finitely using (FinitelyComplete)
open import Categories.Diagram.Coequalizer
open import Categories.Diagram.KernelPair
open import Categories.Category.Regular
open import Categories.Morphism.Regular
open import Categories.Object.InternalRelation
record Exact {o ℓ e : Level} (𝒞 : Category o ℓ e) : Set (suc (o ⊔ ℓ ⊔ e)) where
open Category 𝒞
open Pullback
open Coequalizer
open Equivalence
field
regular : Regular 𝒞
quotient : ∀ {X : Obj} (E : Equivalence 𝒞 X) → Coequalizer 𝒞 (R.p₁ E) (R.p₂ E)
effective : ∀ {X : Obj} (E : Equivalence 𝒞 X) → IsPullback 𝒞 (R.p₁ E) (R.p₂ E)
(arr (quotient E)) (arr (quotient E))
|
ordinary/runge_8th.adb | jscparker/math_packages | 30 | 17859 | <reponame>jscparker/math_packages<gh_stars>10-100
-----------------------------------------------------------------------
-- package body Runge_8th, 8th order Prince and Dormand Runge-Kutta
-- Copyright (C) 2008-2018 <NAME>.
--
-- Permission to use, copy, modify, and/or distribute this software for any
-- purpose with or without fee is hereby granted, provided that the above
-- copyright notice and this permission notice appear in all copies.
-- THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-- WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-- MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-- ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-- WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-- ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-- OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-----------------------------------------------------------------------
with Ada.Numerics.Generic_Elementary_Functions;
with Runge_Coeffs_PD_8;
package body Runge_8th is
Real_Small : constant Real := Two * Real'Small;
package mth is new Ada.Numerics.Generic_Elementary_Functions(Real);
use mth;
package Prince_Dormand_Coeffs is new Runge_Coeffs_PD_8 (Real);
use Prince_Dormand_Coeffs;
-- Package contains coefficients for the Prince-Dormand 8th
-- order, 13 stage Runge Kutta method with error control.
type K_type1 is array (RK_Range) of Real;
type K_type is array (Dyn_Index) of K_type1;
---------------
-- Runge_Sum --
---------------
-- Function to multiply vector G times matrix K.
--
-- This works only for the RKPD coefficients given above.
-- It's optimized to take into account all of
-- Zero's in array A; review A in the package above.
-- The general formula is:
--
-- Result := A(Stage)(0) * K(0);
-- for j in 1..Stage-1 loop
-- Result := Result + A(Stage)(j) * K(j);
-- end loop;
--
-- The above loop can be used for arbitrary RK coefficients.
-- See Runge_Sum0.
--
-- What follows is optimized for the Prince-Dormond Coefficients.
procedure Runge_Sum
(Y : in Dynamical_Variable;
Next_Y : out Dynamical_Variable;
Stage : in Stages;
K : in K_type)
is
Stage2 : Stages;
Sum : Real;
begin
case Stage is
when 1 =>
Stage2 := 1;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0);
Next_Y(l) := Y(l) + Sum;
end loop;
when 2 =>
Stage2 := 2;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) + A(Stage2)(1) * K(l)(1);
Next_Y(l) := Y(l) + Sum;
end loop;
when 3 =>
Stage2 := 3;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) + A(Stage2)(2) * K(l)(2);
Next_Y(l) := Y(l) + Sum;
end loop;
when 4 =>
Stage2 := 4;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) +
A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3);
Next_Y(l) := Y(l) + Sum;
end loop;
when 5 =>
Stage2 := 5;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4);
Next_Y(l) := Y(l) + Sum;
end loop;
when 6 =>
Stage2 := 6;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5);
Next_Y(l) := Y(l) + Sum;
end loop;
when 7 =>
Stage2 := 7;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5) + A(Stage2)(6) * K(l)(6);
Next_Y(l) := Y(l) + Sum;
end loop;
when 8 =>
Stage2 := 8;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5) + A(Stage2)(6) * K(l)(6) +
A(Stage2)(7) * K(l)(7);
Next_Y(l) := Y(l) + Sum;
end loop;
when 9 =>
Stage2 := 9;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5) + A(Stage2)(6) * K(l)(6) +
A(Stage2)(7) * K(l)(7) + A(Stage2)(8) * K(l)(8);
Next_Y(l) := Y(l) + Sum;
end loop;
when 10 =>
Stage2 := 10;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5) + A(Stage2)(6) * K(l)(6) +
A(Stage2)(7) * K(l)(7) + A(Stage2)(8) * K(l)(8) +
A(Stage2)(9) * K(l)(9);
Next_Y(l) := Y(l) + Sum;
end loop;
when 11 =>
Stage2 := 11;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5) + A(Stage2)(6) * K(l)(6) +
A(Stage2)(7) * K(l)(7) + A(Stage2)(8) * K(l)(8) +
A(Stage2)(9) * K(l)(9) + A(Stage2)(10) * K(l)(10);
Next_Y(l) := Y(l) + Sum;
end loop;
when 12 =>
Stage2 := 12;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) +
-- A(Stage2)(1) * K(l)(1) + A(Stage2)(2) * K(l)(2) +
A(Stage2)(3) * K(l)(3) + A(Stage2)(4) * K(l)(4) +
A(Stage2)(5) * K(l)(5) + A(Stage2)(6) * K(l)(6) +
A(Stage2)(7) * K(l)(7) + A(Stage2)(8) * K(l)(8) +
A(Stage2)(9) * K(l)(9) + A(Stage2)(10) * K(l)(10);
Next_Y(l) := Y(l) + Sum;
end loop;
when others =>
null;
end case;
end Runge_Sum;
pragma Inline (Runge_Sum);
----------------
-- Runge_Sum1 --
----------------
procedure Runge_Sum1
(Y : in Dynamical_Variable;
Next_Y : out Dynamical_Variable;
Stage : in Stages;
K : in K_type)
is
Stage2 : Stages;
Sum : Real;
begin
case Stage is
when 1 =>
Stage2 := 1;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0);
Next_Y(l) := Y(l) + Sum;
end loop;
when 2 =>
Stage2 := 2;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) + A(Stage2)(1) * K(l)(1);
Next_Y(l) := Y(l) + Sum;
end loop;
when 3 =>
Stage2 := 3;
for l in Dyn_Index loop
Sum := A(Stage2)(0) * K(l)(0) + A(Stage2)(2) * K(l)(2);
Next_Y(l) := Y(l) + Sum;
end loop;
when 4 =>
Stage2 := 4;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..3 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 5 =>
Stage2 := 5;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..4 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 6 =>
Stage2 := 6;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..5 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 7 =>
Stage2 := 7;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..6 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 8 =>
Stage2 := 8;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..7 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 9 =>
Stage2 := 9;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..8 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 10 =>
Stage2 := 10;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..9 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when 11 =>
Stage2 := 11;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..10 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
--Sum := Zero; Sum2 := 0.0; n := RK_Range'first;
--for p in RK_Range range 0..4 loop
-- Sum := Sum + A(Stage2)(n) * K(l)(n);
-- Sum2 := Sum2 + A(Stage2)(n+1) * K(l)(n+1);
-- n := n+2;
--end loop;
--Next_Y(l) := Y(l) + Sum + Sum2 + A(Stage2)(10) * K(l)(10);
-- Sum := Zero; Sum2 := 0.0;
-- for n in reverse RK_Range range 0..10 loop
-- Sum := Sum + A(Stage2)(n) * K(l)(n);
-- Sum2 := Sum2 + A(Stage2)(n) * K(l)(m+1)(n);
-- end loop;
-- Next_Y(l) := Y(l) + Sum;
-- Result(l)(m+1) := Sum2;
-- m := m+2;
end loop;
when 12 =>
Stage2 := 12;
for l in Dyn_Index loop
Sum := Zero;
for n in reverse RK_Range range 0..10 loop
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
when others =>
null;
end case;
end Runge_Sum1;
pragma Inline (Runge_Sum1);
----------------
-- Runge_Sum0 --
----------------
-- General formula for getting corrections K.
-- The Next_Y is the Y at which F(t, Y) is next evaluated.
procedure Runge_Sum0
(Y : in Dynamical_Variable;
Next_Y : out Dynamical_Variable;
Stage : in Stages;
K : in K_type)
is
Stage2 : Stages;
Sum : Real;
begin
Stage2 := Stage;
for l in Dyn_Index loop
Sum := 0.0;
for n in reverse RK_Range range 0..Stage2-1 loop -- Sum small 1st
Sum := Sum + A(Stage2)(n) * K(l)(n);
end loop;
Next_Y(l) := Y(l) + Sum;
end loop;
end Runge_Sum0;
---------------
-- Integrate --
---------------
-- Integrate to eighth order using the Prince-Dormond Coefficients.
procedure Integrate
(Final_State : out Dynamical_Variable;
Final_Time : in Real;
Initial_State : in Dynamical_Variable;
Initial_Time : in Real;
No_Of_Steps : in Step_Integer;
Error_Control_Desired : in Boolean := False;
Error_Tolerance : in Real := +1.0E-10)
is
N : constant Real := Real (No_Of_Steps);
Static_Delta_t : constant Real := (Final_Time - Initial_Time) / N;
Delta_t, Error : Real;
Present_t, Time1 : Real;
Y : Dynamical_Variable;
Error_Y : Dynamical_Variable;
Delta_Y : Dynamical_Variable;
This_Is_The_Final_Time_Step : Boolean := False;
-- Increments of Independent variable
-- so K(13) = Delta_t*F (Time + Dt(13), Y + SUM (A(13), K))
K : K_type;
Dt : Coefficient;
---------------------------
-- Seventh_Order_Delta_Y --
---------------------------
-- function to Sum Series For Delta Y efficiently
-- Force it sum small terms 1st. It hardly matters.
function Seventh_Order_Delta_Y
return Dynamical_Variable
is
Result : Dynamical_Variable;
Sum : Real;
begin
for l in Dyn_Index loop
Sum := B7(12) * K(l)(12);
Sum := Sum + B7(11) * K(l)(11);
Sum := Sum + B7(10) * K(l)(10);
Sum := Sum + B7(9) * K(l)(9);
Sum := Sum + B7(8) * K(l)(8);
Sum := Sum + B7(5) * K(l)(5);
Sum := Sum + B7(7) * K(l)(7);
Sum := Sum + B7(6) * K(l)(6);
Sum := Sum + B7(0) * K(l)(0);
Result(l) := Sum;
end loop;
return Result;
end Seventh_Order_Delta_Y;
--------------------------
-- Eighth_Order_Delta_Y --
--------------------------
-- function to Sum Series For Delta Y efficiently
-- Force it sum small terms 1st. It hardly matters.
function Eighth_Order_Delta_Y
return Dynamical_Variable
is
Result : Dynamical_Variable;
Sum : Real;
begin
for l in Dyn_Index loop
Sum := B8(12) * K(l)(12);
Sum := Sum + B8(11) * K(l)(11);
Sum := Sum + B8(10) * K(l)(10);
Sum := Sum + B8(9) * K(l)(9);
Sum := Sum + B8(8) * K(l)(8);
Sum := Sum + B8(5) * K(l)(5);
Sum := Sum + B8(7) * K(l)(7);
Sum := Sum + B8(6) * K(l)(6);
Sum := Sum + B8(0) * K(l)(0);
Result(l) := Sum;
end loop;
return Result;
end Eighth_Order_Delta_Y;
--------------------------------
-- Get_New_Y_to_Eighth_Order --
--------------------------------
-- Force it sum small terms 1st. It hardly matters.
procedure Get_New_Y_to_Eighth_Order
(Y : in out Dynamical_Variable)
is
Sum : Real;
begin
for l in Dyn_Index loop
Sum := B8(12) * K(l)(12);
Sum := Sum + B8(11) * K(l)(11);
Sum := Sum + B8(10) * K(l)(10);
Sum := Sum + B8(9) * K(l)(9);
Sum := Sum + B8(8) * K(l)(8);
Sum := Sum + B8(5) * K(l)(5);
Sum := Sum + B8(7) * K(l)(7);
Sum := Sum + B8(6) * K(l)(6);
Sum := Sum + B8(0) * K(l)(0);
Y(l) := Y(l) + Sum;
end loop;
end Get_New_Y_to_Eighth_Order;
-----------------------------
-- Get_New_Delta_t_and_Dt --
-----------------------------
-- Modifies Delta_t and Dt(i) as global variables.
Inverse_Error_Tolerance : constant Real := One / Error_Tolerance;
procedure Get_New_Delta_t_and_Dt
(Error : in Real;
Delta_t : in out Real;
Dt : out Coefficient)
is
Error_Epsilon : constant Real := Error_Tolerance * 1.0E-6 + Real_Small;
New_Delta_t_Factor : Real := One;
Delta_t_Fractional_Change : Real := One;
begin
Delta_t_Fractional_Change := Nine_Tenths * Exp (-One_Eighth * Log (
Inverse_Error_Tolerance * (Error + Error_Epsilon)));
if Delta_t_Fractional_Change < One_Eighth then
New_Delta_t_Factor := One_Eighth;
elsif Delta_t_Fractional_Change > Four then
New_Delta_t_Factor := Four;
else
New_Delta_t_Factor := Delta_t_Fractional_Change;
end if;
Delta_t := New_Delta_t_Factor * Delta_t;
for i in Stages Loop
Dt(i) := Delta_t * C(i);
end loop;
end Get_New_Delta_t_and_Dt;
begin
Y := Initial_State;
Present_t := Initial_Time;
Delta_t := Static_Delta_t;
for i in Stages loop
Dt(i) := Delta_t * C(i);
end loop;
Time_Steps: loop
-- First get DeltaY to 8th Order by calculating the
-- Runge-Kutta corrections K.
--
-- K(Stages'First) := Delta_t * F (Time, Y);
-- for Stage in Stages'First+1 .. Stages'Last loop
-- K(Stage) := Delta_t * F (Time + Dt(Stage), Y + Sum (Stage));
-- end loop;
Make_New_Corrections_K:
declare
Next_t : Real := Present_t;
Next_Deriv, Next_Y : Dynamical_Variable;
begin
Next_Deriv := F (Next_t, Y);
for l in Dyn_Index loop
K(l)(Stages'First) := Delta_t * Next_Deriv(l);
end loop;
for Stage in Stages'First+1 .. Stages'Last loop
Runge_Sum (Y, Next_Y, Stage, K);
Next_t := Present_t + Dt(Stage);
Next_Deriv := F (Next_t, Next_Y);
for l in Dyn_Index loop
K(l)(Stage) := Delta_t * Next_Deriv(l);
end loop;
end loop;
end Make_New_Corrections_K;
if This_Is_The_Final_Time_Step then --used only if error control is enabled.
Get_New_Y_to_Eighth_Order (Y);
exit Time_Steps;
end if;
-- Now increment Y and Time, and if desired, Delta_t.
-- There are two algorithms below: with and
-- without error control.
if not Error_Control_Desired then
-- Increment time and sum the Runge-Kutta series to increment Y.
-- With the new Y, we can exit if Time is very near Final_Time.
-- (Notice that Delta_t is negative if we integrate back in time.)
-- use globally updated K to get new Y:
Get_New_Y_to_Eighth_Order (Y);
Present_t := Present_t + Static_Delta_t;
exit Time_Steps when Abs (Final_Time-Present_t) < Abs (0.125*Static_Delta_t);
else
-- Error control desired, so first calculate error.
Delta_Y := Eighth_Order_Delta_Y;
Error_Y := Delta_Y - Seventh_Order_Delta_Y;
Error := Norm (Error_Y);
-- Error in 7th order Y really; scales as dt**8
-- Next increment Y and Time if error is OK.
if Error <= Error_Tolerance then -- error is OK.
Time1 := Present_t + Delta_t;
if Abs (Time1-Initial_Time) < Abs (Final_Time-Initial_Time) then
-- Increment both Time and Y. Afterwards
-- get the new step size Delta_t.
Present_t := Time1;
Y := Y + Delta_Y;
elsif Abs (Time1-Initial_Time) > Abs (Final_Time-Initial_Time) then
-- Have to go through the loop again even
-- though the error was small, because overshot
-- the end. Decrease Delta_t here, so there's
-- no need to check error again after final Loop.
This_Is_The_Final_Time_Step := True;
Delta_t := Final_Time - Present_t;
for i in Stages loop
Dt(i) := Delta_t * C(i);
end loop;
else
-- Time1 = Final_Time, to just about the maximum accuracy
-- of the floating point, so get the final Y and exit.
Y := Y + Delta_Y;
exit Time_Steps;
end if;
end if;
-- If this isn't the final loop, then want to adjust Delta_t.
-- We want to make Delta_t smaller if necessary for accuracy, and
-- larger if possible for speed. If function ** is too slow then
-- modify code so that this stuff is done only when we flunk
-- the error test above. But as is, it is done each time step.
if not This_Is_The_Final_Time_Step then
Get_New_Delta_t_and_Dt (Error, Delta_t, Dt);
end if;
end if; -- not error_control_desired
end loop Time_Steps;
Final_State := Y;
end Integrate;
begin
if Test_of_Runge_Coeffs_Desired then
Prince_Dormand_Coeffs.Test_Runge_Coeffs;
end if;
end Runge_8th;
|
programs/oeis/021/A021040.asm | karttu/loda | 0 | 167226 | ; A021040: Decimal expansion of 1/36.
; 0,2,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7
mul $0,5
mov $1,7
mov $2,$0
cmp $2,0
add $0,$2
mod $1,$0
|
oeis/244/A244663.asm | neoneye/loda-programs | 11 | 170230 | <gh_stars>10-100
; A244663: Binary representation of 4^n + 2^(n+1) - 1.
; 111,10111,1001111,100011111,10000111111,1000001111111,100000011111111,10000000111111111,1000000001111111111,100000000011111111111,10000000000111111111111,1000000000001111111111111,100000000000011111111111111,10000000000000111111111111111,1000000000000001111111111111111,100000000000000011111111111111111,10000000000000000111111111111111111,1000000000000000001111111111111111111,100000000000000000011111111111111111111,10000000000000000000111111111111111111111
mov $1,-9
mov $2,10
pow $2,$0
mul $1,$2
bin $1,2
mov $0,$1
div $0,405
mul $0,1000
add $0,111
|
asm/Three-Sort.asm | hixio-mh/hrm-cpu | 24 | 94991 | -- HUMAN RESOURCE MACHINE PROGRAM --
a:
INBOX
COPYTO 0
INBOX
COPYTO 1
INBOX
COPYTO 2
COMMENT 2
SUB 1
JUMPN b
COMMENT 1
JUMP c
b:
COMMENT 0
COPYFROM 2
COPYTO 3
COPYFROM 1
COPYTO 2
COPYFROM 3
COPYTO 1
c:
COMMENT 4
COPYFROM 2
SUB 0
JUMPN e
COMMENT 6
COMMENT 7
COPYFROM 0
SUB 1
JUMPN d
COPYFROM 0
COPYTO 3
COPYFROM 1
COPYTO 0
COPYFROM 3
COPYTO 1
d:
JUMP f
e:
COMMENT 5
COPYFROM 0
COPYTO 3
COPYFROM 1
COPYTO 0
COPYFROM 2
COPYTO 1
COPYFROM 3
COPYTO 2
f:
COMMENT 3
COPYFROM 0
OUTBOX
COPYFROM 1
OUTBOX
COPYFROM 2
OUTBOX
JUMP a
DEFINE COMMENT 0
eJzTZWBg2Cxvn6uvKJh8QK0udIPONf9qky1+YWaSQaesdmY02BVOvG/HMv+QrdHK59Z/1q+1bNriaJS7
h19373EbjYCrHdZbbyiHHnyoH3PwIdAohrb4rjj27M/V2aWFEzXLtkzWLJOcXhj9Zz1IrqC+0Ke1+bW7
cddJN76e1+6p/df8HSaqRc+fuKTgZW9E/faOk93zJwZMqJpcN6tq8pol0pNDVjlMtN/U1ft8+/aO3D2C
9T6751Yd3cYwCkbBKKAaAADikVFE;
DEFINE COMMENT 1
eJxTZWBg2Cz/KKJPMSbkl0ahD7+unle3XqGPp757TLdeSOoGnYS8q1oR9Tp6qR1HDbZMdjR6PHeBUciq
ZkPZjTp6HDufqmjtMpdbshVoDMN1R5aoVW5dcUdCnhdtjuqv4Avk7StwyVwEkptRoBbtVv494HrNNf/g
urrQTXUJeVNrtUoVK+81+5W87mnOUVvwp+r9MsZWwRUMo2AUjAK6AQCwrjs8;
DEFINE COMMENT 2
eJxzYGBgKFRgiTqhLBmUqLbF7676Fr8dmjEhG3Smp+fpPi/K093bZKI9eZKNxuO5Qgo717qo/lm/QefP
+u+mTVuAWhkifK2DGb0eRcy1v1S1y6GqQc+1rXO777UpIDlOd46SS0VapSD2hvS6UJ3MutDnZUYpz8v+
ZIkUtXVaFsyfDZLrbYiwMu7SMvDo0zJQntBnPH+imaXDxC1+R/pZogK6/2TtmWSfGzpVq1R4mlndlql6
/bGTuhZ79JWudm6Zvgakf8bqCKtLazeYLN30XNduK4f+rm0RVru2Ffq8X/e8aMK6z9V+6yPqQerC1hzd
9n31rXUT1u1c+36d7MawNUu2MoyCUTDCAQDJN2yB;
DEFINE COMMENT 3
eJyzYmBgSJGcPOmDCG/fD8HXPU94efvecFnP0ONSW6DHZb/pDZfPbme+eydKhJVOd4rfO3FYMuKIvXT/
3t0ya5bslrlUdVgy1whoBEOkJm/fXfW6WXXqgivKtLR26eht2PfdtH/vVjOf3SLmTVtEzNcs+W4aM3Ov
ccCEs7ptnRt0VnRt0NHrB+mda9+/d6799DVTnfT6z7swtHK6VzXIee9tMvY/2f0ySHL6kZCuxUdCcveA
1H6pld0oUmS/iT27dDV/RtfiHSkBE34lVzUEpj8vUslpyt+bt6SguOhztWFxVYNhcVvn3rzJk85mWM9g
GAWjYBRgBQBHSmNL;
DEFINE COMMENT 4
eJyzYWBgcJd4n6ivGODtoyQZxKUsmJyoptgmr35tygG1vceB0gyVsrOPNRveOwFiO3veytzkrFXKYqvY
<KEY>
MYyCUTAK<KEY>;
DEFINE COMMENT 5
eJyTYWBgiDNOdf5vpHQayGTgirMOfpSjVdqc87n6bEZqx4HEg3OYEt0Xvo0xWgmSf9J80u1KJ4ODdi+D
g8PEQp/<KEY>
KBhUAAAb+i9n;
DEFINE COMMENT 6
eJxTYGBgeG8haqFpvcFkrn2uUa23t2GEb5+xmF+E1XbfVOc3rpJBm5zVooOdBZPlvPsrtvvubTL2P9k9
yf/HVGufg3NYbENWVZv8WQ80hqG46FHE9ZqQ1C+109O/1MrmzCh4PHdvXuYix9yuxSB53xlaBgbTzSwv
TlvhenFaf8W76QytDKNgFIyCAQUAiBgzog;
DEFINE COMMENT 7
<KEY>
DEFINE LABEL 0
eJzjYWBg6BR/FDFPen6YuoqeV5vK47nqKu4LfZTcF1bK1s2yl54/u1JWbYG+YtdiHb1zSxlGwSgYBcMK
AABfEBDz;
DEFINE LABEL 1
eJwTZGBgCExnierOlAxSyZnsG1b42v198Wv37FLJILdy2RyWiktVS8vbOouL5s/em5e5KDFRduPq2KPb
fiUf3dZRZn5YsVL0EMMoGAWjYMgCAOEsHbE;
DEFINE LABEL 2
eJwTZWBgeOIx2TfBa4Xr8mAzywehVdYx4YqOm6MyYzdH5ZZPizSrUw5N7bjip9efGxgwYVrkmiWbo3au
DY<KEY>;
DEFINE LABEL 3
<KEY>;
|
oeis/075/A075913.asm | neoneye/loda-programs | 11 | 4123 | <reponame>neoneye/loda-programs
; A075913: Fifth column of triangle A075500.
; Submitted by <NAME>
; 1,75,3500,131250,4344375,132890625,3855156250,107765625000,2933008203125,78271552734375,2058270703125000,53524929199218750,1380066321044921875,35349237725830078125,900813505310058593750,22863955398559570312500,578500758117828369140625,14600999383586883544921875,367801239715957641601562500,9250655813126564025878906250,232380387698245143890380859375,5831811981340677738189697265625,146241681953451848030090332031250,3664974747068653106689453125000000,91803098390868347942829132080078125
mov $2,5
pow $2,$0
seq $0,481 ; Stirling numbers of the second kind, S(n,5).
mul $0,$2
|
arch/i386/mm/gdt.asm | samuelts/naiveos | 0 | 23521 | <gh_stars>0
[BITS 32]
section .text
[GLOBAL gdt_flush]
gdt_flush:
mov eax, [esp + 4]
lgdt [eax]
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
jmp 0x08:.flush
.flush:
ret
|
src/main/antlr4/Modulo12Lexer.g4 | njnjyyh1991/Modulo12 | 0 | 7633 | lexer grammar Modulo12Lexer;
A : [aA];
B : [bB];
C : [cC];
D : [dD];
E : [eE];
F : [fF];
G : [gG];
H : [hH];
I : [iI];
J : [jJ];
K : [kK];
L : [lL];
M : [mM];
N : [nN];
O : [oO];
P : [pP];
Q : [qQ];
R : [rR];
S : [sS];
T : [tT];
U : [uU];
V : [vV];
W : [wW];
X : [xX];
Y : [yY];
Z : [zZ];
// Conditions
EQ: '=';
LEQ: '<=';
GEQ: '>=';
NEQ : '!=';
LT: '<';
GT: '>';
HAS: H A S;
// Logical operations
AND: A N D;
OR : O R;
// Key words
SELECT: S E L E C T;
MIDI: M I D I;
MUSICXML: M U S I C X M L;
FROM: F R O M;
WHERE: W H E R E;
SEMI: ';';
COMMA: ',';
// Song metadata factors
KEY : K E Y;
SHARP: '#';
FLAT: 'b';
// Keys with qualifiers, TODO: Simplify this somehow
FSHARP : F SHARP;
CSHARP : C SHARP;
BFLAT : B FLAT;
EFLAT : E FLAT;
AFLAT : A FLAT;
DFLAT : D FLAT;
GFLAT : G FLAT;
CFLAT : C FLAT;
SCALE: S C A L E;
SCALE_TYPE : M I N O R | M A J O R;
SONG: S O N G;
INSTRUMENT: I N S T R U M E N T;
LYRICS: L Y R I C S;
TEMPO: T E M P O;
NUMBARLINES: N U M B A R L I N E S;
// Generic definitions
ID: ('a'..'z' | 'A' .. 'Z' | '_' | '/')+ ;
NUMBER: ('0' .. '9') + ('.' ('0' .. '9') +)?;
NEWLINE: '\r' ? '\n' -> skip;
WS: (' ' | '\t' | '\n' | '\r')+ -> skip; |
lib/avx512/mb_mgr_aes_cbcs_1_9_flush_avx512.asm | intel/intel-ipsec-mb | 174 | 243520 | <reponame>intel/intel-ipsec-mb
;;
;; Copyright (c) 2020-2021, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;; * Redistributions of source code must retain the above copyright notice,
;; this list of conditions and the following disclaimer.
;; * Redistributions in binary form must reproduce the above copyright
;; notice, this list of conditions and the following disclaimer in the
;; documentation and/or other materials provided with the distribution.
;; * Neither the name of Intel Corporation nor the names of its contributors
;; may be used to endorse or promote products derived from this software
;; without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;
%define CBCS
%include "avx512/mb_mgr_aes_flush_avx512.asm"
%include "include/cet.inc"
%define AES_CBCS_ENC_X16 aes_cbcs_1_9_enc_128_vaes_avx512
%define FLUSH_JOB_AES_CBCS_ENC flush_job_aes128_cbcs_1_9_enc_vaes_avx512
; void AES_CBCS_ENC_X16(AES_ARGS *args, UINT64 len_in_bytes);
extern AES_CBCS_ENC_X16
; JOB* FLUSH_JOB_AES_CBCS_ENC(MB_MGR_AES_OOO *state, IMB_JOB *job)
; arg 1 : state
; arg 2 : job
MKGLOBAL(FLUSH_JOB_AES_CBCS_ENC,function,internal)
FLUSH_JOB_AES_CBCS_ENC:
endbranch64
mov rax, rsp
sub rsp, STACK_size
and rsp, -16
mov [rsp + _gpr_save + 8*0], rbx
mov [rsp + _gpr_save + 8*1], rbp
mov [rsp + _gpr_save + 8*2], r12
mov [rsp + _gpr_save + 8*3], r13
mov [rsp + _gpr_save + 8*4], r14
mov [rsp + _gpr_save + 8*5], r15
%ifndef LINUX
mov [rsp + _gpr_save + 8*6], rsi
mov [rsp + _gpr_save + 8*7], rdi
%endif
mov [rsp + _rsp_save], rax ; original SP
; check for empty
cmp qword [state + _aes_lanes_in_use], 0
je return_null
; find a lane with a non-null job
vpxord zmm0, zmm0, zmm0
vmovdqu64 zmm1, [state + _aes_job_in_lane + (0*PTR_SZ)]
vmovdqu64 zmm2, [state + _aes_job_in_lane + (8*PTR_SZ)]
vpcmpq k1, zmm1, zmm0, 4 ; NEQ
vpcmpq k2, zmm2, zmm0, 4 ; NEQ
kmovw DWORD(tmp), k1
kmovw DWORD(tmp1), k2
mov DWORD(tmp2), DWORD(tmp1)
shl DWORD(tmp2), 8
or DWORD(tmp2), DWORD(tmp) ; mask of non-null jobs in tmp2
not BYTE(tmp)
kmovw k4, DWORD(tmp)
not BYTE(tmp1)
kmovw k5, DWORD(tmp1)
mov DWORD(tmp), DWORD(tmp2)
not WORD(tmp)
kmovw k6, DWORD(tmp) ; mask of NULL jobs in k4, k5 and k6
mov DWORD(tmp), DWORD(tmp2)
xor tmp2, tmp2
bsf WORD(tmp2), WORD(tmp) ; index of the 1st set bit in tmp2
;; copy good lane data into NULL lanes
mov tmp, [state + _aes_args_in + tmp2*8]
vpbroadcastq zmm1, tmp
vmovdqa64 [state + _aes_args_in + (0*PTR_SZ)]{k4}, zmm1
vmovdqa64 [state + _aes_args_in + (8*PTR_SZ)]{k5}, zmm1
;; - out pointer
mov tmp, [state + _aes_args_out + tmp2*8]
vpbroadcastq zmm1, tmp
vmovdqa64 [state + _aes_args_out + (0*PTR_SZ)]{k4}, zmm1
vmovdqa64 [state + _aes_args_out + (8*PTR_SZ)]{k5}, zmm1
mov tmp, 0xfff
kmovq k3, tmp
;; - set len to MAX
vmovdqa64 zmm6, [state + _aes_lens_64]
vmovdqa64 zmm7, [state + _aes_lens_64 + 64]
mov tmp, 0xffffffffffffffff
vpbroadcastq zmm1, tmp
vmovdqa64 zmm6{k4}, zmm1
vmovdqa64 zmm7{k5}, zmm1
vmovdqa64 [state + _aes_lens_64]{k3}, zmm6
vmovdqa64 [state + _aes_lens_64 + 64]{k3}, zmm7
;; scale up good lane idx before copying IV and keys
shl tmp2, 4
;; - copy IV and round keys to null lanes
COPY_IV_KEYS_TO_NULL_LANES tmp2, tmp1, tmp3, xmm4, xmm5, k6
;; Update lens and find min for lanes 8-15
vpsllq zmm8, zmm6, 4
vpsllq zmm9, zmm7, 4
vporq zmm8, zmm8, [rel index_to_lane16]
vporq zmm9, zmm9, [rel index_to_lane16 + 64]
vpminuq zmm8, zmm8, zmm9
vextracti64x4 ymm9, zmm8, 1
vpminuq ymm8, ymm9, ymm8
vextracti32x4 xmm9, ymm8, 1
vpminuq xmm8, xmm9, xmm8
vpsrldq xmm9, xmm8, 8
vpminuq xmm8, xmm9, xmm8
vmovq len2, xmm8
mov idx, len2
and idx, 0xf
shr len2, 4
or len2, len2
jz len_is_0
vpbroadcastq zmm5, len2
vpsubq zmm6, zmm6, zmm5
vpsubq zmm7, zmm7, zmm5
vmovdqa64 [state + _aes_lens_64]{k3}, zmm6
vmovdqa64 [state + _aes_lens_64 + 64]{k3}, zmm7
; "state" and "args" are the same address, arg1
; len is arg2
call AES_CBCS_ENC_X16
; state and idx are intact
len_is_0:
; process completed job "idx"
mov job_rax, [state + _aes_job_in_lane + idx*8]
mov unused_lanes, [state + _aes_unused_lanes]
mov qword [state + _aes_job_in_lane + idx*8], 0
or dword [job_rax + _status], IMB_STATUS_COMPLETED_CIPHER
shl unused_lanes, 4
or unused_lanes, idx
mov [state + _aes_unused_lanes], unused_lanes
sub qword [state + _aes_lanes_in_use], 1
;; store last cipher block as next_iv
lea tmp3, [idx*8]
mov tmp1, [job_rax + _cbcs_next_iv]
vmovdqa xmm0, [state + _aes_args_IV + tmp3*2]
vmovdqu [tmp1], xmm0
%ifdef SAFE_DATA
; Set bit of lane of returned job
xor DWORD(tmp3), DWORD(tmp3)
bts DWORD(tmp3), DWORD(idx)
kmovw k1, DWORD(tmp3)
korw k6, k1, k6
;; Clear IV and expanded keys of returned job and "NULL lanes"
;; (k6 contains the mask of the jobs)
CLEAR_IV_KEYS_IN_NULL_LANES tmp1, xmm0, k6
%endif
return:
mov rbx, [rsp + _gpr_save + 8*0]
mov rbp, [rsp + _gpr_save + 8*1]
mov r12, [rsp + _gpr_save + 8*2]
mov r13, [rsp + _gpr_save + 8*3]
mov r14, [rsp + _gpr_save + 8*4]
mov r15, [rsp + _gpr_save + 8*5]
%ifndef LINUX
mov rsi, [rsp + _gpr_save + 8*6]
mov rdi, [rsp + _gpr_save + 8*7]
%endif
mov rsp, [rsp + _rsp_save] ; original SP
ret
return_null:
xor job_rax, job_rax
jmp return
mksection .rodata
default rel
align 64
index_to_lane16:
dq 0x0000000000000000, 0x0000000000000001
dq 0x0000000000000002, 0x0000000000000003
dq 0x0000000000000004, 0x0000000000000005
dq 0x0000000000000006, 0x0000000000000007
dq 0x0000000000000008, 0x0000000000000009
dq 0x000000000000000a, 0x000000000000000b
dq 0x000000000000000c, 0x000000000000000d
dq 0x000000000000000e, 0x000000000000000f
mksection stack-noexec
|
agda-stdlib/src/Relation/Binary/Construct/Closure/Reflexive/Properties/WithK.agda | DreamLinuxer/popl21-artifact | 5 | 15572 | ------------------------------------------------------------------------
-- The Agda standard library
--
-- Some properties of reflexive closures which rely on the K rule
------------------------------------------------------------------------
{-# OPTIONS --safe --with-K #-}
module Relation.Binary.Construct.Closure.Reflexive.Properties.WithK where
open import Data.Empty.Irrelevant using (⊥-elim)
open import Data.Product as Prod
open import Data.Sum.Base as Sum
open import Relation.Binary
open import Relation.Binary.Construct.Closure.Reflexive
open import Relation.Binary.Construct.Closure.Reflexive.Properties public
open import Relation.Binary.PropositionalEquality as PropEq using (_≡_; refl; cong)
open import Relation.Nullary.Negation using (contradiction)
module _ {a ℓ} {A : Set a} {_∼_ : Rel A ℓ} where
irrel : Irrelevant _∼_ → Irreflexive _≡_ _∼_ → Irrelevant (Refl _∼_)
irrel irrel irrefl [ x∼y₁ ] [ x∼y₂ ] = cong [_] (irrel x∼y₁ x∼y₂)
irrel irrel irrefl [ x∼y ] refl = contradiction x∼y (irrefl refl)
irrel irrel irrefl refl [ x∼y ] = contradiction x∼y (irrefl refl)
irrel irrel irrefl refl refl = refl
|
oeis/114/A114771.asm | neoneye/loda-programs | 11 | 103197 | ; A114771: Floor[6^(1/3)*10^n]^3.
; Submitted by <NAME>
; 1,5832,5929741,5998805513,5999796014211,5999994127536128,5999994127536128000,5999999080425132440125,5999999971945442706621379,5999999991757006160038514688,5999999999681631553616419338752
mov $1,1
mov $3,$0
mul $3,4
lpb $3
add $6,$2
mul $6,2
add $1,$6
add $1,$2
add $2,$1
mov $5,$1
mul $1,2
sub $3,1
add $5,$2
add $6,$5
lpe
mov $4,10
pow $4,$0
div $2,$4
cmp $5,0
add $2,$5
div $1,$2
pow $1,3
mov $0,$1
|
src/linux/helios-monitor-ifnet.adb | stcarrez/helios | 1 | 17681 | -----------------------------------------------------------------------
-- helios-monitor-ifnet -- Linux network interface monitor
-- Copyright (C) 2017 <NAME>
-- Written by <NAME> (<EMAIL>)
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-----------------------------------------------------------------------
with Helios.Tools.Files;
with Util.Strings.Transforms;
package body Helios.Monitor.Ifnet is
use Util.Strings.Transforms;
-- ------------------------------
-- Make a new interface definition for the given interface name.
-- ------------------------------
procedure Make_Interface (Agent : in out Agent_Type;
Name : in String;
Interfaces : in String;
Filter : in String) is
Itf : Interface_Definition_Type_Access;
begin
if not Helios.Schemas.Is_Filter_Enable (Name, Interfaces) then
return;
end if;
Itf := new Interface_Definition_Type (Len => Name'Length);
Itf.Name := Name;
Agent.Add_Definition (Itf.all'Access);
for I in Itf.Stats'Range loop
Itf.Stats (I) := Schemas.Create_Definition (Itf.all'Access,
To_Lower_Case (Stat_Type'Image (I)),
Filter);
end loop;
end Make_Interface;
-- ------------------------------
-- Start the agent and build the definition tree.
-- ------------------------------
overriding
procedure Start (Agent : in out Agent_Type;
Config : in Util.Properties.Manager) is
Values : constant String := Config.Get ("values", "*");
Interfaces : constant String := Config.Get ("interfaces", "*");
Line : Helios.Tools.Files.File_Extractor;
begin
Line.Open ("/proc/net/dev");
Line.Read;
Line.Read;
loop
Line.Read;
exit when Line.Is_Eof;
Make_Interface (Agent, Line.Get_Value (1), Interfaces, Values);
end loop;
end Start;
-- ------------------------------
-- Collect the values in the snapshot.
-- ------------------------------
overriding
procedure Collect (Agent : in out Agent_Type;
Values : in out Datas.Snapshot_Type) is
use type Schemas.Definition_Type_Access;
Line : Helios.Tools.Files.File_Extractor;
Node : Schemas.Definition_Type_Access;
Itf : Interface_Definition_Type_Access;
begin
Line.Open ("/proc/net/dev");
Line.Read;
Line.Read;
loop
Line.Read;
exit when Line.Is_Eof;
Node := Agent.Find_Definition (Line.Get_Value (1));
if Node /= null then
Itf := Interface_Definition_Type'Class (Node.all)'Access;
for I in Itf.Stats'Range loop
Values.Set_Value (Itf.Stats (I), Line.Get_Value (2 + Stat_Type'Pos (I)));
end loop;
end if;
end loop;
end Collect;
end Helios.Monitor.Ifnet;
|
programs/oeis/183/A183063.asm | neoneye/loda | 22 | 14895 | <reponame>neoneye/loda
; A183063: Number of even divisors of n.
; 0,1,0,2,0,2,0,3,0,2,0,4,0,2,0,4,0,3,0,4,0,2,0,6,0,2,0,4,0,4,0,5,0,2,0,6,0,2,0,6,0,4,0,4,0,2,0,8,0,3,0,4,0,4,0,6,0,2,0,8,0,2,0,6,0,4,0,4,0,4,0,9,0,2,0,4,0,4,0,8,0,2,0,8,0,2,0,6,0,6,0,4,0,2,0,10,0,3,0,6
mov $2,$0
div $0,2
seq $0,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n.
mod $2,2
mov $1,$2
mul $1,$0
pow $2,$2
mul $2,2
add $1,$2
sub $1,2
mov $0,$1
|
oeis/291/A291703.asm | neoneye/loda-programs | 11 | 240002 | ; A291703: Number of connected dominating sets in the complete tripartite graph K_{n,n,n}.
; Submitted by <NAME>
; 7,54,490,4050,32674,261954,2096770,16776450,134216194,1073738754,8589928450,68719464450,549755789314,4398046461954,35184371990530,281474976514050,2251799813292034,18014398508695554,144115188074283010,1152921504603701250,9223372036848484354,73786976294825623554,590295810358680485890,4722366482869594882050,37778931862957061046274,302231454903657092349954,2417851639229257946759170,19342813113834065989992450,154742504910672532751777794,1237940039285380271677898754,9903520314283042192750542850
mov $1,8
pow $1,$0
mov $2,2
pow $2,$0
sub $1,$2
mov $0,$1
mul $0,4
add $0,$2
mul $0,2
trn $0,5
add $0,7
|
programs/oeis/064/A064043.asm | karttu/loda | 1 | 177055 | <reponame>karttu/loda<gh_stars>1-10
; A064043: Number of length 3 walks on an n-dimensional hypercubic lattice starting at the origin and staying in the nonnegative part.
; 0,3,18,51,108,195,318,483,696,963,1290,1683,2148,2691,3318,4035,4848,5763,6786,7923,9180,10563,12078,13731,15528,17475,19578,21843,24276,26883,29670,32643,35808,39171,42738,46515,50508,54723,59166,63843,68760,73923,79338,85011,90948,97155,103638,110403,117456,124803,132450,140403,148668,157251,166158,175395,184968,194883,205146,215763,226740,238083,249798,261891,274368,287235,300498,314163,328236,342723,357630,372963,388728,404931,421578,438675,456228,474243,492726,511683,531120,551043,571458,592371,613788,635715,658158,681123,704616,728643,753210,778323,803988,830211,856998,884355,912288,940803,969906,999603,1029900,1060803,1092318,1124451,1157208,1190595,1224618,1259283,1294596,1330563,1367190,1404483,1442448,1481091,1520418,1560435,1601148,1642563,1684686,1727523,1771080,1815363,1860378,1906131,1952628,1999875,2047878,2096643,2146176,2196483,2247570,2299443,2352108,2405571,2459838,2514915,2570808,2627523,2685066,2743443,2802660,2862723,2923638,2985411,3048048,3111555,3175938,3241203,3307356,3374403,3442350,3511203,3580968,3651651,3723258,3795795,3869268,3943683,4019046,4095363,4172640,4250883,4330098,4410291,4491468,4573635,4656798,4740963,4826136,4912323,4999530,5087763,5177028,5267331,5358678,5451075,5544528,5639043,5734626,5831283,5929020,6027843,6127758,6228771,6330888,6434115,6538458,6643923,6750516,6858243,6967110,7077123,7188288,7300611,7414098,7528755,7644588,7761603,7879806,7999203,8119800,8241603,8364618,8488851,8614308,8740995,8868918,8998083,9128496,9260163,9393090,9527283,9662748,9799491,9937518,10076835,10217448,10359363,10502586,10647123,10792980,10940163,11088678,11238531,11389728,11542275,11696178,11851443,12008076,12166083,12325470,12486243,12648408,12811971,12976938,13143315,13311108,13480323,13650966,13823043,13996560,14171523,14347938,14525811,14705148,14885955,15068238,15252003,15437256,15624003
mov $1,$0
add $0,3
mul $0,$1
mul $0,$1
sub $0,$1
mov $1,$0
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_5_247.asm | ljhsiun2/medusa | 9 | 21738 | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r15
push %rax
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_A_ht+0x15ff4, %rsi
lea addresses_normal_ht+0x157f4, %rdi
nop
add %rdx, %rdx
mov $23, %rcx
rep movsl
nop
nop
nop
nop
xor $52769, %rbx
lea addresses_WC_ht+0x155d9, %r10
clflush (%r10)
sub %rax, %rax
mov $0x6162636465666768, %rsi
movq %rsi, (%r10)
nop
nop
sub %rax, %rax
lea addresses_normal_ht+0xaa74, %rsi
lea addresses_A_ht+0xa6b4, %rdi
nop
and $52207, %r15
mov $106, %rcx
rep movsw
xor $31467, %r10
lea addresses_WT_ht+0x1d354, %rbx
nop
nop
xor $47567, %rax
mov $0x6162636465666768, %r10
movq %r10, %xmm5
vmovups %ymm5, (%rbx)
nop
nop
nop
add %rcx, %rcx
lea addresses_WT_ht+0x17e74, %rdx
clflush (%rdx)
nop
nop
cmp %rdi, %rdi
mov (%rdx), %rcx
add $42882, %rbx
lea addresses_D_ht+0x15c74, %r15
nop
nop
nop
xor %rcx, %rcx
mov (%r15), %edx
nop
nop
nop
nop
nop
and $32252, %rdx
lea addresses_WC_ht+0x8274, %rsi
lea addresses_UC_ht+0xdbfd, %rdi
nop
sub %rdx, %rdx
mov $115, %rcx
rep movsb
nop
nop
nop
nop
nop
mfence
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r14
push %r8
push %rax
push %rcx
push %rdi
// Load
lea addresses_normal+0x1e134, %r14
nop
nop
add $13900, %r12
movb (%r14), %r8b
nop
nop
nop
nop
nop
inc %r14
// Store
mov $0x79afd700000005f4, %r14
clflush (%r14)
nop
nop
nop
nop
nop
and $19539, %rax
mov $0x5152535455565758, %r8
movq %r8, %xmm4
vmovups %ymm4, (%r14)
nop
nop
xor $62275, %r14
// Store
lea addresses_A+0xafff, %r12
nop
add $64418, %r13
movw $0x5152, (%r12)
nop
nop
nop
nop
nop
dec %r14
// Faulty Load
lea addresses_D+0x11074, %rcx
inc %r8
movups (%rcx), %xmm1
vpextrq $0, %xmm1, %rax
lea oracles, %r13
and $0xff, %rax
shlq $12, %rax
mov (%r13,%rax,1), %rax
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r14
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D', 'NT': True, 'AVXalign': True, 'size': 32, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 6}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_NC', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_D', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 6, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 5, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WT_ht', 'NT': True, 'AVXalign': False, 'size': 8, 'congruent': 8}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': True, 'size': 4, 'congruent': 9}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 0, 'type': 'addresses_UC_ht'}}
{'36': 5}
36 36 36 36 36
*/
|
gcc-gcc-7_3_0-release/gcc/testsuite/gnat.dg/varsize3_1.ads | best08618/asylo | 7 | 21824 | <reponame>best08618/asylo<filename>gcc-gcc-7_3_0-release/gcc/testsuite/gnat.dg/varsize3_1.ads
with Varsize3_Pkg1; use Varsize3_Pkg1;
package Varsize3_1 is
pragma Elaborate_Body;
Filter : constant Object := True;
end Varsize3_1;
|
source/numerics/a-nugear.ads | ytomino/drake | 33 | 18410 | pragma License (Unrestricted);
-- implementation unit for Generic_Real_Arrays and Generic_Complex_Arrays
private package Ada.Numerics.Generic_Arrays is
pragma Pure;
-- vector selection, conversion, and composition operations
generic
type Number is private;
type Vector is array (Integer range <>) of Number;
type Parameter_Type is private;
type Parameter_Vector is array (Integer range <>) of Parameter_Type;
with procedure Apply (X : in out Number; Param : Parameter_Type);
procedure Apply_Vector (X : in out Vector; Param : Parameter_Vector);
-- vector arithmetic operations
generic
type Number is private;
type Vector is array (Integer range <>) of Number;
type Result_Type is private;
type Result_Vector is array (Integer range <>) of Result_Type;
with function Operator (Right : Number) return Result_Type;
function Operator_Vector (Right : Vector) return Result_Vector;
generic
type Number is private;
type Vector is array (Integer range <>) of Number;
type Parameter_Type is private;
type Result_Type is private;
type Result_Vector is array (Integer range <>) of Result_Type;
with function Operator (X : Number; Y : Parameter_Type)
return Result_Type;
function Operator_Vector_Param (X : Vector; Y : Parameter_Type)
return Result_Vector;
generic
type Left_Type is private;
type Left_Vector is array (Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Vector is array (Integer range <>) of Right_Type;
type Result_Type is private;
type Result_Vector is array (Integer range <>) of Result_Type;
with function Operator (Left : Left_Type; Right : Right_Type)
return Result_Type;
function Operator_Vector_Vector (Left : Left_Vector; Right : Right_Vector)
return Result_Vector;
generic
type Number is private;
type Vector is array (Integer range <>) of Number;
type Parameter_Type is private;
type Result_Type is private;
type Result_Vector is array (Integer range <>) of Result_Type;
with function Operator (X, Y : Number; Param : Parameter_Type)
return Result_Type;
function Operator_Vector_Vector_Param (X, Y : Vector; Z : Parameter_Type)
return Result_Vector;
generic
type Number is private;
type Vector is array (Integer range <>) of Number;
type Result_Type is private;
Zero : Result_Type;
with function Sqrt (X : Result_Type) return Result_Type is <>;
with function "abs" (Right : Number) return Result_Type is <>;
with function "+" (Left, Right : Result_Type) return Result_Type is <>;
with function "*" (Left, Right : Result_Type) return Result_Type is <>;
function Absolute (Right : Vector) return Result_Type;
generic
type Left_Type is private;
type Left_Vector is array (Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Vector is array (Integer range <>) of Right_Type;
type Result_Type is private;
Zero : Result_Type;
with function "+" (Left, Right : Result_Type) return Result_Type is <>;
with function "*" (Left : Left_Type; Right : Right_Type)
return Result_Type is <>;
function Inner_Production (Left : Left_Vector; Right : Right_Vector)
return Result_Type;
-- other vector operations
generic
type Number is private;
type Vector is array (Integer range <>) of Number;
Zero : Number;
One : Number;
function Unit_Vector (
Index : Integer;
Order : Positive;
First : Integer := 1)
return Vector;
-- matrix selection, conversion, and composition operations
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
type Parameter_Type is private;
type Parameter_Matrix is
array (Integer range <>, Integer range <>) of Parameter_Type;
with procedure Apply (X : in out Number; Param : Parameter_Type);
procedure Apply_Matrix (X : in out Matrix; Param : Parameter_Matrix);
-- matrix arithmetic operations
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
type Result_Type is private;
type Result_Matrix is
array (Integer range <>, Integer range <>) of Result_Type;
with function Operator (Right : Number) return Result_Type;
function Operator_Matrix (Right : Matrix) return Result_Matrix;
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
type Parameter_Type is private;
type Result_Type is private;
type Result_Matrix is
array (Integer range <>, Integer range <>) of Result_Type;
with function Operator (X : Number; Y : Parameter_Type)
return Result_Type;
function Operator_Matrix_Param (X : Matrix; Y : Parameter_Type)
return Result_Matrix;
generic
type Left_Type is private;
type Left_Matrix is
array (Integer range <>, Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Matrix is
array (Integer range <>, Integer range <>) of Right_Type;
type Result_Type is private;
type Result_Matrix is
array (Integer range <>, Integer range <>) of Result_Type;
with function Operator (Left : Left_Type; Right : Right_Type)
return Result_Type;
function Operator_Matrix_Matrix (Left : Left_Matrix; Right : Right_Matrix)
return Result_Matrix;
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
type Parameter_Type is private;
type Result_Type is private;
type Result_Matrix is
array (Integer range <>, Integer range <>) of Result_Type;
with function Operator (X, Y : Number; Z : Parameter_Type)
return Result_Type;
function Operator_Matrix_Matrix_Param (X, Y : Matrix; Z : Parameter_Type)
return Result_Matrix;
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
function Transpose (X : Matrix) return Matrix;
generic
type Left_Type is private;
type Left_Matrix is
array (Integer range <>, Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Matrix is
array (Integer range <>, Integer range <>) of Right_Type;
type Result_Type is private;
type Result_Matrix is
array (Integer range <>, Integer range <>) of Result_Type;
Zero : Result_Type;
with function "+" (Left, Right : Result_Type) return Result_Type is <>;
with function "*" (Left : Left_Type; Right : Right_Type)
return Result_Type is <>;
function Multiply_Matrix_Matrix (Left : Left_Matrix; Right : Right_Matrix)
return Result_Matrix;
generic
type Left_Type is private;
type Left_Vector is array (Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Vector is array (Integer range <>) of Right_Type;
type Result_Type is private;
type Result_Matrix is
array (Integer range <>, Integer range <>) of Result_Type;
with function "*" (Left : Left_Type; Right : Right_Type)
return Result_Type is <>;
function Multiply_Vector_Vector (Left : Left_Vector; Right : Right_Vector)
return Result_Matrix;
generic
type Left_Type is private;
type Left_Vector is array (Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Matrix is
array (Integer range <>, Integer range <>) of Right_Type;
type Result_Type is private;
type Result_Vector is array (Integer range <>) of Result_Type;
Zero : Result_Type;
with function "+" (Left, Right : Result_Type) return Result_Type is <>;
with function "*" (Left : Left_Type; Right : Right_Type)
return Result_Type is <>;
function Multiply_Vector_Matrix (Left : Left_Vector; Right : Right_Matrix)
return Result_Vector;
generic
type Left_Type is private;
type Left_Matrix is
array (Integer range <>, Integer range <>) of Left_Type;
type Right_Type is private;
type Right_Vector is array (Integer range <>) of Right_Type;
type Result_Type is private;
type Result_Vector is array (Integer range <>) of Result_Type;
Zero : Result_Type;
with function "+" (Left, Right : Result_Type) return Result_Type is <>;
with function "*" (Left : Left_Type; Right : Right_Type)
return Result_Type is <>;
function Multiply_Matrix_Vector (Left : Left_Matrix; Right : Right_Vector)
return Result_Vector;
-- matrix inversion and related operations
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
function Minor (A : Matrix; I, J : Integer) return Matrix;
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
One : Number;
with function Minor (A : Matrix; I, J : Integer) return Matrix is <>;
with function Determinant (A : Matrix) return Number is <>;
with function "-" (Right : Number) return Number is <>;
with function "*" (Left, Right : Number) return Number is <>;
with function "/" (Left, Right : Number) return Number is <>;
function Inverse (A : Matrix) return Matrix;
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
Zero : Number;
One : Number;
with function Minor (A : Matrix; I, J : Integer) return Matrix is <>;
with function "+" (Left, Right : Number) return Number is <>;
with function "-" (Right : Number) return Number is <>;
with function "-" (Left, Right : Number) return Number is <>;
with function "*" (Left, Right : Number) return Number is <>;
function Determinant (A : Matrix) return Number;
-- eigenvalues and vectors of a hermitian matrix
generic
type Real is private;
type Real_Vector is array (Integer range <>) of Real;
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
Zero : Number;
One : Number;
Two : Number;
with function Sqrt (X : Number) return Number is <>;
with function Is_Minus (X : Number) return Boolean is <>;
with function Is_Small (X : Number) return Boolean is <>;
with function To_Real (X : Number) return Real is <>;
with function "+" (Left, Right : Number) return Number is <>;
with function "-" (Right : Number) return Number is <>;
with function "-" (Left, Right : Number) return Number is <>;
with function "*" (Left, Right : Number) return Number is <>;
with function "/" (Left, Right : Number) return Number is <>;
procedure Eigensystem (
A : Matrix;
Values : out Real_Vector;
Vectors : out Matrix);
-- other matrix operations
generic
type Number is private;
type Matrix is array (Integer range <>, Integer range <>) of Number;
Zero : Number;
One : Number;
function Unit_Matrix (Order : Positive; First_1, First_2 : Integer := 1)
return Matrix;
end Ada.Numerics.Generic_Arrays;
|
programs/oeis/155/A155456.asm | karttu/loda | 0 | 18930 | ; A155456: Write (1+1/x)*log(1+x) = Sum c(n)*x^n; then a(n) = (n+1)!*c(n).
; -1,-1,1,-2,6,-24,120,-720,5040,-40320,362880,-3628800,39916800,-479001600,6227020800,-87178291200,1307674368000,-20922789888000,355687428096000,-6402373705728000
mov $1,1
mov $2,2
sub $2,$0
sub $2,1
fac $2
add $2,1
sub $1,$2
|
Miscellaneous/kabaddi.asm | suriya-1403/Assemble-language | 0 | 178099 | <reponame>suriya-1403/Assemble-language
DATA SEGMENT
LEAGU DB 08H,09H,0AH,04H,0CH,0DH,02H,00H,02H,05H
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE, DS: DATA
START:
MOV AX,DATA
MOV DS,AX
MOV CH,09H
LP1:
MOV CL,09H
LEA SI, LEAGU
LP2:
MOV AL,[SI]
MOV BL,[SI+1]
CMP AL,BL
JNC DOWN
MOV DL,[SI+1]
XCHG [SI],DL
MOV [SI+1],DL
DOWN:
INC SI
DEC CL
JNZ LP2
DEC CH
JNZ LP1
INT 3
CODE ENDS
END START
|
source/nodes/program-nodes-digits_constraints.ads | reznikmm/gela | 0 | 19785 | -- SPDX-FileCopyrightText: 2019 <NAME> <<EMAIL>>
--
-- SPDX-License-Identifier: MIT
-------------------------------------------------------------
with Program.Lexical_Elements;
with Program.Elements.Expressions;
with Program.Elements.Constraints;
with Program.Elements.Digits_Constraints;
with Program.Element_Visitors;
package Program.Nodes.Digits_Constraints is
pragma Preelaborate;
type Digits_Constraint is
new Program.Nodes.Node
and Program.Elements.Digits_Constraints.Digits_Constraint
and Program.Elements.Digits_Constraints.Digits_Constraint_Text
with private;
function Create
(Digits_Token : not null Program.Lexical_Elements
.Lexical_Element_Access;
Digits_Expression : not null Program.Elements.Expressions
.Expression_Access;
Range_Token : Program.Lexical_Elements.Lexical_Element_Access;
Real_Range_Constraint : Program.Elements.Constraints.Constraint_Access)
return Digits_Constraint;
type Implicit_Digits_Constraint is
new Program.Nodes.Node
and Program.Elements.Digits_Constraints.Digits_Constraint
with private;
function Create
(Digits_Expression : not null Program.Elements.Expressions
.Expression_Access;
Real_Range_Constraint : Program.Elements.Constraints.Constraint_Access;
Is_Part_Of_Implicit : Boolean := False;
Is_Part_Of_Inherited : Boolean := False;
Is_Part_Of_Instance : Boolean := False)
return Implicit_Digits_Constraint
with Pre =>
Is_Part_Of_Implicit or Is_Part_Of_Inherited or Is_Part_Of_Instance;
private
type Base_Digits_Constraint is
abstract new Program.Nodes.Node
and Program.Elements.Digits_Constraints.Digits_Constraint
with record
Digits_Expression : not null Program.Elements.Expressions
.Expression_Access;
Real_Range_Constraint : Program.Elements.Constraints.Constraint_Access;
end record;
procedure Initialize (Self : in out Base_Digits_Constraint'Class);
overriding procedure Visit
(Self : not null access Base_Digits_Constraint;
Visitor : in out Program.Element_Visitors.Element_Visitor'Class);
overriding function Digits_Expression
(Self : Base_Digits_Constraint)
return not null Program.Elements.Expressions.Expression_Access;
overriding function Real_Range_Constraint
(Self : Base_Digits_Constraint)
return Program.Elements.Constraints.Constraint_Access;
overriding function Is_Digits_Constraint
(Self : Base_Digits_Constraint)
return Boolean;
overriding function Is_Constraint
(Self : Base_Digits_Constraint)
return Boolean;
overriding function Is_Definition
(Self : Base_Digits_Constraint)
return Boolean;
type Digits_Constraint is
new Base_Digits_Constraint
and Program.Elements.Digits_Constraints.Digits_Constraint_Text
with record
Digits_Token : not null Program.Lexical_Elements
.Lexical_Element_Access;
Range_Token : Program.Lexical_Elements.Lexical_Element_Access;
end record;
overriding function To_Digits_Constraint_Text
(Self : in out Digits_Constraint)
return Program.Elements.Digits_Constraints.Digits_Constraint_Text_Access;
overriding function Digits_Token
(Self : Digits_Constraint)
return not null Program.Lexical_Elements.Lexical_Element_Access;
overriding function Range_Token
(Self : Digits_Constraint)
return Program.Lexical_Elements.Lexical_Element_Access;
type Implicit_Digits_Constraint is
new Base_Digits_Constraint
with record
Is_Part_Of_Implicit : Boolean;
Is_Part_Of_Inherited : Boolean;
Is_Part_Of_Instance : Boolean;
end record;
overriding function To_Digits_Constraint_Text
(Self : in out Implicit_Digits_Constraint)
return Program.Elements.Digits_Constraints.Digits_Constraint_Text_Access;
overriding function Is_Part_Of_Implicit
(Self : Implicit_Digits_Constraint)
return Boolean;
overriding function Is_Part_Of_Inherited
(Self : Implicit_Digits_Constraint)
return Boolean;
overriding function Is_Part_Of_Instance
(Self : Implicit_Digits_Constraint)
return Boolean;
end Program.Nodes.Digits_Constraints;
|
programs/oeis/219/A219846.asm | jmorken/loda | 1 | 86464 | ; A219846: Number of n X 2 arrays of the minimum value of corresponding elements and their horizontal or antidiagonal neighbors in a random, but sorted with lexicographically nondecreasing rows and nonincreasing columns, 0..2 n X 2 array.
; 3,7,16,33,62,108,177,276,413,597,838,1147,1536,2018,2607,3318,4167,5171,6348,7717,9298,11112,13181,15528,18177,21153,24482,28191,32308,36862,41883,47402,53451,60063,67272,75113,83622,92836,102793,113532,125093
mov $3,3
mov $5,3
lpb $0
sub $0,1
add $2,$3
add $1,$2
add $3,1
add $4,1
trn $5,2
sub $2,$5
sub $3,$5
add $3,$4
lpe
add $1,$3
|
S-F200VX_20180919/Protocol_TX_Handle.asm | xcwk/8-Pads-WiFi-Fat-Scale | 1 | 173530 | <reponame>xcwk/8-Pads-WiFi-Fat-Scale
;=================================================
;===== Protocol_TX_Handle.asm
;=================================================
Protocol_TX_Entry:
BTFSC UART_TX_EVENT,B_UART_TX_EVENT_ACK
GOTO Protocol_TX_ACK
BTFSC UART_TX_EVENT,B_UART_TX_EVENT_unlock
GOTO Protocol_TX_UnlockData
BTFSC UART_TX_EVENT,B_UART_TX_EVENT_lock
GOTO Protocol_TX_LockData
BTFSC UART_TX_EVENT,B_UART_TX_EVENT_CFG
GOTO Protocol_TX_SmartConfig
BTFSC UART_TX_EVENT,B_UART_TX_EVENT_Final
GOTO Protocol_TX_FinalData
BTFSC UART_TX_EVENT,B_UART_TX_EVENT_WifiTest
GOTO Protocol_TX_WifiTest
GOTO Protocol_TX_Exit
Protocol_TX_UnlockData:
CALL F_Send_UnLockData
BCF UART_TX_EVENT,B_UART_TX_EVENT_unlock
GOTO Protocol_TX_Exit
Protocol_TX_LockData:
CALL F_Send_LockData
BCF UART_TX_EVENT,B_UART_TX_EVENT_lock
GOTO Protocol_TX_Exit
Protocol_TX_SmartConfig:
CALL F_Send_SmartConfig
BCF UART_TX_EVENT,B_UART_TX_EVENT_CFG
GOTO Protocol_TX_Exit
Protocol_TX_ACK:
CALL F_Send_CMDAck
BCF UART_TX_EVENT,B_UART_TX_EVENT_ACK
GOTO Protocol_TX_Exit
Protocol_TX_FinalData:
CALL F_Send_FinalData
BCF UART_TX_EVENT,B_UART_TX_EVENT_Final
GOTO Protocol_TX_Exit
Protocol_TX_WifiTest:
CALL F_Send_WifiTest
BCF UART_TX_EVENT,B_UART_TX_EVENT_WifiTest
GOTO Protocol_TX_Exit
Protocol_TX_Exit:
|
antlr4-formatter/src/test/resources/at.formatted.g4 | quantrpeter/Antlr4Formatter | 28 | 6061 | <filename>antlr4-formatter/src/test/resources/at.formatted.g4
// Define a grammar called Hello
grammar Hello;
r
: 'hello' ID
; // match keyword hello followed by an identifier
AT
: '@'
;
ELLIPSIS
: '...'
;
|
programs/oeis/124/A124778.asm | karttu/loda | 0 | 100887 | ; A124778: Number of unlabeled unordered rooted forests associated with compositions in standard order.
; 1,1,1,1,1,1,1,1,1,1,2,1,1,1,1,1,1,1,2,1,2,2,1,1,1,1,2,1,1,1,1,1
sub $0,1
cal $0,56976 ; Number of blocks of {0, 1, 0} in the binary expansion of n.
mov $1,$0
add $1,1
|
oeis/127/A127952.asm | neoneye/loda-programs | 11 | 240927 | <gh_stars>10-100
; A127952: Triangle read by rows, T(n,k) = (n+1)*C(n-1,k-1).
; Submitted by <NAME>
; 1,0,2,0,3,3,0,4,8,4,0,5,15,15,5,0,6,24,36,24,6,0,7,35,70,70,35,7,0,8,48,120,160,120,48,8,0,9,63,189,315,315,189,63,9,0,10,80,280,560,700,560,280,80,10,0,11,99,396,924,1386,1386,924,396,99,11,0,12,120,540,1440,2520,3024,2520,1440,540,120,12,0,13,143,715,2145,4290,6006,6006,4290,2145,715,143,13,0,14,168,924,3080,6930,11088,12936,11088
lpb $0
add $1,1
sub $0,$1
mov $2,$1
sub $2,$0
lpe
mov $0,$1
sub $0,1
bin $0,$2
add $1,1
mul $1,16
mul $1,$0
mov $0,$1
div $0,16
|
test/Succeed/Issue1259.agda | KDr2/agda | 0 | 3064 | <filename>test/Succeed/Issue1259.agda
-- Andreas, 2014-08-28, reported by <NAME>
{-# OPTIONS --cubical-compatible #-}
-- {-# OPTIONS -v term:20 #-}
module _ where
data Bool : Set where true false : Bool
data List (A : Set) : Set where
[] : List A
_∷_ : A → List A → List A
module Sort (A : Set) ( _≤_ : A → A → Bool) where
insert : A → List A → List A
insert x [] = []
insert x (y ∷ ys) with x ≤ y
... | true = x ∷ (y ∷ ys)
... | false = y ∷ insert x ys
-- Should termination check.
-- (Did not because while with lhss were not inlined, with-calls still were.)
|
add.asm | SuperSecureHuman/Hack_Assembler_Nand2Tetris | 0 | 28316 | //Comment
@2 //Comment but in middle
D = A //comment to let you know that there is a space in this inst
@3
D=D+ A
@0
M=D
//comment but in end
|
sharding-core/src/main/antlr4/imports/OracleDCLStatement.g4 | ahugeStone/sharding-sphere | 0 | 274 | <filename>sharding-core/src/main/antlr4/imports/OracleDCLStatement.g4<gh_stars>0
grammar OracleDCLStatement;
import OracleKeyword, Keyword, OracleBase, BaseRule, DataType, Symbol;
grant
: GRANT
(
(grantSystemPrivileges | grantObjectPrivilegeClause) (CONTAINER EQ_ (CURRENT | ALL))?
| grantRolesToPrograms
)
;
grantSystemPrivileges
: systemObjects TO (grantees | granteeIdentifiedBy) (WITH (ADMIN | DELEGATE) OPTION)?
;
systemObjects
: systemObject(COMMA systemObject)*
;
systemObject
: ALL PRIVILEGES | roleName | ID *?
;
grantees
: grantee (COMMA grantee)*
;
grantee
: userName | roleName | PUBLIC
;
granteeIdentifiedBy
: userNames IDENTIFIED BY STRING (COMMA STRING)*
;
grantObjectPrivilegeClause
: grantObjectPrivilege (COMMA grantObjectPrivilege)* onObjectClause
TO grantees (WITH HIERARCHY OPTION)?(WITH GRANT OPTION)?
;
grantObjectPrivilege
: objectPrivilege columnList?
;
objectPrivilege
: ID *? | ALL PRIVILEGES?
;
onObjectClause
: ON
(
schemaName? ID
| USER userName ( COMMA userName)*
| (DIRECTORY | EDITION | MINING MODEL | JAVA (SOURCE | RESOURCE) | SQL TRANSLATION PROFILE) schemaName? ID
)
;
grantRolesToPrograms
: roleNames TO programUnits
;
programUnits
: programUnit (COMMA programUnit)*
;
programUnit
: (FUNCTION | PROCEDURE | PACKAGE) schemaName? ID
;
revoke
: REVOKE
(
(revokeSystemPrivileges | revokeObjectPrivileges) (CONTAINER EQ_ (CURRENT | ALL))?
| revokeRolesFromPrograms
)
;
revokeSystemPrivileges
: systemObjects FROM
;
revokeObjectPrivileges
: objectPrivilege (COMMA objectPrivilege)* onObjectClause FROM grantees (CASCADE CONSTRAINTS | FORCE)?
;
revokeRolesFromPrograms
: (roleNames | ALL) FROM programUnits
;
createUser
: CREATE USER userName IDENTIFIED
(BY ID | (EXTERNALLY | GLOBALLY) ( AS STRING)?)
(
DEFAULT TABLESPACE ID
| TEMPORARY TABLESPACE ID
| (QUOTA (sizeClause | UNLIMITED) ON ID)
| PROFILE ID
| PASSWORD EXPIRE
| ACCOUNT (LOCK | UNLOCK)
| ENABLE EDITIONS
| CONTAINER EQ_ (CURRENT | ALL)
)*
;
sizeClause
: NUMBER ID?
;
alterUser
: ALTER USER
(
userName
(
IDENTIFIED (BY ID (REPLACE STRING)? | (EXTERNALLY | GLOBALLY) ( AS STRING)?)
| DEFAULT TABLESPACE ID
| TEMPORARY TABLESPACE ID
| QUOTA (sizeClause | UNLIMITED) ON ID
| PROFILE ID
| PASSWORD EXPIRE
| ACCOUNT (LOCK | UNLOCK)
| ENABLE EDITIONS (FOR ids)? FORCE?
| CONTAINER EQ_ (CURRENT | ALL)
| DEFAULT ROLE (roleNames| ALL (EXCEPT roleNames)?| NONE)
| ID
)*
| userNames proxyClause
)
;
containerDataClause
: (
SET CONTAINER_DATA EQ_ ( ALL | DEFAULT | idList )
| (ADD |REMOVE) CONTAINER_DATA EQ_ idList
)
(FOR schemaName? ID)?
;
proxyClause
: (GRANT | REVOKE) CONNECT THROUGH ( ENTERPRISE USERS | userName dbUserProxyClauses?)
;
dbUserProxyClauses
: (WITH (ROLE (ALL EXCEPT)? roleNames | NO ROLES))?
(AUTHENTICATION REQUIRED )?
;
dropUser
: DROP USER userName CASCADE?
;
createRole
: CREATE ROLE roleName
(
NOT IDENTIFIED
| IDENTIFIED (BY ID | USING schemaName? ID | EXTERNALLY | GLOBALLY)
)?
(CONTAINER EQ_ (CURRENT | ALL))?
;
alterRole
: ALTER ROLE roleName
(NOT IDENTIFIED | IDENTIFIED (BY ID | USING schemaName? ID | EXTERNALLY | GLOBALLY))
(CONTAINER EQ_ (CURRENT | ALL))?
;
dropRole
: DROP ROLE roleName
;
|
Transynther/x86/_processed/NC/_zr_/i3-7100_9_0xca_notsx.log_21829_958.asm | ljhsiun2/medusa | 9 | 1521 | <filename>Transynther/x86/_processed/NC/_zr_/i3-7100_9_0xca_notsx.log_21829_958.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x11637, %rsi
lea addresses_WC_ht+0x72f7, %rdi
nop
nop
nop
nop
add %rax, %rax
mov $48, %rcx
rep movsl
nop
nop
nop
nop
and %r11, %r11
lea addresses_UC_ht+0x1c247, %rsi
lea addresses_WC_ht+0x730f, %rdi
nop
lfence
mov $17, %rcx
rep movsl
nop
nop
nop
dec %rax
lea addresses_A_ht+0x13dd7, %rsi
lea addresses_normal_ht+0xdf37, %rdi
clflush (%rsi)
xor $36906, %r15
mov $105, %rcx
rep movsq
nop
nop
and %rax, %rax
lea addresses_UC_ht+0x1d0b7, %rsi
lea addresses_UC_ht+0x16b37, %rdi
and %rax, %rax
mov $119, %rcx
rep movsb
nop
nop
nop
nop
nop
dec %rsi
lea addresses_WC_ht+0x1e2f7, %rcx
nop
nop
nop
nop
nop
add %rbx, %rbx
mov $0x6162636465666768, %rsi
movq %rsi, %xmm6
vmovups %ymm6, (%rcx)
nop
nop
add $21093, %rsi
lea addresses_WT_ht+0x9337, %rsi
lea addresses_D_ht+0x1ddd7, %rdi
add $12702, %r15
mov $12, %rcx
rep movsw
nop
nop
nop
nop
add $54421, %r15
lea addresses_A_ht+0x17217, %rsi
nop
nop
nop
nop
sub %r11, %r11
mov $0x6162636465666768, %rbx
movq %rbx, %xmm0
vmovups %ymm0, (%rsi)
nop
nop
nop
nop
nop
inc %rcx
lea addresses_WT_ht+0xfddf, %rsi
nop
nop
inc %rax
and $0xffffffffffffffc0, %rsi
movntdqa (%rsi), %xmm0
vpextrq $0, %xmm0, %rdi
nop
nop
nop
nop
nop
cmp %rdi, %rdi
lea addresses_normal_ht+0x227, %rdi
nop
nop
nop
nop
cmp %rsi, %rsi
movl $0x61626364, (%rdi)
nop
nop
nop
nop
sub $19960, %r11
lea addresses_normal_ht+0x1d537, %rdi
nop
nop
nop
sub %rsi, %rsi
mov $0x6162636465666768, %rbx
movq %rbx, (%rdi)
sub %rdi, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r8
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
// Store
lea addresses_UC+0x7633, %rbx
clflush (%rbx)
nop
sub %rbp, %rbp
movl $0x51525354, (%rbx)
nop
nop
nop
nop
add $64238, %r10
// Faulty Load
mov $0x2f0f3e0000000737, %r8
nop
nop
nop
nop
add $17431, %rax
mov (%r8), %cx
lea oracles, %r8
and $0xff, %rcx
shlq $12, %rcx
mov (%r8,%rcx,1), %rcx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r8
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_NC', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 2, 'NT': False, 'type': 'addresses_UC', 'size': 4, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_NC', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WT_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 6, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}}
{'src': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 3, 'NT': False, 'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False}}
{'src': {'type': 'addresses_WT_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 2, 'NT': True, 'type': 'addresses_WT_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False}}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
source/oasis/program-elements-unconstrained_array_types.ads | optikos/oasis | 0 | 3899 | <reponame>optikos/oasis<gh_stars>0
-- Copyright (c) 2019 <NAME> <<EMAIL>>
--
-- SPDX-License-Identifier: MIT
-- License-Filename: LICENSE
-------------------------------------------------------------
with Program.Elements.Type_Definitions;
with Program.Lexical_Elements;
with Program.Elements.Expressions;
with Program.Elements.Component_Definitions;
package Program.Elements.Unconstrained_Array_Types is
pragma Pure (Program.Elements.Unconstrained_Array_Types);
type Unconstrained_Array_Type is
limited interface and Program.Elements.Type_Definitions.Type_Definition;
type Unconstrained_Array_Type_Access is
access all Unconstrained_Array_Type'Class with Storage_Size => 0;
not overriding function Index_Subtypes
(Self : Unconstrained_Array_Type)
return not null Program.Elements.Expressions.Expression_Vector_Access
is abstract;
not overriding function Component_Definition
(Self : Unconstrained_Array_Type)
return not null Program.Elements.Component_Definitions
.Component_Definition_Access is abstract;
type Unconstrained_Array_Type_Text is limited interface;
type Unconstrained_Array_Type_Text_Access is
access all Unconstrained_Array_Type_Text'Class with Storage_Size => 0;
not overriding function To_Unconstrained_Array_Type_Text
(Self : aliased in out Unconstrained_Array_Type)
return Unconstrained_Array_Type_Text_Access is abstract;
not overriding function Array_Token
(Self : Unconstrained_Array_Type_Text)
return not null Program.Lexical_Elements.Lexical_Element_Access
is abstract;
not overriding function Left_Bracket_Token
(Self : Unconstrained_Array_Type_Text)
return not null Program.Lexical_Elements.Lexical_Element_Access
is abstract;
not overriding function Right_Bracket_Token
(Self : Unconstrained_Array_Type_Text)
return not null Program.Lexical_Elements.Lexical_Element_Access
is abstract;
not overriding function Of_Token
(Self : Unconstrained_Array_Type_Text)
return not null Program.Lexical_Elements.Lexical_Element_Access
is abstract;
end Program.Elements.Unconstrained_Array_Types;
|
src/Categories/Minus2-Category/Properties.agda | Trebor-Huang/agda-categories | 279 | 15400 | <reponame>Trebor-Huang/agda-categories<filename>src/Categories/Minus2-Category/Properties.agda
{-# OPTIONS --without-K --safe #-}
module Categories.Minus2-Category.Properties where
-- All -2-Categories are equivalent to One
open import Level
open import Data.Product using (Σ; _,_; proj₁; proj₂)
open import Data.Unit using (⊤; tt)
open import Categories.Minus2-Category
open import Categories.Category
import Categories.Morphism as M
open import Categories.Category.Monoidal
open import Categories.Category.Instance.One
open import Categories.Category.Equivalence hiding (refl)
open import Categories.NaturalTransformation using (ntHelper)
private
variable
o ℓ e : Level
shrink-them-all : (X : -2-Category {o} {ℓ} {e}) → StrongEquivalence (-2-Category.cat X) (One {o} {ℓ} {e})
shrink-them-all X = record
{ F = record
{ F₀ = λ _ → lift tt
; F₁ = λ _ → lift tt
}
; G = record
{ F₀ = λ _ → proj₁ Obj-Contr
; F₁ = λ _ → M._≅_.from (proj₂ Obj-Contr (proj₁ Obj-Contr))
; identity = Hom-Conn
; homomorphism = Hom-Conn
; F-resp-≈ = λ _ → Hom-Conn
}
; weak-inverse = record
{ F∘G≈id = _
; G∘F≈id = record
{ F⇒G = ntHelper (record
{ η = λ y → M._≅_.from (proj₂ Obj-Contr y)
; commute = λ _ → Hom-Conn
})
; F⇐G = ntHelper (record
{ η = λ y → M._≅_.to (proj₂ Obj-Contr y)
; commute = λ _ → Hom-Conn
})
; iso = λ Z → record
{ isoˡ = M._≅_.isoˡ (proj₂ Obj-Contr Z)
; isoʳ = M._≅_.isoʳ (proj₂ Obj-Contr Z)
}
}
}
}
where
open -2-Category X
open Category cat
|
efi_bootloader/misc.asm | danielabbott/UEFI-Bootloader | 1 | 179298 | BITS 64
SECTION .text
; void set_cr3(uintptr_t);
global set_cr3
set_cr3:
mov cr3, rdi
ret |
src/Category/Profunctor/Joker.agda | crisoagf/agda-optics | 0 | 177 | module Category.Profunctor.Joker where
open import Agda.Primitive using (Level; _⊔_; lsuc)
open import Data.Sum using (_⊎_; inj₁; inj₂)
open import Category.Functor using (RawFunctor; module RawFunctor)
open import Category.Functor.Lawful
open import Category.Profunctor
open import Category.Choice
open import Relation.Binary.PropositionalEquality using (refl)
Joker : ∀ {l₁ l₂ l₃} (F : Set l₂ → Set l₃) (A : Set l₁) (B : Set l₂) → Set l₃
Joker F _ B = F B
jokerProfunctor : ∀ {l₁ l₂} {F : Set l₁ → Set l₂} → RawFunctor F → ProfunctorImp (Joker F)
jokerProfunctor f = record
{ dimap = λ _ h g → h <$> g
; lmap = λ _ g → g
; rmap = λ h g → h <$> g
} where open RawFunctor f
jokerLawfulProfunctor : ∀ {l₁ l₂} {F : Set l₁ → Set l₂} {FFunc : RawFunctor F} → LawfulFunctorImp FFunc → LawfulProfunctorImp (jokerProfunctor FFunc)
jokerLawfulProfunctor f = record
{ lmapId = refl
; rmapId = <$>-identity
; dimapLmapRmap = refl
} where open LawfulFunctor f
jokerChoice : ∀ {l₁ l₂} {F : Set l₁ → Set l₂} → RawFunctor F → ChoiceImp (Joker F)
jokerChoice f = record
{ isProfunctor = jokerProfunctor f
; left' = inj₁ <$>_
; right' = inj₂ <$>_
}
where open RawFunctor f
|
Task/Reverse-words-in-a-string/Ada/reverse-words-in-a-string-3.ada | LaudateCorpus1/RosettaCodeData | 1 | 27890 | <reponame>LaudateCorpus1/RosettaCodeData
with Ada.Text_IO, Simple_Parse;
procedure Reverse_Words is
function Reverse_Words(S: String) return String is
Cursor: Positive := S'First;
Word: String := Simple_Parse.Next_Word(S, Cursor);
begin
if Word = "" then
return "";
else
return Reverse_Words(S(Cursor .. S'Last)) & " " & Word;
end if;
end Reverse_Words;
use Ada.Text_IO;
begin
while not End_Of_File loop
Put_Line(Reverse_Words(Get_Line)); -- poem is read from standard input
end loop;
end Reverse_Words;
|
programs/oeis/044/A044242.asm | neoneye/loda | 22 | 244785 | ; A044242: Numbers n such that string 6,7 occurs in the base 8 representation of n but not of n-1.
; 55,119,183,247,311,375,439,503,567,631,695,759,823,887,951,1015,1079,1143,1207,1271,1335,1399,1463,1527,1591,1655,1719,1783,1847,1911,1975,2039,2103,2167,2231,2295,2359,2423,2487,2551
mul $0,64
add $0,55
|
Transynther/x86/_processed/AVXALIGN/_zr_/i9-9900K_12_0xa0.log_21829_1496.asm | ljhsiun2/medusa | 9 | 105546 | <filename>Transynther/x86/_processed/AVXALIGN/_zr_/i9-9900K_12_0xa0.log_21829_1496.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r13
push %r14
push %rbp
lea addresses_WC_ht+0xf34a, %rbp
nop
nop
nop
nop
nop
add %r13, %r13
vmovups (%rbp), %ymm0
vextracti128 $1, %ymm0, %xmm0
vpextrq $1, %xmm0, %r14
dec %r10
lea addresses_WC_ht+0x82ea, %r10
nop
nop
nop
nop
nop
inc %r14
mov (%r10), %r12
nop
xor $44856, %r10
pop %rbp
pop %r14
pop %r13
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r15
push %r8
push %rax
push %rcx
push %rdi
// Load
lea addresses_RW+0xab0e, %rax
nop
nop
nop
nop
nop
add $16251, %r8
movups (%rax), %xmm0
vpextrq $1, %xmm0, %r15
nop
nop
nop
nop
cmp $2887, %r11
// Store
lea addresses_D+0x116ca, %r11
nop
nop
nop
nop
nop
xor $61928, %rcx
movb $0x51, (%r11)
nop
sub $62206, %rdi
// Faulty Load
lea addresses_WC+0x1954a, %rdi
nop
nop
nop
nop
nop
add %rax, %rax
mov (%rdi), %ecx
lea oracles, %r12
and $0xff, %rcx
shlq $12, %rcx
mov (%r12,%rcx,1), %rcx
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': True, 'same': True, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_RW', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_D', 'AVXalign': False, 'size': 1}}
[Faulty Load]
{'src': {'NT': True, 'same': True, 'congruent': 0, 'type': 'addresses_WC', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 5, 'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 8}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
Application/AssemblyCode/working_and_tmp_asm_files/MAIN_ASSEMBLY_CODE_WITH_GHOST_AND_PACMAN_AI.asm | t0ddpar0dy/Handmade_Pacman | 0 | 21044 | //JUC r6 start_menu ///calls start_game.
start_Game:
JAL r6 initlevel
JAL r6 INIT_PACMAN
JAL r6 INIT_GreenGhost
mainGameLoop:
JAL r6 PACMAN_UPDATE_STATE
JAL r6 GreenGhost_UPDATE_STATE
JAL r6 GreenGhost_Draw_GLYPH
JAL r6 PACMAN_DRAW_GLYPH
JUC r6 mainGameLoop
//:::::::::::::BEGIN PACMAN STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::BEGIN PACMAN STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::BEGIN PACMAN STATE MACHINE::::::::::::::::::::::::::
//register usage: r14 used to save return address of this function.
//registers r0, r1 destroyed as general purpose, r4 used to store state address
// STATES:
// For the '0' states, the state feild will evaluate to 0 if masked with 0x0F (15).
// the ZERO ('0') states are where pacman is centered on a tile.
// In the 0 state pacman will continue MOVIng forward unless the player inputs a direction
// if pacman reaches any state0 and a ghost position is this tile, nextstate is dead1.
//
// 0x10: pacmanUP0 (16) --centered on tile, facing up. nextstate will be up1, unless player input
// 0x20: pacmanDOWN0 (32) --centered on tile, facing down. nextstate is player input direction, else down1
// 0x30: pacmanLEFT0 (48) --centered on tile, facing left. nextstate is player input direction, else left1
// 0x40: pacmanRIGHT0 (64) --centered on tile, facing right. nextstate is player input direction, else right1
// The rest of the states are defined with the following pattern
// the number in parenthesis is the decimal value.
//
// 0x11 pacmanUP1 (17) //nextstate up2, if player inputs down then nextstate down0
// 0x12 pacmanUP2 (18) //nextstate up3, if player pushes down then nextstate down3
// 0x13 pacmanUP3 (19) //nextstate up0, if player pushes down then nextstate down2
//
// 0x21 pacmanDOWN1 (33) //nextstate down2, if player inputs up then nextstate up0
// 0x22 pacmanDOWN2 (34) //nextstate down3, if player inputs up then nextstate up3
// 0x23 pacmanDOWN3 (35) //nextstate down0, if player inputs up then nextstate up2
//
// 0x31 pacmanLEFT1 (49) //nextstate left2, if player inputs right then nextstate right0
// 0x32 pacmanLEFT2 (50) //nextstate left3, if player inputs right then nextstate right3
// 0x33 pacmanLEFT3 (51) //nextstate left0, if player inputs right then nextstate right2
//
// 0x41 pacmanRIGHT1 (65) //nextstate right2, if player inputs right then nextstate left0
// 0x42 pacmanRIGHT2 (66) //nextstate right3, if player inputs right then nextstate left3
// 0x43 pacmanRIGHT3 (67) //nextstate right0, if player inputs right then nextstate left2
//
// 0x01 pacmanDEAD1 (1) //nextstate dead2
// 0x02 pacmanDEAD2 (2) //nextstate dead3
// 0x03 pacmanDEAD3 (3) //nextstate dead4
// 0x04 pacmanDEAD4 (4) //nextstate pacleft0, reset position, do magic to clear his board tile.
/////THIS FUNCTION UPDATES PACMAN STATEMACHINE BY ONE STEP.
//
// The first thing it does is check the timer. If the timer is not active, it immediately leaves.
// Otherwise:
// check what state pacman is in
// check controller input accordingly,
// update state & position variables
// reset timer
//
PACMAN_UPDATE_STATE:
MOV r15 r14 //store old return adress
LUI 255 r0 //check timer by making address
ORI 242 r0
LOAD r0 r0 //then loading its value and cmp to 1
CMPI 1 r0
JNE r6 endPacmanStateUpdate //if timer was not active, do not update state.
// //else, continue on to update pacman state:
//
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::GET CURRENT STATE ADDRESS::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CURRENT STATE state address 13201, store address in r4
LUI 51 r4
ORI 145 r4 //store address in r4
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::ZERO STATES::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//
// If in a ZERO state:
// check if on a ghost, if so die.
// otherwise, check player input in all directions and start MOVIng.
// if player has made no input selections, keep going in current direction.
// CHECK IF PACMAN HIT GHOST: (Any ghost position is on pacmans square)
// if hit, set nextstate to dead,
// jump to reset timer to progress to next state.
//
// if position = AnyGhostPosition
// nextstate = pacmanDEAD1
// JUC endPacmanState_SetTimer
//Check if in a '0' state:
LOAD r1 r4 //read current state, address in r4
MOV r1 r0 //copy STATE into temp register.
ANDI 15 r0 //mask it by ANDing it with 0xF (15)
CMPI 0 r0 //if masked value is not zero, check if it is in another state
JNE r6 UpStates //by branching to the next comparison, to check if it is an upstate
//check if up/down controls are pushed:
state0_updown:
JAL r6 CheckUP //CheckUP is a function that checks if controller up button is pushed
MOV r0 r1 //store the result of checkup in r1
JAL r6 CheckDOWN //CheckDOWN is a function that checks if controller down button is pushed
CMP r0 r1 //compare the results of both checkup and checkdown, by comparing r1 and r0
BEQ state0_leftright //if controller UP/DOWN are pushed together, input could be left or right
CMPI 1 r0 //Else, check if down was pushed. r0 will be 1 if down was pushed
BEQ pacmanTryMoveDOWN
BUC pacmanTryMoveUP
//check if left/right controls are pushed:
state0_leftright:
JAL r6 CheckRIGHT //CheckLEFT is a function that checks if controller up button is pushed
MOV r0 r1 //store the result of checkLEFT in r1
JAL r6 CheckLEFT //CheckRIGHT is a function that checks if controller right button is pushed
CMP r0 r1 //compare the results of both checkup and checkdown, by comparing r1 and r0
BEQ state0_NoInput //if controller LEFT/RIGHT are pushed together and up/down was not processed exclusively, entire dpad pushed
CMPI 1 r0 //Else, check if RIGHT was pushed. r0 will be 1 if right was pushed
BEQ pacmanTryMoveLEFT
BUC pacmanTryMoveRIGHT
state0_NoInput:
LOAD r1 r4 //load state
CMPI 16 r1 //check if in up0 state.
BEQ pacmanMoveUP //if not in up0 state, check if in down0 state
CMPI 32 r1 //check if in down0 state.
BEQ pacmanMoveDOWN //if not in down0 state, check if in left0 state, else:
CMPI 48 r1 //check if in left0 state.
BEQ pacmanMoveLEFT
CMPI 64 r1 //check if in right0 state.
BEQ pacmanMoveRIGHT //if not in right0 state, do not update state.
JUC r6 endPacmanState_SetTimer
pacmanMoveUP:
JAL r6 pacman_isWallUP
CMPI 1 r0 //check if wall is above
JEQ r6 endPacmanState_SetTimer //if there is wall, do not update state, reset timer. else:
MOV r4 r0 // move state address to r0 to prepare for setStateUP call
JAL r6 setStateUP1 // set pacman state to up1
JUC r6 endPacmanState_SetTimer
pacmanMoveDOWN:
JAL r6 pacman_isWallDOWN
CMPI 1 r0 //check if wall is below
JEQ r6 endPacmanState_SetTimer //if there is wall, do not update state, reset timer. else:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN1 // set pacman state
JUC r6 endPacmanState_SetTimer
pacmanMoveLEFT:
JAL r6 pacman_isWallLEFT
CMPI 1 r0 //check if wall is left
JEQ r6 endPacmanState_SetTimer //if there is wall, do not update state, reset timer. else:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT1 // set pacman state to left1
JUC r6 endPacmanState_SetTimer
pacmanMoveRIGHT:
JAL r6 pacman_isWallRIGHT
CMPI 1 r0 //check if wall is right
JEQ r6 endPacmanState_SetTimer //if there is wall, do not update state, reset timer. else:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT1 // set pacman state
JUC r6 endPacmanState_SetTimer
pacmanTryMoveUP:
JAL r6 pacman_isWallUP
CMPI 1 r0 //check if wall is above
JEQ r6 state0_NoInput
MOV r4 r0 // move state address to r0 to prepare for setStateUP call
JAL r6 setStateUP1 // set pacman state to up1
JUC r6 endPacmanState_SetTimer
pacmanTryMoveDOWN:
JAL r6 pacman_isWallDOWN
CMPI 1 r0 //check if wall is below
JEQ r6 state0_NoInput
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN1 // set pacman state
JUC r6 endPacmanState_SetTimer
pacmanTryMoveLEFT:
JAL r6 pacman_isWallLEFT
CMPI 1 r0 //check if wall is left
JEQ r6 state0_NoInput
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT1 // set pacman state to left1
JUC r6 endPacmanState_SetTimer
pacmanTryMoveRIGHT:
JAL r6 pacman_isWallRIGHT
CMPI 1 r0 //check if wall is right
JEQ r6 state0_NoInput
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT1 // set pacman state
JUC r6 endPacmanState_SetTimer
////:::::::::::::::::::::::End Zero States::::::::::::::::::::::::::
UpStates:
//if we are traveling up and not centered on a tile, we will
//continue to travel up, thus only the down button must be checked.
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanUP1:::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanUP1:
LOAD r1 r4 //read current state, address in r4
CMPI 17 r1 //if state is pacmanUP1
BNE pacmanUP2
JAL r6 CheckDOWN //check if down control is pushed
CMPI 1 r0
BNE UP1Cont
UP1Rev:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN0 // set pacman state
JUC r6 endPacmanState_SetTimer
UP1Cont:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP2 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanUP2:::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanUP2:
LOAD r1 r4 //read current state, address in r4
CMPI 18 r1 //if state is pacmanUP2
BNE pacmanUP3
JAL r6 CheckDOWN //check if down control is pushed
CMPI 1 r0
BNE UP2Cont
//if button isnt pushed, skip to up2cont otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN3 // set pacman state
JUC r6 endPacmanState_SetTimer
UP2Cont:
LUI 51 r0 //update pacman position by making position address in r0
ORI 144 r0
LOAD r1 r0 //then getting it in r1
ADDI 53 r1 //adding one
STOR r1 r0 //and storing back to position address in r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP3 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanUP3:::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanUP3:
LOAD r1 r4 //read current state, address in r4
CMPI 19 r1 //if state is pacmanUP3
BNE pacmanDOWN1
//set spot in FBCPY to a blank glyph.
LUI 51 r1 //make address 13200 where pacman location is stored
ORI 144 r1
LOAD r1 r1
JAL r6 FBpos_2_CPpos
MOVI 0 r0
STOR r0 r1
JAL r6 CheckDOWN //check if down control is pushed
CMPI 1 r0
BNE UP3Cont
//if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN2 // set pacman state
JUC r6 endPacmanState_SetTimer
UP3Cont:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP0 // set pacman state
JUC r6 endPacmanState_SetTimer
//:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
DownStates:
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanDOWN1:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanDOWN1:
LOAD r1 r4 //read current state, address in r4
CMPI 33 r1 //if state is pacmanDOWN1
BNE pacmanDOWN2
JAL r6 CheckUP //check if control is pushed
CMPI 1 r0
BNE D1C
//if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP0 // set pacman state
JUC r6 endPacmanState_SetTimer
D1C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN2 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanDOWN2:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanDOWN2:
LOAD r1 r4 //read current state, address in r4
CMPI 34 r1 //if state is pacmanDOWN2
BNE pacmanDOWN3
JAL r6 CheckUP //check if control is pushed
CMPI 1 r0
BNE D2C
//if button isnt pushed, skip down 9 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP3 // set pacman state //and storing back to position address in r0
JUC r6 endPacmanState_SetTimer
D2C:
LUI 51 r0 //update pacman position by making position address in r0
ORI 144 r0
LOAD r1 r0 //then getting it in r1
ADDI -53 r1 //adding one
STOR r1 r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN3 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanDOWN3:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanDOWN3:
LOAD r1 r4 //read current state, address in r4
CMPI 35 r1 //check state
BNE pacmanLEFT1 //
//set spot in FBCPY to a blank glyph.
LUI 51 r1 //make address 13200 where pacman location is stored
ORI 144 r1
LOAD r1 r1
JAL r6 FBpos_2_CPpos
MOVI 0 r0
STOR r0 r1
JAL r6 CheckUP //check if down control is pushed
CMPI 1 r0
BNE D3C
//if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP2 // set pacman state
JUC r6 endPacmanState_SetTimer
D3C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN0 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
LeftStates:
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanLEFT1:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanLEFT1:
LOAD r1 r4 //read current state, address in r4
CMPI 49 r1 //check state
BNE pacmanLEFT2
JAL r6 CheckRIGHT //check if control is pushed
CMPI 1 r0
BNE L1C //if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT0 // set pacman state
JUC r6 endPacmanState_SetTimer
L1C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT2 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanLEFT2:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanLEFT2:
LOAD r1 r4 //read current state, address in r4
CMPI 50 r1 //check state
BNE pacmanLEFT3
JAL r6 CheckRIGHT //check if control is pushed
CMPI 1 r0
BNE L2C
//if button isnt pushed, skip down 9 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT3 // set pacman state
JUC r6 endPacmanState_SetTimer
L2C:
LUI 51 r0 //update pacman position by making position address in r0
ORI 144 r0
LOAD r1 r0 //then getting it in r1
ADDI 1 r1 //adding one
JAL r6 SetPosition_WarpLeftSide //setting it to either its position or the 'warp' position.
STOR r1 r0 //and storing back to position address in r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT3 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanLEFT3:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanLEFT3:
LOAD r1 r4 //read current state, address in r4
CMPI 51 r1 //check state
BNE pacmanRIGHT1 //
//set spot in FBCPY to a blank glyph.
LUI 51 r1 //make address 13200 where pacman location is stored
ORI 144 r1
LOAD r1 r1
JAL r6 FBpos_2_CPpos
MOVI 0 r0
STOR r0 r1
JAL r6 CheckRIGHT //check if down control is pushed
CMPI 1 r0
BNE L3C
//if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT2 // set pacman state
JUC r6 endPacmanState_SetTimer
L3C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT0 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
RightStates:
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanRIGHT1:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanRIGHT1:
LOAD r1 r4 //read current state, address in r4
CMPI 65 r1 //check state
BNE pacmanRIGHT2
JAL r6 CheckLEFT //check if control is pushed
CMPI 1 r0
BNE R1C //if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT0 // set pacman state
JUC r6 endPacmanState_SetTimer
R1C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT2 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanRIGHT2::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanRIGHT2:
LOAD r1 r4 //read current state, address in r4
CMPI 66 r1 //check state
BNE pacmanRIGHT3
JAL r6 CheckLEFT //check if control is pushed
CMPI 1 r0
BNE R2C //if button isnt pushed, skip down 9 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT3 // set pacman state
JUC r6 endPacmanState_SetTimer
R2C:
LUI 51 r0 //update pacman position by making position address in r0
ORI 144 r0
LOAD r1 r0 //then getting it in r1
ADDI -1 r1 //adding one
JAL r6 SetPosition_WarpRightSide //set position to warped side or current position.
STOR r1 r0 //and storing back to position address in r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT3 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::pacmanRIGHT3:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
pacmanRIGHT3:
LOAD r1 r4 //read current state, address in r4
CMPI 67 r1 //check state
BNE pacmanDEAD1 //
//set spot in FBCPY to blank the glyph.
LUI 51 r1 //make address 13200 where pacman location is stored
ORI 144 r1
LOAD r1 r1
JAL r6 FBpos_2_CPpos
MOVI 0 r0
STOR r0 r1
JAL r6 CheckLEFT //check if LEFT control is pushed
CMPI 1 r0
BNE R3C
//if button isnt pushed, skip down 4 lines, otherwise do the following:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT2 // set pacman state
JUC r6 endPacmanState_SetTimer
R3C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT0 // set pacman state
JUC r6 endPacmanState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
DeadStates:
pacmanDEAD1:
LOAD r1 r4 //read current state, address in r4
CMPI 1 r1 //if state is pacmanDEAD1
BNE pacmanDEAD2 //
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDEAD2 // set pacman state
JUC r6 endPacmanState_SetTimer
pacmanDEAD2:
LOAD r1 r4 //read current state, address in r4
CMPI 1 r1 //if state is pacmanDEAD1
BNE pacmanDEAD3 //
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDEAD3 // set pacman state
JUC r6 endPacmanState_SetTimer
pacmanDEAD3:
LOAD r1 r4 //read current state, address in r4
CMPI 1 r1 //if state is pacmanDEAD1
BNE pacmanDEAD4 //
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDEAD4 // set pacman state
JUC r6 endPacmanState_SetTimer
pacmanDEAD4:
MOV r4 r0 // //default case, move state address to r0 to prepare for setState call
JAL r6 setStateLEFT0 // set pacman state
JUC r6 endPacmanState_SetTimer
LUI 51 r0 //update pacman position by making position address in r0
ORI 144 r0
LOAD r1 r0 //then getting it in r1
ADDI 1 r1 //adding one
STOR r1 r0 //and storing back to position address in r0
endPacmanState_SetTimer:
LUI 255 r0 //make timer reset address
ORI 243 r0
MOVI 55 r1 //set 512+256 miliseconds on timer //TIMER SET
STOR r1 r0
endPacmanStateUpdate:
MOV r14 r15 //restore old return adress
RETX //return
PACMAN_DRAW_GLYPH:
//pacman's draw glyph
//
// if opentimer == 1
// load open timer
// open timer in 65510
//make of timer address in r1
LUI 255 r1
ORI 230 r1
LOAD r1 r1 //store result back in r1
//r2 has the mouth condition address
LUI 51 r2
ORI 146 r2
LOAD r4 r2
//check to see if timer is 1
CMPI 1 r1
//check condition code
BNE AFTER_MOUTH_TOGGLE
//if timer is 1, invert the mouth condition
//get the value of the mouth condition
XORI 1 r4 //MOUTH POSITION IN r4
//store back in memory
STOR r4 r2
//after toggling, reset timer to toggle again next time it activates: //added mouth toggle timer reset~!
LUI 255 r1
ORI 231 r1
LUI 1 r2
STOR r2 r1 //store 250 ms on timer. //TIMER SET MOUTH
AFTER_MOUTH_TOGGLE:
//MOUTH POSITION IN r4 //cleaned up register usage a bit
//MAKE PACMAN LOCATION ADDRESS IN r2
LUI 51 r2
ORI 144 r2
//MAKE PACMAN STATE ADDRESS IN r3
LUI 51 r3
ORI 145 r3
//load location of pacman INTO r0
LOAD r0 r2
//CHECK IF STATE UP0
drawUP0:
load r5 r3
CMPI 16 r5
BNE drawUP1 //else check if in state UP1
//check the condition of the mouth
//if open
CMPI 1 R4
BNE CLOSED_STATE_UP0
MOV r0 r1
LUI 1 r0 //load PACMAN_OPEN_UP_0
ORI 8 r0
STOR r0 r1
ADDI -53 r1 //get location below pacman
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1 //store the glyph back in.
RETX
CLOSED_STATE_UP0:
MOV r0 r1
LUI 0 r0 //load PACMAN_CLOSED_UP_0
ORI 212 r0
STOR r0 r1
ADDI -53 r1 //get location below pacman
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//CHECK IF STATE UP1
drawUP1:
LOAD R5 R3
CMPI 17 r5
BNE drawUP2 //else check if in state UP2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_UP1
//GET PACMAN_OPEN_6...GLYPH NUM 270
MOV r0 r1
MOVI 255 r0
ADDI 15 R0 //R1 SHOULD BE 270 NOW
STOR R0 R1 //LOAD GLYPH INTO POSITION
ADDI 53 R1 // GET POSITION ABOVE PACMAN
//NOW NEED TO LOAD PACMAN_OPEN_UP5
//IT IS GLPYH NUM 269
MOVI 255 R0
ADDI 14 R0
STOR r0 r1 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_UP1:
//LOAD PACMAN_CLOSED_UP6
//IT'S GLYPH 218
MOVI 218 R1
STOR R1 R0 //LOAD INTO POSITION
ADDI 53 R0 // GET POSITION ABOVE PACMAN //fixed this, was negative, needed positive
//NOW NEED TO LOAD PMANCLOSED_UP_5
//IT'S GLYPH 217
MOVI 217 R1
STOR R1 R0 //LOAD INTO POSITION
RETX
//CHECK IF STATE UP2
drawUP2:
LOAD R5 R3
CMPI 18 r5
BNE drawUP3 //else check if in state UP3
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_UP2
//GET PMANOPEN_UP_4
//THIS IS GLYPH 268
MOVI 255 r1
ADDI 13 R1 //R1 SHOULD BE 268 NOW
STOR R1 R0 //LOAD INTO POSITION
ADDI 53 R0 // GET POSITION ABOVE PACMAN
//NOW NEED TO LOAD PMANOPEN_Up_3
//ITS IN LOCATION 267
MOVI 255 R1
ADDI 12 R1
STOR r1 r0 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_UP2:
//LOAD PMANCLOSED_Up_4 //are these right?
//IT'S GLYPH 216
MOVI 216 R1
STOR R1 R0 //LOAD INTO POSITION
ADDI 53 R0 // GET POSITION ABOVE PACMAN
//NOW NEED TO LOAD PMANCLOSED_Up_3
//IT'S GLYPH 215
MOVI 215 R1 ///wait what?
STOR R1 R0 //LOAD INTO POSITION
RETX
//CHECK IF STATE UP3
drawUP3:
LOAD R5 R3
CMPI 19 r5
BNE drawDOWN0 //else check if in state drawDOWN0
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_UP3
//GET PMANOPEN_Up_1
//THIS IS GLYPH 265
MOVI 255 r1
ADDI 10 R1 //R1 SHOULD BE 265 NOW
STOR R1 R0 //LOAD POSITION
ADDI -53 R0 // GET POSITION BELOW PACMAN
//NOW NEED TO PMANOPEN_Up_2
//ITS IN LOCATION 266
MOVI 255 R1
ADDI 11 R1 //R1 SHOULD BE 266
STOR r1 r0 //STORE POSITION BELOW PACMAN
RETX
CLOSED_STATE_UP3:
//LOAD PMANCLOSED_Up_1
//IT'S GLYPH 213
MOVI 213 R1 //wait what?
STOR R1 R0 //LOAD INTO POSITION
ADDI -53 R0 // GET POSITION BELOW PACMAN
//NOW NEED TO LOAD PMANCLOSED_Up_2
//IT'S GLYPH 266
MOVI 255 r1
ADDI 11 r1 //R1 should be 266
STOR r1 r0 //STORE POSITION BELOW PACMAN
RETX
//COPY AND PASTING FROM STATE 1
//CHECK IF STATE DOWN0
drawDOWN0:
LOAD R5 R3
CMPI 32 r5
BNE drawDOWN1 //else check if in state UP1
//check the condition of the mouth
//if open
CMPI 1 R4
BNE CLOSED_STATE_DOWN0
//load PMANOPEN_DOWN_0
MOV r0 r1
//GLYPH 219
MOVI 219 R0
STOR r0 r1
ADDI 53 r1 //get location ABOVE pacman
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
CLOSED_STATE_DOWN0:
MOV r0 r1
LUI 0 r0 //load PMANCLOSED_DOWN_0
// GLYPH 179
MOVI 179 R0
STOR r0 r1
ADDI 53 r1 //get location ABOVE pacman
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//CHECK IF STATE DOWN1
drawDOWN1:
LOAD R5 R3
CMPI 33 r5
BNE drawDOWN2 //else check if in state DOWN2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_DOWN1
//GET PMANOPEN_Down_1...in GLYPH 220
MOVI 220 r1
STOR R1 R0 //LOAD POSITION
ADDI -53 R0 // GET POSITION BELOW PACMAN
//NOW NEED TO LOAD PMANOPEN_Down_2
//ITS IN LOCATION 221
MOVI 221 R1
STOR r1 r0 //STORE POSITION BELOW PACMAN
RETX
CLOSED_STATE_DOWN1:
//LOAD PMANCLOSED_Down_1
//IT'S GLYPH 180
MOVI 180 R1
STOR R1 R0 //LOAD INTO POSITION
ADDI -53 R0 // GET POSITION BELOW PACMAN
//NOW NEED TO LOAD PMANCLOSED_Down_2
//IT'S GLYPH 181
MOVI 181 R1
STOR R1 R0 //LOAD INTO POSITION
RETX
//CHECK IF STATE DOWN2
drawDOWN2:
LOAD R5 R3
CMPI 34 r5
BNE drawDOWN3 //else check if in state DOWN2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_DOWN2
//GET PMANOPEN_DOWN_3
//THIS IS GLYPH 222
MOVI 222 r1
STOR R1 R0 //LOAD POSITION
ADDI -53 R0 // GET POSITION BELOW PACMAN
//NOW NEED TO LOAD PMANOPEN_Down_4
//ITS IN LOCATION 223
MOVI 223 R1
STOR r1 r0 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_DOWN2:
//LOAD PMANCLOSED_DOWN_3
//IT'S GLYPH 182
MOVI 182 R1
STOR R1 R0 //LOAD INTO POSITION
ADDI -53 R0 // GET POSITION BELOW PACMAN
//NOW NEED TO LOAD PMANCLOSE_Down_4
//IT'S GLYPH 183
MOVI 183 R1
STOR R1 R0 //LOAD INTO POSITION
RETX
//CHECK IF STATE DOWN3
drawDOWN3:
LOAD R5 R3
CMPI 35 r5
BNE drawLEFT0 //else check if in state drawDOWN0
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_DOWN3
//GET PMANOPEN_Down_6
//THIS IS GLYPH 225
MOVI 225 r1
STOR R1 R0 //LOAD POSITION
ADDI 53 R0 // GET POSITION ABOVE PACMAN
//NOW NEED TO PMANOPEN_Down_5
//ITS IN LOCATION 224
MOVI 224 R1
STOR r1 r0 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_DOWN3:
//LOAD PMANCLOSED_Down_6
//IT'S GLYPH 185
MOVI 185 R1
STOR R1 R0 //LOAD INTO POSITION
ADDI 53 R0 // GET POSITION ABOVE PACMAN
//NOW NEED TO LOAD PMANOPEN_Down_5 (SAME AS PMANCLOSED)
//IT'S GLYPH 224
MOVI 224 R1 //is this right? i guess its same as pmanclosed?
STOR r1 r0 //STORE POSITION ABOVE PACMAN
RETX
// COPY AND PASTED FROM DOWN STATES
//CHECK IF STATE LEFT0
drawLEFT0:
LOAD R5 R3
CMPI 48 r5
BNE drawLEFT1 //else check if in state LEFT1
//check the condition of the mouth
//if open
CMPI 1 R4
BNE CLOSED_STATE_LEFT0
//load PMANOPEN_LEFT_0
//GLYPH 226
MOV r0 r1
MOVI 226 R0
STOR r0 r1
ADDI -1 r1 //get location TO THE RIGHT
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
CLOSED_STATE_LEFT0:
MOV r0 r1
LUI 0 r0 //load PMANCLOSED_LEFT_0
// GLYPH 186
MOVI 186 R0
STOR r0 r1
ADDI -1 r1 //get location TO THE RIGHT
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//CHECK IF STATE LEFT1
drawLEFT1:
LOAD R5 R3
CMPI 49 r5
BNE drawLEFT2 //else check if in state LEFT2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_LEFT1
//GET PMANOPEN_Left_6...in GLYPH 232
MOV r0 r1
MOVI 232 r0
STOR R0 R1 //LOAD POSITION
ADDI 1 R1 //GET POSITION TO THE LEFT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
//NOW NEED TO PMANOPEN_Left_5
//ITS IN LOCATION 231
MOVI 231 R0
STOR r0 r1 //STORE POSITION BELOW PACMAN
RETX
CLOSED_STATE_LEFT1:
//LOAD PMANCLOSED_Left_6
//IT'S GLYPH 192
MOV r0 r1
MOVI 192 R0
STOR R0 R1 //LOAD INTO POSITION
ADDI 1 R1 // GET POSITION TO THE LEFT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
//NOW NEED TO LOAD PMANCLOSED_Left_5
//IT'S GLYPH 191
MOVI 191 R0
STOR R0 R1 //LOAD INTO POSITION
RETX
//CHECK IF STATE LEFT2
drawLEFT2:
LOAD R5 R3
CMPI 50 r5
BNE drawLEFT3 //else check if in state LEFT2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_LEFT2
//GET PMANOPEN_Left_4
//THIS IS GLYPH 230
MOV R0 R1
MOVI 230 r0
STOR R0 R1 //LOAD POSITION
ADDI 1 R1 // GET POSITION TO THE LEFT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
//NOW NEED TO LOAD PMANOPEN_Left_3
//ITS IN LOCATION 229
MOVI 229 R0
STOR r0 r1 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_LEFT2:
//LOAD PMANCLOSED_Left_4
//IT'S GLYPH 190
MOV R0 R1
MOVI 190 R0
STOR R0 R1 //LOAD INTO POSITION
ADDI 1 R1 // GET POSITION BELOW PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
//NOW NEED TO LOAD PMANCLOSED_Left_3
//IT'S GLYPH 189
MOVI 189 R0
STOR R0 R1 //LOAD INTO POSITION
RETX
//CHECK IF STATE LEFT3
drawLEFT3:
LOAD R5 R3
CMPI 51 r5
BNE drawRIGHT0 //else check if in state drawRIGHT0
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_LEFT3
//GET PMANOPEN_Left_1
//THIS IS GLYPH 227
MOV r0 r1
MOVI 227 r0
STOR R0 R1 //LOAD POSITION
ADDI -1 R1 // GET POSITION TO THE RIGHT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
//NOW NEED TO PMANOPEN_Left_2
//ITS IN LOCATION 228
MOVI 228 R0
STOR r0 r1 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_LEFT3:
//LOAD PMANCLOSED_Left_1
//IT'S GLYPH 187
MOV r0 r1
MOVI 187 R0
STOR R0 R1 //LOAD INTO POSITION
ADDI -1 R1 // GET POSITION TO THE RIGHT PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
//NOW NEED TO LOAD PMANCLOSED_Left_2 (SAME AS PMANCLOSED)
//IT'S GLYPH 188
MOVI 188 R0
STOR r0 r1 //STORE POSITION ABOVE PACMAN
RETX
// COPY AND PASTE FROM LEFT
//CHECK IF STATE RIGHT0
drawRIGHT0:
LOAD R5 R3
CMPI 64 r5
BNE drawRIGHT1 //else check if in state RIGHT1
//check the condition of the mouth
//if open
CMPI 1 R4
BNE CLOSED_STATE_RIGHT0
//load PMANOPEN_RIGHT_0
//GLYPH 245
MOV R0 R1
MOVI 245 R0
STOR r0 r1
ADDI 1 r1 //get location TO THE LEFT
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
CLOSED_STATE_RIGHT0:
MOV R0 R1
LUI 0 r0 //load PMANCLOSED_RIGHT_0
// GLYPH 205
MOVI 205 R0
STOR r0 r1
ADDI 1 r1 //get location TO THE LEFT
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//CHECK IF STATE RIGHT1
drawRIGHT1:
LOAD R5 R3
CMPI 65 r5
BNE drawRIGHT2 //else check if in state RIGHT2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_RIGHT1
//GET PMANOPEN_Right_1...in GLYPH 246
MOV r0 r1
MOVI 246 r0
STOR R0 R1 //LOAD POSITION
ADDI -1 R1 // GET POSITION TO THE RIGHT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
//NOW NEED TO PMANOPEN_Right_2
//ITS IN LOCATION 247
MOVI 247 R0
STOR r0 r1 //STORE POSITION BELOW PACMAN
RETX
CLOSED_STATE_RIGHT1:
//LOAD PMANCLOSED_Right_1
//IT'S GLYPH 206
MOV r0 r1
MOVI 206 R0
STOR R0 R1 //LOAD INTO POSITION
ADDI -1 R1 // GET POSITION TO THE RIGHT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
//NOW NEED TO LOAD PMANCLOSED_Right_2
//IT'S GLYPH 207
MOVI 207 R0
STOR R0 R1 //LOAD INTO POSITION
RETX
//CHECK IF STATE RIGHT2
drawRIGHT2:
LOAD R5 R3
CMPI 66 r5
BNE drawRIGHT3 //else check if in state RIGHT2
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_RIGHT2
//GET PMANOPEN_Right_3
//THIS IS GLYPH 248
MOV R0 R1
MOVI 248 r0
STOR R0 R1 //LOAD POSITION
ADDI -1 R1 // GET POSITION TO THE RIGHT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
//NOW NEED TO LOAD PMANOPEN_Right_4
//ITS IN LOCATION 249
MOVI 249 R0
STOR R0 R1 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_RIGHT2:
//LOAD PMANCLOSED_Right_3
//IT'S GLYPH 208
MOV R0 R1 //swap registers so function to setposition_warpright call will work...... I hope....
MOVI 208 R0
STOR R0 R1 //LOAD INTO POSITION
ADDI -1 R1 // GET POSITION TO THE RIGHT PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
//NOW NEED TO LOAD PMANCLOSED_Right_4
//IT'S GLYPH 209
MOVI 209 R0
STOR R0 R1 //LOAD INTO POSITION
RETX
//CHECK IF STATE RIGHT3
drawRIGHT3:
LOAD R5 R3
CMPI 67 r5
BNE drawDEAD1 //else check if in state drawRIGHT0
//CHECK CONDITION OF MOUTH
//IF OPEN
CMPI 1 R4
BNE CLOSED_STATE_RIGHT3
//GET PMANOPEN_Right_6
//THIS IS GLYPH 251
MOV r0 r1
MOVI 251 r0
STOR R0 R1 //LOAD POSITION
ADDI 1 R1 // GET POSITION TO THE LEFT OF PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
//NOW NEED TO PMANOPEN_Right_5
//ITS IN LOCATION 250
MOVI 250 R0
STOR r0 r1 //STORE POSITION ABOVE PACMAN
RETX
CLOSED_STATE_RIGHT3:
//LOAD PMANCLOSED_Right_6
//IT'S GLYPH 211
MOV r0 r1
MOVI 211 R0
STOR R0 R1 //LOAD INTO POSITION
ADDI 1 R1 // GET POSITION TO THE LEFT PACMAN
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
//NOW NEED TO LOAD PMANCLOSED_Right_5 (SAME AS PMANCLOSED)
//IT'S GLYPH 210
MOVI 210 R0
STOR r0 r1 //STORE POSITION ABOVE PACMAN
RETX
drawDEAD1:
ADD r0 r0
RETX
INIT_PACMAN:
LUI 255 r0 //make timer reset address
ORI 243 r0
LUI 4 r1 //set 512+256 miliseconds on timer //TIMER SET
STOR r1 r0
//set pacman state to left0
LUI 51 r4
ORI 145 r4
MOVI 48 r1
STOR r1 r4
//set pacman initial mouth toggle to 1
LUI 51 r4
ORI 146 r4
MOVI 1 r1
STOR r1 r4
//set pacman mouth toggle timer
LUI 255 r1
ORI 231 r1
MOVI 250 r2
STOR r2 r1 //store 250 ms on timer. //TIMER SET
//put pacman on initial spot in map
LUI 51 r4
ORI 144 r4 //store address in r4
LUI 63 r1 # make address for top corner in frame buffer
ORI 255 r1
MOVI 53 r8
MULI -28 r8
ADD r8 r1 # Offset by rows
ADDI -26 r1 # Offset by columns
STOR R1 r4
//initialize lives left
LUI 51 r4 //lives left addr
ORI 244 r4 //lives left addr
MOVI 4 r0
STOR r0 r4
MOV r15 r14
JAL r6 drawLivesLeft
MOV r14 r15
RETX
pacman_isWallUP:
LUI 51 r0 //make address 13200 where pacman location is stored
ORI 144 r0
LOAD r0 r0 //save result back into r0
ADDI 53 r0 //increment r0 to get location of square above pacman (53 adress spaces higher in memory)
LOAD r0 r0 // LOAD glyph number
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
pacman_isWallDOWN:
LUI 51 r0 //make address 13200 where pacman location is stored
ORI 144 r0
LOAD r0 r0 //save result back into r0
ADDI -53 r0 //increment r0 to get location of square below pacman (53 adress spaces lower in memory)
LOAD r0 r0 // LOAD glyph number
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
pacman_isWallLEFT:
LUI 51 r0 //make address 13200 where pacman location is stored
ORI 144 r0
LOAD r0 r0 //save result back into r0
ADDI 1 r0 //increment r0 to get location of square left of pacman (1 space higher in memory)
LOAD r0 r0 // LOAD glyph number
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
pacman_isWallRIGHT:
LUI 51 r0 //make address 13200 where pacman location is stored
ORI 144 r0
LOAD r0 r0 //save result back into r0
ADDI -1 r0 //increment r0 to get location of square right of pacman (1 space lower in memory)
LOAD r0 r0
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
//:::::::::::::END PACMAN STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::END PACMAN STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::END PACMAN STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::BEGIN GreenGhost STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::BEGIN GreenGhost STATE MACHINE::::::::::::::::::::::::::
//:::::::::::::BEGIN GreenGhost STATE MACHINE::::::::::::::::::::::::::
/////THIS FUNCTION UPDATES STATEMACHINE BY ONE STEP.
//
// The first thing it does is check the timer. If the timer is not active, it immediately leaves.
// Otherwise:
// check what state GreenGhost is in
// check controller input accordingly,
// update state & position variables
// reset timer
//
GreenGhost_UPDATE_STATE:
MOV r15 r14 //store old return adress
LUI 255 r0 //check timer by making address
ORI 240 r0
LOAD r0 r0 //then loading its value and cmp to 1
CMPI 1 r0
JNE r6 endGreenGhostStateUpdate //if timer was not active, do not update state.
// //else, continue on to update GreenGhost state:
//
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::GET CURRENT STATE ADDRESS::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CURRENT STATE state address 12801, store address in r4
LUI 50 r4
ORI 1 r4 //store address in r4
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::ZERO STATES::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//
// If in a ZERO state:
// check if on a ghost, if so die.
// otherwise, check player input in all directions and start MOVIng.
// if player has made no input selections, keep going in current direction.
// CHECK IF GreenGhost HIT GHOST: (Any ghost position is on GreenGhosts square)
// if hit, set nextstate to dead,
// jump to reset timer to progress to next state.
//
// if position = AnyGhostPosition
// nextstate = GreenGhostDEAD1
// JUC endGreenGhostState_SetTimer
//Check if in a '0' state:
LOAD r1 r4 //read current state, address in r4
MOV r1 r0 //copy STATE into temp register.
ANDI 15 r0 //mask it by ANDing it with 0xF (15)
CMPI 0 r0 //if masked value is not zero, check if it is in another state
JNE r6 GGUpStates //by branching to the next comparison, to check if it is an upstate
//IN A ZERO STATE:
LUI 50 r1
ORI 10 r1
MOVI 0 r2
STOR r2 r1 //zero up
ADDI 1 r1
STOR r2 r1 //zero down
ADDI 1 r1
STOR r2 r1 //zero left
ADDI 1 r1
STOR r2 r1 //zero right
LUI 50 r1
ORI 20 r1
STOR r2 r1 //zero vert heur
ADDI 1 r1
STOR r2 r1 //zero horiz heur
LOAD r1 r4 //load state into r1
CMPI 16 r1 //check if in up0 state.
BEQ GG_StateUP0 //if not in up0 state, check if in down0 state
CMPI 32 r1 //check if in down0 state.
BEQ GG_StateDOWN0 //if not in down0 state, check if in left0 state, else:
CMPI 48 r1 //check if in left0 state.
BEQ GG_StateLEFT0
CMPI 64 r1 //check if in right0 state.
BEQ GG_StateRIGHT0 //if not in right0 state, do not update state.
GG_StateUP0:
LUI 50 r1
ORI 10 r1
MOVI 150 r2 //save UP heur as 150
STOR r2 r1
BUC GG_WallCheckUP
GG_StateDOWN0:
LUI 50 r1
ORI 11 r1
MOVI 150 r2 //save DOWN heur as 150
STOR r2 r1
BUC GG_WallCheckUP
GG_StateLEFT0:
LUI 50 r1
ORI 12 r1
MOVI 150 r2 //save LEFT heur as 150
STOR r2 r1
BUC GG_WallCheckUP
GG_StateRIGHT0:
LUI 50 r1
ORI 13 r1
MOVI 150 r2 //save RIGHT heur as 150
STOR r2 r1
GG_WallCheckUP:
JAL r6 GreenGhost_isWallUP
CMPI 1 r0
BNE GG_WallCheckDOWN
LUI 50 r1
ORI 10 r1
MOVI 200 r0 //SAVE UP HEUR AS 200
STOR r0 r1
GG_WallCheckDOWN:
JAL r6 GreenGhost_isWallDOWN
CMPI 1 r0
BNE GG_WallCheckLEFT
LUI 50 r1
ORI 11 r1
MOVI 200 r0 //SAVE down HEUR AS 200
STOR r0 r1
GG_WallCheckLEFT:
JAL r6 GreenGhost_isWallLEFT
CMPI 1 r0
BNE GG_WallCheckRIGHT
LUI 50 r1
ORI 12 r1
MOVI 200 r0 //SAVE left HEUR AS 200
STOR r0 r1
GG_WallCheckRIGHT:
JAL r6 GreenGhost_isWallRIGHT
CMPI 1 r0
BNE GreenGhost_findTarget
LUI 50 r1
ORI 13 r1
MOVI 200 r0 //SAVE right HEUR AS 200
STOR r0 r1
GreenGhost_findTarget:
LUI 51 r10 //load pman position
ORI 144 r10
LOAD r10 r10
ADDI 2 r10 //target location is 2 behind pman
LUI 50 r11 //load ghost position
LOAD r11 r11
SUB r10 r11 //r11 = r11 - r10
CMPI 0 r11
BLT GG_pman_is_ABOVEorLEFT
BGT GG_pman_is_BELOWorRIGHT
JUC r6 endGreenGhostState_SetTimer
GG_pman_is_ABOVEorLEFT:
MOVI 0 r9 //ROWS = r9
GG_loop1:
CMPI 0 r11
BGE GG_endLoop1
ADDI 53 r11
ADDI 1 r9
BUC GG_loop1
GG_endLoop1:
MOV r11 r8 //COLS = r8
BUC GG_CompareDistances
GG_pman_is_BELOWorRIGHT:
MOVI 0 r9
GG_loop2:
CMPI 0 r11
BLE GG_endLoop2
ADDI -53 r11
ADDI 1 r9
BUC GG_loop2
GG_endLoop2:
MULI -1 r11
MOV r11 r8
GG_CompareDistances:
CMP r8 r9
BGE GG_LR
LUI 50 r1
ORI 12 r1
LOAD r0 r1
ADDI 50 r0
STOR r0 r1
ADDI 1 r1
LOAD r0 r1
ADDI 50 r0
STOR r0 r1
BUC GG_findDirection
GG_LR:
LUI 50 r1
ORI 10 r1
LOAD r0 r1
ADDI 50 r0
STOR r0 r1
ADDI 1 r1
LOAD r0 r1
ADDI 50 r0
STOR r0 r1
GG_findDirection:
//load heuristics
LUI 50 r0
ORI 10 r0
LOAD r1 r0 //r1 = up heur
ADDI 1 r0
LOAD r2 r0 //r2 = down heur
ADDI 1 r0
LOAD r3 r0 //r3 = left heur
ADDI 1 r0
LOAD r4 r0 //r4 = right heur
MOVI 0 r5 //r5 = winner of up/down (1 means down was less)
MOVI 0 r6 //r6 = winner of left/right (1 means right was less)
CMP r1 r2
BGE GG_checkLR //if up <= down // DOWN GREATER OR EQUAL TO UP:
MOV r2 r1 //if up > down // DOWN LESS THAN UP
MOVI 1 r5 //1 means down was less
GG_checkLR:
CMP r3 r4
BGE GG_findWinner //if left <= right // RIGHT GREATER OR EQUAL TO LEFT:
MOV r4 r3 //if left > right // RIGHT LESS THAN UP
MOVI 1 r6 //1 means right eas less
GG_findWinner:
CMP r1 r3
BLE GG_GetHorizDirection //r3 is less than r1... HORIZ less than VERT
GG_GetVertDirection:
CMPI 0 r5
BEQ GG_GoUP
LUI 50 r0
ORI 1 r0
JAL r6 setStateDOWN1
JUC r6 endGreenGhostState_SetTimer
GG_GoUP:
LUI 50 r0
ORI 1 r0
JAL r6 setStateUP1
JUC r6 endGreenGhostState_SetTimer
GG_GetHorizDirection:
CMPI 0 r6
BEQ GG_GoLEFT
LUI 50 r0
ORI 1 r0
JAL r6 setStateRIGHT1
JUC r6 endGreenGhostState_SetTimer
GG_GoLEFT:
LUI 50 r0
ORI 1 r0
JAL r6 setStateLEFT1
JUC r6 endGreenGhostState_SetTimer
////:::::::::::::::::::::::End Zero States::::::::::::::::::::::::::
GGUpStates:
//if we are traveling up and not centered on a tile, we will
//continue to travel up, thus only the down button must be checked.
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostUP1:::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostUP1:
LOAD r1 r4 //read current state, address in r4
CMPI 17 r1 //if state is GreenGhostUP1
BNE GreenGhostUP2
//JAL r6 CheckDOWN //check if down control is pushed
//CMPI 1 r0
//BNE GGUP1Cont
//UP1Rev:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateDOWN0 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGUP1Cont:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP2 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostUP2:::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostUP2:
LOAD r1 r4 //read current state, address in r4
CMPI 18 r1 //if state is GreenGhostUP2
BNE GreenGhostUP3
//JAL r6 CheckDOWN //check if down control is pushed
//CMPI 1 r0
//BNE GGUP2Cont
////if button isnt pushed, skip to up2cont otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateDOWN3 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGUP2Cont:
LUI 50 r0 //update GreenGhost position by making position address in r0
LOAD r1 r0 //then getting it in r1
ADDI 53 r1 //adding one
STOR r1 r0 //and storing back to position address in r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP3 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostUP3:::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostUP3:
LOAD r1 r4 //read current state, address in r4
CMPI 19 r1 //if state is GreenGhostUP3
BNE GreenGhostDOWN1
//JAL r6 CheckDOWN //check if down control is pushed
//CMPI 1 r0
//BNE GGUP3Cont
////if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateDOWN2 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGUP3Cont:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateUP0 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//:::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GGDownStates:
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostDOWN1:::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostDOWN1:
LOAD r1 r4 //read current state, address in r4
CMPI 33 r1 //if state is GreenGhostDOWN1
BNE GreenGhostDOWN2
//JAL r6 CheckUP //check if control is pushed
//CMPI 1 r0
//BNE GGD1C
////if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateUP0 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGD1C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN2 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostDOWN2:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostDOWN2:
LOAD r1 r4 //read current state, address in r4
CMPI 34 r1 //if state is GreenGhostDOWN2
BNE GreenGhostDOWN3
//JAL r6 CheckUP //check if control is pushed
//CMPI 1 r0
//BNE GGD2C
////if button isnt pushed, skip down 9 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateUP3 // set GreenGhost state //and storing back to position address in r0
//JUC r6 endGreenGhostState_SetTimer
GGD2C:
LUI 50 r0 //update GreenGhost position by making position address in r0
LOAD r1 r0 //then getting it in r1
ADDI -53 r1 //adding one
STOR r1 r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN3 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostDOWN3:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostDOWN3:
LOAD r1 r4 //read current state, address in r4
CMPI 35 r1 //check state
BNE GreenGhostLEFT1 //
//JAL r6 CheckUP //check if down control is pushed
//CMPI 1 r0
//BNE GGD3C
////if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateUP2 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGD3C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateDOWN0 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GGLeftStates:
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostLEFT1:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostLEFT1:
LOAD r1 r4 //read current state, address in r4
CMPI 49 r1 //check state
BNE GreenGhostLEFT2
//JAL r6 CheckRIGHT //check if control is pushed
//CMPI 1 r0
//BNE GGL1C //if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateRIGHT0 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGL1C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT2 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostLEFT2:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostLEFT2:
LOAD r1 r4 //read current state, address in r4
CMPI 50 r1 //check state
BNE GreenGhostLEFT3
//JAL r6 CheckRIGHT //check if control is pushed
//CMPI 1 r0
//BNE GGL2C
////if button isnt pushed, skip down 9 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateRIGHT3 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGL2C:
LUI 50 r0 //update GreenGhost position by making position address in r0
LOAD r1 r0 //then getting it in r1
ADDI 1 r1 //adding one
JAL r6 SetPosition_WarpLeftSide //setting it to either its position or the 'warp' position.
STOR r1 r0 //and storing back to position address in r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT3 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostLEFT3:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostLEFT3:
LOAD r1 r4 //read current state, address in r4
CMPI 51 r1 //check state
BNE GreenGhostRIGHT1 //
//JAL r6 CheckRIGHT //check if down control is pushed
//CMPI 1 r0
//BNE GGL3C
////if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateRIGHT2 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGL3C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateLEFT0 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GGRightStates:
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostRIGHT1:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostRIGHT1:
LOAD r1 r4 //read current state, address in r4
CMPI 65 r1 //check state
BNE GreenGhostRIGHT2
//JAL r6 CheckLEFT //check if control is pushed
//CMPI 1 r0
//BNE GGR1C //if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateLEFT0 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGR1C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT2 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostRIGHT2::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostRIGHT2:
LOAD r1 r4 //read current state, address in r4
CMPI 66 r1 //check state
BNE GreenGhostRIGHT3
//JAL r6 CheckLEFT //check if control is pushed
//CMPI 1 r0
//BNE GGR2C //if button isnt pushed, skip down 9 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateLEFT3 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGR2C:
LUI 50 r0 //update GreenGhost position by making position address in r0
LOAD r1 r0 //then getting it in r1
ADDI -1 r1 //adding one
JAL r6 SetPosition_WarpRightSide //set position to warped side or current position.
STOR r1 r0 //and storing back to position address in r0
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT3 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::GreenGhostRIGHT3:::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhostRIGHT3:
LOAD r1 r4 //read current state, address in r4
CMPI 67 r1 //check state
BNE endGreenGhostState_SetTimer //
//JAL r6 CheckLEFT //check if LEFT control is pushed
//CMPI 1 r0
//BNE GGR3C
////if button isnt pushed, skip down 4 lines, otherwise do the following:
//MOV r4 r0 // move state address to r0 to prepare for setState call
//JAL r6 setStateLEFT2 // set GreenGhost state
//JUC r6 endGreenGhostState_SetTimer
GGR3C:
MOV r4 r0 // move state address to r0 to prepare for setState call
JAL r6 setStateRIGHT0 // set GreenGhost state
JUC r6 endGreenGhostState_SetTimer
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
endGreenGhostState_SetTimer:
LUI 255 r0 //make timer reset address
ORI 241 r0
MOVI 80 r1 //set 512+256 miliseconds on timer //TIMER SET
STOR r1 r0
endGreenGhostStateUpdate:
MOV r14 r15 //restore old return adress
RETX //return
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::GreenGhostDraw GLYPH:::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
GreenGhost_Draw_GLYPH:
//GreenGhost's GreenGhostDraw glyph
//check if not edible
// if not edible GreenGhostDraw normal
// if edible check flash state:
// if blue: GreenGhostDraw blue ghost
// if lblue: GreenGhostDraw lblue ghost
//MAKE GreenGhost LOCATION ADDRESS IN r2
LUI 50 r2
//MAKE GreenGhost STATE ADDRESS IN r3
LUI 50 r3
ORI 1 r3
//load location of GreenGhost INTO r0
LOAD r0 r2
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE UP 0:::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE UP0
GreenGhostDrawUP0:
load r5 r3
CMPI 16 r5
BNE GreenGhostDrawUP1 //else check if in state UP1
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_UP0
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_UP0
BUC GG_Eat1_UP0
GG_Normal_UP0:
MOV r0 r1
MOVI 107 r0 //GGHOST_UP_0
STOR r0 r1
ADDI -53 r1 //get location below GreenGhost
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1 //store the glyph back in.
RETX
GG_Eat0_UP0:
MOV r0 r1
MOVI 51 r0 //E1GHOST_UP_0
STOR r0 r1
ADDI -53 r1 //get location below
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
GG_Eat1_UP0:
MOV r0 r1
MOVI 79 r0 //E2GHOST_UP0
STOR r0 r1
ADDI -53 r1 //get location below
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE UP 1:::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE UP1
GreenGhostDrawUP1:
LOAD R5 R3
CMPI 17 r5
BNE GreenGhostDrawUP2 //else check if in state UP2
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_UP1
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_UP1
BUC GG_Eat1_UP1
GG_Normal_UP1:
MOV r0 r1
MOVI 113 r0 //GHOST_UP_6
STOR R0 R1
ADDI 53 R1 //get location above
MOVI 112 r0 //GHOST_UP_5
STOR r0 r1
RETX
GG_Eat0_Up1:
MOVI 57 R1 //E1GHOST_UP_6
STOR R1 R0
ADDI 53 R0
MOVI 56 R1 //E1GHOST_UP_5
STOR R1 R0
RETX
GG_Eat1_Up1:
MOVI 85 R1 //E2GHOST_UP6
STOR R1 R0
ADDI 53 R0
MOVI 84 R1 //E2GHOST_UP5
STOR R1 R0 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE UP 2:::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE UP2
GreenGhostDrawUP2:
LOAD R5 R3
CMPI 18 r5
BNE GreenGhostDrawUP3 //else check if in state UP3
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_UP2
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_UP2
BUC GG_Eat1_UP2
GG_Normal_UP2:
MOV r0 r1
MOVI 111 r0 //GHOST_UP_4
STOR R0 R1
ADDI 53 R1 //get location above
MOVI 110 r0 //GHOST_UP_3
STOR r0 r1
RETX
GG_Eat0_Up2:
MOVI 55 R1 //E1GHOST_UP_4
STOR R1 R0
ADDI 53 R0
MOVI 54 R1 //E1GHOST_UP_3
STOR R1 R0
RETX
GG_Eat1_Up2:
MOVI 83 R1 //E2GHOST_UP_4
STOR R1 R0
ADDI 53 R0
MOVI 82 R1 //E2GHOST_UP_3
STOR R1 R0 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE UP 3:::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE UP3
GreenGhostDrawUP3:
LOAD R5 R3
CMPI 19 r5
BNE GreenGhostDrawDOWN0 //else check if in state GreenGhostDrawDOWN0
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_UP3
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_UP3
BUC GG_Eat1_UP3
GG_Normal_UP3:
MOV r0 r1
MOVI 108 r0 //GHOST_UP_1
STOR R0 R1
ADDI -53 R1 //get location below
MOVI 109 r0 //GHOST_UP_2
STOR r0 r1
RETX
GG_Eat0_Up3:
MOVI 52 R1 //E1GHOST_UP_1
STOR R1 R0
ADDI -53 R0
MOVI 53 R1 //E1GHOST_UP_2
STOR R1 R0
RETX
GG_Eat1_Up3:
MOVI 80 R1 //E2GHOST_UP_1
STOR R1 R0
ADDI -53 R0
MOVI 81 R1 //E2GHOST_UP_2
STOR R1 R0 //LOAD INTO POSITION
RETX
//COPY AND PASTE FROM UP STATES!!
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE DOWN 0:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE DOWN0
GreenGhostDrawDOWN0:
load r5 r3
CMPI 32 r5
BNE GreenGhostDrawDOWN1 //else check if in state DOWN1
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_DOWN0
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_DOWN0
BUC GG_Eat1_DOWN0
GG_Normal_DOWN0:
MOV r0 r1
MOVI 86 r0 //GGHOST_DOWN_0
STOR r0 r1
ADDI 53 r1 //get location above GreenGhost
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1 //store the glyph back in.
RETX
GG_Eat0_DOWN0:
MOV r0 r1
MOVI 30 r0 //E1GHOST_DOWN_0
STOR r0 r1
ADDI 53 r1 //get location above
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
GG_Eat1_DOWN0:
MOV r0 r1
MOVI 58 r0 //E2GHOST_DOWN_0
STOR r0 r1
ADDI 53 r1 //get location above
MOV r15 r14
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE DOWN 1:::::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE DOWN1
GreenGhostDrawDOWN1:
LOAD R5 R3
CMPI 33 r5
BNE GreenGhostDrawDOWN2 //else check if in state DOWN2
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_DOWN1
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_DOWN1
BUC GG_Eat1_DOWN1
GG_Normal_DOWN1:
MOV r0 r1
MOVI 87 r0 //GHOST_DOWN_1
STOR R0 R1
ADDI -53 R1 //get location below
MOVI 88 r0 //GHOST_DOWN_2
STOR r0 r1
RETX
GG_Eat0_DOWN1:
MOVI 31 R1 //E1GHOST_DOWN_1
STOR R1 R0
ADDI -53 R0
MOVI 32 R1 //E1GHOST_DOWN_2
STOR R1 R0
RETX
GG_Eat1_DOWN1:
MOVI 59 R1 //E2GHOST_DOWN_1
STOR R1 R0
ADDI -53 R0
MOVI 60 R1 //E2GHOST_DOWN_2
STOR R1 R0 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE DOWN 2:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE DOWN2
GreenGhostDrawDOWN2:
LOAD R5 R3
CMPI 34 r5
BNE GreenGhostDrawDOWN3 //else check if in state DOWN3
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_DOWN2
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_DOWN2
BUC GG_Eat1_DOWN2
GG_Normal_DOWN2:
MOV r0 r1
MOVI 89 r0 //GHOST_DOWN_3
STOR R0 R1
ADDI -53 R1 //get location below
MOVI 90 r0 //GHOST_DOWN_4
STOR r0 r1
RETX
GG_Eat0_DOWN2:
MOVI 33 R1 //E1GHOST_DOWN_3
STOR R1 R0
ADDI -53 R0
MOVI 34 R1 //E1GHOST_DOWN_4
STOR R1 R0
RETX
GG_Eat1_DOWN2:
MOVI 61 R1 //E2GHOST_DOWN_3
STOR R1 R0
ADDI -53 R0
MOVI 62 R1 //E2GHOST_DOWN_4
STOR R1 R0 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE DOWN 3:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE DOWN3
GreenGhostDrawDOWN3:
LOAD R5 R3
CMPI 35 r5
BNE GreenGhostDrawLEFT0 //else check if in state GreenGhostDrawDOWN0
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_DOWN3
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_DOWN3
BUC GG_Eat1_DOWN3
GG_Normal_DOWN3:
MOV r0 r1
MOVI 92 r0 //GHOST_DOWN_6
STOR R0 R1
ADDI 53 R1 //get location above
MOVI 91 r0 //GHOST_DOWN_5
STOR r0 r1
RETX
GG_Eat0_DOWN3:
MOVI 64 R1 //E1GHOST_DOWN_6
STOR R1 R0
ADDI 53 R0
MOVI 63 R1 //E1GHOST_DOWN_5
STOR R1 R0
RETX
GG_Eat1_DOWN3:
MOVI 81 R1 //E2GHOST_DOWN_6
STOR R1 R0
ADDI 53 R0
MOVI 80 R1 //E2GHOST_DOWN_5
STOR R1 R0 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE LEFT 0:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE LEFT0
GreenGhostDrawLEFT0:
load r5 r3
CMPI 48 r5
BNE GreenGhostDrawLEFT1 //else check if in state LEFT1
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_LEFT0
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_LEFT0
BUC GG_Eat1_LEFT0
GG_Normal_LEFT0:
MOV r0 r1
MOVI 93 r0 //GGHOST_LEFT_0
STOR r0 r1
ADDI -1 r1 //get location right
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1 //store the glyph back in.
RETX
GG_Eat0_LEFT0:
MOV r0 r1
MOVI 37 r0 //E1GHOST_LEFT_0
STOR r0 r1
ADDI -1 r1 //get location right
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
GG_Eat1_LEFT0:
MOV r0 r1
MOVI 65 r0 //E2GHOST_LEFT0
STOR r0 r1
ADDI -1 r1 //get location right
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE LEFT 1:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE LEFT1
GreenGhostDrawLEFT1:
LOAD R5 R3
CMPI 49 r5
BNE GreenGhostDrawLEFT2 //else check if in state LEFT2
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_LEFT1
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_LEFT1
BUC GG_Eat1_LEFT1
GG_Normal_LEFT1:
MOV r0 r1
MOVI 99 r0 //GHOST_LEFT_6
STOR R0 R1
ADDI 1 R1 //get location left
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 98 r0 //GHOST_LEFT_5
STOR r0 r1
RETX
GG_Eat0_LEFT1:
MOV r0 r1
MOVI 43 R0 //E1GHOST_LEFT_6
STOR R0 R1
ADDI 1 R1
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 42 R0 //E1GHOST_LEFT_5
STOR R0 R1
RETX
GG_Eat1_LEFT1:
MOV r0 r1
MOVI 71 R0 //E2GHOST_LEFT_6
STOR R0 R1
ADDI 1 R1
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 70 R0 //E2GHOST_LEFT_5
STOR R0 R1 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE LEFT 2:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE LEFT2
GreenGhostDrawLEFT2:
LOAD R5 R3
CMPI 50 r5
BNE GreenGhostDrawLEFT3 //else check if in state LEFT3
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_LEFT2
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_LEFT2
BUC GG_Eat1_LEFT2
GG_Normal_LEFT2:
MOV r0 r1
MOVI 97 r0 //GHOST_LEFT_4
STOR R0 R1
ADDI 1 R1 //get location left
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 96 r0 //GHOST_LEFT_3
STOR r0 r1
RETX
GG_Eat0_LEFT2:
MOV r0 r1
MOVI 41 R0 //E1GHOST_LEFT_4
STOR R0 R1
ADDI 1 R1
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 40 R0 //E1GHOST_LEFT_3
STOR R0 R1
RETX
GG_Eat1_LEFT2:
MOV r0 r1
MOVI 69 R0 //E2GHOST_LEFT_4
STOR R0 R1
ADDI 1 R1
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 68 R0 //E2GHOST_LEFT_3
STOR R0 R1 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE LEFT 3:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE LEFT3
GreenGhostDrawLEFT3:
LOAD R5 R3
CMPI 51 r5
BNE GreenGhostDrawRIGHT0 //else check if in state GreenGhostDrawDOWN0
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_LEFT3
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_LEFT3
BUC GG_Eat1_LEFT3
GG_Normal_LEFT3:
MOV r0 r1
MOVI 94 r0 //GHOST_LEFT_1
STOR R0 R1
ADDI -1 R1 //get location right
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 95 r0 //GHOST_LEFT_2
STOR r0 r1
RETX
GG_Eat0_LEFT3:
MOV r0 r1
MOVI 38 R0 //E1GHOST_LEFT_1
STOR R0 R1
ADDI -1 R1
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 39 R0 //E1GHOST_LEFT_2
STOR R0 R1
RETX
GG_Eat1_LEFT3:
MOV r0 r1
MOVI 66 R0 //E2GHOST_LEFT_1
STOR R0 R1
ADDI -1 R1
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 67 R0 //E2GHOST_LEFT_2
STOR R0 R1 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE RIGHT 0:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE RIGHT0
GreenGhostDrawRIGHT0:
load r5 r3
CMPI 64 r5
BNE GreenGhostDrawRIGHT1 //else check if in state RIGHT1
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_RIGHT0
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_RIGHT0
BUC GG_Eat1_RIGHT0
GG_Normal_RIGHT0:
MOV r0 r1
MOVI 100 r0 //GGHOST_RIGHT_0
STOR r0 r1
ADDI 1 r1 //get location left
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1 //store the glyph back in.
RETX
GG_Eat0_RIGHT0:
MOV r0 r1
MOVI 44 r0 //E1GHOST_RIGHT_0
STOR r0 r1
ADDI 1 r1 //get location left
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
GG_Eat1_RIGHT0:
MOV r0 r1
MOVI 72 r0 //E2GHOST_RIGHT_0
STOR r0 r1
ADDI 1 r1 //get location left
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
JAL r6 FBpos_2_CPpos //get the position in frame buffer copy
LOAD r0 r1 //load the glyph in frame buffer copy
JAL r6 CPpos_2_FBpos //get the position in the frame buffer
MOV r14 r15
STOR r0 r1
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE RIGHT 1:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE RIGHT1
GreenGhostDrawRIGHT1:
LOAD R5 R3
CMPI 65 r5
BNE GreenGhostDrawRIGHT2 //else check if in state RIGHT2
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_RIGHT1
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_RIGHT1
BUC GG_Eat1_RIGHT1
GG_Normal_RIGHT1:
MOV r0 r1
MOVI 101 r0 //GHOST_RIGHT_1
STOR R0 R1
ADDI -1 R1 //get location left
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 102 r0 //GHOST_RIGHT_2
STOR r0 r1
RETX
GG_Eat0_RIGHT1:
MOV r0 r1
MOVI 45 R0 //E1GHOST_RIGHT_1
STOR R0 R1
ADDI -1 R1
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 46 R0 //E1GHOST_RIGHT_2
STOR R0 R1
RETX
GG_Eat1_RIGHT1:
MOV r0 r1
MOVI 73 R0 //E2GHOST_RIGHT_1
STOR R0 R1
ADDI -1 R1
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 74 R0 //E2GHOST_RIGHT_2
STOR R0 R1 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE RIGHT 2:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE RIGHT2
GreenGhostDrawRIGHT2:
LOAD R5 R3
CMPI 66 r5
BNE GreenGhostDrawRIGHT3 //else check if in state RIGHT3
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_RIGHT2
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_RIGHT2
BUC GG_Eat1_RIGHT2
GG_Normal_RIGHT2:
MOV r0 r1
MOVI 103 r0 //GHOST_RIGHT_3
STOR R0 R1
ADDI -1 R1 //get location right
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 104 r0 //GHOST_RIGHT_4
STOR r0 r1
RETX
GG_Eat0_RIGHT2:
MOV r0 r1
MOVI 47 R0 //E1GHOST_RIGHT_3
STOR R0 R1
ADDI -1 R1
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 48 R0 //E1GHOST_RIGHT_4
STOR R0 R1
RETX
GG_Eat1_RIGHT2:
MOV r0 r1
MOVI 75 R0 //E2GHOST_RIGHT_3
STOR R0 R1
ADDI -1 R1
MOV r15 r14
JAL r6 SetPosition_WarpRightSide
MOV r14 r15
MOVI 76 R0 //E2GHOST_RIGHT_4
STOR R0 R1 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::STATE RIGHT 3:::::::::::::::::::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//CHECK IF STATE RIGHT3
GreenGhostDrawRIGHT3:
LOAD R5 R3
CMPI 67 r5
BEQ GG_Right3 //else return if not in a state...
RETX
GG_Right3:
//check edible state:
LUI 51 r1
ORI 255 r1
LOAD r1 r1
CMPI 0 r1
BEQ GG_Normal_RIGHT3
LUI 52 r1
LOAD r1 r1
CMPI 1 r1
BEQ GG_Eat0_RIGHT3
BUC GG_Eat1_RIGHT3
GG_Normal_RIGHT3:
MOV r0 r1
MOVI 106 r0 //GHOST_RIGHT_6
STOR R0 R1
ADDI 1 R1 //get location right
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 105 r0 //GHOST_RIGHT_5
STOR r0 r1
RETX
GG_Eat0_RIGHT3:
MOV r0 r1
MOVI 50 R0 //E1GHOST_RIGHT_6
STOR R0 R1
ADDI 1 R1
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 49 R0 //E1GHOST_RIGHT_5
STOR R0 R1
RETX
GG_Eat1_RIGHT3:
MOV r0 r1
MOVI 78 R0 //E2GHOST_RIGHT_6
STOR R0 R1
ADDI 1 R1
MOV r15 r14
JAL r6 SetPosition_WarpLeftSide
MOV r14 r15
MOVI 77 R0 //E2GHOST_RIGHT_5
STOR R0 R1 //LOAD INTO POSITION
RETX
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
//:::::::::::::::::::::::::::::::::END GreenGhostDraw GLYPH:::::::::::::::::::
//::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
INIT_GreenGhost:
LUI 255 r0 //make timer reset address
ORI 241 r0
LUI 4 r1 //set 512+256 miliseconds on timer //TIMER SET
STOR r1 r0
//set GreenGhost state to left0
LUI 50 r4
ORI 1 r4
MOVI 48 r1
STOR r1 r4
//put GreenGhost on initial spot in map
LUI 50 r4
LUI 63 r1 # make address for top corner in frame buffer
ORI 255 r1
MOVI 53 r8
MULI -19 r8
ADD r8 r1 # Offset by rows
ADDI -26 r1 # Offset by columns
STOR R1 r4
RETX
GreenGhost_isWallUP:
LUI 50 r0 //make address 12800 where GreenGhost location is stored
LOAD r0 r0 //save result back into r0
ADDI 53 r0 //increment r0 to get location of square above GreenGhost (53 adress spaces higher in memory)
LOAD r0 r0 // LOAD glyph number
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
GreenGhost_isWallDOWN:
LUI 50 r0 //green ghost location
LOAD r0 r0 //save result back into r0
ADDI -53 r0 //increment r0 to get location of square below GreenGhost (53 adress spaces lower in memory)
LOAD r0 r0 // LOAD glyph number
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
GreenGhost_isWallLEFT:
LUI 50 r0 //make address 12800 where GreenGhost location is stored
LOAD r0 r0 //save result back into r0
ADDI 1 r0 //increment r0 to get location of square left of GreenGhost (1 space higher in memory)
LOAD r0 r0 // LOAD glyph number
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
GreenGhost_isWallRIGHT:
LUI 50 r0 //make address 12800 where GreenGhost location is stored
LOAD r0 r0 //save result back into r0
ADDI -1 r0 //increment r0 to get location of square right of GreenGhost (1 space lower in memory)
LOAD r0 r0
MOVI 100 r9
MULI 8 r9
CMP r0 r9
SGE r0 // use Scond instruction to set r0 to 1 if r0 is greater or equal to 800, else 0 if not.
RETX // return to calling function
///::::::::::::::::::END GreenGhost STATE MACHINE::::::::::::::::::::::
///::::::::::::::::::END GreenGhost STATE MACHINE::::::::::::::::::::::
///::::::::::::::::::END GreenGhost STATE MACHINE::::::::::::::::::::::
///::::::::::::::::::STATE MACHINE HELPERS FOR ALL MACHINES::::::::::::::::
///check the position passed in r1, sets r1 to equal r1 if not on warp,
///otherwise sets r1 to warped position.
SetPosition_WarpLeftSide:
LUI 63 r7 # make address for checking location
ORI 255 r7
MOVI 53 r9
MULI -19 r9
ADD r9 r7 # Offset by rows
ADDI -12 r7 # Offset by columns
CMP r1 r7
BNE endWarpLeftSide
ADDI -28 r7
MOV r7 r1
endWarpLeftSide:
RETX
SetPosition_WarpRightSide:
LUI 63 r7 # make address for checking location
ORI 255 r7
MOVI 53 r9
MULI -19 r9
ADD r9 r7 # Offset by rows
ADDI -12 r7
ADDI -29 r7 # Offset by columns
CMP r1 r7
BNE endWarpRightSide
ADDI 28 r7
MOV r7 r1
endWarpRightSide:
RETX
FBpos_2_CPpos:
LUI 14 r7
MULI -1 r7
ADD r7 r1
RETX
CPpos_2_FBpos:
LUI 14 r7
ADD r7 r1
RETX
// The following functions assume 'state address' has been moved to r0
//**actorUP**
setStateUP0:
MOVI 16 r1
STOR r1 r0
RETX
setStateUP1:
MOVI 17 r1
STOR r1 r0
RETX
setStateUP2:
MOVI 18 r1
STOR r1 r0
RETX
setStateUP3:
MOVI 19 r1
STOR r1 r0
RETX
//**actorDOWN**
setStateDOWN0:
MOVI 32 r1
STOR r1 r0
RETX
setStateDOWN1:
MOVI 33 r1
STOR r1 r0
RETX
setStateDOWN2:
MOVI 34 r1
STOR r1 r0
RETX
setStateDOWN3:
MOVI 35 r1
STOR r1 r0
RETX
//**actorLEFT**
setStateLEFT0:
MOVI 48 r1
STOR r1 r0
RETX
setStateLEFT1:
MOVI 49 r1
STOR r1 r0
RETX
setStateLEFT2:
MOVI 50 r1
STOR r1 r0
RETX
setStateLEFT3:
MOVI 51 r1
STOR r1 r0
RETX
//**actorRIGHT**
setStateRIGHT0:
MOVI 64 r1
STOR r1 r0
RETX
setStateRIGHT1:
MOVI 65 r1
STOR r1 r0
RETX
setStateRIGHT2:
MOVI 66 r1
STOR r1 r0
RETX
setStateRIGHT3:
MOVI 67 r1
STOR r1 r0
RETX
//**pacmanDEAD**
setStateDEAD1:
MOVI 1 r1
STOR r1 r0
RETX
setStateDEAD2:
MOVI 2 r1
STOR r1 r0
RETX
setStateDEAD3:
MOVI 3 r1
STOR r1 r0
RETX
setStateDEAD4:
MOVI 4 r1
STOR r1 r0
RETX
/////:::::::::::END ALL STATE MACHINE LOGIC:::::::::::::::::://////
//CHECK_DIRECTION functions. Use only register r0 and ra for safety. This way when calling these functions,
//only the r0 and ra registers must be preserved first if they are important.
CheckRIGHT:
LUI 255 r0 //make right address in r0
ORI 248 r0
LOAD r0 r0 //save result back into r0
RETX
CheckLEFT:
LUI 255 r0 //make address in r0
ORI 249 r0
LOAD r0 r0 //save result back into r0
RETX //return
CheckUP:
LUI 255 r0
ORI 251 r0
LOAD r0 r0
RETX
CheckDOWN:
LUI 255 r0
ORI 250 r0
LOAD r0 r0
RETX
/////HELPER FUNCTIONS FOR MAIN GAME LOGIC ////
drawLivesLeft:
LUI 63 r1 # make address for writting location in frame buffer
ORI 255 r1
MOVI 53 r8
MULI -37 r8
ADD r8 r1 # Offset by rows
ADDI -14 r1 # Offset by columns
//zero out space where lives drawn
MOVI 0 r0 // number of lives drawn
MOVI 0 r2 // blank glyph
livesClearLoop:
CMPI 5 r0
BEQ endlivesClearLoop
STOR r2 r1
ADDI -1 r1
ADDI 1 r0
BUC livesClearLoop
endlivesClearLoop:
ADDI 5 r1 //reset address
LUI 51 r8 //lives left addr
ORI 244 r8 //lives left addr
LOAD r8 r8
MOVI 0 r0
MOVI 226 r2 //pman glyph
livesLoop:
CMP r0 r8
BEQ endlivesLoop
STOR r2 r1
ADDI -1 r1
ADDI 1 r0
BUC livesLoop
endlivesLoop:
RETX
initlevel:
//Initialize pill remaining counter in gamestate by MOVIng 244 Pills left on board to addr 13301
LUI 51 r4
ORI 245 r4
MOVI 244 r0
STOR r0 r4
//initialize map in fb only.
LUI 55 r0 // Make the address for where init function starts
ORI 182 r0 //
MOV r0 r3 // r3 current address of where we are reading from memory
LUI 63 r1 # make address for writting location in frame buffer
ORI 255 r1
MOVI 53 r8
MULI -5 r8
ADD r8 r1 # Offset by rows
ADDI -13 r1 # Offset by columns
MOVI 0 r6
loopi:
CMPI 31 r6
BEQ endloopi #this should support labels, jump endloopi
MOVI 0 r7
loopj:
CMPI 28 r7
BEQ endloopj #jump to endloopj
MOV r6 r4
MULI 53 r4
ADD r7 r4
MULI -1 r4
ADD r1 r4
LOAD r5 r3
STOR r5 r4
SUBI 1 r3
ADDI 1 r7
BUC loopj
endloopj:
ADDI 1 r6
BUC loopi
endloopi:
//make the copy of the map in memory in fbcp
LUI 55 r0 // Make the address for where init function starts
ORI 182 r0 //
MOV r0 r3 // r3 current address of where we are reading from memory
LUI 49 r1 # make address for writting location in frame buffer copy
ORI 255 r1
MOVI 53 r8
MULI -5 r8
ADD r8 r1 # Offset by rows
ADDI -13 r1 # Offset by columns
MOVI 0 r6
loopi2:
CMPI 31 r6
BEQ endloopi2 #this should support labels, jump endloopi
MOVI 0 r7
loopj2:
CMPI 28 r7
BEQ endloopj2 #jump to endloopj
MOV r6 r4
MULI 53 r4
ADD r7 r4
MULI -1 r4
ADD r1 r4
LOAD r5 r3
STOR r5 r4
SUBI 1 r3
ADDI 1 r7
BUC loopj2
endloopj2:
ADDI 1 r6
BUC loopi2
endloopi2:
RETX
//***************************************
//************Start Menu*****************
//***************************************
// A(114) - Z(139)
// !(140)
// 0(169) - 9(178)
start_menu:
// zero out map
MOV r15 r14
JAL r9 clear_screen
MOV r14 r15
MOVI 0 r8 // zero out r8 for toggle return address
LUI 63 r0 // top left most glyph address
ORI 255 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0 // offset rows by 4 down
ADDI -22 r0 // and 22 columns
MOVI 129 r1 // Store 'P'
STOR r1 r0
ADDI -1 r0
MOVI 114 r1 // Store 'A'
STOR r1 r0
ADDI -1 r0
MOV r0 r10 // save this location to draw closed mouth too
MOVI 245 r1 // Store 'pacman0'
STOR r1 r0
ADDI -1 r0
MOVI 126 r1 // Store 'M'
STOR r1 r0
ADDI -1 r0
MOVI 114 r1 // Store 'A'
STOR r1 r0
ADDI -1 r0
MOVI 127 r1 // Store 'N'
STOR r1 r0
ADDI -1 r0
MOVI 0 r1 // Store ' '
STOR r1 r0
ADDI -1 r0
MOVI 171 r1 // Store '2'
STOR r1 r0
ADDI -1 r0
LUI 1 r1 // Store 'pill'
ORI 15 r1
STOR r1 r0
ADDI -1 r0
MOVI 169 r1 // Store '0'
STOR r1 r0
ADDI 6 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0 // offset rows by 4 down
MOVI 129 r1 // Store 'P'
STOR r1 r0
ADDI -1 r0
MOVI 131 r1 // Store 'R'
STOR r1 r0
ADDI -1 r0
MOVI 118 r1 // Store 'E'
STOR r1 r0
ADDI -1 r0
MOVI 132 r1 // Store 'S'
STOR r1 r0
ADDI -1 r0
MOVI 132 r1 // Store 'S'
STOR r1 r0
ADDI 6 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
MOVI 133 r1 // Store 'T'
STOR r1 r0
ADDI -1 r0
MOVI 128 r1 // Store 'O'
STOR r1 r0
ADDI -1 r0
MOVI 0 r1 // Store ' '
STOR r1 r0
ADDI -1 r0
MOVI 115 r1 // Store 'B'
STOR r1 r0
ADDI -1 r0
MOVI 118 r1 // Store 'E'
STOR r1 r0
ADDI -1 r0
MOVI 120 r1 // Store 'G'
STOR r1 r0
ADDI -1 r0
MOVI 122 r1 // Store 'I'
STOR r1 r0
ADDI -1 r0
MOVI 127 r1 // Store 'N'
STOR r1 r0
ADDI 5 r0
ADDI 106 r0
ADDI 106 r0
LUI 255 r4 // start timer
ORI 231 r4
MOVI 250 r5 // .5 seconds (500 milliseconds)
ADDI 125 r5
ADDI 125 r5
STOR r5 r4
BUC flash_start
dead_menu:
// zero out map
MOV r15 r14
JAL r9 clear_screen
MOV r14 r15
MOVI 0 r8 // zero out r8 for toggle return address
LUI 63 r0 // top left most glyph address
ORI 255 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0 // offset rows by 4 down
ADDI -22 r0 // and 22 columns
MOVI 120 r1 // Store 'G'
STOR r1 r0
ADDI -1 r0
MOVI 114 r1 // Store 'A'
STOR r1 r0
ADDI -1 r0
MOV r0 r10 // save this location to draw closed mouth too
MOVI 126 r1 // Store 'M'
STOR r1 r0
ADDI -1 r0
MOVI 118 r1 // Store 'E'
STOR r1 r0
ADDI -1 r0
MOVI 0 r1 // Store ' '
STOR r1 r0
ADDI -1 r0
MOV r0 r10 // save this location to draw closed mouth too
MOVI 245 r1 // Store 'pacman0'
STOR r1 r0
ADDI -1 r0
MOVI 135 r1 // Store 'V'
STOR r1 r0
ADDI -1 r0
MOVI 118 r1 // Store 'E'
STOR r1 r0
ADDI -1 r0
MOVI 131 r1 // Store 'R'
STOR r1 r0
ADDI -1 r0
MOVI 140 r1 // Store '!'
STOR r1 r0
ADDI 6 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0 // offset rows by 4 down
MOVI 129 r1 // Store 'P'
STOR r1 r0
ADDI -1 r0
MOVI 131 r1 // Store 'R'
STOR r1 r0
ADDI -1 r0
MOVI 118 r1 // Store 'E'
STOR r1 r0
ADDI -1 r0
MOVI 132 r1 // Store 'S'
STOR r1 r0
ADDI -1 r0
MOVI 132 r1 // Store 'S'
STOR r1 r0
ADDI 6 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
ADDI -106 r0
MOVI 133 r1 // Store 'T'
STOR r1 r0
ADDI -1 r0
MOVI 128 r1 // Store 'O'
STOR r1 r0
ADDI -1 r0
MOVI 0 r1 // Store ' '
STOR r1 r0
ADDI -1 r0
MOVI 115 r1 // Store 'B'
STOR r1 r0
ADDI -1 r0
MOVI 118 r1 // Store 'E'
STOR r1 r0
ADDI -1 r0
MOVI 120 r1 // Store 'G'
STOR r1 r0
ADDI -1 r0
MOVI 122 r1 // Store 'I'
STOR r1 r0
ADDI -1 r0
MOVI 127 r1 // Store 'N'
STOR r1 r0
ADDI 5 r0
ADDI 106 r0
ADDI 106 r0
LUI 255 r4 // start timer
ORI 231 r4
MOVI 250 r5 // .5 seconds (500 milliseconds)
ADDI 125 r5
ADDI 125 r5
STOR r5 r4
BUC flash_start
flash_start:
MOV r0 r7
//check if start button has been pressed on NES controller
MOV r15 r14
JAL r9 Homescreencheckstart
MOV r14 r15
LUI 255 r3 // calculate timer return value address
ORI 230 r3
LOAD r3 r3 // load timer rv into r3
CMPI 1 r3
BNE choose_draw
MOV r15 r14
JAL r9 toggle
MOV r14 r15
choose_draw: // choose whether to draw 'start' or 'blank'
CMPI 1 r8
BNE draw_blank
draw_start:
MOVI 205 r1 // Draw closed pacmanRIGHT0
STOR r1 r10
MOVI 132 r1 // Store 'S'
STOR r1 r7
ADDI -1 r7
MOVI 133 r1 // Store 'T'
STOR r1 r7
ADDI -1 r7
MOVI 114 r1 // Store 'A'
STOR r1 r7
ADDI -1 r7
MOVI 131 r1 // Store 'R'
STOR r1 r7
ADDI -1 r7
MOVI 133 r1 // Store 'T'
STOR r1 r7
JUC r9 flash_start
draw_blank:
MOVI 245 r1
STOR r1 r10
MOVI 0 r1 // otherwise draw nothing
STOR r1 r7
ADDI -1 r7
MOVI 0 r1
STOR r1 r7
ADDI -1 r7
MOVI 0 r1
STOR r1 r7
ADDI -1 r7
MOVI 0 r1
STOR r1 r7
ADDI -1 r7
MOVI 0 r1
STOR r1 r7
JUC r9 flash_start
toggle:
XORI 1 r8 // toggle rv
LUI 255 r4 // reset timer
ORI 231 r4
LUI 2 r5 // really close to 500, maybe 512
STOR r5 r4
RETX
Homescreencheckstart:
MOVI 0 r2 // Check 'START'
LUI 255 r2
ORI 252 r2
LOAD r2 r2
CMPI 1 r2
JEQ r9 start_Game // if start asserted, start game
RETX
clear_screen:
MOV r2 r10 //save this register
MOV r3 r11 // save this register
MOVI 0 r0 // zero-out temp
LUI 63 r2 // create glyph address
ORI 255 r2
LUI 8 r3 // create counter constraint of 2120 (# of glyphs)
ORI 72 r3
MOVI 0 r1 // glyph 0 to be drawn
clearscreenloop:
STOR r1 r2 // draw glyph
ADDI -1 r2 // decrement address pointer
ADDI 1 r0 // increment counter
CMP r0 r3 // check counter <= 2120
BLT clearscreenloop
MOV r10 r2 // else restore the reg's
MOV r11 r3
RETX
//*** end start menu**///
|
libsrc/_DEVELOPMENT/arch/zx/esxdos/c/sdcc_iy/esxdos_f_seek_callee.asm | jpoikela/z88dk | 640 | 240478 | <reponame>jpoikela/z88dk
; ulong esxdos_f_seek(uchar handle, ulong dist, uchar whence)
SECTION code_clib
SECTION code_esxdos
PUBLIC _esxdos_f_seek_callee
PUBLIC l0_esxdos_f_seek_callee
EXTERN asm_esxdos_f_seek
_esxdos_f_seek_callee:
pop hl
dec sp
pop af
pop de
pop bc
dec sp
ex (sp),hl
l0_esxdos_f_seek_callee:
ld l,h
push iy
call asm_esxdos_f_seek
pop iy
ret
|
oeis/078/A078048.asm | neoneye/loda-programs | 11 | 88679 | ; A078048: Expansion of (1-x)/(1+x+2*x^2-2*x^3).
; Submitted by <NAME>(s2)
; 1,-2,0,6,-10,-2,34,-50,-22,190,-246,-178,1050,-1186,-1270,5742,-5574,-8450,31082,-25330,-53734,166558,-109750,-330834,883450,-441282,-1987286,4636750,-1544742,-11703330,24066314,-3749138,-67790150,123421054,4660970,-387083378,624603546
mov $1,2
mov $3,1
lpb $0
sub $0,1
mul $2,2
sub $3,$1
add $1,$3
add $2,$3
add $1,$2
sub $2,$1
add $3,$2
lpe
mov $0,$3
|
3-mid/opengl/source/lean/geometry/opengl-primitive.ads | charlie5/lace | 20 | 25519 | <reponame>charlie5/lace<gh_stars>10-100
with
openGL.Texture;
private
with
ada.unchecked_Conversion;
package openGL.Primitive
--
-- Provides a base class for openGL primitives.
--
is
type Item is abstract tagged limited private;
subtype Class is Item'Class;
type View is access all Item'class;
type Views is array (Index_t range <>) of View;
----------
-- Facets
--
type facet_Kind is (Points,
Lines, line_Loop, line_Strip,
Triangles, triangle_Strip, triangle_Fan);
---------
-- Forge
--
procedure define (Self : in out Item; Kind : in facet_Kind);
procedure destroy (Self : in out Item) is abstract;
procedure free (Self : in out View);
--------------
-- Attributes
--
function Texture (Self : in Item) return openGL.Texture.Object;
procedure Texture_is (Self : in out Item; Now : in openGL.Texture.Object);
procedure Bounds_are (Self : in out Item; Now : in openGL.Bounds);
function Bounds (self : in Item) return openGL.Bounds;
--
-- Returns the bounds in object space.
procedure is_Transparent (Self : in out Item; Now : in Boolean := True);
function is_Transparent (Self : in Item) return Boolean;
---------------
--- Operations
--
procedure render (Self : in out Item);
unused_line_Width : constant := -1.0;
private
type Item is abstract tagged limited
record
facet_Kind : primitive.facet_Kind;
Texture : openGL.Texture.Object := openGL.Texture.null_Object;
is_Transparent : Boolean;
Bounds : openGL.Bounds;
line_Width : Real := unused_line_Width;
end record;
----------
-- Facets
--
function Thin (Self : in facet_Kind) return gl.GLenum;
for facet_Kind use (Points => gl.GL_POINTS,
Lines => gl.GL_LINES,
line_Loop => gl.GL_LINE_LOOP,
line_Strip => gl.GL_LINE_STRIP,
Triangles => gl.GL_TRIANGLES,
triangle_Strip => gl.GL_TRIANGLE_STRIP,
triangle_Fan => gl.GL_TRIANGLE_FAN);
for facet_Kind'Size use gl.GLenum'Size;
function Convert is new ada.Unchecked_Conversion (facet_Kind, gl.GLenum);
function Thin (Self : in facet_Kind) return gl.GLenum
renames Convert;
end openGL.Primitive;
|
programs/oeis/026/A026567.asm | jmorken/loda | 1 | 242062 | <filename>programs/oeis/026/A026567.asm
; A026567: a(n) = Sum{T(i,j)}, 0<=j<=i, 0<=i<=2n, T given by A026552.
; 1,4,13,31,85,193,517,1165,3109,6997,18661,41989,111973,251941,671845,1511653,4031077,9069925,24186469,54419557,145118821,326517349,870712933,1959104101,5224277605,11754624613,31345665637,70527747685,188073993829,423166486117,1128443962981,2538998916709,6770663777893,15233993500261,40623982667365,91403961001573,243743896004197,548423766009445,1462463376025189,3290542596056677,8774780256151141
mov $2,$0
lpb $2
gcd $0,2
add $0,1
add $1,4
mul $1,$0
sub $2,1
lpe
div $1,8
mul $1,3
add $1,1
|
data/mapObjects/CeladonPokecenter.asm | AmateurPanda92/pokemon-rby-dx | 9 | 81097 | CeladonPokecenter_Object:
db $0 ; border block
db 2 ; warps
warp 3, 7, 5, -1
warp 4, 7, 5, -1
db 0 ; signs
db 4 ; objects
object SPRITE_NURSE, 3, 1, STAY, DOWN, 1 ; person
object SPRITE_GENTLEMAN, 7, 3, WALK, 2, 2 ; person
object SPRITE_FOULARD_WOMAN, 10, 5, WALK, 0, 3 ; person
object SPRITE_CABLE_CLUB_WOMAN, 11, 2, STAY, DOWN, 4 ; person
; warp-to
warp_to 3, 7, CELADON_POKECENTER_WIDTH
warp_to 4, 7, CELADON_POKECENTER_WIDTH
|
old/Metalogic/Metalogic/Classical/Propositional/Syntax.agda | Lolirofle/stuff-in-agda | 6 | 14118 | <gh_stars>1-10
module Metalogic.Classical.Propositional.Syntax {ℓₚ} (Proposition : Set(ℓₚ)) where
import Lvl
infixl 1011 •_
infixl 1010 ¬_
infixl 1005 _∧_
infixl 1004 _∨_
infixl 1000 _⇐_ _⇔_ _⇒_
data Formula : Set(ℓₚ) where
•_ : Proposition → Formula
⊤ : Formula
⊥ : Formula
¬_ : Formula → Formula
_∧_ : Formula → Formula → Formula
_∨_ : Formula → Formula → Formula
_⇒_ : Formula → Formula → Formula
_⇐_ : Formula → Formula → Formula
_⇐_ a b = _⇒_ b a
_⇔_ : Formula → Formula → Formula
_⇔_ a b = (_⇐_ a b) ∧ (_⇒_ a b)
|
programs/oeis/061/A061006.asm | karttu/loda | 1 | 425 | ; A061006: a(n) = (n-1)! mod n.
; 0,1,2,2,4,0,6,0,0,0,10,0,12,0,0,0,16,0,18,0,0,0,22,0,0,0,0,0,28,0,30,0,0,0,0,0,36,0,0,0,40,0,42,0,0,0,46,0,0,0,0,0,52,0,0,0,0,0,58,0,60,0,0,0,0,0,66,0,0,0,70,0,72,0,0,0,0,0,78,0,0,0,82,0,0,0,0,0,88,0,0,0,0,0,0,0,96,0,0,0,100,0,102,0,0,0,106,0,108,0,0,0,112,0,0,0,0,0,0,0,0,0,0,0,0,0,126,0,0,0,130,0,0,0,0,0,136,0,138,0,0,0,0,0,0,0,0,0,148,0,150,0,0,0,0,0,156,0,0,0,0,0,162,0,0,0,166,0,0,0,0,0,172,0,0,0,0,0,178,0,180,0,0,0,0,0,0,0,0,0,190,0,192,0,0,0,196,0,198,0,0,0,0,0,0,0,0,0,0,0,210,0,0,0,0,0,0,0,0,0,0,0,222,0,0,0,226,0,228,0,0,0,232,0,0,0,0,0,238,0,240,0,0,0,0,0,0,0,0,0
sub $0,2
mov $1,2
bin $1,$0
mov $2,$1
cmp $2,0
add $1,$2
div $0,$1
add $0,2
mov $1,$0
cal $0,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
mul $1,$0
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_6_1524.asm | ljhsiun2/medusa | 9 | 178517 | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r15
push %r8
push %r9
push %rcx
push %rdx
lea addresses_WC_ht+0x1ccc2, %r8
clflush (%r8)
nop
nop
inc %r14
movl $0x61626364, (%r8)
nop
nop
cmp $4196, %r9
lea addresses_WT_ht+0x4682, %rdx
nop
nop
nop
add $61102, %r15
mov $0x6162636465666768, %rcx
movq %rcx, %xmm7
movups %xmm7, (%rdx)
nop
nop
nop
nop
cmp %rcx, %rcx
lea addresses_WC_ht+0x5182, %r9
nop
nop
nop
sub $37757, %r14
mov (%r9), %ecx
cmp %r9, %r9
pop %rdx
pop %rcx
pop %r9
pop %r8
pop %r15
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r8
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_A+0x13182, %rsi
lea addresses_UC+0x66a6, %rdi
nop
and %r13, %r13
mov $113, %rcx
rep movsl
nop
nop
nop
nop
nop
and %rdi, %rdi
// Store
mov $0x5d36c50000000c1b, %rdx
nop
nop
nop
nop
nop
cmp %r8, %r8
movb $0x51, (%rdx)
nop
nop
cmp %r8, %r8
// Faulty Load
lea addresses_PSE+0x1e982, %rdi
clflush (%rdi)
nop
nop
nop
cmp $39807, %rbp
mov (%rdi), %ecx
lea oracles, %r8
and $0xff, %rcx
shlq $12, %rcx
mov (%r8,%rcx,1), %rcx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 4, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A', 'congruent': 11, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC', 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_NC', 'size': 1, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 4, 'NT': False, 'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 7, 'NT': False, 'type': 'addresses_WT_ht', 'size': 16, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'33': 6}
33 33 33 33 33 33
*/
|
src/yeison_single.adb | mosteo/yeison | 6 | 29059 | <reponame>mosteo/yeison<filename>src/yeison_single.adb<gh_stars>1-10
with Ada.Strings.Unbounded; use Ada.Strings.Unbounded;
with Ada.Strings.UTF_Encoding.Wide_Wide_Strings;
with GNAT.IO; use GNAT.IO;
package body Yeison_Single is
------------
-- To_Int --
------------
function To_Int (Img : String) return Any is
begin
return To_Holder (Inner_Int'(Value => Integer'Value (Img)));
end To_Int;
-------------
-- To_Real --
-------------
function To_Real (Img : String) return Any is
begin
return To_Holder (Inner_Real'(Value => Float'Value (Img)));
end To_Real;
---------------
-- To_String --
---------------
function To_String (Img : Wide_Wide_String) return Any is
begin
return To_Holder (Inner_Str'(Value => new Text'(Ada.Strings.UTF_Encoding.Wide_Wide_Strings.Encode (Img))));
end To_String;
------------------------
-- Constant_Reference --
------------------------
function Constant_Reference
(This : Any; Pos : Positive) return access constant Any
is
begin
raise Constraint_Error;
return Constant_Reference (This, Pos);
end Constant_Reference;
------------------------
-- Constant_Reference --
------------------------
function Constant_Reference
(This : Any; Key : String) return access constant Any
is
begin
pragma Compile_Time_Warning
(Standard.True, "Constant_Reference unimplemented");
return
raise Program_Error with "Unimplemented function Constant_Reference";
end Constant_Reference;
-----------
-- Empty --
-----------
function Empty return Any is
begin
return To_Holder (Inner_Map'(Value => <>));
end Empty;
------------
-- Insert --
------------
procedure Insert (This : in out Any; Key : String; Val : Any) is
Inner : Inner_Map renames Inner_Map (This.Reference.Element.all);
begin
Inner.Value.Insert (Key, Val.Element);
end Insert;
----------
-- True --
----------
function True return Any is
begin
return To_Holder (Inner_Bool'(Value => True));
end True;
-----------
-- False --
-----------
function False return Any is
begin
return To_Holder (Inner_Bool'(Value => False));
end False;
-----------
-- Image --
-----------
overriding function Image (This : Inner_Map) Return String is
use Inner_Maps;
Result : Unbounded_String;
begin
Result := Result & "(";
for I in This.Value.Iterate loop
Result := Result & Key (I) & " => " & Element (I).Image;
if I /= This.Value.Last then
Result := Result & ", ";
end if;
end loop;
Result := Result & ")";
return To_String (Result);
end Image;
-----------
-- Image --
-----------
overriding function Image (This : Inner_Vec) return String is
use Inner_Vectors;
Result : Unbounded_String;
begin
Result := Result & "(";
for I in This.Value.Iterate loop
Result := Result & Element (I).Image;
if I /= This.Value.Last then
Result := Result & ", ";
end if;
end loop;
Result := Result & ")";
return To_String (Result);
end Image;
function Empty return Vec_Aux
is (Value => (Value => Inner_Vectors.Empty_Vector));
procedure Append (This : in out Vec_Aux; Val : Any) is
begin
This.Value.Value.Append (Val.Element);
end Append;
package body Operators is
function "+" (This : Vec_Aux) return Any is
begin
return To_Holder (This.Value);
end "+";
end Operators;
end Yeison_Single;
|
UefiCpuPkg/CpuDxe/X64/MpAsm.nasm | christopherco/RPi-UEFI | 93 | 161441 | <reponame>christopherco/RPi-UEFI<gh_stars>10-100
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
extern ASM_PFX(mTopOfApCommonStack)
extern ASM_PFX(ApEntryPointInC)
DEFAULT REL
SECTION .data
;
; This lock only allows one AP to use the mTopOfApCommonStack stack at a time
;
ApStackLock:
dd 0
SECTION .text
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmApEntryPoint (
; VOID
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmApEntryPoint)
ASM_PFX(AsmApEntryPoint):
cli
AsmApEntryPointAcquireLock:
lock bts dword [ApStackLock], 0
pause
jc AsmApEntryPointAcquireLock
mov rsp, [ASM_PFX(mTopOfApCommonStack)]
call ASM_PFX(ApEntryPointInC)
cli
lock btc dword [ApStackLock], 0
mov eax, 0x100
AsmApEntryPointShareLock:
pause
dec eax
jnz AsmApEntryPointShareLock
jmp ASM_PFX(AsmApEntryPoint)
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; AsmApDoneWithCommonStack (
; VOID
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmApDoneWithCommonStack)
ASM_PFX(AsmApDoneWithCommonStack):
lock btc dword [ApStackLock], 0
ret
|
lib/chibiakumas/SrcALL/Akuyou_Multiplatform_Interrupts.asm | gilbertfrancois/msx | 0 | 100354 | <gh_stars>0
Interrupts_Install:
nop
di
ifdef BuildCPC
exx
ld (Interrupt_CpcBcRestore_Plus2-2),bc
exx
endif
ifndef Interrupts_UseIM2
ld hl,&0038
ld a,(hl)
ld (InterruptRestore1_Plus1-1),a
; ld sp,&8181 ;this area is free as a stack pointer!
ld a,&C3 ;JP
ld (hl),a
ld de,InterruptHandler
inc hl
ld c,(hl)
ld (hl),e
inc hl
ld b,(hl)
ld (hl),d
ld (InterruptRestore2_Plus2-2),bc
else
ld hl,InterruptHandler
ld (&8182),hl
ld a,&C3
ld (&8181),a
ld hl,&8000
ld de,&8001
ld a,&81
ld (hl),a
ld bc,&0101
ldir
dec a
ld i,a
im 2
endif
xor a
; jp Interrupts_SafetyLock
Interrupts_SafetyLock:
ld (Interrupts_Uninstall),a
xor &C9
ld (Interrupts_Install),a
ei
ret
Interrupts_Uninstall:
ret
di
ifndef Interrupts_UseIM2
ld a,&00 :InterruptRestore1_Plus1
ld hl,&0038
ld (hl),a ; Patch in our firmware handler
ld de,&0000 :InterruptRestore2_Plus2
inc hl
ld (hl),e
inc hl
ld (hl),d
ld a,&C9
else
im 1
endif
ifdef BuildCPC
exx
ld bc,&000 :Interrupt_CpcBcRestore_Plus2
exx
endif
jr Interrupts_SafetyLock |
3-mid/impact/source/2d/dynamics/impact-d2-island.adb | charlie5/lace | 20 | 14065 | <filename>3-mid/impact/source/2d/dynamics/impact-d2-island.adb
with impact.d2.Fixture,
ada.unchecked_Deallocation;
package body impact.d2.Island
is
-- Position Correction Notes
-- =========================
-- I tried the several algorithms for position correction of the 2D revolute joint.
-- I looked at these systems:
-- - simple pendulum (1m diameter sphere on massless 5m stick) with initial angular velocity of 100 rad/s.
-- - suspension bridge with 30 1m long planks of length 1m.
-- - multi-link chain with 30 1m long links.
--
-- Here are the algorithms:
--
-- Baumgarte - A fraction of the position error is added to the velocity error. There is no
-- separate position solver.
--
-- Pseudo Velocities - After the velocity solver and position integration,
-- the position error, Jacobian, and effective mass are recomputed. Then
-- the velocity constraints are solved with pseudo velocities and a fraction
-- of the position error is added to the pseudo velocity error. The pseudo
-- velocities are initialized to zero and there is no warm-starting. After
-- the position solver, the pseudo velocities are added to the positions.
-- This is also called the First Order World method or the Position LCP method.
--
-- Modified Nonlinear Gauss-Seidel (NGS) - Like Pseudo Velocities except the
-- position error is re-computed for each constraint and the positions are updated
-- after the constraint is solved. The radius vectors (aka Jacobians) are
-- re-computed too (otherwise the algorithm has horrible instability). The pseudo
-- velocity states are not needed because they are effectively zero at the beginning
-- of each iteration. Since we have the current position error, we allow the
-- iterations to terminate early if the error becomes smaller than b2_linearSlop.
--
-- Full NGS or just NGS - Like Modified NGS except the effective mass are re-computed
-- each time a constraint is solved.
--
-- Here are the results:
-- Baumgarte - this is the cheapest algorithm but it has some stability problems,
-- especially with the bridge. The chain links separate easily close to the root
-- and they jitter as they struggle to pull together. This is one of the most common
-- methods in the field. The big drawback is that the position correction artificially
-- affects the momentum, thus leading to instabilities and false bounce. I used a
-- bias factor of 0.2. A larger bias factor makes the bridge less stable, a smaller
-- factor makes joints and contacts more spongy.
--
-- Pseudo Velocities - the is more stable than the Baumgarte method. The bridge is
-- stable. However, joints still separate with large angular velocities. Drag the
-- simple pendulum in a circle quickly and the joint will separate. The chain separates
-- easily and does not recover. I used a bias factor of 0.2. A larger value lead to
-- the bridge collapsing when a heavy cube drops on it.
--
-- Modified NGS - this algorithm is better in some ways than Baumgarte and Pseudo
-- Velocities, but in other ways it is worse. The bridge and chain are much more
-- stable, but the simple pendulum goes unstable at high angular velocities.
--
-- Full NGS - stable in all tests. The joints display good stiffness. The bridge
-- still sags, but this is better than infinite forces.
--
-- Recommendations
-- Pseudo Velocities are not really worthwhile because the bridge and chain cannot
-- recover from joint separation. In other cases the benefit over Baumgarte is small.
--
-- Modified NGS is not a robust method for the revolute joint due to the violent
-- instability seen in the simple pendulum. Perhaps it is viable with other constraint
-- types, especially scalar constraints where the effective mass is a scalar.
--
-- This leaves Baumgarte and Full NGS. Baumgarte has small, but manageable instabilities
-- and is very fast. I don't think we can escape Baumgarte, especially in highly
-- demanding cases where high constraint fidelity is not needed.
--
-- Full NGS is robust and easy on the eyes. I recommend this as an option for
-- higher fidelity simulation and certainly for suspension bridges and long chains.
-- Full NGS might be a good choice for ragdolls, especially motorized ragdolls where
-- joint separation can be problematic. The number of NGS iterations can be reduced
-- for better performance without harming robustness much.
--
-- Each joint in a can be handled differently in the position solver. So I recommend
-- a system where the user can select the algorithm on a per joint basis. I would
-- probably default to the slower Full NGS and let the user select the faster
-- Baumgarte method in performance critical scenarios.
--
--
--
-- Cache Performance
--
-- The Box2D solvers are dominated by cache misses. Data structures are designed
-- to increase the number of cache hits. Much of misses are due to random access
-- to body data. The constraint structures are iterated over linearly, which leads
-- to few cache misses.
--
-- The bodies are not accessed during iteration. Instead read only data, such as
-- the mass values are stored with the constraints. The mutable data are the constraint
-- impulses and the bodies velocities/positions. The impulses are held inside the
-- constraint structures. The body velocities/positions are held in compact, temporary
-- arrays to increase the number of cache hits. Linear and angular velocity are
-- stored in a single array since multiple arrays lead to multiple misses.
--
--
--
-- 2D Rotation
--
-- R = [cos(theta) -sin(theta)]
-- [sin(theta) cos(theta) ]
--
-- thetaDot = omega
--
-- Let q1 = cos(theta), q2 = sin(theta).
-- R = [q1 -q2]
-- [q2 q1]
--
-- q1Dot = -thetaDot * q2
-- q2Dot = thetaDot * q1
--
-- q1_new = q1_old - dt * w * q2
-- q2_new = q2_old + dt * w * q1
-- then normalize.
--
-- This might be faster than computing sin+cos.
-- However, we can compute sin+cos of the same angle fast.
--
use type int32;
function to_b2Island (bodyCapacity : int32;
contactCapacity : int32;
jointCapacity : int32;
-- b2StackAllocator* allocator,
listener : access world_callbacks.b2ContactListener'Class) return b2Island
is
Self : b2Island;
begin
Self.m_bodyCapacity := bodyCapacity;
Self.m_contactCapacity := contactCapacity;
Self.m_jointCapacity := jointCapacity;
Self.m_bodyCount := 0;
Self.m_contactCount := 0;
Self.m_jointCount := 0;
-- Self.m_allocator := allocator;
Self.m_listener := listener;
Self.m_bodies := new Solid_views (1 .. bodyCapacity);
Self.m_contacts := new Contact.views (1 .. contactCapacity);
Self.m_joints := new Joint_views (1 .. jointCapacity);
Self.m_velocities := new Velocity_views (1 .. bodyCapacity);
Self.m_positions := new Position_views (1 .. bodyCapacity);
return Self;
end to_b2Island;
procedure destruct (Self : in out b2Island)
is
procedure free is new ada.unchecked_Deallocation (Solid_views, access_Solid_views);
procedure free is new ada.unchecked_Deallocation (Joint_views, access_Joint_views);
procedure free is new ada.unchecked_Deallocation (Contact.views, access_Contact_views);
procedure free is new ada.unchecked_Deallocation (Position_views, access_Position_views);
procedure free is new ada.unchecked_Deallocation (Velocity_views, access_Velocity_views);
begin
-- Warning: the order should reverse the constructor order.
free (Self.m_positions);
free (Self.m_velocities);
free (Self.m_joints);
free (Self.m_contacts);
free (Self.m_bodies);
end destruct;
procedure Clear (Self : in out b2Island)
is
begin
Self.m_bodyCount := 0;
Self.m_contactCount := 0;
Self.m_jointCount := 0;
end Clear;
procedure Add (Self : in out b2Island; Solid : access impact.d2.Solid.b2Body'Class)
is
begin
pragma Assert (Self.m_bodyCount < Self.m_bodyCapacity);
Self.m_bodyCount := Self.m_bodyCount + 1;
Self.m_bodies (Self.m_bodyCount) := Solid.all'Access;
Solid.m_islandIndex_is (Self.m_bodyCount);
end Add;
procedure Add (Self : in out b2Island; Contact : access impact.d2.Contact.b2Contact'Class)
is
begin
pragma Assert (Self.m_contactCount < Self.m_contactCapacity);
Self.m_contactCount := Self.m_contactCount + 1;
Self.m_contacts (Self.m_contactCount) := Contact.all'Access;
end Add;
procedure Add (Self : in out b2Island; Joint : access impact.d2.Joint.b2Joint'Class)
is
begin
pragma Assert (Self.m_jointCount < Self.m_jointCapacity);
Self.m_jointCount := Self.m_jointCount + 1;
Self.m_joints (Self.m_jointCount) := Joint.all'Access;
end Add;
-- procedure Report (Self : in out b2Island; constraints : access contact.solver.b2ContactConstraints)
-- is
-- c : Contact.view;
-- cc : access constant contact.Solver.b2ContactConstraint;
-- impulse : world_callbacks.b2ContactImpulse;
-- begin
-- if Self.m_listener = null then
-- return;
-- end if;
--
-- for i in 1 .. Self.m_contactCount loop
-- c := Self.m_contacts (i);
-- cc := constraints (i)'Access;
--
-- for j in 1 .. cc.pointCount loop
-- impulse.normalImpulses (j) := cc.points (uint32 (j)).normalImpulse;
-- impulse.tangentImpulses (j) := cc.points (uint32 (j)).tangentImpulse;
-- end loop;
--
-- Self.m_listener.PostSolve (c, impulse);
-- end loop;
-- end Report;
-- procedure Solve (Self : in out b2Island; step : in b2TimeStep;
-- gravity : in b2Vec2;
-- allowSleep : in Boolean)
-- is
-- use type solid.b2BodyType;
-- begin
-- -- Integrate velocities and apply damping.
-- for i in 1 .. Self.m_bodyCount loop
-- declare
-- b : Solid_view renames Self.m_bodies (i);
-- begin
-- if b.GetType = Solid.b2_dynamicBody then
-- -- Integrate velocities.
-- b.m_linearVelocity.all := b.m_linearVelocity.all + step.dt * (gravity + b.m_invMass.all * b.m_force.all);
-- b.m_angularVelocity.all := b.m_angularVelocity.all + step.dt * b.m_invI.all * b.m_torque.all;
--
-- -- Apply damping.
-- -- ODE: dv/dt + c * v = 0
-- -- Solution: v(t) = v0 * exp(-c * t)
-- -- Time step: v(t + dt) = v0 * exp(-c * (t + dt)) = v0 * exp(-c * t) * exp(-c * dt) = v * exp(-c * dt)
-- -- v2 = exp(-c * dt) * v1
-- -- Taylor expansion:
-- -- v2 = (1.0f - c * dt) * v1
-- --
-- b.m_linearVelocity.all := b.m_linearVelocity.all * b2Clamp (1.0 - step.dt * b.m_linearDamping.all, 0.0, 1.0);
-- b.m_angularVelocity.all := b.m_angularVelocity.all * b2Clamp (1.0 - step.dt * b.m_angularDamping.all, 0.0, 1.0);
-- end if;
-- end;
-- end loop;
--
-- -- Partition contacts so that contacts with static bodies are solved last.
-- declare
-- i1 : int32 := 0;
--
-- fixtureA,
-- fixtureB : access Fixture.b2Fixture;
--
-- bodyA,
-- bodyB : Solid_view;
--
-- nonStatic : Boolean;
--
-- procedure swap is new swap_any (Contact.view);
--
-- begin
-- for i2 in 1 .. Self.m_contactCount loop
-- fixtureA := Self.m_contacts (i2).GetFixtureA;
-- fixtureB := Self.m_contacts (i2).GetFixtureB;
--
-- bodyA := fixtureA.GetBody.all'Access;
-- bodyB := fixtureB.GetBody.all'Access;
--
-- nonStatic := bodyA.GetType /= solid.b2_staticBody
-- and then bodyB.GetType /= solid.b2_staticBody;
--
-- if nonStatic then
-- i1 := i1 + 1;
-- swap (Self.m_contacts (i1), Self.m_contacts (i2));
-- end if;
-- end loop;
-- end;
--
-- -- Initialize velocity constraints.
-- declare
-- contactSolver : contact.solver.b2ContactSolver := contact.solver.to_b2ContactSolver (Self.m_contacts (1 .. Self.m_contactCount),
-- -- Self.m_allocator,
-- step.dtRatio);
-- begin
-- contactSolver.WarmStart;
--
-- for i in 1 .. Self.m_jointCount loop
-- Self.m_joints (i).InitVelocityConstraints (step);
-- end loop;
--
-- -- Solve velocity constraints.
-- for i in 1 .. step.velocityIterations loop
-- for j in 1 .. Self.m_jointCount loop
-- Self.m_joints (j).SolveVelocityConstraints (step);
-- end loop;
--
-- contactSolver.SolveVelocityConstraints;
-- end loop;
--
-- -- Post-solve (store impulses for warm starting).
-- contactSolver.StoreImpulses;
--
-- -- Integrate positions.
-- for i in 1 .. Self.m_bodyCount loop
-- declare
-- b : constant Solid_view := Self.m_bodies (i);
--
-- translation : b2Vec2;
--
-- rotation,
-- ratio : float32;
-- begin
--
-- if b.GetType /= solid.b2_staticBody then
--
-- -- Check for large velocities.
-- translation := step.dt * b.m_linearVelocity.all;
--
-- if b2Dot (translation, translation) > b2_maxTranslationSquared then
-- ratio := b2_maxTranslation / Length (translation);
-- b.m_linearVelocity.all := b.m_linearVelocity.all * ratio;
-- end if;
--
-- rotation := step.dt * b.m_angularVelocity.all;
--
-- if rotation * rotation > b2_maxRotationSquared then
-- ratio := b2_maxRotation / abs (rotation);
-- b.m_angularVelocity.all := b.m_angularVelocity.all * ratio;
-- end if;
--
-- -- Store positions for continuous collision.
-- b.m_sweep.c0 := b.m_sweep.c;
-- b.m_sweep.a0 := b.m_sweep.a;
--
-- -- Integrate
-- b.m_sweep.c := b.m_sweep.c + step.dt * b.m_linearVelocity.all;
-- b.m_sweep.a := b.m_sweep.a + step.dt * b.m_angularVelocity.all;
--
-- -- Compute new transform
-- b.SynchronizeTransform;
--
-- -- Note: shapes are synchronized later.
-- end if;
-- end;
-- end loop;
--
-- -- Iterate over constraints.
-- for i in 1 .. step.positionIterations loop
-- declare
-- contactsOkay : constant Boolean := contactSolver.SolvePositionConstraints (b2_contactBaumgarte);
-- jointsOkay : Boolean := True;
-- jointOkay : Boolean;
-- begin
-- for i in 1 .. Self.m_jointCount loop
-- jointOkay := Self.m_joints (i).SolvePositionConstraints (b2_contactBaumgarte);
-- jointsOkay := jointsOkay and then jointOkay;
-- end loop;
--
-- if contactsOkay and then jointsOkay then
-- exit; -- Exit early if the position errors are small.
-- end if;
-- end;
-- end loop;
--
-- Self.Report (contactSolver.m_constraints);
-- end;
--
-- if allowSleep then
-- declare
-- minSleepTime : float32 := b2_maxFloat;
--
-- linTolSqr : constant float32 := b2_linearSleepTolerance * b2_linearSleepTolerance;
-- angTolSqr : constant float32 := b2_angularSleepTolerance * b2_angularSleepTolerance;
-- begin
--
-- for i in 1 .. Self.m_bodyCount loop
-- declare
-- use type solid.Flag;
-- b : constant Solid_view := Self.m_bodies (i);
-- begin
-- if b.GetType /= solid.b2_staticBody then
--
-- if (b.m_flags and Solid.e_autoSleepFlag) = 0 then
-- b.m_sleepTime.all := 0.0;
-- minSleepTime := 0.0;
-- end if;
--
-- if (b.m_flags and Solid.e_autoSleepFlag) = 0
-- or else b.m_angularVelocity.all * b.m_angularVelocity.all > angTolSqr
-- or else b2Dot (b.m_linearVelocity.all, b.m_linearVelocity.all) > linTolSqr
-- then
-- b.m_sleepTime.all := 0.0;
-- minSleepTime := 0.0;
-- else
-- b.m_sleepTime.all := b.m_sleepTime.all + step.dt;
-- minSleepTime := float32'Min (minSleepTime, b.m_sleepTime.all);
-- end if;
--
-- end if;
-- end;
-- end loop;
--
-- if minSleepTime >= b2_timeToSleep then
-- for i in 1 .. Self.m_bodyCount loop
-- Self.m_bodies (i).SetAwake (False);
-- end loop;
-- end if;
-- end;
-- end if;
--
-- end Solve;
-- procedure SolveTOI (Self : in out b2Island; subStep : in b2TimeStep;
-- toiIndexA,
-- toiIndexB : in int32)
-- is
-- pragma assert (toiIndexA < Self.m_bodyCount);
-- pragma assert (toiIndexB < Self.m_bodyCount);
--
-- use contact.Solver;
--
-- contactSolverDef : b2ContactSolverDef;
-- contactSolver : b2ContactSolver;
--
-- h : float32;
--
-- begin
-- -- Initialize the body state.
-- for i in 0 .. Self.m_bodyCount - 1
-- loop
-- declare
-- b : constant Solid_view := Self.m_bodies (i);
-- begin
-- Self.m_positions (i).c := b.m_sweep.c;
-- Self.m_positions (i).a := b.m_sweep.a;
-- Self.m_velocities (i).v := b.m_linearVelocity.all;
-- Self.m_velocities (i).w := b.m_angularVelocity.all;
-- end;
-- end loop;
--
-- contactSolverDef.contacts := Self.m_contacts;
-- contactSolverDef.count := Self.m_contactCount;
-- -- contactSolverDef.allocator = m_allocator;
-- contactSolverDef.step := subStep;
-- contactSolverDef.positions := Self.m_positions;
-- contactSolverDef.velocities := Self.m_velocities;
--
-- contactSolver := to_b2ContactSolver (contactSolverDef'Access);
--
-- -- Solve position constraints.
-- for i in 0 .. subStep.positionIterations - 1
-- loop
-- declare
-- contactsOkay : Boolean := contactSolver.SolveTOIPositionConstraints (toiIndexA, toiIndexB);
-- begin
-- if contactsOkay then
-- exit;
-- end if;
-- end;
-- end loop;
--
-- -- #if 0
-- -- -- Is the new position really safe?
-- -- for (int32 i = 0; i < Self.m_contactCount; ++i)
-- -- {
-- -- b2Contact* c = Self.m_contacts (i);
-- -- b2Fixture* fA = c.GetFixtureA();
-- -- b2Fixture* fB = c.GetFixtureB();
-- --
-- -- b2Body* bA = fA.GetBody();
-- -- b2Body* bB = fB.GetBody();
-- --
-- -- int32 indexA = c.GetChildIndexA();
-- -- int32 indexB = c.GetChildIndexB();
-- --
-- -- b2DistanceInput input;
-- -- input.proxyA.Set(fA.GetShape(), indexA);
-- -- input.proxyB.Set(fB.GetShape(), indexB);
-- -- input.transformA = bA.GetTransform();
-- -- input.transformB = bB.GetTransform();
-- -- input.useRadii = false;
-- --
-- -- b2DistanceOutput output;
-- -- b2SimplexCache cache;
-- -- cache.count = 0;
-- -- b2Distance(&output, &cache, &input);
-- --
-- -- if (output.distance == 0 || cache.count == 3)
-- -- {
-- -- cache.count += 0;
-- -- }
-- -- }
-- -- #endif
--
-- -- Leap of faith to new safe state.
-- Self.m_bodies (toiIndexA).m_sweep.c0 := Self.m_positions (toiIndexA).c;
-- Self.m_bodies (toiIndexA).m_sweep.a0 := Self.m_positions (toiIndexA).a;
-- Self.m_bodies (toiIndexB).m_sweep.c0 := Self.m_positions (toiIndexB).c;
-- Self.m_bodies (toiIndexB).m_sweep.a0 := Self.m_positions (toiIndexB).a;
--
-- -- No warm starting is needed for TOI events because warm
-- -- starting impulses were applied in the discrete solver.
-- --
-- contactSolver.InitializeVelocityConstraints;
--
-- -- Solve velocity constraints.
-- for i in 0 .. subStep.velocityIterations - 1
-- loop
-- contactSolver.SolveVelocityConstraints;
-- end loop
--
-- -- Don't store the TOI contact forces for warm starting
-- -- because they can be quite large.
--
-- h := subStep.dt;
--
-- -- Integrate positions
-- for i in 0 .. Self.m_bodyCount - 1
-- loop
-- declare
-- c : b2Vec2 := Self.m_positions (i).c;
-- a : float32 := Self.m_positions (i).a;
-- v : b2Vec2 := Self.m_velocities (i).v;
-- w : float32 := Self.m_velocities (i).w;
--
-- translation : b2Vec2 := h * v;
-- ratio,
-- rotation : float32;
--
-- bod : Solid_view;
-- begin
-- -- Check for large velocities
-- if b2Dot (translation, translation) > b2_maxTranslationSquared
-- then
-- ratio := b2_maxTranslation / translation.Length;
-- v := v * ratio;
-- end if;
--
-- rotation := h * w;
--
-- if rotation * rotation > b2_maxRotationSquared
-- then
-- ratio := b2_maxRotation / b2Abs (rotation);
-- w := w * ratio;
-- end if;
--
-- -- Integrate
-- c := c + h * v;
-- a := a + h * w;
--
-- Self.m_positions (i).c := c;
-- Self.m_positions (i).a := a;
-- Self.m_velocities (i).v := v;
-- Self.m_velocities (i).w := w;
--
-- -- Sync bodies
-- bod := m_bodies (i);
--
-- bod.m_sweep.c := c;
-- bod.m_sweep.a := a;
--
-- bod.m_linearVelocity := v;
-- bod.m_angularVelocity := w;
--
-- bod.SynchronizeTransform;
-- end;
-- end loop;
--
-- Self.Report (contactSolver.m_velocityConstraints);
-- end;
end impact.d2.Island;
|
src/research/bootloader_to_kernel.asm | MijnOS/MijnOS | 0 | 169331 | %define test 2
[BITS 16]
;===========
; Start of the bootloader
;===========
start:
mov ax,07C0h ; Set up 4K stack space after this bootloader
add ax,288 ; (4096 + 512) / 16 bytes per paragraph
mov ss,ax
mov sp,4096
mov ax,07C0h ; Set data segment to where we're loaded
mov ds,ax
mov si,msg_boot ; Put string position into SI
call print_string ; Call our string-printing routine
jmp $ ; Jump here - infinite loop!
msg_boot db 'Booting MijnOS...', 0Dh, 0Ah, 0
;===========
; Prints a string onto the screen
;===========
print_string: ; Routine: output string in SI to screen
mov ah,0Eh ; int 10h 'print char' function
.repeat:
lodsb ; Get character from string
cmp al,0
je .done ; If char is zero, end of string
int 10h ; Otherwise, print it
jmp .repeat
.done:
ret
times 510-($-$$) db 0 ; Pad remainder of boot sector with 0s
dw 0xAA55 ; The standard PC boot signature
|
sql/catalyst/src/main/antlr4/org/apache/spark/sql/catalyst/parser/SqlBaseLexer.g4 | sji15/spark | 0 | 4608 | /*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* This file is an adaptation of Presto's presto-parser/src/main/antlr4/com/facebook/presto/sql/parser/SqlBase.g4 grammar.
*/
lexer grammar SqlBaseLexer;
@members {
/**
* When true, parser should throw ParseExcetion for unclosed bracketed comment.
*/
public boolean has_unclosed_bracketed_comment = false;
/**
* Verify whether current token is a valid decimal token (which contains dot).
* Returns true if the character that follows the token is not a digit or letter or underscore.
*
* For example:
* For char stream "2.3", "2." is not a valid decimal token, because it is followed by digit '3'.
* For char stream "2.3_", "2.3" is not a valid decimal token, because it is followed by '_'.
* For char stream "2.3W", "2.3" is not a valid decimal token, because it is followed by 'W'.
* For char stream "12.0D 34.E2+0.12 " 12.0D is a valid decimal token because it is followed
* by a space. 34.E2 is a valid decimal token because it is followed by symbol '+'
* which is not a digit or letter or underscore.
*/
public boolean isValidDecimal() {
int nextChar = _input.LA(1);
if (nextChar >= 'A' && nextChar <= 'Z' || nextChar >= '0' && nextChar <= '9' ||
nextChar == '_') {
return false;
} else {
return true;
}
}
/**
* This method will be called when we see '/*' and try to match it as a bracketed comment.
* If the next character is '+', it should be parsed as hint later, and we cannot match
* it as a bracketed comment.
*
* Returns true if the next character is '+'.
*/
public boolean isHint() {
int nextChar = _input.LA(1);
if (nextChar == '+') {
return true;
} else {
return false;
}
}
/**
* This method will be called when the character stream ends and try to find out the
* unclosed bracketed comment.
* If the method be called, it means the end of the entire character stream match,
* and we set the flag and fail later.
*/
public void markUnclosedComment() {
has_unclosed_bracketed_comment = true;
}
}
SEMICOLON: ';';
LEFT_PAREN: '(';
RIGHT_PAREN: ')';
COMMA: ',';
DOT: '.';
LEFT_BRACKET: '[';
RIGHT_BRACKET: ']';
// NOTE: If you add a new token in the list below, you should update the list of keywords
// and reserved tag in `docs/sql-ref-ansi-compliance.md#sql-keywords`.
//============================
// Start of the keywords list
//============================
//--SPARK-KEYWORD-LIST-START
ADD: 'ADD';
AFTER: 'AFTER';
ALL: 'ALL';
ALTER: 'ALTER';
ANALYZE: 'ANALYZE';
AND: 'AND';
ANTI: 'ANTI';
ANY: 'ANY';
ARCHIVE: 'ARCHIVE';
ARRAY: 'ARRAY';
AS: 'AS';
ASC: 'ASC';
AT: 'AT';
AUTHORIZATION: 'AUTHORIZATION';
BETWEEN: 'BETWEEN';
BOTH: 'BOTH';
BUCKET: 'BUCKET';
BUCKETS: 'BUCKETS';
BY: 'BY';
CACHE: 'CACHE';
CASCADE: 'CASCADE';
CASE: 'CASE';
CAST: 'CAST';
CATALOG: 'CATALOG';
CATALOGS: 'CATALOGS';
CHANGE: 'CHANGE';
CHECK: 'CHECK';
CLEAR: 'CLEAR';
CLUSTER: 'CLUSTER';
CLUSTERED: 'CLUSTERED';
CODEGEN: 'CODEGEN';
COLLATE: 'COLLATE';
COLLECTION: 'COLLECTION';
COLUMN: 'COLUMN';
COLUMNS: 'COLUMNS';
COMMENT: 'COMMENT';
COMMIT: 'COMMIT';
COMPACT: 'COMPACT';
COMPACTIONS: 'COMPACTIONS';
COMPUTE: 'COMPUTE';
CONCATENATE: 'CONCATENATE';
CONSTRAINT: 'CONSTRAINT';
COST: 'COST';
CREATE: 'CREATE';
CROSS: 'CROSS';
CUBE: 'CUBE';
CURRENT: 'CURRENT';
CURRENT_DATE: 'CURRENT_DATE';
CURRENT_TIME: 'CURRENT_TIME';
CURRENT_TIMESTAMP: 'CURRENT_TIMESTAMP';
CURRENT_USER: 'CURRENT_USER';
DAY: 'DAY';
DATA: 'DATA';
DATABASE: 'DATABASE';
DATABASES: 'DATABASES';
DATEADD: 'DATEADD';
DATE_ADD: 'DATE_ADD';
DATEDIFF: 'DATEDIFF';
DATE_DIFF: 'DATE_DIFF';
DBPROPERTIES: 'DBPROPERTIES';
DEFINED: 'DEFINED';
DELETE: 'DELETE';
DELIMITED: 'DELIMITED';
DESC: 'DESC';
DESCRIBE: 'DESCRIBE';
DFS: 'DFS';
DIRECTORIES: 'DIRECTORIES';
DIRECTORY: 'DIRECTORY';
DISTINCT: 'DISTINCT';
DISTRIBUTE: 'DISTRIBUTE';
DIV: 'DIV';
DROP: 'DROP';
ELSE: 'ELSE';
END: 'END';
ESCAPE: 'ESCAPE';
ESCAPED: 'ESCAPED';
EXCEPT: 'EXCEPT';
EXCHANGE: 'EXCHANGE';
EXISTS: 'EXISTS';
EXPLAIN: 'EXPLAIN';
EXPORT: 'EXPORT';
EXTENDED: 'EXTENDED';
EXTERNAL: 'EXTERNAL';
EXTRACT: 'EXTRACT';
FALSE: 'FALSE';
FETCH: 'FETCH';
FIELDS: 'FIELDS';
FILTER: 'FILTER';
FILEFORMAT: 'FILEFORMAT';
FIRST: 'FIRST';
FOLLOWING: 'FOLLOWING';
FOR: 'FOR';
FOREIGN: 'FOREIGN';
FORMAT: 'FORMAT';
FORMATTED: 'FORMATTED';
FROM: 'FROM';
FULL: 'FULL';
FUNCTION: 'FUNCTION';
FUNCTIONS: 'FUNCTIONS';
GLOBAL: 'GLOBAL';
GRANT: 'GRANT';
GROUP: 'GROUP';
GROUPING: 'GROUPING';
HAVING: 'HAVING';
HOUR: 'HOUR';
IF: 'IF';
IGNORE: 'IGNORE';
IMPORT: 'IMPORT';
IN: 'IN';
INDEX: 'INDEX';
INDEXES: 'INDEXES';
INNER: 'INNER';
INPATH: 'INPATH';
INPUTFORMAT: 'INPUTFORMAT';
INSERT: 'INSERT';
INTERSECT: 'INTERSECT';
INTERVAL: 'INTERVAL';
INTO: 'INTO';
IS: 'IS';
ITEMS: 'ITEMS';
JOIN: 'JOIN';
KEYS: 'KEYS';
LAST: 'LAST';
LATERAL: 'LATERAL';
LAZY: 'LAZY';
LEADING: 'LEADING';
LEFT: 'LEFT';
LIKE: 'LIKE';
ILIKE: 'ILIKE';
LIMIT: 'LIMIT';
LINES: 'LINES';
LIST: 'LIST';
LOAD: 'LOAD';
LOCAL: 'LOCAL';
LOCATION: 'LOCATION';
LOCK: 'LOCK';
LOCKS: 'LOCKS';
LOGICAL: 'LOGICAL';
MACRO: 'MACRO';
MAP: 'MAP';
MATCHED: 'MATCHED';
MERGE: 'MERGE';
MINUTE: 'MINUTE';
MONTH: 'MONTH';
MSCK: 'MSCK';
NAMESPACE: 'NAMESPACE';
NAMESPACES: 'NAMESPACES';
NATURAL: 'NATURAL';
NO: 'NO';
NOT: 'NOT' | '!';
NULL: 'NULL';
NULLS: 'NULLS';
OF: 'OF';
ON: 'ON';
ONLY: 'ONLY';
OPTION: 'OPTION';
OPTIONS: 'OPTIONS';
OR: 'OR';
ORDER: 'ORDER';
OUT: 'OUT';
OUTER: 'OUTER';
OUTPUTFORMAT: 'OUTPUTFORMAT';
OVER: 'OVER';
OVERLAPS: 'OVERLAPS';
OVERLAY: 'OVERLAY';
OVERWRITE: 'OVERWRITE';
PARTITION: 'PARTITION';
PARTITIONED: 'PARTITIONED';
PARTITIONS: 'PARTITIONS';
PERCENTILE_CONT: 'PERCENTILE_CONT';
PERCENTLIT: 'PERCENT';
PIVOT: 'PIVOT';
PLACING: 'PLACING';
POSITION: 'POSITION';
PRECEDING: 'PRECEDING';
PRIMARY: 'PRIMARY';
PRINCIPALS: 'PRINCIPALS';
PROPERTIES: 'PROPERTIES';
PURGE: 'PURGE';
QUERY: 'QUERY';
RANGE: 'RANGE';
RECORDREADER: 'RECORDREADER';
RECORDWRITER: 'RECORDWRITER';
RECOVER: 'RECOVER';
REDUCE: 'REDUCE';
REFERENCES: 'REFERENCES';
REFRESH: 'REFRESH';
RENAME: 'RENAME';
REPAIR: 'REPAIR';
REPEATABLE: 'REPEATABLE';
REPLACE: 'REPLACE';
RESET: 'RESET';
RESPECT: 'RESPECT';
RESTRICT: 'RESTRICT';
REVOKE: 'REVOKE';
RIGHT: 'RIGHT';
RLIKE: 'RLIKE' | 'REGEXP';
ROLE: 'ROLE';
ROLES: 'ROLES';
ROLLBACK: 'ROLLBACK';
ROLLUP: 'ROLLUP';
ROW: 'ROW';
ROWS: 'ROWS';
SECOND: 'SECOND';
SCHEMA: 'SCHEMA';
SCHEMAS: 'SCHEMAS';
SELECT: 'SELECT';
SEMI: 'SEMI';
SEPARATED: 'SEPARATED';
SERDE: 'SERDE';
SERDEPROPERTIES: 'SERDEPROPERTIES';
SESSION_USER: 'SESSION_USER';
SET: 'SET';
SETMINUS: 'MINUS';
SETS: 'SETS';
SHOW: 'SHOW';
SKEWED: 'SKEWED';
SOME: 'SOME';
SORT: 'SORT';
SORTED: 'SORTED';
START: 'START';
STATISTICS: 'STATISTICS';
STORED: 'STORED';
STRATIFY: 'STRATIFY';
STRUCT: 'STRUCT';
SUBSTR: 'SUBSTR';
SUBSTRING: 'SUBSTRING';
SYNC: 'SYNC';
SYSTEM_TIME: 'SYSTEM_TIME';
SYSTEM_VERSION: 'SYSTEM_VERSION';
TABLE: 'TABLE';
TABLES: 'TABLES';
TABLESAMPLE: 'TABLESAMPLE';
TBLPROPERTIES: 'TBLPROPERTIES';
TEMPORARY: 'TEMPORARY' | 'TEMP';
TERMINATED: 'TERMINATED';
THEN: 'THEN';
TIME: 'TIME';
TIMESTAMP: 'TIMESTAMP';
TIMESTAMPADD: 'TIMESTAMPADD';
TIMESTAMPDIFF: 'TIMESTAMPDIFF';
TO: 'TO';
TOUCH: 'TOUCH';
TRAILING: 'TRAILING';
TRANSACTION: 'TRANSACTION';
TRANSACTIONS: 'TRANSACTIONS';
TRANSFORM: 'TRANSFORM';
TRIM: 'TRIM';
TRUE: 'TRUE';
TRUNCATE: 'TRUNCATE';
TRY_CAST: 'TRY_CAST';
TYPE: 'TYPE';
UNARCHIVE: 'UNARCHIVE';
UNBOUNDED: 'UNBOUNDED';
UNCACHE: 'UNCACHE';
UNION: 'UNION';
UNIQUE: 'UNIQUE';
UNKNOWN: 'UNKNOWN';
UNLOCK: 'UNLOCK';
UNSET: 'UNSET';
UPDATE: 'UPDATE';
USE: 'USE';
USER: 'USER';
USING: 'USING';
VALUES: 'VALUES';
VERSION: 'VERSION';
VIEW: 'VIEW';
VIEWS: 'VIEWS';
WHEN: 'WHEN';
WHERE: 'WHERE';
WINDOW: 'WINDOW';
WITH: 'WITH';
WITHIN: 'WITHIN';
YEAR: 'YEAR';
ZONE: 'ZONE';
//--SPARK-KEYWORD-LIST-END
//============================
// End of the keywords list
//============================
EQ : '=' | '==';
NSEQ: '<=>';
NEQ : '<>';
NEQJ: '!=';
LT : '<';
LTE : '<=' | '!>';
GT : '>';
GTE : '>=' | '!<';
PLUS: '+';
MINUS: '-';
ASTERISK: '*';
SLASH: '/';
PERCENT: '%';
TILDE: '~';
AMPERSAND: '&';
PIPE: '|';
CONCAT_PIPE: '||';
HAT: '^';
COLON: ':';
ARROW: '->';
HENT_START: '/*+';
HENT_END: '*/';
STRING
: '\'' ( ~('\''|'\\') | ('\\' .) )* '\''
| '"' ( ~('"'|'\\') | ('\\' .) )* '"'
| 'R\'' (~'\'')* '\''
| 'R"'(~'"')* '"'
;
BIGINT_LITERAL
: DIGIT+ 'L'
;
SMALLINT_LITERAL
: DIGIT+ 'S'
;
TINYINT_LITERAL
: DIGIT+ 'Y'
;
INTEGER_VALUE
: DIGIT+
;
EXPONENT_VALUE
: DIGIT+ EXPONENT
| DECIMAL_DIGITS EXPONENT {isValidDecimal()}?
;
DECIMAL_VALUE
: DECIMAL_DIGITS {isValidDecimal()}?
;
FLOAT_LITERAL
: DIGIT+ EXPONENT? 'F'
| DECIMAL_DIGITS EXPONENT? 'F' {isValidDecimal()}?
;
DOUBLE_LITERAL
: DIGIT+ EXPONENT? 'D'
| DECIMAL_DIGITS EXPONENT? 'D' {isValidDecimal()}?
;
BIGDECIMAL_LITERAL
: DIGIT+ EXPONENT? 'BD'
| DECIMAL_DIGITS EXPONENT? 'BD' {isValidDecimal()}?
;
IDENTIFIER
: (LETTER | DIGIT | '_')+
;
BACKQUOTED_IDENTIFIER
: '`' ( ~'`' | '``' )* '`'
;
fragment DECIMAL_DIGITS
: DIGIT+ '.' DIGIT*
| '.' DIGIT+
;
fragment EXPONENT
: 'E' [+-]? DIGIT+
;
fragment DIGIT
: [0-9]
;
fragment LETTER
: [A-Z]
;
SIMPLE_COMMENT
: '--' ('\\\n' | ~[\r\n])* '\r'? '\n'? -> channel(HIDDEN)
;
BRACKETED_COMMENT
: '/*' {!isHint()}? ( BRACKETED_COMMENT | . )*? ('*/' | {markUnclosedComment();} EOF) -> channel(HIDDEN)
;
WS
: [ \r\n\t]+ -> channel(HIDDEN)
;
// Catch-all for anything we can't recognize.
// We use this to be able to ignore and recover all the text
// when splitting statements with DelimiterLexer
UNRECOGNIZED
: .
;
|
libsrc/_DEVELOPMENT/math/float/math48/lm/z80/derror_nannc.asm | jpoikela/z88dk | 640 | 10971 | <gh_stars>100-1000
SECTION code_clib
SECTION code_fp_math48
PUBLIC derror_nannc
EXTERN am48_derror_nannc
defc derror_nannc = am48_derror_nannc
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_958.asm | ljhsiun2/medusa | 9 | 169267 | <reponame>ljhsiun2/medusa
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r13
push %r8
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x10149, %rsi
lea addresses_D_ht+0x123df, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
nop
sub $33417, %rax
mov $66, %rcx
rep movsq
nop
nop
nop
dec %r8
lea addresses_WC_ht+0xf9f1, %rsi
lea addresses_D_ht+0x13f3c, %rdi
clflush (%rsi)
nop
xor $12403, %r10
mov $47, %rcx
rep movsb
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_normal_ht+0x69d7, %rax
nop
nop
add %rbp, %rbp
movups (%rax), %xmm1
vpextrq $0, %xmm1, %r10
nop
nop
sub $43834, %r8
lea addresses_WT_ht+0x13297, %rsi
lea addresses_WT_ht+0x247, %rdi
clflush (%rdi)
nop
inc %r10
mov $78, %rcx
rep movsw
nop
nop
nop
nop
nop
xor $55657, %r10
lea addresses_UC_ht+0x6d97, %r8
nop
nop
nop
nop
add %rbp, %rbp
movb (%r8), %r10b
nop
nop
nop
nop
nop
xor %rdi, %rdi
lea addresses_normal_ht+0x1451e, %rsi
add %rbp, %rbp
mov (%rsi), %r10d
cmp $44696, %rsi
lea addresses_normal_ht+0x1db67, %rdi
nop
nop
nop
xor $52832, %r8
movw $0x6162, (%rdi)
nop
nop
inc %rbp
lea addresses_A_ht+0x4365, %rsi
lea addresses_WT_ht+0x11117, %rdi
nop
cmp %r13, %r13
mov $28, %rcx
rep movsq
nop
nop
nop
nop
nop
sub %rbp, %rbp
lea addresses_WC_ht+0x1717, %rax
nop
add %r8, %r8
movl $0x61626364, (%rax)
nop
nop
nop
nop
xor %rbp, %rbp
lea addresses_WT_ht+0x16797, %rsi
lea addresses_UC_ht+0x5697, %rdi
nop
nop
nop
dec %rax
mov $121, %rcx
rep movsl
nop
nop
nop
and $6407, %rax
lea addresses_UC_ht+0x17897, %r10
nop
sub %rax, %rax
and $0xffffffffffffffc0, %r10
vmovntdqa (%r10), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $1, %xmm7, %r13
nop
nop
nop
cmp %r8, %r8
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r8
pop %r13
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r15
push %rbx
push %rcx
// Faulty Load
lea addresses_PSE+0x7797, %r13
nop
nop
nop
sub %r15, %r15
mov (%r13), %ebx
lea oracles, %rcx
and $0xff, %rbx
shlq $12, %rbx
mov (%rcx,%rbx,1), %rbx
pop %rcx
pop %rbx
pop %r15
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': True, 'congruent': 0, 'type': 'addresses_normal_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_D_ht'}}
{'OP': 'REPM', 'src': {'same': True, 'congruent': 1, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 0, 'type': 'addresses_D_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 6}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_WT_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 4}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 4}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 1, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 7}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'dst': {'same': True, 'congruent': 6, 'type': 'addresses_UC_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': True, 'AVXalign': False, 'size': 32, 'congruent': 8}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
core/lib/groupoids/Groupoids.agda | timjb/HoTT-Agda | 294 | 14212 | <filename>core/lib/groupoids/Groupoids.agda
{-# OPTIONS --without-K --rewriting #-}
module lib.groupoids.Groupoids where
open import lib.groupoids.FundamentalPreGroupoid public
|
alloy4fun_models/trashltl/models/7/mXiGDNPBL3GjbYnZG.als | Kaixi26/org.alloytools.alloy | 0 | 3969 | <reponame>Kaixi26/org.alloytools.alloy
open main
pred idmXiGDNPBL3GjbYnZG_prop8 {
all f1,f2 : File | f1 -> f2 in link implies f1 in Trash
}
pred __repair { idmXiGDNPBL3GjbYnZG_prop8 }
check __repair { idmXiGDNPBL3GjbYnZG_prop8 <=> prop8o } |
HW_Example/h701.asm | smallru8/smallMasmLib | 0 | 244848 | <filename>HW_Example/h701.asm
TITLE (.asm)
INCLUDE Irvine32.inc
INCLUDE Macros.inc
.data
MAX = 100
string1 BYTE MAX+1 DUP(0)
string2 BYTE MAX+1 DUP(0)
.code
main PROC
LOCAL ediLen:DWORD
mWrite "Destination string : "
mov edx,OFFSET string1
mov ecx,MAX
call ReadString
mov edi,OFFSET string1
mov esi,edi
call strlen
mov ediLen,eax
mWrite "Search string : "
mov edx,OFFSET string2
mov ecx,MAX
call ReadString
mov esi,OFFSET string2
call strstr
mWrite "Search result : "
.IF eax > ediLen
mWrite "NO found."
.ELSE
mWrite "OK."
.ENDIF
call crlf
mWrite "Append string : "
mov edx,OFFSET string2
mov ecx,MAX
call ReadString
mov edi,OFFSET string1
mov esi,OFFSET string2
call strcat
mov edx,edi
mWrite "After appending : "
call WriteString
call crlf
exit
main ENDP
;====================
;在字串1中搜尋字串2
;輸入 edi : 字串1
;輸入 esi : 字串2
;輸出 eax : 在字串1的位置
;====================
strstr PROC USES ecx
LOCAL esiPtr:DWORD
LOCAL ediPtr:DWORD
LOCAL esiLen:DWORD
LOCAL ediLen:DWORD
mov esiPtr,esi
mov ediPtr,edi
call strlen
inc eax;加上null byte
mov esiLen,eax
xchg esi,edi
call strlen
inc eax;加上null byte
mov ediLen,eax
xchg esi,edi
mov eax,0
L1:
cmp eax,ediLen
jg Return
cld
mov ecx,esiLen
repe cmpsb
cmp ecx,0
je Return
inc eax
mov edi,ediPtr
mov esi,esiPtr
add edi,eax
jmp L1
Return:
mov edi,ediPtr
mov esi,esiPtr
ret
strstr ENDP
;====================
;取得字串長度
;輸入 esi : 字串
;輸出 eax : 字串長度
;====================
strlen PROC USES edi
mov edi,esi
mov eax,0
L1:
cmp BYTE PTR [edi],0
je Return
inc edi
inc eax
jmp L1
Return:
ret
strlen ENDP
;====================
;將字串2接在字串1後面
;輸入 edi : 字串1
;輸入 esi : 字串2
;====================
strcat PROC USES eax ecx
push edi
push esi
xchg esi,edi
call strlen
xchg esi,edi
add edi,eax
call strlen
mov ecx,eax
inc ecx;加上null byte
cld
rep movsb
pop esi
pop edi
ret
strcat ENDP
END main |
src/asf-beans-flash.adb | jquorning/ada-asf | 12 | 2204 | <reponame>jquorning/ada-asf
-----------------------------------------------------------------------
-- asf-beans-flash -- Bean giving access to the flash context
-- Copyright (C) 2012 <NAME>
-- Written by <NAME> (<EMAIL>)
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-----------------------------------------------------------------------
with ASF.Contexts.Faces;
with ASF.Contexts.Flash;
package body ASF.Beans.Flash is
Bean : aliased Flash_Bean;
-- ------------------------------
-- Get the request header identified by the given name.
-- Returns Null_Object if the request does not define such header.
-- ------------------------------
overriding
function Get_Value (Bean : in Flash_Bean;
Name : in String) return Util.Beans.Objects.Object is
pragma Unreferenced (Bean);
use type ASF.Contexts.Faces.Faces_Context_Access;
Ctx : constant ASF.Contexts.Faces.Faces_Context_Access := ASF.Contexts.Faces.Current;
Flash : ASF.Contexts.Faces.Flash_Context_Access;
begin
if Ctx = null then
return Util.Beans.Objects.Null_Object;
end if;
Flash := Ctx.Get_Flash;
if Name = KEEP_MESSAGES_ATTR_NAME then
return Util.Beans.Objects.To_Object (Flash.Is_Keep_Messages);
else
return Flash.Get_Attribute (Name);
end if;
end Get_Value;
-- ------------------------------
-- Return the Flash_Bean instance.
-- ------------------------------
function Instance return Util.Beans.Objects.Object is
begin
return Util.Beans.Objects.To_Object (Bean'Access, Util.Beans.Objects.STATIC);
end Instance;
end ASF.Beans.Flash;
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1259.asm | ljhsiun2/medusa | 9 | 245933 | <reponame>ljhsiun2/medusa<filename>Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1259.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r14
push %r15
push %r8
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0xd086, %r8
nop
nop
nop
add %r10, %r10
movb (%r8), %al
nop
nop
nop
xor $13725, %r15
lea addresses_WC_ht+0x2d06, %rdi
add $13357, %r14
vmovups (%rdi), %ymm6
vextracti128 $1, %ymm6, %xmm6
vpextrq $1, %xmm6, %r8
nop
nop
nop
and %r14, %r14
lea addresses_D_ht+0x4106, %r10
xor $46154, %r11
mov (%r10), %di
nop
nop
nop
nop
nop
cmp %rax, %rax
lea addresses_WC_ht+0x1272e, %r11
nop
nop
nop
nop
xor %rdi, %rdi
mov (%r11), %rax
nop
nop
nop
nop
xor $20316, %rdi
lea addresses_A_ht+0x4d50, %rsi
lea addresses_WC_ht+0x15e06, %rdi
nop
inc %r10
mov $92, %rcx
rep movsb
nop
nop
nop
nop
nop
xor %r15, %r15
lea addresses_normal_ht+0x175b6, %rsi
lea addresses_A_ht+0x177e6, %rdi
clflush (%rsi)
nop
nop
nop
add $51091, %rax
mov $6, %rcx
rep movsq
nop
nop
nop
dec %r15
lea addresses_WT_ht+0x15906, %rsi
lea addresses_A_ht+0xb686, %rdi
nop
nop
nop
nop
nop
xor $766, %r15
mov $81, %rcx
rep movsw
nop
inc %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r14
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %r15
push %r8
push %rdx
// Faulty Load
lea addresses_D+0x1c106, %r12
inc %r8
movb (%r12), %dl
lea oracles, %r15
and $0xff, %rdx
shlq $12, %rdx
mov (%r15,%rdx,1), %rdx
pop %rdx
pop %r8
pop %r15
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_D', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_D', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': True, 'congruent': 8, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 1, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 7, 'type': 'addresses_WC_ht'}}
{'src': {'same': False, 'congruent': 4, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': True, 'congruent': 4, 'type': 'addresses_A_ht'}}
{'src': {'same': False, 'congruent': 10, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_A_ht'}}
{'36': 21829}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
|
data/pokemon/base_stats/shaymin_s.asm | AtmaBuster/pokeplat-gen2 | 6 | 26485 | <reponame>AtmaBuster/pokeplat-gen2
db 0 ; species ID placeholder
db 100, 103, 75, 127, 120, 75
; hp atk def spd sat sdf
db GRASS, FLYING ; type
db 45 ; catch rate
db 255 ; base exp
db NO_ITEM, NO_ITEM ; items
db GENDER_UNKNOWN ; gender ratio
db 120 ; step cycles to hatch
INCBIN "gfx/pokemon/shaymin_s/front.dimensions"
db GROWTH_MEDIUM_SLOW ; growth rate
dn EGG_NONE, EGG_NONE ; egg groups
db 100 ; happiness
; tm/hm learnset
tmhm TOXIC, BULLET_SEED, HIDDEN_POWER, SUNNY_DAY, HYPER_BEAM, PROTECT, GIGA_DRAIN, SAFEGUARD, FRUSTRATION, SOLARBEAM, RETURN, PSYCHIC_M, DOUBLE_TEAM, FACADE, SECRET_POWER, REST, ENERGY_BALL, ENDURE, GIGA_IMPACT, FLASH, SWORDS_DANCE, PSYCH_UP, SLEEP_TALK, NATURAL_GIFT, GRASS_KNOT, SWAGGER, SUBSTITUTE, AIR_CUTTER, LAST_RESORT, MUD_SLAP, OMINOUS_WIND, SEED_BOMB, SNORE, SWIFT, SYNTHESIS, ZEN_HEADBUTT
; end
|
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