code
stringlengths 4
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stringclasses 2
values |
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//#############################################################################
//# #
//# Copyright (C) <2015> <IMS MAXIMS> #
//# #
//# This program is free software: you can redistribute it and/or modify #
//# it under the terms of the GNU Affero General Public License as #
//# published by the Free Software Foundation, either version 3 of the #
//# License, or (at your option) any later version. #
//# #
//# This program is distributed in the hope that it will be useful, #
//# but WITHOUT ANY WARRANTY; without even the implied warranty of #
//# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the #
//# GNU Affero General Public License for more details. #
//# #
//# You should have received a copy of the GNU Affero General Public License #
//# along with this program. If not, see <http://www.gnu.org/licenses/>. #
//# #
//# IMS MAXIMS provides absolutely NO GUARANTEE OF THE CLINICAL SAFTEY of #
//# this program. Users of this software do so entirely at their own risk. #
//# IMS MAXIMS only ensures the Clinical Safety of unaltered run-time #
//# software that it builds, deploys and maintains. #
//# #
//#############################################################################
//#EOH
// This code was generated by Silviu Checherita using IMS Development Environment (version 1.80 build 5567.19951)
// Copyright (C) 1995-2015 IMS MAXIMS. All rights reserved.
package ims.scheduling.domain.impl;
import java.util.ArrayList;
import java.util.List;
import ims.domain.DomainFactory;
import ims.domain.lookups.LookupInstance;
import ims.scheduling.domain.base.impl.BaseReasonTextDialogImpl;
import ims.scheduling.vo.lookups.CancelAppointmentReason;
import ims.scheduling.vo.lookups.CancelAppointmentReasonCollection;
import ims.scheduling.vo.lookups.Status_Reason;
public class ReasonTextDialogImpl extends BaseReasonTextDialogImpl
{
private static final long serialVersionUID = 1L;
//WDEV-21736
public CancelAppointmentReasonCollection listReasons()
{
DomainFactory factory = getDomainFactory();
ArrayList markers = new ArrayList();
ArrayList values = new ArrayList();
String hql = "SELECT r FROM CancellationTypeReason AS t LEFT JOIN t.cancellationReason as r WHERE t.cancellationType.id = :cancellationType AND r.active = 1";
markers.add("cancellationType");
values.add(Status_Reason.HOSPITALCANCELLED.getID());
List results = factory.find(hql.toString(), markers,values);
if (results == null)
return null;
CancelAppointmentReasonCollection col = new CancelAppointmentReasonCollection();
for (int i=0; i<results.size(); i++)
{
CancelAppointmentReason reason = new CancelAppointmentReason(((LookupInstance) results.get(i)).getId(), ((LookupInstance) results.get(i)).getText(), ((LookupInstance) results.get(i)).isActive());
col.add(reason);
}
return col;
}
//WDEV-21736 ends here
}
| Java |
//#############################################################################
//# #
//# Copyright (C) <2015> <IMS MAXIMS> #
//# #
//# This program is free software: you can redistribute it and/or modify #
//# it under the terms of the GNU Affero General Public License as #
//# published by the Free Software Foundation, either version 3 of the #
//# License, or (at your option) any later version. #
//# #
//# This program is distributed in the hope that it will be useful, #
//# but WITHOUT ANY WARRANTY; without even the implied warranty of #
//# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the #
//# GNU Affero General Public License for more details. #
//# #
//# You should have received a copy of the GNU Affero General Public License #
//# along with this program. If not, see <http://www.gnu.org/licenses/>. #
//# #
//# IMS MAXIMS provides absolutely NO GUARANTEE OF THE CLINICAL SAFTEY of #
//# this program. Users of this software do so entirely at their own risk. #
//# IMS MAXIMS only ensures the Clinical Safety of unaltered run-time #
//# software that it builds, deploys and maintains. #
//# #
//#############################################################################
//#EOH
// This code was generated by Barbara Worwood using IMS Development Environment (version 1.80 build 5589.25814)
// Copyright (C) 1995-2015 IMS MAXIMS. All rights reserved.
// WARNING: DO NOT MODIFY the content of this file
package ims.oncology.vo.lookups;
import ims.framework.cn.data.TreeNode;
import java.util.ArrayList;
import ims.framework.utils.Image;
import ims.framework.utils.Color;
public class GradeofDifferentation extends ims.vo.LookupInstVo implements TreeNode
{
private static final long serialVersionUID = 1L;
public GradeofDifferentation()
{
super();
}
public GradeofDifferentation(int id)
{
super(id, "", true);
}
public GradeofDifferentation(int id, String text, boolean active)
{
super(id, text, active, null, null, null);
}
public GradeofDifferentation(int id, String text, boolean active, GradeofDifferentation parent, Image image)
{
super(id, text, active, parent, image);
}
public GradeofDifferentation(int id, String text, boolean active, GradeofDifferentation parent, Image image, Color color)
{
super(id, text, active, parent, image, color);
}
public GradeofDifferentation(int id, String text, boolean active, GradeofDifferentation parent, Image image, Color color, int order)
{
super(id, text, active, parent, image, color, order);
}
public static GradeofDifferentation buildLookup(ims.vo.LookupInstanceBean bean)
{
return new GradeofDifferentation(bean.getId(), bean.getText(), bean.isActive());
}
public String toString()
{
if(getText() != null)
return getText();
return "";
}
public TreeNode getParentNode()
{
return (GradeofDifferentation)super.getParentInstance();
}
public GradeofDifferentation getParent()
{
return (GradeofDifferentation)super.getParentInstance();
}
public void setParent(GradeofDifferentation parent)
{
super.setParentInstance(parent);
}
public TreeNode[] getChildren()
{
ArrayList children = super.getChildInstances();
GradeofDifferentation[] typedChildren = new GradeofDifferentation[children.size()];
for (int i = 0; i < children.size(); i++)
{
typedChildren[i] = (GradeofDifferentation)children.get(i);
}
return typedChildren;
}
public int addChild(TreeNode child)
{
if (child instanceof GradeofDifferentation)
{
super.addChild((GradeofDifferentation)child);
}
return super.getChildInstances().size();
}
public int removeChild(TreeNode child)
{
if (child instanceof GradeofDifferentation)
{
super.removeChild((GradeofDifferentation)child);
}
return super.getChildInstances().size();
}
public Image getExpandedImage()
{
return super.getImage();
}
public Image getCollapsedImage()
{
return super.getImage();
}
public static ims.framework.IItemCollection getNegativeInstancesAsIItemCollection()
{
GradeofDifferentationCollection result = new GradeofDifferentationCollection();
return result;
}
public static GradeofDifferentation[] getNegativeInstances()
{
return new GradeofDifferentation[] {};
}
public static String[] getNegativeInstanceNames()
{
return new String[] {};
}
public static GradeofDifferentation getNegativeInstance(String name)
{
if(name == null)
return null;
// No negative instances found
return null;
}
public static GradeofDifferentation getNegativeInstance(Integer id)
{
if(id == null)
return null;
// No negative instances found
return null;
}
public int getTypeId()
{
return TYPE_ID;
}
public static final int TYPE_ID = 1251032;
}
| Java |
"""
Test cases to cover Accounts-related behaviors of the User API application
"""
import datetime
import hashlib
import json
from copy import deepcopy
from unittest import mock
import ddt
import pytz
from django.conf import settings
from django.test.testcases import TransactionTestCase
from django.test.utils import override_settings
from django.urls import reverse
from edx_name_affirmation.api import create_verified_name
from edx_name_affirmation.statuses import VerifiedNameStatus
from rest_framework import status
from rest_framework.test import APIClient, APITestCase
from common.djangoapps.student.models import PendingEmailChange, UserProfile
from common.djangoapps.student.tests.factories import TEST_PASSWORD, RegistrationFactory, UserFactory
from openedx.core.djangoapps.oauth_dispatch.jwt import create_jwt_for_user
from openedx.core.djangoapps.user_api.accounts import ACCOUNT_VISIBILITY_PREF_KEY
from openedx.core.djangoapps.user_api.models import UserPreference
from openedx.core.djangoapps.user_api.preferences.api import set_user_preference
from openedx.core.djangolib.testing.utils import CacheIsolationTestCase, skip_unless_lms
from .. import ALL_USERS_VISIBILITY, CUSTOM_VISIBILITY, PRIVATE_VISIBILITY
TEST_PROFILE_IMAGE_UPLOADED_AT = datetime.datetime(2002, 1, 9, 15, 43, 1, tzinfo=pytz.UTC)
# this is used in one test to check the behavior of profile image url
# generation with a relative url in the config.
TEST_PROFILE_IMAGE_BACKEND = deepcopy(settings.PROFILE_IMAGE_BACKEND)
TEST_PROFILE_IMAGE_BACKEND['options']['base_url'] = '/profile-images/'
TEST_BIO_VALUE = "Tired mother of twins"
TEST_LANGUAGE_PROFICIENCY_CODE = "hi"
class UserAPITestCase(APITestCase):
"""
The base class for all tests of the User API
"""
VERIFIED_NAME = "Verified User"
def setUp(self):
super().setUp()
self.anonymous_client = APIClient()
self.different_user = UserFactory.create(password=TEST_PASSWORD)
self.different_client = APIClient()
self.staff_user = UserFactory(is_staff=True, password=TEST_PASSWORD)
self.staff_client = APIClient()
self.user = UserFactory.create(password=TEST_PASSWORD) # will be assigned to self.client by default
def login_client(self, api_client, user):
"""Helper method for getting the client and user and logging in. Returns client. """
client = getattr(self, api_client)
user = getattr(self, user)
client.login(username=user.username, password=TEST_PASSWORD)
return client
def send_post(self, client, json_data, content_type='application/json', expected_status=201):
"""
Helper method for sending a post to the server, defaulting to application/json content_type.
Verifies the expected status and returns the response.
"""
# pylint: disable=no-member
response = client.post(self.url, data=json.dumps(json_data), content_type=content_type)
assert expected_status == response.status_code
return response
def send_patch(self, client, json_data, content_type="application/merge-patch+json", expected_status=200):
"""
Helper method for sending a patch to the server, defaulting to application/merge-patch+json content_type.
Verifies the expected status and returns the response.
"""
# pylint: disable=no-member
response = client.patch(self.url, data=json.dumps(json_data), content_type=content_type)
assert expected_status == response.status_code
return response
def post_search_api(self, client, json_data, content_type='application/json', expected_status=200):
"""
Helper method for sending a post to the server, defaulting to application/merge-patch+json content_type.
Verifies the expected status and returns the response.
"""
# pylint: disable=no-member
response = client.post(self.search_api_url, data=json.dumps(json_data), content_type=content_type)
assert expected_status == response.status_code
return response
def send_get(self, client, query_parameters=None, expected_status=200):
"""
Helper method for sending a GET to the server. Verifies the expected status and returns the response.
"""
url = self.url + '?' + query_parameters if query_parameters else self.url # pylint: disable=no-member
response = client.get(url)
assert expected_status == response.status_code
return response
# pylint: disable=no-member
def send_put(self, client, json_data, content_type="application/json", expected_status=204):
"""
Helper method for sending a PUT to the server. Verifies the expected status and returns the response.
"""
response = client.put(self.url, data=json.dumps(json_data), content_type=content_type)
assert expected_status == response.status_code
return response
# pylint: disable=no-member
def send_delete(self, client, expected_status=204):
"""
Helper method for sending a DELETE to the server. Verifies the expected status and returns the response.
"""
response = client.delete(self.url)
assert expected_status == response.status_code
return response
def create_mock_profile(self, user):
"""
Helper method that creates a mock profile for the specified user
:return:
"""
legacy_profile = UserProfile.objects.get(id=user.id)
legacy_profile.country = "US"
legacy_profile.state = "MA"
legacy_profile.level_of_education = "m"
legacy_profile.year_of_birth = 2000
legacy_profile.goals = "world peace"
legacy_profile.mailing_address = "Park Ave"
legacy_profile.gender = "f"
legacy_profile.bio = TEST_BIO_VALUE
legacy_profile.profile_image_uploaded_at = TEST_PROFILE_IMAGE_UPLOADED_AT
legacy_profile.language_proficiencies.create(code=TEST_LANGUAGE_PROFICIENCY_CODE)
legacy_profile.phone_number = "+18005555555"
legacy_profile.save()
def create_mock_verified_name(self, user):
"""
Helper method to create an approved VerifiedName entry in name affirmation.
"""
legacy_profile = UserProfile.objects.get(id=user.id)
create_verified_name(user, self.VERIFIED_NAME, legacy_profile.name, status=VerifiedNameStatus.APPROVED)
def create_user_registration(self, user):
"""
Helper method that creates a registration object for the specified user
"""
RegistrationFactory(user=user)
def _verify_profile_image_data(self, data, has_profile_image):
"""
Verify the profile image data in a GET response for self.user
corresponds to whether the user has or hasn't set a profile
image.
"""
template = '{root}/{filename}_{{size}}.{extension}'
if has_profile_image:
url_root = 'http://example-storage.com/profile-images'
filename = hashlib.md5(('secret' + self.user.username).encode('utf-8')).hexdigest()
file_extension = 'jpg'
template += '?v={}'.format(TEST_PROFILE_IMAGE_UPLOADED_AT.strftime("%s"))
else:
url_root = 'http://testserver/static'
filename = 'default'
file_extension = 'png'
template = template.format(root=url_root, filename=filename, extension=file_extension)
assert data['profile_image'] == {'has_image': has_profile_image,
'image_url_full': template.format(size=50),
'image_url_small': template.format(size=10)}
@ddt.ddt
@skip_unless_lms
class TestOwnUsernameAPI(CacheIsolationTestCase, UserAPITestCase):
"""
Unit tests for the Accounts API.
"""
ENABLED_CACHES = ['default']
def setUp(self):
super().setUp()
self.url = reverse("own_username_api")
def _verify_get_own_username(self, queries, expected_status=200):
"""
Internal helper to perform the actual assertion
"""
with self.assertNumQueries(queries):
response = self.send_get(self.client, expected_status=expected_status)
if expected_status == 200:
data = response.data
assert 1 == len(data)
assert self.user.username == data['username']
def test_get_username(self):
"""
Test that a client (logged in) can get her own username.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self._verify_get_own_username(17)
def test_get_username_inactive(self):
"""
Test that a logged-in client can get their
username, even if inactive.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.user.is_active = False
self.user.save()
self._verify_get_own_username(17)
def test_get_username_not_logged_in(self):
"""
Test that a client (not logged in) gets a 401
when trying to retrieve their username.
"""
# verify that the endpoint is inaccessible when not logged in
self._verify_get_own_username(13, expected_status=401)
@ddt.ddt
@skip_unless_lms
@mock.patch('openedx.core.djangoapps.user_api.accounts.image_helpers._PROFILE_IMAGE_SIZES', [50, 10])
@mock.patch.dict(
'django.conf.settings.PROFILE_IMAGE_SIZES_MAP',
{'full': 50, 'small': 10},
clear=True
)
class TestAccountsAPI(CacheIsolationTestCase, UserAPITestCase):
"""
Unit tests for the Accounts API.
"""
ENABLED_CACHES = ['default']
TOTAL_QUERY_COUNT = 27
FULL_RESPONSE_FIELD_COUNT = 30
def setUp(self):
super().setUp()
self.url = reverse("accounts_api", kwargs={'username': self.user.username})
self.search_api_url = reverse("accounts_search_emails_api")
def _set_user_age_to_10_years(self, user):
"""
Sets the given user's age to 10.
Returns the calculated year of birth.
"""
legacy_profile = UserProfile.objects.get(id=user.id)
current_year = datetime.datetime.now().year
year_of_birth = current_year - 10
legacy_profile.year_of_birth = year_of_birth
legacy_profile.save()
return year_of_birth
def _verify_full_shareable_account_response(self, response, account_privacy=None, badges_enabled=False):
"""
Verify that the shareable fields from the account are returned
"""
data = response.data
assert 12 == len(data)
# public fields (3)
assert account_privacy == data['account_privacy']
self._verify_profile_image_data(data, True)
assert self.user.username == data['username']
# additional shareable fields (8)
assert TEST_BIO_VALUE == data['bio']
assert 'US' == data['country']
assert data['date_joined'] is not None
assert [{'code': TEST_LANGUAGE_PROFICIENCY_CODE}] == data['language_proficiencies']
assert 'm' == data['level_of_education']
assert data['social_links'] is not None
assert data['time_zone'] is None
assert badges_enabled == data['accomplishments_shared']
def _verify_private_account_response(self, response, requires_parental_consent=False):
"""
Verify that only the public fields are returned if a user does not want to share account fields
"""
data = response.data
assert 3 == len(data)
assert PRIVATE_VISIBILITY == data['account_privacy']
self._verify_profile_image_data(data, not requires_parental_consent)
assert self.user.username == data['username']
def _verify_full_account_response(self, response, requires_parental_consent=False, year_of_birth=2000):
"""
Verify that all account fields are returned (even those that are not shareable).
"""
data = response.data
assert self.FULL_RESPONSE_FIELD_COUNT == len(data)
# public fields (3)
expected_account_privacy = (
PRIVATE_VISIBILITY if requires_parental_consent else
UserPreference.get_value(self.user, 'account_privacy')
)
assert expected_account_privacy == data['account_privacy']
self._verify_profile_image_data(data, not requires_parental_consent)
assert self.user.username == data['username']
# additional shareable fields (8)
assert TEST_BIO_VALUE == data['bio']
assert 'US' == data['country']
assert data['date_joined'] is not None
assert data['last_login'] is not None
assert [{'code': TEST_LANGUAGE_PROFICIENCY_CODE}] == data['language_proficiencies']
assert 'm' == data['level_of_education']
assert data['social_links'] is not None
assert UserPreference.get_value(self.user, 'time_zone') == data['time_zone']
assert data['accomplishments_shared'] is not None
assert ((self.user.first_name + ' ') + self.user.last_name) == data['name']
# additional admin fields (13)
assert self.user.email == data['email']
assert self.user.id == data['id']
assert self.VERIFIED_NAME == data['verified_name']
assert data['extended_profile'] is not None
assert 'MA' == data['state']
assert 'f' == data['gender']
assert 'world peace' == data['goals']
assert data['is_active']
assert 'Park Ave' == data['mailing_address']
assert requires_parental_consent == data['requires_parental_consent']
assert data['secondary_email'] is None
assert data['secondary_email_enabled'] is None
assert year_of_birth == data['year_of_birth']
def test_anonymous_access(self):
"""
Test that an anonymous client (not logged in) cannot call GET or PATCH.
"""
self.send_get(self.anonymous_client, expected_status=401)
self.send_patch(self.anonymous_client, {}, expected_status=401)
def test_unsupported_methods(self):
"""
Test that DELETE, POST, and PUT are not supported.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
assert 405 == self.client.put(self.url).status_code
assert 405 == self.client.post(self.url).status_code
assert 405 == self.client.delete(self.url).status_code
@ddt.data(
("client", "user"),
("staff_client", "staff_user"),
)
@ddt.unpack
def test_get_account_unknown_user(self, api_client, user):
"""
Test that requesting a user who does not exist returns a 404.
"""
client = self.login_client(api_client, user)
response = client.get(reverse("accounts_api", kwargs={'username': "does_not_exist"}))
assert 404 == response.status_code
@ddt.data(
("client", "user"),
)
@ddt.unpack
def test_regsitration_activation_key(self, api_client, user):
"""
Test that registration activation key has a value.
UserFactory does not auto-generate registration object for the test users.
It is created only for users that signup via email/API. Therefore, activation key has to be tested manually.
"""
self.create_user_registration(self.user)
client = self.login_client(api_client, user)
response = self.send_get(client)
assert response.data["activation_key"] is not None
def test_successful_get_account_by_email(self):
"""
Test that request using email by a staff user successfully retrieves Account Info.
"""
api_client = "staff_client"
user = "staff_user"
client = self.login_client(api_client, user)
self.create_mock_profile(self.user)
self.create_mock_verified_name(self.user)
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, PRIVATE_VISIBILITY)
response = self.send_get(client, query_parameters=f'email={self.user.email}')
self._verify_full_account_response(response)
def test_unsuccessful_get_account_by_email(self):
"""
Test that request using email by a normal user fails to retrieve Account Info.
"""
api_client = "client"
user = "user"
client = self.login_client(api_client, user)
self.create_mock_profile(self.user)
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, PRIVATE_VISIBILITY)
response = self.send_get(
client, query_parameters=f'email={self.user.email}', expected_status=status.HTTP_403_FORBIDDEN
)
assert response.data.get('detail') == 'You do not have permission to perform this action.'
def test_successful_get_account_by_user_id(self):
"""
Test that request using lms user id by a staff user successfully retrieves Account Info.
"""
api_client = "staff_client"
user = "staff_user"
url = reverse("accounts_detail_api")
client = self.login_client(api_client, user)
self.create_mock_profile(self.user)
self.create_mock_verified_name(self.user)
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, PRIVATE_VISIBILITY)
response = client.get(url + f'?lms_user_id={self.user.id}')
assert response.status_code == status.HTTP_200_OK
response.data = response.data[0]
self._verify_full_account_response(response)
def test_unsuccessful_get_account_by_user_id(self):
"""
Test that requesting using lms user id by a normal user fails to retrieve Account Info.
"""
api_client = "client"
user = "user"
url = reverse("accounts_detail_api")
client = self.login_client(api_client, user)
self.create_mock_profile(self.user)
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, PRIVATE_VISIBILITY)
response = client.get(url + f'?lms_user_id={self.user.id}')
assert response.status_code == status.HTTP_403_FORBIDDEN
assert response.data.get('detail') == 'You do not have permission to perform this action.'
@ddt.data('abc', '2f', '1.0', "2/8")
def test_get_account_by_user_id_non_integer(self, non_integer_id):
"""
Test that request using a non-integer lms user id by a staff user fails to retrieve Account Info.
"""
api_client = "staff_client"
user = "staff_user"
url = reverse("accounts_detail_api")
client = self.login_client(api_client, user)
self.create_mock_profile(self.user)
self.create_mock_verified_name(self.user)
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, PRIVATE_VISIBILITY)
response = client.get(url + f'?lms_user_id={non_integer_id}')
assert response.status_code == status.HTTP_400_BAD_REQUEST
def test_search_emails(self):
client = self.login_client('staff_client', 'staff_user')
json_data = {'emails': [self.user.email]}
response = self.post_search_api(client, json_data=json_data)
assert response.data == [{'email': self.user.email, 'id': self.user.id, 'username': self.user.username}]
def test_search_emails_with_non_staff_user(self):
client = self.login_client('client', 'user')
json_data = {'emails': [self.user.email]}
response = self.post_search_api(client, json_data=json_data, expected_status=404)
assert response.data == {
'developer_message': "not_found",
'user_message': "Not Found"
}
def test_search_emails_with_non_existing_email(self):
client = self.login_client('staff_client', 'staff_user')
json_data = {"emails": ['[email protected]']}
response = self.post_search_api(client, json_data=json_data)
assert response.data == []
def test_search_emails_with_invalid_param(self):
client = self.login_client('staff_client', 'staff_user')
json_data = {'invalid_key': [self.user.email]}
response = self.post_search_api(client, json_data=json_data, expected_status=400)
assert response.data == {
'developer_message': "'emails' field is required",
'user_message': "'emails' field is required"
}
# Note: using getattr so that the patching works even if there is no configuration.
# This is needed when testing CMS as the patching is still executed even though the
# suite is skipped.
@mock.patch.dict(getattr(settings, "ACCOUNT_VISIBILITY_CONFIGURATION", {}), {"default_visibility": "all_users"})
def test_get_account_different_user_visible(self):
"""
Test that a client (logged in) can only get the shareable fields for a different user.
This is the case when default_visibility is set to "all_users".
"""
self.different_client.login(username=self.different_user.username, password=TEST_PASSWORD)
self.create_mock_profile(self.user)
with self.assertNumQueries(self.TOTAL_QUERY_COUNT):
response = self.send_get(self.different_client)
self._verify_full_shareable_account_response(response, account_privacy=ALL_USERS_VISIBILITY)
# Note: using getattr so that the patching works even if there is no configuration.
# This is needed when testing CMS as the patching is still executed even though the
# suite is skipped.
@mock.patch.dict(getattr(settings, "ACCOUNT_VISIBILITY_CONFIGURATION", {}), {"default_visibility": "private"})
def test_get_account_different_user_private(self):
"""
Test that a client (logged in) can only get the shareable fields for a different user.
This is the case when default_visibility is set to "private".
"""
self.different_client.login(username=self.different_user.username, password=TEST_PASSWORD)
self.create_mock_profile(self.user)
with self.assertNumQueries(self.TOTAL_QUERY_COUNT):
response = self.send_get(self.different_client)
self._verify_private_account_response(response)
@mock.patch.dict(settings.FEATURES, {'ENABLE_OPENBADGES': True})
@ddt.data(
("client", "user", PRIVATE_VISIBILITY),
("different_client", "different_user", PRIVATE_VISIBILITY),
("staff_client", "staff_user", PRIVATE_VISIBILITY),
("client", "user", ALL_USERS_VISIBILITY),
("different_client", "different_user", ALL_USERS_VISIBILITY),
("staff_client", "staff_user", ALL_USERS_VISIBILITY),
)
@ddt.unpack
def test_get_account_private_visibility(self, api_client, requesting_username, preference_visibility):
"""
Test the return from GET based on user visibility setting.
"""
def verify_fields_visible_to_all_users(response):
"""
Confirms that private fields are private, and public/shareable fields are public/shareable
"""
if preference_visibility == PRIVATE_VISIBILITY:
self._verify_private_account_response(response)
else:
self._verify_full_shareable_account_response(response, ALL_USERS_VISIBILITY, badges_enabled=True)
client = self.login_client(api_client, requesting_username)
# Update user account visibility setting.
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, preference_visibility)
self.create_mock_profile(self.user)
self.create_mock_verified_name(self.user)
response = self.send_get(client)
if requesting_username == "different_user":
verify_fields_visible_to_all_users(response)
else:
self._verify_full_account_response(response)
# Verify how the view parameter changes the fields that are returned.
response = self.send_get(client, query_parameters='view=shared')
verify_fields_visible_to_all_users(response)
response = self.send_get(client, query_parameters=f'view=shared&username={self.user.username}')
verify_fields_visible_to_all_users(response)
@ddt.data(
("client", "user"),
("staff_client", "staff_user"),
("different_client", "different_user"),
)
@ddt.unpack
def test_custom_visibility_over_age(self, api_client, requesting_username):
self.create_mock_profile(self.user)
self.create_mock_verified_name(self.user)
# set user's custom visibility preferences
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, CUSTOM_VISIBILITY)
shared_fields = ("bio", "language_proficiencies", "name")
for field_name in shared_fields:
set_user_preference(self.user, f"visibility.{field_name}", ALL_USERS_VISIBILITY)
# make API request
client = self.login_client(api_client, requesting_username)
response = self.send_get(client)
# verify response
if requesting_username == "different_user":
data = response.data
assert 6 == len(data)
# public fields
assert self.user.username == data['username']
assert UserPreference.get_value(self.user, 'account_privacy') == data['account_privacy']
self._verify_profile_image_data(data, has_profile_image=True)
# custom shared fields
assert TEST_BIO_VALUE == data['bio']
assert [{'code': TEST_LANGUAGE_PROFICIENCY_CODE}] == data['language_proficiencies']
assert ((self.user.first_name + ' ') + self.user.last_name) == data['name']
else:
self._verify_full_account_response(response)
@ddt.data(
("client", "user"),
("staff_client", "staff_user"),
("different_client", "different_user"),
)
@ddt.unpack
def test_custom_visibility_under_age(self, api_client, requesting_username):
self.create_mock_profile(self.user)
self.create_mock_verified_name(self.user)
year_of_birth = self._set_user_age_to_10_years(self.user)
# set user's custom visibility preferences
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, CUSTOM_VISIBILITY)
shared_fields = ("bio", "language_proficiencies")
for field_name in shared_fields:
set_user_preference(self.user, f"visibility.{field_name}", ALL_USERS_VISIBILITY)
# make API request
client = self.login_client(api_client, requesting_username)
response = self.send_get(client)
# verify response
if requesting_username == "different_user":
self._verify_private_account_response(response, requires_parental_consent=True)
else:
self._verify_full_account_response(
response,
requires_parental_consent=True,
year_of_birth=year_of_birth,
)
def test_get_account_default(self):
"""
Test that a client (logged in) can get her own account information (using default legacy profile information,
as created by the test UserFactory).
"""
def verify_get_own_information(queries):
"""
Internal helper to perform the actual assertions
"""
with self.assertNumQueries(queries):
response = self.send_get(self.client)
data = response.data
assert self.FULL_RESPONSE_FIELD_COUNT == len(data)
assert self.user.username == data['username']
assert ((self.user.first_name + ' ') + self.user.last_name) == data['name']
for empty_field in ("year_of_birth", "level_of_education", "mailing_address", "bio"):
assert data[empty_field] is None
assert data['country'] is None
assert data['state'] is None
assert 'm' == data['gender']
assert 'Learn a lot' == data['goals']
assert self.user.email == data['email']
assert self.user.id == data['id']
assert data['date_joined'] is not None
assert data['last_login'] is not None
assert self.user.is_active == data['is_active']
self._verify_profile_image_data(data, False)
assert data['requires_parental_consent']
assert [] == data['language_proficiencies']
assert PRIVATE_VISIBILITY == data['account_privacy']
assert data['time_zone'] is None
# Badges aren't on by default, so should not be present.
assert data['accomplishments_shared'] is False
self.client.login(username=self.user.username, password=TEST_PASSWORD)
verify_get_own_information(25)
# Now make sure that the user can get the same information, even if not active
self.user.is_active = False
self.user.save()
verify_get_own_information(17)
def test_get_account_empty_string(self):
"""
Test the conversion of empty strings to None for certain fields.
"""
legacy_profile = UserProfile.objects.get(id=self.user.id)
legacy_profile.country = ""
legacy_profile.state = ""
legacy_profile.level_of_education = ""
legacy_profile.gender = ""
legacy_profile.bio = ""
legacy_profile.save()
self.client.login(username=self.user.username, password=TEST_PASSWORD)
with self.assertNumQueries(25):
response = self.send_get(self.client)
for empty_field in ("level_of_education", "gender", "country", "state", "bio",):
assert response.data[empty_field] is None
@ddt.data(
("different_client", "different_user"),
("staff_client", "staff_user"),
)
@ddt.unpack
def test_patch_account_disallowed_user(self, api_client, user):
"""
Test that a client cannot call PATCH on a different client's user account (even with
is_staff access).
"""
client = self.login_client(api_client, user)
self.send_patch(client, {}, expected_status=403)
@ddt.data(
("client", "user"),
("staff_client", "staff_user"),
)
@ddt.unpack
def test_patch_account_unknown_user(self, api_client, user):
"""
Test that trying to update a user who does not exist returns a 403.
"""
client = self.login_client(api_client, user)
response = client.patch(
reverse("accounts_api", kwargs={'username': "does_not_exist"}),
data=json.dumps({}), content_type="application/merge-patch+json"
)
assert 403 == response.status_code
@ddt.data(
("gender", "f", "not a gender", '"not a gender" is not a valid choice.'),
("level_of_education", "none", "ȻħȺɍłɇs", '"ȻħȺɍłɇs" is not a valid choice.'),
("country", "GB", "XY", '"XY" is not a valid choice.'),
("state", "MA", "PY", '"PY" is not a valid choice.'),
("year_of_birth", 2009, "not_an_int", "A valid integer is required."),
("name", "bob", "z" * 256, "Ensure this field has no more than 255 characters."),
("name", "ȻħȺɍłɇs", " ", "The name field must be at least 1 character long."),
("goals", "Smell the roses"),
("mailing_address", "Sesame Street"),
# Note that we store the raw data, so it is up to client to escape the HTML.
(
"bio", "<html>Lacrosse-playing superhero 壓是進界推日不復女</html>",
"z" * 301, "The about me field must be at most 300 characters long."
),
("account_privacy", ALL_USERS_VISIBILITY),
("account_privacy", PRIVATE_VISIBILITY),
# Note that email is tested below, as it is not immediately updated.
# Note that language_proficiencies is tested below as there are multiple error and success conditions.
)
@ddt.unpack
def test_patch_account(self, field, value, fails_validation_value=None, developer_validation_message=None):
"""
Test the behavior of patch, when using the correct content_type.
"""
client = self.login_client("client", "user")
if field == 'account_privacy':
# Ensure the user has birth year set, and is over 13, so
# account_privacy behaves normally
legacy_profile = UserProfile.objects.get(id=self.user.id)
legacy_profile.year_of_birth = 2000
legacy_profile.save()
response = self.send_patch(client, {field: value})
assert value == response.data[field]
if fails_validation_value:
error_response = self.send_patch(client, {field: fails_validation_value}, expected_status=400)
expected_user_message = 'This value is invalid.'
if field == 'bio':
expected_user_message = "The about me field must be at most 300 characters long."
assert expected_user_message == error_response.data['field_errors'][field]['user_message']
assert "Value '{value}' is not valid for field '{field}': {messages}".format(
value=fails_validation_value,
field=field,
messages=[developer_validation_message]
) == error_response.data['field_errors'][field]['developer_message']
elif field != "account_privacy":
# If there are no values that would fail validation, then empty string should be supported;
# except for account_privacy, which cannot be an empty string.
response = self.send_patch(client, {field: ""})
assert '' == response.data[field]
def test_patch_inactive_user(self):
""" Verify that a user can patch her own account, even if inactive. """
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.user.is_active = False
self.user.save()
response = self.send_patch(self.client, {"goals": "to not activate account"})
assert 'to not activate account' == response.data['goals']
@ddt.unpack
def test_patch_account_noneditable(self):
"""
Tests the behavior of patch when a read-only field is attempted to be edited.
"""
client = self.login_client("client", "user")
def verify_error_response(field_name, data):
"""
Internal helper to check the error messages returned
"""
assert 'This field is not editable via this API' == data['field_errors'][field_name]['developer_message']
assert "The '{}' field cannot be edited.".format(
field_name
) == data['field_errors'][field_name]['user_message']
for field_name in ["username", "date_joined", "is_active", "profile_image", "requires_parental_consent"]:
response = self.send_patch(client, {field_name: "will_error", "gender": "o"}, expected_status=400)
verify_error_response(field_name, response.data)
# Make sure that gender did not change.
response = self.send_get(client)
assert 'm' == response.data['gender']
# Test error message with multiple read-only items
response = self.send_patch(client, {"username": "will_error", "date_joined": "xx"}, expected_status=400)
assert 2 == len(response.data['field_errors'])
verify_error_response("username", response.data)
verify_error_response("date_joined", response.data)
def test_patch_bad_content_type(self):
"""
Test the behavior of patch when an incorrect content_type is specified.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.send_patch(self.client, {}, content_type="application/json", expected_status=415)
self.send_patch(self.client, {}, content_type="application/xml", expected_status=415)
def test_patch_account_empty_string(self):
"""
Tests the behavior of patch when attempting to set fields with a select list of options to the empty string.
Also verifies the behaviour when setting to None.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
for field_name in ["gender", "level_of_education", "country", "state"]:
response = self.send_patch(self.client, {field_name: ""})
# Although throwing a 400 might be reasonable, the default DRF behavior with ModelSerializer
# is to convert to None, which also seems acceptable (and is difficult to override).
assert response.data[field_name] is None
# Verify that the behavior is the same for sending None.
response = self.send_patch(self.client, {field_name: ""})
assert response.data[field_name] is None
def test_patch_name_metadata(self):
"""
Test the metadata stored when changing the name field.
"""
def get_name_change_info(expected_entries):
"""
Internal method to encapsulate the retrieval of old names used
"""
legacy_profile = UserProfile.objects.get(id=self.user.id)
name_change_info = legacy_profile.get_meta()["old_names"]
assert expected_entries == len(name_change_info)
return name_change_info
def verify_change_info(change_info, old_name, requester, new_name):
"""
Internal method to validate name changes
"""
assert 3 == len(change_info)
assert old_name == change_info[0]
assert f'Name change requested through account API by {requester}' == change_info[1]
assert change_info[2] is not None
# Verify the new name was also stored.
get_response = self.send_get(self.client)
assert new_name == get_response.data['name']
self.client.login(username=self.user.username, password=TEST_PASSWORD)
legacy_profile = UserProfile.objects.get(id=self.user.id)
assert {} == legacy_profile.get_meta()
old_name = legacy_profile.name
# First change the name as the user and verify meta information.
self.send_patch(self.client, {"name": "Mickey Mouse"})
name_change_info = get_name_change_info(1)
verify_change_info(name_change_info[0], old_name, self.user.username, "Mickey Mouse")
# Now change the name again and verify meta information.
self.send_patch(self.client, {"name": "Donald Duck"})
name_change_info = get_name_change_info(2)
verify_change_info(name_change_info[0], old_name, self.user.username, "Donald Duck", )
verify_change_info(name_change_info[1], "Mickey Mouse", self.user.username, "Donald Duck")
@mock.patch.dict(
'django.conf.settings.PROFILE_IMAGE_SIZES_MAP',
{'full': 50, 'medium': 30, 'small': 10},
clear=True
)
def test_patch_email(self):
"""
Test that the user can request an email change through the accounts API.
Full testing of the helper method used (do_email_change_request) exists in the package with the code.
Here just do minimal smoke testing.
"""
client = self.login_client("client", "user")
old_email = self.user.email
new_email = "[email protected]"
response = self.send_patch(client, {"email": new_email, "goals": "change my email"})
# Since request is multi-step, the email won't change on GET immediately (though goals will update).
assert old_email == response.data['email']
assert 'change my email' == response.data['goals']
# Now call the method that will be invoked with the user clicks the activation key in the received email.
# First we must get the activation key that was sent.
pending_change = PendingEmailChange.objects.filter(user=self.user)
assert 1 == len(pending_change)
activation_key = pending_change[0].activation_key
confirm_change_url = reverse(
"confirm_email_change", kwargs={'key': activation_key}
)
response = self.client.post(confirm_change_url)
assert 200 == response.status_code
get_response = self.send_get(client)
assert new_email == get_response.data['email']
@ddt.data(
("not_an_email",),
("",),
(None,),
)
@ddt.unpack
def test_patch_invalid_email(self, bad_email):
"""
Test a few error cases for email validation (full test coverage lives with do_email_change_request).
"""
client = self.login_client("client", "user")
# Try changing to an invalid email to make sure error messages are appropriately returned.
error_response = self.send_patch(client, {"email": bad_email}, expected_status=400)
field_errors = error_response.data["field_errors"]
assert "Error thrown from validate_new_email: 'Valid e-mail address required.'" == \
field_errors['email']['developer_message']
assert 'Valid e-mail address required.' == field_errors['email']['user_message']
@mock.patch('common.djangoapps.student.views.management.do_email_change_request')
def test_patch_duplicate_email(self, do_email_change_request):
"""
Test that same success response will be sent to user even if the given email already used.
"""
existing_email = "[email protected]"
UserFactory.create(email=existing_email)
client = self.login_client("client", "user")
# Try changing to an existing email to make sure no error messages returned.
response = self.send_patch(client, {"email": existing_email})
assert 200 == response.status_code
# Verify that no actual request made for email change
assert not do_email_change_request.called
def test_patch_language_proficiencies(self):
"""
Verify that patching the language_proficiencies field of the user
profile completely overwrites the previous value.
"""
client = self.login_client("client", "user")
# Patching language_proficiencies exercises the
# `LanguageProficiencySerializer.get_identity` method, which compares
# identifies language proficiencies based on their language code rather
# than django model id.
for proficiencies in ([{"code": "en"}, {"code": "fr"}, {"code": "es"}], [{"code": "fr"}], [{"code": "aa"}], []):
response = self.send_patch(client, {"language_proficiencies": proficiencies})
self.assertCountEqual(response.data["language_proficiencies"], proficiencies)
@ddt.data(
(
"not_a_list",
{'non_field_errors': ['Expected a list of items but got type "unicode".']}
),
(
["not_a_JSON_object"],
[{'non_field_errors': ['Invalid data. Expected a dictionary, but got unicode.']}]
),
(
[{}],
[{'code': ['This field is required.']}]
),
(
[{"code": "invalid_language_code"}],
[{'code': ['"invalid_language_code" is not a valid choice.']}]
),
(
[{"code": "kw"}, {"code": "el"}, {"code": "kw"}],
['The language_proficiencies field must consist of unique languages.']
),
)
@ddt.unpack
def test_patch_invalid_language_proficiencies(self, patch_value, expected_error_message):
"""
Verify we handle error cases when patching the language_proficiencies
field.
"""
expected_error_message = str(expected_error_message).replace('unicode', 'str')
client = self.login_client("client", "user")
response = self.send_patch(client, {"language_proficiencies": patch_value}, expected_status=400)
assert response.data['field_errors']['language_proficiencies']['developer_message'] == \
f"Value '{patch_value}' is not valid for field 'language_proficiencies': {expected_error_message}"
@mock.patch('openedx.core.djangoapps.user_api.accounts.serializers.AccountUserSerializer.save')
def test_patch_serializer_save_fails(self, serializer_save):
"""
Test that AccountUpdateErrors are passed through to the response.
"""
serializer_save.side_effect = [Exception("bummer"), None]
self.client.login(username=self.user.username, password=TEST_PASSWORD)
error_response = self.send_patch(self.client, {"goals": "save an account field"}, expected_status=400)
assert "Error thrown when saving account updates: 'bummer'" == error_response.data['developer_message']
assert error_response.data['user_message'] is None
@override_settings(PROFILE_IMAGE_BACKEND=TEST_PROFILE_IMAGE_BACKEND)
def test_convert_relative_profile_url(self):
"""
Test that when TEST_PROFILE_IMAGE_BACKEND['base_url'] begins
with a '/', the API generates the full URL to profile images based on
the URL of the request.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
response = self.send_get(self.client)
assert response.data['profile_image'] == \
{'has_image': False,
'image_url_full': 'http://testserver/static/default_50.png',
'image_url_small': 'http://testserver/static/default_10.png'}
@ddt.data(
("client", "user", True),
("different_client", "different_user", False),
("staff_client", "staff_user", True),
)
@ddt.unpack
def test_parental_consent(self, api_client, requesting_username, has_full_access):
"""
Verifies that under thirteens never return a public profile.
"""
client = self.login_client(api_client, requesting_username)
year_of_birth = self._set_user_age_to_10_years(self.user)
set_user_preference(self.user, ACCOUNT_VISIBILITY_PREF_KEY, ALL_USERS_VISIBILITY)
# Verify that the default view is still private (except for clients with full access)
response = self.send_get(client)
if has_full_access:
data = response.data
assert self.FULL_RESPONSE_FIELD_COUNT == len(data)
assert self.user.username == data['username']
assert ((self.user.first_name + ' ') + self.user.last_name) == data['name']
assert self.user.email == data['email']
assert self.user.id == data['id']
assert year_of_birth == data['year_of_birth']
for empty_field in ("country", "level_of_education", "mailing_address", "bio", "state",):
assert data[empty_field] is None
assert 'm' == data['gender']
assert 'Learn a lot' == data['goals']
assert data['is_active']
assert data['date_joined'] is not None
assert data['last_login'] is not None
self._verify_profile_image_data(data, False)
assert data['requires_parental_consent']
assert PRIVATE_VISIBILITY == data['account_privacy']
else:
self._verify_private_account_response(response, requires_parental_consent=True)
# Verify that the shared view is still private
response = self.send_get(client, query_parameters='view=shared')
self._verify_private_account_response(response, requires_parental_consent=True)
@skip_unless_lms
class TestAccountAPITransactions(TransactionTestCase):
"""
Tests the transactional behavior of the account API
"""
def setUp(self):
super().setUp()
self.client = APIClient()
self.user = UserFactory.create(password=TEST_PASSWORD)
self.url = reverse("accounts_api", kwargs={'username': self.user.username})
@mock.patch('common.djangoapps.student.views.do_email_change_request')
def test_update_account_settings_rollback(self, mock_email_change):
"""
Verify that updating account settings is transactional when a failure happens.
"""
# Send a PATCH request with updates to both profile information and email.
# Throw an error from the method that is used to process the email change request
# (this is the last thing done in the api method). Verify that the profile did not change.
mock_email_change.side_effect = [ValueError, "mock value error thrown"]
self.client.login(username=self.user.username, password=TEST_PASSWORD)
old_email = self.user.email
json_data = {"email": "[email protected]", "gender": "o"}
response = self.client.patch(self.url, data=json.dumps(json_data), content_type="application/merge-patch+json")
assert 400 == response.status_code
# Verify that GET returns the original preferences
response = self.client.get(self.url)
data = response.data
assert old_email == data['email']
assert 'm' == data['gender']
@ddt.ddt
class NameChangeViewTests(UserAPITestCase):
""" NameChangeView tests """
def setUp(self):
super().setUp()
self.url = reverse('name_change')
def test_request_succeeds(self):
"""
Test that a valid name change request succeeds.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.send_post(self.client, {'name': 'New Name'})
def test_unauthenticated(self):
"""
Test that a name change request fails for an unauthenticated user.
"""
self.send_post(self.client, {'name': 'New Name'}, expected_status=401)
def test_empty_request(self):
"""
Test that an empty request fails.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.send_post(self.client, {}, expected_status=400)
def test_blank_name(self):
"""
Test that a blank name string fails.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.send_post(self.client, {'name': ''}, expected_status=400)
@ddt.data('<html>invalid name</html>', 'https://invalid.com')
def test_fails_validation(self, invalid_name):
"""
Test that an invalid name will return an error.
"""
self.client.login(username=self.user.username, password=TEST_PASSWORD)
self.send_post(
self.client,
{'name': invalid_name},
expected_status=400
)
@ddt.ddt
@mock.patch('django.conf.settings.USERNAME_REPLACEMENT_WORKER', 'test_replace_username_service_worker')
class UsernameReplacementViewTests(APITestCase):
""" Tests UsernameReplacementView """
SERVICE_USERNAME = 'test_replace_username_service_worker'
def setUp(self):
super().setUp()
self.service_user = UserFactory(username=self.SERVICE_USERNAME)
self.url = reverse("username_replacement")
def build_jwt_headers(self, user):
"""
Helper function for creating headers for the JWT authentication.
"""
token = create_jwt_for_user(user)
headers = {'HTTP_AUTHORIZATION': f'JWT {token}'}
return headers
def call_api(self, user, data):
""" Helper function to call API with data """
data = json.dumps(data)
headers = self.build_jwt_headers(user)
return self.client.post(self.url, data, content_type='application/json', **headers)
def test_auth(self):
""" Verify the endpoint only works with the service worker """
data = {
"username_mappings": [
{"test_username_1": "test_new_username_1"},
{"test_username_2": "test_new_username_2"}
]
}
# Test unauthenticated
response = self.client.post(self.url)
assert response.status_code == 401
# Test non-service worker
random_user = UserFactory()
response = self.call_api(random_user, data)
assert response.status_code == 403
# Test service worker
response = self.call_api(self.service_user, data)
assert response.status_code == 200
@ddt.data(
[{}, {}],
{},
[{"test_key": "test_value", "test_key_2": "test_value_2"}]
)
def test_bad_schema(self, mapping_data):
""" Verify the endpoint rejects bad data schema """
data = {
"username_mappings": mapping_data
}
response = self.call_api(self.service_user, data)
assert response.status_code == 400
def test_existing_and_non_existing_users(self):
""" Tests a mix of existing and non existing users """
random_users = [UserFactory() for _ in range(5)]
fake_usernames = ["myname_" + str(x) for x in range(5)]
existing_users = [{user.username: user.username + '_new'} for user in random_users]
non_existing_users = [{username: username + '_new'} for username in fake_usernames]
data = {
"username_mappings": existing_users + non_existing_users
}
expected_response = {
'failed_replacements': [],
'successful_replacements': existing_users + non_existing_users
}
response = self.call_api(self.service_user, data)
assert response.status_code == 200
assert response.data == expected_response
| Java |
div.rename-database-overlay {
position: absolute;
top: 0%;
left: 0%;
width: 100%;
height: 100%;
background-color: black;
z-index:1001;
-moz-opacity: 0.8;
opacity:.80;
filter: alpha(opacity=80);
}
div.rename-database-content {
position: absolute;
top: 25%;
left: 25%;
width: 50%;
height: 50%;
-webkit-border-radius: 10px;
-webkit-box-shadow: 3px 3px 4px #000;
-moz-border-radius: 10px;
-moz-box-shadow: 3px 3px 4px #000;
padding: 20px;
background-color: white;
z-index:1002;
overflow: auto;
text-align: center;
background-color: #EFF5FB;
}
span.rename-database-welcome {
font-size: 32px;
font-weight: bold;
color: #424242;
}
span.rename-database-name {
font-size: 20px;
color: #424242;
}
input.rename-database-input {
font-size: 20px;
text-align: center;
width: 300px;
color: #424242;
}
button.rename-database-button {
-webkit-border-radius: 10px;
-webkit-box-shadow: 3px 3px 4px #000;
-moz-border-radius: 10px;
-moz-box-shadow: 3px 3px 4px #000;
font-size: 20px;
background-color: #045FB4;
color: white;
width: 150px;
}
button.rename-database-button[disabled] {
background-color: #ddd;
}
| Java |
<div data-role="header">
<h1>Prijave problema koje nisu poslate</h1>
</div>
<div data-role="content" role="main">
<div id="existing_report">
<% if ( title ) { %>
<h3><%= title %></h3>
<% } %>
<div class="meta">
<p>
<% if ( category && category != '-- Izaberite kategoriju --' ) { %>
Saved in the <%= category %> category
<% } %>
</p>
<p><% print( moment( created ).fromNow() ) %></p>
</div>
<% if ( file ) { %>
<div class="photo" style="background-image: url(<%= file %>)"></div>
<% } %>
<% if ( details ) { %>
<div class="details"><div><%= details %></div></div>
<% } %>
</div>
<div class="right">
<input id="use_report" type="button" value="Završite prijavu sada" data-role="button" data-theme="a" />
<input id="save_report" type="button" value="Sačuvaj za kasnije" data-role="button" data-theme="a" />
<input id="discard" type="button" value="Odbaci" data-role="button" data-theme="a" />
</div>
</div>
| Java |
/*
* RapidMiner
*
* Copyright (C) 2001-2014 by RapidMiner and the contributors
*
* Complete list of developers available at our web site:
*
* http://rapidminer.com
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU Affero General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Affero General Public License for more details.
*
* You should have received a copy of the GNU Affero General Public License
* along with this program. If not, see http://www.gnu.org/licenses/.
*/
package com.rapid_i.deployment.update.client;
import java.awt.BorderLayout;
import java.awt.Dimension;
import java.awt.event.ActionEvent;
import java.awt.event.KeyEvent;
import java.io.File;
import java.util.ArrayList;
import java.util.HashMap;
import java.util.HashSet;
import java.util.LinkedList;
import java.util.List;
import java.util.logging.Level;
import javax.swing.Action;
import javax.swing.BorderFactory;
import javax.swing.JButton;
import javax.swing.JCheckBox;
import javax.swing.JComponent;
import javax.swing.JLabel;
import javax.swing.JList;
import javax.swing.JPanel;
import javax.swing.JScrollPane;
import javax.swing.KeyStroke;
import javax.swing.SwingUtilities;
import javax.swing.border.EmptyBorder;
import javax.swing.border.EtchedBorder;
import javax.xml.parsers.DocumentBuilderFactory;
import javax.xml.parsers.ParserConfigurationException;
import org.w3c.dom.Document;
import org.w3c.dom.Element;
import com.rapid_i.deployment.update.client.listmodels.AbstractPackageListModel;
import com.rapidminer.deployment.client.wsimport.PackageDescriptor;
import com.rapidminer.deployment.client.wsimport.UpdateService;
import com.rapidminer.gui.RapidMinerGUI;
import com.rapidminer.gui.tools.ExtendedJScrollPane;
import com.rapidminer.gui.tools.ProgressThread;
import com.rapidminer.gui.tools.ResourceAction;
import com.rapidminer.gui.tools.SwingTools;
import com.rapidminer.gui.tools.dialogs.ButtonDialog;
import com.rapidminer.gui.tools.dialogs.ConfirmDialog;
import com.rapidminer.io.process.XMLTools;
import com.rapidminer.tools.FileSystemService;
import com.rapidminer.tools.I18N;
import com.rapidminer.tools.LogService;
import com.rapidminer.tools.ParameterService;
import com.rapidminer.tools.XMLException;
/**
* The Dialog is eventually shown at the start of RapidMiner, if the user purchased extensions online but haven't installed them yet.
*
* @author Dominik Halfkann
*/
public class PendingPurchasesInstallationDialog extends ButtonDialog {
private static final long serialVersionUID = 1L;
private final PackageDescriptorCache packageDescriptorCache = new PackageDescriptorCache();
private AbstractPackageListModel purchasedModel = new PurchasedNotInstalledModel(packageDescriptorCache);
JCheckBox neverAskAgain = new JCheckBox(I18N.getMessage(I18N.getGUIBundle(), "gui.dialog.purchased_not_installed.not_check_on_startup"));
private final List<String> packages;
private boolean isConfirmed;
private LinkedList<PackageDescriptor> installablePackageList;
private JButton remindNeverButton;
private JButton remindLaterButton;
private JButton okButton;
private class PurchasedNotInstalledModel extends AbstractPackageListModel {
private static final long serialVersionUID = 1L;
public PurchasedNotInstalledModel(PackageDescriptorCache cache) {
super(cache, "gui.dialog.update.tab.no_packages");
}
@Override
public List<String> handleFetchPackageNames() {
return packages;
}
}
public PendingPurchasesInstallationDialog(List<String> packages) {
super("purchased_not_installed");
this.packages = packages;
remindNeverButton = remindNeverButton();
remindLaterButton = remindLaterButton();
okButton = makeOkButton("install_purchased");
layoutDefault(makeContentPanel(), NORMAL, okButton, remindNeverButton, remindLaterButton);
this.setPreferredSize(new Dimension(404, 430));
this.setMaximumSize(new Dimension(404, 430));
this.setMinimumSize(new Dimension(404, 300));
this.setSize(new Dimension(404, 430));
}
private JPanel makeContentPanel() {
BorderLayout layout = new BorderLayout(12, 12);
JPanel panel = new JPanel(layout);
panel.setBorder(new EmptyBorder(0, 12, 8, 12));
panel.add(createExtensionListScrollPane(purchasedModel), BorderLayout.CENTER);
purchasedModel.update();
JPanel southPanel = new JPanel(new BorderLayout(0, 7));
JLabel question = new JLabel(I18N.getMessage(I18N.getGUIBundle(), "gui.dialog.purchased_not_installed.should_install"));
southPanel.add(question, BorderLayout.CENTER);
southPanel.add(neverAskAgain, BorderLayout.SOUTH);
panel.add(southPanel, BorderLayout.SOUTH);
return panel;
}
private JScrollPane createExtensionListScrollPane(AbstractPackageListModel model) {
final JList updateList = new JList(model);
updateList.setCellRenderer(new UpdateListCellRenderer(true));
JScrollPane extensionListScrollPane = new ExtendedJScrollPane(updateList);
extensionListScrollPane.setBorder(BorderFactory.createEtchedBorder(EtchedBorder.LOWERED));
return extensionListScrollPane;
}
private JButton remindLaterButton() {
Action Action = new ResourceAction("ask_later") {
private static final long serialVersionUID = 1L;
@Override
public void actionPerformed(ActionEvent e) {
wasConfirmed = false;
checkNeverAskAgain();
close();
}
};
getRootPane().getInputMap(JComponent.WHEN_IN_FOCUSED_WINDOW).put(KeyStroke.getKeyStroke(KeyEvent.VK_ESCAPE, 0, false), "CLOSE");
getRootPane().getActionMap().put("CLOSE", Action);
JButton button = new JButton(Action);
getRootPane().setDefaultButton(button);
return button;
}
private JButton remindNeverButton() {
Action Action = new ResourceAction("ask_never") {
private static final long serialVersionUID = 1L;
@Override
public void actionPerformed(ActionEvent e) {
wasConfirmed = false;
checkNeverAskAgain();
neverRemindAgain();
close();
}
};
JButton button = new JButton(Action);
getRootPane().setDefaultButton(button);
return button;
}
@Override
protected void ok() {
checkNeverAskAgain();
startUpdate(getPackageDescriptorList());
dispose();
}
public List<PackageDescriptor> getPackageDescriptorList() {
List<PackageDescriptor> packageList = new ArrayList<PackageDescriptor>();
for (int a = 0; a < purchasedModel.getSize(); a++) {
Object listItem = purchasedModel.getElementAt(a);
if (listItem instanceof PackageDescriptor) {
packageList.add((PackageDescriptor) listItem);
}
}
return packageList;
}
public void startUpdate(final List<PackageDescriptor> downloadList) {
final UpdateService service;
try {
service = UpdateManager.getService();
} catch (Exception e) {
SwingTools.showSimpleErrorMessage("failed_update_server", e, UpdateManager.getBaseUrl());
return;
}
new ProgressThread("resolving_dependencies", true) {
@Override
public void run() {
try {
getProgressListener().setTotal(100);
remindLaterButton.setEnabled(false);
remindNeverButton.setEnabled(false);
final HashMap<PackageDescriptor, HashSet<PackageDescriptor>> dependency = UpdateDialog.resolveDependency(downloadList, packageDescriptorCache);
getProgressListener().setCompleted(30);
installablePackageList = UpdateDialog.getPackagesforInstallation(dependency);
final HashMap<String, String> licenseNameToLicenseTextMap = UpdateDialog.collectLicenses(installablePackageList,getProgressListener(),100,30,100);
SwingUtilities.invokeLater(new Runnable() {
@Override
public void run() {
isConfirmed = ConfirmLicensesDialog.confirm(dependency, licenseNameToLicenseTextMap);
new ProgressThread("installing_updates", true) {
@Override
public void run() {
try {
if (isConfirmed) {
getProgressListener().setTotal(100);
getProgressListener().setCompleted(20);
UpdateService service = UpdateManager.getService();
UpdateManager um = new UpdateManager(service);
List<PackageDescriptor> installedPackages = um.performUpdates(installablePackageList, getProgressListener());
getProgressListener().setCompleted(40);
if (installedPackages.size() > 0) {
int confirmation = SwingTools.showConfirmDialog((installedPackages.size() == 1 ? "update.complete_restart" : "update.complete_restart1"),
ConfirmDialog.YES_NO_OPTION, installedPackages.size());
if (confirmation == ConfirmDialog.YES_OPTION) {
RapidMinerGUI.getMainFrame().exit(true);
} else if (confirmation == ConfirmDialog.NO_OPTION) {
if (installedPackages.size() == installablePackageList.size()) {
dispose();
}
}
}
getProgressListener().complete();
}
} catch (Exception e) {
SwingTools.showSimpleErrorMessage("error_installing_update", e, e.getMessage());
} finally {
getProgressListener().complete();
}
}
}.start();
}
});
remindLaterButton.setEnabled(true);
remindNeverButton.setEnabled(true);
getProgressListener().complete();
} catch (Exception e) {
SwingTools.showSimpleErrorMessage("error_resolving_dependencies", e, e.getMessage());
}
}
}.start();
}
private void checkNeverAskAgain() {
if (neverAskAgain.isSelected()) {
ParameterService.setParameterValue(RapidMinerGUI.PROPERTY_RAPIDMINER_GUI_PURCHASED_NOT_INSTALLED_CHECK, "false");
ParameterService.saveParameters();
}
}
private void neverRemindAgain() {
LogService.getRoot().log(Level.CONFIG, "com.rapid_i.deployment.update.client.PurchasedNotInstalledDialog.saving_ignored_extensions_file");
Document doc;
try {
doc = DocumentBuilderFactory.newInstance().newDocumentBuilder().newDocument();
} catch (ParserConfigurationException e) {
LogService.getRoot().log(Level.WARNING,
I18N.getMessage(LogService.getRoot().getResourceBundle(),
"com.rapid_i.deployment.update.client.PurchasedNotInstalledDialog.creating_xml_document_error",
e),
e);
return;
}
Element root = doc.createElement(UpdateManager.NEVER_REMIND_INSTALL_EXTENSIONS_FILE_NAME);
doc.appendChild(root);
for (String i : purchasedModel.fetchPackageNames()) {
Element entryElem = doc.createElement("extension_name");
entryElem.setTextContent(i);
root.appendChild(entryElem);
}
File file = FileSystemService.getUserConfigFile(UpdateManager.NEVER_REMIND_INSTALL_EXTENSIONS_FILE_NAME);
try {
XMLTools.stream(doc, file, null);
} catch (XMLException e) {
LogService.getRoot().log(Level.WARNING,
I18N.getMessage(LogService.getRoot().getResourceBundle(),
"com.rapid_i.deployment.update.client.PurchasedNotInstalledDialog.saving_ignored_extensions_file_error",
e),
e);
}
}
}
| Java |
def _checkInput(index):
if index < 0:
raise ValueError("Indice negativo non supportato [{}]".format(index))
elif type(index) != int:
raise TypeError("Inserire un intero [tipo input {}]".format(type(index).__name__))
def fib_from_string(index):
_checkInput(index)
serie = "0 1 1 2 3 5 8".replace(" ", "")
return int(serie[index])
def fib_from_list(index):
_checkInput(index)
serie = [0,1,1,2,3,5,8]
return serie[index]
def fib_from_algo(index):
_checkInput(index)
current_number = current_index = 0
base = 1
while current_index < index:
old_base = current_number
current_number = current_number + base
base = old_base
current_index += 1
pass
return current_number
def recursion(index):
if index <= 1:
return index
return recursion(index - 1) + recursion(index - 2)
def fib_from_recursion_func(index):
_checkInput(index)
return recursion(index)
calculate = fib_from_recursion_func | Java |
package rpcclient
import (
"context"
"encoding/json"
"net"
"net/http"
"net/http/httptest"
"sync"
"testing"
"time"
"github.com/gorilla/websocket"
"github.com/stretchr/testify/require"
"github.com/tendermint/tmlibs/log"
types "github.com/tendermint/tendermint/rpc/lib/types"
)
type myHandler struct {
closeConnAfterRead bool
mtx sync.RWMutex
}
var upgrader = websocket.Upgrader{
ReadBufferSize: 1024,
WriteBufferSize: 1024,
}
func (h *myHandler) ServeHTTP(w http.ResponseWriter, r *http.Request) {
conn, err := upgrader.Upgrade(w, r, nil)
if err != nil {
panic(err)
}
defer conn.Close()
for {
messageType, _, err := conn.ReadMessage()
if err != nil {
return
}
h.mtx.RLock()
if h.closeConnAfterRead {
conn.Close()
}
h.mtx.RUnlock()
res := json.RawMessage(`{}`)
emptyRespBytes, _ := json.Marshal(types.RPCResponse{Result: &res})
if err := conn.WriteMessage(messageType, emptyRespBytes); err != nil {
return
}
}
}
func TestWSClientReconnectsAfterReadFailure(t *testing.T) {
var wg sync.WaitGroup
// start server
h := &myHandler{}
s := httptest.NewServer(h)
defer s.Close()
c := startClient(t, s.Listener.Addr())
defer c.Stop()
wg.Add(1)
go callWgDoneOnResult(t, c, &wg)
h.mtx.Lock()
h.closeConnAfterRead = true
h.mtx.Unlock()
// results in WS read error, no send retry because write succeeded
call(t, "a", c)
// expect to reconnect almost immediately
time.Sleep(10 * time.Millisecond)
h.mtx.Lock()
h.closeConnAfterRead = false
h.mtx.Unlock()
// should succeed
call(t, "b", c)
wg.Wait()
}
func TestWSClientReconnectsAfterWriteFailure(t *testing.T) {
var wg sync.WaitGroup
// start server
h := &myHandler{}
s := httptest.NewServer(h)
c := startClient(t, s.Listener.Addr())
defer c.Stop()
wg.Add(2)
go callWgDoneOnResult(t, c, &wg)
// hacky way to abort the connection before write
c.conn.Close()
// results in WS write error, the client should resend on reconnect
call(t, "a", c)
// expect to reconnect almost immediately
time.Sleep(10 * time.Millisecond)
// should succeed
call(t, "b", c)
wg.Wait()
}
func TestWSClientReconnectFailure(t *testing.T) {
// start server
h := &myHandler{}
s := httptest.NewServer(h)
c := startClient(t, s.Listener.Addr())
defer c.Stop()
go func() {
for {
select {
case <-c.ResponsesCh:
case <-c.Quit:
return
}
}
}()
// hacky way to abort the connection before write
c.conn.Close()
s.Close()
// results in WS write error
// provide timeout to avoid blocking
ctx, cancel := context.WithTimeout(context.Background(), time.Second)
defer cancel()
c.Call(ctx, "a", make(map[string]interface{}))
// expect to reconnect almost immediately
time.Sleep(10 * time.Millisecond)
done := make(chan struct{})
go func() {
// client should block on this
call(t, "b", c)
close(done)
}()
// test that client blocks on the second send
select {
case <-done:
t.Fatal("client should block on calling 'b' during reconnect")
case <-time.After(5 * time.Second):
t.Log("All good")
}
}
func TestNotBlockingOnStop(t *testing.T) {
timeout := 2 * time.Second
s := httptest.NewServer(&myHandler{})
c := startClient(t, s.Listener.Addr())
c.Call(context.Background(), "a", make(map[string]interface{}))
// Let the readRoutine get around to blocking
time.Sleep(time.Second)
passCh := make(chan struct{})
go func() {
// Unless we have a non-blocking write to ResponsesCh from readRoutine
// this blocks forever ont the waitgroup
c.Stop()
passCh <- struct{}{}
}()
select {
case <-passCh:
// Pass
case <-time.After(timeout):
t.Fatalf("WSClient did failed to stop within %v seconds - is one of the read/write routines blocking?",
timeout.Seconds())
}
}
func startClient(t *testing.T, addr net.Addr) *WSClient {
c := NewWSClient(addr.String(), "/websocket")
_, err := c.Start()
require.Nil(t, err)
c.SetLogger(log.TestingLogger())
return c
}
func call(t *testing.T, method string, c *WSClient) {
err := c.Call(context.Background(), method, make(map[string]interface{}))
require.NoError(t, err)
}
func callWgDoneOnResult(t *testing.T, c *WSClient, wg *sync.WaitGroup) {
for {
select {
case resp := <-c.ResponsesCh:
if resp.Error != nil {
t.Fatalf("unexpected error: %v", resp.Error)
}
if *resp.Result != nil {
wg.Done()
}
case <-c.Quit:
return
}
}
}
| Java |
// Generated by CoffeeScript 1.10.0
var Bill, baseKonnector, filterExisting, linkBankOperation, ovhFetcher, saveDataAndFile;
ovhFetcher = require('../lib/ovh_fetcher');
filterExisting = require('../lib/filter_existing');
saveDataAndFile = require('../lib/save_data_and_file');
linkBankOperation = require('../lib/link_bank_operation');
baseKonnector = require('../lib/base_konnector');
Bill = require('../models/bill');
module.exports = {
createNew: function(ovhApi, name, slug) {
var connector, fetchBills, fileOptions, logger, ovhFetcherInstance;
fileOptions = {
vendor: slug,
dateFormat: 'YYYYMMDD'
};
logger = require('printit')({
prefix: name,
date: true
});
ovhFetcherInstance = ovhFetcher["new"](ovhApi, slug, logger);
fetchBills = function(requiredFields, entries, body, next) {
return ovhFetcherInstance.fetchBills(requiredFields, entries, body, next);
};
return connector = baseKonnector.createNew({
name: name,
fields: {
loginUrl: "link",
token: "hidden",
folderPath: "folder"
},
models: [Bill],
fetchOperations: [
fetchBills, filterExisting(logger, Bill), saveDataAndFile(logger, Bill, fileOptions, ['bill']), linkBankOperation({
log: logger,
model: Bill,
identifier: slug,
dateDelta: 4,
amountDelta: 0.1
})
]
});
}
};
| Java |
class SubscribersController < ApplicationController
def create
@subscriber = Subscriber.new(params[:subscriber])
if @subscriber.save
flash[:notice] = "Success! You have been sent a subscription email. Please click the confirmation link in that email to confirm your subscription."\
else
flash[:error] = "We're having trouble with that email address. Either it's invalid or you have already signed up to watch this story."
end
redirect_to :back
end
def confirm
@subscriber = Subscriber.find_by_invite_token(params[:id])
@subscriber.subscribe if @subscriber
end
def cancel
@subscriber = Subscriber.find_by_invite_token(params[:id])
@subscriber.cancel if @subscriber
end
end
| Java |
"""
Braitenberg Vehicle2b
The more light sensed on the left side the faster the right motor moves.
The more light sensed on the right side the faster the left motor moves.
This causes the robot to turn towards a light source.
"""
from pyrobot.brain import Brain, avg
class Vehicle(Brain):
def setup(self):
self.robot.light[0].units = "SCALED"
def step(self):
leftSpeed = max([s.value for s in self.robot.light[0]["right"]])
rightSpeed = max([s.value for s in self.robot.light[0]["left"]])
print "leftSpeed, rightSpeed:", leftSpeed, rightSpeed
self.motors(leftSpeed, rightSpeed)
def INIT(engine):
if engine.robot.type not in ['K-Team', 'Pyrobot']:
raise "Robot should have light sensors!"
return Vehicle('Braitenberg2a', engine)
| Java |
//#############################################################################
//# #
//# Copyright (C) <2015> <IMS MAXIMS> #
//# #
//# This program is free software: you can redistribute it and/or modify #
//# it under the terms of the GNU Affero General Public License as #
//# published by the Free Software Foundation, either version 3 of the #
//# License, or (at your option) any later version. #
//# #
//# This program is distributed in the hope that it will be useful, #
//# but WITHOUT ANY WARRANTY; without even the implied warranty of #
//# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the #
//# GNU Affero General Public License for more details. #
//# #
//# You should have received a copy of the GNU Affero General Public License #
//# along with this program. If not, see <http://www.gnu.org/licenses/>. #
//# #
//# IMS MAXIMS provides absolutely NO GUARANTEE OF THE CLINICAL SAFTEY of #
//# this program. Users of this software do so entirely at their own risk. #
//# IMS MAXIMS only ensures the Clinical Safety of unaltered run-time #
//# software that it builds, deploys and maintains. #
//# #
//#############################################################################
//#EOH
/*
* This code was generated
* Copyright (C) 1995-2004 IMS MAXIMS plc. All rights reserved.
* IMS Development Environment (version 1.80 build 5589.25814)
* WARNING: DO NOT MODIFY the content of this file
* Generated on 12/10/2015, 13:25
*
*/
package ims.emergency.vo.domain;
import ims.vo.domain.DomainObjectMap;
import java.util.HashMap;
import org.hibernate.proxy.HibernateProxy;
/**
* @author Florin Blindu
*/
public class EDPartialAdmissionForDischargeDetailOutcomeVoAssembler
{
/**
* Copy one ValueObject to another
* @param valueObjectDest to be updated
* @param valueObjectSrc to copy values from
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo copy(ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObjectDest, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObjectSrc)
{
if (null == valueObjectSrc)
{
return valueObjectSrc;
}
valueObjectDest.setID_EDPartialAdmission(valueObjectSrc.getID_EDPartialAdmission());
valueObjectDest.setIsRIE(valueObjectSrc.getIsRIE());
// DecisionToAdmitDateTime
valueObjectDest.setDecisionToAdmitDateTime(valueObjectSrc.getDecisionToAdmitDateTime());
// Specialty
valueObjectDest.setSpecialty(valueObjectSrc.getSpecialty());
// AllocatedStatus
valueObjectDest.setAllocatedStatus(valueObjectSrc.getAllocatedStatus());
// AllocatedBedType
valueObjectDest.setAllocatedBedType(valueObjectSrc.getAllocatedBedType());
// AuthoringInfo
valueObjectDest.setAuthoringInfo(valueObjectSrc.getAuthoringInfo());
// AllocatedDateTime
valueObjectDest.setAllocatedDateTime(valueObjectSrc.getAllocatedDateTime());
// AdmittingConsultant
valueObjectDest.setAdmittingConsultant(valueObjectSrc.getAdmittingConsultant());
// AccomodationRequestedType
valueObjectDest.setAccomodationRequestedType(valueObjectSrc.getAccomodationRequestedType());
return valueObjectDest;
}
/**
* Create the ValueObject collection to hold the set of DomainObjects.
* This is a convenience method only.
* It is intended to be used when one called to an Assembler is made.
* If more than one call to an Assembler is made then #createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(DomainObjectMap, Set) should be used.
* @param domainObjectSet - Set of ims.emergency.domain.objects.EDPartialAdmission objects.
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(java.util.Set domainObjectSet)
{
return createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(new DomainObjectMap(), domainObjectSet);
}
/**
* Create the ValueObject collection to hold the set of DomainObjects.
* @param map - maps DomainObjects to created ValueObjects
* @param domainObjectSet - Set of ims.emergency.domain.objects.EDPartialAdmission objects.
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(DomainObjectMap map, java.util.Set domainObjectSet)
{
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection voList = new ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection();
if ( null == domainObjectSet )
{
return voList;
}
int rieCount=0;
int activeCount=0;
java.util.Iterator iterator = domainObjectSet.iterator();
while( iterator.hasNext() )
{
ims.emergency.domain.objects.EDPartialAdmission domainObject = (ims.emergency.domain.objects.EDPartialAdmission) iterator.next();
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo vo = create(map, domainObject);
if (vo != null)
voList.add(vo);
if (domainObject != null)
{
if (domainObject.getIsRIE() != null && domainObject.getIsRIE().booleanValue() == true)
rieCount++;
else
activeCount++;
}
}
voList.setRieCount(rieCount);
voList.setActiveCount(activeCount);
return voList;
}
/**
* Create the ValueObject collection to hold the list of DomainObjects.
* @param domainObjectList - List of ims.emergency.domain.objects.EDPartialAdmission objects.
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(java.util.List domainObjectList)
{
return createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(new DomainObjectMap(), domainObjectList);
}
/**
* Create the ValueObject collection to hold the list of DomainObjects.
* @param map - maps DomainObjects to created ValueObjects
* @param domainObjectList - List of ims.emergency.domain.objects.EDPartialAdmission objects.
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection createEDPartialAdmissionForDischargeDetailOutcomeVoCollectionFromEDPartialAdmission(DomainObjectMap map, java.util.List domainObjectList)
{
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection voList = new ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection();
if ( null == domainObjectList )
{
return voList;
}
int rieCount=0;
int activeCount=0;
for (int i = 0; i < domainObjectList.size(); i++)
{
ims.emergency.domain.objects.EDPartialAdmission domainObject = (ims.emergency.domain.objects.EDPartialAdmission) domainObjectList.get(i);
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo vo = create(map, domainObject);
if (vo != null)
voList.add(vo);
if (domainObject != null)
{
if (domainObject.getIsRIE() != null && domainObject.getIsRIE().booleanValue() == true)
rieCount++;
else
activeCount++;
}
}
voList.setRieCount(rieCount);
voList.setActiveCount(activeCount);
return voList;
}
/**
* Create the ims.emergency.domain.objects.EDPartialAdmission set from the value object collection.
* @param domainFactory - used to create existing (persistent) domain objects.
* @param voCollection - the collection of value objects
*/
public static java.util.Set extractEDPartialAdmissionSet(ims.domain.ILightweightDomainFactory domainFactory, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection voCollection)
{
return extractEDPartialAdmissionSet(domainFactory, voCollection, null, new HashMap());
}
public static java.util.Set extractEDPartialAdmissionSet(ims.domain.ILightweightDomainFactory domainFactory, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection voCollection, java.util.Set domainObjectSet, HashMap domMap)
{
int size = (null == voCollection) ? 0 : voCollection.size();
if (domainObjectSet == null)
{
domainObjectSet = new java.util.HashSet();
}
java.util.Set newSet = new java.util.HashSet();
for(int i=0; i<size; i++)
{
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo vo = voCollection.get(i);
ims.emergency.domain.objects.EDPartialAdmission domainObject = EDPartialAdmissionForDischargeDetailOutcomeVoAssembler.extractEDPartialAdmission(domainFactory, vo, domMap);
//TODO: This can only occur in the situation of a stale object exception. For now leave it to the Interceptor to handle it.
if (domainObject == null)
{
continue;
}
//Trying to avoid the hibernate collection being marked as dirty via its public interface methods. (like add)
if (!domainObjectSet.contains(domainObject)) domainObjectSet.add(domainObject);
newSet.add(domainObject);
}
java.util.Set removedSet = new java.util.HashSet();
java.util.Iterator iter = domainObjectSet.iterator();
//Find out which objects need to be removed
while (iter.hasNext())
{
ims.domain.DomainObject o = (ims.domain.DomainObject)iter.next();
if ((o == null || o.getIsRIE() == null || !o.getIsRIE().booleanValue()) && !newSet.contains(o))
{
removedSet.add(o);
}
}
iter = removedSet.iterator();
//Remove the unwanted objects
while (iter.hasNext())
{
domainObjectSet.remove(iter.next());
}
return domainObjectSet;
}
/**
* Create the ims.emergency.domain.objects.EDPartialAdmission list from the value object collection.
* @param domainFactory - used to create existing (persistent) domain objects.
* @param voCollection - the collection of value objects
*/
public static java.util.List extractEDPartialAdmissionList(ims.domain.ILightweightDomainFactory domainFactory, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection voCollection)
{
return extractEDPartialAdmissionList(domainFactory, voCollection, null, new HashMap());
}
public static java.util.List extractEDPartialAdmissionList(ims.domain.ILightweightDomainFactory domainFactory, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVoCollection voCollection, java.util.List domainObjectList, HashMap domMap)
{
int size = (null == voCollection) ? 0 : voCollection.size();
if (domainObjectList == null)
{
domainObjectList = new java.util.ArrayList();
}
for(int i=0; i<size; i++)
{
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo vo = voCollection.get(i);
ims.emergency.domain.objects.EDPartialAdmission domainObject = EDPartialAdmissionForDischargeDetailOutcomeVoAssembler.extractEDPartialAdmission(domainFactory, vo, domMap);
//TODO: This can only occur in the situation of a stale object exception. For now leave it to the Interceptor to handle it.
if (domainObject == null)
{
continue;
}
int domIdx = domainObjectList.indexOf(domainObject);
if (domIdx == -1)
{
domainObjectList.add(i, domainObject);
}
else if (i != domIdx && i < domainObjectList.size())
{
Object tmp = domainObjectList.get(i);
domainObjectList.set(i, domainObjectList.get(domIdx));
domainObjectList.set(domIdx, tmp);
}
}
//Remove all ones in domList where index > voCollection.size() as these should
//now represent the ones removed from the VO collection. No longer referenced.
int i1=domainObjectList.size();
while (i1 > size)
{
domainObjectList.remove(i1-1);
i1=domainObjectList.size();
}
return domainObjectList;
}
/**
* Create the ValueObject from the ims.emergency.domain.objects.EDPartialAdmission object.
* @param domainObject ims.emergency.domain.objects.EDPartialAdmission
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo create(ims.emergency.domain.objects.EDPartialAdmission domainObject)
{
if (null == domainObject)
{
return null;
}
DomainObjectMap map = new DomainObjectMap();
return create(map, domainObject);
}
/**
* Create the ValueObject from the ims.emergency.domain.objects.EDPartialAdmission object.
* @param map DomainObjectMap of DomainObjects to already created ValueObjects.
* @param domainObject
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo create(DomainObjectMap map, ims.emergency.domain.objects.EDPartialAdmission domainObject)
{
if (null == domainObject)
{
return null;
}
// check if the domainObject already has a valueObject created for it
ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObject = (ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo) map.getValueObject(domainObject, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo.class);
if ( null == valueObject )
{
valueObject = new ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo(domainObject.getId(), domainObject.getVersion());
map.addValueObject(domainObject, valueObject);
valueObject = insert(map, valueObject, domainObject);
}
return valueObject;
}
/**
* Update the ValueObject with the Domain Object.
* @param valueObject to be updated
* @param domainObject ims.emergency.domain.objects.EDPartialAdmission
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo insert(ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObject, ims.emergency.domain.objects.EDPartialAdmission domainObject)
{
if (null == domainObject)
{
return valueObject;
}
DomainObjectMap map = new DomainObjectMap();
return insert(map, valueObject, domainObject);
}
/**
* Update the ValueObject with the Domain Object.
* @param map DomainObjectMap of DomainObjects to already created ValueObjects.
* @param valueObject to be updated
* @param domainObject ims.emergency.domain.objects.EDPartialAdmission
*/
public static ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo insert(DomainObjectMap map, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObject, ims.emergency.domain.objects.EDPartialAdmission domainObject)
{
if (null == domainObject)
{
return valueObject;
}
if (null == map)
{
map = new DomainObjectMap();
}
valueObject.setID_EDPartialAdmission(domainObject.getId());
valueObject.setIsRIE(domainObject.getIsRIE());
// If this is a recordedInError record, and the domainObject
// value isIncludeRecord has not been set, then we return null and
// not the value object
if (valueObject.getIsRIE() != null && valueObject.getIsRIE().booleanValue() == true && !domainObject.isIncludeRecord())
return null;
// If this is not a recordedInError record, and the domainObject
// value isIncludeRecord has been set, then we return null and
// not the value object
if ((valueObject.getIsRIE() == null || valueObject.getIsRIE().booleanValue() == false) && domainObject.isIncludeRecord())
return null;
// DecisionToAdmitDateTime
java.util.Date DecisionToAdmitDateTime = domainObject.getDecisionToAdmitDateTime();
if ( null != DecisionToAdmitDateTime )
{
valueObject.setDecisionToAdmitDateTime(new ims.framework.utils.DateTime(DecisionToAdmitDateTime) );
}
// Specialty
ims.domain.lookups.LookupInstance instance2 = domainObject.getSpecialty();
if ( null != instance2 ) {
ims.framework.utils.ImagePath img = null;
ims.framework.utils.Color color = null;
img = null;
if (instance2.getImage() != null)
{
img = new ims.framework.utils.ImagePath(instance2.getImage().getImageId(), instance2.getImage().getImagePath());
}
color = instance2.getColor();
if (color != null)
color.getValue();
ims.core.vo.lookups.Specialty voLookup2 = new ims.core.vo.lookups.Specialty(instance2.getId(),instance2.getText(), instance2.isActive(), null, img, color);
ims.core.vo.lookups.Specialty parentVoLookup2 = voLookup2;
ims.domain.lookups.LookupInstance parent2 = instance2.getParent();
while (parent2 != null)
{
if (parent2.getImage() != null)
{
img = new ims.framework.utils.ImagePath(parent2.getImage().getImageId(), parent2.getImage().getImagePath() );
}
else
{
img = null;
}
color = parent2.getColor();
if (color != null)
color.getValue();
parentVoLookup2.setParent(new ims.core.vo.lookups.Specialty(parent2.getId(),parent2.getText(), parent2.isActive(), null, img, color));
parentVoLookup2 = parentVoLookup2.getParent();
parent2 = parent2.getParent();
}
valueObject.setSpecialty(voLookup2);
}
// AllocatedStatus
ims.domain.lookups.LookupInstance instance3 = domainObject.getAllocatedStatus();
if ( null != instance3 ) {
ims.framework.utils.ImagePath img = null;
ims.framework.utils.Color color = null;
img = null;
if (instance3.getImage() != null)
{
img = new ims.framework.utils.ImagePath(instance3.getImage().getImageId(), instance3.getImage().getImagePath());
}
color = instance3.getColor();
if (color != null)
color.getValue();
ims.emergency.vo.lookups.AllocationStatus voLookup3 = new ims.emergency.vo.lookups.AllocationStatus(instance3.getId(),instance3.getText(), instance3.isActive(), null, img, color);
ims.emergency.vo.lookups.AllocationStatus parentVoLookup3 = voLookup3;
ims.domain.lookups.LookupInstance parent3 = instance3.getParent();
while (parent3 != null)
{
if (parent3.getImage() != null)
{
img = new ims.framework.utils.ImagePath(parent3.getImage().getImageId(), parent3.getImage().getImagePath() );
}
else
{
img = null;
}
color = parent3.getColor();
if (color != null)
color.getValue();
parentVoLookup3.setParent(new ims.emergency.vo.lookups.AllocationStatus(parent3.getId(),parent3.getText(), parent3.isActive(), null, img, color));
parentVoLookup3 = parentVoLookup3.getParent();
parent3 = parent3.getParent();
}
valueObject.setAllocatedStatus(voLookup3);
}
// AllocatedBedType
ims.domain.lookups.LookupInstance instance4 = domainObject.getAllocatedBedType();
if ( null != instance4 ) {
ims.framework.utils.ImagePath img = null;
ims.framework.utils.Color color = null;
img = null;
if (instance4.getImage() != null)
{
img = new ims.framework.utils.ImagePath(instance4.getImage().getImageId(), instance4.getImage().getImagePath());
}
color = instance4.getColor();
if (color != null)
color.getValue();
ims.emergency.vo.lookups.AllocatedBedType voLookup4 = new ims.emergency.vo.lookups.AllocatedBedType(instance4.getId(),instance4.getText(), instance4.isActive(), null, img, color);
ims.emergency.vo.lookups.AllocatedBedType parentVoLookup4 = voLookup4;
ims.domain.lookups.LookupInstance parent4 = instance4.getParent();
while (parent4 != null)
{
if (parent4.getImage() != null)
{
img = new ims.framework.utils.ImagePath(parent4.getImage().getImageId(), parent4.getImage().getImagePath() );
}
else
{
img = null;
}
color = parent4.getColor();
if (color != null)
color.getValue();
parentVoLookup4.setParent(new ims.emergency.vo.lookups.AllocatedBedType(parent4.getId(),parent4.getText(), parent4.isActive(), null, img, color));
parentVoLookup4 = parentVoLookup4.getParent();
parent4 = parent4.getParent();
}
valueObject.setAllocatedBedType(voLookup4);
}
// AuthoringInfo
valueObject.setAuthoringInfo(ims.core.vo.domain.AuthoringInformationVoAssembler.create(map, domainObject.getAuthoringInfo()) );
// AllocatedDateTime
java.util.Date AllocatedDateTime = domainObject.getAllocatedDateTime();
if ( null != AllocatedDateTime )
{
valueObject.setAllocatedDateTime(new ims.framework.utils.DateTime(AllocatedDateTime) );
}
// AdmittingConsultant
valueObject.setAdmittingConsultant(ims.core.vo.domain.HcpMinVoAssembler.create(map, domainObject.getAdmittingConsultant()) );
// AccomodationRequestedType
ims.domain.lookups.LookupInstance instance8 = domainObject.getAccomodationRequestedType();
if ( null != instance8 ) {
ims.framework.utils.ImagePath img = null;
ims.framework.utils.Color color = null;
img = null;
if (instance8.getImage() != null)
{
img = new ims.framework.utils.ImagePath(instance8.getImage().getImageId(), instance8.getImage().getImagePath());
}
color = instance8.getColor();
if (color != null)
color.getValue();
ims.core.vo.lookups.AccomodationRequestedType voLookup8 = new ims.core.vo.lookups.AccomodationRequestedType(instance8.getId(),instance8.getText(), instance8.isActive(), null, img, color);
ims.core.vo.lookups.AccomodationRequestedType parentVoLookup8 = voLookup8;
ims.domain.lookups.LookupInstance parent8 = instance8.getParent();
while (parent8 != null)
{
if (parent8.getImage() != null)
{
img = new ims.framework.utils.ImagePath(parent8.getImage().getImageId(), parent8.getImage().getImagePath() );
}
else
{
img = null;
}
color = parent8.getColor();
if (color != null)
color.getValue();
parentVoLookup8.setParent(new ims.core.vo.lookups.AccomodationRequestedType(parent8.getId(),parent8.getText(), parent8.isActive(), null, img, color));
parentVoLookup8 = parentVoLookup8.getParent();
parent8 = parent8.getParent();
}
valueObject.setAccomodationRequestedType(voLookup8);
}
return valueObject;
}
/**
* Create the domain object from the value object.
* @param domainFactory - used to create existing (persistent) domain objects.
* @param valueObject - extract the domain object fields from this.
*/
public static ims.emergency.domain.objects.EDPartialAdmission extractEDPartialAdmission(ims.domain.ILightweightDomainFactory domainFactory, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObject)
{
return extractEDPartialAdmission(domainFactory, valueObject, new HashMap());
}
public static ims.emergency.domain.objects.EDPartialAdmission extractEDPartialAdmission(ims.domain.ILightweightDomainFactory domainFactory, ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo valueObject, HashMap domMap)
{
if (null == valueObject)
{
return null;
}
Integer id = valueObject.getID_EDPartialAdmission();
ims.emergency.domain.objects.EDPartialAdmission domainObject = null;
if ( null == id)
{
if (domMap.get(valueObject) != null)
{
return (ims.emergency.domain.objects.EDPartialAdmission)domMap.get(valueObject);
}
// ims.emergency.vo.EDPartialAdmissionForDischargeDetailOutcomeVo ID_EDPartialAdmission field is unknown
domainObject = new ims.emergency.domain.objects.EDPartialAdmission();
domMap.put(valueObject, domainObject);
}
else
{
String key = (valueObject.getClass().getName() + "__" + valueObject.getID_EDPartialAdmission());
if (domMap.get(key) != null)
{
return (ims.emergency.domain.objects.EDPartialAdmission)domMap.get(key);
}
domainObject = (ims.emergency.domain.objects.EDPartialAdmission) domainFactory.getDomainObject(ims.emergency.domain.objects.EDPartialAdmission.class, id );
//TODO: Not sure how this should be handled. Effectively it must be a staleobject exception, but maybe should be handled as that further up.
if (domainObject == null)
return null;
domMap.put(key, domainObject);
}
domainObject.setVersion(valueObject.getVersion_EDPartialAdmission());
ims.framework.utils.DateTime dateTime1 = valueObject.getDecisionToAdmitDateTime();
java.util.Date value1 = null;
if ( dateTime1 != null )
{
value1 = dateTime1.getJavaDate();
}
domainObject.setDecisionToAdmitDateTime(value1);
// create LookupInstance from vo LookupType
ims.domain.lookups.LookupInstance value2 = null;
if ( null != valueObject.getSpecialty() )
{
value2 =
domainFactory.getLookupInstance(valueObject.getSpecialty().getID());
}
domainObject.setSpecialty(value2);
// create LookupInstance from vo LookupType
ims.domain.lookups.LookupInstance value3 = null;
if ( null != valueObject.getAllocatedStatus() )
{
value3 =
domainFactory.getLookupInstance(valueObject.getAllocatedStatus().getID());
}
domainObject.setAllocatedStatus(value3);
// create LookupInstance from vo LookupType
ims.domain.lookups.LookupInstance value4 = null;
if ( null != valueObject.getAllocatedBedType() )
{
value4 =
domainFactory.getLookupInstance(valueObject.getAllocatedBedType().getID());
}
domainObject.setAllocatedBedType(value4);
// SaveAsRefVO - treated as a refVo in extract methods
ims.core.clinical.domain.objects.AuthoringInformation value5 = null;
if ( null != valueObject.getAuthoringInfo() )
{
if (valueObject.getAuthoringInfo().getBoId() == null)
{
if (domMap.get(valueObject.getAuthoringInfo()) != null)
{
value5 = (ims.core.clinical.domain.objects.AuthoringInformation)domMap.get(valueObject.getAuthoringInfo());
}
}
else
{
value5 = (ims.core.clinical.domain.objects.AuthoringInformation)domainFactory.getDomainObject(ims.core.clinical.domain.objects.AuthoringInformation.class, valueObject.getAuthoringInfo().getBoId());
}
}
domainObject.setAuthoringInfo(value5);
ims.framework.utils.DateTime dateTime6 = valueObject.getAllocatedDateTime();
java.util.Date value6 = null;
if ( dateTime6 != null )
{
value6 = dateTime6.getJavaDate();
}
domainObject.setAllocatedDateTime(value6);
// SaveAsRefVO - treated as a refVo in extract methods
ims.core.resource.people.domain.objects.Hcp value7 = null;
if ( null != valueObject.getAdmittingConsultant() )
{
if (valueObject.getAdmittingConsultant().getBoId() == null)
{
if (domMap.get(valueObject.getAdmittingConsultant()) != null)
{
value7 = (ims.core.resource.people.domain.objects.Hcp)domMap.get(valueObject.getAdmittingConsultant());
}
}
else
{
value7 = (ims.core.resource.people.domain.objects.Hcp)domainFactory.getDomainObject(ims.core.resource.people.domain.objects.Hcp.class, valueObject.getAdmittingConsultant().getBoId());
}
}
domainObject.setAdmittingConsultant(value7);
// create LookupInstance from vo LookupType
ims.domain.lookups.LookupInstance value8 = null;
if ( null != valueObject.getAccomodationRequestedType() )
{
value8 =
domainFactory.getLookupInstance(valueObject.getAccomodationRequestedType().getID());
}
domainObject.setAccomodationRequestedType(value8);
return domainObject;
}
}
| Java |
/*
* opencog/embodiment/Control/OperationalAvatarController/HCTestAgent.h
*
* Copyright (C) 2002-2009 Novamente LLC
* All Rights Reserved
* Author(s): Nil Geisweiller
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU Affero General Public License v3 as
* published by the Free Software Foundation and including the exceptions
* at http://opencog.org/wiki/Licenses
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Affero General Public License
* along with this program; if not, write to:
* Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef HCTESTAGENT_H
#define HCTESTAGENT_H
#include <opencog/server/Agent.h>
#include "MessageSender.h"
namespace opencog { namespace oac {
using namespace opencog;
/**
* That class is in charge of executing a scenario to test hillclimbing
* hosted by LS
*/
class HCTestAgent : public Agent
{
enum HCTestMode {
HCT_IDLE,
HCT_INIT,
HCT_WAIT1,
HCT_WAIT2,
HCT_WAIT3,
HCT_WAIT4
};
private:
HCTestMode mode;
unsigned long cycle;
std::string schemaName;
std::vector<std::string> schemaArguments;
std::string avatarId;
std::string ownerId;
AtomSpace* atomSpace;
MessageSender* sender;
unsigned int learning_time1;
unsigned int learning_time2;
unsigned long max_cycle;
public:
virtual const ClassInfo& classinfo() const {
return info();
}
static const ClassInfo& info() {
static const ClassInfo _ci("OperationalAvatarController::HCTestAgent");
return _ci;
}
HCTestAgent();
/**
* @param lt1 Time (in second) to wait for the first learning iteration
* @param lt2 Time (in second) to wait for the second learning iteration
* @param mc Maximum number of cycles to run
*/
void init(std::string sn, std::vector<std::string> schemaArgs,
std::string b, std::string a, AtomSpace* as, MessageSender* s,
unsigned int lt1 = 10, unsigned int lt2 = 100,
unsigned long mc = 10000);
~HCTestAgent();
void run(opencog::CogServer* ne);
void setWait2() {
mode = HCT_WAIT2;
}
void setWait4() {
mode = HCT_WAIT4;
}
}; // class
} } // namespace opencog::oac
#endif
| Java |
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="utf-8">
<meta http-equiv="X-UA-Compatible" content="IE=edge">
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<meta name="description" content="Datea Backend">
<meta name="author" content="Datea">
<link rel="shortcut icon" href="{{SITE_STATIC}}/ico/favicon.png">
<title>{% block "page_title" %}{% endblock %} | DATEA</title>
<!-- Bootstrap core CSS -->
<link href="{{STATIC_URL}}bstrap/css/bootstrap.min.css" rel="stylesheet">
<!-- Custom styles for this template -->
<link href="{{STATIC_URL}}bstrap/css/jumbotron-narrow.css" rel="stylesheet">
<!-- HTML5 shim and Respond.js IE8 support of HTML5 elements and media queries -->
<!--[if lt IE 9]>
<script src="https://oss.maxcdn.com/libs/html5shiv/3.7.0/html5shiv.js"></script>
<script src="https://oss.maxcdn.com/libs/respond.js/1.3.0/respond.min.js"></script>
<![endif]-->
</head>
<body>
{% block "body" %}{% endblock %}
</body>
</html> | Java |
<form class="form fields" action="#/" onsubmit="return false;" data-bind="command: registerCommand">
<div class="fieldset">
<div class="row name" data-bind="css: {'focused': nameFocus(), 'filled': name().length > 0}">
<label for="name" class="title placeholder" data-i18n="LOGIN/LABEL_NAME" data-bind="i18n: 'text'"></label>
<span class="value">
<input id="name" class="input" type="text" spellcheck="false" autocomplete="off" data-bind="value: name, hasfocus: nameFocus, valueUpdate: 'afterkeydown'" />
</span>
</div>
<div class="row login" data-bind="css: {'focused': loginFocus(), 'filled': login().length > 0}">
<label for="reg_login" class="title placeholder" data-i18n="LOGIN/LABEL_LOGIN" data-bind="i18n: 'text'"></label>
<span class="value">
<input id="reg_login" class="input" autocomplete="off" spellcheck="false" type="text" data-bind="value: login, hasfocus: loginFocus, valueUpdate: 'afterkeydown'" />
</span>
<span class="value suffix" data-bind="visible: domains().length > 0">
<span class="text">@</span>
<span class="text" data-bind="text: domain, visible: domains().length === 1"></span>
<select data-bind="visible: domains().length > 1, options: domains, value: selectedDomain"></select>
</span>
</div>
<div class="row password" data-bind="css: {'focused': passwordFocus(), 'filled': password().length > 0}">
<label for="reg_password" class="title placeholder" data-i18n="LOGIN/LABEL_NEW_PASSWORD" data-bind="i18n: 'text'"></label>
<span class="value">
<input id="reg_password" class="input" autocomplete="off" spellcheck="false" type="password" data-bind="value: password, hasfocus: passwordFocus, valueUpdate: 'afterkeydown'" />
</span>
</div>
<div class="row password" data-bind="css: {'focused': confirmPasswordFocus(), 'filled': confirmPassword().length > 0}">
<label for="reg_confirm_password" class="title placeholder" data-i18n="LOGIN/LABEL_CONFIRM_PASSWORD" data-bind="i18n: 'text'"></label>
<span class="value">
<input id="reg_confirm_password" class="input" autocomplete="off" spellcheck="false" type="password" data-bind="value: confirmPassword, hasfocus: confirmPasswordFocus, valueUpdate: 'afterkeydown'" />
</span>
</div>
<!-- ko if: allowQuestionPart -->
<div class="row question" data-bind="css: {'focused': questionFocus(), 'filled': question().length > 0}">
<label class="title placeholder" data-i18n="LOGIN/LABEL_SELECT_QUESTION" data-bind="i18n: 'text'"></label>
<span class="value">
<span class="custom_selector input" data-bind="customSelect: {'control': false, 'expand': 'expand', 'expandState': questionFocus, 'options': registrationQuestions, value: question, optionsText: 'text', optionsValue: 'value'}">
<span class="name" data-bind="text: question"></span>
<span class="control">
<span class="icon"></span>
</span>
<span class="dropdown">
<span class="dropdown_helper">
<span class="dropdown_arrow"><span></span></span>
<span class="dropdown_content">
</span>
</span>
</span>
</span>
</span>
</div>
<div class="row answer" data-bind="visible: visibleYourQuestion, css: {'focused': yourQuestionFocus(), 'filled': yourQuestion().length > 0}">
<label for="reg_your_question" class="title placeholder" data-i18n="LOGIN/LABEL_YOUR_QUESTION" data-bind="i18n: 'text'"></label>
<span class="value">
<input id="reg_your_question" class="input" autocomplete="off" spellcheck="false" type="text" data-bind="value: yourQuestion, hasfocus: yourQuestionFocus, valueUpdate: 'afterkeydown'" />
</span>
</div>
<div class="row answer" data-bind="css: {'focused': answerFocus(), 'filled': answer().length > 0}">
<label for="reg_answer" class="title placeholder" data-i18n="LOGIN/LABEL_ANSWER_QUESTION" data-bind="i18n: 'text'"></label>
<span class="value">
<input id="reg_answer" class="input" autocomplete="off" spellcheck="false" type="text" data-bind="value: answer, hasfocus: answerFocus, valueUpdate: 'afterkeydown'" />
</span>
</div>
<!-- /ko -->
</div>
{%INCLUDE-START/Register-Before-Submit-Button/INCLUDE-END%}
<div class="row buttons">
<button type="submit" class="button login" data-bind="text: registerButtonText, command: registerCommand"></button>
</div>
<div class="row links">
<div class="forgot">
<span class="link" data-bind="click: function () {$parent.gotoRegister(false);}, i18n: 'text'"
data-i18n="LOGIN/LINK_BACK"></span>
</div>
</div>
</form>
| Java |
/*
* Copyright (C) 2016+ AzerothCore <www.azerothcore.org>, released under GNU GPL v2 license: http://github.com/azerothcore/azerothcore-wotlk/LICENSE-GPL2
* Copyright (C) 2008-2016 TrinityCore <http://www.trinitycore.org/>
* Copyright (C) 2005-2009 MaNGOS <http://getmangos.com/>
*/
#include "GameObjectAI.h"
//GameObjectAI::GameObjectAI(GameObject* g) : go(g) {}
int GameObjectAI::Permissible(const GameObject* go)
{
if (go->GetAIName() == "GameObjectAI")
return PERMIT_BASE_SPECIAL;
return PERMIT_BASE_NO;
}
NullGameObjectAI::NullGameObjectAI(GameObject* g) : GameObjectAI(g) {}
| Java |
<!DOCTYPE html>
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<meta name="generator" content="ApiGen 2.8.0">
<title>Class forma_pago</title>
<script type="text/javascript" src="resources/combined.js?3770084987"></script>
<script type="text/javascript" src="elementlist.js?553530925"></script>
<link rel="stylesheet" type="text/css" media="all" href="resources/style.css?3505392360">
</head>
<body>
<div id="left">
<div id="menu">
<a href="index.html" title="Overview"><span>Overview</span></a>
<div id="groups">
</div>
<div id="elements">
<h3>Classes</h3>
<ul>
<li><a href="class-agente.html">agente</a></li>
<li><a href="class-albaran_cliente.html">albaran_cliente</a></li>
<li><a href="class-albaran_proveedor.html">albaran_proveedor</a></li>
<li><a href="class-almacen.html">almacen</a></li>
<li><a href="class-articulo.html">articulo</a></li>
<li><a href="class-asiento.html">asiento</a></li>
<li><a href="class-asiento_factura.html">asiento_factura</a></li>
<li><a href="class-balance.html">balance</a></li>
<li><a href="class-balance_cuenta.html">balance_cuenta</a></li>
<li><a href="class-balance_cuenta_a.html">balance_cuenta_a</a></li>
<li><a href="class-banco.html">banco</a></li>
<li><a href="class-caja.html">caja</a></li>
<li><a href="class-cliente.html">cliente</a></li>
<li><a href="class-concepto_partida.html">concepto_partida</a></li>
<li><a href="class-cuenta.html">cuenta</a></li>
<li><a href="class-cuenta_banco.html">cuenta_banco</a></li>
<li><a href="class-cuenta_banco_cliente.html">cuenta_banco_cliente</a></li>
<li><a href="class-cuenta_banco_proveedor.html">cuenta_banco_proveedor</a></li>
<li><a href="class-cuenta_especial.html">cuenta_especial</a></li>
<li><a href="class-direccion_cliente.html">direccion_cliente</a></li>
<li><a href="class-direccion_proveedor.html">direccion_proveedor</a></li>
<li><a href="class-divisa.html">divisa</a></li>
<li><a href="class-ejercicio.html">ejercicio</a></li>
<li><a href="class-empresa.html">empresa</a></li>
<li><a href="class-epigrafe.html">epigrafe</a></li>
<li><a href="class-factura_cliente.html">factura_cliente</a></li>
<li><a href="class-factura_proveedor.html">factura_proveedor</a></li>
<li><a href="class-familia.html">familia</a></li>
<li class="active"><a href="class-forma_pago.html">forma_pago</a></li>
<li><a href="class-fs_access.html">fs_access</a></li>
<li><a href="class-fs_button.html">fs_button</a></li>
<li><a href="class-fs_button_img.html">fs_button_img</a></li>
<li><a href="class-fs_cache.html">fs_cache</a></li>
<li><a href="class-fs_controller.html">fs_controller</a></li>
<li><a href="class-fs_db.html">fs_db</a></li>
<li><a href="class-fs_default_items.html">fs_default_items</a></li>
<li><a href="class-fs_extension.html">fs_extension</a></li>
<li><a href="class-fs_log.html">fs_log</a></li>
<li><a href="class-fs_model.html">fs_model</a></li>
<li><a href="class-fs_mysql.html">fs_mysql</a></li>
<li><a href="class-fs_page.html">fs_page</a></li>
<li><a href="class-fs_pdf.html">fs_pdf</a></li>
<li><a href="class-fs_postgresql.html">fs_postgresql</a></li>
<li><a href="class-fs_printer.html">fs_printer</a></li>
<li><a href="class-fs_user.html">fs_user</a></li>
<li><a href="class-fs_var.html">fs_var</a></li>
<li><a href="class-grupo_clientes.html">grupo_clientes</a></li>
<li><a href="class-grupo_epigrafes.html">grupo_epigrafes</a></li>
<li><a href="class-impuesto.html">impuesto</a></li>
<li><a href="class-linea_albaran_cliente.html">linea_albaran_cliente</a></li>
<li><a href="class-linea_albaran_proveedor.html">linea_albaran_proveedor</a></li>
<li><a href="class-linea_factura_cliente.html">linea_factura_cliente</a></li>
<li><a href="class-linea_factura_proveedor.html">linea_factura_proveedor</a></li>
<li><a href="class-linea_iva_factura_cliente.html">linea_iva_factura_cliente</a></li>
<li><a href="class-linea_iva_factura_proveedor.html">linea_iva_factura_proveedor</a></li>
<li><a href="class-pais.html">pais</a></li>
<li><a href="class-partida.html">partida</a></li>
<li><a href="class-proveedor.html">proveedor</a></li>
<li><a href="class-regularizacion_iva.html">regularizacion_iva</a></li>
<li><a href="class-secuencia.html">secuencia</a></li>
<li><a href="class-secuencia_contabilidad.html">secuencia_contabilidad</a></li>
<li><a href="class-secuencia_ejercicio.html">secuencia_ejercicio</a></li>
<li><a href="class-serie.html">serie</a></li>
<li><a href="class-stock.html">stock</a></li>
<li><a href="class-subcuenta.html">subcuenta</a></li>
<li><a href="class-subcuenta_cliente.html">subcuenta_cliente</a></li>
<li><a href="class-subcuenta_proveedor.html">subcuenta_proveedor</a></li>
<li><a href="class-sucursal.html">sucursal</a></li>
<li><a href="class-tarifa.html">tarifa</a></li>
<li><a href="class-tarifa_articulo.html">tarifa_articulo</a></li>
</ul>
<h3>Functions</h3>
<ul>
<li><a href="function-bround.html">bround</a></li>
<li><a href="function-require_model.html">require_model</a></li>
</ul>
</div>
</div>
</div>
<div id="splitter"></div>
<div id="right">
<div id="rightInner">
<form id="search">
<input type="hidden" name="cx" value="">
<input type="hidden" name="ie" value="UTF-8">
<input type="text" name="q" class="text">
<input type="submit" value="Search">
</form>
<div id="navigation">
<ul>
<li>
<a href="index.html" title="Overview"><span>Overview</span></a>
</li>
<li class="active">
<span>Class</span> </li>
</ul>
<ul>
<li>
<a href="tree.html" title="Tree view of classes, interfaces, traits and exceptions"><span>Tree</span></a>
</li>
</ul>
<ul>
</ul>
</div>
<div id="content" class="class">
<h1>Class forma_pago</h1>
<div class="description">
<p>Forma de pago de una factura.</p>
</div>
<dl class="tree">
<dd style="padding-left:0px">
<a href="class-fs_model.html"><span>fs_model</span></a>
</dd>
<dd style="padding-left:30px">
<img src="resources/inherit.png" alt="Extended by">
<b><span>forma_pago</span></b>
</dd>
</dl>
<div class="info">
<b>Located at</b> <a href="source-class-forma_pago.html#22-145" title="Go to source code">forma_pago.php</a><br>
</div>
<table class="summary" id="methods">
<caption>Methods summary</caption>
<tr data-order="__construct" id="___construct">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#___construct">#</a>
<code><a href="source-class-forma_pago.html#33-52" title="Go to source code">__construct</a>( <span>type <var>$f</var> = <span class="php-keyword1">FALSE</span></span> )</code>
<div class="description short">
</div>
<div class="description detailed hidden">
<h4>Parameters</h4>
<div class="list"><dl>
<dt><var>$f</var></dt>
<dd><code>type</code><br>$name nombre de la tabla de la base de datos.</dd>
</dl></div>
<h4>Overrides</h4>
<div class="list"><code><a href="class-fs_model.html#___construct">fs_model::__construct()</a></code></div>
</div>
</div></td>
</tr>
<tr data-order="install" id="_install">
<td class="attributes"><code>
protected
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_install">#</a>
<code><a href="source-class-forma_pago.html#54-58" title="Go to source code">install</a>( )</code>
<div class="description short">
<p>Esta función es llamada al crear una tabla. Permite insertar valores en la
tabla.</p>
</div>
<div class="description detailed hidden">
<p>Esta función es llamada al crear una tabla. Permite insertar valores en la
tabla.</p>
</div>
</div></td>
</tr>
<tr data-order="url" id="_url">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_url">#</a>
<code><a href="source-class-forma_pago.html#60-63" title="Go to source code">url</a>( )</code>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="is_default" id="_is_default">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_is_default">#</a>
<code><a href="source-class-forma_pago.html#65-68" title="Go to source code">is_default</a>( )</code>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="get" id="_get">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_get">#</a>
<code><a href="source-class-forma_pago.html#70-77" title="Go to source code">get</a>( <span>mixed <var>$cod</var></span> )</code>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="exists" id="_exists">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_exists">#</a>
<code><a href="source-class-forma_pago.html#79-85" title="Go to source code">exists</a>( )</code>
<div class="description short">
<p>Esta función devuelve TRUE si los datos del objeto se encuentran en la base
de datos.</p>
</div>
<div class="description detailed hidden">
<p>Esta función devuelve TRUE si los datos del objeto se encuentran en la base
de datos.</p>
</div>
</div></td>
</tr>
<tr data-order="test" id="_test">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_test">#</a>
<code><a href="source-class-forma_pago.html#87-91" title="Go to source code">test</a>( )</code>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="save" id="_save">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_save">#</a>
<code><a href="source-class-forma_pago.html#93-117" title="Go to source code">save</a>( )</code>
<div class="description short">
<p>Esta función sirve tanto para insertar como para actualizar los datos del
objeto en la base de datos.</p>
</div>
<div class="description detailed hidden">
<p>Esta función sirve tanto para insertar como para actualizar los datos del
objeto en la base de datos.</p>
</div>
</div></td>
</tr>
<tr data-order="delete" id="_delete">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_delete">#</a>
<code><a href="source-class-forma_pago.html#119-123" title="Go to source code">delete</a>( )</code>
<div class="description short">
<p>Esta función sirve para eliminar los datos del objeto de la base de
datos</p>
</div>
<div class="description detailed hidden">
<p>Esta función sirve para eliminar los datos del objeto de la base de
datos</p>
</div>
</div></td>
</tr>
<tr data-order="all" id="_all">
<td class="attributes"><code>
public
</code>
</td>
<td class="name"><div>
<a class="anchor" href="#_all">#</a>
<code><a href="source-class-forma_pago.html#130-144" title="Go to source code">all</a>( )</code>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
</table>
<table class="summary inherited">
<caption>Methods inherited from <a href="class-fs_model.html#methods">fs_model</a></caption>
<tr>
<td><code>
<a href="class-fs_model.html#_bin2str">bin2str()</a>,
<a href="class-fs_model.html#_check_table">check_table()</a>,
<a href="class-fs_model.html#_clean_checked_tables">clean_checked_tables()</a>,
<a href="class-fs_model.html#_date_range">date_range()</a>,
<a href="class-fs_model.html#_escape_string">escape_string()</a>,
<a href="class-fs_model.html#_floatcmp">floatcmp()</a>,
<a href="class-fs_model.html#_floatcmp3">floatcmp3()</a>,
<a href="class-fs_model.html#_get_errors">get_errors()</a>,
<a href="class-fs_model.html#_get_xml_table">get_xml_table()</a>,
<a href="class-fs_model.html#_intval">intval()</a>,
<a href="class-fs_model.html#_new_error_msg">new_error_msg()</a>,
<a href="class-fs_model.html#_no_html">no_html()</a>,
<a href="class-fs_model.html#_random_string">random_string()</a>,
<a href="class-fs_model.html#_str2bin">str2bin()</a>,
<a href="class-fs_model.html#_str2bool">str2bool()</a>,
<a href="class-fs_model.html#_var2str">var2str()</a>,
<a href="class-fs_model.html#_var2timesince">var2timesince()</a>
</code></td>
</tr>
</table>
<table class="summary" id="properties">
<caption>Properties summary</caption>
<tr data-order="codpago" id="$codpago">
<td class="attributes"><code>
public
mixed
</code></td>
<td class="name">
<a href="source-class-forma_pago.html#27" title="Go to source code"><var>$codpago</var></a>
</td>
<td class="value"><code></code></td>
<td class="description"><div>
<a href="#$codpago" class="anchor">#</a>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="descripcion" id="$descripcion">
<td class="attributes"><code>
public
mixed
</code></td>
<td class="name">
<a href="source-class-forma_pago.html#28" title="Go to source code"><var>$descripcion</var></a>
</td>
<td class="value"><code></code></td>
<td class="description"><div>
<a href="#$descripcion" class="anchor">#</a>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="genrecibos" id="$genrecibos">
<td class="attributes"><code>
public
mixed
</code></td>
<td class="name">
<a href="source-class-forma_pago.html#29" title="Go to source code"><var>$genrecibos</var></a>
</td>
<td class="value"><code></code></td>
<td class="description"><div>
<a href="#$genrecibos" class="anchor">#</a>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="codcuenta" id="$codcuenta">
<td class="attributes"><code>
public
mixed
</code></td>
<td class="name">
<a href="source-class-forma_pago.html#30" title="Go to source code"><var>$codcuenta</var></a>
</td>
<td class="value"><code></code></td>
<td class="description"><div>
<a href="#$codcuenta" class="anchor">#</a>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
<tr data-order="domiciliado" id="$domiciliado">
<td class="attributes"><code>
public
mixed
</code></td>
<td class="name">
<a href="source-class-forma_pago.html#31" title="Go to source code"><var>$domiciliado</var></a>
</td>
<td class="value"><code></code></td>
<td class="description"><div>
<a href="#$domiciliado" class="anchor">#</a>
<div class="description short">
</div>
<div class="description detailed hidden">
</div>
</div></td>
</tr>
</table>
<table class="summary inherited">
<caption>Properties inherited from <a href="class-fs_model.html#properties">fs_model</a></caption>
<tr>
<td><code>
<a href="class-fs_model.html#$base_dir"><var>$base_dir</var></a>,
<a href="class-fs_model.html#$cache"><var>$cache</var></a>,
<a href="class-fs_model.html#$db"><var>$db</var></a>,
<a href="class-fs_model.html#$default_items"><var>$default_items</var></a>,
<a href="class-fs_model.html#$table_name"><var>$table_name</var></a>
</code></td>
</tr>
</table>
</div>
<div id="footer">
API documentation generated by <a href="http://apigen.org">ApiGen 2.8.0</a>
</div>
</div>
</div>
</body>
</html>
| Java |
class AddNameIndexToGames < ActiveRecord::Migration[4.2]
def change
add_index :games, :name
end
end
| Java |
package com.sapienter.jbilling.client.jspc.user;
import javax.servlet.*;
import javax.servlet.http.*;
import javax.servlet.jsp.*;
import com.sapienter.jbilling.client.util.Constants;
public final class listProcessSuccessfulUsersTop_jsp extends org.apache.jasper.runtime.HttpJspBase
implements org.apache.jasper.runtime.JspSourceDependent {
private static final JspFactory _jspxFactory = JspFactory.getDefaultFactory();
private static java.util.List _jspx_dependants;
private org.apache.jasper.runtime.TagHandlerPool _005fjspx_005ftagPool_005fhtml_005fmessages_0026_005fmessage_005fid;
private org.apache.jasper.runtime.TagHandlerPool _005fjspx_005ftagPool_005fbean_005fwrite_0026_005fname_005fnobody;
private org.apache.jasper.runtime.TagHandlerPool _005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody;
private org.apache.jasper.runtime.TagHandlerPool _005fjspx_005ftagPool_005fjbilling_005fgenericList_0026_005ftype_005fsetup_005fnobody;
private javax.el.ExpressionFactory _el_expressionfactory;
private org.apache.AnnotationProcessor _jsp_annotationprocessor;
public Object getDependants() {
return _jspx_dependants;
}
public void _jspInit() {
_005fjspx_005ftagPool_005fhtml_005fmessages_0026_005fmessage_005fid = org.apache.jasper.runtime.TagHandlerPool.getTagHandlerPool(getServletConfig());
_005fjspx_005ftagPool_005fbean_005fwrite_0026_005fname_005fnobody = org.apache.jasper.runtime.TagHandlerPool.getTagHandlerPool(getServletConfig());
_005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody = org.apache.jasper.runtime.TagHandlerPool.getTagHandlerPool(getServletConfig());
_005fjspx_005ftagPool_005fjbilling_005fgenericList_0026_005ftype_005fsetup_005fnobody = org.apache.jasper.runtime.TagHandlerPool.getTagHandlerPool(getServletConfig());
_el_expressionfactory = _jspxFactory.getJspApplicationContext(getServletConfig().getServletContext()).getExpressionFactory();
_jsp_annotationprocessor = (org.apache.AnnotationProcessor) getServletConfig().getServletContext().getAttribute(org.apache.AnnotationProcessor.class.getName());
}
public void _jspDestroy() {
_005fjspx_005ftagPool_005fhtml_005fmessages_0026_005fmessage_005fid.release();
_005fjspx_005ftagPool_005fbean_005fwrite_0026_005fname_005fnobody.release();
_005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.release();
_005fjspx_005ftagPool_005fjbilling_005fgenericList_0026_005ftype_005fsetup_005fnobody.release();
}
public void _jspService(HttpServletRequest request, HttpServletResponse response)
throws java.io.IOException, ServletException {
PageContext pageContext = null;
HttpSession session = null;
ServletContext application = null;
ServletConfig config = null;
JspWriter out = null;
Object page = this;
JspWriter _jspx_out = null;
PageContext _jspx_page_context = null;
try {
response.setContentType("text/html");
pageContext = _jspxFactory.getPageContext(this, request, response,
null, true, 8192, true);
_jspx_page_context = pageContext;
application = pageContext.getServletContext();
config = pageContext.getServletConfig();
session = pageContext.getSession();
out = pageContext.getOut();
_jspx_out = out;
out.write("\r\n\r\n\r\n\r\n\r\n\r\n\r\n\r\n\r\n");
out.write("\r\n\r\n");
// html:messages
org.apache.struts.taglib.html.MessagesTag _jspx_th_html_005fmessages_005f0 = (org.apache.struts.taglib.html.MessagesTag) _005fjspx_005ftagPool_005fhtml_005fmessages_0026_005fmessage_005fid.get(org.apache.struts.taglib.html.MessagesTag.class);
_jspx_th_html_005fmessages_005f0.setPageContext(_jspx_page_context);
_jspx_th_html_005fmessages_005f0.setParent(null);
// /user/listProcessSuccessfulUsersTop.jsp(30,0) name = message type = null reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_html_005fmessages_005f0.setMessage("true");
// /user/listProcessSuccessfulUsersTop.jsp(30,0) name = id type = java.lang.String reqTime = false required = true fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_html_005fmessages_005f0.setId("myMessage");
int _jspx_eval_html_005fmessages_005f0 = _jspx_th_html_005fmessages_005f0.doStartTag();
if (_jspx_eval_html_005fmessages_005f0 != javax.servlet.jsp.tagext.Tag.SKIP_BODY) {
java.lang.String myMessage = null;
if (_jspx_eval_html_005fmessages_005f0 != javax.servlet.jsp.tagext.Tag.EVAL_BODY_INCLUDE) {
out = _jspx_page_context.pushBody();
_jspx_th_html_005fmessages_005f0.setBodyContent((javax.servlet.jsp.tagext.BodyContent) out);
_jspx_th_html_005fmessages_005f0.doInitBody();
}
myMessage = (java.lang.String) _jspx_page_context.findAttribute("myMessage");
do {
out.write("\r\n\t<p>");
if (_jspx_meth_bean_005fwrite_005f0(_jspx_th_html_005fmessages_005f0, _jspx_page_context))
return;
out.write("</p>\r\n");
int evalDoAfterBody = _jspx_th_html_005fmessages_005f0.doAfterBody();
myMessage = (java.lang.String) _jspx_page_context.findAttribute("myMessage");
if (evalDoAfterBody != javax.servlet.jsp.tagext.BodyTag.EVAL_BODY_AGAIN)
break;
} while (true);
if (_jspx_eval_html_005fmessages_005f0 != javax.servlet.jsp.tagext.Tag.EVAL_BODY_INCLUDE) {
out = _jspx_page_context.popBody();
}
}
if (_jspx_th_html_005fmessages_005f0.doEndTag() == javax.servlet.jsp.tagext.Tag.SKIP_PAGE) {
_005fjspx_005ftagPool_005fhtml_005fmessages_0026_005fmessage_005fid.reuse(_jspx_th_html_005fmessages_005f0);
return;
}
_005fjspx_005ftagPool_005fhtml_005fmessages_0026_005fmessage_005fid.reuse(_jspx_th_html_005fmessages_005f0);
out.write("\r\n\r\n");
out.write('\r');
out.write('\n');
// bean:define
org.apache.struts.taglib.bean.DefineTag _jspx_th_bean_005fdefine_005f0 = (org.apache.struts.taglib.bean.DefineTag) _005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.get(org.apache.struts.taglib.bean.DefineTag.class);
_jspx_th_bean_005fdefine_005f0.setPageContext(_jspx_page_context);
_jspx_th_bean_005fdefine_005f0.setParent(null);
// /user/listProcessSuccessfulUsersTop.jsp(36,0) name = id type = java.lang.String reqTime = false required = true fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fdefine_005f0.setId("forward_from");
// /user/listProcessSuccessfulUsersTop.jsp(36,0) name = value type = null reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fdefine_005f0.setValue(Constants.FORWARD_USER_VIEW);
// /user/listProcessSuccessfulUsersTop.jsp(36,0) name = toScope type = null reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fdefine_005f0.setToScope("session");
int _jspx_eval_bean_005fdefine_005f0 = _jspx_th_bean_005fdefine_005f0.doStartTag();
if (_jspx_th_bean_005fdefine_005f0.doEndTag() == javax.servlet.jsp.tagext.Tag.SKIP_PAGE) {
_005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.reuse(_jspx_th_bean_005fdefine_005f0);
return;
}
_005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.reuse(_jspx_th_bean_005fdefine_005f0);
java.lang.String forward_from = null;
forward_from = (java.lang.String) _jspx_page_context.findAttribute("forward_from");
out.write("\r\n\r\n");
// bean:define
org.apache.struts.taglib.bean.DefineTag _jspx_th_bean_005fdefine_005f1 = (org.apache.struts.taglib.bean.DefineTag) _005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.get(org.apache.struts.taglib.bean.DefineTag.class);
_jspx_th_bean_005fdefine_005f1.setPageContext(_jspx_page_context);
_jspx_th_bean_005fdefine_005f1.setParent(null);
// /user/listProcessSuccessfulUsersTop.jsp(40,0) name = id type = java.lang.String reqTime = false required = true fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fdefine_005f1.setId("forward_to");
// /user/listProcessSuccessfulUsersTop.jsp(40,0) name = value type = null reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fdefine_005f1.setValue(Constants.FORWARD_USER_VIEW);
// /user/listProcessSuccessfulUsersTop.jsp(40,0) name = toScope type = null reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fdefine_005f1.setToScope("session");
int _jspx_eval_bean_005fdefine_005f1 = _jspx_th_bean_005fdefine_005f1.doStartTag();
if (_jspx_th_bean_005fdefine_005f1.doEndTag() == javax.servlet.jsp.tagext.Tag.SKIP_PAGE) {
_005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.reuse(_jspx_th_bean_005fdefine_005f1);
return;
}
_005fjspx_005ftagPool_005fbean_005fdefine_0026_005fvalue_005ftoScope_005fid_005fnobody.reuse(_jspx_th_bean_005fdefine_005f1);
java.lang.String forward_to = null;
forward_to = (java.lang.String) _jspx_page_context.findAttribute("forward_to");
out.write("\r\n\r\n");
// jbilling:genericList
com.sapienter.jbilling.client.list.GenericListTag _jspx_th_jbilling_005fgenericList_005f0 = (com.sapienter.jbilling.client.list.GenericListTag) _005fjspx_005ftagPool_005fjbilling_005fgenericList_0026_005ftype_005fsetup_005fnobody.get(com.sapienter.jbilling.client.list.GenericListTag.class);
_jspx_th_jbilling_005fgenericList_005f0.setPageContext(_jspx_page_context);
_jspx_th_jbilling_005fgenericList_005f0.setParent(null);
// /user/listProcessSuccessfulUsersTop.jsp(44,0) name = setup type = java.lang.Boolean reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_jbilling_005fgenericList_005f0.setSetup(new Boolean(true));
// /user/listProcessSuccessfulUsersTop.jsp(44,0) name = type type = java.lang.String reqTime = true required = false fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_jbilling_005fgenericList_005f0.setType(Constants.LIST_TYPE_PROCESS_RUN_SUCCESSFULL_USERS);
int _jspx_eval_jbilling_005fgenericList_005f0 = _jspx_th_jbilling_005fgenericList_005f0.doStartTag();
if (_jspx_th_jbilling_005fgenericList_005f0.doEndTag() == javax.servlet.jsp.tagext.Tag.SKIP_PAGE) {
_005fjspx_005ftagPool_005fjbilling_005fgenericList_0026_005ftype_005fsetup_005fnobody.reuse(_jspx_th_jbilling_005fgenericList_005f0);
return;
}
_005fjspx_005ftagPool_005fjbilling_005fgenericList_0026_005ftype_005fsetup_005fnobody.reuse(_jspx_th_jbilling_005fgenericList_005f0);
out.write(" \r\n \r\n");
} catch (Throwable t) {
if (!(t instanceof SkipPageException)){
out = _jspx_out;
if (out != null && out.getBufferSize() != 0)
try { out.clearBuffer(); } catch (java.io.IOException e) {}
if (_jspx_page_context != null) _jspx_page_context.handlePageException(t);
}
} finally {
_jspxFactory.releasePageContext(_jspx_page_context);
}
}
private boolean _jspx_meth_bean_005fwrite_005f0(javax.servlet.jsp.tagext.JspTag _jspx_th_html_005fmessages_005f0, PageContext _jspx_page_context)
throws Throwable {
PageContext pageContext = _jspx_page_context;
JspWriter out = _jspx_page_context.getOut();
// bean:write
org.apache.struts.taglib.bean.WriteTag _jspx_th_bean_005fwrite_005f0 = (org.apache.struts.taglib.bean.WriteTag) _005fjspx_005ftagPool_005fbean_005fwrite_0026_005fname_005fnobody.get(org.apache.struts.taglib.bean.WriteTag.class);
_jspx_th_bean_005fwrite_005f0.setPageContext(_jspx_page_context);
_jspx_th_bean_005fwrite_005f0.setParent((javax.servlet.jsp.tagext.Tag) _jspx_th_html_005fmessages_005f0);
// /user/listProcessSuccessfulUsersTop.jsp(31,4) name = name type = null reqTime = true required = true fragment = false deferredValue = false expectedTypeName = null deferredMethod = false methodSignature = null
_jspx_th_bean_005fwrite_005f0.setName("myMessage");
int _jspx_eval_bean_005fwrite_005f0 = _jspx_th_bean_005fwrite_005f0.doStartTag();
if (_jspx_th_bean_005fwrite_005f0.doEndTag() == javax.servlet.jsp.tagext.Tag.SKIP_PAGE) {
_005fjspx_005ftagPool_005fbean_005fwrite_0026_005fname_005fnobody.reuse(_jspx_th_bean_005fwrite_005f0);
return true;
}
_005fjspx_005ftagPool_005fbean_005fwrite_0026_005fname_005fnobody.reuse(_jspx_th_bean_005fwrite_005f0);
return false;
}
}
| Java |
---
logohandle: egeriarocks
sort: egeria
title: Egeria
twitter: EgeriaPlanning
website: 'https://egeria.rocks/'
---
| Java |
<?php
/**
* Shopware 5
* Copyright (c) shopware AG
*
* According to our dual licensing model, this program can be used either
* under the terms of the GNU Affero General Public License, version 3,
* or under a proprietary license.
*
* The texts of the GNU Affero General Public License with an additional
* permission and of our proprietary license can be found at and
* in the LICENSE file you have received along with this program.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Affero General Public License for more details.
*
* "Shopware" is a registered trademark of shopware AG.
* The licensing of the program under the AGPLv3 does not imply a
* trademark license. Therefore any rights, title and interest in
* our trademarks remain entirely with us.
*/
/**
* @param array $params
* @param $template
*
* @return bool|mixed|string
*/
function smarty_function_flink($params, $template)
{
$file = $params['file'];
$request = Shopware()->Front()->Request();
$docPath = Shopware()->Container()->getParameter('shopware.app.rootdir');
// Check if we got an URI or a local link
if (!empty($file) && strpos($file, '/') !== 0 && strpos($file, '://') === false) {
$useIncludePath = $template->smarty->getUseIncludePath();
/** @var string[] $templateDirs */
$templateDirs = $template->smarty->getTemplateDir();
// Try to find the file on the filesystem
foreach ($templateDirs as $dir) {
if (file_exists($dir . $file)) {
$file = Enlight_Loader::realpath($dir) . DIRECTORY_SEPARATOR . str_replace('/', DIRECTORY_SEPARATOR, $file);
break;
}
if ($useIncludePath) {
if ($dir === '.' . DIRECTORY_SEPARATOR) {
$dir = '';
}
if (($result = Enlight_Loader::isReadable($dir . $file)) !== false) {
$file = $result;
break;
}
}
}
// Some cleanup code
if (strpos($file, $docPath) === 0) {
$file = substr($file, strlen($docPath));
}
// Make sure we have the right separator for the web context
if (DIRECTORY_SEPARATOR !== '/') {
$file = str_replace(DIRECTORY_SEPARATOR, '/', $file);
}
if (strpos($file, './') === 0) {
$file = substr($file, 2);
}
if ($request !== null) {
$file = $request->getBasePath() . '/' . ltrim($file, '/');
}
}
if (empty($file) && $request !== null) {
$file = $request->getBasePath() . '/';
}
if ($request !== null && !empty($params['fullPath']) && strpos($file, '/') === 0) {
$file = $request->getScheme() . '://' . $request->getHttpHost() . $file;
}
return $file;
}
| Java |
// The Vue build version to load with the `import` command
// (runtime-only or standalone) has been set in webpack.base.conf with an alias.
import Vue from 'vue'
import App from './App'
import router from './router'
import store from './store'
import VueBootstrap from 'bootstrap-vue'
import 'bootstrap/dist/css/bootstrap.css'
import 'bootstrap-vue/dist/bootstrap-vue.css'
Vue.use(VueBootstrap)
// HTTP Client we use.
import Axios from 'axios'
// TODO: Set these during build time.
Axios.defaults.baseURL = 'http://localhost:8080'
Axios.defaults.headers['Content-Type'] = 'application/json; charset=UTF-8'
Vue.config.productionTip = false
/* eslint-disable no-new */
new Vue({
el: '#app',
router,
store,
template: '<App/>',
components: { App }
})
| Java |
{% extends 'newhpc/english/english_base.html' %}
{% load staticfiles %}
{% block title %}Registration | HPC 2020{% endblock %}
{% block style %}
.listitem44 {
display: inline-block;
font-size: 1.5em;
list-style-type: none;
padding: 1em;
text-transform: uppercase;
}
.listitem44 span {
display: block;
font-size: 4.5rem;
}
#title {
font-size: 32px;
color: #9d0051;
}
.sub-title {
font-size: 26px!important;
}
.hpc-text {
color: #242b2c!important;
margin-top: 30px;
text-align: justify;
text-align-last: center;
}
{% endblock %}
{% block lang %}
{% url 'newhpc:riy_ar_registration' event_city='riyadh' %}
{% endblock %}
{% block lang2 %}
{% url 'newhpc:riy_ar_registration' event_city='riyadh' %}
{% endblock %}
{% block active_register %}c-active{% endblock %}
{% block content %}
<div class="c-layout-page">
<!-- BEGIN: PAGE CONTENT -->
<!-- BEGIN: CONTENT/STATS/COUNTER-1 -->
<div class="c-content-box c-size-md c-bg-white">
<div class="container">
<div class="c-content-counter-1 c-opt-1">
<div class="c-content-title-1">
<h3 class="c-center c-font-uppercase c-font-bold" id="title">HPC Programs</h3>
<div class="c-line-center"></div>
</div>
<div class="row">
<div class="col-md-4">
<img src="{% static 'newhpc/images/icons/registration/general-icon.png' %}" style="width: 200px;margin-bottom: 20px">
<h3 class="c-title c-first c-font-uppercase c-font-bold sub-title">General Program</h3>
<p class="c-content hpc-text">The General Programs aims through its lectures, panel discussions and workshops to offer topics that concern all
healthcare professionals and students. It also aims to discuss the National Transformation Program 2020 in the health field and its effort
to accomplish vision 2030.</p>
</div>
<div class="col-md-4">
<img src="{% static 'newhpc/images/icons/registration/research-icon.png' %}" style="width: 200px;margin-bottom: 20px">
<h3 class="c-title c-font-uppercase c-font-bold sub-title">Research Program</h3>
<p class="c-content hpc-text">Research is the basis upon which healthcare grows. An imperative area to the success, quality, and advancement of
healthcare. Research provides opportunities that help individuals to pursue and enhance their knowledge in different aspects of the healthcare field.
Health Profession Conference 2020 provides variety of workshops and lectures on how to conduct and build a scientific paper through the Research Program</p>
</div>
<div class="col-md-4">
<img src="{% static 'newhpc/images/icons/registration/colleges-icon.png' %}" style="width: 200px;margin-bottom: 20px">
<h3 class="c-title c-font-uppercase c-font-bold sub-title">Collages’ Programs</h3>
<p class="c-content hpc-text">Pursuing power in health leadership and in solidarity with National Transformation Program. We offer our collages’
programs that will host series of lectures and workshops that will touch the essence of each specialty (Collage of Medicine, Collage of Dentistry,
Collage of Pharmacy, Collage of Applied Medical Sciences, Collage of Nursing and Collage of Public Health).</p>
</div>
</div>
</div>
</div>
</div>
<!-- END: CONTENT/STATS/COUNTER-1 -->
<!-- BEGIN: CONTENT/BARS/BAR-4 -->
<div class="c-content-box c-size-md c-bg-parallax" style="background-color: #242b2c ">
<div class="container">
<div class="c-content-bar-4">
<h3 class="c-font-uppercase c-font-bold" id="head" style="margin: 0px!important;border: 0px!important;direction: ltr!important;">HPC 2020 Countdown</h3>
<ul style="color: white!important;padding: 0px!important;font-weight: 700!important;margin-top: -15px!important;direction: ltr!important;">
<li class="listitem44"><span id="days"></span>Days</li>
<li class="listitem44"><span id="hours"></span>Hours</li>
<li class="listitem44"><span id="minutes"></span>Minutes</li>
<li class="listitem44"><span id="seconds"></span>Seconds</li>
</ul>
</div>
</div>
</div>
<!-- END: CONTENT/BARS/BAR-4 -->
</div>
{% endblock %}
{% block script %}
const second = 1000,
minute = second * 60,
hour = minute * 60,
day = hour * 24;
let countDown = new Date('Jan 28, 2020 00:00:00').getTime(),
x = setInterval(function() {
let now = new Date().getTime(),
distance = countDown - now;
document.getElementById('days').innerText = Math.floor(distance / (day)),
document.getElementById('hours').innerText = Math.floor((distance % (day)) / (hour)),
document.getElementById('minutes').innerText = Math.floor((distance % (hour)) / (minute)),
document.getElementById('seconds').innerText = Math.floor((distance % (minute)) / second);
//do something later when date is reached
//if (distance < 0) {
// clearInterval(x);
// 'IT'S MY BIRTHDAY!;
//}
}, second)
{% endblock %}
| Java |
/*
* Concept profile generation tool suite
* Copyright (C) 2015 Biosemantics Group, Erasmus University Medical Center,
* Rotterdam, The Netherlands
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU Affero General Public License as published
* by the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Affero General Public License for more details.
*
* You should have received a copy of the GNU Affero General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>
*/
package JochemBuilder.KEGGcompound;
import org.erasmusmc.ontology.OntologyFileLoader;
import org.erasmusmc.ontology.OntologyStore;
import org.erasmusmc.ontology.ontologyutilities.OntologyCurator;
import org.erasmusmc.utilities.StringUtilities;
import JochemBuilder.SharedCurationScripts.CasperForJochem;
import JochemBuilder.SharedCurationScripts.CurateUsingManualCurationFile;
import JochemBuilder.SharedCurationScripts.RemoveDictAndCompanyNamesAtEndOfTerm;
import JochemBuilder.SharedCurationScripts.RewriteFurther;
import JochemBuilder.SharedCurationScripts.SaveOnlyCASandInchiEntries;
public class KEGGcompoundImport {
public static String date = "110809";
public static String home = "/home/khettne/Projects/Jochem";
public static String keggcImportFile = home+"/KEGG/Compound/compound";
public static String compoundToDrugMappingOutFile = home+"/KEGG/Compound/compoundToDrugMapping";
public static String keggcToInchiMappingFile = home+"/KEGG/Compound/compound.inchi";
public static String keggcDictionariesLog = home+"/KEGG/Compound/KEGGc_dictionaries_"+date+".log";
public static String keggcRewriteLog = home+"/KEGG/Compound/KEGGcCAS_casperFiltered_"+date+".log";
public static String keggcLowerCaseLog = home+"/KEGG/Compound/KEGGcCAS_lowerCase_"+date+".log";
public static String termsToRemove = "keggcTermsToRemove.txt";
public static String keggcCuratedOntologyPath = home+"/KEGG/Compound/KEGGcCAS_curated_"+date+".ontology";
public static String keggcCuratedLog = home+"/KEGG/Compound/KEGGcCAS_curated_"+date+".log";
public static void main(String[] args) {
OntologyStore ontology = new OntologyStore();
OntologyFileLoader loader = new OntologyFileLoader();
//Make unprocessed thesaurus
ChemicalsFromKEGGcompound keggchem = new ChemicalsFromKEGGcompound();
ontology = keggchem.run(keggcImportFile, compoundToDrugMappingOutFile);
RemoveDictAndCompanyNamesAtEndOfTerm remove = new RemoveDictAndCompanyNamesAtEndOfTerm();
ontology = remove.run(ontology, keggcDictionariesLog);
MapKEGGc2InChI mapOntology = new MapKEGGc2InChI();
ontology = mapOntology.map(ontology, keggcToInchiMappingFile);
// CAS and InChI
SaveOnlyCASandInchiEntries make = new SaveOnlyCASandInchiEntries();
ontology = make.run(ontology);
//Rewrite
CasperForJochem casper = new CasperForJochem();
casper.run(ontology, keggcRewriteLog);
// Make some entries lower case and filter further
RewriteFurther rewrite = new RewriteFurther();
ontology = rewrite.run(ontology, keggcLowerCaseLog);
//Remove terms based on medline frequency
CurateUsingManualCurationFile curate = new CurateUsingManualCurationFile();
ontology = curate.run(ontology, keggcCuratedLog,termsToRemove);
//Set default flags and save ontology
OntologyCurator curator = new OntologyCurator();
curator.curateAndPrepare(ontology);
loader.save(ontology,keggcCuratedOntologyPath);
System.out.println("Done! " + StringUtilities.now());
}
}
| Java |
/****************************************************************************
**
** Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
** All rights reserved.
** Contact: Nokia Corporation ([email protected])
**
** This file is part of the QtGui module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** No Commercial Usage
** This file contains pre-release code and may not be distributed.
** You may use this file in accordance with the terms and conditions
** contained in the Technology Preview License Agreement accompanying
** this package.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Nokia gives you certain additional
** rights. These rights are described in the Nokia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** If you have questions regarding the use of this file, please contact
** Nokia at [email protected].
**
**
**
**
**
**
**
**
** $QT_END_LICENSE$
**
****************************************************************************/
#ifndef QWIZARD_WIN_P_H
#define QWIZARD_WIN_P_H
//
// W A R N I N G
// -------------
//
// This file is not part of the Qt API. It exists purely as an
// implementation detail. This header file may change from version to
// version without notice, or even be removed.
//
// We mean it.
//
#ifndef QT_NO_WIZARD
#ifndef QT_NO_STYLE_WINDOWSVISTA
#include <qt_windows.h>
#include <qobject.h>
#include <qwidget.h>
#include <qabstractbutton.h>
#include <QtGui/private/qwidget_p.h>
QT_BEGIN_NAMESPACE
class QVistaBackButton : public QAbstractButton
{
public:
QVistaBackButton(QWidget *widget);
QSize sizeHint() const;
inline QSize minimumSizeHint() const
{ return sizeHint(); }
void enterEvent(QEvent *event);
void leaveEvent(QEvent *event);
void paintEvent(QPaintEvent *event);
};
class QWizard;
class QVistaHelper : public QObject
{
public:
QVistaHelper(QWizard *wizard);
~QVistaHelper();
enum TitleBarChangeType { NormalTitleBar, ExtendedTitleBar };
bool setDWMTitleBar(TitleBarChangeType type);
void setTitleBarIconAndCaptionVisible(bool visible);
void mouseEvent(QEvent *event);
bool handleWinEvent(MSG *message, long *result);
void resizeEvent(QResizeEvent *event);
void paintEvent(QPaintEvent *event);
QVistaBackButton *backButton() const { return backButton_; }
void disconnectBackButton() { if (backButton_) backButton_->disconnect(); }
void hideBackButton() { if (backButton_) backButton_->hide(); }
void setWindowPosHack();
QColor basicWindowFrameColor();
enum VistaState { VistaAero, VistaBasic, Classic, Dirty };
static VistaState vistaState();
static int titleBarSize() { return frameSize() + captionSize(); }
static int topPadding() { return 8; }
static int topOffset() { return titleBarSize() + (vistaState() == VistaAero ? 13 : 3); }
private:
static HFONT getCaptionFont(HANDLE hTheme);
bool drawTitleText(QPainter *painter, const QString &text, const QRect &rect, HDC hdc);
static bool drawBlackRect(const QRect &rect, HDC hdc);
static int frameSize() { return GetSystemMetrics(SM_CYSIZEFRAME); }
static int captionSize() { return GetSystemMetrics(SM_CYCAPTION); }
static int backButtonSize() { return 31; } // ### should be queried from back button itself
static int iconSize() { return 16; } // Standard Aero
static int padding() { return 7; } // Standard Aero
static int leftMargin() { return backButtonSize() + padding(); }
static int glowSize() { return 10; }
int titleOffset();
bool resolveSymbols();
void drawTitleBar(QPainter *painter);
void setMouseCursor(QPoint pos);
void collapseTopFrameStrut();
bool winEvent(MSG *message, long *result);
void mouseMoveEvent(QMouseEvent *event);
void mousePressEvent(QMouseEvent *event);
void mouseReleaseEvent(QMouseEvent *event);
bool eventFilter(QObject *obj, QEvent *event);
static bool is_vista;
static VistaState cachedVistaState;
static bool isCompositionEnabled();
static bool isThemeActive();
enum Changes { resizeTop, movePosition, noChange } change;
QPoint pressedPos;
bool pressed;
QRect rtTop;
QRect rtTitle;
QWizard *wizard;
QVistaBackButton *backButton_;
};
QT_END_NAMESPACE
#endif // QT_NO_STYLE_WINDOWSVISTA
#endif // QT_NO_WIZARD
#endif // QWIZARD_WIN_P_H
| Java |
/*
* See the NOTICE file distributed with this work for additional
* information regarding copyright ownership.
*
* This is free software; you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as
* published by the Free Software Foundation; either version 2.1 of
* the License, or (at your option) any later version.
*
* This software is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this software; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA, or see the FSF site: http://www.fsf.org.
*
*/
package com.xpn.xwiki.objects;
import java.io.IOException;
import java.io.Serializable;
import java.io.StringWriter;
import org.dom4j.Document;
import org.dom4j.Element;
import org.dom4j.dom.DOMDocument;
import org.dom4j.dom.DOMElement;
import org.dom4j.io.OutputFormat;
import org.dom4j.io.XMLWriter;
import com.xpn.xwiki.web.Utils;
/**
* @version $Id$
*/
// TODO: shouldn't this be abstract? toFormString and toText
// will never work unless getValue is overriden
public class BaseProperty extends BaseElement implements PropertyInterface, Serializable, Cloneable
{
private BaseCollection object;
private int id;
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.PropertyInterface#getObject()
*/
public BaseCollection getObject()
{
return this.object;
}
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.PropertyInterface#setObject(com.xpn.xwiki.objects.BaseCollection)
*/
public void setObject(BaseCollection object)
{
this.object = object;
}
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.BaseElement#equals(java.lang.Object)
*/
@Override
public boolean equals(Object el)
{
// Same Java object, they sure are equal
if (this == el) {
return true;
}
// I hate this.. needed for hibernate to find the object
// when loading the collections..
if ((this.object == null) || ((BaseProperty) el).getObject() == null) {
return (hashCode() == el.hashCode());
}
if (!super.equals(el)) {
return false;
}
return (getId() == ((BaseProperty) el).getId());
}
public int getId()
{
// I hate this.. needed for hibernate to find the object
// when loading the collections..
if (this.object == null) {
return this.id;
} else {
return getObject().getId();
}
}
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.PropertyInterface#setId(int)
*/
public void setId(int id)
{
// I hate this.. needed for hibernate to find the object
// when loading the collections..
this.id = id;
}
/**
* {@inheritDoc}
*
* @see java.lang.Object#hashCode()
*/
@Override
public int hashCode()
{
// I hate this.. needed for hibernate to find the object
// when loading the collections..
return ("" + getId() + getName()).hashCode();
}
public String getClassType()
{
return getClass().getName();
}
public void setClassType(String type)
{
}
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.BaseElement#clone()
*/
@Override
public Object clone()
{
BaseProperty property = (BaseProperty) super.clone();
property.setObject(getObject());
return property;
}
public Object getValue()
{
return null;
}
public void setValue(Object value)
{
}
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.PropertyInterface#toXML()
*/
public Element toXML()
{
Element el = new DOMElement(getName());
Object value = getValue();
el.setText((value == null) ? "" : value.toString());
return el;
}
/**
* {@inheritDoc}
*
* @see com.xpn.xwiki.objects.PropertyInterface#toFormString()
*/
public String toFormString()
{
return Utils.formEncode(toText());
}
public String toText()
{
Object value = getValue();
return (value == null) ? "" : value.toString();
}
public String toXMLString()
{
Document doc = new DOMDocument();
doc.setRootElement(toXML());
OutputFormat outputFormat = new OutputFormat("", true);
StringWriter out = new StringWriter();
XMLWriter writer = new XMLWriter(out, outputFormat);
try {
writer.write(doc);
return out.toString();
} catch (IOException e) {
e.printStackTrace();
return "";
}
}
/**
* {@inheritDoc}
*
* @see java.lang.Object#toString()
*/
@Override
public String toString()
{
return toXMLString();
}
public Object getCustomMappingValue()
{
return getValue();
}
}
| Java |
// ---------------------------------------------------------------------
//
// Copyright (C) 1999 - 2015 by the deal.II authors
//
// This file is part of the deal.II library.
//
// The deal.II library is free software; you can use it, redistribute
// it, and/or modify it under the terms of the GNU Lesser General
// Public License as published by the Free Software Foundation; either
// version 2.1 of the License, or (at your option) any later version.
// The full text of the license can be found in the file LICENSE at
// the top level of the deal.II distribution.
//
// ---------------------------------------------------------------------
//TODO: Do neighbors for dx and povray smooth triangles
//////////////////////////////////////////////////////////////////////
// Remarks on the implementations
//
// Variable names: in most functions, variable names have been
// standardized in the following way:
//
// n1, n2, ni Number of points in coordinate direction 1, 2, i
// will be 1 if i>=dim
//
// i1, i2, ii Loop variable running up to ni
//
// d1, d2, di Multiplicators for ii to find positions in the
// array of nodes.
//////////////////////////////////////////////////////////////////////
#include <deal.II/base/data_out_base.h>
#include <deal.II/base/utilities.h>
#include <deal.II/base/parameter_handler.h>
#include <deal.II/base/thread_management.h>
#include <deal.II/base/memory_consumption.h>
#include <deal.II/base/std_cxx11/shared_ptr.h>
#include <deal.II/base/mpi.h>
#include <cstring>
#include <algorithm>
#include <iomanip>
#include <ctime>
#include <cmath>
#include <set>
#include <sstream>
#include <fstream>
// we use uint32_t and uint8_t below, which are declared here:
#include <stdint.h>
#ifdef DEAL_II_WITH_ZLIB
# include <zlib.h>
#endif
#ifdef DEAL_II_WITH_HDF5
#include <hdf5.h>
#endif
DEAL_II_NAMESPACE_OPEN
// we need the following exception from a global function, so can't declare it
// in the usual way inside a class
namespace
{
DeclException2 (ExcUnexpectedInput,
std::string, std::string,
<< "Unexpected input: expected line\n <"
<< arg1
<< ">\nbut got\n <"
<< arg2 << ">");
}
namespace
{
#ifdef DEAL_II_WITH_ZLIB
// the functions in this namespace are
// taken from the libb64 project, see
// http://sourceforge.net/projects/libb64
//
// libb64 has been placed in the public
// domain
namespace base64
{
typedef enum
{
step_A, step_B, step_C
} base64_encodestep;
typedef struct
{
base64_encodestep step;
char result;
} base64_encodestate;
void base64_init_encodestate(base64_encodestate *state_in)
{
state_in->step = step_A;
state_in->result = 0;
}
inline
char base64_encode_value(char value_in)
{
static const char *encoding
= "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
if (value_in > 63) return '=';
return encoding[(int)value_in];
}
int base64_encode_block(const char *plaintext_in,
int length_in,
char *code_out,
base64_encodestate *state_in)
{
const char *plainchar = plaintext_in;
const char *const plaintextend = plaintext_in + length_in;
char *codechar = code_out;
char result;
char fragment;
result = state_in->result;
switch (state_in->step)
{
while (1)
{
case step_A:
if (plainchar == plaintextend)
{
state_in->result = result;
state_in->step = step_A;
return codechar - code_out;
}
fragment = *plainchar++;
result = (fragment & 0x0fc) >> 2;
*codechar++ = base64_encode_value(result);
result = (fragment & 0x003) << 4;
case step_B:
if (plainchar == plaintextend)
{
state_in->result = result;
state_in->step = step_B;
return codechar - code_out;
}
fragment = *plainchar++;
result |= (fragment & 0x0f0) >> 4;
*codechar++ = base64_encode_value(result);
result = (fragment & 0x00f) << 2;
case step_C:
if (plainchar == plaintextend)
{
state_in->result = result;
state_in->step = step_C;
return codechar - code_out;
}
fragment = *plainchar++;
result |= (fragment & 0x0c0) >> 6;
*codechar++ = base64_encode_value(result);
result = (fragment & 0x03f) >> 0;
*codechar++ = base64_encode_value(result);
}
}
/* control should not reach here */
return codechar - code_out;
}
int base64_encode_blockend(char *code_out, base64_encodestate *state_in)
{
char *codechar = code_out;
switch (state_in->step)
{
case step_B:
*codechar++ = base64_encode_value(state_in->result);
*codechar++ = '=';
*codechar++ = '=';
break;
case step_C:
*codechar++ = base64_encode_value(state_in->result);
*codechar++ = '=';
break;
case step_A:
break;
}
*codechar++ = '\0';
return codechar - code_out;
}
}
/**
* Do a base64 encoding of the given data.
*
* The function allocates memory as
* necessary and returns a pointer to
* it. The calling function must release
* this memory again.
*/
char *
encode_block (const char *data,
const int data_size)
{
base64::base64_encodestate state;
base64::base64_init_encodestate(&state);
char *encoded_data = new char[2*data_size+1];
const int encoded_length_data
= base64::base64_encode_block (data, data_size,
encoded_data, &state);
base64::base64_encode_blockend (encoded_data + encoded_length_data,
&state);
return encoded_data;
}
#endif
#ifdef DEAL_II_WITH_ZLIB
/**
* Do a zlib compression followed
* by a base64 encoding of the
* given data. The result is then
* written to the given stream.
*/
template <typename T>
void write_compressed_block (const std::vector<T> &data,
std::ostream &output_stream)
{
if (data.size() != 0)
{
// allocate a buffer for compressing
// data and do so
uLongf compressed_data_length
= compressBound (data.size() * sizeof(T));
char *compressed_data = new char[compressed_data_length];
int err = compress2 ((Bytef *) compressed_data,
&compressed_data_length,
(const Bytef *) &data[0],
data.size() * sizeof(T),
Z_BEST_COMPRESSION);
(void)err;
Assert (err == Z_OK, ExcInternalError());
// now encode the compression header
const uint32_t compression_header[4]
= { 1, /* number of blocks */
(uint32_t)(data.size() * sizeof(T)), /* size of block */
(uint32_t)(data.size() * sizeof(T)), /* size of last block */
(uint32_t)compressed_data_length
}; /* list of compressed sizes of blocks */
char *encoded_header = encode_block ((char *)&compression_header[0],
4 * sizeof(compression_header[0]));
output_stream << encoded_header;
delete[] encoded_header;
// next do the compressed
// data encoding in base64
char *encoded_data = encode_block (compressed_data,
compressed_data_length);
delete[] compressed_data;
output_stream << encoded_data;
delete[] encoded_data;
}
}
#endif
}
// some declarations of functions and locally used classes
namespace DataOutBase
{
namespace
{
/**
* Class holding the data of one cell of a patch in two space
* dimensions for output. It is the projection of a cell in
* three-dimensional space (two coordinates, one height value) to
* the direction of sight.
*/
class SvgCell
{
public:
// Center of the cell (three-dimensional)
Point<3> center;
/**
* Vector of vertices of this cell (three-dimensional)
*/
Point<3> vertices[4];
/**
* Depth into the picture, which is defined as the distance from
* an observer at an the origin in direction of the line of sight.
*/
float depth;
/**
* Vector of vertices of this cell (projected, two-dimensional).
*/
Point<2> projected_vertices[4];
// Center of the cell (projected, two-dimensional)
Point<2> projected_center;
/**
* Comparison operator for sorting.
*/
bool operator < (const SvgCell &) const;
};
bool SvgCell::operator < (const SvgCell &e) const
{
// note the "wrong" order in
// which we sort the elements
return depth > e.depth;
}
/**
* Class holding the data of one cell of a patch in two space
* dimensions for output. It is the projection of a cell in
* three-dimensional space (two coordinates, one height value) to
* the direction of sight.
*/
class EpsCell2d
{
public:
/**
* Vector of vertices of this cell.
*/
Point<2> vertices[4];
/**
* Data value from which the actual colors will be computed by the
* colorization function stated in the <tt>EpsFlags</tt> class.
*/
float color_value;
/**
* Depth into the picture, which is defined as the distance from
* an observer at an the origin in direction of the line of sight.
*/
float depth;
/**
* Comparison operator for sorting.
*/
bool operator < (const EpsCell2d &) const;
};
/**
* This is a helper function for the write_gmv() function. There,
* the data in the patches needs to be copied around as output is
* one variable globally at a time, rather than all data on each
* vertex at a time. This copying around can be done detached from
* the main thread, and is thus moved into this separate function.
*
* Note that because of the similarity of the formats, this function
* is also used by the Vtk and Tecplot output functions.
*/
template <int dim, int spacedim>
void
write_gmv_reorder_data_vectors (const std::vector<Patch<dim,spacedim> > &patches,
Table<2,double> &data_vectors)
{
// unlike in the main function, we
// don't have here the data_names
// field, so we initialize it with
// the number of data sets in the
// first patch. the equivalence of
// these two definitions is checked
// in the main function.
// we have to take care, however, whether the
// points are appended to the end of the
// patch->data table
const unsigned int n_data_sets
=patches[0].points_are_available ? (patches[0].data.n_rows() - spacedim) : patches[0].data.n_rows();
Assert (data_vectors.size()[0] == n_data_sets,
ExcInternalError());
// loop over all patches
unsigned int next_value = 0;
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch != patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
(void)n_subdivisions;
Assert ((patch->data.n_rows() == n_data_sets && !patch->points_are_available) ||
(patch->data.n_rows() == n_data_sets+spacedim && patch->points_are_available),
ExcDimensionMismatch (patch->points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patch->data.n_rows()));
Assert ((n_data_sets == 0)
||
(patch->data.n_cols() == Utilities::fixed_power<dim>(n_subdivisions+1)),
ExcInvalidDatasetSize (patch->data.n_cols(), n_subdivisions+1));
for (unsigned int i=0; i<patch->data.n_cols(); ++i, ++next_value)
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
data_vectors[data_set][next_value] = patch->data(data_set,i);
}
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
Assert (data_vectors[data_set].size() == next_value,
ExcInternalError());
}
}
}
//----------------------------------------------------------------------//
// DataOutFilter class member functions
//----------------------------------------------------------------------//
template<int dim>
void DataOutBase::DataOutFilter::write_point(const unsigned int &index, const Point<dim> &p)
{
Map3DPoint::const_iterator it;
unsigned int internal_ind;
Point<3> int_pt;
for (int d=0; d<3; ++d) int_pt(d) = (d < dim ? p(d) : 0);
node_dim = dim;
it = existing_points.find(int_pt);
// If the point isn't in the set, or we're not filtering duplicate points, add it
if (it == existing_points.end() || !flags.filter_duplicate_vertices)
{
internal_ind = existing_points.size();
existing_points.insert(std::make_pair(int_pt, internal_ind));
}
else
{
internal_ind = it->second;
}
// Now add the index to the list of filtered points
filtered_points[index] = internal_ind;
}
void DataOutBase::DataOutFilter::internal_add_cell(const unsigned int &cell_index, const unsigned int &pt_index)
{
filtered_cells[cell_index] = filtered_points[pt_index];
}
void DataOutBase::DataOutFilter::fill_node_data(std::vector<double> &node_data) const
{
Map3DPoint::const_iterator it;
node_data.resize(existing_points.size()*node_dim);
for (it=existing_points.begin(); it!=existing_points.end(); ++it)
{
for (int d=0; d<node_dim; ++d) node_data[node_dim*it->second+d] = it->first(d);
}
}
void DataOutBase::DataOutFilter::fill_cell_data(const unsigned int &local_node_offset, std::vector<unsigned int> &cell_data) const
{
std::map<unsigned int, unsigned int>::const_iterator it;
cell_data.resize(filtered_cells.size());
for (it=filtered_cells.begin(); it!=filtered_cells.end(); ++it)
{
cell_data[it->first] = it->second+local_node_offset;
}
}
template<int dim>
void
DataOutBase::DataOutFilter::write_cell(
unsigned int index,
unsigned int start,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
unsigned int base_entry = index * GeometryInfo<dim>::vertices_per_cell;
n_cell_verts = GeometryInfo<dim>::vertices_per_cell;
internal_add_cell(base_entry+0, start);
internal_add_cell(base_entry+1, start+d1);
if (dim>=2)
{
internal_add_cell(base_entry+2, start+d2+d1);
internal_add_cell(base_entry+3, start+d2);
if (dim>=3)
{
internal_add_cell(base_entry+4, start+d3);
internal_add_cell(base_entry+5, start+d3+d1);
internal_add_cell(base_entry+6, start+d3+d2+d1);
internal_add_cell(base_entry+7, start+d3+d2);
}
}
}
void DataOutBase::DataOutFilter::write_data_set(const std::string &name, const unsigned int &dimension, const unsigned int &set_num, const Table<2,double> &data_vectors)
{
unsigned int num_verts = existing_points.size();
unsigned int i, r, d, new_dim;
// HDF5/XDMF output only supports 1D or 3D output, so force rearrangement if needed
if (flags.xdmf_hdf5_output && dimension != 1) new_dim = 3;
else new_dim = dimension;
// Record the data set name, dimension, and allocate space for it
data_set_names.push_back(name);
data_set_dims.push_back(new_dim);
data_sets.push_back(std::vector<double>(new_dim*num_verts));
// TODO: averaging, min/max, etc for merged vertices
for (i=0; i<filtered_points.size(); ++i)
{
for (d=0; d<new_dim; ++d)
{
r = filtered_points[i];
if (d < dimension) data_sets.back()[r*new_dim+d] = data_vectors(set_num+d, i);
else data_sets.back()[r*new_dim+d] = 0;
}
}
}
//----------------------------------------------------------------------//
//Auxiliary data
//----------------------------------------------------------------------//
namespace
{
const char *gmv_cell_type[4] =
{
"", "line 2", "quad 4", "hex 8"
};
const char *ucd_cell_type[4] =
{
"", "line", "quad", "hex"
};
const char *tecplot_cell_type[4] =
{
"", "lineseg", "quadrilateral", "brick"
};
#ifdef DEAL_II_HAVE_TECPLOT
const unsigned int tecplot_binary_cell_type[4] =
{
0, 0, 1, 3
};
#endif
// NOTE: The dimension of the array is choosen to 5 to allow the choice
// DataOutBase<deal_II_dimension,deal_II_dimension+1> in general
// Wolfgang supposed that we don't need it in general, but however this
// choice avoids a -Warray-bounds check warning
const unsigned int vtk_cell_type[5] =
{
0, 3, 9, 12, static_cast<unsigned int>(-1)
};
//----------------------------------------------------------------------//
//Auxiliary functions
//----------------------------------------------------------------------//
//For a given patch, compute the node interpolating the corner nodes
//linearly at the point (xstep, ystep, zstep)*1./n_subdivisions.
//If the points are saved in the patch->data member, return the
//saved point instead
//TODO: Make this function return its value, rather than using a reference
// as first argument; take a reference for 'patch', not a pointer
template <int dim, int spacedim>
inline
void
compute_node(
Point<spacedim> &node,
const DataOutBase::Patch<dim,spacedim> *patch,
const unsigned int xstep,
const unsigned int ystep,
const unsigned int zstep,
const unsigned int n_subdivisions)
{
if (patch->points_are_available)
{
unsigned int point_no=0;
// note: switch without break !
switch (dim)
{
case 3:
Assert (zstep<n_subdivisions+1, ExcIndexRange(zstep,0,n_subdivisions+1));
point_no+=(n_subdivisions+1)*(n_subdivisions+1)*zstep;
case 2:
Assert (ystep<n_subdivisions+1, ExcIndexRange(ystep,0,n_subdivisions+1));
point_no+=(n_subdivisions+1)*ystep;
case 1:
Assert (xstep<n_subdivisions+1, ExcIndexRange(xstep,0,n_subdivisions+1));
point_no+=xstep;
// break here for dim<=3
break;
default:
Assert (false, ExcNotImplemented());
}
for (unsigned int d=0; d<spacedim; ++d)
node[d]=patch->data(patch->data.size(0)-spacedim+d,point_no);
}
else
{
// perform a dim-linear interpolation
const double stepsize=1./n_subdivisions,
xfrac=xstep*stepsize;
node = (patch->vertices[1] * xfrac) + (patch->vertices[0] * (1-xfrac));
if (dim>1)
{
const double yfrac=ystep*stepsize;
node*= 1-yfrac;
node += ((patch->vertices[3] * xfrac) + (patch->vertices[2] * (1-xfrac))) * yfrac;
if (dim>2)
{
const double zfrac=zstep*stepsize;
node *= (1-zfrac);
node += (((patch->vertices[5] * xfrac) + (patch->vertices[4] * (1-xfrac)))
* (1-yfrac) +
((patch->vertices[7] * xfrac) + (patch->vertices[6] * (1-xfrac)))
* yfrac) * zfrac;
}
}
}
}
template<int dim, int spacedim>
static
void
compute_sizes(const std::vector<DataOutBase::Patch<dim, spacedim> > &patches,
unsigned int &n_nodes,
unsigned int &n_cells)
{
n_nodes = 0;
n_cells = 0;
for (typename std::vector<DataOutBase::Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch!=patches.end(); ++patch)
{
n_nodes += Utilities::fixed_power<dim>(patch->n_subdivisions+1);
n_cells += Utilities::fixed_power<dim>(patch->n_subdivisions);
}
}
/**
* Class for writing basic
* entities in @ref
* SoftwareOpenDX format,
* depending on the flags.
*/
class DXStream
{
public:
/**
* Constructor, storing
* persistent values for
* later use.
*/
DXStream (std::ostream &stream,
const DataOutBase::DXFlags flags);
/**
* Output operator for points.
*/
template <int dim>
void write_point (const unsigned int index,
const Point<dim> &);
/**
* Do whatever is necessary to
* terminate the list of points.
*/
void flush_points ();
/**
* Write dim-dimensional cell
* with first vertex at
* number start and further
* vertices offset by the
* specified values. Values
* not needed are ignored.
*
* The order of vertices for
* these cells in different
* dimensions is
* <ol>
* <li> [0,1]
* <li> [0,2,1,3]
* <li> [0,4,2,6,1,5,3,7]
* </ol>
*/
template <int dim>
void write_cell (const unsigned int index,
const unsigned int start,
const unsigned int x_offset,
const unsigned int y_offset,
const unsigned int z_offset);
/**
* Do whatever is necessary to
* terminate the list of cells.
*/
void flush_cells ();
/**
* Write a complete set of
* data for a single node.
*
* The index given as first
* argument indicates the
* number of a data set, as
* some output formats require
* this number to be printed.
*/
template<typename data>
void write_dataset (const unsigned int index,
const std::vector<data> &values);
/**
* Forwarding of output stream
*/
template <typename T>
std::ostream &operator<< (const T &);
private:
/**
* The ostream to use. Since
* the life span of these
* objects is small, we use a
* very simple storage
* technique.
*/
std::ostream &stream;
/**
* The flags controlling the output
*/
const DataOutBase::DXFlags flags;
};
/**
* Class for writing basic
* entities in @ref SoftwareGMV
* format, depending on the
* flags.
*/
class GmvStream
{
public:
/**
* Constructor, storing
* persistent values for
* later use.
*/
GmvStream (std::ostream &stream,
const DataOutBase::GmvFlags flags);
/**
* Output operator for points.
*/
template <int dim>
void write_point (const unsigned int index,
const Point<dim> &);
/**
* Do whatever is necessary to
* terminate the list of points.
*/
void flush_points ();
/**
* Write dim-dimensional cell
* with first vertex at
* number start and further
* vertices offset by the
* specified values. Values
* not needed are ignored.
*
* The order of vertices for
* these cells in different
* dimensions is
* <ol>
* <li> [0,1]
* <li> [0,1,3,2]
* <li> [0,1,3,2,4,5,7,6]
* </ol>
*/
template <int dim>
void write_cell(const unsigned int index,
const unsigned int start,
const unsigned int x_offset,
const unsigned int y_offset,
const unsigned int z_offset);
/**
* Do whatever is necessary to
* terminate the list of cells.
*/
void flush_cells ();
/**
* Forwarding of output stream
*/
template <typename T>
std::ostream &operator<< (const T &);
/**
* Since GMV reads the x, y
* and z coordinates in
* separate fields, we enable
* write() to output only a
* single selected component
* at once and do this dim
* times for the whole set of
* nodes. This integer can be
* used to select the
* component written.
*/
unsigned int selected_component;
private:
/**
* The ostream to use. Since
* the life span of these
* objects is small, we use a
* very simple storage
* technique.
*/
std::ostream &stream;
/**
* The flags controlling the output
*/
const DataOutBase::GmvFlags flags;
};
/**
* Class for writing basic
* entities in @ref
* SoftwareTecplot format,
* depending on the flags.
*/
class TecplotStream
{
public:
/**
* Constructor, storing
* persistent values for
* later use.
*/
TecplotStream (std::ostream &stream, const DataOutBase::TecplotFlags flags);
/**
* Output operator for points.
*/
template <int dim>
void write_point (const unsigned int index,
const Point<dim> &);
/**
* Do whatever is necessary to
* terminate the list of points.
*/
void flush_points ();
/**
* Write dim-dimensional cell
* with first vertex at
* number start and further
* vertices offset by the
* specified values. Values
* not needed are ignored.
*
* The order of vertices for
* these cells in different
* dimensions is
* <ol>
* <li> [0,1]
* <li> [0,1,3,2]
* <li> [0,1,3,2,4,5,7,6]
* </ol>
*/
template <int dim>
void write_cell(const unsigned int index,
const unsigned int start,
const unsigned int x_offset,
const unsigned int y_offset,
const unsigned int z_offset);
/**
* Do whatever is necessary to
* terminate the list of cells.
*/
void flush_cells ();
/**
* Forwarding of output stream
*/
template <typename T>
std::ostream &operator<< (const T &);
/**
* Since TECPLOT reads the x, y
* and z coordinates in
* separate fields, we enable
* write() to output only a
* single selected component
* at once and do this dim
* times for the whole set of
* nodes. This integer can be
* used to select the
* component written.
*/
unsigned int selected_component;
private:
/**
* The ostream to use. Since
* the life span of these
* objects is small, we use a
* very simple storage
* technique.
*/
std::ostream &stream;
/**
* The flags controlling the output
*/
const DataOutBase::TecplotFlags flags;
};
/**
* Class for writing basic
* entities in UCD format for
* @ref SoftwareAVS, depending on
* the flags.
*/
class UcdStream
{
public:
/**
* Constructor, storing
* persistent values for
* later use.
*/
UcdStream (std::ostream &stream,
const DataOutBase::UcdFlags flags);
/**
* Output operator for points.
*/
template <int dim>
void write_point (const unsigned int index,
const Point<dim> &);
/**
* Do whatever is necessary to
* terminate the list of points.
*/
void flush_points ();
/**
* Write dim-dimensional cell
* with first vertex at
* number start and further
* vertices offset by the
* specified values. Values
* not needed are ignored.
*
* The additional offset 1 is
* added inside this
* function.
*
* The order of vertices for
* these cells in different
* dimensions is
* <ol>
* <li> [0,1]
* <li> [0,1,3,2]
* <li> [0,1,5,4,2,3,7,6]
* </ol>
*/
template <int dim>
void write_cell(const unsigned int index,
const unsigned int start,
const unsigned int x_offset,
const unsigned int y_offset,
const unsigned int z_offset);
/**
* Do whatever is necessary to
* terminate the list of cells.
*/
void flush_cells ();
/**
* Write a complete set of
* data for a single node.
*
* The index given as first
* argument indicates the
* number of a data set, as
* some output formats require
* this number to be printed.
*/
template<typename data>
void write_dataset (const unsigned int index,
const std::vector<data> &values);
/**
* Forwarding of output stream
*/
template <typename T>
std::ostream &operator<< (const T &);
private:
/**
* The ostream to use. Since
* the life span of these
* objects is small, we use a
* very simple storage
* technique.
*/
std::ostream &stream;
/**
* The flags controlling the output
*/
const DataOutBase::UcdFlags flags;
};
/**
* Class for writing basic
* entities in @ref SoftwareVTK
* format, depending on the
* flags.
*/
class VtkStream
{
public:
/**
* Constructor, storing
* persistent values for
* later use.
*/
VtkStream (std::ostream &stream,
const DataOutBase::VtkFlags flags);
/**
* Output operator for points.
*/
template <int dim>
void write_point (const unsigned int index,
const Point<dim> &);
/**
* Do whatever is necessary to
* terminate the list of points.
*/
void flush_points ();
/**
* Write dim-dimensional cell
* with first vertex at
* number start and further
* vertices offset by the
* specified values. Values
* not needed are ignored.
*
* The order of vertices for
* these cells in different
* dimensions is
* <ol>
* <li> [0,1]
* <li> []
* <li> []
* </ol>
*/
template <int dim>
void write_cell(const unsigned int index,
const unsigned int start,
const unsigned int x_offset,
const unsigned int y_offset,
const unsigned int z_offset);
/**
* Do whatever is necessary to
* terminate the list of cells.
*/
void flush_cells ();
/**
* Forwarding of output stream
*/
template <typename T>
std::ostream &operator<< (const T &);
private:
/**
* The ostream to use. Since
* the life span of these
* objects is small, we use a
* very simple storage
* technique.
*/
std::ostream &stream;
/**
* The flags controlling the output
*/
const DataOutBase::VtkFlags flags;
};
class VtuStream
{
public:
/**
* Constructor, storing
* persistent values for
* later use.
*/
VtuStream (std::ostream &stream,
const DataOutBase::VtkFlags flags);
/**
* Output operator for points.
*/
template <int dim>
void write_point (const unsigned int index,
const Point<dim> &);
/**
* Do whatever is necessary to
* terminate the list of points.
*/
void flush_points ();
/**
* Write dim-dimensional cell
* with first vertex at
* number start and further
* vertices offset by the
* specified values. Values
* not needed are ignored.
*
* The order of vertices for
* these cells in different
* dimensions is
* <ol>
* <li> [0,1]
* <li> []
* <li> []
* </ol>
*/
template <int dim>
void write_cell(const unsigned int index,
const unsigned int start,
const unsigned int x_offset,
const unsigned int y_offset,
const unsigned int z_offset);
/**
* Do whatever is necessary to
* terminate the list of cells.
*/
void flush_cells ();
/**
* Forwarding of output stream
*/
template <typename T>
std::ostream &operator<< (const T &);
/**
* Forwarding of output stream.
*
* If libz was found during
* configuration, this operator
* compresses and encodes the
* entire data
* block. Otherwise, it simply
* writes it element by
* element.
*/
template <typename T>
std::ostream &operator<< (const std::vector<T> &);
private:
/**
* The ostream to use. Since
* the life span of these
* objects is small, we use a
* very simple storage
* technique.
*/
std::ostream &stream;
/**
* The flags controlling the output
*/
const DataOutBase::VtkFlags flags;
/**
* A list of vertices and
* cells, to be used in case we
* want to compress the data.
*
* The data types of these
* arrays needs to match what
* we print in the XML-preamble
* to the respective parts of
* VTU files (e.g. Float64 and
* Int32)
*/
std::vector<double> vertices;
std::vector<int32_t> cells;
};
//----------------------------------------------------------------------//
DXStream::DXStream(std::ostream &out,
const DataOutBase::DXFlags f)
:
stream(out), flags(f)
{}
template<int dim>
void
DXStream::write_point (const unsigned int,
const Point<dim> &p)
{
if (flags.coordinates_binary)
{
float data[dim];
for (unsigned int d=0; d<dim; ++d)
data[d] = p(d);
stream.write(reinterpret_cast<const char *>(data),
dim * sizeof(*data));
}
else
{
for (unsigned int d=0; d<dim; ++d)
stream << p(d) << '\t';
stream << '\n';
}
}
void
DXStream::flush_points ()
{}
template<int dim>
void
DXStream::write_cell(
unsigned int,
unsigned int start,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
int nodes[1<<dim];
nodes[GeometryInfo<dim>::dx_to_deal[0]] = start;
nodes[GeometryInfo<dim>::dx_to_deal[1]] = start+d1;
if (dim>=2)
{
// Add shifted line in y direction
nodes[GeometryInfo<dim>::dx_to_deal[2]] = start+d2;
nodes[GeometryInfo<dim>::dx_to_deal[3]] = start+d2+d1;
if (dim>=3)
{
// Add shifted quad in z direction
nodes[GeometryInfo<dim>::dx_to_deal[4]] = start+d3;
nodes[GeometryInfo<dim>::dx_to_deal[5]] = start+d3+d1;
nodes[GeometryInfo<dim>::dx_to_deal[6]] = start+d3+d2;
nodes[GeometryInfo<dim>::dx_to_deal[7]] = start+d3+d2+d1;
}
}
if (flags.int_binary)
stream.write(reinterpret_cast<const char *>(nodes),
(1<<dim) * sizeof(*nodes));
else
{
const unsigned int final = (1<<dim) - 1;
for (unsigned int i=0; i<final ; ++i)
stream << nodes[i] << '\t';
stream << nodes[final] << '\n';
}
}
void
DXStream::flush_cells ()
{}
template<typename data>
inline
void
DXStream::write_dataset(const unsigned int /*index*/,
const std::vector<data> &values)
{
if (flags.data_binary)
{
stream.write(reinterpret_cast<const char *>(&values[0]),
values.size()*sizeof(data));
}
else
{
for (unsigned int i=0; i<values.size(); ++i)
stream << '\t' << values[i];
stream << '\n';
}
}
//----------------------------------------------------------------------//
GmvStream::GmvStream (std::ostream &out,
const DataOutBase::GmvFlags f)
:
selected_component(numbers::invalid_unsigned_int),
stream(out), flags(f)
{}
template<int dim>
void
GmvStream::write_point (const unsigned int,
const Point<dim> &p)
{
Assert(selected_component != numbers::invalid_unsigned_int,
ExcNotInitialized());
stream << p(selected_component) << ' ';
}
void
GmvStream::flush_points ()
{}
template<int dim>
void
GmvStream::write_cell(
unsigned int,
unsigned int s,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
// Vertices are numbered starting
// with one.
const unsigned int start=s+1;
stream << gmv_cell_type[dim] << '\n';
stream << start << '\t'
<< start+d1;
if (dim>=2)
{
stream << '\t' << start+d2+d1
<< '\t' << start+d2;
if (dim>=3)
{
stream << '\t' << start+d3
<< '\t' << start+d3+d1
<< '\t' << start+d3+d2+d1
<< '\t' << start+d3+d2;
}
}
stream << '\n';
}
void
GmvStream::flush_cells ()
{}
//----------------------------------------------------------------------//
TecplotStream::TecplotStream(std::ostream &out, const DataOutBase::TecplotFlags f)
:
selected_component(numbers::invalid_unsigned_int),
stream(out), flags(f)
{}
template<int dim>
void
TecplotStream::write_point (const unsigned int,
const Point<dim> &p)
{
Assert(selected_component != numbers::invalid_unsigned_int,
ExcNotInitialized());
stream << p(selected_component) << '\n';
}
void
TecplotStream::flush_points ()
{}
template<int dim>
void
TecplotStream::write_cell(
unsigned int,
unsigned int s,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
const unsigned int start = s+1;
stream << start << '\t'
<< start+d1;
if (dim>=2)
{
stream << '\t' << start+d2+d1
<< '\t' << start+d2;
if (dim>=3)
{
stream << '\t' << start+d3
<< '\t' << start+d3+d1
<< '\t' << start+d3+d2+d1
<< '\t' << start+d3+d2;
}
}
stream << '\n';
}
void
TecplotStream::flush_cells ()
{}
//----------------------------------------------------------------------//
UcdStream::UcdStream(std::ostream &out, const DataOutBase::UcdFlags f)
:
stream(out), flags(f)
{}
template<int dim>
void
UcdStream::write_point (const unsigned int index,
const Point<dim> &p)
{
stream << index+1
<< " ";
// write out coordinates
for (unsigned int i=0; i<dim; ++i)
stream << p(i) << ' ';
// fill with zeroes
for (unsigned int i=dim; i<3; ++i)
stream << "0 ";
stream << '\n';
}
void
UcdStream::flush_points ()
{}
template<int dim>
void
UcdStream::write_cell(
unsigned int index,
unsigned int start,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
int nodes[1<<dim];
nodes[GeometryInfo<dim>::ucd_to_deal[0]] = start;
nodes[GeometryInfo<dim>::ucd_to_deal[1]] = start+d1;
if (dim>=2)
{
// Add shifted line in y direction
nodes[GeometryInfo<dim>::ucd_to_deal[2]] = start+d2;
nodes[GeometryInfo<dim>::ucd_to_deal[3]] = start+d2+d1;
if (dim>=3)
{
// Add shifted quad in z direction
nodes[GeometryInfo<dim>::ucd_to_deal[4]] = start+d3;
nodes[GeometryInfo<dim>::ucd_to_deal[5]] = start+d3+d1;
nodes[GeometryInfo<dim>::ucd_to_deal[6]] = start+d3+d2;
nodes[GeometryInfo<dim>::ucd_to_deal[7]] = start+d3+d2+d1;
}
}
// Write out all cells and remember
// that all indices must be shifted
// by one.
stream << index+1 << "\t0 " << ucd_cell_type[dim];
const unsigned int final = (1<<dim);
for (unsigned int i=0; i<final ; ++i)
stream << '\t' << nodes[i]+1;
stream << '\n';
}
void
UcdStream::flush_cells ()
{}
template<typename data>
inline
void
UcdStream::write_dataset(const unsigned int index,
const std::vector<data> &values)
{
stream << index+1;
for (unsigned int i=0; i<values.size(); ++i)
stream << '\t' << values[i];
stream << '\n';
}
//----------------------------------------------------------------------//
VtkStream::VtkStream(std::ostream &out, const DataOutBase::VtkFlags f)
:
stream(out), flags(f)
{}
template<int dim>
void
VtkStream::write_point (const unsigned int,
const Point<dim> &p)
{
// write out coordinates
stream << p;
// fill with zeroes
for (unsigned int i=dim; i<3; ++i)
stream << " 0";
stream << '\n';
}
void
VtkStream::flush_points ()
{}
template<int dim>
void
VtkStream::write_cell(
unsigned int,
unsigned int start,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
stream << GeometryInfo<dim>::vertices_per_cell << '\t'
<< start << '\t'
<< start+d1;
if (dim>=2)
{
stream << '\t' << start+d2+d1
<< '\t' << start+d2;
if (dim>=3)
{
stream << '\t' << start+d3
<< '\t' << start+d3+d1
<< '\t' << start+d3+d2+d1
<< '\t' << start+d3+d2;
}
}
stream << '\n';
}
void
VtkStream::flush_cells ()
{}
VtuStream::VtuStream(std::ostream &out, const DataOutBase::VtkFlags f)
:
stream(out), flags(f)
{}
template<int dim>
void
VtuStream::write_point (const unsigned int,
const Point<dim> &p)
{
#if !defined(DEAL_II_WITH_ZLIB)
// write out coordinates
stream << p;
// fill with zeroes
for (unsigned int i=dim; i<3; ++i)
stream << " 0";
stream << '\n';
#else
// if we want to compress, then
// first collect all the data in
// an array
for (unsigned int i=0; i<dim; ++i)
vertices.push_back(p[i]);
for (unsigned int i=dim; i<3; ++i)
vertices.push_back(0);
#endif
}
void
VtuStream::flush_points ()
{
#ifdef DEAL_II_WITH_ZLIB
// compress the data we have in
// memory and write them to the
// stream. then release the data
*this << vertices << '\n';
vertices.clear ();
#endif
}
template<int dim>
void
VtuStream::write_cell(
unsigned int,
unsigned int start,
unsigned int d1,
unsigned int d2,
unsigned int d3)
{
#if !defined(DEAL_II_WITH_ZLIB)
stream << start << '\t'
<< start+d1;
if (dim>=2)
{
stream << '\t' << start+d2+d1
<< '\t' << start+d2;
if (dim>=3)
{
stream << '\t' << start+d3
<< '\t' << start+d3+d1
<< '\t' << start+d3+d2+d1
<< '\t' << start+d3+d2;
}
}
stream << '\n';
#else
cells.push_back (start);
cells.push_back (start+d1);
if (dim>=2)
{
cells.push_back (start+d2+d1);
cells.push_back (start+d2);
if (dim>=3)
{
cells.push_back (start+d3);
cells.push_back (start+d3+d1);
cells.push_back (start+d3+d2+d1);
cells.push_back (start+d3+d2);
}
}
#endif
}
void
VtuStream::flush_cells ()
{
#ifdef DEAL_II_WITH_ZLIB
// compress the data we have in
// memory and write them to the
// stream. then release the data
*this << cells << '\n';
cells.clear ();
#endif
}
template <typename T>
std::ostream &
VtuStream::operator<< (const std::vector<T> &data)
{
#ifdef DEAL_II_WITH_ZLIB
// compress the data we have in
// memory and write them to the
// stream. then release the data
write_compressed_block (data, stream);
#else
for (unsigned int i=0; i<data.size(); ++i)
stream << data[i] << ' ';
#endif
return stream;
}
template <typename T>
std::ostream &
DXStream::operator<< (const T &t)
{
stream << t;
return stream;
}
template <typename T>
std::ostream &
GmvStream::operator<< (const T &t)
{
stream << t;
return stream;
}
template <typename T>
std::ostream &
UcdStream::operator<< (const T &t)
{
stream << t;
return stream;
}
template <typename T>
std::ostream &
VtkStream::operator<< (const T &t)
{
stream << t;
return stream;
}
}
//----------------------------------------------------------------------//
namespace DataOutBase
{
template <int dim, int spacedim>
const unsigned int Patch<dim,spacedim>::space_dim;
const unsigned int Deal_II_IntermediateFlags::format_version;
template <int dim, int spacedim>
const unsigned int Patch<dim,spacedim>::no_neighbor;
template <int dim, int spacedim>
Patch<dim,spacedim>::Patch ()
:
patch_index(no_neighbor),
n_subdivisions (1),
points_are_available(false)
// all the other data has a
// constructor of its own, except
// for the "neighbors" field, which
// we set to invalid values.
{
for (unsigned int i=0; i<GeometryInfo<dim>::faces_per_cell; ++i)
neighbors[i] = no_neighbor;
Assert (dim<=spacedim, ExcIndexRange(dim,0,spacedim));
Assert (spacedim<=3, ExcNotImplemented());
}
template <int dim, int spacedim>
bool
Patch<dim,spacedim>::operator == (const Patch &patch) const
{
//TODO: make tolerance relative
const double epsilon=3e-16;
for (unsigned int i=0; i<GeometryInfo<dim>::vertices_per_cell; ++i)
if (vertices[i].distance(patch.vertices[i]) > epsilon)
return false;
for (unsigned int i=0; i<GeometryInfo<dim>::faces_per_cell; ++i)
if (neighbors[i] != patch.neighbors[i])
return false;
if (patch_index != patch.patch_index)
return false;
if (n_subdivisions != patch.n_subdivisions)
return false;
if (points_are_available != patch.points_are_available)
return false;
if (data.n_rows() != patch.data.n_rows())
return false;
if (data.n_cols() != patch.data.n_cols())
return false;
for (unsigned int i=0; i<data.n_rows(); ++i)
for (unsigned int j=0; j<data.n_cols(); ++j)
if (data[i][j] != patch.data[i][j])
return false;
return true;
}
template <int dim, int spacedim>
std::size_t
Patch<dim,spacedim>::memory_consumption () const
{
return (sizeof(vertices) / sizeof(vertices[0]) *
MemoryConsumption::memory_consumption(vertices[0])
+
MemoryConsumption::memory_consumption(n_subdivisions)
+
MemoryConsumption::memory_consumption(data)
+
MemoryConsumption::memory_consumption(points_are_available));
}
UcdFlags::UcdFlags (const bool write_preamble)
:
write_preamble (write_preamble)
{}
PovrayFlags::PovrayFlags (const bool smooth,
const bool bicubic_patch,
const bool external_data)
:
smooth (smooth),
bicubic_patch(bicubic_patch),
external_data(external_data)
{}
DataOutFilterFlags::DataOutFilterFlags (const bool filter_duplicate_vertices,
const bool xdmf_hdf5_output) :
filter_duplicate_vertices(filter_duplicate_vertices),
xdmf_hdf5_output(xdmf_hdf5_output)
{}
void DataOutFilterFlags::declare_parameters (ParameterHandler &prm)
{
prm.declare_entry ("Filter duplicate vertices", "false",
Patterns::Bool(),
"Whether to remove duplicate vertex values.");
prm.declare_entry ("XDMF HDF5 output", "false",
Patterns::Bool(),
"Whether the data will be used in an XDMF/HDF5 combination.");
}
void DataOutFilterFlags::parse_parameters (const ParameterHandler &prm)
{
filter_duplicate_vertices = prm.get_bool ("Filter duplicate vertices");
xdmf_hdf5_output = prm.get_bool ("XDMF HDF5 output");
}
std::size_t
DataOutFilterFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
DXFlags::DXFlags (const bool write_neighbors,
const bool int_binary,
const bool coordinates_binary,
const bool data_binary)
:
write_neighbors(write_neighbors),
int_binary(int_binary),
coordinates_binary(coordinates_binary),
data_binary(data_binary),
data_double(false)
{}
void DXFlags::declare_parameters (ParameterHandler &prm)
{
prm.declare_entry ("Write neighbors", "true",
Patterns::Bool(),
"A boolean field indicating whether neighborship "
"information between cells is to be written to the "
"OpenDX output file");
prm.declare_entry ("Integer format", "ascii",
Patterns::Selection("ascii|32|64"),
"Output format of integer numbers, which is "
"either a text representation (ascii) or binary integer "
"values of 32 or 64 bits length");
prm.declare_entry ("Coordinates format", "ascii",
Patterns::Selection("ascii|32|64"),
"Output format of vertex coordinates, which is "
"either a text representation (ascii) or binary "
"floating point values of 32 or 64 bits length");
prm.declare_entry ("Data format", "ascii",
Patterns::Selection("ascii|32|64"),
"Output format of data values, which is "
"either a text representation (ascii) or binary "
"floating point values of 32 or 64 bits length");
}
void DXFlags::parse_parameters (const ParameterHandler &prm)
{
write_neighbors = prm.get_bool ("Write neighbors");
//TODO:[GK] Read the new parameters
}
std::size_t
DXFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
void UcdFlags::declare_parameters (ParameterHandler &prm)
{
prm.declare_entry ("Write preamble", "true",
Patterns::Bool(),
"A flag indicating whether a comment should be "
"written to the beginning of the output file "
"indicating date and time of creation as well "
"as the creating program");
}
void UcdFlags::parse_parameters (const ParameterHandler &prm)
{
write_preamble = prm.get_bool ("Write preamble");
}
std::size_t
UcdFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
GnuplotFlags::GnuplotFlags ()
:
dummy (0)
{}
void GnuplotFlags::declare_parameters (ParameterHandler &/*prm*/)
{}
void GnuplotFlags::parse_parameters (const ParameterHandler &/*prm*/) const
{}
size_t
GnuplotFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
SvgFlags::SvgFlags (const unsigned int height_vector,
const int azimuth_angle,
const int polar_angle,
const unsigned int line_thickness,
const bool margin,
const bool draw_colorbar)
:
height(4000),
width(0),
height_vector(height_vector),
azimuth_angle(azimuth_angle),
polar_angle(polar_angle),
line_thickness(line_thickness),
margin(margin),
draw_colorbar(draw_colorbar)
{}
std::size_t
SvgFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
void PovrayFlags::declare_parameters (ParameterHandler &prm)
{
prm.declare_entry ("Use smooth triangles", "false",
Patterns::Bool(),
"A flag indicating whether POVRAY should use smoothed "
"triangles instead of the usual ones");
prm.declare_entry ("Use bicubic patches", "false",
Patterns::Bool(),
"Whether POVRAY should use bicubic patches");
prm.declare_entry ("Include external file", "true",
Patterns::Bool (),
"Whether camera and lightling information should "
"be put into an external file \"data.inc\" or into "
"the POVRAY input file");
}
void PovrayFlags::parse_parameters (const ParameterHandler &prm)
{
smooth = prm.get_bool ("Use smooth triangles");
bicubic_patch = prm.get_bool ("Use bicubic patches");
external_data = prm.get_bool ("Include external file");
}
std::size_t
PovrayFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
EpsFlags::EpsFlags (const unsigned int height_vector,
const unsigned int color_vector,
const SizeType size_type,
const unsigned int size,
const double line_width,
const double azimut_angle,
const double turn_angle,
const double z_scaling,
const bool draw_mesh,
const bool draw_cells,
const bool shade_cells,
const ColorFunction color_function)
:
height_vector(height_vector),
color_vector(color_vector),
size_type(size_type),
size(size),
line_width(line_width),
azimut_angle(azimut_angle),
turn_angle(turn_angle),
z_scaling(z_scaling),
draw_mesh(draw_mesh),
draw_cells(draw_cells),
shade_cells(shade_cells),
color_function(color_function)
{}
EpsFlags::RgbValues
EpsFlags::default_color_function (const double x,
const double xmin,
const double xmax)
{
RgbValues rgb_values = { 0,0,0 };
// A difficult color scale:
// xmin = black (1)
// 3/4*xmin+1/4*xmax = blue (2)
// 1/2*xmin+1/2*xmax = green (3)
// 1/4*xmin+3/4*xmax = red (4)
// xmax = white (5)
// Makes the following color functions:
//
// red green blue
// __
// / /\ / /\ /
// ____/ __/ \/ / \__/
// { 0 (1) - (3)
// r = { ( 4*x-2*xmin+2*xmax)/(xmax-xmin) (3) - (4)
// { 1 (4) - (5)
//
// { 0 (1) - (2)
// g = { ( 4*x-3*xmin- xmax)/(xmax-xmin) (2) - (3)
// { (-4*x+ xmin+3*xmax)/(xmax-xmin) (3) - (4)
// { ( 4*x- xmin-3*xmax)/(xmax-xmin) (4) - (5)
//
// { ( 4*x-4*xmin )/(xmax-xmin) (1) - (2)
// b = { (-4*x+2*xmin+2*xmax)/(xmax-xmin) (2) - (3)
// { 0 (3) - (4)
// { ( 4*x- xmin-3*xmax)/(xmax-xmin) (4) - (5)
double sum = xmax+ xmin;
double sum13 = xmin+3*xmax;
double sum22 = 2*xmin+2*xmax;
double sum31 = 3*xmin+ xmax;
double dif = xmax-xmin;
double rezdif = 1.0/dif;
int where;
if (x<(sum31)/4)
where = 0;
else if (x<(sum22)/4)
where = 1;
else if (x<(sum13)/4)
where = 2;
else
where = 3;
if (dif!=0)
{
switch (where)
{
case 0:
rgb_values.red = 0;
rgb_values.green = 0;
rgb_values.blue = (x-xmin)*4.*rezdif;
break;
case 1:
rgb_values.red = 0;
rgb_values.green = (4*x-3*xmin-xmax)*rezdif;
rgb_values.blue = (sum22-4.*x)*rezdif;
break;
case 2:
rgb_values.red = (4*x-2*sum)*rezdif;
rgb_values.green = (xmin+3*xmax-4*x)*rezdif;
rgb_values.blue = 0;
break;
case 3:
rgb_values.red = 1;
rgb_values.green = (4*x-xmin-3*xmax)*rezdif;
rgb_values.blue = (4.*x-sum13)*rezdif;
default:
break;
}
}
else // White
rgb_values.red = rgb_values.green = rgb_values.blue = 1;
return rgb_values;
}
EpsFlags::RgbValues
EpsFlags::grey_scale_color_function (const double x,
const double xmin,
const double xmax)
{
EpsFlags::RgbValues rgb_values;
rgb_values.red = rgb_values.blue = rgb_values.green
= (x-xmin)/(xmax-xmin);
return rgb_values;
}
EpsFlags::RgbValues
EpsFlags::reverse_grey_scale_color_function (const double x,
const double xmin,
const double xmax)
{
EpsFlags::RgbValues rgb_values;
rgb_values.red = rgb_values.blue = rgb_values.green
= 1-(x-xmin)/(xmax-xmin);
return rgb_values;
}
bool EpsCell2d::operator < (const EpsCell2d &e) const
{
// note the "wrong" order in
// which we sort the elements
return depth > e.depth;
}
void EpsFlags::declare_parameters (ParameterHandler &prm)
{
prm.declare_entry ("Index of vector for height", "0",
Patterns::Integer(),
"Number of the input vector that is to be used to "
"generate height information");
prm.declare_entry ("Index of vector for color", "0",
Patterns::Integer(),
"Number of the input vector that is to be used to "
"generate color information");
prm.declare_entry ("Scale to width or height", "width",
Patterns::Selection ("width|height"),
"Whether width or height should be scaled to match "
"the given size");
prm.declare_entry ("Size (width or height) in eps units", "300",
Patterns::Integer(),
"The size (width or height) to which the eps output "
"file is to be scaled");
prm.declare_entry ("Line widths in eps units", "0.5",
Patterns::Double(),
"The width in which the postscript renderer is to "
"plot lines");
prm.declare_entry ("Azimut angle", "60",
Patterns::Double(0,180),
"Angle of the viewing position against the vertical "
"axis");
prm.declare_entry ("Turn angle", "30",
Patterns::Double(0,360),
"Angle of the viewing direction against the y-axis");
prm.declare_entry ("Scaling for z-axis", "1",
Patterns::Double (),
"Scaling for the z-direction relative to the scaling "
"used in x- and y-directions");
prm.declare_entry ("Draw mesh lines", "true",
Patterns::Bool(),
"Whether the mesh lines, or only the surface should be "
"drawn");
prm.declare_entry ("Fill interior of cells", "true",
Patterns::Bool(),
"Whether only the mesh lines, or also the interior of "
"cells should be plotted. If this flag is false, then "
"one can see through the mesh");
prm.declare_entry ("Color shading of interior of cells", "true",
Patterns::Bool(),
"Whether the interior of cells shall be shaded");
prm.declare_entry ("Color function", "default",
Patterns::Selection ("default|grey scale|reverse grey scale"),
"Name of a color function used to colorize mesh lines "
"and/or cell interiors");
}
void EpsFlags::parse_parameters (const ParameterHandler &prm)
{
height_vector = prm.get_integer ("Index of vector for height");
color_vector = prm.get_integer ("Index of vector for color");
if (prm.get ("Scale to width or height") == "width")
size_type = width;
else
size_type = height;
size = prm.get_integer ("Size (width or height) in eps units");
line_width = prm.get_double ("Line widths in eps units");
azimut_angle = prm.get_double ("Azimut angle");
turn_angle = prm.get_double ("Turn angle");
z_scaling = prm.get_double ("Scaling for z-axis");
draw_mesh = prm.get_bool ("Draw mesh lines");
draw_cells = prm.get_bool ("Fill interior of cells");
shade_cells = prm.get_bool ("Color shading of interior of cells");
if (prm.get("Color function") == "default")
color_function = &default_color_function;
else if (prm.get("Color function") == "grey scale")
color_function = &grey_scale_color_function;
else if (prm.get("Color function") == "reverse grey scale")
color_function = &reverse_grey_scale_color_function;
else
// we shouldn't get here, since
// the parameter object should
// already have checked that the
// given value is valid
Assert (false, ExcInternalError());
}
std::size_t
EpsFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
GmvFlags::GmvFlags ()
{}
void GmvFlags::declare_parameters (ParameterHandler &/*prm*/)
{}
void GmvFlags::parse_parameters (const ParameterHandler &/*prm*/) const
{}
std::size_t
GmvFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
TecplotFlags::
TecplotFlags (const char *tecplot_binary_file_name,
const char *zone_name)
:
tecplot_binary_file_name(tecplot_binary_file_name),
zone_name(zone_name)
{}
void TecplotFlags::declare_parameters (ParameterHandler &/*prm*/)
{}
void TecplotFlags::parse_parameters (const ParameterHandler &/*prm*/) const
{}
std::size_t
TecplotFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
VtkFlags::VtkFlags (const double time,
const unsigned int cycle,
const bool print_date_and_time)
:
time (time),
cycle (cycle),
print_date_and_time (print_date_and_time)
{}
void VtkFlags::declare_parameters (ParameterHandler &/*prm*/)
{}
void VtkFlags::parse_parameters (const ParameterHandler &/*prm*/) const
{}
std::size_t
VtkFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
Deal_II_IntermediateFlags::Deal_II_IntermediateFlags ()
:
dummy (0)
{}
void Deal_II_IntermediateFlags::declare_parameters (ParameterHandler &/*prm*/)
{}
void Deal_II_IntermediateFlags::parse_parameters (const ParameterHandler &/*prm*/) const
{}
std::size_t
Deal_II_IntermediateFlags::memory_consumption () const
{
// only simple data elements, so
// use sizeof operator
return sizeof (*this);
}
OutputFormat
parse_output_format (const std::string &format_name)
{
if (format_name == "none")
return none;
if (format_name == "dx")
return dx;
if (format_name == "ucd")
return ucd;
if (format_name == "gnuplot")
return gnuplot;
if (format_name == "povray")
return povray;
if (format_name == "eps")
return eps;
if (format_name == "gmv")
return gmv;
if (format_name == "tecplot")
return tecplot;
if (format_name == "tecplot_binary")
return tecplot_binary;
if (format_name == "vtk")
return vtk;
if (format_name == "vtu")
return vtu;
if (format_name == "deal.II intermediate")
return deal_II_intermediate;
if (format_name == "hdf5")
return hdf5;
AssertThrow (false,
ExcMessage ("The given file format name is not recognized: <"
+ format_name + ">"));
// return something invalid
return OutputFormat(-1);
}
std::string
get_output_format_names ()
{
return "none|dx|ucd|gnuplot|povray|eps|gmv|tecplot|tecplot_binary|vtk|vtu|hdf5|svg|deal.II intermediate";
}
std::string
default_suffix (const OutputFormat output_format)
{
switch (output_format)
{
case none:
return "";
case dx:
return ".dx";
case ucd:
return ".inp";
case gnuplot:
return ".gnuplot";
case povray:
return ".pov";
case eps:
return ".eps";
case gmv:
return ".gmv";
case tecplot:
return ".dat";
case tecplot_binary:
return ".plt";
case vtk:
return ".vtk";
case vtu:
return ".vtu";
case deal_II_intermediate:
return ".d2";
case hdf5:
return ".h5";
case svg:
return ".svg";
default:
Assert (false, ExcNotImplemented());
return "";
}
}
//----------------------------------------------------------------------//
template <int dim, int spacedim, typename STREAM>
void
write_nodes (const std::vector<Patch<dim,spacedim> > &patches,
STREAM &out)
{
Assert (dim<=3, ExcNotImplemented());
unsigned int count = 0;
// We only need this point below,
// but it does not harm to declare
// it here.
Point<spacedim> node;
for (typename std::vector<Patch<dim,spacedim> >::const_iterator
patch=patches.begin();
patch!=patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
// Length of loops in all
// dimensions. If a dimension
// is not used, a loop of
// length one will do the job.
const unsigned int n1 = (dim>0) ? n : 1;
const unsigned int n2 = (dim>1) ? n : 1;
const unsigned int n3 = (dim>2) ? n : 1;
for (unsigned int i3=0; i3<n3; ++i3)
for (unsigned int i2=0; i2<n2; ++i2)
for (unsigned int i1=0; i1<n1; ++i1)
{
compute_node(node, &*patch,
i1,
i2,
i3,
n_subdivisions);
out.write_point(count++, node);
}
}
out.flush_points ();
}
template <int dim, int spacedim, typename STREAM>
void
write_cells (const std::vector<Patch<dim,spacedim> > &patches,
STREAM &out)
{
Assert (dim<=3, ExcNotImplemented());
unsigned int count = 0;
unsigned int first_vertex_of_patch = 0;
// Array to hold all the node
// numbers of a cell. 8 is
// sufficient for 3D
for (typename std::vector<Patch<dim,spacedim> >::const_iterator
patch=patches.begin();
patch!=patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
// Length of loops in all dimensons
const unsigned int n1 = (dim>0) ? n_subdivisions : 1;
const unsigned int n2 = (dim>1) ? n_subdivisions : 1;
const unsigned int n3 = (dim>2) ? n_subdivisions : 1;
// Offsets of outer loops
unsigned int d1 = 1;
unsigned int d2 = n;
unsigned int d3 = n*n;
for (unsigned int i3=0; i3<n3; ++i3)
for (unsigned int i2=0; i2<n2; ++i2)
for (unsigned int i1=0; i1<n1; ++i1)
{
const unsigned int offset = first_vertex_of_patch+i3*d3+i2*d2+i1*d1;
// First write line in x direction
out.template write_cell<dim>(count++, offset, d1, d2, d3);
}
// finally update the number
// of the first vertex of this patch
first_vertex_of_patch += Utilities::fixed_power<dim>(n_subdivisions+1);
}
out.flush_cells ();
}
template <int dim, int spacedim, class STREAM>
void
write_data (
const std::vector<Patch<dim,spacedim> > &patches,
unsigned int n_data_sets,
const bool double_precision,
STREAM &out)
{
Assert (dim<=3, ExcNotImplemented());
unsigned int count = 0;
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch
= patches.begin();
patch != patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
// Length of loops in all dimensions
Assert ((patch->data.n_rows() == n_data_sets && !patch->points_are_available) ||
(patch->data.n_rows() == n_data_sets+spacedim && patch->points_are_available),
ExcDimensionMismatch (patch->points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patch->data.n_rows()));
Assert (patch->data.n_cols() == Utilities::fixed_power<dim>(n),
ExcInvalidDatasetSize (patch->data.n_cols(), n));
std::vector<float> floats(n_data_sets);
std::vector<double> doubles(n_data_sets);
// Data is already in
// lexicographic ordering
for (unsigned int i=0; i<Utilities::fixed_power<dim>(n); ++i, ++count)
if (double_precision)
{
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
doubles[data_set] = patch->data(data_set, i);
out.write_dataset(count, doubles);
}
else
{
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
floats[data_set] = patch->data(data_set, i);
out.write_dataset(count, floats);
}
}
}
namespace
{
/**
* This function projects a three-dimensional point (Point<3> point)
* onto a two-dimensional image plane, specified by the position of
* the camera viewing system (Point<3> camera_position), camera
* direction (Point<3> camera_position), camera horizontal (Point<3>
* camera_horizontal, necessary for the correct alignment of the
* later images), and the focus of the camera (float camera_focus).
*/
Point<2> svg_project_point(Point<3> point, Point<3> camera_position, Point<3> camera_direction, Point<3> camera_horizontal, float camera_focus)
{
Point<3> camera_vertical;
camera_vertical[0] = camera_horizontal[1] * camera_direction[2] - camera_horizontal[2] * camera_direction[1];
camera_vertical[1] = camera_horizontal[2] * camera_direction[0] - camera_horizontal[0] * camera_direction[2];
camera_vertical[2] = camera_horizontal[0] * camera_direction[1] - camera_horizontal[1] * camera_direction[0];
float phi;
phi = camera_focus;
phi /= (point[0] - camera_position[0]) * camera_direction[0] + (point[1] - camera_position[1]) * camera_direction[1] + (point[2] - camera_position[2]) * camera_direction[2];
Point<3> projection;
projection[0] = camera_position[0] + phi * (point[0] - camera_position[0]);
projection[1] = camera_position[1] + phi * (point[1] - camera_position[1]);
projection[2] = camera_position[2] + phi * (point[2] - camera_position[2]);
Point<2> projection_decomposition;
projection_decomposition[0] = (projection[0] - camera_position[0] - camera_focus * camera_direction[0]) * camera_horizontal[0];
projection_decomposition[0] += (projection[1] - camera_position[1] - camera_focus * camera_direction[1]) * camera_horizontal[1];
projection_decomposition[0] += (projection[2] - camera_position[2] - camera_focus * camera_direction[2]) * camera_horizontal[2];
projection_decomposition[1] = (projection[0] - camera_position[0] - camera_focus * camera_direction[0]) * camera_vertical[0];
projection_decomposition[1] += (projection[1] - camera_position[1] - camera_focus * camera_direction[1]) * camera_vertical[1];
projection_decomposition[1] += (projection[2] - camera_position[2] - camera_focus * camera_direction[2]) * camera_vertical[2];
return projection_decomposition;
}
/**
* Function to compute the gradient parameters for a triangle with
* given values for the vertices.
*/
Point<6> svg_get_gradient_parameters(Point<3> points[])
{
Point<3> v_min, v_max, v_inter;
// Use the Bubblesort algorithm to sort the points with respect to the third coordinate
for (int i = 0; i < 2; ++i)
{
for (int j = 0; j < 2-i; ++j)
{
if (points[j][2] > points[j + 1][2])
{
Point<3> temp = points[j];
points[j] = points[j+1];
points[j+1] = temp;
}
}
}
// save the related three-dimensional vectors v_min, v_inter, and v_max
v_min = points[0];
v_inter = points[1];
v_max = points[2];
Point<2> A[2];
Point<2> b, gradient;
// determine the plane offset c
A[0][0] = v_max[0] - v_min[0];
A[0][1] = v_inter[0] - v_min[0];
A[1][0] = v_max[1] - v_min[1];
A[1][1] = v_inter[1] - v_min[1];
b[0] = - v_min[0];
b[1] = - v_min[1];
double x, sum;
bool col_change = false;
if (A[0][0] == 0)
{
col_change = true;
A[0][0] = A[0][1];
A[0][1] = 0;
double temp = A[1][0];
A[1][0] = A[1][1];
A[1][1] = temp;
}
for (unsigned int k = 0; k < 1; k++)
{
for (unsigned int i = k+1; i < 2; i++)
{
x = A[i][k] / A[k][k];
for (unsigned int j = k+1; j < 2; j++) A[i][j] = A[i][j] - A[k][j] * x;
b[i] = b[i] - b[k]*x;
}
}
b[1] = b[1] / A[1][1];
for (int i = 0; i >= 0; i--)
{
sum = b[i];
for (unsigned int j = i+1; j < 2; j++) sum = sum - A[i][j] * b[j];
b[i] = sum / A[i][i];
}
if (col_change)
{
double temp = b[0];
b[0] = b[1];
b[1] = temp;
}
double c = b[0] * (v_max[2] - v_min[2]) + b[1] * (v_inter[2] - v_min[2]) + v_min[2];
// Determine the first entry of the gradient (phi, cf. documentation)
A[0][0] = v_max[0] - v_min[0];
A[0][1] = v_inter[0] - v_min[0];
A[1][0] = v_max[1] - v_min[1];
A[1][1] = v_inter[1] - v_min[1];
b[0] = 1.0 - v_min[0];
b[1] = - v_min[1];
col_change = false;
if (A[0][0] == 0)
{
col_change = true;
A[0][0] = A[0][1];
A[0][1] = 0;
double temp = A[1][0];
A[1][0] = A[1][1];
A[1][1] = temp;
}
for (unsigned int k = 0; k < 1; k++)
{
for (unsigned int i = k+1; i < 2; i++)
{
x = A[i][k] / A[k][k];
for (unsigned int j = k+1; j < 2; j++) A[i][j] = A[i][j] - A[k][j] * x;
b[i] = b[i] - b[k] * x;
}
}
b[1]=b[1] / A[1][1];
for (int i = 0; i >= 0; i--)
{
sum = b[i];
for (unsigned int j = i+1; j < 2; j++) sum = sum - A[i][j]*b[j];
b[i] = sum / A[i][i];
}
if (col_change)
{
double temp = b[0];
b[0] = b[1];
b[1] = temp;
}
gradient[0] = b[0] * (v_max[2] - v_min[2]) + b[1] * (v_inter[2] - v_min[2]) - c + v_min[2];
// determine the second entry of the gradient
A[0][0] = v_max[0] - v_min[0];
A[0][1] = v_inter[0] - v_min[0];
A[1][0] = v_max[1] - v_min[1];
A[1][1] = v_inter[1] - v_min[1];
b[0] = - v_min[0];
b[1] = 1.0 - v_min[1];
col_change = false;
if (A[0][0] == 0)
{
col_change = true;
A[0][0] = A[0][1];
A[0][1] = 0;
double temp = A[1][0];
A[1][0] = A[1][1];
A[1][1] = temp;
}
for (unsigned int k = 0; k < 1; k++)
{
for (unsigned int i = k+1; i < 2; i++)
{
x = A[i][k] / A[k][k];
for (unsigned int j = k+1; j < 2; j++) A[i][j] = A[i][j] - A[k][j] * x;
b[i] = b[i] - b[k] * x;
}
}
b[1] = b[1] / A[1][1];
for (int i = 0; i >= 0; i--)
{
sum = b[i];
for (unsigned int j = i+1; j < 2; j++) sum = sum - A[i][j] * b[j];
b[i] = sum / A[i][i];
}
if (col_change)
{
double temp = b[0];
b[0] = b[1];
b[1] = temp;
}
gradient[1] = b[0] * (v_max[2] - v_min[2]) + b[1] * (v_inter[2] - v_min[2]) - c + v_min[2];
// normalize the gradient
double gradient_norm = sqrt(pow(gradient[0], 2.0) + pow(gradient[1], 2.0));
gradient[0] /= gradient_norm;
gradient[1] /= gradient_norm;
double lambda = - gradient[0] * (v_min[0] - v_max[0]) - gradient[1] * (v_min[1] - v_max[1]);
Point<6> gradient_parameters(true);
gradient_parameters[0] = v_min[0];
gradient_parameters[1] = v_min[1];
gradient_parameters[2] = v_min[0] + lambda * gradient[0];
gradient_parameters[3] = v_min[1] + lambda * gradient[1];
gradient_parameters[4] = v_min[2];
gradient_parameters[5] = v_max[2];
return gradient_parameters;
}
}
template <int dim, int spacedim>
void write_ucd (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const UcdFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
const unsigned int n_data_sets = data_names.size();
UcdStream ucd_out(out, flags);
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim> (patches, n_nodes, n_cells);
///////////////////////
// preamble
if (flags.write_preamble)
{
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "# This file was generated by the deal.II library." << '\n'
<< "# Date = "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << '\n'
<< "# Time = "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec << '\n'
<< "#" << '\n'
<< "# For a description of the UCD format see the AVS Developer's guide."
<< '\n'
<< "#" << '\n';
}
// start with ucd data
out << n_nodes << ' '
<< n_cells << ' '
<< n_data_sets << ' '
<< 0 << ' ' // no cell data at present
<< 0 // no model data
<< '\n';
write_nodes(patches, ucd_out);
out << '\n';
write_cells(patches, ucd_out);
out << '\n';
/////////////////////////////
// now write data
if (n_data_sets != 0)
{
out << n_data_sets << " "; // number of vectors
for (unsigned int i=0; i<n_data_sets; ++i)
out << 1 << ' '; // number of components;
// only 1 supported presently
out << '\n';
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << data_names[data_set]
<< ",dimensionless" // no units supported at present
<< '\n';
write_data(patches, n_data_sets, true, ucd_out);
}
// make sure everything now gets to
// disk
out.flush ();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_dx (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const DXFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
// Stream with special features for dx output
DXStream dx_out(out, flags);
// Variable counting the offset of
// binary data.
unsigned int offset = 0;
const unsigned int n_data_sets = data_names.size();
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim>(patches, n_nodes, n_cells);
// start with vertices order is
// lexicographical, x varying
// fastest
out << "object \"vertices\" class array type float rank 1 shape " << spacedim
<< " items " << n_nodes;
if (flags.coordinates_binary)
{
out << " lsb ieee data 0" << '\n';
offset += n_nodes * spacedim * sizeof(float);
}
else
{
out << " data follows" << '\n';
write_nodes(patches, dx_out);
}
///////////////////////////////
// first write the coordinates of all vertices
/////////////////////////////////////////
// write cells
out << "object \"cells\" class array type int rank 1 shape "
<< GeometryInfo<dim>::vertices_per_cell
<< " items " << n_cells;
if (flags.int_binary)
{
out << " lsb binary data " << offset << '\n';
offset += n_cells * sizeof (int);
}
else
{
out << " data follows" << '\n';
write_cells(patches, dx_out);
out << '\n';
}
out << "attribute \"element type\" string \"";
if (dim==1) out << "lines";
if (dim==2) out << "quads";
if (dim==3) out << "cubes";
out << "\"" << '\n'
<< "attribute \"ref\" string \"positions\"" << '\n';
//TODO:[GK] Patches must be of same size!
/////////////////////////////
// write neighbor information
if (flags.write_neighbors)
{
out << "object \"neighbors\" class array type int rank 1 shape "
<< GeometryInfo<dim>::faces_per_cell
<< " items " << n_cells
<< " data follows";
for (typename std::vector<Patch<dim,spacedim> >::const_iterator
patch=patches.begin();
patch!=patches.end(); ++patch)
{
const unsigned int n = patch->n_subdivisions;
const unsigned int n1 = (dim>0) ? n : 1;
const unsigned int n2 = (dim>1) ? n : 1;
const unsigned int n3 = (dim>2) ? n : 1;
unsigned int cells_per_patch = Utilities::fixed_power<dim>(n);
unsigned int dx = 1;
unsigned int dy = n;
unsigned int dz = n*n;
const unsigned int patch_start = patch->patch_index * cells_per_patch;
for (unsigned int i3=0; i3<n3; ++i3)
for (unsigned int i2=0; i2<n2; ++i2)
for (unsigned int i1=0; i1<n1; ++i1)
{
const unsigned int nx = i1*dx;
const unsigned int ny = i2*dy;
const unsigned int nz = i3*dz;
out << '\n';
// Direction -x
// Last cell in row
// of other patch
if (i1==0)
{
const unsigned int nn = patch->neighbors[0];
out << '\t';
if (nn != patch->no_neighbor)
out << (nn*cells_per_patch+ny+nz+dx*(n-1));
else
out << "-1";
}
else
{
out << '\t'
<< patch_start+nx-dx+ny+nz;
}
// Direction +x
// First cell in row
// of other patch
if (i1 == n-1)
{
const unsigned int nn = patch->neighbors[1];
out << '\t';
if (nn != patch->no_neighbor)
out << (nn*cells_per_patch+ny+nz);
else
out << "-1";
}
else
{
out << '\t'
<< patch_start+nx+dx+ny+nz;
}
if (dim<2)
continue;
// Direction -y
if (i2==0)
{
const unsigned int nn = patch->neighbors[2];
out << '\t';
if (nn != patch->no_neighbor)
out << (nn*cells_per_patch+nx+nz+dy*(n-1));
else
out << "-1";
}
else
{
out << '\t'
<< patch_start+nx+ny-dy+nz;
}
// Direction +y
if (i2 == n-1)
{
const unsigned int nn = patch->neighbors[3];
out << '\t';
if (nn != patch->no_neighbor)
out << (nn*cells_per_patch+nx+nz);
else
out << "-1";
}
else
{
out << '\t'
<< patch_start+nx+ny+dy+nz;
}
if (dim<3)
continue;
// Direction -z
if (i3==0)
{
const unsigned int nn = patch->neighbors[4];
out << '\t';
if (nn != patch->no_neighbor)
out << (nn*cells_per_patch+nx+ny+dz*(n-1));
else
out << "-1";
}
else
{
out << '\t'
<< patch_start+nx+ny+nz-dz;
}
// Direction +z
if (i3 == n-1)
{
const unsigned int nn = patch->neighbors[5];
out << '\t';
if (nn != patch->no_neighbor)
out << (nn*cells_per_patch+nx+ny);
else
out << "-1";
}
else
{
out << '\t'
<< patch_start+nx+ny+nz+dz;
}
}
out << '\n';
}
}
/////////////////////////////
// now write data
if (n_data_sets != 0)
{
out << "object \"data\" class array type float rank 1 shape "
<< n_data_sets
<< " items " << n_nodes;
if (flags.data_binary)
{
out << " lsb ieee data " << offset << '\n';
offset += n_data_sets * n_nodes * ((flags.data_double)
? sizeof(double)
: sizeof(float));
}
else
{
out << " data follows" << '\n';
write_data(patches, n_data_sets, flags.data_double, dx_out);
}
// loop over all patches
out << "attribute \"dep\" string \"positions\"" << '\n';
}
else
{
out << "object \"data\" class constantarray type float rank 0 items " << n_nodes << " data follows"
<< '\n' << '0' << '\n';
}
// no model data
out << "object \"deal data\" class field" << '\n'
<< "component \"positions\" value \"vertices\"" << '\n'
<< "component \"connections\" value \"cells\"" << '\n'
<< "component \"data\" value \"data\"" << '\n';
if (flags.write_neighbors)
out << "component \"neighbors\" value \"neighbors\"" << '\n';
if (true)
{
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "attribute \"created\" string \""
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday
<< ' '
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec << '"' << '\n';
}
out << "end" << '\n';
// Write all binary data now
if (flags.coordinates_binary)
write_nodes(patches, dx_out);
if (flags.int_binary)
write_cells(patches, dx_out);
if (flags.data_binary)
write_data(patches, n_data_sets, flags.data_double, dx_out);
// make sure everything now gets to
// disk
out.flush ();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_gnuplot (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const GnuplotFlags &/*flags*/,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
const unsigned int n_data_sets = data_names.size();
// write preamble
if (true)
{
// block this to have local
// variables destroyed after
// use
const std::time_t time1= std::time (0);
const std::tm *time = std::localtime(&time1);
out << "# This file was generated by the deal.II library." << '\n'
<< "# Date = "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << '\n'
<< "# Time = "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec << '\n'
<< "#" << '\n'
<< "# For a description of the GNUPLOT format see the GNUPLOT manual."
<< '\n'
<< "#" << '\n'
<< "# ";
switch (spacedim)
{
case 1:
out << "<x> ";
break;
case 2:
out << "<x> <y> ";
break;
case 3:
out << "<x> <y> <z> ";
break;
default:
Assert (false, ExcNotImplemented());
}
for (unsigned int i=0; i<data_names.size(); ++i)
out << '<' << data_names[i] << "> ";
out << '\n';
}
// loop over all patches
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch != patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
// Length of loops in all dimensions
const unsigned int n1 = (dim>0) ? n : 1;
const unsigned int n2 = (dim>1) ? n : 1;
const unsigned int n3 = (dim>2) ? n : 1;
unsigned int d1 = 1;
unsigned int d2 = n;
unsigned int d3 = n*n;
Assert ((patch->data.n_rows() == n_data_sets && !patch->points_are_available) ||
(patch->data.n_rows() == n_data_sets+spacedim && patch->points_are_available),
ExcDimensionMismatch (patch->points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patch->data.n_rows()));
Assert (patch->data.n_cols() == Utilities::fixed_power<dim>(n),
ExcInvalidDatasetSize (patch->data.n_cols(), n_subdivisions+1));
Point<spacedim> this_point;
Point<spacedim> node;
if (dim<3)
{
for (unsigned int i2=0; i2<n2; ++i2)
{
for (unsigned int i1=0; i1<n1; ++i1)
{
// compute coordinates for
// this patch point
compute_node(node, &*patch, i1, i2, 0, n_subdivisions);
out << node << ' ';
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << patch->data(data_set,i1*d1+i2*d2) << ' ';
out << '\n';
}
// end of row in patch
if (dim>1)
out << '\n';
}
// end of patch
if (dim==1)
out << '\n';
out << '\n';
}
else if (dim==3)
{
// for all grid points: draw
// lines into all positive
// coordinate directions if
// there is another grid point
// there
for (unsigned int i3=0; i3<n3; ++i3)
for (unsigned int i2=0; i2<n2; ++i2)
for (unsigned int i1=0; i1<n1; ++i1)
{
// compute coordinates for
// this patch point
compute_node(this_point, &*patch, i1, i2, i3, n_subdivisions);
// line into positive x-direction
// if possible
if (i1 < n_subdivisions)
{
// write point here
// and its data
out << this_point;
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ' '
<< patch->data(data_set,i1*d1+i2*d2+i3*d3);
out << '\n';
// write point there
// and its data
compute_node(node, &*patch, i1+1, i2, i3, n_subdivisions);
out << node;
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ' '
<< patch->data(data_set,(i1+1)*d1+i2*d2+i3*d3);
out << '\n';
// end of line
out << '\n'
<< '\n';
}
// line into positive y-direction
// if possible
if (i2 < n_subdivisions)
{
// write point here
// and its data
out << this_point;
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ' '
<< patch->data(data_set, i1*d1+i2*d2+i3*d3);
out << '\n';
// write point there
// and its data
compute_node(node, &*patch, i1, i2+1, i3, n_subdivisions);
out << node;
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ' '
<< patch->data(data_set,i1*d1+(i2+1)*d2+i3*d3);
out << '\n';
// end of line
out << '\n'
<< '\n';
}
// line into positive z-direction
// if possible
if (i3 < n_subdivisions)
{
// write point here
// and its data
out << this_point;
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ' '
<< patch->data(data_set,i1*d1+i2*d2+i3*d3);
out << '\n';
// write point there
// and its data
compute_node(node, &*patch, i1, i2, i3+1, n_subdivisions);
out << node;
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ' '
<< patch->data(data_set,i1*d1+i2*d2+(i3+1)*d3);
out << '\n';
// end of line
out << '\n'
<< '\n';
}
}
}
else
Assert (false, ExcNotImplemented());
}
// make sure everything now gets to
// disk
out.flush ();
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_povray (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const PovrayFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
Assert (dim==2, ExcNotImplemented()); // only for 2-D surfaces on a 2-D plane
Assert (spacedim==2, ExcNotImplemented());
const unsigned int n_data_sets = data_names.size();
(void)n_data_sets;
// write preamble
if (true)
{
// block this to have local
// variables destroyed after use
const std::time_t time1= std::time (0);
const std::tm *time = std::localtime(&time1);
out << "/* This file was generated by the deal.II library." << '\n'
<< " Date = "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << '\n'
<< " Time = "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec << '\n'
<< '\n'
<< " For a description of the POVRAY format see the POVRAY manual."
<< '\n'
<< "*/ " << '\n';
// include files
out << "#include \"colors.inc\" " << '\n'
<< "#include \"textures.inc\" " << '\n';
// use external include file for textures,
// camera and light
if (flags.external_data)
out << "#include \"data.inc\" " << '\n';
else // all definitions in data file
{
// camera
out << '\n' << '\n'
<< "camera {" << '\n'
<< " location <1,4,-7>" << '\n'
<< " look_at <0,0,0>" << '\n'
<< " angle 30" << '\n'
<< "}" << '\n';
// light
out << '\n'
<< "light_source {" << '\n'
<< " <1,4,-7>" << '\n'
<< " color Grey" << '\n'
<< "}" << '\n';
out << '\n'
<< "light_source {" << '\n'
<< " <0,20,0>" << '\n'
<< " color White" << '\n'
<< "}" << '\n';
}
}
// max. and min. heigth of solution
Assert(patches.size()>0, ExcInternalError());
double hmin=patches[0].data(0,0);
double hmax=patches[0].data(0,0);
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch != patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
Assert ((patch->data.n_rows() == n_data_sets && !patch->points_are_available) ||
(patch->data.n_rows() == n_data_sets+spacedim && patch->points_are_available),
ExcDimensionMismatch (patch->points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patch->data.n_rows()));
Assert (patch->data.n_cols() == Utilities::fixed_power<dim>(n_subdivisions+1),
ExcInvalidDatasetSize (patch->data.n_cols(), n_subdivisions+1));
for (unsigned int i=0; i<n_subdivisions+1; ++i)
for (unsigned int j=0; j<n_subdivisions+1; ++j)
{
const int dl = i*(n_subdivisions+1)+j;
if (patch->data(0,dl)<hmin)
hmin=patch->data(0,dl);
if (patch->data(0,dl)>hmax)
hmax=patch->data(0,dl);
}
}
out << "#declare HMIN=" << hmin << ";" << '\n'
<< "#declare HMAX=" << hmax << ";" << '\n' << '\n';
if (!flags.external_data)
{
// texture with scaled niveau lines
// 10 lines in the surface
out << "#declare Tex=texture{" << '\n'
<< " pigment {" << '\n'
<< " gradient y" << '\n'
<< " scale y*(HMAX-HMIN)*" << 0.1 << '\n'
<< " color_map {" << '\n'
<< " [0.00 color Light_Purple] " << '\n'
<< " [0.95 color Light_Purple] " << '\n'
<< " [1.00 color White] " << '\n'
<< "} } }" << '\n' << '\n';
}
if (!flags.bicubic_patch)
{
// start of mesh header
out << '\n'
<< "mesh {" << '\n';
}
// loop over all patches
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch != patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
const unsigned int d1=1;
const unsigned int d2=n;
Assert ((patch->data.n_rows() == n_data_sets && !patch->points_are_available) ||
(patch->data.n_rows() == n_data_sets+spacedim && patch->points_are_available),
ExcDimensionMismatch (patch->points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patch->data.n_rows()));
Assert (patch->data.n_cols() == Utilities::fixed_power<dim>(n),
ExcInvalidDatasetSize (patch->data.n_cols(), n_subdivisions+1));
std::vector<Point<spacedim> > ver(n*n);
for (unsigned int i2=0; i2<n; ++i2)
for (unsigned int i1=0; i1<n; ++i1)
{
// compute coordinates for
// this patch point, storing in ver
compute_node(ver[i1*d1+i2*d2], &*patch, i1, i2, 0, n_subdivisions);
}
if (!flags.bicubic_patch)
{
// approximate normal
// vectors in patch
std::vector<Point<3> > nrml;
// only if smooth triangles are used
if (flags.smooth)
{
nrml.resize(n*n);
// These are
// difference
// quotients of
// the surface
// mapping. We
// take them
// symmetric
// inside the
// patch and
// one-sided at
// the edges
Point<3> h1,h2;
// Now compute normals in every point
for (unsigned int i=0; i<n; ++i)
for (unsigned int j=0; j<n; ++j)
{
const unsigned int il = (i==0) ? i : (i-1);
const unsigned int ir = (i==n_subdivisions) ? i : (i+1);
const unsigned int jl = (j==0) ? j : (j-1);
const unsigned int jr = (j==n_subdivisions) ? j : (j+1);
h1(0)=ver[ir*d1+j*d2](0) - ver[il*d1+j*d2](0);
h1(1)=patch->data(0,ir*d1+j*d2)-
patch->data(0,il*d1+j*d2);
h1(2)=ver[ir*d1+j*d2](1) - ver[il*d1+j*d2](1);
h2(0)=ver[i*d1+jr*d2](0) - ver[i*d1+jl*d2](0);
h2(1)=patch->data(0,i*d1+jr*d2)-
patch->data(0,i*d1+jl*d2);
h2(2)=ver[i*d1+jr*d2](1) - ver[i*d1+jl*d2](1);
nrml[i*d1+j*d2](0)=h1(1)*h2(2)-h1(2)*h2(1);
nrml[i*d1+j*d2](1)=h1(2)*h2(0)-h1(0)*h2(2);
nrml[i*d1+j*d2](2)=h1(0)*h2(1)-h1(1)*h2(0);
// normalize Vector
double norm=std::sqrt(
std::pow(nrml[i*d1+j*d2](0),2.)+
std::pow(nrml[i*d1+j*d2](1),2.)+
std::pow(nrml[i*d1+j*d2](2),2.));
if (nrml[i*d1+j*d2](1)<0)
norm*=-1.;
for (unsigned int k=0; k<3; ++k)
nrml[i*d1+j*d2](k)/=norm;
}
}
// setting up triangles
for (unsigned int i=0; i<n_subdivisions; ++i)
for (unsigned int j=0; j<n_subdivisions; ++j)
{
// down/left vertex of triangle
const int dl = i*d1+j*d2;
if (flags.smooth)
{
// writing smooth_triangles
// down/right triangle
out << "smooth_triangle {" << '\n' << "\t<"
<< ver[dl](0) << ","
<< patch->data(0,dl) << ","
<< ver[dl](1) << ">, <"
<< nrml[dl](0) << ", "
<< nrml[dl](1) << ", "
<< nrml[dl](2)
<< ">," << '\n';
out << " \t<"
<< ver[dl+d1](0) << ","
<< patch->data(0,dl+d1) << ","
<< ver[dl+d1](1) << ">, <"
<< nrml[dl+d1](0) << ", "
<< nrml[dl+d1](1) << ", "
<< nrml[dl+d1](2)
<< ">," << '\n';
out << "\t<"
<< ver[dl+d1+d2](0) << ","
<< patch->data(0,dl+d1+d2) << ","
<< ver[dl+d1+d2](1) << ">, <"
<< nrml[dl+d1+d2](0) << ", "
<< nrml[dl+d1+d2](1) << ", "
<< nrml[dl+d1+d2](2)
<< ">}" << '\n';
// upper/left triangle
out << "smooth_triangle {" << '\n' << "\t<"
<< ver[dl](0) << ","
<< patch->data(0,dl) << ","
<< ver[dl](1) << ">, <"
<< nrml[dl](0) << ", "
<< nrml[dl](1) << ", "
<< nrml[dl](2)
<< ">," << '\n';
out << "\t<"
<< ver[dl+d1+d2](0) << ","
<< patch->data(0,dl+d1+d2) << ","
<< ver[dl+d1+d2](1) << ">, <"
<< nrml[dl+d1+d2](0) << ", "
<< nrml[dl+d1+d2](1) << ", "
<< nrml[dl+d1+d2](2)
<< ">," << '\n';
out << "\t<"
<< ver[dl+d2](0) << ","
<< patch->data(0,dl+d2) << ","
<< ver[dl+d2](1) << ">, <"
<< nrml[dl+d2](0) << ", "
<< nrml[dl+d2](1) << ", "
<< nrml[dl+d2](2)
<< ">}" << '\n';
}
else
{
// writing standard triangles
// down/right triangle
out << "triangle {" << '\n' << "\t<"
<< ver[dl](0) << ","
<< patch->data(0,dl) << ","
<< ver[dl](1) << ">," << '\n';
out << "\t<"
<< ver[dl+d1](0) << ","
<< patch->data(0,dl+d1) << ","
<< ver[dl+d1](1) << ">," << '\n';
out << "\t<"
<< ver[dl+d1+d2](0) << ","
<< patch->data(0,dl+d1+d2) << ","
<< ver[dl+d1+d2](1) << ">}" << '\n';
// upper/left triangle
out << "triangle {" << '\n' << "\t<"
<< ver[dl](0) << ","
<< patch->data(0,dl) << ","
<< ver[dl](1) << ">," << '\n';
out << "\t<"
<< ver[dl+d1+d2](0) << ","
<< patch->data(0,dl+d1+d2) << ","
<< ver[dl+d1+d2](1) << ">," << '\n';
out << "\t<"
<< ver[dl+d2](0) << ","
<< patch->data(0,dl+d2) << ","
<< ver[dl+d2](1) << ">}" << '\n';
}
}
}
else
{
// writing bicubic_patch
Assert (n_subdivisions==3, ExcDimensionMismatch(n_subdivisions,3));
out << '\n'
<< "bicubic_patch {" << '\n'
<< " type 0" << '\n'
<< " flatness 0" << '\n'
<< " u_steps 0" << '\n'
<< " v_steps 0" << '\n';
for (int i=0; i<16; ++i)
{
out << "\t<" << ver[i](0) << "," << patch->data(0,i) << "," << ver[i](1) << ">";
if (i!=15) out << ",";
out << '\n';
}
out << " texture {Tex}" << '\n'
<< "}" << '\n';
}
}
if (!flags.bicubic_patch)
{
// the end of the mesh
out << " texture {Tex}" << '\n'
<< "}" << '\n'
<< '\n';
}
// make sure everything now gets to
// disk
out.flush ();
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_eps (const std::vector<Patch<dim,spacedim> > &/*patches*/,
const std::vector<std::string> &/*data_names*/,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const EpsFlags &/*flags*/,
std::ostream &/*out*/)
{
// not implemented, see the documentation of the function
AssertThrow (dim==2, ExcNotImplemented());
}
template <int spacedim>
void write_eps (const std::vector<Patch<2,spacedim> > &patches,
const std::vector<std::string> &/*data_names*/,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const EpsFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
const unsigned int old_precision = out.precision();
// set up an array of cells to be
// written later. this array holds the
// cells of all the patches as
// projected to the plane perpendicular
// to the line of sight.
//
// note that they are kept sorted by
// the set, where we chose the value
// of the center point of the cell
// along the line of sight as value
// for sorting
std::multiset<EpsCell2d> cells;
// two variables in which we
// will store the minimum and
// maximum values of the field
// to be used for colorization
//
// preset them by 0 to calm down the
// compiler; they are initialized later
double min_color_value=0, max_color_value=0;
// Array for z-coordinates of points.
// The elevation determined by a function if spacedim=2
// or the z-cooridate of the grid point if spacedim=3
double heights[4] = { 0, 0, 0, 0 };
// compute the cells for output and
// enter them into the set above
// note that since dim==2, we
// have exactly four vertices per
// patch and per cell
for (typename std::vector<Patch<2,spacedim> >::const_iterator patch=patches.begin();
patch!=patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
const unsigned int d1 = 1;
const unsigned int d2 = n;
for (unsigned int i2=0; i2<n_subdivisions; ++i2)
for (unsigned int i1=0; i1<n_subdivisions; ++i1)
{
Point<spacedim> points[4];
compute_node(points[0], &*patch, i1, i2, 0, n_subdivisions);
compute_node(points[1], &*patch, i1+1, i2, 0, n_subdivisions);
compute_node(points[2], &*patch, i1, i2+1, 0, n_subdivisions);
compute_node(points[3], &*patch, i1+1, i2+1, 0, n_subdivisions);
switch (spacedim)
{
case 2:
Assert ((flags.height_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.height_vector, 0,
patch->data.n_rows()));
heights[0] = patch->data.n_rows() != 0 ?
patch->data(flags.height_vector,i1*d1 + i2*d2) * flags.z_scaling
: 0;
heights[1] = patch->data.n_rows() != 0 ?
patch->data(flags.height_vector,(i1+1)*d1 + i2*d2) * flags.z_scaling
: 0;
heights[2] = patch->data.n_rows() != 0 ?
patch->data(flags.height_vector,i1*d1 + (i2+1)*d2) * flags.z_scaling
: 0;
heights[3] = patch->data.n_rows() != 0 ?
patch->data(flags.height_vector,(i1+1)*d1 + (i2+1)*d2) * flags.z_scaling
: 0;
break;
case 3:
// Copy z-coordinates into the height vector
for (unsigned int i=0; i<4; ++i)
heights[i] = points[i](2);
break;
default:
Assert(false, ExcNotImplemented());
}
// now compute the projection of
// the bilinear cell given by the
// four vertices and their heights
// and write them to a proper
// cell object. note that we only
// need the first two components
// of the projected position for
// output, but we need the value
// along the line of sight for
// sorting the cells for back-to-
// front-output
//
// this computation was first written
// by Stefan Nauber. please no-one
// ask me why it works that way (or
// may be not), especially not about
// the angles and the sign of
// the height field, I don't know
// it.
EpsCell2d eps_cell;
const double pi = numbers::PI;
const double cx = -std::cos(pi-flags.azimut_angle * 2*pi / 360.),
cz = -std::cos(flags.turn_angle * 2*pi / 360.),
sx = std::sin(pi-flags.azimut_angle * 2*pi / 360.),
sz = std::sin(flags.turn_angle * 2*pi / 360.);
for (unsigned int vertex=0; vertex<4; ++vertex)
{
const double x = points[vertex](0),
y = points[vertex](1),
z = -heights[vertex];
eps_cell.vertices[vertex](0) = - cz*x+ sz*y;
eps_cell.vertices[vertex](1) = -cx*sz*x-cx*cz*y-sx*z;
// ( 1 0 0 )
// D1 = ( 0 cx -sx )
// ( 0 sx cx )
// ( cy 0 sy )
// Dy = ( 0 1 0 )
// (-sy 0 cy )
// ( cz -sz 0 )
// Dz = ( sz cz 0 )
// ( 0 0 1 )
// ( cz -sz 0 )( 1 0 0 )(x) ( cz*x-sz*(cx*y-sx*z)+0*(sx*y+cx*z) )
// Dxz = ( sz cz 0 )( 0 cx -sx )(y) = ( sz*x+cz*(cx*y-sx*z)+0*(sx*y+cx*z) )
// ( 0 0 1 )( 0 sx cx )(z) ( 0*x+ *(cx*y-sx*z)+1*(sx*y+cx*z) )
}
// compute coordinates of
// center of cell
const Point<spacedim> center_point
= (points[0] + points[1] + points[2] + points[3]) / 4;
const double center_height
= -(heights[0] + heights[1] + heights[2] + heights[3]) / 4;
// compute the depth into
// the picture
eps_cell.depth = -sx*sz*center_point(0)
-sx*cz*center_point(1)
+cx*center_height;
if (flags.draw_cells && flags.shade_cells)
{
Assert ((flags.color_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.color_vector, 0,
patch->data.n_rows()));
const double color_values[4]
= { patch->data.n_rows() != 0 ?
patch->data(flags.color_vector,i1 *d1 + i2 *d2) : 1,
patch->data.n_rows() != 0 ?
patch->data(flags.color_vector,(i1+1)*d1 + i2 *d2) : 1,
patch->data.n_rows() != 0 ?
patch->data(flags.color_vector,i1 *d1 + (i2+1)*d2) : 1,
patch->data.n_rows() != 0 ?
patch->data(flags.color_vector,(i1+1)*d1 + (i2+1)*d2) : 1
};
// set color value to average of the value
// at the vertices
eps_cell.color_value = (color_values[0] +
color_values[1] +
color_values[3] +
color_values[2]) / 4;
// update bounds of color
// field
if (patch == patches.begin())
min_color_value = max_color_value = eps_cell.color_value;
else
{
min_color_value = (min_color_value < eps_cell.color_value ?
min_color_value : eps_cell.color_value);
max_color_value = (max_color_value > eps_cell.color_value ?
max_color_value : eps_cell.color_value);
}
}
// finally add this cell
cells.insert (eps_cell);
}
}
// find out minimum and maximum x and
// y coordinates to compute offsets
// and scaling factors
double x_min = cells.begin()->vertices[0](0);
double x_max = x_min;
double y_min = cells.begin()->vertices[0](1);
double y_max = y_min;
for (typename std::multiset<EpsCell2d>::const_iterator
cell=cells.begin();
cell!=cells.end(); ++cell)
for (unsigned int vertex=0; vertex<4; ++vertex)
{
x_min = std::min (x_min, cell->vertices[vertex](0));
x_max = std::max (x_max, cell->vertices[vertex](0));
y_min = std::min (y_min, cell->vertices[vertex](1));
y_max = std::max (y_max, cell->vertices[vertex](1));
}
// scale in x-direction such that
// in the output 0 <= x <= 300.
// don't scale in y-direction to
// preserve the shape of the
// triangulation
const double scale = (flags.size /
(flags.size_type==EpsFlags::width ?
x_max - x_min :
y_min - y_max));
const Point<2> offset(x_min, y_min);
// now write preamble
if (true)
{
// block this to have local
// variables destroyed after
// use
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "%!PS-Adobe-2.0 EPSF-1.2" << '\n'
<< "%%Title: deal.II Output" << '\n'
<< "%%Creator: the deal.II library" << '\n'
<< "%%Creation Date: "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << " - "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec << '\n'
<< "%%BoundingBox: "
// lower left corner
<< "0 0 "
// upper right corner
<< static_cast<unsigned int>( (x_max-x_min) * scale + 0.5)
<< ' '
<< static_cast<unsigned int>( (y_max-y_min) * scale + 0.5)
<< '\n';
// define some abbreviations to keep
// the output small:
// m=move turtle to
// l=define a line
// s=set rgb color
// sg=set gray value
// lx=close the line and plot the line
// lf=close the line and fill the interior
out << "/m {moveto} bind def" << '\n'
<< "/l {lineto} bind def" << '\n'
<< "/s {setrgbcolor} bind def" << '\n'
<< "/sg {setgray} bind def" << '\n'
<< "/lx {lineto closepath stroke} bind def" << '\n'
<< "/lf {lineto closepath fill} bind def" << '\n';
out << "%%EndProlog" << '\n'
<< '\n';
// set fine lines
out << flags.line_width << " setlinewidth" << '\n';
// allow only five digits
// for output (instead of the
// default six); this should suffice
// even for fine grids, but reduces
// the file size significantly
out << std::setprecision (5);
}
// check if min and max
// values for the color are
// actually different. If
// that is not the case (such
// things happen, for
// example, in the very first
// time step of a time
// dependent problem, if the
// initial values are zero),
// all values are equal, and
// then we can draw
// everything in an arbitrary
// color. Thus, change one of
// the two values arbitrarily
if (max_color_value == min_color_value)
max_color_value = min_color_value+1;
// now we've got all the information
// we need. write the cells.
// note: due to the ordering, we
// traverse the list of cells
// back-to-front
for (typename std::multiset<EpsCell2d>::const_iterator
cell=cells.begin();
cell!=cells.end(); ++cell)
{
if (flags.draw_cells)
{
if (flags.shade_cells)
{
const EpsFlags::RgbValues rgb_values
= (*flags.color_function) (cell->color_value,
min_color_value,
max_color_value);
// write out color
if (rgb_values.is_grey())
out << rgb_values.red << " sg ";
else
out << rgb_values.red << ' '
<< rgb_values.green << ' '
<< rgb_values.blue << " s ";
}
else
out << "1 sg ";
out << (cell->vertices[0]-offset) * scale << " m "
<< (cell->vertices[1]-offset) * scale << " l "
<< (cell->vertices[3]-offset) * scale << " l "
<< (cell->vertices[2]-offset) * scale << " lf"
<< '\n';
}
if (flags.draw_mesh)
out << "0 sg " // draw lines in black
<< (cell->vertices[0]-offset) * scale << " m "
<< (cell->vertices[1]-offset) * scale << " l "
<< (cell->vertices[3]-offset) * scale << " l "
<< (cell->vertices[2]-offset) * scale << " lx"
<< '\n';
}
out << "showpage" << '\n';
// make sure everything now gets to
// disk
out << std::setprecision(old_precision);
out.flush ();
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_gmv (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const GmvFlags &flags,
std::ostream &out)
{
Assert(dim<=3, ExcNotImplemented());
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
GmvStream gmv_out(out, flags);
const unsigned int n_data_sets = data_names.size();
// check against # of data sets in
// first patch. checks against all
// other patches are made in
// write_gmv_reorder_data_vectors
Assert ((patches[0].data.n_rows() == n_data_sets && !patches[0].points_are_available) ||
(patches[0].data.n_rows() == n_data_sets+spacedim && patches[0].points_are_available),
ExcDimensionMismatch (patches[0].points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patches[0].data.n_rows()));
///////////////////////
// preamble
out << "gmvinput ascii"
<< '\n'
<< '\n';
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim>(patches, n_nodes, n_cells);
// in gmv format the vertex
// coordinates and the data have an
// order that is a bit unpleasant
// (first all x coordinates, then
// all y coordinate, ...; first all
// data of variable 1, then
// variable 2, etc), so we have to
// copy the data vectors a bit around
//
// note that we copy vectors when
// looping over the patches since we
// have to write them one variable
// at a time and don't want to use
// more than one loop
//
// this copying of data vectors can
// be done while we already output
// the vertices, so do this on a
// separate task and when wanting
// to write out the data, we wait
// for that task to finish
Table<2,double> data_vectors (n_data_sets, n_nodes);
void (*fun_ptr) (const std::vector<Patch<dim,spacedim> > &,
Table<2,double> &)
= &write_gmv_reorder_data_vectors<dim,spacedim>;
Threads::Task<> reorder_task = Threads::new_task (fun_ptr, patches, data_vectors);
///////////////////////////////
// first make up a list of used
// vertices along with their
// coordinates
//
// note that we have to print
// 3 dimensions
out << "nodes " << n_nodes << '\n';
for (unsigned int d=0; d<spacedim; ++d)
{
gmv_out.selected_component = d;
write_nodes(patches, gmv_out);
out << '\n';
}
gmv_out.selected_component = numbers::invalid_unsigned_int;
for (unsigned int d=spacedim; d<3; ++d)
{
for (unsigned int i=0; i<n_nodes; ++i)
out << "0 ";
out << '\n';
}
/////////////////////////////////
// now for the cells. note that
// vertices are counted from 1 onwards
out << "cells " << n_cells << '\n';
write_cells(patches, gmv_out);
///////////////////////////////////////
// data output.
out << "variable" << '\n';
// now write the data vectors to
// @p{out} first make sure that all
// data is in place
reorder_task.join ();
// then write data.
// the '1' means: node data (as opposed
// to cell data, which we do not
// support explicitly here)
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
{
out << data_names[data_set] << " 1" << '\n';
std::copy (data_vectors[data_set].begin(),
data_vectors[data_set].end(),
std::ostream_iterator<double>(out, " "));
out << '\n'
<< '\n';
}
// end of variable section
out << "endvars" << '\n';
// end of output
out << "endgmv"
<< '\n';
// make sure everything now gets to
// disk
out.flush ();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_tecplot (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const TecplotFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
TecplotStream tecplot_out(out, flags);
const unsigned int n_data_sets = data_names.size();
// check against # of data sets in
// first patch. checks against all
// other patches are made in
// write_gmv_reorder_data_vectors
Assert ((patches[0].data.n_rows() == n_data_sets && !patches[0].points_are_available) ||
(patches[0].data.n_rows() == n_data_sets+spacedim && patches[0].points_are_available),
ExcDimensionMismatch (patches[0].points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patches[0].data.n_rows()));
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim>(patches, n_nodes, n_cells);
///////////
// preamble
{
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "# This file was generated by the deal.II library." << '\n'
<< "# Date = "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << '\n'
<< "# Time = "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec << '\n'
<< "#" << '\n'
<< "# For a description of the Tecplot format see the Tecplot documentation."
<< '\n'
<< "#" << '\n';
out << "Variables=";
switch (spacedim)
{
case 1:
out << "\"x\"";
break;
case 2:
out << "\"x\", \"y\"";
break;
case 3:
out << "\"x\", \"y\", \"z\"";
break;
default:
Assert (false, ExcNotImplemented());
}
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
out << ", \"" << data_names[data_set] << "\"";
out << '\n';
out << "zone ";
if (flags.zone_name)
out << "t=\"" << flags.zone_name << "\" ";
out << "f=feblock, n=" << n_nodes << ", e=" << n_cells
<< ", et=" << tecplot_cell_type[dim] << '\n';
}
// in Tecplot FEBLOCK format the vertex
// coordinates and the data have an
// order that is a bit unpleasant
// (first all x coordinates, then
// all y coordinate, ...; first all
// data of variable 1, then
// variable 2, etc), so we have to
// copy the data vectors a bit around
//
// note that we copy vectors when
// looping over the patches since we
// have to write them one variable
// at a time and don't want to use
// more than one loop
//
// this copying of data vectors can
// be done while we already output
// the vertices, so do this on a
// separate task and when wanting
// to write out the data, we wait
// for that task to finish
Table<2,double> data_vectors (n_data_sets, n_nodes);
void (*fun_ptr) (const std::vector<Patch<dim,spacedim> > &,
Table<2,double> &)
= &write_gmv_reorder_data_vectors<dim,spacedim>;
Threads::Task<> reorder_task = Threads::new_task (fun_ptr, patches, data_vectors);
///////////////////////////////
// first make up a list of used
// vertices along with their
// coordinates
for (unsigned int d=0; d<spacedim; ++d)
{
tecplot_out.selected_component = d;
write_nodes(patches, tecplot_out);
out << '\n';
}
///////////////////////////////////////
// data output.
//
// now write the data vectors to
// @p{out} first make sure that all
// data is in place
reorder_task.join ();
// then write data.
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
{
std::copy (data_vectors[data_set].begin(),
data_vectors[data_set].end(),
std::ostream_iterator<double>(out, "\n"));
out << '\n';
}
write_cells(patches, tecplot_out);
// make sure everything now gets to
// disk
out.flush ();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
//---------------------------------------------------------------------------
// Macros for handling Tecplot API data
#ifdef DEAL_II_HAVE_TECPLOT
namespace
{
class TecplotMacros
{
public:
TecplotMacros(const unsigned int n_nodes = 0,
const unsigned int n_vars = 0,
const unsigned int n_cells = 0,
const unsigned int n_vert = 0);
~TecplotMacros();
float &nd(const unsigned int i, const unsigned int j);
int &cd(const unsigned int i, const unsigned int j);
std::vector<float> nodalData;
std::vector<int> connData;
private:
unsigned int n_nodes;
unsigned int n_vars;
unsigned int n_cells;
unsigned int n_vert;
};
inline
TecplotMacros::TecplotMacros(const unsigned int n_nodes,
const unsigned int n_vars,
const unsigned int n_cells,
const unsigned int n_vert)
:
n_nodes(n_nodes),
n_vars(n_vars),
n_cells(n_cells),
n_vert(n_vert)
{
nodalData.resize(n_nodes*n_vars);
connData.resize(n_cells*n_vert);
}
inline
TecplotMacros::~TecplotMacros()
{}
inline
float &TecplotMacros::nd (const unsigned int i,
const unsigned int j)
{
return nodalData[i*n_nodes+j];
}
inline
int &TecplotMacros::cd (const unsigned int i,
const unsigned int j)
{
return connData[i+j*n_vert];
}
}
#endif
//---------------------------------------------------------------------------
template <int dim, int spacedim>
void write_tecplot_binary (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &vector_data_ranges,
const TecplotFlags &flags,
std::ostream &out)
{
#ifndef DEAL_II_HAVE_TECPLOT
// simply call the ASCII output
// function if the Tecplot API
// isn't present
write_tecplot (patches, data_names, vector_data_ranges, flags, out);
return;
#else
// Tecplot binary output only good
// for 2D & 3D
if (dim == 1)
{
write_tecplot (patches, data_names, vector_data_ranges, flags, out);
return;
}
// if the user hasn't specified a
// file name we should call the
// ASCII function and use the
// ostream @p{out} instead of doing
// something silly later
char *file_name = (char *) flags.tecplot_binary_file_name;
if (file_name == NULL)
{
// At least in debug mode we
// should tell users why they
// don't get tecplot binary
// output
Assert(false, ExcMessage("Specify the name of the tecplot_binary"
" file through the TecplotFlags interface."));
write_tecplot (patches, data_names, vector_data_ranges, flags, out);
return;
}
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
const unsigned int n_data_sets = data_names.size();
// check against # of data sets in
// first patch. checks against all
// other patches are made in
// write_gmv_reorder_data_vectors
Assert ((patches[0].data.n_rows() == n_data_sets && !patches[0].points_are_available) ||
(patches[0].data.n_rows() == n_data_sets+spacedim && patches[0].points_are_available),
ExcDimensionMismatch (patches[0].points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patches[0].data.n_rows()));
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim>(patches, n_nodes, n_cells);
// local variables only needed to write Tecplot
// binary output files
const unsigned int vars_per_node = (spacedim+n_data_sets),
nodes_per_cell = GeometryInfo<dim>::vertices_per_cell;
TecplotMacros tm(n_nodes, vars_per_node, n_cells, nodes_per_cell);
int is_double = 0,
tec_debug = 0,
cell_type = tecplot_binary_cell_type[dim];
std::string tec_var_names;
switch (spacedim)
{
case 2:
tec_var_names = "x y";
break;
case 3:
tec_var_names = "x y z";
break;
default:
Assert(false, ExcNotImplemented());
}
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
{
tec_var_names += " ";
tec_var_names += data_names[data_set];
}
// in Tecplot FEBLOCK format the vertex
// coordinates and the data have an
// order that is a bit unpleasant
// (first all x coordinates, then
// all y coordinate, ...; first all
// data of variable 1, then
// variable 2, etc), so we have to
// copy the data vectors a bit around
//
// note that we copy vectors when
// looping over the patches since we
// have to write them one variable
// at a time and don't want to use
// more than one loop
//
// this copying of data vectors can
// be done while we already output
// the vertices, so do this on a
// separate task and when wanting
// to write out the data, we wait
// for that task to finish
Table<2,double> data_vectors (n_data_sets, n_nodes);
void (*fun_ptr) (const std::vector<Patch<dim,spacedim> > &,
Table<2,double> &)
= &write_gmv_reorder_data_vectors<dim,spacedim>;
Threads::Task<> reorder_task = Threads::new_task (fun_ptr, patches, data_vectors);
///////////////////////////////
// first make up a list of used
// vertices along with their
// coordinates
for (unsigned int d=1; d<=spacedim; ++d)
{
unsigned int entry=0;
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch!=patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
switch (dim)
{
case 2:
{
for (unsigned int j=0; j<n_subdivisions+1; ++j)
for (unsigned int i=0; i<n_subdivisions+1; ++i)
{
const double x_frac = i * 1./n_subdivisions,
y_frac = j * 1./n_subdivisions;
tm.nd((d-1),entry) = static_cast<float>(
(((patch->vertices[1](d-1) * x_frac) +
(patch->vertices[0](d-1) * (1-x_frac))) * (1-y_frac) +
((patch->vertices[3](d-1) * x_frac) +
(patch->vertices[2](d-1) * (1-x_frac))) * y_frac)
);
entry++;
}
break;
}
case 3:
{
for (unsigned int j=0; j<n_subdivisions+1; ++j)
for (unsigned int k=0; k<n_subdivisions+1; ++k)
for (unsigned int i=0; i<n_subdivisions+1; ++i)
{
const double x_frac = i * 1./n_subdivisions,
y_frac = k * 1./n_subdivisions,
z_frac = j * 1./n_subdivisions;
// compute coordinates for
// this patch point
tm.nd((d-1),entry) = static_cast<float>(
((((patch->vertices[1](d-1) * x_frac) +
(patch->vertices[0](d-1) * (1-x_frac))) * (1-y_frac) +
((patch->vertices[3](d-1) * x_frac) +
(patch->vertices[2](d-1) * (1-x_frac))) * y_frac) * (1-z_frac) +
(((patch->vertices[5](d-1) * x_frac) +
(patch->vertices[4](d-1) * (1-x_frac))) * (1-y_frac) +
((patch->vertices[7](d-1) * x_frac) +
(patch->vertices[6](d-1) * (1-x_frac))) * y_frac) * z_frac)
);
entry++;
}
break;
}
default:
Assert (false, ExcNotImplemented());
}
}
}
///////////////////////////////////////
// data output.
//
reorder_task.join ();
// then write data.
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
for (unsigned int entry=0; entry<data_vectors[data_set].size(); entry++)
tm.nd((spacedim+data_set),entry) = static_cast<float>(data_vectors[data_set][entry]);
/////////////////////////////////
// now for the cells. note that
// vertices are counted from 1 onwards
unsigned int first_vertex_of_patch = 0;
unsigned int elem=0;
for (typename std::vector<Patch<dim,spacedim> >::const_iterator patch=patches.begin();
patch!=patches.end(); ++patch)
{
const unsigned int n_subdivisions = patch->n_subdivisions;
const unsigned int n = n_subdivisions+1;
const unsigned int d1=1;
const unsigned int d2=n;
const unsigned int d3=n*n;
// write out the cells making
// up this patch
switch (dim)
{
case 2:
{
for (unsigned int i2=0; i2<n_subdivisions; ++i2)
for (unsigned int i1=0; i1<n_subdivisions; ++i1)
{
tm.cd(0,elem) = first_vertex_of_patch+(i1 )*d1+(i2 )*d2+1;
tm.cd(1,elem) = first_vertex_of_patch+(i1+1)*d1+(i2 )*d2+1;
tm.cd(2,elem) = first_vertex_of_patch+(i1+1)*d1+(i2+1)*d2+1;
tm.cd(3,elem) = first_vertex_of_patch+(i1 )*d1+(i2+1)*d2+1;
elem++;
}
break;
}
case 3:
{
for (unsigned int i3=0; i3<n_subdivisions; ++i3)
for (unsigned int i2=0; i2<n_subdivisions; ++i2)
for (unsigned int i1=0; i1<n_subdivisions; ++i1)
{
// note: vertex indices start with 1!
tm.cd(0,elem) = first_vertex_of_patch+(i1 )*d1+(i2 )*d2+(i3 )*d3+1;
tm.cd(1,elem) = first_vertex_of_patch+(i1+1)*d1+(i2 )*d2+(i3 )*d3+1;
tm.cd(2,elem) = first_vertex_of_patch+(i1+1)*d1+(i2+1)*d2+(i3 )*d3+1;
tm.cd(3,elem) = first_vertex_of_patch+(i1 )*d1+(i2+1)*d2+(i3 )*d3+1;
tm.cd(4,elem) = first_vertex_of_patch+(i1 )*d1+(i2 )*d2+(i3+1)*d3+1;
tm.cd(5,elem) = first_vertex_of_patch+(i1+1)*d1+(i2 )*d2+(i3+1)*d3+1;
tm.cd(6,elem) = first_vertex_of_patch+(i1+1)*d1+(i2+1)*d2+(i3+1)*d3+1;
tm.cd(7,elem) = first_vertex_of_patch+(i1 )*d1+(i2+1)*d2+(i3+1)*d3+1;
elem++;
}
break;
}
default:
Assert (false, ExcNotImplemented());
}
// finally update the number
// of the first vertex of this patch
first_vertex_of_patch += Utilities::fixed_power<dim>(n);
}
{
int ierr = 0,
num_nodes = static_cast<int>(n_nodes),
num_cells = static_cast<int>(n_cells);
char dot[2] = {'.', 0};
// Unfortunately, TECINI takes a
// char *, but c_str() gives a
// const char *. As we don't do
// anything else with
// tec_var_names following
// const_cast is ok
char *var_names=const_cast<char *> (tec_var_names.c_str());
ierr = TECINI (NULL,
var_names,
file_name,
dot,
&tec_debug,
&is_double);
Assert (ierr == 0, ExcErrorOpeningTecplotFile(file_name));
char FEBLOCK[] = {'F','E','B','L','O','C','K',0};
ierr = TECZNE (NULL,
&num_nodes,
&num_cells,
&cell_type,
FEBLOCK,
NULL);
Assert (ierr == 0, ExcTecplotAPIError());
int total = (vars_per_node*num_nodes);
ierr = TECDAT (&total,
&tm.nodalData[0],
&is_double);
Assert (ierr == 0, ExcTecplotAPIError());
ierr = TECNOD (&tm.connData[0]);
Assert (ierr == 0, ExcTecplotAPIError());
ierr = TECEND ();
Assert (ierr == 0, ExcTecplotAPIError());
}
#endif
}
template <int dim, int spacedim>
void
write_vtk (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &vector_data_ranges,
const VtkFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
return;
#endif
VtkStream vtk_out(out, flags);
const unsigned int n_data_sets = data_names.size();
// check against # of data sets in
// first patch. checks against all
// other patches are made in
// write_gmv_reorder_data_vectors
Assert ((patches[0].data.n_rows() == n_data_sets && !patches[0].points_are_available) ||
(patches[0].data.n_rows() == n_data_sets+spacedim && patches[0].points_are_available),
ExcDimensionMismatch (patches[0].points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patches[0].data.n_rows()));
///////////////////////
// preamble
{
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "# vtk DataFile Version 3.0"
<< '\n'
<< "#This file was generated by the deal.II library";
if (flags.print_date_and_time)
out << " on "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << " at "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec;
else
out << ".";
out << '\n'
<< "ASCII"
<< '\n';
// now output the data header
out << "DATASET UNSTRUCTURED_GRID\n"
<< '\n';
}
// if desired, output time and cycle of the simulation, following
// the instructions at
// http://www.visitusers.org/index.php?title=Time_and_Cycle_in_VTK_files
{
const unsigned int
n_metadata = ((flags.cycle != std::numeric_limits<unsigned int>::min() ? 1 : 0)
+
(flags.time != std::numeric_limits<double>::min() ? 1 : 0));
if (n_metadata > 0)
out << "FIELD FieldData " << n_metadata << "\n";
if (flags.cycle != std::numeric_limits<unsigned int>::min())
{
out << "CYCLE 1 1 int\n"
<< flags.cycle << "\n";
}
if (flags.time != std::numeric_limits<double>::min())
{
out << "TIME 1 1 double\n"
<< flags.time << "\n";
}
}
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim>(patches, n_nodes, n_cells);
// in gmv format the vertex
// coordinates and the data have an
// order that is a bit unpleasant
// (first all x coordinates, then
// all y coordinate, ...; first all
// data of variable 1, then
// variable 2, etc), so we have to
// copy the data vectors a bit around
//
// note that we copy vectors when
// looping over the patches since we
// have to write them one variable
// at a time and don't want to use
// more than one loop
//
// this copying of data vectors can
// be done while we already output
// the vertices, so do this on a
// separate task and when wanting
// to write out the data, we wait
// for that task to finish
Table<2,double> data_vectors (n_data_sets, n_nodes);
void (*fun_ptr) (const std::vector<Patch<dim,spacedim> > &,
Table<2,double> &)
= &write_gmv_reorder_data_vectors<dim,spacedim>;
Threads::Task<> reorder_task = Threads::new_task (fun_ptr, patches, data_vectors);
///////////////////////////////
// first make up a list of used
// vertices along with their
// coordinates
//
// note that we have to print
// d=1..3 dimensions
out << "POINTS " << n_nodes << " double" << '\n';
write_nodes(patches, vtk_out);
out << '\n';
/////////////////////////////////
// now for the cells
out << "CELLS " << n_cells << ' '
<< n_cells*(GeometryInfo<dim>::vertices_per_cell+1)
<< '\n';
write_cells(patches, vtk_out);
out << '\n';
// next output the types of the
// cells. since all cells are
// the same, this is simple
out << "CELL_TYPES " << n_cells << '\n';
for (unsigned int i=0; i<n_cells; ++i)
out << ' ' << vtk_cell_type[dim];
out << '\n';
///////////////////////////////////////
// data output.
// now write the data vectors to
// @p{out} first make sure that all
// data is in place
reorder_task.join ();
// then write data. the
// 'POINT_DATA' means: node data
// (as opposed to cell data, which
// we do not support explicitly
// here). all following data sets
// are point data
out << "POINT_DATA " << n_nodes
<< '\n';
// when writing, first write out
// all vector data, then handle the
// scalar data sets that have been
// left over
std::vector<bool> data_set_written (n_data_sets, false);
for (unsigned int n_th_vector=0; n_th_vector<vector_data_ranges.size(); ++n_th_vector)
{
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) >=
std_cxx11::get<0>(vector_data_ranges[n_th_vector]),
ExcLowerRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]),
std_cxx11::get<0>(vector_data_ranges[n_th_vector])));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) < n_data_sets,
ExcIndexRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]),
0, n_data_sets));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) + 1
- std_cxx11::get<0>(vector_data_ranges[n_th_vector]) <= 3,
ExcMessage ("Can't declare a vector with more than 3 components "
"in VTK"));
// mark these components as already written:
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<=std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
data_set_written[i] = true;
// write the
// header. concatenate all the
// component names with double
// underscores unless a vector
// name has been specified
out << "VECTORS ";
if (std_cxx11::get<2>(vector_data_ranges[n_th_vector]) != "")
out << std_cxx11::get<2>(vector_data_ranges[n_th_vector]);
else
{
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
out << data_names[i] << "__";
out << data_names[std_cxx11::get<1>(vector_data_ranges[n_th_vector])];
}
out << " double"
<< '\n';
// now write data. pad all
// vectors to have three
// components
for (unsigned int n=0; n<n_nodes; ++n)
{
switch (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) -
std_cxx11::get<0>(vector_data_ranges[n_th_vector]))
{
case 0:
out << data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector]), n) << " 0 0"
<< '\n';
break;
case 1:
out << data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector]), n) << ' '<< data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector])+1, n) << " 0"
<< '\n';
break;
case 2:
out << data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector]), n) << ' '<< data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector])+1, n) << ' '<< data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector])+2, n)
<< '\n';
break;
default:
// VTK doesn't
// support
// anything else
// than vectors
// with 1, 2, or
// 3 components
Assert (false, ExcInternalError());
}
}
}
// now do the left over scalar data sets
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
if (data_set_written[data_set] == false)
{
out << "SCALARS "
<< data_names[data_set]
<< " double 1"
<< '\n'
<< "LOOKUP_TABLE default"
<< '\n';
std::copy (data_vectors[data_set].begin(),
data_vectors[data_set].end(),
std::ostream_iterator<double>(out, " "));
out << '\n';
}
// make sure everything now gets to
// disk
out.flush ();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
void write_vtu_header (std::ostream &out,
const VtkFlags &flags)
{
AssertThrow (out, ExcIO());
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "<?xml version=\"1.0\" ?> \n";
out << "<!-- \n";
out << "# vtk DataFile Version 3.0"
<< '\n'
<< "#This file was generated by the deal.II library";
if (flags.print_date_and_time)
out << " on "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << " at "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec;
else
out << ".";
out << "\n-->\n";
out << "<VTKFile type=\"UnstructuredGrid\" version=\"0.1\"";
#ifdef DEAL_II_WITH_ZLIB
out << " compressor=\"vtkZLibDataCompressor\"";
#endif
#ifdef DEAL_II_WORDS_BIGENDIAN
out << " byte_order=\"BigEndian\"";
#else
out << " byte_order=\"LittleEndian\"";
#endif
out << ">";
out << '\n';
out << "<UnstructuredGrid>";
out << '\n';
}
void write_vtu_footer (std::ostream &out)
{
AssertThrow (out, ExcIO());
out << " </UnstructuredGrid>\n";
out << "</VTKFile>\n";
}
template <int dim, int spacedim>
void
write_vtu (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &vector_data_ranges,
const VtkFlags &flags,
std::ostream &out)
{
write_vtu_header(out, flags);
write_vtu_main (patches, data_names, vector_data_ranges, flags, out);
write_vtu_footer(out);
out << std::flush;
}
template <int dim, int spacedim>
void write_vtu_main (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &vector_data_ranges,
const VtkFlags &flags,
std::ostream &out)
{
AssertThrow (out, ExcIO());
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#else
if (patches.size() == 0)
{
// we still need to output a valid vtu file, because other CPUs
// might output data. This is the minimal file that is accepted by paraview and visit.
// if we remove the field definitions, visit is complaining.
out << "<Piece NumberOfPoints=\"0\" NumberOfCells=\"0\" >\n"
<< "<Cells>\n"
<< "<DataArray type=\"UInt8\" Name=\"types\"></DataArray>\n"
<< "</Cells>\n"
<< " <PointData Scalars=\"scalars\">\n";
std::vector<bool> data_set_written (data_names.size(), false);
for (unsigned int n_th_vector=0; n_th_vector<vector_data_ranges.size(); ++n_th_vector)
{
// mark these components as already
// written:
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<=std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
data_set_written[i] = true;
// write the
// header. concatenate all the
// component names with double
// underscores unless a vector
// name has been specified
out << " <DataArray type=\"Float64\" Name=\"";
if (std_cxx11::get<2>(vector_data_ranges[n_th_vector]) != "")
out << std_cxx11::get<2>(vector_data_ranges[n_th_vector]);
else
{
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
out << data_names[i] << "__";
out << data_names[std_cxx11::get<1>(vector_data_ranges[n_th_vector])];
}
out << "\" NumberOfComponents=\"3\"></DataArray>\n";
}
for (unsigned int data_set=0; data_set<data_names.size(); ++data_set)
if (data_set_written[data_set] == false)
{
out << " <DataArray type=\"Float64\" Name=\""
<< data_names[data_set]
<< "\"></DataArray>\n";
}
out << " </PointData>\n";
out << "</Piece>\n";
out << std::flush;
return;
}
#endif
// first up: metadata
//
// if desired, output time and cycle of the simulation, following
// the instructions at
// http://www.visitusers.org/index.php?title=Time_and_Cycle_in_VTK_files
{
const unsigned int
n_metadata = ((flags.cycle != std::numeric_limits<unsigned int>::min() ? 1 : 0)
+
(flags.time != std::numeric_limits<double>::min() ? 1 : 0));
if (n_metadata > 0)
out << "<FieldData>\n";
if (flags.cycle != std::numeric_limits<unsigned int>::min())
{
out << "<DataArray type=\"Float32\" Name=\"CYCLE\" NumberOfTuples=\"1\" format=\"ascii\">"
<< flags.cycle
<< "</DataArray>\n";
}
if (flags.time != std::numeric_limits<double>::min())
{
out << "<DataArray type=\"Float32\" Name=\"TIME\" NumberOfTuples=\"1\" format=\"ascii\">"
<< flags.time
<< "</DataArray>\n";
}
if (n_metadata > 0)
out << "</FieldData>\n";
}
VtuStream vtu_out(out, flags);
const unsigned int n_data_sets = data_names.size();
// check against # of data sets in
// first patch. checks against all
// other patches are made in
// write_gmv_reorder_data_vectors
Assert ((patches[0].data.n_rows() == n_data_sets && !patches[0].points_are_available) ||
(patches[0].data.n_rows() == n_data_sets+spacedim && patches[0].points_are_available),
ExcDimensionMismatch (patches[0].points_are_available
?
(n_data_sets + spacedim)
:
n_data_sets,
patches[0].data.n_rows()));
#ifdef DEAL_II_WITH_ZLIB
const char *ascii_or_binary = "binary";
#else
const char *ascii_or_binary = "ascii";
#endif
// first count the number of cells
// and cells for later use
unsigned int n_nodes;
unsigned int n_cells;
compute_sizes<dim,spacedim>(patches, n_nodes, n_cells);
// in gmv format the vertex
// coordinates and the data have an
// order that is a bit unpleasant
// (first all x coordinates, then
// all y coordinate, ...; first all
// data of variable 1, then
// variable 2, etc), so we have to
// copy the data vectors a bit around
//
// note that we copy vectors when
// looping over the patches since we
// have to write them one variable
// at a time and don't want to use
// more than one loop
//
// this copying of data vectors can
// be done while we already output
// the vertices, so do this on a
// separate task and when wanting
// to write out the data, we wait
// for that task to finish
Table<2,double> data_vectors (n_data_sets, n_nodes);
void (*fun_ptr) (const std::vector<Patch<dim,spacedim> > &,
Table<2,double> &)
= &write_gmv_reorder_data_vectors<dim,spacedim>;
Threads::Task<> reorder_task = Threads::new_task (fun_ptr, patches,
data_vectors);
///////////////////////////////
// first make up a list of used
// vertices along with their
// coordinates
//
// note that according to the standard, we
// have to print d=1..3 dimensions, even if
// we are in reality in 2d, for example
out << "<Piece NumberOfPoints=\"" << n_nodes
<<"\" NumberOfCells=\"" << n_cells << "\" >\n";
out << " <Points>\n";
out << " <DataArray type=\"Float64\" NumberOfComponents=\"3\" format=\""
<< ascii_or_binary << "\">\n";
write_nodes(patches, vtu_out);
out << " </DataArray>\n";
out << " </Points>\n\n";
/////////////////////////////////
// now for the cells
out << " <Cells>\n";
out << " <DataArray type=\"Int32\" Name=\"connectivity\" format=\""
<< ascii_or_binary << "\">\n";
write_cells(patches, vtu_out);
out << " </DataArray>\n";
// XML VTU format uses offsets; this is
// different than the VTK format, which
// puts the number of nodes per cell in
// front of the connectivity list.
out << " <DataArray type=\"Int32\" Name=\"offsets\" format=\""
<< ascii_or_binary << "\">\n";
std::vector<int32_t> offsets (n_cells);
for (unsigned int i=0; i<n_cells; ++i)
offsets[i] = (i+1)*GeometryInfo<dim>::vertices_per_cell;
vtu_out << offsets;
out << "\n";
out << " </DataArray>\n";
// next output the types of the
// cells. since all cells are
// the same, this is simple
out << " <DataArray type=\"UInt8\" Name=\"types\" format=\""
<< ascii_or_binary << "\">\n";
{
// uint8_t might be a typedef to unsigned
// char which is then not printed as
// ascii integers
#ifdef DEAL_II_WITH_ZLIB
std::vector<uint8_t> cell_types (n_cells,
static_cast<uint8_t>(vtk_cell_type[dim]));
#else
std::vector<unsigned int> cell_types (n_cells,
vtk_cell_type[dim]);
#endif
// this should compress well :-)
vtu_out << cell_types;
}
out << "\n";
out << " </DataArray>\n";
out << " </Cells>\n";
///////////////////////////////////////
// data output.
// now write the data vectors to
// @p{out} first make sure that all
// data is in place
reorder_task.join ();
// then write data. the
// 'POINT_DATA' means: node data
// (as opposed to cell data, which
// we do not support explicitly
// here). all following data sets
// are point data
out << " <PointData Scalars=\"scalars\">\n";
// when writing, first write out
// all vector data, then handle the
// scalar data sets that have been
// left over
std::vector<bool> data_set_written (n_data_sets, false);
for (unsigned int n_th_vector=0; n_th_vector<vector_data_ranges.size(); ++n_th_vector)
{
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) >=
std_cxx11::get<0>(vector_data_ranges[n_th_vector]),
ExcLowerRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]),
std_cxx11::get<0>(vector_data_ranges[n_th_vector])));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) < n_data_sets,
ExcIndexRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]),
0, n_data_sets));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) + 1
- std_cxx11::get<0>(vector_data_ranges[n_th_vector]) <= 3,
ExcMessage ("Can't declare a vector with more than 3 components "
"in VTK"));
// mark these components as already
// written:
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<=std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
data_set_written[i] = true;
// write the
// header. concatenate all the
// component names with double
// underscores unless a vector
// name has been specified
out << " <DataArray type=\"Float64\" Name=\"";
if (std_cxx11::get<2>(vector_data_ranges[n_th_vector]) != "")
out << std_cxx11::get<2>(vector_data_ranges[n_th_vector]);
else
{
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
out << data_names[i] << "__";
out << data_names[std_cxx11::get<1>(vector_data_ranges[n_th_vector])];
}
out << "\" NumberOfComponents=\"3\" format=\""
<< ascii_or_binary << "\">\n";
// now write data. pad all
// vectors to have three
// components
std::vector<double> data;
data.reserve (n_nodes*dim);
for (unsigned int n=0; n<n_nodes; ++n)
{
switch (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) -
std_cxx11::get<0>(vector_data_ranges[n_th_vector]))
{
case 0:
data.push_back (data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector]), n));
data.push_back (0);
data.push_back (0);
break;
case 1:
data.push_back (data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector]), n));
data.push_back (data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector])+1, n));
data.push_back (0);
break;
case 2:
data.push_back (data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector]), n));
data.push_back (data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector])+1, n));
data.push_back (data_vectors(std_cxx11::get<0>(vector_data_ranges[n_th_vector])+2, n));
break;
default:
// VTK doesn't
// support
// anything else
// than vectors
// with 1, 2, or
// 3 components
Assert (false, ExcInternalError());
}
}
vtu_out << data;
out << " </DataArray>\n";
}
// now do the left over scalar data sets
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
if (data_set_written[data_set] == false)
{
out << " <DataArray type=\"Float64\" Name=\""
<< data_names[data_set]
<< "\" format=\""
<< ascii_or_binary << "\">\n";
std::vector<double> data (data_vectors[data_set].begin(),
data_vectors[data_set].end());
vtu_out << data;
out << " </DataArray>\n";
}
out << " </PointData>\n";
// Finish up writing a valid XML file
out << " </Piece>\n";
// make sure everything now gets to
// disk
out.flush ();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void write_svg (const std::vector<Patch<dim,spacedim> > &,
const std::vector<std::string> &,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &,
const SvgFlags &,
std::ostream &)
{
Assert (false, ExcNotImplemented());
}
template <int spacedim>
void write_svg (const std::vector<Patch<2,spacedim> > &patches,
const std::vector<std::string> &/*data_names*/,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &/*vector_data_ranges*/,
const SvgFlags &flags,
std::ostream &out)
{
const int dim = 2;
const unsigned int height = flags.height;
unsigned int width = flags.width;
// margin around the plotted area
unsigned int margin_in_percent = 0;
if (flags.margin) margin_in_percent = 5;
// determine the bounding box in the model space
double x_dimension, y_dimension, z_dimension;
typename std::vector<Patch<dim,spacedim> >::const_iterator patch = patches.begin();
unsigned int n_subdivisions = patch->n_subdivisions;
unsigned int n = n_subdivisions + 1;
const unsigned int d1 = 1;
const unsigned int d2 = n;
Point<spacedim> projected_point;
Point<spacedim> projected_points[4];
Point<2> projection_decomposition;
Point<2> projection_decompositions[4];
compute_node(projected_point, &*patch, 0, 0, 0, n_subdivisions);
Assert ((flags.height_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.height_vector, 0, patch->data.n_rows()));
double x_min = projected_point[0];
double x_max = x_min;
double y_min = projected_point[1];
double y_max = y_min;
double z_min = patch->data.n_rows() != 0 ? patch->data(flags.height_vector,0) : 0;
double z_max = z_min;
// iterate over the patches
for (; patch != patches.end(); ++patch)
{
n_subdivisions = patch->n_subdivisions;
n = n_subdivisions + 1;
for (unsigned int i2 = 0; i2 < n_subdivisions; ++i2)
{
for (unsigned int i1 = 0; i1 < n_subdivisions; ++i1)
{
compute_node(projected_points[0], &*patch, i1, i2, 0, n_subdivisions);
compute_node(projected_points[1], &*patch, i1+1, i2, 0, n_subdivisions);
compute_node(projected_points[2], &*patch, i1, i2+1, 0, n_subdivisions);
compute_node(projected_points[3], &*patch, i1+1, i2+1, 0, n_subdivisions);
x_min = std::min(x_min, (double)projected_points[0][0]);
x_min = std::min(x_min, (double)projected_points[1][0]);
x_min = std::min(x_min, (double)projected_points[2][0]);
x_min = std::min(x_min, (double)projected_points[3][0]);
x_max = std::max(x_max, (double)projected_points[0][0]);
x_max = std::max(x_max, (double)projected_points[1][0]);
x_max = std::max(x_max, (double)projected_points[2][0]);
x_max = std::max(x_max, (double)projected_points[3][0]);
y_min = std::min(y_min, (double)projected_points[0][1]);
y_min = std::min(y_min, (double)projected_points[1][1]);
y_min = std::min(y_min, (double)projected_points[2][1]);
y_min = std::min(y_min, (double)projected_points[3][1]);
y_max = std::max(y_max, (double)projected_points[0][1]);
y_max = std::max(y_max, (double)projected_points[1][1]);
y_max = std::max(y_max, (double)projected_points[2][1]);
y_max = std::max(y_max, (double)projected_points[3][1]);
Assert ((flags.height_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.height_vector, 0, patch->data.n_rows()));
z_min = std::min(z_min, (double)patch->data(flags.height_vector, i1*d1 + i2*d2));
z_min = std::min(z_min, (double)patch->data(flags.height_vector, (i1+1)*d1 + i2*d2));
z_min = std::min(z_min, (double)patch->data(flags.height_vector, i1*d1 + (i2+1)*d2));
z_min = std::min(z_min, (double)patch->data(flags.height_vector, (i1+1)*d1 + (i2+1)*d2));
z_max = std::max(z_max, (double)patch->data(flags.height_vector, i1*d1 + i2*d2));
z_max = std::max(z_max, (double)patch->data(flags.height_vector, (i1+1)*d1 + i2*d2));
z_max = std::max(z_max, (double)patch->data(flags.height_vector, i1*d1 + (i2+1)*d2));
z_max = std::max(z_max, (double)patch->data(flags.height_vector, (i1+1)*d1 + (i2+1)*d2));
}
}
}
x_dimension = x_max - x_min;
y_dimension = y_max - y_min;
z_dimension = z_max - z_min;
// set initial camera position
Point<3> camera_position(true);
Point<3> camera_direction(true);
Point<3> camera_horizontal(true);
float camera_focus = 0;
// translate camera from the origin to the initial position
camera_position[0] = 0.;
camera_position[1] = 0.;
camera_position[2] = z_min + 2. * z_dimension;
camera_direction[0] = 0.;
camera_direction[1] = 0.;
camera_direction[2] = - 1.;
camera_horizontal[0] = 1.;
camera_horizontal[1] = 0.;
camera_horizontal[2] = 0.;
camera_focus = .5 * z_dimension;
Point<3> camera_position_temp;
Point<3> camera_direction_temp;
Point<3> camera_horizontal_temp;
const float angle_factor = 3.14159265 / 180.;
// (I) rotate the camera to the chosen polar angle
camera_position_temp[1] = cos(angle_factor * flags.polar_angle) * camera_position[1] - sin(angle_factor * flags.polar_angle) * camera_position[2];
camera_position_temp[2] = sin(angle_factor * flags.polar_angle) * camera_position[1] + cos(angle_factor * flags.polar_angle) * camera_position[2];
camera_direction_temp[1] = cos(angle_factor * flags.polar_angle) * camera_direction[1] - sin(angle_factor * flags.polar_angle) * camera_direction[2];
camera_direction_temp[2] = sin(angle_factor * flags.polar_angle) * camera_direction[1] + cos(angle_factor * flags.polar_angle) * camera_direction[2];
camera_horizontal_temp[1] = cos(angle_factor * flags.polar_angle) * camera_horizontal[1] - sin(angle_factor * flags.polar_angle) * camera_horizontal[2];
camera_horizontal_temp[2] = sin(angle_factor * flags.polar_angle) * camera_horizontal[1] + cos(angle_factor * flags.polar_angle) * camera_horizontal[2];
camera_position[1] = camera_position_temp[1];
camera_position[2] = camera_position_temp[2];
camera_direction[1] = camera_direction_temp[1];
camera_direction[2] = camera_direction_temp[2];
camera_horizontal[1] = camera_horizontal_temp[1];
camera_horizontal[2] = camera_horizontal_temp[2];
// (II) rotate the camera to the chosen azimuth angle
camera_position_temp[0] = cos(angle_factor * flags.azimuth_angle) * camera_position[0] - sin(angle_factor * flags.azimuth_angle) * camera_position[1];
camera_position_temp[1] = sin(angle_factor * flags.azimuth_angle) * camera_position[0] + cos(angle_factor * flags.azimuth_angle) * camera_position[1];
camera_direction_temp[0] = cos(angle_factor * flags.azimuth_angle) * camera_direction[0] - sin(angle_factor * flags.azimuth_angle) * camera_direction[1];
camera_direction_temp[1] = sin(angle_factor * flags.azimuth_angle) * camera_direction[0] + cos(angle_factor * flags.azimuth_angle) * camera_direction[1];
camera_horizontal_temp[0] = cos(angle_factor * flags.azimuth_angle) * camera_horizontal[0] - sin(angle_factor * flags.azimuth_angle) * camera_horizontal[1];
camera_horizontal_temp[1] = sin(angle_factor * flags.azimuth_angle) * camera_horizontal[0] + cos(angle_factor * flags.azimuth_angle) * camera_horizontal[1];
camera_position[0] = camera_position_temp[0];
camera_position[1] = camera_position_temp[1];
camera_direction[0] = camera_direction_temp[0];
camera_direction[1] = camera_direction_temp[1];
camera_horizontal[0] = camera_horizontal_temp[0];
camera_horizontal[1] = camera_horizontal_temp[1];
// (III) translate the camera
camera_position[0] = x_min + .5 * x_dimension;
camera_position[1] = y_min + .5 * y_dimension;
camera_position[0] += (z_min + 2. * z_dimension) * sin(angle_factor * flags.polar_angle) * sin(angle_factor * flags.azimuth_angle);
camera_position[1] -= (z_min + 2. * z_dimension) * sin(angle_factor * flags.polar_angle) * cos(angle_factor * flags.azimuth_angle);
// determine the bounding box on the projection plane
double x_min_perspective, y_min_perspective;
double x_max_perspective, y_max_perspective;
double x_dimension_perspective, y_dimension_perspective;
patch = patches.begin();
n_subdivisions = patch->n_subdivisions;
n = n_subdivisions + 1;
Point<3> point(true);
compute_node(projected_point, &*patch, 0, 0, 0, n_subdivisions);
Assert ((flags.height_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.height_vector, 0, patch->data.n_rows()));
point[0] = projected_point[0];
point[1] = projected_point[1];
point[2] = patch->data.n_rows() != 0 ? patch->data(flags.height_vector, 0) : 0;
projection_decomposition = svg_project_point(point, camera_position, camera_direction, camera_horizontal, camera_focus);
x_min_perspective = projection_decomposition[0];
x_max_perspective = projection_decomposition[0];
y_min_perspective = projection_decomposition[1];
y_max_perspective = projection_decomposition[1];
// iterate over the patches
for (; patch != patches.end(); ++patch)
{
n_subdivisions = patch->n_subdivisions;
n = n_subdivisions + 1;
for (unsigned int i2 = 0; i2 < n_subdivisions; ++i2)
{
for (unsigned int i1 = 0; i1 < n_subdivisions; ++i1)
{
Point<spacedim> projected_vertices[4];
Point<3> vertices[4];
compute_node(projected_vertices[0], &*patch, i1, i2, 0, n_subdivisions);
compute_node(projected_vertices[1], &*patch, i1+1, i2, 0, n_subdivisions);
compute_node(projected_vertices[2], &*patch, i1, i2+1, 0, n_subdivisions);
compute_node(projected_vertices[3], &*patch, i1+1, i2+1, 0, n_subdivisions);
Assert ((flags.height_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.height_vector, 0, patch->data.n_rows()));
vertices[0][0] = projected_vertices[0][0];
vertices[0][1] = projected_vertices[0][1];
vertices[0][2] = patch->data.n_rows() != 0 ? patch->data(0,i1*d1 + i2*d2) : 0;
vertices[1][0] = projected_vertices[1][0];
vertices[1][1] = projected_vertices[1][1];
vertices[1][2] = patch->data.n_rows() != 0 ? patch->data(0,(i1+1)*d1 + i2*d2) : 0;
vertices[2][0] = projected_vertices[2][0];
vertices[2][1] = projected_vertices[2][1];
vertices[2][2] = patch->data.n_rows() != 0 ? patch->data(0,i1*d1 + (i2+1)*d2) : 0;
vertices[3][0] = projected_vertices[3][0];
vertices[3][1] = projected_vertices[3][1];
vertices[3][2] = patch->data.n_rows() != 0 ? patch->data(0,(i1+1)*d1 + (i2+1)*d2) : 0;
projection_decompositions[0] = svg_project_point(vertices[0], camera_position, camera_direction, camera_horizontal, camera_focus);
projection_decompositions[1] = svg_project_point(vertices[1], camera_position, camera_direction, camera_horizontal, camera_focus);
projection_decompositions[2] = svg_project_point(vertices[2], camera_position, camera_direction, camera_horizontal, camera_focus);
projection_decompositions[3] = svg_project_point(vertices[3], camera_position, camera_direction, camera_horizontal, camera_focus);
x_min_perspective = std::min(x_min_perspective, (double)projection_decompositions[0][0]);
x_min_perspective = std::min(x_min_perspective, (double)projection_decompositions[1][0]);
x_min_perspective = std::min(x_min_perspective, (double)projection_decompositions[2][0]);
x_min_perspective = std::min(x_min_perspective, (double)projection_decompositions[3][0]);
x_max_perspective = std::max(x_max_perspective, (double)projection_decompositions[0][0]);
x_max_perspective = std::max(x_max_perspective, (double)projection_decompositions[1][0]);
x_max_perspective = std::max(x_max_perspective, (double)projection_decompositions[2][0]);
x_max_perspective = std::max(x_max_perspective, (double)projection_decompositions[3][0]);
y_min_perspective = std::min(y_min_perspective, (double)projection_decompositions[0][1]);
y_min_perspective = std::min(y_min_perspective, (double)projection_decompositions[1][1]);
y_min_perspective = std::min(y_min_perspective, (double)projection_decompositions[2][1]);
y_min_perspective = std::min(y_min_perspective, (double)projection_decompositions[3][1]);
y_max_perspective = std::max(y_max_perspective, (double)projection_decompositions[0][1]);
y_max_perspective = std::max(y_max_perspective, (double)projection_decompositions[1][1]);
y_max_perspective = std::max(y_max_perspective, (double)projection_decompositions[2][1]);
y_max_perspective = std::max(y_max_perspective, (double)projection_decompositions[3][1]);
}
}
}
x_dimension_perspective = x_max_perspective - x_min_perspective;
y_dimension_perspective = y_max_perspective - y_min_perspective;
std::multiset<SvgCell> cells;
// iterate over the patches
for (patch = patches.begin(); patch != patches.end(); ++patch)
{
n_subdivisions = patch->n_subdivisions;
n = n_subdivisions + 1;
for (unsigned int i2 = 0; i2 < n_subdivisions; ++i2)
{
for (unsigned int i1 = 0; i1 < n_subdivisions; ++i1)
{
Point<spacedim> projected_vertices[4];
SvgCell cell;
compute_node(projected_vertices[0], &*patch, i1, i2, 0, n_subdivisions);
compute_node(projected_vertices[1], &*patch, i1+1, i2, 0, n_subdivisions);
compute_node(projected_vertices[2], &*patch, i1, i2+1, 0, n_subdivisions);
compute_node(projected_vertices[3], &*patch, i1+1, i2+1, 0, n_subdivisions);
Assert ((flags.height_vector < patch->data.n_rows()) ||
patch->data.n_rows() == 0,
ExcIndexRange (flags.height_vector, 0, patch->data.n_rows()));
cell.vertices[0][0] = projected_vertices[0][0];
cell.vertices[0][1] = projected_vertices[0][1];
cell.vertices[0][2] = patch->data.n_rows() != 0 ? patch->data(0,i1*d1 + i2*d2) : 0;
cell.vertices[1][0] = projected_vertices[1][0];
cell.vertices[1][1] = projected_vertices[1][1];
cell.vertices[1][2] = patch->data.n_rows() != 0 ? patch->data(0,(i1+1)*d1 + i2*d2) : 0;
cell.vertices[2][0] = projected_vertices[2][0];
cell.vertices[2][1] = projected_vertices[2][1];
cell.vertices[2][2] = patch->data.n_rows() != 0 ? patch->data(0,i1*d1 + (i2+1)*d2) : 0;
cell.vertices[3][0] = projected_vertices[3][0];
cell.vertices[3][1] = projected_vertices[3][1];
cell.vertices[3][2] = patch->data.n_rows() != 0 ? patch->data(0,(i1+1)*d1 + (i2+1)*d2) : 0;
cell.projected_vertices[0] = svg_project_point(cell.vertices[0], camera_position, camera_direction, camera_horizontal, camera_focus);
cell.projected_vertices[1] = svg_project_point(cell.vertices[1], camera_position, camera_direction, camera_horizontal, camera_focus);
cell.projected_vertices[2] = svg_project_point(cell.vertices[2], camera_position, camera_direction, camera_horizontal, camera_focus);
cell.projected_vertices[3] = svg_project_point(cell.vertices[3], camera_position, camera_direction, camera_horizontal, camera_focus);
cell.center = .25 * (cell.vertices[0] + cell.vertices[1] + cell.vertices[2] + cell.vertices[3]);
cell.projected_center = svg_project_point(cell.center, camera_position, camera_direction, camera_horizontal, camera_focus);
cell.depth = cell.center.distance(camera_position);
cells.insert(cell);
}
}
}
// write the svg file
if (width==0)
width = static_cast<unsigned int>(.5 + height * (x_dimension_perspective / y_dimension_perspective));
unsigned int additional_width = 0;
if (flags.draw_colorbar) additional_width = static_cast<unsigned int>(.5 + height * .3); // additional width for colorbar
// basic svg header and background rectangle
out << "<svg width=\"" << width + additional_width << "\" height=\"" << height << "\" xmlns=\"http://www.w3.org/2000/svg\" version=\"1.1\">" << '\n'
<< " <rect width=\"" << width + additional_width << "\" height=\"" << height << "\" style=\"fill:white\"/>" << '\n' << '\n';
unsigned int triangle_counter = 0;
// write the cells in the correct order
for (typename std::multiset<SvgCell>::const_iterator cell = cells.begin(); cell != cells.end(); ++cell)
{
Point<3> points3d_triangle[3];
for (unsigned int triangle_index = 0; triangle_index < 4; triangle_index++)
{
switch (triangle_index)
{
case 0:
points3d_triangle[0] = cell->vertices[0], points3d_triangle[1] = cell->vertices[1], points3d_triangle[2] = cell->center;
break;
case 1:
points3d_triangle[0] = cell->vertices[1], points3d_triangle[1] = cell->vertices[3], points3d_triangle[2] = cell->center;
break;
case 2:
points3d_triangle[0] = cell->vertices[3], points3d_triangle[1] = cell->vertices[2], points3d_triangle[2] = cell->center;
break;
case 3:
points3d_triangle[0] = cell->vertices[2], points3d_triangle[1] = cell->vertices[0], points3d_triangle[2] = cell->center;
break;
default:
break;
}
Point<6> gradient_param = svg_get_gradient_parameters(points3d_triangle);
double start_h = .667 - ((gradient_param[4] - z_min) / z_dimension) * .667;
double stop_h = .667 - ((gradient_param[5] - z_min) / z_dimension) * .667;
unsigned int start_r = 0;
unsigned int start_g = 0;
unsigned int start_b = 0;
unsigned int stop_r = 0;
unsigned int stop_g = 0;
unsigned int stop_b = 0;
unsigned int start_i = static_cast<unsigned int>(start_h * 6.);
unsigned int stop_i = static_cast<unsigned int>(stop_h * 6.);
double start_f = start_h * 6. - start_i;
double start_q = 1. - start_f;
double stop_f = stop_h * 6. - stop_i;
double stop_q = 1. - stop_f;
switch (start_i % 6)
{
case 0:
start_r = 255, start_g = static_cast<unsigned int>(.5 + 255. * start_f);
break;
case 1:
start_r = static_cast<unsigned int>(.5 + 255. * start_q), start_g = 255;
break;
case 2:
start_g = 255, start_b = static_cast<unsigned int>(.5 + 255. * start_f);
break;
case 3:
start_g = static_cast<unsigned int>(.5 + 255. * start_q), start_b = 255;
break;
case 4:
start_r = static_cast<unsigned int>(.5 + 255. * start_f), start_b = 255;
break;
case 5:
start_r = 255, start_b = static_cast<unsigned int>(.5 + 255. * start_q);
break;
default:
break;
}
switch (stop_i % 6)
{
case 0:
stop_r = 255, stop_g = static_cast<unsigned int>(.5 + 255. * stop_f);
break;
case 1:
stop_r = static_cast<unsigned int>(.5 + 255. * stop_q), stop_g = 255;
break;
case 2:
stop_g = 255, stop_b = static_cast<unsigned int>(.5 + 255. * stop_f);
break;
case 3:
stop_g = static_cast<unsigned int>(.5 + 255. * stop_q), stop_b = 255;
break;
case 4:
stop_r = static_cast<unsigned int>(.5 + 255. * stop_f), stop_b = 255;
break;
case 5:
stop_r = 255, stop_b = static_cast<unsigned int>(.5 + 255. * stop_q);
break;
default:
break;
}
Point<3> gradient_start_point_3d, gradient_stop_point_3d;
gradient_start_point_3d[0] = gradient_param[0];
gradient_start_point_3d[1] = gradient_param[1];
gradient_start_point_3d[2] = gradient_param[4];
gradient_stop_point_3d[0] = gradient_param[2];
gradient_stop_point_3d[1] = gradient_param[3];
gradient_stop_point_3d[2] = gradient_param[5];
Point<2> gradient_start_point = svg_project_point(gradient_start_point_3d, camera_position, camera_direction, camera_horizontal, camera_focus);
Point<2> gradient_stop_point = svg_project_point(gradient_stop_point_3d, camera_position, camera_direction, camera_horizontal, camera_focus);
// define linear gradient
out << " <linearGradient id=\"" << triangle_counter << "\" gradientUnits=\"userSpaceOnUse\" "
<< "x1=\""
<< static_cast<unsigned int>(.5 + ((gradient_start_point[0] - x_min_perspective) / x_dimension_perspective) * (width - (width/100.) * 2. * margin_in_percent) + ((width/100.) * margin_in_percent))
<< "\" "
<< "y1=\""
<< static_cast<unsigned int>(.5 + height - (height/100.) * margin_in_percent - ((gradient_start_point[1] - y_min_perspective) / y_dimension_perspective) * (height - (height/100.) * 2. * margin_in_percent))
<< "\" "
<< "x2=\""
<< static_cast<unsigned int>(.5 + ((gradient_stop_point[0] - x_min_perspective) / x_dimension_perspective) * (width - (width/100.) * 2. * margin_in_percent) + ((width/100.) * margin_in_percent))
<< "\" "
<< "y2=\""
<< static_cast<unsigned int>(.5 + height - (height/100.) * margin_in_percent - ((gradient_stop_point[1] - y_min_perspective) / y_dimension_perspective) * (height - (height/100.) * 2. * margin_in_percent))
<< "\""
<< ">" << '\n'
<< " <stop offset=\"0\" style=\"stop-color:rgb(" << start_r << "," << start_g << "," << start_b << ")\"/>" << '\n'
<< " <stop offset=\"1\" style=\"stop-color:rgb(" << stop_r << "," << stop_g << "," << stop_b << ")\"/>" << '\n'
<< " </linearGradient>" << '\n';
// draw current triangle
double x1 = 0, y1 = 0, x2 = 0, y2 = 0;
double x3 = cell->projected_center[0];
double y3 = cell->projected_center[1];
switch (triangle_index)
{
case 0:
x1 = cell->projected_vertices[0][0], y1 = cell->projected_vertices[0][1], x2 = cell->projected_vertices[1][0], y2 = cell->projected_vertices[1][1];
break;
case 1:
x1 = cell->projected_vertices[1][0], y1 = cell->projected_vertices[1][1], x2 = cell->projected_vertices[3][0], y2 = cell->projected_vertices[3][1];
break;
case 2:
x1 = cell->projected_vertices[3][0], y1 = cell->projected_vertices[3][1], x2 = cell->projected_vertices[2][0], y2 = cell->projected_vertices[2][1];
break;
case 3:
x1 = cell->projected_vertices[2][0], y1 = cell->projected_vertices[2][1], x2 = cell->projected_vertices[0][0], y2 = cell->projected_vertices[0][1];
break;
default:
break;
}
out << " <path d=\"M "
<< static_cast<unsigned int>(.5 + ((x1 - x_min_perspective) / x_dimension_perspective) * (width - (width/100.) * 2. * margin_in_percent) + ((width/100.) * margin_in_percent))
<< ' '
<< static_cast<unsigned int>(.5 + height - (height/100.) * margin_in_percent - ((y1 - y_min_perspective) / y_dimension_perspective) * (height - (height/100.) * 2. * margin_in_percent))
<< " L "
<< static_cast<unsigned int>(.5 + ((x2 - x_min_perspective) / x_dimension_perspective) * (width - (width/100.) * 2. * margin_in_percent) + ((width/100.) * margin_in_percent))
<< ' '
<< static_cast<unsigned int>(.5 + height - (height/100.) * margin_in_percent - ((y2 - y_min_perspective) / y_dimension_perspective) * (height - (height/100.) * 2. * margin_in_percent))
<< " L "
<< static_cast<unsigned int>(.5 + ((x3 - x_min_perspective) / x_dimension_perspective) * (width - (width/100.) * 2. * margin_in_percent) + ((width/100.) * margin_in_percent))
<< ' '
<< static_cast<unsigned int>(.5 + height - (height/100.) * margin_in_percent - ((y3 - y_min_perspective) / y_dimension_perspective) * (height - (height/100.) * 2. * margin_in_percent))
<< " L "
<< static_cast<unsigned int>(.5 + ((x1 - x_min_perspective) / x_dimension_perspective) * (width - (width/100.) * 2. * margin_in_percent) + ((width/100.) * margin_in_percent))
<< ' '
<< static_cast<unsigned int>(.5 + height - (height/100.) * margin_in_percent - ((y1 - y_min_perspective) / y_dimension_perspective) * (height - (height/100.) * 2. * margin_in_percent))
<< "\" style=\"stroke:black; fill:url(#" << triangle_counter << "); stroke-width:" << flags.line_thickness << "\"/>" << '\n';
triangle_counter++;
}
}
// draw the colorbar
if (flags.draw_colorbar)
{
out << '\n' << " <!-- colorbar -->" << '\n';
unsigned int element_height = static_cast<unsigned int>(((height/100.) * (71. - 2.*margin_in_percent)) / 4);
unsigned int element_width = static_cast<unsigned int>(.5 + (height/100.) * 2.5);
additional_width = 0;
if (!flags.margin) additional_width = static_cast<unsigned int>(.5 + (height/100.) * 2.5);
for (unsigned int index = 0; index < 4; index++)
{
double start_h = .667 - ((index+1) / 4.) * .667;
double stop_h = .667 - (index / 4.) * .667;
unsigned int start_r = 0;
unsigned int start_g = 0;
unsigned int start_b = 0;
unsigned int stop_r = 0;
unsigned int stop_g = 0;
unsigned int stop_b = 0;
unsigned int start_i = static_cast<unsigned int>(start_h * 6.);
unsigned int stop_i = static_cast<unsigned int>(stop_h * 6.);
double start_f = start_h * 6. - start_i;
double start_q = 1. - start_f;
double stop_f = stop_h * 6. - stop_i;
double stop_q = 1. - stop_f;
switch (start_i % 6)
{
case 0:
start_r = 255, start_g = static_cast<unsigned int>(.5 + 255. * start_f);
break;
case 1:
start_r = static_cast<unsigned int>(.5 + 255. * start_q), start_g = 255;
break;
case 2:
start_g = 255, start_b = static_cast<unsigned int>(.5 + 255. * start_f);
break;
case 3:
start_g = static_cast<unsigned int>(.5 + 255. * start_q), start_b = 255;
break;
case 4:
start_r = static_cast<unsigned int>(.5 + 255. * start_f), start_b = 255;
break;
case 5:
start_r = 255, start_b = static_cast<unsigned int>(.5 + 255. * start_q);
break;
default:
break;
}
switch (stop_i % 6)
{
case 0:
stop_r = 255, stop_g = static_cast<unsigned int>(.5 + 255. * stop_f);
break;
case 1:
stop_r = static_cast<unsigned int>(.5 + 255. * stop_q), stop_g = 255;
break;
case 2:
stop_g = 255, stop_b = static_cast<unsigned int>(.5 + 255. * stop_f);
break;
case 3:
stop_g = static_cast<unsigned int>(.5 + 255. * stop_q), stop_b = 255;
break;
case 4:
stop_r = static_cast<unsigned int>(.5 + 255. * stop_f), stop_b = 255;
break;
case 5:
stop_r = 255, stop_b = static_cast<unsigned int>(.5 + 255. * stop_q);
break;
default:
break;
}
// define gradient
out << " <linearGradient id=\"colorbar_" << index << "\" gradientUnits=\"userSpaceOnUse\" "
<< "x1=\"" << width + additional_width << "\" "
<< "y1=\"" << static_cast<unsigned int>(.5 + (height/100.) * (margin_in_percent + 29)) + (3-index) * element_height << "\" "
<< "x2=\"" << width + additional_width << "\" "
<< "y2=\"" << static_cast<unsigned int>(.5 + (height/100.) * (margin_in_percent + 29)) + (4-index) * element_height << "\""
<< ">" << '\n'
<< " <stop offset=\"0\" style=\"stop-color:rgb(" << start_r << "," << start_g << "," << start_b << ")\"/>" << '\n'
<< " <stop offset=\"1\" style=\"stop-color:rgb(" << stop_r << "," << stop_g << "," << stop_b << ")\"/>" << '\n'
<< " </linearGradient>" << '\n';
// draw box corresponding to the gradient above
out << " <rect"
<< " x=\"" << width + additional_width
<< "\" y=\"" << static_cast<unsigned int>(.5 + (height/100.) * (margin_in_percent + 29)) + (3-index) * element_height
<< "\" width=\"" << element_width
<< "\" height=\"" << element_height
<< "\" style=\"stroke:black; stroke-width:2; fill:url(#colorbar_" << index << ")\"/>" << '\n';
}
for (unsigned int index = 0; index < 5; index++)
{
out << " <text x=\"" << width + additional_width + static_cast<unsigned int>(1.5 * element_width)
<< "\" y=\"" << static_cast<unsigned int>(.5 + (height/100.) * (margin_in_percent + 29) + (4.-index) * element_height + 30.) << "\""
<< " style=\"text-anchor:start; font-size:80; font-family:Helvetica";
if (index == 0 || index == 4) out << "; font-weight:bold";
out << "\">" << (float)(((int)((z_min + index * (z_dimension / 4.))*10000))/10000.);
if (index == 4) out << " max";
if (index == 0) out << " min";
out << "</text>" << '\n';
}
}
// finalize the svg file
out << '\n' << "</svg>";
out.flush();
}
template <int dim, int spacedim>
void
write_deal_II_intermediate (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &vector_data_ranges,
const Deal_II_IntermediateFlags &/*flags*/,
std::ostream &out)
{
AssertThrow (out, ExcIO());
// first write tokens indicating the
// template parameters. we need this in
// here because we may want to read in data
// again even if we don't know in advance
// the template parameters, see step-19
out << dim << ' ' << spacedim << '\n';
// then write a header
out << "[deal.II intermediate format graphics data]" << '\n'
<< "[written by " << DEAL_II_PACKAGE_NAME << " " << DEAL_II_PACKAGE_VERSION << "]" << '\n'
<< "[Version: " << Deal_II_IntermediateFlags::format_version << "]" << '\n';
out << data_names.size() << '\n';
for (unsigned int i=0; i<data_names.size(); ++i)
out << data_names[i] << '\n';
out << patches.size() << '\n';
for (unsigned int i=0; i<patches.size(); ++i)
out << patches[i] << '\n';
out << vector_data_ranges.size() << '\n';
for (unsigned int i=0; i<vector_data_ranges.size(); ++i)
out << std_cxx11::get<0>(vector_data_ranges[i]) << ' '
<< std_cxx11::get<1>(vector_data_ranges[i]) << '\n'
<< std_cxx11::get<2>(vector_data_ranges[i]) << '\n';
out << '\n';
// make sure everything now gets to
// disk
out.flush ();
}
std::pair<unsigned int, unsigned int>
determine_intermediate_format_dimensions (std::istream &input)
{
AssertThrow (input, ExcIO());
unsigned int dim, spacedim;
input >> dim >> spacedim;
return std::make_pair (dim, spacedim);
}
} // namespace DataOutBase
/* --------------------------- class DataOutInterface ---------------------- */
template <int dim, int spacedim>
DataOutInterface<dim,spacedim>::DataOutInterface ()
: default_subdivisions(1)
{}
template <int dim, int spacedim>
DataOutInterface<dim,spacedim>::~DataOutInterface ()
{}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_dx (std::ostream &out) const
{
DataOutBase::write_dx (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
dx_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_ucd (std::ostream &out) const
{
DataOutBase::write_ucd (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
ucd_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_gnuplot (std::ostream &out) const
{
DataOutBase::write_gnuplot (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
gnuplot_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_povray (std::ostream &out) const
{
DataOutBase::write_povray (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
povray_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_eps (std::ostream &out) const
{
DataOutBase::write_eps (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
eps_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_gmv (std::ostream &out) const
{
DataOutBase::write_gmv (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
gmv_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_tecplot (std::ostream &out) const
{
DataOutBase::write_tecplot (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
tecplot_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_tecplot_binary (std::ostream &out) const
{
DataOutBase::write_tecplot_binary (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
tecplot_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_vtk (std::ostream &out) const
{
DataOutBase::write_vtk (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
vtk_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_vtu (std::ostream &out) const
{
DataOutBase::write_vtu (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
vtk_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_svg (std::ostream &out) const
{
DataOutBase::write_svg (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
svg_flags, out);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::write_vtu_in_parallel (const char *filename, MPI_Comm comm) const
{
#ifndef DEAL_II_WITH_MPI
//without MPI fall back to the normal way to write a vtu file:
(void)comm;
std::ofstream f(filename);
write_vtu (f);
#else
int myrank, nproc, err;
MPI_Comm_rank(comm, &myrank);
MPI_Comm_size(comm, &nproc);
MPI_Info info;
MPI_Info_create(&info);
MPI_File fh;
err = MPI_File_open(comm, const_cast<char *>(filename),
MPI_MODE_CREATE | MPI_MODE_WRONLY, info, &fh);
AssertThrow(err==0, ExcMessage("Unable to open file with MPI_File_open!"));
MPI_File_set_size(fh, 0); // delete the file contents
// this barrier is necessary, because otherwise others might already
// write while one core is still setting the size to zero.
MPI_Barrier(comm);
MPI_Info_free(&info);
unsigned int header_size;
//write header
if (myrank==0)
{
std::stringstream ss;
DataOutBase::write_vtu_header(ss, vtk_flags);
header_size = ss.str().size();
MPI_File_write(fh, const_cast<char *>(ss.str().c_str()), header_size, MPI_CHAR, MPI_STATUS_IGNORE);
}
MPI_Bcast(&header_size, 1, MPI_INT, 0, comm);
MPI_File_seek_shared( fh, header_size, MPI_SEEK_SET );
{
std::stringstream ss;
DataOutBase::write_vtu_main (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
vtk_flags, ss);
MPI_File_write_ordered(fh, const_cast<char *>(ss.str().c_str()), ss.str().size(), MPI_CHAR, MPI_STATUS_IGNORE);
}
//write footer
if (myrank==0)
{
std::stringstream ss;
DataOutBase::write_vtu_footer(ss);
unsigned int footer_size = ss.str().size();
MPI_File_write_shared(fh, const_cast<char *>(ss.str().c_str()), footer_size, MPI_CHAR, MPI_STATUS_IGNORE);
}
MPI_File_close( &fh );
#endif
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::
write_pvd_record (std::ostream &out,
const std::vector<std::pair<double,std::string> > ×_and_names) const
{
AssertThrow (out, ExcIO());
out << "<?xml version=\"1.0\"?>\n";
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "<!--\n";
out << "#This file was generated by the deal.II library on "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << " at "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec
<< "\n-->\n";
out << "<VTKFile type=\"Collection\" version=\"0.1\" ByteOrder=\"LittleEndian\">\n";
out << " <Collection>\n";
for (unsigned int i=0; i<times_and_names.size(); ++i)
out << " <DataSet timestep=\"" << times_and_names[i].first
<< "\" group=\"\" part=\"0\" file=\"" << times_and_names[i].second
<< "\"/>\n";
out << " </Collection>\n";
out << "</VTKFile>\n";
out.flush();
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::write_pvtu_record (std::ostream &out,
const std::vector<std::string> &piece_names) const
{
AssertThrow (out, ExcIO());
const std::vector<std::string> data_names = get_dataset_names();
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > vector_data_ranges
= get_vector_data_ranges();
const unsigned int n_data_sets = data_names.size();
out << "<?xml version=\"1.0\"?>\n";
std::time_t time1= std::time (0);
std::tm *time = std::localtime(&time1);
out << "<!--\n";
out << "#This file was generated by the deal.II library on "
<< time->tm_year+1900 << "/"
<< time->tm_mon+1 << "/"
<< time->tm_mday << " at "
<< time->tm_hour << ":"
<< std::setw(2) << time->tm_min << ":"
<< std::setw(2) << time->tm_sec
<< "\n-->\n";
out << "<VTKFile type=\"PUnstructuredGrid\" version=\"0.1\" byte_order=\"LittleEndian\">\n";
out << " <PUnstructuredGrid GhostLevel=\"0\">\n";
out << " <PPointData Scalars=\"scalars\">\n";
// We need to output in the same order as
// the write_vtu function does:
std::vector<bool> data_set_written (n_data_sets, false);
for (unsigned int n_th_vector=0; n_th_vector<vector_data_ranges.size(); ++n_th_vector)
{
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) >=
std_cxx11::get<0>(vector_data_ranges[n_th_vector]),
ExcLowerRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]),
std_cxx11::get<0>(vector_data_ranges[n_th_vector])));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) < n_data_sets,
ExcIndexRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]),
0, n_data_sets));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) + 1
- std_cxx11::get<0>(vector_data_ranges[n_th_vector]) <= 3,
ExcMessage ("Can't declare a vector with more than 3 components "
"in VTK"));
// mark these components as already
// written:
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<=std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
data_set_written[i] = true;
// write the
// header. concatenate all the
// component names with double
// underscores unless a vector
// name has been specified
out << " <PDataArray type=\"Float64\" Name=\"";
if (std_cxx11::get<2>(vector_data_ranges[n_th_vector]) != "")
out << std_cxx11::get<2>(vector_data_ranges[n_th_vector]);
else
{
for (unsigned int i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]);
i<std_cxx11::get<1>(vector_data_ranges[n_th_vector]);
++i)
out << data_names[i] << "__";
out << data_names[std_cxx11::get<1>(vector_data_ranges[n_th_vector])];
}
out << "\" NumberOfComponents=\"3\" format=\"ascii\"/>\n";
}
for (unsigned int data_set=0; data_set<n_data_sets; ++data_set)
if (data_set_written[data_set] == false)
{
out << " <PDataArray type=\"Float64\" Name=\""
<< data_names[data_set]
<< "\" format=\"ascii\"/>\n";
}
out << " </PPointData>\n";
out << " <PPoints>\n";
out << " <PDataArray type=\"Float64\" NumberOfComponents=\"3\"/>\n";
out << " </PPoints>\n";
for (unsigned int i=0; i<piece_names.size(); ++i)
out << " <Piece Source=\"" << piece_names[i] << "\"/>\n";
out << " </PUnstructuredGrid>\n";
out << "</VTKFile>\n";
out.flush();
// assert the stream is still ok
AssertThrow (out, ExcIO());
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::write_visit_record (std::ostream &out,
const std::vector<std::string> &piece_names) const
{
out << "!NBLOCKS " << piece_names.size() << '\n';
for (unsigned int i=0; i<piece_names.size(); ++i)
out << piece_names[i] << '\n';
out << std::flush;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::write_visit_record (std::ostream &out,
const std::vector<std::vector<std::string> > &piece_names) const
{
AssertThrow (out, ExcIO());
if (piece_names.size() == 0)
return;
const double nblocks = piece_names[0].size();
Assert(nblocks > 0, ExcMessage("piece_names should be a vector of nonempty vectors.") )
out << "!NBLOCKS " << nblocks << '\n';
for (std::vector<std::vector<std::string> >::const_iterator domain = piece_names.begin(); domain != piece_names.end(); ++domain)
{
Assert(domain->size() == nblocks, ExcMessage("piece_names should be a vector of equal sized vectors.") )
for (std::vector<std::string>::const_iterator subdomain = domain->begin(); subdomain != domain->end(); ++subdomain)
out << *subdomain << '\n';
}
out << std::flush;
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::
write_deal_II_intermediate (std::ostream &out) const
{
DataOutBase::write_deal_II_intermediate (get_patches(), get_dataset_names(),
get_vector_data_ranges(),
deal_II_intermediate_flags, out);
}
template <int dim, int spacedim>
XDMFEntry DataOutInterface<dim,spacedim>::
create_xdmf_entry (const DataOutBase::DataOutFilter &data_filter,
const std::string &h5_filename, const double cur_time, MPI_Comm comm) const
{
return create_xdmf_entry(data_filter, h5_filename, h5_filename, cur_time, comm);
}
template <int dim, int spacedim>
XDMFEntry DataOutInterface<dim,spacedim>::
create_xdmf_entry (const DataOutBase::DataOutFilter &data_filter,
const std::string &h5_mesh_filename,
const std::string &h5_solution_filename,
const double cur_time,
MPI_Comm comm) const
{
unsigned int local_node_cell_count[2], global_node_cell_count[2];
int myrank;
#ifndef DEAL_II_WITH_HDF5
// throw an exception, but first make
// sure the compiler does not warn about
// the now unused function arguments
(void)data_filter;
(void)h5_mesh_filename;
(void)h5_solution_filename;
(void)cur_time;
(void)comm;
AssertThrow(false, ExcMessage ("XDMF support requires HDF5 to be turned on."));
#endif
AssertThrow(dim == 2 || dim == 3, ExcMessage ("XDMF only supports 2 or 3 dimensions."));
local_node_cell_count[0] = data_filter.n_nodes();
local_node_cell_count[1] = data_filter.n_cells();
// And compute the global total
#ifdef DEAL_II_WITH_MPI
MPI_Comm_rank(comm, &myrank);
MPI_Allreduce(local_node_cell_count, global_node_cell_count, 2, MPI_UNSIGNED, MPI_SUM, comm);
#else
myrank = 0;
global_node_cell_count[0] = local_node_cell_count[0];
global_node_cell_count[1] = local_node_cell_count[1];
#endif
// Output the XDMF file only on the root process
if (myrank == 0)
{
XDMFEntry entry(h5_mesh_filename, h5_solution_filename, cur_time, global_node_cell_count[0], global_node_cell_count[1], dim);
unsigned int n_data_sets = data_filter.n_data_sets();
// The vector names generated here must match those generated in the HDF5 file
unsigned int i;
for (i=0; i<n_data_sets; ++i)
{
entry.add_attribute(data_filter.get_data_set_name(i), data_filter.get_data_set_dim(i));
}
return entry;
}
else
{
return XDMFEntry();
}
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::
write_xdmf_file (const std::vector<XDMFEntry> &entries,
const std::string &filename,
MPI_Comm comm) const
{
int myrank;
#ifdef DEAL_II_WITH_MPI
MPI_Comm_rank(comm, &myrank);
#else
(void)comm;
myrank = 0;
#endif
// Only rank 0 process writes the XDMF file
if (myrank == 0)
{
std::ofstream xdmf_file(filename.c_str());
std::vector<XDMFEntry>::const_iterator it;
xdmf_file << "<?xml version=\"1.0\" ?>\n";
xdmf_file << "<!DOCTYPE Xdmf SYSTEM \"Xdmf.dtd\" []>\n";
xdmf_file << "<Xdmf Version=\"2.0\">\n";
xdmf_file << " <Domain>\n";
xdmf_file << " <Grid Name=\"CellTime\" GridType=\"Collection\" CollectionType=\"Temporal\">\n";
// Write out all the entries indented
for (it=entries.begin(); it!=entries.end(); ++it)
xdmf_file << it->get_xdmf_content(3);
xdmf_file << " </Grid>\n";
xdmf_file << " </Domain>\n";
xdmf_file << "</Xdmf>\n";
xdmf_file.close();
}
}
/*
* Get the XDMF content associated with this entry.
* If the entry is not valid, this returns an empty string.
*/
std::string XDMFEntry::get_xdmf_content(const unsigned int indent_level) const
{
std::stringstream ss;
std::map<std::string, unsigned int>::const_iterator it;
if (!valid) return "";
ss << indent(indent_level+0) << "<Grid Name=\"mesh\" GridType=\"Uniform\">\n";
ss << indent(indent_level+1) << "<Time Value=\"" << entry_time << "\"/>\n";
ss << indent(indent_level+1) << "<Geometry GeometryType=\"" << (dimension == 2 ? "XY" : "XYZ" ) << "\">\n";
ss << indent(indent_level+2) << "<DataItem Dimensions=\"" << num_nodes << " " << dimension << "\" NumberType=\"Float\" Precision=\"8\" Format=\"HDF\">\n";
ss << indent(indent_level+3) << h5_mesh_filename << ":/nodes\n";
ss << indent(indent_level+2) << "</DataItem>\n";
ss << indent(indent_level+1) << "</Geometry>\n";
// If we have cells defined, use a quadrilateral (2D) or hexahedron (3D) topology
if (num_cells > 0)
{
ss << indent(indent_level+1) << "<Topology TopologyType=\"" << (dimension == 2 ? "Quadrilateral" : "Hexahedron") << "\" NumberOfElements=\"" << num_cells << "\">\n";
ss << indent(indent_level+2) << "<DataItem Dimensions=\"" << num_cells << " " << (2 << (dimension-1)) << "\" NumberType=\"UInt\" Format=\"HDF\">\n";
ss << indent(indent_level+3) << h5_mesh_filename << ":/cells\n";
ss << indent(indent_level+2) << "</DataItem>\n";
ss << indent(indent_level+1) << "</Topology>\n";
}
else
{
// Otherwise, we assume the points are isolated in space and use a Polyvertex topology
ss << indent(indent_level+1) << "<Topology TopologyType=\"Polyvertex\" NumberOfElements=\"" << num_nodes << "\">\n";
ss << indent(indent_level+1) << "</Topology>\n";
}
for (it=attribute_dims.begin(); it!=attribute_dims.end(); ++it)
{
ss << indent(indent_level+1) << "<Attribute Name=\"" << it->first << "\" AttributeType=\"" << (it->second > 1 ? "Vector" : "Scalar") << "\" Center=\"Node\">\n";
// Vectors must have 3 elements even for 2D models
ss << indent(indent_level+2) << "<DataItem Dimensions=\"" << num_nodes << " " << (it->second > 1 ? 3 : 1) << "\" NumberType=\"Float\" Precision=\"8\" Format=\"HDF\">\n";
ss << indent(indent_level+3) << h5_sol_filename << ":/" << it->first << "\n";
ss << indent(indent_level+2) << "</DataItem>\n";
ss << indent(indent_level+1) << "</Attribute>\n";
}
ss << indent(indent_level+0) << "</Grid>\n";
return ss.str();
}
/*
* Write the data in this DataOutInterface to a DataOutFilter object.
* Filtering is performed based on the DataOutFilter flags.
*/
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::
write_filtered_data (DataOutBase::DataOutFilter &filtered_data) const
{
DataOutBase::write_filtered_data(get_patches(), get_dataset_names(),
get_vector_data_ranges(),
filtered_data);
}
template <int dim, int spacedim>
void DataOutBase::write_filtered_data (const std::vector<Patch<dim,spacedim> > &patches,
const std::vector<std::string> &data_names,
const std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > &vector_data_ranges,
DataOutBase::DataOutFilter &filtered_data)
{
const unsigned int n_data_sets = data_names.size();
unsigned int n_node, n_cell;
Table<2,double> data_vectors;
Threads::Task<> reorder_task;
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (patches.size() > 0, ExcNoPatches());
#endif
compute_sizes<dim,spacedim>(patches, n_node, n_cell);
data_vectors = Table<2,double> (n_data_sets, n_node);
void (*fun_ptr) (const std::vector<Patch<dim,spacedim> > &, Table<2,double> &) = &DataOutBase::template write_gmv_reorder_data_vectors<dim,spacedim>;
reorder_task = Threads::new_task (fun_ptr, patches, data_vectors);
// Write the nodes/cells to the DataOutFilter object.
write_nodes(patches, filtered_data);
write_cells(patches, filtered_data);
// Ensure reordering is done before we output data set values
reorder_task.join ();
// when writing, first write out
// all vector data, then handle the
// scalar data sets that have been
// left over
unsigned int i, n_th_vector, data_set, pt_data_vector_dim;
std::string vector_name;
for (n_th_vector=0,data_set=0; data_set<n_data_sets;)
{
// Advance n_th_vector to at least the current data set we are on
while (n_th_vector < vector_data_ranges.size() && std_cxx11::get<0>(vector_data_ranges[n_th_vector]) < data_set) n_th_vector++;
// Determine the dimension of this data
if (n_th_vector < vector_data_ranges.size() && std_cxx11::get<0>(vector_data_ranges[n_th_vector]) == data_set)
{
// Multiple dimensions
pt_data_vector_dim = std_cxx11::get<1>(vector_data_ranges[n_th_vector]) - std_cxx11::get<0>(vector_data_ranges[n_th_vector])+1;
// Ensure the dimensionality of the data is correct
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) >= std_cxx11::get<0>(vector_data_ranges[n_th_vector]),
ExcLowerRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]), std_cxx11::get<0>(vector_data_ranges[n_th_vector])));
AssertThrow (std_cxx11::get<1>(vector_data_ranges[n_th_vector]) < n_data_sets,
ExcIndexRange (std_cxx11::get<1>(vector_data_ranges[n_th_vector]), 0, n_data_sets));
// Determine the vector name
// Concatenate all the
// component names with double
// underscores unless a vector
// name has been specified
if (std_cxx11::get<2>(vector_data_ranges[n_th_vector]) != "")
{
vector_name = std_cxx11::get<2>(vector_data_ranges[n_th_vector]);
}
else
{
vector_name = "";
for (i=std_cxx11::get<0>(vector_data_ranges[n_th_vector]); i<std_cxx11::get<1>(vector_data_ranges[n_th_vector]); ++i)
vector_name += data_names[i] + "__";
vector_name += data_names[std_cxx11::get<1>(vector_data_ranges[n_th_vector])];
}
}
else
{
// One dimension
pt_data_vector_dim = 1;
vector_name = data_names[data_set];
}
// Write data to the filter object
filtered_data.write_data_set(vector_name, pt_data_vector_dim, data_set, data_vectors);
// Advance the current data set
data_set += pt_data_vector_dim;
}
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::
write_hdf5_parallel (const DataOutBase::DataOutFilter &data_filter,
const std::string &filename, MPI_Comm comm) const
{
DataOutBase::write_hdf5_parallel(get_patches(), data_filter, filename, comm);
}
template <int dim, int spacedim>
void DataOutInterface<dim,spacedim>::
write_hdf5_parallel (const DataOutBase::DataOutFilter &data_filter,
const bool write_mesh_file, const std::string &mesh_filename, const std::string &solution_filename, MPI_Comm comm) const
{
DataOutBase::write_hdf5_parallel(get_patches(), data_filter, write_mesh_file, mesh_filename, solution_filename, comm);
}
template <int dim, int spacedim>
void DataOutBase::write_hdf5_parallel (const std::vector<Patch<dim,spacedim> > &patches,
const DataOutBase::DataOutFilter &data_filter,
const std::string &filename,
MPI_Comm comm)
{
write_hdf5_parallel(patches, data_filter, true, filename, filename, comm);
}
template <int dim, int spacedim>
void DataOutBase::write_hdf5_parallel (const std::vector<Patch<dim,spacedim> > &/*patches*/,
const DataOutBase::DataOutFilter &data_filter,
const bool write_mesh_file,
const std::string &mesh_filename,
const std::string &solution_filename,
MPI_Comm comm)
{
#ifndef DEAL_II_WITH_HDF5
// throw an exception, but first make
// sure the compiler does not warn about
// the now unused function arguments
(void)data_filter;
(void)write_mesh_file;
(void)mesh_filename;
(void)solution_filename;
(void)comm;
AssertThrow(false, ExcMessage ("HDF5 support is disabled."));
#else
#ifndef DEAL_II_WITH_MPI
// verify that there are indeed
// patches to be written out. most
// of the times, people just forget
// to call build_patches when there
// are no patches, so a warning is
// in order. that said, the
// assertion is disabled if we
// support MPI since then it can
// happen that on the coarsest
// mesh, a processor simply has no
// cells it actually owns, and in
// that case it is legit if there
// are no patches
Assert (data_filter.n_nodes() > 0, ExcNoPatches());
#else
hid_t h5_mesh_file_id=-1, h5_solution_file_id, file_plist_id, plist_id;
hid_t node_dataspace, node_dataset, node_file_dataspace, node_memory_dataspace;
hid_t cell_dataspace, cell_dataset, cell_file_dataspace, cell_memory_dataspace;
hid_t pt_data_dataspace, pt_data_dataset, pt_data_file_dataspace, pt_data_memory_dataspace;
herr_t status;
unsigned int local_node_cell_count[2], global_node_cell_count[2], global_node_cell_offsets[2];
hsize_t count[2], offset[2], node_ds_dim[2], cell_ds_dim[2];
std::vector<double> node_data_vec;
std::vector<unsigned int> cell_data_vec;
// If HDF5 is not parallel and we're using multiple processes, abort
#ifndef H5_HAVE_PARALLEL
# ifdef DEAL_II_WITH_MPI
int world_size;
MPI_Comm_size(comm, &world_size);
AssertThrow (world_size <= 1,
ExcMessage ("Serial HDF5 output on multiple processes is not yet supported."));
# endif
#endif
local_node_cell_count[0] = data_filter.n_nodes();
local_node_cell_count[1] = data_filter.n_cells();
// Create file access properties
file_plist_id = H5Pcreate(H5P_FILE_ACCESS);
AssertThrow(file_plist_id != -1, ExcIO());
// If MPI is enabled *and* HDF5 is parallel, we can do parallel output
#ifdef DEAL_II_WITH_MPI
#ifdef H5_HAVE_PARALLEL
// Set the access to use the specified MPI_Comm object
status = H5Pset_fapl_mpio(file_plist_id, comm, MPI_INFO_NULL);
AssertThrow(status >= 0, ExcIO());
#endif
#endif
// Compute the global total number of nodes/cells
// And determine the offset of the data for this process
#ifdef DEAL_II_WITH_MPI
MPI_Allreduce(local_node_cell_count, global_node_cell_count, 2, MPI_UNSIGNED, MPI_SUM, comm);
MPI_Scan(local_node_cell_count, global_node_cell_offsets, 2, MPI_UNSIGNED, MPI_SUM, comm);
global_node_cell_offsets[0] -= local_node_cell_count[0];
global_node_cell_offsets[1] -= local_node_cell_count[1];
#else
global_node_cell_offsets[0] = global_node_cell_offsets[1] = 0;
#endif
// Create the property list for a collective write
plist_id = H5Pcreate(H5P_DATASET_XFER);
AssertThrow(plist_id >= 0, ExcIO());
#ifdef DEAL_II_WITH_MPI
#ifdef H5_HAVE_PARALLEL
status = H5Pset_dxpl_mpio(plist_id, H5FD_MPIO_COLLECTIVE);
AssertThrow(status >= 0, ExcIO());
#endif
#endif
if (write_mesh_file)
{
// Overwrite any existing files (change this to an option?)
h5_mesh_file_id = H5Fcreate(mesh_filename.c_str(), H5F_ACC_TRUNC, H5P_DEFAULT, file_plist_id);
AssertThrow(h5_mesh_file_id >= 0, ExcIO());
// Create the dataspace for the nodes and cells
node_ds_dim[0] = global_node_cell_count[0];
node_ds_dim[1] = dim;
node_dataspace = H5Screate_simple(2, node_ds_dim, NULL);
AssertThrow(node_dataspace >= 0, ExcIO());
cell_ds_dim[0] = global_node_cell_count[1];
cell_ds_dim[1] = GeometryInfo<dim>::vertices_per_cell;
cell_dataspace = H5Screate_simple(2, cell_ds_dim, NULL);
AssertThrow(cell_dataspace >= 0, ExcIO());
// Create the dataset for the nodes and cells
#if H5Gcreate_vers == 1
node_dataset = H5Dcreate(h5_mesh_file_id, "nodes", H5T_NATIVE_DOUBLE, node_dataspace, H5P_DEFAULT);
#else
node_dataset = H5Dcreate(h5_mesh_file_id, "nodes", H5T_NATIVE_DOUBLE, node_dataspace, H5P_DEFAULT, H5P_DEFAULT, H5P_DEFAULT);
#endif
AssertThrow(node_dataset >= 0, ExcIO());
#if H5Gcreate_vers == 1
cell_dataset = H5Dcreate(h5_mesh_file_id, "cells", H5T_NATIVE_UINT, cell_dataspace, H5P_DEFAULT);
#else
cell_dataset = H5Dcreate(h5_mesh_file_id, "cells", H5T_NATIVE_UINT, cell_dataspace, H5P_DEFAULT, H5P_DEFAULT, H5P_DEFAULT);
#endif
AssertThrow(cell_dataset >= 0, ExcIO());
// Close the node and cell dataspaces since we're done with them
status = H5Sclose(node_dataspace);
AssertThrow(status >= 0, ExcIO());
status = H5Sclose(cell_dataspace);
AssertThrow(status >= 0, ExcIO());
// Create the data subset we'll use to read from memory
count[0] = local_node_cell_count[0];
count[1] = dim;
offset[0] = global_node_cell_offsets[0];
offset[1] = 0;
node_memory_dataspace = H5Screate_simple(2, count, NULL);
AssertThrow(node_memory_dataspace >= 0, ExcIO());
// Select the hyperslab in the file
node_file_dataspace = H5Dget_space(node_dataset);
AssertThrow(node_file_dataspace >= 0, ExcIO());
status = H5Sselect_hyperslab(node_file_dataspace, H5S_SELECT_SET, offset, NULL, count, NULL);
AssertThrow(status >= 0, ExcIO());
// And repeat for cells
count[0] = local_node_cell_count[1];
count[1] = GeometryInfo<dim>::vertices_per_cell;
offset[0] = global_node_cell_offsets[1];
offset[1] = 0;
cell_memory_dataspace = H5Screate_simple(2, count, NULL);
AssertThrow(cell_memory_dataspace >= 0, ExcIO());
cell_file_dataspace = H5Dget_space(cell_dataset);
AssertThrow(cell_file_dataspace >= 0, ExcIO());
status = H5Sselect_hyperslab(cell_file_dataspace, H5S_SELECT_SET, offset, NULL, count, NULL);
AssertThrow(status >= 0, ExcIO());
// And finally, write the node data
data_filter.fill_node_data(node_data_vec);
status = H5Dwrite(node_dataset, H5T_NATIVE_DOUBLE, node_memory_dataspace, node_file_dataspace, plist_id, &node_data_vec[0]);
AssertThrow(status >= 0, ExcIO());
node_data_vec.clear();
// And the cell data
data_filter.fill_cell_data(global_node_cell_offsets[0], cell_data_vec);
status = H5Dwrite(cell_dataset, H5T_NATIVE_UINT, cell_memory_dataspace, cell_file_dataspace, plist_id, &cell_data_vec[0]);
AssertThrow(status >= 0, ExcIO());
cell_data_vec.clear();
// Close the file dataspaces
status = H5Sclose(node_file_dataspace);
AssertThrow(status >= 0, ExcIO());
status = H5Sclose(cell_file_dataspace);
AssertThrow(status >= 0, ExcIO());
// Close the memory dataspaces
status = H5Sclose(node_memory_dataspace);
AssertThrow(status >= 0, ExcIO());
status = H5Sclose(cell_memory_dataspace);
AssertThrow(status >= 0, ExcIO());
// Close the datasets
status = H5Dclose(node_dataset);
AssertThrow(status >= 0, ExcIO());
status = H5Dclose(cell_dataset);
AssertThrow(status >= 0, ExcIO());
// If the filenames are different, we need to close the mesh file
if (mesh_filename != solution_filename)
{
status = H5Fclose(h5_mesh_file_id);
AssertThrow(status >= 0, ExcIO());
}
}
// If the filenames are identical, continue with the same file
if (mesh_filename == solution_filename && write_mesh_file)
{
h5_solution_file_id = h5_mesh_file_id;
}
else
{
// Otherwise we need to open a new file
h5_solution_file_id = H5Fcreate(solution_filename.c_str(), H5F_ACC_TRUNC, H5P_DEFAULT, file_plist_id);
AssertThrow(h5_solution_file_id >= 0, ExcIO());
}
// when writing, first write out
// all vector data, then handle the
// scalar data sets that have been
// left over
unsigned int i, pt_data_vector_dim;
std::string vector_name;
for (i=0; i<data_filter.n_data_sets(); ++i)
{
// Allocate space for the point data
// Must be either 1D or 3D
pt_data_vector_dim = data_filter.get_data_set_dim(i);
vector_name = data_filter.get_data_set_name(i);
// Create the dataspace for the point data
node_ds_dim[0] = global_node_cell_count[0];
node_ds_dim[1] = pt_data_vector_dim;
pt_data_dataspace = H5Screate_simple(2, node_ds_dim, NULL);
AssertThrow(pt_data_dataspace >= 0, ExcIO());
#if H5Gcreate_vers == 1
pt_data_dataset = H5Dcreate(h5_solution_file_id, vector_name.c_str(), H5T_NATIVE_DOUBLE, pt_data_dataspace, H5P_DEFAULT);
#else
pt_data_dataset = H5Dcreate(h5_solution_file_id, vector_name.c_str(), H5T_NATIVE_DOUBLE, pt_data_dataspace, H5P_DEFAULT, H5P_DEFAULT, H5P_DEFAULT);
#endif
AssertThrow(pt_data_dataset >= 0, ExcIO());
// Create the data subset we'll use to read from memory
count[0] = local_node_cell_count[0];
count[1] = pt_data_vector_dim;
offset[0] = global_node_cell_offsets[0];
offset[1] = 0;
pt_data_memory_dataspace = H5Screate_simple(2, count, NULL);
AssertThrow(pt_data_memory_dataspace >= 0, ExcIO());
// Select the hyperslab in the file
pt_data_file_dataspace = H5Dget_space(pt_data_dataset);
AssertThrow(pt_data_file_dataspace >= 0, ExcIO());
status = H5Sselect_hyperslab(pt_data_file_dataspace, H5S_SELECT_SET, offset, NULL, count, NULL);
AssertThrow(status >= 0, ExcIO());
// And finally, write the data
status = H5Dwrite(pt_data_dataset, H5T_NATIVE_DOUBLE, pt_data_memory_dataspace, pt_data_file_dataspace, plist_id, data_filter.get_data_set(i));
AssertThrow(status >= 0, ExcIO());
// Close the dataspaces
status = H5Sclose(pt_data_dataspace);
AssertThrow(status >= 0, ExcIO());
status = H5Sclose(pt_data_memory_dataspace);
AssertThrow(status >= 0, ExcIO());
status = H5Sclose(pt_data_file_dataspace);
AssertThrow(status >= 0, ExcIO());
// Close the dataset
status = H5Dclose(pt_data_dataset);
AssertThrow(status >= 0, ExcIO());
}
// Close the file property list
status = H5Pclose(file_plist_id);
AssertThrow(status >= 0, ExcIO());
// Close the parallel access
status = H5Pclose(plist_id);
AssertThrow(status >= 0, ExcIO());
// Close the file
status = H5Fclose(h5_solution_file_id);
AssertThrow(status >= 0, ExcIO());
#endif
#endif
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::write (std::ostream &out,
const DataOutBase::OutputFormat output_format_) const
{
DataOutBase::OutputFormat output_format = output_format_;
if (output_format == DataOutBase::default_format)
output_format = default_fmt;
switch (output_format)
{
case DataOutBase::none:
break;
case DataOutBase::dx:
write_dx (out);
break;
case DataOutBase::ucd:
write_ucd (out);
break;
case DataOutBase::gnuplot:
write_gnuplot (out);
break;
case DataOutBase::povray:
write_povray (out);
break;
case DataOutBase::eps:
write_eps (out);
break;
case DataOutBase::gmv:
write_gmv (out);
break;
case DataOutBase::tecplot:
write_tecplot (out);
break;
case DataOutBase::tecplot_binary:
write_tecplot_binary (out);
break;
case DataOutBase::vtk:
write_vtk (out);
break;
case DataOutBase::vtu:
write_vtu (out);
break;
case DataOutBase::svg:
write_svg (out);
break;
case DataOutBase::deal_II_intermediate:
write_deal_II_intermediate (out);
break;
default:
Assert (false, ExcNotImplemented());
}
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_default_format(const DataOutBase::OutputFormat fmt)
{
Assert (fmt != DataOutBase::default_format, ExcNotImplemented());
default_fmt = fmt;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::DXFlags &flags)
{
dx_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::UcdFlags &flags)
{
ucd_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::GnuplotFlags &flags)
{
gnuplot_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::PovrayFlags &flags)
{
povray_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::EpsFlags &flags)
{
eps_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::GmvFlags &flags)
{
gmv_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::TecplotFlags &flags)
{
tecplot_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::VtkFlags &flags)
{
vtk_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::SvgFlags &flags)
{
svg_flags = flags;
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::set_flags (const DataOutBase::Deal_II_IntermediateFlags &flags)
{
deal_II_intermediate_flags = flags;
}
template <int dim, int spacedim>
std::string
DataOutInterface<dim,spacedim>::
default_suffix (const DataOutBase::OutputFormat output_format) const
{
if (output_format == DataOutBase::default_format)
return DataOutBase::default_suffix (default_fmt);
else
return DataOutBase::default_suffix (output_format);
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::declare_parameters (ParameterHandler &prm)
{
prm.declare_entry ("Output format", "gnuplot",
Patterns::Selection (DataOutBase::get_output_format_names ()),
"A name for the output format to be used");
prm.declare_entry("Subdivisions", "1", Patterns::Integer(),
"Number of subdivisions of each mesh cell");
prm.enter_subsection ("DX output parameters");
DataOutBase::DXFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("UCD output parameters");
DataOutBase::UcdFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Gnuplot output parameters");
DataOutBase::GnuplotFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Povray output parameters");
DataOutBase::PovrayFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Eps output parameters");
DataOutBase::EpsFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Gmv output parameters");
DataOutBase::GmvFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Tecplot output parameters");
DataOutBase::TecplotFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Vtk output parameters");
DataOutBase::VtkFlags::declare_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("deal.II intermediate output parameters");
DataOutBase::Deal_II_IntermediateFlags::declare_parameters (prm);
prm.leave_subsection ();
}
template <int dim, int spacedim>
void
DataOutInterface<dim,spacedim>::parse_parameters (ParameterHandler &prm)
{
const std::string &output_name = prm.get ("Output format");
default_fmt = DataOutBase::parse_output_format (output_name);
default_subdivisions = prm.get_integer ("Subdivisions");
prm.enter_subsection ("DX output parameters");
dx_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("UCD output parameters");
ucd_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Gnuplot output parameters");
gnuplot_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Povray output parameters");
povray_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Eps output parameters");
eps_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Gmv output parameters");
gmv_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Tecplot output parameters");
tecplot_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("Vtk output parameters");
vtk_flags.parse_parameters (prm);
prm.leave_subsection ();
prm.enter_subsection ("deal.II intermediate output parameters");
deal_II_intermediate_flags.parse_parameters (prm);
prm.leave_subsection ();
}
template <int dim, int spacedim>
std::size_t
DataOutInterface<dim,spacedim>::memory_consumption () const
{
return (sizeof (default_fmt) +
MemoryConsumption::memory_consumption (dx_flags) +
MemoryConsumption::memory_consumption (ucd_flags) +
MemoryConsumption::memory_consumption (gnuplot_flags) +
MemoryConsumption::memory_consumption (povray_flags) +
MemoryConsumption::memory_consumption (eps_flags) +
MemoryConsumption::memory_consumption (gmv_flags) +
MemoryConsumption::memory_consumption (tecplot_flags) +
MemoryConsumption::memory_consumption (vtk_flags) +
MemoryConsumption::memory_consumption (svg_flags) +
MemoryConsumption::memory_consumption (deal_II_intermediate_flags));
}
template <int dim, int spacedim>
std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> >
DataOutInterface<dim,spacedim>::get_vector_data_ranges () const
{
return std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> >();
}
// ---------------------------------------------- DataOutReader ----------
template <int dim, int spacedim>
void
DataOutReader<dim,spacedim>::read (std::istream &in)
{
AssertThrow (in, ExcIO());
// first empty previous content
{
std::vector<typename dealii::DataOutBase::Patch<dim,spacedim> >
tmp;
tmp.swap (patches);
}
{
std::vector<std::string> tmp;
tmp.swap (dataset_names);
}
{
std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> > tmp;
tmp.swap (vector_data_ranges);
}
// then check that we have the
// correct header of this
// file. both the first and second
// real lines have to match, as
// well as the dimension
// information written before that
// and the Version information
// written in the third line
{
std::pair<unsigned int, unsigned int>
dimension_info
= DataOutBase::determine_intermediate_format_dimensions (in);
AssertThrow ((dimension_info.first == dim) &&
(dimension_info.second == spacedim),
ExcIncompatibleDimensions (dimension_info.first, dim,
dimension_info.second, spacedim));
// read to the end of the line
std::string tmp;
getline (in, tmp);
}
{
std::string header;
getline (in, header);
std::ostringstream s;
s << "[deal.II intermediate format graphics data]";
Assert (header == s.str(), ExcUnexpectedInput(s.str(),header));
}
{
std::string header;
getline (in, header);
std::ostringstream s;
s << "[written by " << DEAL_II_PACKAGE_NAME << " " << DEAL_II_PACKAGE_VERSION << "]";
Assert (header == s.str(), ExcUnexpectedInput(s.str(),header));
}
{
std::string header;
getline (in, header);
std::ostringstream s;
s << "[Version: " << dealii::DataOutBase::Deal_II_IntermediateFlags::format_version << "]";
Assert (header == s.str(),
ExcMessage("Invalid or incompatible file format. Intermediate format "
"files can only be read by the same deal.II version as they "
"are written by."));
}
// then read the rest of the data
unsigned int n_datasets;
in >> n_datasets;
dataset_names.resize (n_datasets);
for (unsigned int i=0; i<n_datasets; ++i)
in >> dataset_names[i];
unsigned int n_patches;
in >> n_patches;
patches.resize (n_patches);
for (unsigned int i=0; i<n_patches; ++i)
in >> patches[i];
unsigned int n_vector_data_ranges;
in >> n_vector_data_ranges;
vector_data_ranges.resize (n_vector_data_ranges);
for (unsigned int i=0; i<n_vector_data_ranges; ++i)
{
in >> std_cxx11::get<0>(vector_data_ranges[i])
>> std_cxx11::get<1>(vector_data_ranges[i]);
// read in the name of that vector
// range. because it is on a separate
// line, we first need to read to the
// end of the previous line (nothing
// should be there any more after we've
// read the previous two integers) and
// then read the entire next line for
// the name
std::string name;
getline(in, name);
getline(in, name);
std_cxx11::get<2>(vector_data_ranges[i]) = name;
}
AssertThrow (in, ExcIO());
}
template <int dim, int spacedim>
void
DataOutReader<dim,spacedim>::
merge (const DataOutReader<dim,spacedim> &source)
{
typedef typename dealii::DataOutBase::Patch<dim,spacedim> Patch;
const std::vector<Patch> source_patches = source.get_patches ();
Assert (patches.size () != 0, ExcNoPatches ());
Assert (source_patches.size () != 0, ExcNoPatches ());
// check equality of component
// names
Assert (get_dataset_names() == source.get_dataset_names(),
ExcIncompatibleDatasetNames());
// check equality of the vector data
// specifications
Assert (get_vector_data_ranges().size() ==
source.get_vector_data_ranges().size(),
ExcMessage ("Both sources need to declare the same components "
"as vectors."));
for (unsigned int i=0; i<get_vector_data_ranges().size(); ++i)
{
Assert (std_cxx11::get<0>(get_vector_data_ranges()[i]) ==
std_cxx11::get<0>(source.get_vector_data_ranges()[i]),
ExcMessage ("Both sources need to declare the same components "
"as vectors."));
Assert (std_cxx11::get<1>(get_vector_data_ranges()[i]) ==
std_cxx11::get<1>(source.get_vector_data_ranges()[i]),
ExcMessage ("Both sources need to declare the same components "
"as vectors."));
Assert (std_cxx11::get<2>(get_vector_data_ranges()[i]) ==
std_cxx11::get<2>(source.get_vector_data_ranges()[i]),
ExcMessage ("Both sources need to declare the same components "
"as vectors."));
}
// make sure patches are compatible
Assert (patches[0].n_subdivisions == source_patches[0].n_subdivisions,
ExcIncompatiblePatchLists());
Assert (patches[0].data.n_rows() == source_patches[0].data.n_rows(),
ExcIncompatiblePatchLists());
Assert (patches[0].data.n_cols() == source_patches[0].data.n_cols(),
ExcIncompatiblePatchLists());
// merge patches. store old number
// of elements, since we need to
// adjust patch numbers, etc
// afterwards
const unsigned int old_n_patches = patches.size();
patches.insert (patches.end(),
source_patches.begin(),
source_patches.end());
// adjust patch numbers
for (unsigned int i=old_n_patches; i<patches.size(); ++i)
patches[i].patch_index += old_n_patches;
// adjust patch neighbors
for (unsigned int i=old_n_patches; i<patches.size(); ++i)
for (unsigned int n=0; n<GeometryInfo<dim>::faces_per_cell; ++n)
if (patches[i].neighbors[n] != dealii::DataOutBase::Patch<dim,spacedim>::no_neighbor)
patches[i].neighbors[n] += old_n_patches;
}
template <int dim, int spacedim>
const std::vector<typename dealii::DataOutBase::Patch<dim,spacedim> > &
DataOutReader<dim,spacedim>::get_patches () const
{
return patches;
}
template <int dim, int spacedim>
std::vector<std::string>
DataOutReader<dim,spacedim>::get_dataset_names () const
{
return dataset_names;
}
template <int dim, int spacedim>
std::vector<std_cxx11::tuple<unsigned int, unsigned int, std::string> >
DataOutReader<dim,spacedim>::get_vector_data_ranges () const
{
return vector_data_ranges;
}
namespace DataOutBase
{
template <int dim, int spacedim>
std::ostream &
operator << (std::ostream &out,
const Patch<dim,spacedim> &patch)
{
// write a header line
out << "[deal.II intermediate Patch<" << dim << ',' << spacedim << ">]"
<< '\n';
// then write all the data that is
// in this patch
for (unsigned int i=0; i<GeometryInfo<dim>::vertices_per_cell; ++i)
out << patch.vertices[GeometryInfo<dim>::ucd_to_deal[i]] << ' ';
out << '\n';
for (unsigned int i=0; i<GeometryInfo<dim>::faces_per_cell; ++i)
out << patch.neighbors[i] << ' ';
out << '\n';
out << patch.patch_index << ' ' << patch.n_subdivisions
<< '\n';
out << patch.points_are_available<<'\n';
out << patch.data.n_rows() << ' ' << patch.data.n_cols() << '\n';
for (unsigned int i=0; i<patch.data.n_rows(); ++i)
for (unsigned int j=0; j<patch.data.n_cols(); ++j)
out << patch.data[i][j] << ' ';
out << '\n';
out << '\n';
return out;
}
template <int dim, int spacedim>
std::istream &
operator >> (std::istream &in,
Patch<dim,spacedim> &patch)
{
AssertThrow (in, ExcIO());
// read a header line and compare
// it to what we usually
// write. skip all lines that
// contain only blanks at the start
{
std::string header;
do
{
getline (in, header);
while ((header.size() != 0) &&
(header[header.size()-1] == ' '))
header.erase(header.size()-1);
}
while ((header == "") && in);
std::ostringstream s;
s << "[deal.II intermediate Patch<" << dim << ',' << spacedim << ">]";
Assert (header == s.str(), ExcUnexpectedInput(s.str(),header));
}
// then read all the data that is
// in this patch
for (unsigned int i=0; i<GeometryInfo<dim>::vertices_per_cell; ++i)
in >> patch.vertices[GeometryInfo<dim>::ucd_to_deal[i]];
for (unsigned int i=0; i<GeometryInfo<dim>::faces_per_cell; ++i)
in >> patch.neighbors[i];
in >> patch.patch_index >> patch.n_subdivisions;
in >> patch.points_are_available;
unsigned int n_rows, n_cols;
in >> n_rows >> n_cols;
patch.data.reinit (n_rows, n_cols);
for (unsigned int i=0; i<patch.data.n_rows(); ++i)
for (unsigned int j=0; j<patch.data.n_cols(); ++j)
in >> patch.data[i][j];
AssertThrow (in, ExcIO());
return in;
}
}
// explicit instantiations
#include "data_out_base.inst"
DEAL_II_NAMESPACE_CLOSE
| Java |
/****************************************************************************
**
** Copyright (C) 2013 Digia Plc and/or its subsidiary(-ies).
** Contact: http://www.qt-project.org/legal
**
** This file is part of Qt Creator.
**
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Digia. For licensing terms and
** conditions see http://qt.digia.com/licensing. For further information
** use the contact form at http://qt.digia.com/contact-us.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Digia gives you certain additional
** rights. These rights are described in the Digia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
****************************************************************************/
#include "subdirsprojectwizard.h"
#include "subdirsprojectwizarddialog.h"
#include <projectexplorer/projectexplorerconstants.h>
#include <coreplugin/icore.h>
#include <QIcon>
namespace Qt4ProjectManager {
namespace Internal {
SubdirsProjectWizard::SubdirsProjectWizard()
: QtWizard(QLatin1String("U.Qt4Subdirs"),
QLatin1String(ProjectExplorer::Constants::QT_PROJECT_WIZARD_CATEGORY),
QLatin1String(ProjectExplorer::Constants::QT_PROJECT_WIZARD_CATEGORY_DISPLAY),
tr("Subdirs Project"),
tr("Creates a qmake-based subdirs project. This allows you to group "
"your projects in a tree structure."),
QIcon(QLatin1String(":/wizards/images/gui.png")))
{
}
QWizard *SubdirsProjectWizard::createWizardDialog(QWidget *parent,
const Core::WizardDialogParameters &wizardDialogParameters) const
{
SubdirsProjectWizardDialog *dialog = new SubdirsProjectWizardDialog(displayName(), icon(), parent, wizardDialogParameters);
dialog->setProjectName(SubdirsProjectWizardDialog::uniqueProjectName(wizardDialogParameters.defaultPath()));
const QString buttonText = dialog->wizardStyle() == QWizard::MacStyle
? tr("Done && Add Subproject") : tr("Finish && Add Subproject");
dialog->setButtonText(QWizard::FinishButton, buttonText);
return dialog;
}
Core::GeneratedFiles SubdirsProjectWizard::generateFiles(const QWizard *w,
QString * /*errorMessage*/) const
{
const SubdirsProjectWizardDialog *wizard = qobject_cast< const SubdirsProjectWizardDialog *>(w);
const QtProjectParameters params = wizard->parameters();
const QString projectPath = params.projectPath();
const QString profileName = Core::BaseFileWizard::buildFileName(projectPath, params.fileName, profileSuffix());
Core::GeneratedFile profile(profileName);
profile.setAttributes(Core::GeneratedFile::OpenProjectAttribute | Core::GeneratedFile::OpenEditorAttribute);
profile.setContents(QLatin1String("TEMPLATE = subdirs\n"));
return Core::GeneratedFiles() << profile;
}
bool SubdirsProjectWizard::postGenerateFiles(const QWizard *w, const Core::GeneratedFiles &files, QString *errorMessage)
{
const SubdirsProjectWizardDialog *wizard = qobject_cast< const SubdirsProjectWizardDialog *>(w);
if (QtWizard::qt4ProjectPostGenerateFiles(wizard, files, errorMessage)) {
const QtProjectParameters params = wizard->parameters();
const QString projectPath = params.projectPath();
const QString profileName = Core::BaseFileWizard::buildFileName(projectPath, params.fileName, profileSuffix());
QVariantMap map;
map.insert(QLatin1String(ProjectExplorer::Constants::PREFERED_PROJECT_NODE), profileName);
map.insert(QLatin1String(ProjectExplorer::Constants::PROJECT_KIT_IDS), QVariant::fromValue(wizard->selectedKits()));
Core::ICore::showNewItemDialog(tr("New Subproject", "Title of dialog"),
Core::IWizard::wizardsOfKind(Core::IWizard::ProjectWizard),
wizard->parameters().projectPath(),
map);
} else {
return false;
}
return true;
}
Core::FeatureSet SubdirsProjectWizard::requiredFeatures() const
{
return Core::FeatureSet();
}
} // namespace Internal
} // namespace Qt4ProjectManager
| Java |
/****************************************************************************
**
** Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
** All rights reserved.
** Contact: Nokia Corporation ([email protected])
**
** This file is part of the Qt Designer of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** No Commercial Usage
** This file contains pre-release code and may not be distributed.
** You may use this file in accordance with the terms and conditions
** contained in the Technology Preview License Agreement accompanying
** this package.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Nokia gives you certain additional
** rights. These rights are described in the Nokia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** If you have questions regarding the use of this file, please contact
** Nokia at [email protected].
**
**
**
**
**
**
**
**
** $QT_END_LICENSE$
**
****************************************************************************/
#include "qdesigner_formwindow.h"
#include "qdesigner_workbench.h"
#include "formwindowbase_p.h"
// sdk
#include <QtDesigner/QDesignerFormWindowInterface>
#include <QtDesigner/QDesignerFormEditorInterface>
#include <QtDesigner/QDesignerPropertySheetExtension>
#include <QtDesigner/QDesignerPropertyEditorInterface>
#include <QtDesigner/QDesignerFormWindowManagerInterface>
#include <QtDesigner/QDesignerTaskMenuExtension>
#include <QtDesigner/QExtensionManager>
#include <QtCore/QEvent>
#include <QtCore/QFile>
#include <QtGui/QAction>
#include <QtGui/QCloseEvent>
#include <QtGui/QFileDialog>
#include <QtGui/QMessageBox>
#include <QtGui/QPushButton>
#include <QtGui/QVBoxLayout>
#include <QtGui/QUndoCommand>
#include <QtGui/QWindowStateChangeEvent>
QT_BEGIN_NAMESPACE
QDesignerFormWindow::QDesignerFormWindow(QDesignerFormWindowInterface *editor, QDesignerWorkbench *workbench, QWidget *parent, Qt::WindowFlags flags)
: QWidget(parent, flags),
m_editor(editor),
m_workbench(workbench),
m_action(new QAction(this)),
m_initialized(false),
m_windowTitleInitialized(false)
{
Q_ASSERT(workbench);
setMaximumSize(0xFFF, 0xFFF);
QDesignerFormEditorInterface *core = workbench->core();
if (m_editor) {
m_editor->setParent(this);
} else {
m_editor = core->formWindowManager()->createFormWindow(this);
}
QVBoxLayout *l = new QVBoxLayout(this);
l->setMargin(0);
l->addWidget(m_editor);
m_action->setCheckable(true);
connect(m_editor->commandHistory(), SIGNAL(indexChanged(int)), this, SLOT(updateChanged()));
connect(m_editor, SIGNAL(geometryChanged()), this, SLOT(geometryChanged()));
qdesigner_internal::FormWindowBase::setupDefaultAction(m_editor);
}
QDesignerFormWindow::~QDesignerFormWindow()
{
if (workbench())
workbench()->removeFormWindow(this);
}
QAction *QDesignerFormWindow::action() const
{
return m_action;
}
void QDesignerFormWindow::changeEvent(QEvent *e)
{
switch (e->type()) {
case QEvent::WindowTitleChange:
m_action->setText(windowTitle().remove(QLatin1String("[*]")));
break;
case QEvent::WindowIconChange:
m_action->setIcon(windowIcon());
break;
case QEvent::WindowStateChange: {
const QWindowStateChangeEvent *wsce = static_cast<const QWindowStateChangeEvent *>(e);
const bool wasMinimized = Qt::WindowMinimized & wsce->oldState();
const bool isMinimizedNow = isMinimized();
if (wasMinimized != isMinimizedNow )
emit minimizationStateChanged(m_editor, isMinimizedNow);
}
break;
default:
break;
}
QWidget::changeEvent(e);
}
QRect QDesignerFormWindow::geometryHint() const
{
const QPoint point(0, 0);
// If we have a container, we want to be just as big.
// QMdiSubWindow attempts to resize its children to sizeHint() when switching user interface modes.
if (QWidget *mainContainer = m_editor->mainContainer())
return QRect(point, mainContainer->size());
return QRect(point, sizeHint());
}
QDesignerFormWindowInterface *QDesignerFormWindow::editor() const
{
return m_editor;
}
QDesignerWorkbench *QDesignerFormWindow::workbench() const
{
return m_workbench;
}
void QDesignerFormWindow::firstShow()
{
// Set up handling of file name changes and set initial title.
if (!m_windowTitleInitialized) {
m_windowTitleInitialized = true;
if (m_editor) {
connect(m_editor, SIGNAL(fileNameChanged(QString)), this, SLOT(updateWindowTitle(QString)));
updateWindowTitle(m_editor->fileName());
}
}
show();
}
int QDesignerFormWindow::getNumberOfUntitledWindows() const
{
const int totalWindows = m_workbench->formWindowCount();
if (!totalWindows)
return 0;
int maxUntitled = 0;
// Find the number of untitled windows excluding ourselves.
// Do not fall for 'untitled.ui', match with modified place holder.
// This will cause some problems with i18n, but for now I need the string to be "static"
QRegExp rx(QLatin1String("untitled( (\\d+))?\\[\\*\\]"));
for (int i = 0; i < totalWindows; ++i) {
QDesignerFormWindow *fw = m_workbench->formWindow(i);
if (fw != this) {
const QString title = m_workbench->formWindow(i)->windowTitle();
if (rx.indexIn(title) != -1) {
if (maxUntitled == 0)
++maxUntitled;
if (rx.captureCount() > 1) {
const QString numberCapture = rx.cap(2);
if (!numberCapture.isEmpty())
maxUntitled = qMax(numberCapture.toInt(), maxUntitled);
}
}
}
}
return maxUntitled;
}
void QDesignerFormWindow::updateWindowTitle(const QString &fileName)
{
if (!m_windowTitleInitialized) {
m_windowTitleInitialized = true;
if (m_editor)
connect(m_editor, SIGNAL(fileNameChanged(QString)), this, SLOT(updateWindowTitle(QString)));
}
QString fileNameTitle;
if (fileName.isEmpty()) {
fileNameTitle = QLatin1String("untitled");
if (const int maxUntitled = getNumberOfUntitledWindows()) {
fileNameTitle += QLatin1Char(' ');
fileNameTitle += QString::number(maxUntitled + 1);
}
} else {
fileNameTitle = QFileInfo(fileName).fileName();
}
if (const QWidget *mc = m_editor->mainContainer()) {
setWindowIcon(mc->windowIcon());
setWindowTitle(tr("%1 - %2[*]").arg(mc->windowTitle()).arg(fileNameTitle));
} else {
setWindowTitle(fileNameTitle);
}
}
void QDesignerFormWindow::closeEvent(QCloseEvent *ev)
{
if (m_editor->isDirty()) {
raise();
QMessageBox box(QMessageBox::Information, tr("Save Form?"),
tr("Do you want to save the changes to this document before closing?"),
QMessageBox::Discard | QMessageBox::Cancel | QMessageBox::Save, m_editor);
box.setInformativeText(tr("If you don't save, your changes will be lost."));
box.setWindowModality(Qt::WindowModal);
static_cast<QPushButton *>(box.button(QMessageBox::Save))->setDefault(true);
switch (box.exec()) {
case QMessageBox::Save: {
bool ok = workbench()->saveForm(m_editor);
ev->setAccepted(ok);
m_editor->setDirty(!ok);
break;
}
case QMessageBox::Discard:
m_editor->setDirty(false); // Not really necessary, but stops problems if we get close again.
ev->accept();
break;
case QMessageBox::Cancel:
ev->ignore();
break;
}
}
}
void QDesignerFormWindow::updateChanged()
{
// Sometimes called after form window destruction.
if (m_editor) {
setWindowModified(m_editor->isDirty());
updateWindowTitle(m_editor->fileName());
}
}
void QDesignerFormWindow::resizeEvent(QResizeEvent *rev)
{
if(m_initialized) {
m_editor->setDirty(true);
setWindowModified(true);
}
m_initialized = true;
QWidget::resizeEvent(rev);
}
void QDesignerFormWindow::geometryChanged()
{
// If the form window changes, re-update the geometry of the current widget in the property editor.
// Note that in the case of layouts, non-maincontainer widgets must also be updated,
// so, do not do it for the main container only
const QDesignerFormEditorInterface *core = m_editor->core();
QObject *object = core->propertyEditor()->object();
if (object == 0 || !object->isWidgetType())
return;
static const QString geometryProperty = QLatin1String("geometry");
const QDesignerPropertySheetExtension *sheet = qt_extension<QDesignerPropertySheetExtension*>(core->extensionManager(), object);
const int geometryIndex = sheet->indexOf(geometryProperty);
if (geometryIndex == -1)
return;
core->propertyEditor()->setPropertyValue(geometryProperty, sheet->property(geometryIndex));
}
QT_END_NAMESPACE
| Java |
/*****************************************************************************
*
* This file is part of Mapnik (c++ mapping toolkit)
*
* Copyright (C) 2006 Artem Pavlenko, Jean-Francois Doyon
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
*****************************************************************************/
#include <boost/python.hpp>
#include <mapnik/datasource_cache.hpp>
namespace {
using namespace boost::python;
boost::shared_ptr<mapnik::datasource> create_datasource(const dict& d)
{
bool bind=true;
mapnik::parameters params;
boost::python::list keys=d.keys();
for (int i=0; i<len(keys); ++i)
{
std::string key = extract<std::string>(keys[i]);
object obj = d[key];
if (key == "bind")
{
bind = extract<bool>(obj)();
continue;
}
extract<std::string> ex0(obj);
extract<int> ex1(obj);
extract<double> ex2(obj);
if (ex0.check())
{
params[key] = ex0();
}
else if (ex1.check())
{
params[key] = ex1();
}
else if (ex2.check())
{
params[key] = ex2();
}
}
return mapnik::datasource_cache::instance().create(params, bind);
}
void register_datasources(std::string const& path)
{
mapnik::datasource_cache::instance().register_datasources(path);
}
std::vector<std::string> plugin_names()
{
return mapnik::datasource_cache::instance().plugin_names();
}
std::string plugin_directories()
{
return mapnik::datasource_cache::instance().plugin_directories();
}
}
void export_datasource_cache()
{
using mapnik::datasource_cache;
class_<datasource_cache,
boost::noncopyable>("DatasourceCache",no_init)
.def("create",&create_datasource)
.staticmethod("create")
.def("register_datasources",®ister_datasources)
.staticmethod("register_datasources")
.def("plugin_names",&plugin_names)
.staticmethod("plugin_names")
.def("plugin_directories",&plugin_directories)
.staticmethod("plugin_directories")
;
}
| Java |
//
// Miscellaneous small items related to message sinks
//
using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
namespace Loyc
{
/// <summary>This interface allows an object to declare its "location".</summary>
/// <remarks>For example, <see cref="Loyc.Syntax.LNode"/> implements this
/// interface so that when a compiler error refers to a source code construct,
/// the error message contains the location of that source code rather than the
/// code itself.
/// <para/>
/// Given a context object that may or may not implement this interface, it's
/// handy to use <see cref="MessageSink.ContextToString"/> to convert the
/// "context" of a message into a string, or <see cref="MessageSink.LocationOf(object)"/>
/// to unwrap objects that implement IHasLocation.
/// </remarks>
public interface IHasLocation
{
object Location { get; }
}
/// <summary>This is the method signature of <c>IMessageSink.Write()</c>. You
/// can convert from one of these delegates to <see cref="IMessageSink"/> by
/// calling <see cref="MessageSink.FromDelegate"/>.</summary>
/// <param name="type">Severity or importance of the message; widely-used
/// types include Error, Warning, Note, Debug, and Verbose. The special
/// type Detail is intended to provide more information about a previous
/// message.</param>
/// <param name="context">An object that represents the location that the
/// message applies to, a string that indicates what the program was doing
/// when the message was generated, or any other relevant context information.
/// See also <see cref="MessageSink.ContextToString"/>().</param>
/// <param name="format">A message to display. If there are additional
/// arguments, placeholders such as {0} and {1} refer to these arguments.</param>
/// <param name="args">Optional arguments to fill in placeholders in the format
/// string.</param>
public delegate void WriteMessageFn(Severity type, object context, string format, params object[] args);
/// <summary>An exception that includes a "context" object as part of a
/// <see cref="LogMessage"/> structure, typically used to indicate where an
/// error occurred.</summary>
public class LogException : Exception
{
public LogException(object context, string format, params object[] args) : this(Severity.Error, context, format, args) {}
public LogException(Severity severity, object context, string format, params object[] args) : this(new LogMessage(severity, context, format, args)) {}
public LogException(LogMessage msg) {
Msg = msg;
try {
Data["Severity"] = msg.Severity;
// Disabled because members of the Data dictionary must be serializable,
// but msg.Context might not be. We could convert to string, but is it
// worth the performance cost? Loyc code isn't really using Data anyway.
//Data["Context"] = msg.Context;
} catch { }
}
/// <summary>Contains additional information about the error that occurred.</summary>
public LogMessage Msg { get; private set; }
public override string Message
{
get { return Msg.Formatted; }
}
}
}
| Java |
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
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<title>CQRS.NET: Cqrs.Azure.BlobStorage.TableStorageStore.Update</title>
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<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
<tbody>
<tr style="height: 56px;">
<td id="projectlogo"><img alt="Logo" src="ChinChilla-Software-Red.png"/></td>
<td id="projectalign" style="padding-left: 0.5em;">
<div id="projectname">CQRS.NET
 <span id="projectnumber">2.1</span>
</div>
<div id="projectbrief">A lightweight enterprise framework to write CQRS, event-sourced and micro-service applications in hybrid multi-datacentre, on-premise and Azure environments.</div>
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<a id="a869eba77358b10fc298f8e13fb21d628"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a869eba77358b10fc298f8e13fb21d628">◆ </a></span>Update() <span class="overload">[2/2]</span></h2>
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<td class="mlabels-left">
<table class="memname">
<tr>
<td class="memname">override void <a class="el" href="classCqrs_1_1Azure_1_1BlobStorage_1_1TableStorageStore.html">Cqrs.Azure.BlobStorage.TableStorageStore</a>< TData, TCollectionItemData >.Update </td>
<td>(</td>
<td class="paramtype">TData </td>
<td class="paramname"><em>data</em></td><td>)</td>
<td></td>
</tr>
</table>
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<td class="mlabels-right">
<span class="mlabels"><span class="mlabel">virtual</span></span> </td>
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<p>Implements <a class="el" href="classCqrs_1_1Azure_1_1BlobStorage_1_1StorageStore_ae9ca8bfe30040f77e349a4d47b31da70.html#ae9ca8bfe30040f77e349a4d47b31da70">Cqrs.Azure.BlobStorage.StorageStore< TData, CloudTable ></a>.</p>
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| Java |
namespace("JSTools.Event");
/// <class>
/// Provides an interface for attaching and detaching Observer objects. Any number of
/// Observer objects may observe a subject.
/// </class>
JSTools.Event.Subject = function()
{
//------------------------------------------------------------------------
// Declarations
//------------------------------------------------------------------------
this.InitType(arguments, "JSTools.Event.Subject");
var _this = this;
var _observers = null;
//------------------------------------------------------------------------
// Constructor
//------------------------------------------------------------------------
/// <constructor>
/// Creates a new JSTools.Event.Subject instance.
/// </constructor>
function Init()
{
_this.Clear();
}
//------------------------------------------------------------------------
// Methods
//------------------------------------------------------------------------
/// <method>
/// Removes all registered observer object.
/// </method>
function Clear()
{
_observers = [ ];
}
this.Clear = Clear;
/// <method>
/// Attaches the given observer function to this subject.
/// </method>
/// <param name="objIObserver" type="JSTools.Event.IObserver">Observer to attach.</param>
/// <returns type="Integer">Returns the index, at which the observer object has been added.
/// Returns -1 if the given observer object is invalid and not added.</returns>
function Attach(objIObserver)
{
if (objIObserver
&& typeof(objIObserver) == 'object'
&& objIObserver.IsTypeOf(JSTools.Event.IObserver))
{
_observers.Add(objIObserver);
return _observers.length - 1;
}
return -1;
}
this.Attach = Attach;
/// <method>
/// Detaches the given observer object from this subject.
/// </method>
/// <param name="objIObserverToDetach" type="JSTools.Event.IObserver">Observer to detach.</param>
function Detach(objIObserverToDetach)
{
_observers.Remove(objIObserverToDetach);
}
this.Detach = Detach;
/// <method>
/// Detaches an observer at the given index from this subject.
/// </method>
/// <param name="intIndex" type="Integer">Index to detach.</param>
function DetachByIndex(intIndex)
{
_observers.RemoveAt(intIndex);
}
this.DetachByIndex = DetachByIndex;
/// <method>
/// Notifies the observer about an update.
/// </method>
/// <param name="objEvent" type="Object">An object instance, which represents the event argument.</param>
function Notify(objEvent)
{
for (var i = 0; i < _observers.length; ++i)
{
_observers[i].Update(objEvent);
}
}
this.Notify = Notify;
Init();
}
| Java |
/* ===========================================================
* JFreeChart : a free chart library for the Java(tm) platform
* ===========================================================
*
* (C) Copyright 2000-2016, by Object Refinery Limited and Contributors.
*
* Project Info: http://www.jfree.org/jfreechart/index.html
*
* This library is free software; you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation; either version 2.1 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
* License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*
* [Oracle and Java are registered trademarks of Oracle and/or its affiliates.
* Other names may be trademarks of their respective owners.]
*
* -------------
* Effect3D.java
* -------------
* (C) Copyright 2002-2008, by Object Refinery Limited.
*
* Original Author: David Gilbert (for Object Refinery Limited);
* Contributor(s): -;
*
* Changes
* -------
* 05-Nov-2002 : Version 1 (DG);
* 14-Nov-2002 : Modified to have independent x and y offsets (DG);
*
*/
package org.jfree.chart;
/**
* An interface that should be implemented by renderers that use a 3D effect.
* This allows the axes to mirror the same effect by querying the renderer.
*/
public interface Effect3D {
/**
* Returns the x-offset (in Java2D units) for the 3D effect.
*
* @return The offset.
*/
public double getXOffset();
/**
* Returns the y-offset (in Java2D units) for the 3D effect.
*
* @return The offset.
*/
public double getYOffset();
}
| Java |
//
// NotificationQueue.cpp
//
// $Id: //poco/1.4/Foundation/src/NotificationQueue.cpp#1 $
//
// Library: Foundation
// Package: Notifications
// Module: NotificationQueue
//
// Copyright (c) 2004-2006, Applied Informatics Software Engineering GmbH.
// and Contributors.
//
// Permission is hereby granted, free of charge, to any person or organization
// obtaining a copy of the software and accompanying documentation covered by
// this license (the "Software") to use, reproduce, display, distribute,
// execute, and transmit the Software, and to prepare derivative works of the
// Software, and to permit third-parties to whom the Software is furnished to
// do so, all subject to the following:
//
// The copyright notices in the Software and this entire statement, including
// the above license grant, this restriction and the following disclaimer,
// must be included in all copies of the Software, in whole or in part, and
// all derivative works of the Software, unless such copies or derivative
// works are solely in the form of machine-executable object code generated by
// a source language processor.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
// SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
// FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
// DEALINGS IN THE SOFTWARE.
//
#include "Poco/NotificationQueue.h"
#include "Poco/NotificationCenter.h"
#include "Poco/Notification.h"
#include "Poco/SingletonHolder.h"
namespace Poco {
NotificationQueue::NotificationQueue()
{
}
NotificationQueue::~NotificationQueue()
{
clear();
}
void NotificationQueue::enqueueNotification(Notification::Ptr pNotification)
{
poco_check_ptr (pNotification);
FastMutex::ScopedLock lock(_mutex);
if (_waitQueue.empty())
{
_nfQueue.push_back(pNotification);
}
else
{
WaitInfo* pWI = _waitQueue.front();
_waitQueue.pop_front();
pWI->pNf = pNotification;
pWI->nfAvailable.set();
}
}
void NotificationQueue::enqueueUrgentNotification(Notification::Ptr pNotification)
{
poco_check_ptr (pNotification);
FastMutex::ScopedLock lock(_mutex);
if (_waitQueue.empty())
{
_nfQueue.push_front(pNotification);
}
else
{
WaitInfo* pWI = _waitQueue.front();
_waitQueue.pop_front();
pWI->pNf = pNotification;
pWI->nfAvailable.set();
}
}
Notification* NotificationQueue::dequeueNotification()
{
FastMutex::ScopedLock lock(_mutex);
return dequeueOne().duplicate();
}
Notification* NotificationQueue::waitDequeueNotification()
{
Notification::Ptr pNf;
WaitInfo* pWI = 0;
{
FastMutex::ScopedLock lock(_mutex);
pNf = dequeueOne();
if (pNf) return pNf.duplicate();
pWI = new WaitInfo;
_waitQueue.push_back(pWI);
}
pWI->nfAvailable.wait();
pNf = pWI->pNf;
delete pWI;
return pNf.duplicate();
}
Notification* NotificationQueue::waitDequeueNotification(long milliseconds)
{
Notification::Ptr pNf;
WaitInfo* pWI = 0;
{
FastMutex::ScopedLock lock(_mutex);
pNf = dequeueOne();
if (pNf) return pNf.duplicate();
pWI = new WaitInfo;
_waitQueue.push_back(pWI);
}
if (pWI->nfAvailable.tryWait(milliseconds))
{
pNf = pWI->pNf;
}
else
{
FastMutex::ScopedLock lock(_mutex);
pNf = pWI->pNf;
for (WaitQueue::iterator it = _waitQueue.begin(); it != _waitQueue.end(); ++it)
{
if (*it == pWI)
{
_waitQueue.erase(it);
break;
}
}
}
delete pWI;
return pNf.duplicate();
}
void NotificationQueue::dispatch(NotificationCenter& notificationCenter)
{
FastMutex::ScopedLock lock(_mutex);
Notification::Ptr pNf = dequeueOne();
while (pNf)
{
notificationCenter.postNotification(pNf);
pNf = dequeueOne();
}
}
void NotificationQueue::wakeUpAll()
{
FastMutex::ScopedLock lock(_mutex);
for (WaitQueue::iterator it = _waitQueue.begin(); it != _waitQueue.end(); ++it)
{
(*it)->nfAvailable.set();
}
_waitQueue.clear();
}
bool NotificationQueue::empty() const
{
FastMutex::ScopedLock lock(_mutex);
return _nfQueue.empty();
}
int NotificationQueue::size() const
{
FastMutex::ScopedLock lock(_mutex);
return static_cast<int>(_nfQueue.size());
}
void NotificationQueue::clear()
{
FastMutex::ScopedLock lock(_mutex);
_nfQueue.clear();
}
bool NotificationQueue::hasIdleThreads() const
{
FastMutex::ScopedLock lock(_mutex);
return !_waitQueue.empty();
}
Notification::Ptr NotificationQueue::dequeueOne()
{
Notification::Ptr pNf;
if (!_nfQueue.empty())
{
pNf = _nfQueue.front();
_nfQueue.pop_front();
}
return pNf;
}
namespace
{
static SingletonHolder<NotificationQueue> sh_nfq;
}
NotificationQueue& NotificationQueue::defaultQueue()
{
return *sh_nfq.get();
}
} // namespace Poco
| Java |
//
// ZipDataInfo.h
//
// $Id: //poco/1.4/Zip/include/Poco/Zip/ZipDataInfo.h#1 $
//
// Library: Zip
// Package: Zip
// Module: ZipDataInfo
//
// Definition of the ZipDataInfo class.
//
// Copyright (c) 2007, Applied Informatics Software Engineering GmbH.
// and Contributors.
//
// Permission is hereby granted, free of charge, to any person or organization
// obtaining a copy of the software and accompanying documentation covered by
// this license (the "Software") to use, reproduce, display, distribute,
// execute, and transmit the Software, and to prepare derivative works of the
// Software, and to permit third-parties to whom the Software is furnished to
// do so, all subject to the following:
//
// The copyright notices in the Software and this entire statement, including
// the above license grant, this restriction and the following disclaimer,
// must be included in all copies of the Software, in whole or in part, and
// all derivative works of the Software, unless such copies or derivative
// works are solely in the form of machine-executable object code generated by
// a source language processor.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
// SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
// FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
// DEALINGS IN THE SOFTWARE.
//
#ifndef Zip_ZipDataInfo_INCLUDED
#define Zip_ZipDataInfo_INCLUDED
#include "Poco/Zip/Zip.h"
#include "Poco/Zip/ZipCommon.h"
#include "Poco/Zip/ZipUtil.h"
namespace Poco {
namespace Zip {
class Zip_API ZipDataInfo
/// A ZipDataInfo stores a Zip data descriptor
{
public:
static const char HEADER[ZipCommon::HEADER_SIZE];
ZipDataInfo();
/// Creates a header with all fields (except the header field) set to 0
ZipDataInfo(std::istream& in, bool assumeHeaderRead);
/// Creates the ZipDataInfo.
~ZipDataInfo();
/// Destroys the ZipDataInfo.
bool isValid() const;
Poco::UInt32 getCRC32() const;
void setCRC32(Poco::UInt32 crc);
Poco::UInt32 getCompressedSize() const;
void setCompressedSize(Poco::UInt32 size);
Poco::UInt32 getUncompressedSize() const;
void setUncompressedSize(Poco::UInt32 size);
static Poco::UInt32 getFullHeaderSize();
const char* getRawHeader() const;
private:
enum
{
HEADER_POS = 0,
CRC32_POS = HEADER_POS + ZipCommon::HEADER_SIZE,
CRC32_SIZE = 4,
COMPRESSED_POS = CRC32_POS + CRC32_SIZE,
COMPRESSED_SIZE = 4,
UNCOMPRESSED_POS = COMPRESSED_POS + COMPRESSED_SIZE,
UNCOMPRESSED_SIZE = 4,
FULLHEADER_SIZE = UNCOMPRESSED_POS + UNCOMPRESSED_SIZE
};
char _rawInfo[FULLHEADER_SIZE];
bool _valid;
};
inline const char* ZipDataInfo::getRawHeader() const
{
return _rawInfo;
}
inline bool ZipDataInfo::isValid() const
{
return _valid;
}
inline Poco::UInt32 ZipDataInfo::getCRC32() const
{
return ZipUtil::get32BitValue(_rawInfo, CRC32_POS);
}
inline void ZipDataInfo::setCRC32(Poco::UInt32 crc)
{
return ZipUtil::set32BitValue(crc, _rawInfo, CRC32_POS);
}
inline Poco::UInt32 ZipDataInfo::getCompressedSize() const
{
return ZipUtil::get32BitValue(_rawInfo, COMPRESSED_POS);
}
inline void ZipDataInfo::setCompressedSize(Poco::UInt32 size)
{
return ZipUtil::set32BitValue(size, _rawInfo, COMPRESSED_POS);
}
inline Poco::UInt32 ZipDataInfo::getUncompressedSize() const
{
return ZipUtil::get32BitValue(_rawInfo, UNCOMPRESSED_POS);
}
inline void ZipDataInfo::setUncompressedSize(Poco::UInt32 size)
{
return ZipUtil::set32BitValue(size, _rawInfo, UNCOMPRESSED_POS);
}
inline Poco::UInt32 ZipDataInfo::getFullHeaderSize()
{
return FULLHEADER_SIZE;
}
} } // namespace Poco::Zip
#endif // Zip_ZipDataInfo_INCLUDED
| Java |
/*
* Created on 17-dic-2005
*
* TODO To change the template for this generated file go to
* Window - Preferences - Java - Code Style - Code Templates
*/
package org.herac.tuxguitar.app.actions.layout;
import org.herac.tuxguitar.app.actions.Action;
import org.herac.tuxguitar.app.actions.ActionData;
import org.herac.tuxguitar.graphics.control.TGLayout;
/**
* @author julian
*
* TODO To change the template for this generated type comment go to
* Window - Preferences - Java - Code Style - Code Templates
*/
public class SetTablatureEnabledAction extends Action{
public static final String NAME = "action.view.layout-set-tablature-enabled";
public SetTablatureEnabledAction() {
super(NAME, AUTO_LOCK | AUTO_UNLOCK | AUTO_UPDATE | KEY_BINDING_AVAILABLE);
}
protected int execute(ActionData actionData){
TGLayout layout = getEditor().getTablature().getViewLayout();
layout.setStyle( ( layout.getStyle() ^ TGLayout.DISPLAY_TABLATURE ) );
if((layout.getStyle() & TGLayout.DISPLAY_TABLATURE) == 0 && (layout.getStyle() & TGLayout.DISPLAY_SCORE) == 0 ){
layout.setStyle( ( layout.getStyle() ^ TGLayout.DISPLAY_SCORE ) );
}
updateTablature();
return 0;
}
}
| Java |
/**********************************************************************
* $Id$
*
* GEOS - Geometry Engine Open Source
* http://geos.refractions.net
*
* Copyright (C) 2011 Sandro Santilli <[email protected]>
* Copyright (C) 2007 Refractions Research Inc.
*
* This is free software; you can redistribute and/or modify it under
* the terms of the GNU Lesser General Public Licence as published
* by the Free Software Foundation.
* See the COPYING file for more information.
*
**********************************************************************
*
* Last port: operation/buffer/OffsetSegmentString.java r378 (JTS-1.12)
*
**********************************************************************/
#ifndef GEOS_OP_BUFFER_OFFSETSEGMENTSTRING_H
#define GEOS_OP_BUFFER_OFFSETSEGMENTSTRING_H
#include <geos/geom/Coordinate.h> // for inlines
#include <geos/geom/CoordinateSequence.h> // for inlines
#include <geos/geom/CoordinateArraySequence.h> // for composition
#include <geos/geom/PrecisionModel.h> // for inlines
#include <vector>
#include <memory>
#include <cassert>
namespace geos {
namespace operation { // geos.operation
namespace buffer { // geos.operation.buffer
/// A dynamic list of the vertices in a constructed offset curve.
//
/// Automatically removes close vertices
/// which are closer than a given tolerance.
///
/// @author Martin Davis
///
class OffsetSegmentString
{
private:
geom::CoordinateArraySequence* ptList;
const geom::PrecisionModel* precisionModel;
/** \brief
* The distance below which two adjacent points on the curve
* are considered to be coincident.
*
* This is chosen to be a small fraction of the offset distance.
*/
double minimumVertexDistance;
/** \brief
* Tests whether the given point is redundant relative to the previous
* point in the list (up to tolerance)
*
* @param pt
* @return true if the point is redundant
*/
bool isRedundant(const geom::Coordinate& pt) const
{
if (ptList->size() < 1)
return false;
const geom::Coordinate& lastPt = ptList->back();
double ptDist = pt.distance(lastPt);
if (ptDist < minimumVertexDistance)
return true;
return false;
}
public:
friend std::ostream& operator<< (std::ostream& os, const OffsetSegmentString& node);
OffsetSegmentString()
:
ptList(new geom::CoordinateArraySequence()),
precisionModel(NULL),
minimumVertexDistance (0.0)
{
}
~OffsetSegmentString()
{
delete ptList;
}
void reset()
{
if ( ptList ) ptList->clear();
else ptList = new geom::CoordinateArraySequence();
precisionModel = NULL;
minimumVertexDistance = 0.0;
}
void setPrecisionModel(const geom::PrecisionModel* nPrecisionModel)
{
precisionModel = nPrecisionModel;
}
void setMinimumVertexDistance(double nMinVertexDistance)
{
minimumVertexDistance = nMinVertexDistance;
}
void addPt(const geom::Coordinate& pt)
{
assert(precisionModel);
geom::Coordinate bufPt = pt;
precisionModel->makePrecise(bufPt);
// don't add duplicate (or near-duplicate) points
if (isRedundant(bufPt))
{
return;
}
// we ask to allow repeated as we checked this ourself
// (JTS uses a vector for ptList, not a CoordinateSequence,
// we should do the same)
ptList->add(bufPt, true);
}
void addPts(const geom::CoordinateSequence& pts, bool isForward)
{
if ( isForward ) {
for (size_t i=0, n=pts.size(); i<n; ++i) {
addPt(pts[i]);
}
} else {
for (size_t i=pts.size(); i>0; --i) {
addPt(pts[i-1]);
}
}
}
/// Check that points are a ring
//
/// add the startpoint again if they are not
void closeRing()
{
if (ptList->size() < 1) return;
const geom::Coordinate& startPt = ptList->front();
const geom::Coordinate& lastPt = ptList->back();
if (startPt.equals(lastPt)) return;
// we ask to allow repeated as we checked this ourself
ptList->add(startPt, true);
}
/// Get coordinates by taking ownership of them
//
/// After this call, the coordinates reference in
/// this object are dropped. Calling twice will
/// segfault...
///
/// FIXME: refactor memory management of this
///
geom::CoordinateSequence* getCoordinates()
{
closeRing();
geom::CoordinateSequence* ret = ptList;
ptList = 0;
return ret;
}
inline int size() const { return ptList ? ptList->size() : 0 ; }
};
inline std::ostream& operator<< (std::ostream& os,
const OffsetSegmentString& lst)
{
if ( lst.ptList )
{
os << *(lst.ptList);
}
else
{
os << "empty (consumed?)";
}
return os;
}
} // namespace geos.operation.buffer
} // namespace geos.operation
} // namespace geos
#endif // ndef GEOS_OP_BUFFER_OFFSETSEGMENTSTRING_H
| Java |
/****************************************************************************
**
** Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
** All rights reserved.
** Contact: Nokia Corporation ([email protected])
**
** This file is part of the QtCore module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** Commercial Usage
** Licensees holding valid Qt Commercial licenses may use this file in
** accordance with the Qt Commercial License Agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Nokia.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Nokia gives you certain additional
** rights. These rights are described in the Nokia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3.0 as published by the Free Software
** Foundation and appearing in the file LICENSE.GPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU General Public License version 3.0 requirements will be
** met: http://www.gnu.org/copyleft/gpl.html.
**
** If you have questions regarding the use of this file, please contact
** Nokia at [email protected].
** $QT_END_LICENSE$
**
****************************************************************************/
#include "qsystemlibrary_p.h"
#include <QtCore/qvarlengtharray.h>
#include <QtCore/qstringlist.h>
#include <QtCore/qfileinfo.h>
/*!
\internal
\class QSystemLibrary
The purpose of this class is to load only libraries that are located in
well-known and trusted locations on the filesystem. It does not suffer from
the security problem that QLibrary has, therefore it will never search in
the current directory.
The search order is the same as the order in DLL Safe search mode Windows,
except that we don't search:
* The current directory
* The 16-bit system directory. (normally c:\windows\system)
* The Windows directory. (normally c:\windows)
This means that the effective search order is:
1. Application path.
2. System libraries path.
3. Trying all paths inside the PATH environment variable.
Note, when onlySystemDirectory is true it will skip 1) and 3).
DLL Safe search mode is documented in the "Dynamic-Link Library Search
Order" document on MSDN.
Since library loading code is sometimes shared between Windows and WinCE,
this class can also be used on WinCE. However, its implementation just
calls the LoadLibrary() function. This is ok since it is documented as not
loading from the current directory on WinCE. This behaviour is documented
in the documentation for LoadLibrary for Windows CE at MSDN.
(http://msdn.microsoft.com/en-us/library/ms886736.aspx)
*/
QT_BEGIN_NAMESPACE
#if defined(Q_OS_WINCE)
HINSTANCE QSystemLibrary::load(const wchar_t *libraryName, bool onlySystemDirectory /* = true */)
{
return ::LoadLibrary(libraryName);
}
#else
#if !defined(QT_BOOTSTRAPPED)
extern QString qAppFileName();
#endif
static QString qSystemDirectory()
{
QVarLengthArray<wchar_t, MAX_PATH> fullPath;
UINT retLen = ::GetSystemDirectory(fullPath.data(), MAX_PATH);
if (retLen > MAX_PATH) {
fullPath.resize(retLen);
retLen = ::GetSystemDirectory(fullPath.data(), retLen);
}
// in some rare cases retLen might be 0
return QString::fromWCharArray(fullPath.constData(), int(retLen));
}
HINSTANCE QSystemLibrary::load(const wchar_t *libraryName, bool onlySystemDirectory /* = true */)
{
QStringList searchOrder;
#if !defined(QT_BOOTSTRAPPED)
if (!onlySystemDirectory)
searchOrder << QFileInfo(qAppFileName()).path();
#endif
searchOrder << qSystemDirectory();
if (!onlySystemDirectory) {
const QString PATH(QLatin1String(qgetenv("PATH").constData()));
searchOrder << PATH.split(QLatin1Char(';'), QString::SkipEmptyParts);
}
QString fileName = QString::fromWCharArray(libraryName);
fileName.append(QLatin1String(".dll"));
// Start looking in the order specified
for (int i = 0; i < searchOrder.count(); ++i) {
QString fullPathAttempt = searchOrder.at(i);
if (!fullPathAttempt.endsWith(QLatin1Char('\\'))) {
fullPathAttempt.append(QLatin1Char('\\'));
}
fullPathAttempt.append(fileName);
HINSTANCE inst = ::LoadLibrary((const wchar_t *)fullPathAttempt.utf16());
if (inst != 0)
return inst;
}
return 0;
}
#endif //Q_OS_WINCE
QT_END_NAMESPACE
| Java |
/*!
* \file definition_structure.hpp
* \brief Headers of the main subroutines used by SU2_EDU.
* The subroutines and functions are in the <i>definition_structure.cpp</i> file.
* \author Aerospace Design Laboratory (Stanford University).
* \version 1.2.0
*
* SU2 EDU, Copyright (C) 2014 Aerospace Design Laboratory (Stanford University).
*
* SU2 EDU is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* SU2 EDU is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with SU2 EDU. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <ctime>
#include "solver_structure.hpp"
#include "integration_structure.hpp"
#include "output_structure.hpp"
#include "numerics_structure.hpp"
#include "geometry_structure.hpp"
#include "config_structure.hpp"
using namespace std;
/*!
* \brief Gets the number of zones in the mesh file.
* \param[in] val_mesh_filename - Name of the file with the grid information.
* \param[in] val_format - Format of the file with the grid information.
* \param[in] config - Definition of the particular problem.
* \return Total number of zones in the grid file.
*/
unsigned short GetnZone(string val_mesh_filename, unsigned short val_format, CConfig *config);
/*!
* \brief Gets the number of dimensions in the mesh file
* \param[in] val_mesh_filename - Name of the file with the grid information.
* \param[in] val_format - Format of the file with the grid information.
* \return Total number of domains in the grid file.
*/
unsigned short GetnDim(string val_mesh_filename, unsigned short val_format);
/*!
* \brief Definition and allocation of all solution classes.
* \param[in] solver_container - Container vector with all the solutions.
* \param[in] geometry - Geometrical definition of the problem.
* \param[in] config - Definition of the particular problem.
* \param[in] iZone - Index of the zone.
*/
void Solver_Preprocessing(CSolver ***solver_container, CGeometry **geometry, CConfig *config);
/*!
* \brief Definition and allocation of all integration classes.
* \param[in] integration_container - Container vector with all the integration methods.
* \param[in] geometry - Geometrical definition of the problem.
* \param[in] config - Definition of the particular problem.
* \param[in] iZone - Index of the zone.
*/
void Integration_Preprocessing(CIntegration **integration_container, CGeometry **geometry, CConfig *config);
/*!
* \brief Definition and allocation of all solver classes.
* \param[in] numerics_container - Description of the numerical method (the way in which the equations are solved).
* \param[in] solver_container - Container vector with all the solutions.
* \param[in] geometry - Geometrical definition of the problem.
* \param[in] config - Definition of the particular problem.
* \param[in] iZone - Index of the zone.
*/
void Numerics_Preprocessing(CNumerics ****numerics_container, CSolver ***solver_container, CGeometry **geometry, CConfig *config);
/*!
* \brief Do the geometrical preprocessing.
* \param[in] geometry - Geometrical definition of the problem.
* \param[in] config - Definition of the particular problem.
* \param[in] val_nZone - Total number of zones.
*/
void Geometrical_Preprocessing(CGeometry **geometry, CConfig *config);
| Java |
/**
* Copyright (c) Tiny Technologies, Inc. All rights reserved.
* Licensed under the LGPL or a commercial license.
* For LGPL see License.txt in the project root for license information.
* For commercial licenses see https://www.tiny.cloud/
*/
import { getElementFromPosition } from '../caret/CaretUtils';
import NodeType from '../dom/NodeType';
import { CaretPosition } from '../caret/CaretPosition';
import { Insert, Element } from '@ephox/sugar';
import { Option, Fun } from '@ephox/katamari';
const insertTextAtPosition = (text: string, pos: CaretPosition): Option<CaretPosition> => {
const container = pos.container();
const offset = pos.offset();
if (NodeType.isText(container)) {
container.insertData(offset, text);
return Option.some(CaretPosition(container, offset + text.length));
} else {
return getElementFromPosition(pos).map((elm) => {
const textNode = Element.fromText(text);
if (pos.isAtEnd()) {
Insert.after(elm, textNode);
} else {
Insert.before(elm, textNode);
}
return CaretPosition(textNode.dom(), text.length);
});
}
};
const insertNbspAtPosition = Fun.curry(insertTextAtPosition, '\u00a0');
const insertSpaceAtPosition = Fun.curry(insertTextAtPosition, ' ');
export {
insertTextAtPosition,
insertNbspAtPosition,
insertSpaceAtPosition
};
| Java |
/**************************************************************************
**
** This file is part of Qt Creator
**
** Copyright (c) 2012 Nokia Corporation and/or its subsidiary(-ies).
**
** Contact: Nokia Corporation ([email protected])
**
**
** GNU Lesser General Public License Usage
**
** This file may be used under the terms of the GNU Lesser General Public
** License version 2.1 as published by the Free Software Foundation and
** appearing in the file LICENSE.LGPL included in the packaging of this file.
** Please review the following information to ensure the GNU Lesser General
** Public License version 2.1 requirements will be met:
** http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Nokia gives you certain additional
** rights. These rights are described in the Nokia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** Other Usage
**
** Alternatively, this file may be used in accordance with the terms and
** conditions contained in a signed written agreement between you and Nokia.
**
** If you have questions regarding the use of this file, please contact
** Nokia at [email protected].
**
**************************************************************************/
#ifndef TARGET_H
#define TARGET_H
#include "projectconfiguration.h"
#include "projectexplorer_export.h"
QT_FORWARD_DECLARE_CLASS(QIcon)
namespace Utils {
class Environment;
}
namespace ProjectExplorer {
class RunConfiguration;
class ToolChain;
class BuildConfiguration;
class DeployConfiguration;
class IBuildConfigurationFactory;
class DeployConfigurationFactory;
class IRunConfigurationFactory;
class Project;
class BuildConfigWidget;
class TargetPrivate;
class PROJECTEXPLORER_EXPORT Target : public ProjectConfiguration
{
Q_OBJECT
public:
virtual ~Target();
virtual BuildConfigWidget *createConfigWidget() = 0;
Project *project() const;
// Build configuration
void addBuildConfiguration(BuildConfiguration *configuration);
bool removeBuildConfiguration(BuildConfiguration *configuration);
QList<BuildConfiguration *> buildConfigurations() const;
BuildConfiguration *activeBuildConfiguration() const;
void setActiveBuildConfiguration(BuildConfiguration *configuration);
virtual IBuildConfigurationFactory *buildConfigurationFactory() const = 0;
// DeployConfiguration
void addDeployConfiguration(DeployConfiguration *dc);
bool removeDeployConfiguration(DeployConfiguration *dc);
QList<DeployConfiguration *> deployConfigurations() const;
DeployConfiguration *activeDeployConfiguration() const;
void setActiveDeployConfiguration(DeployConfiguration *configuration);
QStringList availableDeployConfigurationIds();
QString displayNameForDeployConfigurationId(const QString &id);
DeployConfiguration *createDeployConfiguration(const QString &id);
// Running
QList<RunConfiguration *> runConfigurations() const;
void addRunConfiguration(RunConfiguration *runConfiguration);
void removeRunConfiguration(RunConfiguration *runConfiguration);
RunConfiguration *activeRunConfiguration() const;
void setActiveRunConfiguration(RunConfiguration *runConfiguration);
// Returns whether this target is actually available at he time
// of the call. A target may become unavailable e.g. when a Qt version
// is removed.
//
// Note: Enabled state is not saved!
bool isEnabled() const;
QIcon icon() const;
void setIcon(QIcon icon);
QIcon overlayIcon() const;
void setOverlayIcon(QIcon icon);
QString toolTip() const;
void setToolTip(const QString &text);
virtual QList<ToolChain *> possibleToolChains(BuildConfiguration *) const;
virtual ToolChain *preferredToolChain(BuildConfiguration *) const;
virtual QVariantMap toMap() const;
signals:
void targetEnabled(bool);
void iconChanged();
void overlayIconChanged();
void toolTipChanged();
// TODO clean up signal names
// might be better to also have aboutToRemove signals
void removedRunConfiguration(ProjectExplorer::RunConfiguration *);
void addedRunConfiguration(ProjectExplorer::RunConfiguration *);
void activeRunConfigurationChanged(ProjectExplorer::RunConfiguration *);
void removedBuildConfiguration(ProjectExplorer::BuildConfiguration *bc);
void addedBuildConfiguration(ProjectExplorer::BuildConfiguration *bc);
void activeBuildConfigurationChanged(ProjectExplorer::BuildConfiguration *);
void removedDeployConfiguration(ProjectExplorer::DeployConfiguration *dc);
void addedDeployConfiguration(ProjectExplorer::DeployConfiguration *dc);
void activeDeployConfigurationChanged(ProjectExplorer::DeployConfiguration *dc);
/// convenience signal, emitted if either the active buildconfiguration emits
/// environmentChanged() or if the active build configuration changes
void environmentChanged();
/// convenience signal, emitted if either the active configuration emits
/// enabledChanged() or if the active build configuration changes
void buildConfigurationEnabledChanged();
void deployConfigurationEnabledChanged();
void runConfigurationEnabledChanged();
protected:
Target(Project *parent, const QString &id);
void setEnabled(bool);
virtual bool fromMap(const QVariantMap &map);
private slots:
void changeEnvironment();
void changeBuildConfigurationEnabled();
void changeDeployConfigurationEnabled();
void changeRunConfigurationEnabled();
private:
TargetPrivate *d;
};
class PROJECTEXPLORER_EXPORT ITargetFactory :
public QObject
{
Q_OBJECT
public:
explicit ITargetFactory(QObject *parent = 0);
virtual QStringList supportedTargetIds() const = 0;
virtual bool supportsTargetId(const QString &id) const = 0;
// used to translate the types to names to display to the user
virtual QString displayNameForId(const QString &id) const = 0;
virtual bool canCreate(Project *parent, const QString &id) const = 0;
virtual Target *create(Project *parent, const QString &id) = 0;
virtual bool canRestore(Project *parent, const QVariantMap &map) const = 0;
virtual Target *restore(Project *parent, const QVariantMap &map) = 0;
signals:
void canCreateTargetIdsChanged();
};
} // namespace ProjectExplorer
Q_DECLARE_METATYPE(ProjectExplorer::Target *)
#endif // TARGET_H
| Java |
////////////////////////////////////////////////////////////////////////////////
// checkstyle: Checks Java source code for adherence to a set of rules.
// Copyright (C) 2001-2015 the original author or authors.
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2.1 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
////////////////////////////////////////////////////////////////////////////////
package com.puppycrawl.tools.checkstyle.checks.coding;
import com.puppycrawl.tools.checkstyle.api.Check;
import com.puppycrawl.tools.checkstyle.api.DetailAST;
import com.puppycrawl.tools.checkstyle.api.TokenTypes;
/**
* Restricts the number of statements per line to one.
* <p>
* Rationale: It's very difficult to read multiple statements on one line.
* </p>
* <p>
* In the Java programming language, statements are the fundamental unit of
* execution. All statements except blocks are terminated by a semicolon.
* Blocks are denoted by open and close curly braces.
* </p>
* <p>
* OneStatementPerLineCheck checks the following types of statements:
* variable declaration statements, empty statements, assignment statements,
* expression statements, increment statements, object creation statements,
* 'for loop' statements, 'break' statements, 'continue' statements,
* 'return' statements, import statements.
* </p>
* <p>
* The following examples will be flagged as a violation:
* </p>
* <pre>
* //Each line causes violation:
* int var1; int var2;
* var1 = 1; var2 = 2;
* int var1 = 1; int var2 = 2;
* var1++; var2++;
* Object obj1 = new Object(); Object obj2 = new Object();
* import java.io.EOFException; import java.io.BufferedReader;
* ;; //two empty statements on the same line.
*
* //Multi-line statements:
* int var1 = 1
* ; var2 = 2; //violation here
* int o = 1, p = 2,
* r = 5; int t; //violation here
* </pre>
*
* @author Alexander Jesse
* @author Oliver Burn
* @author Andrei Selkin
*/
public final class OneStatementPerLineCheck extends Check {
/**
* A key is pointing to the warning message text in "messages.properties"
* file.
*/
public static final String MSG_KEY = "multiple.statements.line";
/**
* Hold the line-number where the last statement ended.
*/
private int lastStatementEnd = -1;
/**
* Hold the line-number where the last 'for-loop' statement ended.
*/
private int forStatementEnd = -1;
/**
* The for-header usually has 3 statements on one line, but THIS IS OK.
*/
private boolean inForHeader;
@Override
public int[] getDefaultTokens() {
return getAcceptableTokens();
}
@Override
public int[] getAcceptableTokens() {
return new int[]{
TokenTypes.SEMI, TokenTypes.FOR_INIT,
TokenTypes.FOR_ITERATOR,
};
}
@Override
public int[] getRequiredTokens() {
return getAcceptableTokens();
}
@Override
public void beginTree(DetailAST rootAST) {
inForHeader = false;
lastStatementEnd = -1;
forStatementEnd = -1;
}
@Override
public void visitToken(DetailAST ast) {
switch (ast.getType()) {
case TokenTypes.SEMI:
DetailAST currentStatement = ast;
if (isMultilineStatement(currentStatement)) {
currentStatement = ast.getPreviousSibling();
}
if (isOnTheSameLine(currentStatement, lastStatementEnd,
forStatementEnd) && !inForHeader) {
log(ast, MSG_KEY);
}
break;
case TokenTypes.FOR_ITERATOR:
forStatementEnd = ast.getLineNo();
break;
default:
inForHeader = true;
break;
}
}
@Override
public void leaveToken(DetailAST ast) {
switch (ast.getType()) {
case TokenTypes.SEMI:
lastStatementEnd = ast.getLineNo();
forStatementEnd = -1;
break;
case TokenTypes.FOR_ITERATOR:
inForHeader = false;
break;
default:
break;
}
}
/**
* Checks whether two statements are on the same line.
* @param ast token for the current statement.
* @param lastStatementEnd the line-number where the last statement ended.
* @param forStatementEnd the line-number where the last 'for-loop'
* statement ended.
* @return true if two statements are on the same line.
*/
private static boolean isOnTheSameLine(DetailAST ast, int lastStatementEnd,
int forStatementEnd) {
return lastStatementEnd == ast.getLineNo() && forStatementEnd != ast.getLineNo();
}
/**
* Checks whether statement is multiline.
* @param ast token for the current statement.
* @return true if one statement is distributed over two or more lines.
*/
private static boolean isMultilineStatement(DetailAST ast) {
final boolean multiline;
if (ast.getPreviousSibling() == null) {
multiline = false;
}
else {
final DetailAST prevSibling = ast.getPreviousSibling();
multiline = prevSibling.getLineNo() != ast.getLineNo()
&& ast.getParent() != null;
}
return multiline;
}
}
| Java |
#!/usr/bin/env python
import pygtk
pygtk.require('2.0')
import pynotify
import sys
if __name__ == '__main__':
if not pynotify.init("XY"):
sys.exit(1)
n = pynotify.Notification("X, Y Test",
"This notification should point to 150, 10")
n.set_hint("x", 150)
n.set_hint("y", 10)
if not n.show():
print "Failed to send notification"
sys.exit(1)
| Java |
/**
* \file
*
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#ifndef _SAM3S_ADC_INSTANCE_
#define _SAM3S_ADC_INSTANCE_
/* ========== Register definition for ADC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
#define REG_ADC_CR (0x40038000U) /**< \brief (ADC) Control Register */
#define REG_ADC_MR (0x40038004U) /**< \brief (ADC) Mode Register */
#define REG_ADC_SEQR1 (0x40038008U) /**< \brief (ADC) Channel Sequence Register 1 */
#define REG_ADC_SEQR2 (0x4003800CU) /**< \brief (ADC) Channel Sequence Register 2 */
#define REG_ADC_CHER (0x40038010U) /**< \brief (ADC) Channel Enable Register */
#define REG_ADC_CHDR (0x40038014U) /**< \brief (ADC) Channel Disable Register */
#define REG_ADC_CHSR (0x40038018U) /**< \brief (ADC) Channel Status Register */
#define REG_ADC_LCDR (0x40038020U) /**< \brief (ADC) Last Converted Data Register */
#define REG_ADC_IER (0x40038024U) /**< \brief (ADC) Interrupt Enable Register */
#define REG_ADC_IDR (0x40038028U) /**< \brief (ADC) Interrupt Disable Register */
#define REG_ADC_IMR (0x4003802CU) /**< \brief (ADC) Interrupt Mask Register */
#define REG_ADC_ISR (0x40038030U) /**< \brief (ADC) Interrupt Status Register */
#define REG_ADC_OVER (0x4003803CU) /**< \brief (ADC) Overrun Status Register */
#define REG_ADC_EMR (0x40038040U) /**< \brief (ADC) Extended Mode Register */
#define REG_ADC_CWR (0x40038044U) /**< \brief (ADC) Compare Window Register */
#define REG_ADC_CGR (0x40038048U) /**< \brief (ADC) Channel Gain Register */
#define REG_ADC_COR (0x4003804CU) /**< \brief (ADC) Channel Offset Register */
#define REG_ADC_CDR (0x40038050U) /**< \brief (ADC) Channel Data Register */
#define REG_ADC_ACR (0x40038094U) /**< \brief (ADC) Analog Control Register */
#define REG_ADC_WPMR (0x400380E4U) /**< \brief (ADC) Write Protect Mode Register */
#define REG_ADC_WPSR (0x400380E8U) /**< \brief (ADC) Write Protect Status Register */
#define REG_ADC_RPR (0x40038100U) /**< \brief (ADC) Receive Pointer Register */
#define REG_ADC_RCR (0x40038104U) /**< \brief (ADC) Receive Counter Register */
#define REG_ADC_RNPR (0x40038110U) /**< \brief (ADC) Receive Next Pointer Register */
#define REG_ADC_RNCR (0x40038114U) /**< \brief (ADC) Receive Next Counter Register */
#define REG_ADC_PTCR (0x40038120U) /**< \brief (ADC) Transfer Control Register */
#define REG_ADC_PTSR (0x40038124U) /**< \brief (ADC) Transfer Status Register */
#else
#define REG_ADC_CR (*(WoReg*)0x40038000U) /**< \brief (ADC) Control Register */
#define REG_ADC_MR (*(RwReg*)0x40038004U) /**< \brief (ADC) Mode Register */
#define REG_ADC_SEQR1 (*(RwReg*)0x40038008U) /**< \brief (ADC) Channel Sequence Register 1 */
#define REG_ADC_SEQR2 (*(RwReg*)0x4003800CU) /**< \brief (ADC) Channel Sequence Register 2 */
#define REG_ADC_CHER (*(WoReg*)0x40038010U) /**< \brief (ADC) Channel Enable Register */
#define REG_ADC_CHDR (*(WoReg*)0x40038014U) /**< \brief (ADC) Channel Disable Register */
#define REG_ADC_CHSR (*(RoReg*)0x40038018U) /**< \brief (ADC) Channel Status Register */
#define REG_ADC_LCDR (*(RoReg*)0x40038020U) /**< \brief (ADC) Last Converted Data Register */
#define REG_ADC_IER (*(WoReg*)0x40038024U) /**< \brief (ADC) Interrupt Enable Register */
#define REG_ADC_IDR (*(WoReg*)0x40038028U) /**< \brief (ADC) Interrupt Disable Register */
#define REG_ADC_IMR (*(RoReg*)0x4003802CU) /**< \brief (ADC) Interrupt Mask Register */
#define REG_ADC_ISR (*(RoReg*)0x40038030U) /**< \brief (ADC) Interrupt Status Register */
#define REG_ADC_OVER (*(RoReg*)0x4003803CU) /**< \brief (ADC) Overrun Status Register */
#define REG_ADC_EMR (*(RwReg*)0x40038040U) /**< \brief (ADC) Extended Mode Register */
#define REG_ADC_CWR (*(RwReg*)0x40038044U) /**< \brief (ADC) Compare Window Register */
#define REG_ADC_CGR (*(RwReg*)0x40038048U) /**< \brief (ADC) Channel Gain Register */
#define REG_ADC_COR (*(RwReg*)0x4003804CU) /**< \brief (ADC) Channel Offset Register */
#define REG_ADC_CDR (*(RoReg*)0x40038050U) /**< \brief (ADC) Channel Data Register */
#define REG_ADC_ACR (*(RwReg*)0x40038094U) /**< \brief (ADC) Analog Control Register */
#define REG_ADC_WPMR (*(RwReg*)0x400380E4U) /**< \brief (ADC) Write Protect Mode Register */
#define REG_ADC_WPSR (*(RoReg*)0x400380E8U) /**< \brief (ADC) Write Protect Status Register */
#define REG_ADC_RPR (*(RwReg*)0x40038100U) /**< \brief (ADC) Receive Pointer Register */
#define REG_ADC_RCR (*(RwReg*)0x40038104U) /**< \brief (ADC) Receive Counter Register */
#define REG_ADC_RNPR (*(RwReg*)0x40038110U) /**< \brief (ADC) Receive Next Pointer Register */
#define REG_ADC_RNCR (*(RwReg*)0x40038114U) /**< \brief (ADC) Receive Next Counter Register */
#define REG_ADC_PTCR (*(WoReg*)0x40038120U) /**< \brief (ADC) Transfer Control Register */
#define REG_ADC_PTSR (*(RoReg*)0x40038124U) /**< \brief (ADC) Transfer Status Register */
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
#endif /* _SAM3S_ADC_INSTANCE_ */
| Java |
<?php
// (c) Copyright 2002-2012 by authors of the Tiki Wiki CMS Groupware Project
//
// All Rights Reserved. See copyright.txt for details and a complete list of authors.
// Licensed under the GNU LESSER GENERAL PUBLIC LICENSE. See license.txt for details.
// $Id: wikiplugin_titlesearch.php 41425 2012-05-11 02:02:22Z lindonb $
require_once "lib/wiki/pluginslib.php";
function wikiplugin_titlesearch_info()
{
return array(
'name' => tra('Title Search'),
'documentation' => 'PluginTitleSearch',
'description' => tra('Search pages by title'),
'prefs' => array( 'feature_wiki', 'wikiplugin_titlesearch' ),
'icon' => 'img/icons/page_find.png',
'params' => array(
'search' => array(
'required' => true,
'name' => tra('Search Criteria'),
'description' => tra('Portion of a page name.'),
'default' => '',
),
'info' => array(
'required' => false,
'name' => tra('Information'),
'description' => tra('Also show page hits or user'),
'default' => '',
'options' => array(
array('text' => '', 'value' => ''),
array('text' => tra('Hits'), 'value' => 'hits'),
array('text' => tra('User'), 'value' => 'user')
)
),
'exclude' => array(
'required' => false,
'name' => tra('Exclude'),
'description' => tra('Pipe-separated list of page names to exclude from results.'),
'default' => '',
),
'noheader' => array(
'required' => false,
'name' => tra('No Header'),
'description' => tra('Set to 1 (Yes) to have no header for the search results.'),
'default' => 0,
'options' => array(
array('text' => '', 'value' => ''),
array('text' => tra('Yes'), 'value' => 1),
array('text' => tra('No'), 'value' => 0)
)
),
),
);
}
class WikiPluginTitleSearch extends PluginsLib
{
var $expanded_params = array("exclude", "info");
function getDescription()
{
return wikiplugin_titlesearch_help();
}
function getDefaultArguments()
{
return array('exclude' => '' ,
'noheader' => 0,
'info' => false,
'search' => false,
'style' => 'table'
);
}
function getName()
{
return "TitleSearch";
}
function getVersion()
{
return preg_replace("/[Revision: $]/", '', "\$Revision: 1.25 $");
}
function run ($data, $params)
{
global $wikilib; include_once('lib/wiki/wikilib.php');
global $tikilib;
$aInfoPreset = array_keys($this->aInfoPresetNames);
$params = $this->getParams($params, true);
extract($params, EXTR_SKIP);
if (!$search) {
return $this->error("You have to define a search");
}
// no additional infos in list output
if (isset($style) && $style == 'list') $info = false;
//
/////////////////////////////////
// Create a valid list for $info
/////////////////////////////////
//
if ($info) {
$info_temp = array();
foreach ($info as $sInfo) {
if (in_array(trim($sInfo), $aInfoPreset)) {
$info_temp[] = trim($sInfo);
}
$info = $info_temp?$info_temp:
false;
}
} else {
$info = false;
}
//
/////////////////////////////////
// Process pages
/////////////////////////////////
//
$sOutput = "";
$aPages = $tikilib->list_pages(0, -1, 'pageName_desc', $search, null, false);
foreach ($aPages["data"] as $idPage => $aPage) {
if (in_array($aPage["pageName"], $exclude)) {
unset($aPages["data"][$idPage]);
$aPages["cant"]--;
}
}
//
/////////////////////////////////
// Start of Output
/////////////////////////////////
//
if (isset($noheader) && !$noheader) {
// Create header
$count = $aPages["cant"];
if (!$count) {
$sOutput .= tra("No pages found for title search")." '__".$search."__'";
} elseif ($count == 1) {
$sOutput .= tra("One page found for title search")." '__".$search."__'";
} else {
$sOutput = "$count ".tra("pages found for title search")." '__".$search."__'";
}
$sOutput .= "\n";
}
if (isset($style) && $style == 'list') {
$sOutput.=PluginsLibUtil::createList($aPages["data"]);
} else {
$sOutput.=PluginsLibUtil::createTable($aPages["data"], $info);
}
return $sOutput;
}
}
function wikiplugin_titlesearch($data, $params)
{
$plugin = new WikiPluginTitleSearch();
return $plugin->run($data, $params);
}
| Java |
/* Swfdec
* Copyright (C) 2007-2008 Benjamin Otte <[email protected]>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301 USA
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "swfdec_video.h"
#include "swfdec_as_internal.h"
#include "swfdec_as_strings.h"
#include "swfdec_debug.h"
#include "swfdec_net_stream.h"
#include "swfdec_player_internal.h"
#include "swfdec_sandbox.h"
SWFDEC_AS_NATIVE (667, 1, swfdec_video_attach_video)
void
swfdec_video_attach_video (SwfdecAsContext *cx, SwfdecAsObject *object,
guint argc, SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SwfdecVideoMovie *video;
SwfdecAsObject *o;
SWFDEC_AS_CHECK (SWFDEC_TYPE_VIDEO_MOVIE, &video, "O", &o);
if (o == NULL || !SWFDEC_IS_VIDEO_PROVIDER (o->relay)) {
SWFDEC_WARNING ("calling attachVideo without a NetStream object");
swfdec_video_movie_set_provider (video, NULL);
return;
}
swfdec_video_movie_set_provider (video, SWFDEC_VIDEO_PROVIDER (o->relay));
}
SWFDEC_AS_NATIVE (667, 2, swfdec_video_clear)
void
swfdec_video_clear (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SwfdecVideoMovie *video;
SWFDEC_AS_CHECK (SWFDEC_TYPE_VIDEO_MOVIE, &video, "");
swfdec_video_movie_clear (video);
}
static void
swfdec_video_get_width (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SwfdecVideoMovie *video;
guint w;
SWFDEC_AS_CHECK (SWFDEC_TYPE_VIDEO_MOVIE, &video, "");
if (video->provider) {
w = swfdec_video_provider_get_width (video->provider);
} else {
w = 0;
}
*rval = swfdec_as_value_from_integer (cx, w);
}
static void
swfdec_video_get_height (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SwfdecVideoMovie *video;
guint h;
SWFDEC_AS_CHECK (SWFDEC_TYPE_VIDEO_MOVIE, &video, "");
if (video->provider) {
h = swfdec_video_provider_get_height (video->provider);
} else {
h = 0;
}
*rval = swfdec_as_value_from_integer (cx, h);
}
static void
swfdec_video_get_deblocking (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SWFDEC_STUB ("Video.deblocking (get)");
*rval = swfdec_as_value_from_integer (cx, 0);
}
static void
swfdec_video_set_deblocking (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SWFDEC_STUB ("Video.deblocking (set)");
}
static void
swfdec_video_get_smoothing (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SWFDEC_STUB ("Video.smoothing (get)");
SWFDEC_AS_VALUE_SET_BOOLEAN (rval, TRUE);
}
static void
swfdec_video_set_smoothing (SwfdecAsContext *cx, SwfdecAsObject *object, guint argc,
SwfdecAsValue *argv, SwfdecAsValue *rval)
{
SWFDEC_STUB ("Video.smoothing (set)");
}
void
swfdec_video_movie_init_properties (SwfdecAsContext *cx)
{
SwfdecAsValue val;
SwfdecAsObject *video, *proto;
// FIXME: We should only initialize if the prototype Object has not been
// initialized by any object's constructor with native properties
// (TextField, TextFormat, XML, XMLNode at least)
g_return_if_fail (SWFDEC_IS_AS_CONTEXT (cx));
swfdec_as_object_get_variable (cx->global, SWFDEC_AS_STR_Video, &val);
if (!SWFDEC_AS_VALUE_IS_OBJECT (val))
return;
video = SWFDEC_AS_VALUE_GET_OBJECT (val);
swfdec_as_object_get_variable (video, SWFDEC_AS_STR_prototype, &val);
if (!SWFDEC_AS_VALUE_IS_OBJECT (val))
return;
proto = SWFDEC_AS_VALUE_GET_OBJECT (val);
swfdec_as_object_add_native_variable (proto, SWFDEC_AS_STR_width,
swfdec_video_get_width, NULL);
swfdec_as_object_add_native_variable (proto, SWFDEC_AS_STR_height,
swfdec_video_get_height, NULL);
swfdec_as_object_add_native_variable (proto, SWFDEC_AS_STR_deblocking,
swfdec_video_get_deblocking, swfdec_video_set_deblocking);
swfdec_as_object_add_native_variable (proto, SWFDEC_AS_STR_smoothing,
swfdec_video_get_smoothing, swfdec_video_set_smoothing);
}
| Java |
/*
* (C) Copyright 2014 Kurento (http://kurento.org/)
*
* All rights reserved. This program and the accompanying materials
* are made available under the terms of the GNU Lesser General Public License
* (LGPL) version 2.1 which accompanies this distribution, and is available at
* http://www.gnu.org/licenses/lgpl-2.1.html
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
*/
package org.kurento.tutorial.player;
import java.awt.Desktop;
import java.io.IOException;
import java.net.URI;
import java.net.URISyntaxException;
import org.kurento.client.EndOfStreamEvent;
import org.kurento.client.EventListener;
import org.kurento.client.FaceOverlayFilter;
import org.kurento.client.HttpGetEndpoint;
import org.kurento.client.MediaPipeline;
import org.kurento.client.PlayerEndpoint;
import org.kurento.client.KurentoClient;
/**
* HTTP Player with Kurento; the media pipeline is composed by a PlayerEndpoint
* connected to a filter (FaceOverlay) and an HttpGetEnpoint; the default
* desktop web browser is launched to play the video.
*
* @author Micael Gallego ([email protected])
* @author Boni Garcia ([email protected])
* @since 5.0.0
*/
public class KurentoHttpPlayer {
public static void main(String[] args) throws IOException,
URISyntaxException, InterruptedException {
// Connecting to Kurento Server
KurentoClient kurento = KurentoClient
.create("ws://localhost:8888/kurento");
// Creating media pipeline
MediaPipeline pipeline = kurento.createMediaPipeline();
// Creating media elements
PlayerEndpoint player = new PlayerEndpoint.Builder(pipeline,
"http://files.kurento.org/video/fiwarecut.mp4").build();
FaceOverlayFilter filter = new FaceOverlayFilter.Builder(pipeline)
.build();
filter.setOverlayedImage(
"http://files.kurento.org/imgs/mario-wings.png", -0.2F, -1.1F,
1.6F, 1.6F);
HttpGetEndpoint http = new HttpGetEndpoint.Builder(pipeline).build();
// Connecting media elements
player.connect(filter);
filter.connect(http);
// Reacting to events
player.addEndOfStreamListener(new EventListener<EndOfStreamEvent>() {
@Override
public void onEvent(EndOfStreamEvent event) {
System.out.println("The playing has finished");
System.exit(0);
}
});
// Playing media and opening the default desktop browser
player.play();
String videoUrl = http.getUrl();
Desktop.getDesktop().browse(new URI(videoUrl));
// Setting a delay to wait the EndOfStream event, previously subscribed
Thread.sleep(60000);
}
}
| Java |
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<title>CQRS.NET: Cqrs.Repositories.Queries.QueryPredicateExtensions.GetValue< TResult ></title>
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<div id="projectname">CQRS.NET
 <span id="projectnumber">2.4</span>
</div>
<div id="projectbrief">A lightweight enterprise Function as a Service (FaaS) framework to write function based serverless and micro-service applications in hybrid multi-datacentre, on-premise and Azure environments.</div>
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<h2 class="memtitle"><span class="permalink"><a href="#a185f34dfbcf58429fc407b594c55f511">◆ </a></span>GetValue< TResult >() <span class="overload">[4/7]</span></h2>
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<table class="memname">
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<td class="memname">static TResult Cqrs.Repositories.Queries.QueryPredicateExtensions.GetValue< TResult > </td>
<td>(</td>
<td class="paramtype">this <a class="el" href="classCqrs_1_1Repositories_1_1Queries_1_1QueryParameter.html">QueryParameter</a> </td>
<td class="paramname"><em>queryParameter</em></td><td>)</td>
<td></td>
</tr>
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<td class="mlabels-right">
<span class="mlabels"><span class="mlabel">static</span></span> </td>
</tr>
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<p>Gets the value from the provided <em>queryParameter</em> cast to <em>TResult</em> . </p>
<p>Gets the <a class="el" href="classCqrs_1_1Repositories_1_1Queries_1_1QueryParameter_a0d1c69ffc864aeda2eb515a9e57fbd7a.html#a0d1c69ffc864aeda2eb515a9e57fbd7a" title="The value of the parameter. ">QueryParameter.ParameterValue</a> cast to <em>TResult</em> . </p>
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| Java |
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<meta name="generator" content="Doxygen 1.8.13"/>
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<title>CQRS.NET: Cqrs.Events.SqlEventStoreDataContext.New</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
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<div id="projectname">CQRS.NET
 <span id="projectnumber">2.4</span>
</div>
<div id="projectbrief">A lightweight enterprise Function as a Service (FaaS) framework to write function based serverless and micro-service applications in hybrid multi-datacentre, on-premise and Azure environments.</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ae059fb99b1100d4d7fb917b635c1be5d">◆ </a></span>New() <span class="overload">[1/2]</span></h2>
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<td class="memname">static <a class="el" href="classCqrs_1_1Events_1_1SqlEventStoreDataContext.html">SqlEventStoreDataContext</a> Cqrs.Events.SqlEventStoreDataContext.New </td>
<td>(</td>
<td class="paramtype">Type </td>
<td class="paramname"><em>rowType</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">string </td>
<td class="paramname"><em>tableName</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">string </td>
<td class="paramname"><em>fileOrServerOrConnection</em> </td>
</tr>
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<td></td>
<td>)</td>
<td></td><td></td>
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<span class="mlabels"><span class="mlabel">static</span></span> </td>
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<p>Instantiates a new instance of the <a class="el" href="classCqrs_1_1Events_1_1SqlEventStoreDataContext.html" title="A custom DataContext that supports specifying a table name. ">SqlEventStoreDataContext</a> class by referencing a file source. </p>
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">rowType</td><td>The Type of the entity the table hold data for.</td></tr>
<tr><td class="paramname">tableName</td><td>The name of the table.</td></tr>
<tr><td class="paramname">fileOrServerOrConnection</td><td>This argument can be any one of the following: The name of a file where a SQL Server Express database resides. The name of a server where a database is present. In this case the provider uses the default database for a user. A complete connection string. LINQ to SQL just passes the string to the provider without modification. </td></tr>
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| Java |
// ---------------------------------------------------------------------
//
// Copyright (C) 2007 - 2013 by the deal.II authors
//
// This file is part of the deal.II library.
//
// The deal.II library is free software; you can use it, redistribute
// it, and/or modify it under the terms of the GNU Lesser General
// Public License as published by the Free Software Foundation; either
// version 2.1 of the License, or (at your option) any later version.
// The full text of the license can be found in the file LICENSE at
// the top level of the deal.II distribution.
//
// ---------------------------------------------------------------------
#include <deal.II/numerics/fe_field_function.templates.h>
#include <deal.II/multigrid/mg_dof_handler.h>
#include <deal.II/dofs/dof_handler.h>
#include <deal.II/dofs/dof_accessor.h>
#include <deal.II/hp/dof_handler.h>
#include <deal.II/lac/vector.h>
#include <deal.II/lac/block_vector.h>
#include <deal.II/lac/parallel_vector.h>
#include <deal.II/lac/parallel_block_vector.h>
#include <deal.II/lac/petsc_vector.h>
#include <deal.II/lac/petsc_block_vector.h>
#include <deal.II/lac/trilinos_vector.h>
#include <deal.II/lac/trilinos_block_vector.h>
DEAL_II_NAMESPACE_OPEN
namespace Functions
{
# include "fe_field_function.inst"
}
DEAL_II_NAMESPACE_CLOSE
| Java |
<?php
// (c) Copyright 2002-2013 by authors of the Tiki Wiki CMS Groupware Project
//
// All Rights Reserved. See copyright.txt for details and a complete list of authors.
// Licensed under the GNU LESSER GENERAL PUBLIC LICENSE. See license.txt for details.
// $Id: mod-func-breadcrumbs.php 44444 2013-01-05 21:24:24Z changi67 $
//this script may only be included - so its better to die if called directly.
if (strpos($_SERVER["SCRIPT_NAME"], basename(__FILE__)) !== false) {
header("location: index.php");
exit;
}
/**
* @return array
*/
function module_breadcrumbs_info()
{
return array(
'name' => tra('Breadcrumbs'),
'description' => tra('A hierarchy of where you are. Ex.: Home > Section1 > Subsection C.'),
'prefs' => array('feature_breadcrumbs'),
'params' => array(
'label' => array(
'name' => tra('Label'),
'description' => tra('Label preceding the crumbs.'),
'filter' => 'text',
'default' => 'Location : ',
),
'menuId' => array(
'name' => tra('Menu Id'),
'description' => tra('Menu to take the crumb trail from.'),
'filter' => 'int',
'default' => 0,
),
'menuStartLevel' => array(
'name' => tra('Menu Start Level'),
'description' => tra('Lowest level of the menu to display.'),
'filter' => 'int',
'default' => null,
),
'menuStopLevel' => array(
'name' => tra('Menu Stop Level'),
'description' => tra('Highest level of the menu to display.'),
'filter' => 'int',
'default' => null,
),
'showFirst' => array(
'name' => tra('Show Site Crumb'),
'description' => tra('Display the first crumb, usually the site, when using menu crumbs.'),
'filter' => 'alpha',
'default' => 'y',
),
'showLast' => array(
'name' => tra('Show Page Crumb'),
'description' => tra('Display the last crumb, usually the page, when using menu crumbs.'),
'filter' => 'alpha',
'default' => 'y',
),
'showLinks' => array(
'name' => tra('Show Crumb Links'),
'description' => tra('Display links on the crumbs.'),
'filter' => 'alpha',
'default' => 'y',
),
),
);
}
/**
* @param $mod_reference
* @param $module_params
*/
function module_breadcrumbs($mod_reference, $module_params)
{
global $prefs, $smarty, $crumbs;
if (!isset($module_params['label'])) {
if ($prefs['feature_siteloclabel'] === 'y') {
$module_params['label'] = 'Location : ';
}
}
$binfo = module_breadcrumbs_info();
$defaults = array();
foreach ($binfo['params'] as $k => $v) {
$defaults[$k] = $v['default'];
}
$module_params = array_merge($defaults, $module_params);
if (!empty($module_params['menuId'])) {
include_once('lib/breadcrumblib.php');
$newCrumbs = breadcrumb_buildMenuCrumbs($crumbs, $module_params['menuId'], $module_params['menuStartLevel'], $module_params['menuStopLevel']);
if ($newCrumbs !== $crumbs) {
$crumbs = $newCrumbs;
}
}
if ($module_params['showFirst'] === 'n') {
$crumbs[0]->hidden = true;
}
if ($module_params['showLast'] === 'n' && ($module_params['showFirst'] === 'n' || count($crumbs) > 1)) {
$crumbs[count($crumbs) - 1]->hidden = true;
}
$hide = true;
foreach ($crumbs as $crumb) {
if (!$crumb->hidden) {
$hide = false;
}
}
$smarty->assign('crumbs_all_hidden', $hide);
$smarty->assign_by_ref('trail', $crumbs);
$smarty->assign('module_params', $module_params);
}
| Java |
module IB
module SimpleStop
extend OrderPrototype
class << self
def defaults
super.merge order_type: :stop
end
def aliases
super.merge aux_price: :price
end
def requirements
super.merge aux_price: 'Price where the action is triggert. Aliased as :price'
end
def summary
<<-HERE
A Stop order is an instruction to submit a buy or sell market order if and when the
user-specified stop trigger price is attained or penetrated. A Stop order is not guaranteed
a specific execution price and may execute significantly away from its stop price.
A Sell Stop order is always placed below the current market price and is typically used
to limit a loss or protect a profit on a long stock position.
A Buy Stop order is always placed above the current market price. It is typically used
to limit a loss or help protect a profit on a short sale.
HERE
end
end
end
module StopLimit
extend OrderPrototype
class << self
def defaults
super.merge order_type: :stop_limit
end
def aliases
Limit.aliases.merge aux_price: :stop_price
end
def requirements
Limit.requirements.merge aux_price: 'Price where the action is triggert. Aliased as :stop_price'
end
def summary
<<-HERE
A Stop-Limit order is an instruction to submit a buy or sell limit order when
the user-specified stop trigger price is attained or penetrated. The order has
two basic components: the stop price and the limit price. When a trade has occurred
at or through the stop price, the order becomes executable and enters the market
as a limit order, which is an order to buy or sell at a specified price or better.
HERE
end
end
end
module StopProtected
extend OrderPrototype
class << self
def defaults
super.merge order_type: :stop_protected
end
def aliases
SimpleStop.aliases
end
def requirements
SimpleStop.requirements
end
def summary
<<-HERE
US-Futures only
----------------------------
A Stop with Protection order combines the functionality of a stop limit order
with a market with protection order. The order is set to trigger at a specified
stop price. When the stop price is penetrated, the order is triggered as a
market with protection order, which means that it will fill within a specified
protected price range equal to the trigger price +/- the exchange-defined protection
point range. Any portion of the order that does not fill within this protected
range is submitted as a limit order at the exchange-defined trigger price +/-
the protection points.
HERE
end
end
end
# module OrderPrototype
module TrailingStop
extend OrderPrototype
class << self
def defaults
super.merge order_type: :trailing_stop , tif: :day
end
def aliases
super.merge trail_stop_price: :price,
aux_price: :trailing_amount
end
def requirements
## usualy the trail_stop_price is the market-price minus(plus) the trailing_amount
super.merge trail_stop_price: 'Price to trigger the action, aliased as :price'
end
def alternative_parameters
{ aux_price: 'Trailing distance in absolute terms, aliased as :trailing_amount',
trailing_percent: 'Trailing distance in relative terms'}
end
def summary
<<-HERE
A "Sell" trailing stop order sets the stop price at a fixed amount below the market
price with an attached "trailing" amount. As the market price rises, the stop price
rises by the trail amount, but if the stock price falls, the stop loss price doesn't
change, and a market order is submitted when the stop price is hit. This technique
is designed to allow an investor to specify a limit on the maximum possible loss,
without setting a limit on the maximum possible gain.
"Buy" trailing stop orders are the mirror image of sell trailing stop orders, and
are most appropriate for use in falling markets.
Note that Trailing Stop orders can have the trailing amount specified as a percent,
or as an absolute amount which is specified in the auxPrice field.
HERE
end # summary
end # class self
end # module
module TrailingStopLimit
extend OrderPrototype
class << self
def defaults
super.merge order_type: :trailing_limit , tif: :day
end
def aliases
Limit.aliases
end
def requirements
super.merge trail_stop_price: 'Price to trigger the action',
limit_price_offset: 'a pRICE'
end
def alternative_parameters
{ aux_price: 'Trailing distance in absolute terms',
trailing_percent: 'Trailing distance in relative terms'}
end
def summary
<<-HERE
A trailing stop limit order is designed to allow an investor to specify a
limit on the maximum possible loss, without setting a limit on the maximum
possible gain. A SELL trailing stop limit moves with the market price, and
continually recalculates the stop trigger price at a fixed amount below
the market price, based on the user-defined "trailing" amount. The limit
order price is also continually recalculated based on the limit offset. As
the market price rises, both the stop price and the limit price rise by
the trail amount and limit offset respectively, but if the stock price
falls, the stop price remains unchanged, and when the stop price is hit a
limit order is submitted at the last calculated limit price. A "Buy"
trailing stop limit order is the mirror image of a sell trailing stop
limit, and is generally used in falling markets.
Products: BOND, CFD, CASH, FUT, FOP, OPT, STK, WAR
HERE
end
end
# def TrailingStopLimit(action:str, quantity:float, lmtPriceOffset:float,
# trailingAmount:float, trailStopPrice:float):
#
# # ! [trailingstoplimit]
# order = Order()
# order.action = action
# order.orderType = "TRAIL LIMIT"
# order.totalQuantity = quantity
# order.trailStopPrice = trailStopPrice
# order.lmtPriceOffset = lmtPriceOffset
# order.auxPrice = trailingAmount
# # ! [trailingstoplimit]
# return order
#
#
end
end
| Java |
/* ===========================================================
* JFreeChart : a free chart library for the Java(tm) platform
* ===========================================================
*
* (C) Copyright 2000-2016, by Object Refinery Limited and Contributors.
*
* Project Info: http://www.jfree.org/jfreechart/index.html
*
* This library is free software; you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation; either version 2.1 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
* License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
* USA.
*
* [Oracle and Java are registered trademarks of Oracle and/or its affiliates.
* Other names may be trademarks of their respective owners.]
*
* -----------------------------
* MeanAndStandardDeviation.java
* -----------------------------
* (C) Copyright 2003-2008, by Object Refinery Limited.
*
* Original Author: David Gilbert (for Object Refinery Limited);
* Contributor(s): -;
*
* Changes:
* --------
* 05-Feb-2002 : Version 1 (DG);
* 05-Feb-2005 : Added equals() method and implemented Serializable (DG);
* 02-Oct-2007 : Added getMeanValue() and getStandardDeviationValue() methods
* for convenience, and toString() method for debugging (DG);
*
*/
package org.jfree.data.statistics;
import java.io.Serializable;
import org.jfree.util.ObjectUtilities;
/**
* A simple data structure that holds a mean value and a standard deviation
* value. This is used in the
* {@link org.jfree.data.statistics.DefaultStatisticalCategoryDataset} class.
*/
public class MeanAndStandardDeviation implements Serializable {
/** For serialization. */
private static final long serialVersionUID = 7413468697315721515L;
/** The mean. */
private Number mean;
/** The standard deviation. */
private Number standardDeviation;
/**
* Creates a new mean and standard deviation record.
*
* @param mean the mean.
* @param standardDeviation the standard deviation.
*/
public MeanAndStandardDeviation(double mean, double standardDeviation) {
this(new Double(mean), new Double(standardDeviation));
}
/**
* Creates a new mean and standard deviation record.
*
* @param mean the mean ({@code null} permitted).
* @param standardDeviation the standard deviation ({@code null}
* permitted.
*/
public MeanAndStandardDeviation(Number mean, Number standardDeviation) {
this.mean = mean;
this.standardDeviation = standardDeviation;
}
/**
* Returns the mean.
*
* @return The mean.
*/
public Number getMean() {
return this.mean;
}
/**
* Returns the mean as a double primitive. If the underlying mean is
* {@code null}, this method will return {@code Double.NaN}.
*
* @return The mean.
*
* @see #getMean()
*
* @since 1.0.7
*/
public double getMeanValue() {
double result = Double.NaN;
if (this.mean != null) {
result = this.mean.doubleValue();
}
return result;
}
/**
* Returns the standard deviation.
*
* @return The standard deviation.
*/
public Number getStandardDeviation() {
return this.standardDeviation;
}
/**
* Returns the standard deviation as a double primitive. If the underlying
* standard deviation is {@code null}, this method will return
* {@code Double.NaN}.
*
* @return The standard deviation.
*
* @since 1.0.7
*/
public double getStandardDeviationValue() {
double result = Double.NaN;
if (this.standardDeviation != null) {
result = this.standardDeviation.doubleValue();
}
return result;
}
/**
* Tests this instance for equality with an arbitrary object.
*
* @param obj the object ({@code null} permitted).
*
* @return A boolean.
*/
@Override
public boolean equals(Object obj) {
if (obj == this) {
return true;
}
if (!(obj instanceof MeanAndStandardDeviation)) {
return false;
}
MeanAndStandardDeviation that = (MeanAndStandardDeviation) obj;
if (!ObjectUtilities.equal(this.mean, that.mean)) {
return false;
}
if (!ObjectUtilities.equal(
this.standardDeviation, that.standardDeviation)
) {
return false;
}
return true;
}
/**
* Returns a string representing this instance.
*
* @return A string.
*
* @since 1.0.7
*/
@Override
public String toString() {
return "[" + this.mean + ", " + this.standardDeviation + "]";
}
} | Java |
/* GTK - The GIMP Toolkit
* Copyright (C) 2011 Benjamin Otte <[email protected]>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include "config.h"
#include "gtkcssselectorprivate.h"
#include <stdlib.h>
#include <string.h>
#include "gtkcssprovider.h"
#include "gtkstylecontextprivate.h"
typedef struct _GtkCssSelectorClass GtkCssSelectorClass;
typedef gboolean (* GtkCssSelectorForeachFunc) (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
gpointer data);
struct _GtkCssSelectorClass {
const char *name;
void (* print) (const GtkCssSelector *selector,
GString *string);
/* NULL or an iterator that calls func with each submatcher of @matcher.
* Potentially no submatcher exissts.
* If any @invocation of @func returns %TRUE, the function will immediately
* return %TRUE itself. If @func never returns %TRUE (or isn't called at all),
* %FALSE will be returned.
*/
gboolean (* foreach_matcher) (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data);
gboolean (* match_one) (const GtkCssSelector *selector,
const GtkCssMatcher *matcher);
GtkCssChange (* get_change) (const GtkCssSelector *selector,
GtkCssChange previous_change);
void (* add_specificity) (const GtkCssSelector *selector,
guint *ids,
guint *classes,
guint *elements);
guint (* hash_one) (const GtkCssSelector *selector);
int (* compare_one) (const GtkCssSelector *a,
const GtkCssSelector *b);
guint is_simple :1;
};
typedef struct {
GType type;
const char *name;
} TypeReference;
typedef enum {
POSITION_FORWARD,
POSITION_BACKWARD,
POSITION_ONLY,
POSITION_SORTED
} PositionType;
#define POSITION_TYPE_BITS 4
#define POSITION_NUMBER_BITS ((sizeof (gpointer) * 8 - POSITION_TYPE_BITS) / 2)
union _GtkCssSelector
{
const GtkCssSelectorClass *class; /* type of check this selector does */
struct {
const GtkCssSelectorClass *class;
const char *name; /* interned */
} id;
struct {
const GtkCssSelectorClass *class;
const char *name; /* interned */
GtkRegionFlags flags;
} region;
struct {
const GtkCssSelectorClass *class;
GQuark style_class;
} style_class;
struct {
const GtkCssSelectorClass *class;
const TypeReference *reference;
} name;
struct {
const GtkCssSelectorClass *class;
GtkStateFlags state;
} state;
struct {
const GtkCssSelectorClass *class;
PositionType type :POSITION_TYPE_BITS;
gssize a :POSITION_NUMBER_BITS;
gssize b :POSITION_NUMBER_BITS;
} position;
};
#define GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET G_MAXINT32
struct _GtkCssSelectorTree
{
GtkCssSelector selector;
gint32 parent_offset;
gint32 previous_offset;
gint32 sibling_offset;
gint32 matches_offset; /* pointers that we return as matches if selector matches */
};
static gboolean
gtk_css_selector_equal (const GtkCssSelector *a,
const GtkCssSelector *b)
{
return
a->class == b->class &&
a->class->compare_one (a, b) == 0;
}
static guint
gtk_css_selector_hash_one (const GtkCssSelector *selector)
{
return GPOINTER_TO_UINT (selector->class) ^ selector->class->hash_one (selector);
}
static gpointer *
gtk_css_selector_tree_get_matches (const GtkCssSelectorTree *tree)
{
if (tree->matches_offset == GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET)
return NULL;
return (gpointer *) ((guint8 *)tree + tree->matches_offset);
}
static void
gtk_css_selector_tree_found_match (const GtkCssSelectorTree *tree,
GHashTable *res)
{
int i;
gpointer *matches;
matches = gtk_css_selector_tree_get_matches (tree);
if (matches)
{
for (i = 0; matches[i] != NULL; i++)
g_hash_table_insert (res, matches[i], matches[i]);
}
}
static gboolean
gtk_css_selector_match (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return selector->class->match_one (selector, matcher);
}
static gboolean
gtk_css_selector_foreach (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
return selector->class->foreach_matcher (selector, matcher, func, data);
}
static int
gtk_css_selector_compare_one (const GtkCssSelector *a, const GtkCssSelector *b)
{
if (a->class != b->class)
return strcmp (a->class->name, b->class->name);
else
return a->class->compare_one (a, b);
}
static const GtkCssSelector *
gtk_css_selector_previous (const GtkCssSelector *selector)
{
selector = selector + 1;
return selector->class ? selector : NULL;
}
static const GtkCssSelectorTree *
gtk_css_selector_tree_at_offset (const GtkCssSelectorTree *tree,
gint32 offset)
{
if (offset == GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET)
return NULL;
return (GtkCssSelectorTree *) ((guint8 *)tree + offset);
}
static const GtkCssSelectorTree *
gtk_css_selector_tree_get_parent (const GtkCssSelectorTree *tree)
{
return gtk_css_selector_tree_at_offset (tree, tree->parent_offset);
}
static const GtkCssSelectorTree *
gtk_css_selector_tree_get_previous (const GtkCssSelectorTree *tree)
{
return gtk_css_selector_tree_at_offset (tree, tree->previous_offset);
}
static const GtkCssSelectorTree *
gtk_css_selector_tree_get_sibling (const GtkCssSelectorTree *tree)
{
return gtk_css_selector_tree_at_offset (tree, tree->sibling_offset);
}
/* DEFAULTS */
static void
gtk_css_selector_default_add_specificity (const GtkCssSelector *selector,
guint *ids,
guint *classes,
guint *elements)
{
/* no specificity changes */
}
static gboolean
gtk_css_selector_default_foreach_matcher (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
return func (selector, matcher, data);
}
static gboolean
gtk_css_selector_default_match_one (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return TRUE;
}
static guint
gtk_css_selector_default_hash_one (const GtkCssSelector *selector)
{
return 0;
}
static int
gtk_css_selector_default_compare_one (const GtkCssSelector *a,
const GtkCssSelector *b)
{
return 0;
}
/* DESCENDANT */
static void
gtk_css_selector_descendant_print (const GtkCssSelector *selector,
GString *string)
{
g_string_append_c (string, ' ');
}
static gboolean
gtk_css_selector_descendant_foreach_matcher (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
GtkCssMatcher ancestor;
while (_gtk_css_matcher_get_parent (&ancestor, matcher))
{
matcher = &ancestor;
if (func (selector, &ancestor, data))
return TRUE;
/* any matchers are dangerous here, as we may loop forever, but
we can terminate now as all possible matches have already been added */
if (_gtk_css_matcher_matches_any (matcher))
break;
}
return FALSE;
}
static GtkCssChange
gtk_css_selector_descendant_get_change (const GtkCssSelector *selector, GtkCssChange previous_change)
{
return _gtk_css_change_for_child (previous_change);
}
static const GtkCssSelectorClass GTK_CSS_SELECTOR_DESCENDANT = {
"descendant",
gtk_css_selector_descendant_print,
gtk_css_selector_descendant_foreach_matcher,
gtk_css_selector_default_match_one,
gtk_css_selector_descendant_get_change,
gtk_css_selector_default_add_specificity,
gtk_css_selector_default_hash_one,
gtk_css_selector_default_compare_one,
FALSE
};
/* DESCENDANT FOR REGION */
static void
gtk_css_selector_descendant_for_region_print (const GtkCssSelector *selector,
GString *string)
{
g_string_append_c (string, ' ');
}
static gboolean
gtk_css_selector_descendant_for_region_foreach_matcher (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
GtkCssMatcher ancestor;
if (_gtk_css_matcher_has_regions (matcher))
{
if (func (selector, matcher, data))
return TRUE;
}
while (_gtk_css_matcher_get_parent (&ancestor, matcher))
{
matcher = &ancestor;
if (func (selector, matcher, data))
return TRUE;
/* any matchers are dangerous here, as we may loop forever, but
we can terminate now as all possible matches have already been added */
if (_gtk_css_matcher_matches_any (matcher))
break;
}
return FALSE;
}
static GtkCssChange
gtk_css_selector_descendant_for_region_get_change (const GtkCssSelector *selector, GtkCssChange previous_change)
{
return previous_change | _gtk_css_change_for_child (previous_change);
}
static const GtkCssSelectorClass GTK_CSS_SELECTOR_DESCENDANT_FOR_REGION = {
"descendant_for_region",
gtk_css_selector_descendant_for_region_print,
gtk_css_selector_descendant_for_region_foreach_matcher,
gtk_css_selector_default_match_one,
gtk_css_selector_descendant_for_region_get_change,
gtk_css_selector_default_add_specificity,
gtk_css_selector_default_hash_one,
gtk_css_selector_default_compare_one,
FALSE
};
/* CHILD */
static void
gtk_css_selector_child_print (const GtkCssSelector *selector,
GString *string)
{
g_string_append (string, " > ");
}
static gboolean
gtk_css_selector_child_foreach_matcher (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
GtkCssMatcher parent;
if (!_gtk_css_matcher_get_parent (&parent, matcher))
return FALSE;
return func (selector, &parent, data);
}
static GtkCssChange
gtk_css_selector_child_get_change (const GtkCssSelector *selector, GtkCssChange previous_change)
{
return _gtk_css_change_for_child (previous_change);
}
static const GtkCssSelectorClass GTK_CSS_SELECTOR_CHILD = {
"child",
gtk_css_selector_child_print,
gtk_css_selector_child_foreach_matcher,
gtk_css_selector_default_match_one,
gtk_css_selector_child_get_change,
gtk_css_selector_default_add_specificity,
gtk_css_selector_default_hash_one,
gtk_css_selector_default_compare_one,
FALSE
};
/* SIBLING */
static void
gtk_css_selector_sibling_print (const GtkCssSelector *selector,
GString *string)
{
g_string_append (string, " ~ ");
}
static gboolean
gtk_css_selector_sibling_foreach_matcher (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
GtkCssMatcher previous;
while (_gtk_css_matcher_get_previous (&previous, matcher))
{
matcher = &previous;
if (func (selector, matcher, data))
return TRUE;
/* any matchers are dangerous here, as we may loop forever, but
we can terminate now as all possible matches have already been added */
if (_gtk_css_matcher_matches_any (matcher))
break;
}
return FALSE;
}
static GtkCssChange
gtk_css_selector_sibling_get_change (const GtkCssSelector *selector, GtkCssChange previous_change)
{
return _gtk_css_change_for_sibling (previous_change);
}
static const GtkCssSelectorClass GTK_CSS_SELECTOR_SIBLING = {
"sibling",
gtk_css_selector_sibling_print,
gtk_css_selector_sibling_foreach_matcher,
gtk_css_selector_default_match_one,
gtk_css_selector_sibling_get_change,
gtk_css_selector_default_add_specificity,
gtk_css_selector_default_hash_one,
gtk_css_selector_default_compare_one,
FALSE
};
/* ADJACENT */
static void
gtk_css_selector_adjacent_print (const GtkCssSelector *selector,
GString *string)
{
g_string_append (string, " + ");
}
static gboolean
gtk_css_selector_adjacent_foreach_matcher (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
GtkCssSelectorForeachFunc func,
gpointer data)
{
GtkCssMatcher previous;
if (!_gtk_css_matcher_get_previous (&previous, matcher))
return FALSE;
return func (selector, &previous, data);
}
static GtkCssChange
gtk_css_selector_adjacent_get_change (const GtkCssSelector *selector, GtkCssChange previous_change)
{
return _gtk_css_change_for_sibling (previous_change);
}
static const GtkCssSelectorClass GTK_CSS_SELECTOR_ADJACENT = {
"adjacent",
gtk_css_selector_adjacent_print,
gtk_css_selector_adjacent_foreach_matcher,
gtk_css_selector_default_match_one,
gtk_css_selector_adjacent_get_change,
gtk_css_selector_default_add_specificity,
gtk_css_selector_default_hash_one,
gtk_css_selector_default_compare_one,
FALSE
};
/* SIMPLE SELECTOR DEFINE */
#define DEFINE_SIMPLE_SELECTOR(n, \
c, \
print_func, \
match_func, \
hash_func, \
comp_func, \
increase_id_specificity, \
increase_class_specificity, \
increase_element_specificity) \
static void \
gtk_css_selector_ ## n ## _print (const GtkCssSelector *selector, \
GString *string) \
{ \
print_func (selector, string); \
} \
\
static void \
gtk_css_selector_not_ ## n ## _print (const GtkCssSelector *selector, \
GString *string) \
{ \
g_string_append (string, ":not("); \
print_func (selector, string); \
g_string_append (string, ")"); \
} \
\
static gboolean \
gtk_css_selector_not_ ## n ## _match_one (const GtkCssSelector *selector, \
const GtkCssMatcher *matcher) \
{ \
return !match_func (selector, matcher); \
} \
\
static GtkCssChange \
gtk_css_selector_ ## n ## _get_change (const GtkCssSelector *selector, GtkCssChange previous_change) \
{ \
return previous_change | GTK_CSS_CHANGE_ ## c; \
} \
\
static void \
gtk_css_selector_ ## n ## _add_specificity (const GtkCssSelector *selector, \
guint *ids, \
guint *classes, \
guint *elements) \
{ \
if (increase_id_specificity) \
(*ids)++; \
if (increase_class_specificity) \
(*classes)++; \
if (increase_element_specificity) \
(*elements)++; \
} \
\
static const GtkCssSelectorClass GTK_CSS_SELECTOR_ ## c = { \
G_STRINGIFY(n), \
gtk_css_selector_ ## n ## _print, \
gtk_css_selector_default_foreach_matcher, \
match_func, \
gtk_css_selector_ ## n ## _get_change, \
gtk_css_selector_ ## n ## _add_specificity, \
hash_func, \
comp_func, \
TRUE \
};\
\
static const GtkCssSelectorClass GTK_CSS_SELECTOR_NOT_ ## c = { \
"not_" G_STRINGIFY(n), \
gtk_css_selector_not_ ## n ## _print, \
gtk_css_selector_default_foreach_matcher, \
gtk_css_selector_not_ ## n ## _match_one, \
gtk_css_selector_ ## n ## _get_change, \
gtk_css_selector_ ## n ## _add_specificity, \
hash_func, \
comp_func, \
TRUE \
};
/* ANY */
static void
print_any (const GtkCssSelector *selector,
GString *string)
{
g_string_append_c (string, '*');
}
static gboolean
match_any (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return TRUE;
}
#undef GTK_CSS_CHANGE_ANY
#define GTK_CSS_CHANGE_ANY 0
DEFINE_SIMPLE_SELECTOR(any, ANY, print_any, match_any,
gtk_css_selector_default_hash_one, gtk_css_selector_default_compare_one,
FALSE, FALSE, FALSE)
#undef GTK_CSS_CHANGE_ANY
/* NAME */
static GHashTable *type_refs_ht = NULL;
static guint type_refs_last_serial = 0;
static TypeReference *
get_type_reference (const char *name)
{
TypeReference *ref;
if (type_refs_ht == NULL)
type_refs_ht = g_hash_table_new (g_str_hash, g_str_equal);
ref = g_hash_table_lookup (type_refs_ht, name);
if (ref != NULL)
return ref;
ref = g_slice_new (TypeReference);
ref->name = g_intern_string (name);
ref->type = g_type_from_name (ref->name);
g_hash_table_insert (type_refs_ht,
(gpointer)ref->name, ref);
return ref;
}
static void
update_type_references (void)
{
GHashTableIter iter;
guint serial;
gpointer value;
serial = g_type_get_type_registration_serial ();
if (serial == type_refs_last_serial)
return;
type_refs_last_serial = serial;
if (type_refs_ht == NULL)
return;
g_hash_table_iter_init (&iter, type_refs_ht);
while (g_hash_table_iter_next (&iter,
NULL, &value))
{
TypeReference *ref = value;
if (ref->type == G_TYPE_INVALID)
ref->type = g_type_from_name (ref->name);
}
}
static void
print_name (const GtkCssSelector *selector,
GString *string)
{
g_string_append (string, selector->name.reference->name);
}
static gboolean
match_name (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return _gtk_css_matcher_has_type (matcher, selector->name.reference->type);
}
static guint
hash_name (const GtkCssSelector *a)
{
return g_str_hash (a->name.reference->name);
}
static int
comp_name (const GtkCssSelector *a,
const GtkCssSelector *b)
{
return strcmp (a->name.reference->name,
b->name.reference->name);
}
DEFINE_SIMPLE_SELECTOR(name, NAME, print_name, match_name, hash_name, comp_name, FALSE, FALSE, TRUE)
/* REGION */
static void
gtk_css_selector_region_print (const GtkCssSelector *selector,
GString *string)
{
char *region_names[] = {
"even",
"odd",
"first-child",
"last-child",
"only-child",
"sorted"
};
guint i;
g_string_append (string, selector->region.name);
for (i = 0; i < G_N_ELEMENTS (region_names); i++)
{
if (selector->region.flags & (1 << i))
{
g_string_append_c (string, ':');
g_string_append (string, region_names[i]);
}
}
}
static gboolean
gtk_css_selector_region_match_one (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return _gtk_css_matcher_has_region (matcher, selector->region.name, selector->region.flags);
}
static GtkCssChange
gtk_css_selector_region_get_change (const GtkCssSelector *selector, GtkCssChange previous_change)
{
return previous_change | GTK_CSS_CHANGE_REGION;
}
static guint
count_bits (guint n)
{
guint result = 0;
for (result = 0; n != 0; result++)
n &= n - 1;
return result;
}
static void
gtk_css_selector_region_add_specificity (const GtkCssSelector *selector,
guint *ids,
guint *classes,
guint *elements)
{
(*elements)++;
(*classes) += count_bits (selector->region.flags);
}
static guint
gtk_css_selector_region_hash_one (const GtkCssSelector *a)
{
return g_str_hash (a->region.name) ^ a->region.flags;
}
static int
gtk_css_selector_region_compare_one (const GtkCssSelector *a,
const GtkCssSelector *b)
{
int diff;
diff = strcmp (a->region.name, b->region.name);
if (diff)
return diff;
return a->region.flags - b->region.flags;
}
static const GtkCssSelectorClass GTK_CSS_SELECTOR_REGION = {
"region",
gtk_css_selector_region_print,
gtk_css_selector_default_foreach_matcher,
gtk_css_selector_region_match_one,
gtk_css_selector_region_get_change,
gtk_css_selector_region_add_specificity,
gtk_css_selector_region_hash_one,
gtk_css_selector_region_compare_one,
TRUE
};
/* CLASS */
static void
print_class (const GtkCssSelector *selector,
GString *string)
{
g_string_append_c (string, '.');
g_string_append (string, g_quark_to_string (selector->style_class.style_class));
}
static gboolean
match_class (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return _gtk_css_matcher_has_class (matcher, selector->style_class.style_class);
}
static guint
hash_class (const GtkCssSelector *a)
{
return g_str_hash (g_quark_to_string (a->style_class.style_class));
}
static int
comp_class (const GtkCssSelector *a,
const GtkCssSelector *b)
{
return strcmp (g_quark_to_string (a->style_class.style_class),
g_quark_to_string (b->style_class.style_class));
}
DEFINE_SIMPLE_SELECTOR(class, CLASS, print_class, match_class, hash_class, comp_class, FALSE, TRUE, FALSE)
/* ID */
static void
print_id (const GtkCssSelector *selector,
GString *string)
{
g_string_append_c (string, '#');
g_string_append (string, selector->id.name);
}
static gboolean
match_id (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return _gtk_css_matcher_has_id (matcher, selector->id.name);
}
static guint
hash_id (const GtkCssSelector *a)
{
return g_str_hash (a->id.name);
}
static int
comp_id (const GtkCssSelector *a,
const GtkCssSelector *b)
{
return strcmp (a->id.name, b->id.name);
}
DEFINE_SIMPLE_SELECTOR(id, ID, print_id, match_id, hash_id, comp_id, TRUE, FALSE, FALSE)
/* PSEUDOCLASS FOR STATE */
static void
print_pseudoclass_state (const GtkCssSelector *selector,
GString *string)
{
static const char * state_names[] = {
"active",
"hover",
"selected",
"insensitive",
"inconsistent",
"focus",
"backdrop",
"dir(ltr)",
"dir(rtl)",
"link",
"visited",
"checked"
};
guint i;
g_string_append_c (string, ':');
for (i = 0; i < G_N_ELEMENTS (state_names); i++)
{
if (selector->state.state == (1 << i))
{
g_string_append (string, state_names[i]);
return;
}
}
g_assert_not_reached ();
}
static gboolean
match_pseudoclass_state (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
return (_gtk_css_matcher_get_state (matcher) & selector->state.state) == selector->state.state;
}
static guint
hash_pseudoclass_state (const GtkCssSelector *selector)
{
return selector->state.state;
}
static int
comp_pseudoclass_state (const GtkCssSelector *a,
const GtkCssSelector *b)
{
return a->state.state - b->state.state;
}
#define GTK_CSS_CHANGE_PSEUDOCLASS_STATE GTK_CSS_CHANGE_STATE
DEFINE_SIMPLE_SELECTOR(pseudoclass_state, PSEUDOCLASS_STATE, print_pseudoclass_state,
match_pseudoclass_state, hash_pseudoclass_state, comp_pseudoclass_state,
FALSE, TRUE, FALSE)
#undef GTK_CSS_CHANGE_PSEUDOCLASS_STATE
/* PSEUDOCLASS FOR POSITION */
static void
print_pseudoclass_position (const GtkCssSelector *selector,
GString *string)
{
switch (selector->position.type)
{
case POSITION_FORWARD:
if (selector->position.a == 0)
{
if (selector->position.b == 1)
g_string_append (string, ":first-child");
else
g_string_append_printf (string, ":nth-child(%d)", selector->position.b);
}
else if (selector->position.a == 2 && selector->position.b == 0)
g_string_append (string, ":nth-child(even)");
else if (selector->position.a == 2 && selector->position.b == 1)
g_string_append (string, ":nth-child(odd)");
else
{
g_string_append (string, ":nth-child(");
if (selector->position.a == 1)
g_string_append (string, "n");
else if (selector->position.a == -1)
g_string_append (string, "-n");
else
g_string_append_printf (string, "%dn", selector->position.a);
if (selector->position.b > 0)
g_string_append_printf (string, "+%d)", selector->position.b);
else if (selector->position.b < 0)
g_string_append_printf (string, "%d)", selector->position.b);
else
g_string_append (string, ")");
}
break;
case POSITION_BACKWARD:
if (selector->position.a == 0)
{
if (selector->position.b == 1)
g_string_append (string, ":last-child");
else
g_string_append_printf (string, ":nth-last-child(%d)", selector->position.b);
}
else if (selector->position.a == 2 && selector->position.b == 0)
g_string_append (string, ":nth-last-child(even)");
else if (selector->position.a == 2 && selector->position.b == 1)
g_string_append (string, ":nth-last-child(odd)");
else
{
g_string_append (string, ":nth-last-child(");
if (selector->position.a == 1)
g_string_append (string, "n");
else if (selector->position.a == -1)
g_string_append (string, "-n");
else
g_string_append_printf (string, "%dn", selector->position.a);
if (selector->position.b > 0)
g_string_append_printf (string, "+%d)", selector->position.b);
else if (selector->position.b < 0)
g_string_append_printf (string, "%d)", selector->position.b);
else
g_string_append (string, ")");
}
break;
case POSITION_ONLY:
g_string_append (string, ":only-child");
break;
case POSITION_SORTED:
g_string_append (string, ":sorted");
break;
default:
g_assert_not_reached ();
break;
}
}
static gboolean
match_pseudoclass_position (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
switch (selector->position.type)
{
case POSITION_FORWARD:
if (!_gtk_css_matcher_has_position (matcher, TRUE, selector->position.a, selector->position.b))
return FALSE;
break;
case POSITION_BACKWARD:
if (!_gtk_css_matcher_has_position (matcher, FALSE, selector->position.a, selector->position.b))
return FALSE;
break;
case POSITION_ONLY:
if (!_gtk_css_matcher_has_position (matcher, TRUE, 0, 1) ||
!_gtk_css_matcher_has_position (matcher, FALSE, 0, 1))
return FALSE;
break;
case POSITION_SORTED:
return FALSE;
default:
g_assert_not_reached ();
return FALSE;
}
return TRUE;
}
static guint
hash_pseudoclass_position (const GtkCssSelector *a)
{
return (((a->position.type << POSITION_NUMBER_BITS) | a->position.a) << POSITION_NUMBER_BITS) | a->position.b;
}
static int
comp_pseudoclass_position (const GtkCssSelector *a,
const GtkCssSelector *b)
{
int diff;
diff = a->position.type - b->position.type;
if (diff)
return diff;
diff = a->position.a - b->position.a;
if (diff)
return diff;
return a->position.b - b->position.b;
}
static GtkCssChange
change_pseudoclass_position (const GtkCssSelector *selector)
{
switch (selector->position.type)
{
case POSITION_FORWARD:
if (selector->position.a == 0 && selector->position.b == 1)
return GTK_CSS_CHANGE_FIRST_CHILD;
else
return GTK_CSS_CHANGE_NTH_CHILD;
case POSITION_BACKWARD:
if (selector->position.a == 0 && selector->position.b == 1)
return GTK_CSS_CHANGE_LAST_CHILD;
else
return GTK_CSS_CHANGE_NTH_LAST_CHILD;
case POSITION_ONLY:
return GTK_CSS_CHANGE_FIRST_CHILD | GTK_CSS_CHANGE_LAST_CHILD;
default:
g_assert_not_reached ();
case POSITION_SORTED:
return 0;
}
}
#define GTK_CSS_CHANGE_PSEUDOCLASS_POSITION change_pseudoclass_position(selector)
DEFINE_SIMPLE_SELECTOR(pseudoclass_position, PSEUDOCLASS_POSITION, print_pseudoclass_position,
match_pseudoclass_position, hash_pseudoclass_position, comp_pseudoclass_position,
FALSE, TRUE, FALSE)
#undef GTK_CSS_CHANGE_PSEUDOCLASS_POSITION
/* API */
static guint
gtk_css_selector_size (const GtkCssSelector *selector)
{
guint size = 0;
while (selector)
{
selector = gtk_css_selector_previous (selector);
size++;
}
return size;
}
static GtkCssSelector *
gtk_css_selector_new (const GtkCssSelectorClass *class,
GtkCssSelector *selector)
{
guint size;
size = gtk_css_selector_size (selector);
selector = g_realloc (selector, sizeof (GtkCssSelector) * (size + 1) + sizeof (gpointer));
if (size == 0)
selector[1].class = NULL;
else
memmove (selector + 1, selector, sizeof (GtkCssSelector) * size + sizeof (gpointer));
memset (selector, 0, sizeof (GtkCssSelector));
selector->class = class;
return selector;
}
static GtkCssSelector *
parse_selector_class (GtkCssParser *parser,
GtkCssSelector *selector,
gboolean negate)
{
char *name;
name = _gtk_css_parser_try_name (parser, FALSE);
if (name == NULL)
{
_gtk_css_parser_error (parser, "Expected a valid name for class");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
selector = gtk_css_selector_new (negate ? >K_CSS_SELECTOR_NOT_CLASS
: >K_CSS_SELECTOR_CLASS,
selector);
selector->style_class.style_class = g_quark_from_string (name);
g_free (name);
return selector;
}
static GtkCssSelector *
parse_selector_id (GtkCssParser *parser,
GtkCssSelector *selector,
gboolean negate)
{
char *name;
name = _gtk_css_parser_try_name (parser, FALSE);
if (name == NULL)
{
_gtk_css_parser_error (parser, "Expected a valid name for id");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
selector = gtk_css_selector_new (negate ? >K_CSS_SELECTOR_NOT_ID
: >K_CSS_SELECTOR_ID,
selector);
selector->id.name = g_intern_string (name);
g_free (name);
return selector;
}
static GtkCssSelector *
parse_selector_pseudo_class_nth_child (GtkCssParser *parser,
GtkCssSelector *selector,
PositionType type,
gboolean negate)
{
int a, b;
if (!_gtk_css_parser_try (parser, "(", TRUE))
{
_gtk_css_parser_error (parser, "Missing opening bracket for pseudo-class");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
if (_gtk_css_parser_try (parser, "even", TRUE))
{
a = 2;
b = 0;
}
else if (_gtk_css_parser_try (parser, "odd", TRUE))
{
a = 2;
b = 1;
}
else if (type == POSITION_FORWARD &&
_gtk_css_parser_try (parser, "first", TRUE))
{
a = 0;
b = 1;
}
else if (type == POSITION_FORWARD &&
_gtk_css_parser_try (parser, "last", TRUE))
{
a = 0;
b = 1;
type = POSITION_BACKWARD;
}
else
{
int multiplier;
if (_gtk_css_parser_try (parser, "+", TRUE))
multiplier = 1;
else if (_gtk_css_parser_try (parser, "-", TRUE))
multiplier = -1;
else
multiplier = 1;
if (_gtk_css_parser_try_int (parser, &a))
{
if (a < 0)
{
_gtk_css_parser_error (parser, "Expected an integer");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
a *= multiplier;
}
else if (_gtk_css_parser_has_prefix (parser, "n"))
{
a = multiplier;
}
else
{
_gtk_css_parser_error (parser, "Expected an integer");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
if (_gtk_css_parser_try (parser, "n", TRUE))
{
if (_gtk_css_parser_try (parser, "+", TRUE))
multiplier = 1;
else if (_gtk_css_parser_try (parser, "-", TRUE))
multiplier = -1;
else
multiplier = 1;
if (_gtk_css_parser_try_int (parser, &b))
{
if (b < 0)
{
_gtk_css_parser_error (parser, "Expected an integer");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
}
else
b = 0;
b *= multiplier;
}
else
{
b = a;
a = 0;
}
}
if (!_gtk_css_parser_try (parser, ")", FALSE))
{
_gtk_css_parser_error (parser, "Missing closing bracket for pseudo-class");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
selector = gtk_css_selector_new (negate ? >K_CSS_SELECTOR_NOT_PSEUDOCLASS_POSITION
: >K_CSS_SELECTOR_PSEUDOCLASS_POSITION,
selector);
selector->position.type = type;
selector->position.a = a;
selector->position.b = b;
return selector;
}
static GtkRegionFlags
try_parse_selector_region_pseudo_class (GtkCssParser *parser)
{
static const struct {
const char *name;
GtkRegionFlags flags;
} region_flags[] = {
{ "even", GTK_REGION_EVEN },
{ "odd", GTK_REGION_ODD },
{ "first-child", GTK_REGION_FIRST },
{ "last-child", GTK_REGION_LAST },
{ "only-child", GTK_REGION_ONLY },
{ "sorted", GTK_REGION_SORTED }
};
guint i;
for (i = 0; i < G_N_ELEMENTS (region_flags); i++)
{
if (_gtk_css_parser_try (parser, region_flags[i].name, FALSE))
return region_flags[i].flags;
}
return 0;
}
static GtkCssSelector *
parse_selector_pseudo_class (GtkCssParser *parser,
GtkCssSelector *selector,
gboolean negate)
{
static const struct {
const char *name;
GtkStateFlags state_flag;
PositionType position_type;
int position_a;
int position_b;
} pseudo_classes[] = {
{ "first-child", 0, POSITION_FORWARD, 0, 1 },
{ "last-child", 0, POSITION_BACKWARD, 0, 1 },
{ "only-child", 0, POSITION_ONLY, 0, 0 },
{ "sorted", 0, POSITION_SORTED, 0, 0 },
{ "active", GTK_STATE_FLAG_ACTIVE, },
{ "prelight", GTK_STATE_FLAG_PRELIGHT, },
{ "hover", GTK_STATE_FLAG_PRELIGHT, },
{ "selected", GTK_STATE_FLAG_SELECTED, },
{ "insensitive", GTK_STATE_FLAG_INSENSITIVE, },
{ "inconsistent", GTK_STATE_FLAG_INCONSISTENT, },
{ "focused", GTK_STATE_FLAG_FOCUSED, },
{ "focus", GTK_STATE_FLAG_FOCUSED, },
{ "backdrop", GTK_STATE_FLAG_BACKDROP, },
{ "dir(ltr)", GTK_STATE_FLAG_DIR_LTR, },
{ "dir(rtl)", GTK_STATE_FLAG_DIR_RTL, },
{ "link", GTK_STATE_FLAG_LINK, },
{ "visited", GTK_STATE_FLAG_VISITED, },
{ "checked", GTK_STATE_FLAG_CHECKED, }
};
guint i;
if (_gtk_css_parser_try (parser, "nth-child", FALSE))
return parse_selector_pseudo_class_nth_child (parser, selector, POSITION_FORWARD, negate);
else if (_gtk_css_parser_try (parser, "nth-last-child", FALSE))
return parse_selector_pseudo_class_nth_child (parser, selector, POSITION_BACKWARD, negate);
for (i = 0; i < G_N_ELEMENTS (pseudo_classes); i++)
{
if (_gtk_css_parser_try (parser, pseudo_classes[i].name, FALSE))
{
if (pseudo_classes[i].state_flag)
{
selector = gtk_css_selector_new (negate ? >K_CSS_SELECTOR_NOT_PSEUDOCLASS_STATE
: >K_CSS_SELECTOR_PSEUDOCLASS_STATE,
selector);
selector->state.state = pseudo_classes[i].state_flag;
}
else
{
selector = gtk_css_selector_new (negate ? >K_CSS_SELECTOR_NOT_PSEUDOCLASS_POSITION
: >K_CSS_SELECTOR_PSEUDOCLASS_POSITION,
selector);
selector->position.type = pseudo_classes[i].position_type;
selector->position.a = pseudo_classes[i].position_a;
selector->position.b = pseudo_classes[i].position_b;
}
return selector;
}
}
_gtk_css_parser_error (parser, "Missing name of pseudo-class");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
static GtkCssSelector *
parse_selector_negation (GtkCssParser *parser,
GtkCssSelector *selector)
{
char *name;
name = _gtk_css_parser_try_ident (parser, FALSE);
if (name)
{
selector = gtk_css_selector_new (>K_CSS_SELECTOR_NOT_NAME,
selector);
selector->name.reference = get_type_reference (name);
g_free (name);
}
else if (_gtk_css_parser_try (parser, "*", FALSE))
selector = gtk_css_selector_new (>K_CSS_SELECTOR_NOT_ANY, selector);
else if (_gtk_css_parser_try (parser, "#", FALSE))
selector = parse_selector_id (parser, selector, TRUE);
else if (_gtk_css_parser_try (parser, ".", FALSE))
selector = parse_selector_class (parser, selector, TRUE);
else if (_gtk_css_parser_try (parser, ":", FALSE))
selector = parse_selector_pseudo_class (parser, selector, TRUE);
else
{
_gtk_css_parser_error (parser, "Not a valid selector for :not()");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
_gtk_css_parser_skip_whitespace (parser);
if (!_gtk_css_parser_try (parser, ")", FALSE))
{
_gtk_css_parser_error (parser, "Missing closing bracket for :not()");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
return selector;
}
static GtkCssSelector *
parse_simple_selector (GtkCssParser *parser,
GtkCssSelector *selector)
{
gboolean parsed_something = FALSE;
guint region_offset = 0;
char *name;
name = _gtk_css_parser_try_ident (parser, FALSE);
if (name)
{
if (_gtk_style_context_check_region_name (name))
{
selector = gtk_css_selector_new (>K_CSS_SELECTOR_REGION,
selector);
selector->region.name = g_intern_string (name);
region_offset = gtk_css_selector_size (selector);
}
else
{
selector = gtk_css_selector_new (>K_CSS_SELECTOR_NAME,
selector);
selector->name.reference = get_type_reference (name);
}
g_free (name);
parsed_something = TRUE;
}
else if (_gtk_css_parser_try (parser, "*", FALSE))
{
selector = gtk_css_selector_new (>K_CSS_SELECTOR_ANY, selector);
parsed_something = TRUE;
}
do {
if (_gtk_css_parser_try (parser, "#", FALSE))
selector = parse_selector_id (parser, selector, FALSE);
else if (_gtk_css_parser_try (parser, ".", FALSE))
selector = parse_selector_class (parser, selector, FALSE);
else if (_gtk_css_parser_try (parser, ":not(", TRUE))
selector = parse_selector_negation (parser, selector);
else if (_gtk_css_parser_try (parser, ":", FALSE))
{
GtkRegionFlags region_flags;
if (region_offset &&
(region_flags = try_parse_selector_region_pseudo_class (parser)))
{
selector[gtk_css_selector_size (selector) - region_offset].region.flags |= region_flags;
}
else
{
selector = parse_selector_pseudo_class (parser, selector, FALSE);
}
}
else if (!parsed_something)
{
_gtk_css_parser_error (parser, "Expected a valid selector");
if (selector)
_gtk_css_selector_free (selector);
return NULL;
}
else
break;
parsed_something = TRUE;
}
while (selector && !_gtk_css_parser_is_eof (parser));
_gtk_css_parser_skip_whitespace (parser);
/* This is the big region hack where we change the descendant matcher
* to a version that respects regions.
*/
if (selector)
{
if ((selector[0].class == >K_CSS_SELECTOR_ANY || selector[0].class == >K_CSS_SELECTOR_REGION)
&& selector[1].class == >K_CSS_SELECTOR_DESCENDANT)
selector[1].class = >K_CSS_SELECTOR_DESCENDANT_FOR_REGION;
}
return selector;
}
GtkCssSelector *
_gtk_css_selector_parse (GtkCssParser *parser)
{
GtkCssSelector *selector = NULL;
while ((selector = parse_simple_selector (parser, selector)) &&
!_gtk_css_parser_is_eof (parser) &&
!_gtk_css_parser_begins_with (parser, ',') &&
!_gtk_css_parser_begins_with (parser, '{'))
{
if (_gtk_css_parser_try (parser, "+", TRUE))
selector = gtk_css_selector_new (>K_CSS_SELECTOR_ADJACENT, selector);
else if (_gtk_css_parser_try (parser, "~", TRUE))
selector = gtk_css_selector_new (>K_CSS_SELECTOR_SIBLING, selector);
else if (_gtk_css_parser_try (parser, ">", TRUE))
selector = gtk_css_selector_new (>K_CSS_SELECTOR_CHILD, selector);
else
selector = gtk_css_selector_new (>K_CSS_SELECTOR_DESCENDANT, selector);
}
return selector;
}
void
_gtk_css_selector_free (GtkCssSelector *selector)
{
g_return_if_fail (selector != NULL);
g_free (selector);
}
void
_gtk_css_selector_print (const GtkCssSelector *selector,
GString * str)
{
const GtkCssSelector *previous;
g_return_if_fail (selector != NULL);
previous = gtk_css_selector_previous (selector);
if (previous)
_gtk_css_selector_print (previous, str);
selector->class->print (selector, str);
}
char *
_gtk_css_selector_to_string (const GtkCssSelector *selector)
{
GString *string;
g_return_val_if_fail (selector != NULL, NULL);
string = g_string_new (NULL);
_gtk_css_selector_print (selector, string);
return g_string_free (string, FALSE);
}
static gboolean
gtk_css_selector_foreach_match (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
gpointer unused)
{
selector = gtk_css_selector_previous (selector);
if (selector == NULL)
return TRUE;
if (!gtk_css_selector_match (selector, matcher))
return FALSE;
return gtk_css_selector_foreach (selector, matcher, gtk_css_selector_foreach_match, NULL);
}
/**
* _gtk_css_selector_matches:
* @selector: the selector
* @path: the path to check
* @state: The state to match
*
* Checks if the @selector matches the given @path. If @length is
* smaller than the number of elements in @path, it is assumed that
* only the first @length element of @path are valid and the rest
* does not exist. This is useful for doing parent matches for the
* 'inherit' keyword.
*
* Returns: %TRUE if the selector matches @path
**/
gboolean
_gtk_css_selector_matches (const GtkCssSelector *selector,
const GtkCssMatcher *matcher)
{
g_return_val_if_fail (selector != NULL, FALSE);
g_return_val_if_fail (matcher != NULL, FALSE);
update_type_references ();
if (!gtk_css_selector_match (selector, matcher))
return FALSE;
return gtk_css_selector_foreach (selector, matcher, gtk_css_selector_foreach_match, NULL);
}
/* Computes specificity according to CSS 2.1.
* The arguments must be initialized to 0 */
static void
_gtk_css_selector_get_specificity (const GtkCssSelector *selector,
guint *ids,
guint *classes,
guint *elements)
{
for (; selector; selector = gtk_css_selector_previous (selector))
{
selector->class->add_specificity (selector, ids, classes, elements);
}
}
int
_gtk_css_selector_compare (const GtkCssSelector *a,
const GtkCssSelector *b)
{
guint a_ids = 0, a_classes = 0, a_elements = 0;
guint b_ids = 0, b_classes = 0, b_elements = 0;
int compare;
_gtk_css_selector_get_specificity (a, &a_ids, &a_classes, &a_elements);
_gtk_css_selector_get_specificity (b, &b_ids, &b_classes, &b_elements);
compare = a_ids - b_ids;
if (compare)
return compare;
compare = a_classes - b_classes;
if (compare)
return compare;
return a_elements - b_elements;
}
GtkCssChange
_gtk_css_selector_get_change (const GtkCssSelector *selector)
{
if (selector == NULL)
return 0;
return selector->class->get_change (selector, _gtk_css_selector_get_change (gtk_css_selector_previous (selector)));
}
/******************** SelectorTree handling *****************/
static GHashTable *
gtk_css_selectors_count_initial_init (void)
{
return g_hash_table_new ((GHashFunc)gtk_css_selector_hash_one, (GEqualFunc)gtk_css_selector_equal);
}
static void
gtk_css_selectors_count_initial (const GtkCssSelector *selector, GHashTable *hash_one)
{
if (!selector->class->is_simple)
{
guint count = GPOINTER_TO_INT (g_hash_table_lookup (hash_one, selector));
g_hash_table_replace (hash_one, (gpointer)selector, GUINT_TO_POINTER (count + 1));
return;
}
for (;
selector && selector->class->is_simple;
selector = gtk_css_selector_previous (selector))
{
guint count = GPOINTER_TO_INT (g_hash_table_lookup (hash_one, selector));
g_hash_table_replace (hash_one, (gpointer)selector, GUINT_TO_POINTER (count + 1));
}
}
static gboolean
gtk_css_selectors_has_initial_selector (const GtkCssSelector *selector, const GtkCssSelector *initial)
{
if (!selector->class->is_simple)
return gtk_css_selector_equal (selector, initial);
for (;
selector && selector->class->is_simple;
selector = gtk_css_selector_previous (selector))
{
if (gtk_css_selector_equal (selector, initial))
return TRUE;
}
return FALSE;
}
static GtkCssSelector *
gtk_css_selectors_skip_initial_selector (GtkCssSelector *selector, const GtkCssSelector *initial)
{
GtkCssSelector *found;
GtkCssSelector tmp;
/* If the initial simple selector is not first, move it there so we can skip it
without losing any other selectors */
if (!gtk_css_selector_equal (selector, initial))
{
for (found = selector; found && found->class->is_simple; found = (GtkCssSelector *)gtk_css_selector_previous (found))
{
if (gtk_css_selector_equal (found, initial))
break;
}
g_assert (found != NULL && found->class->is_simple);
tmp = *found;
*found = *selector;
*selector = tmp;
}
return (GtkCssSelector *)gtk_css_selector_previous (selector);
}
static int
direct_ptr_compare (const void *_a, const void *_b)
{
gpointer *a = (gpointer *)_a;
gpointer *b = (gpointer *)_b;
if (*a < *b)
return -1;
else if (*a == *b)
return 0;
return 1;
}
static gboolean
gtk_css_selector_tree_match_foreach (const GtkCssSelector *selector,
const GtkCssMatcher *matcher,
gpointer res)
{
const GtkCssSelectorTree *tree = (const GtkCssSelectorTree *) selector;
const GtkCssSelectorTree *prev;
if (!gtk_css_selector_match (selector, matcher))
return FALSE;
gtk_css_selector_tree_found_match (tree, res);
for (prev = gtk_css_selector_tree_get_previous (tree);
prev != NULL;
prev = gtk_css_selector_tree_get_sibling (prev))
gtk_css_selector_foreach (&prev->selector, matcher, gtk_css_selector_tree_match_foreach, res);
return FALSE;
}
GPtrArray *
_gtk_css_selector_tree_match_all (const GtkCssSelectorTree *tree,
const GtkCssMatcher *matcher)
{
GHashTable *res;
GPtrArray *array;
GHashTableIter iter;
gpointer key;
update_type_references ();
res = g_hash_table_new (g_direct_hash, g_direct_equal);
for (; tree != NULL;
tree = gtk_css_selector_tree_get_sibling (tree))
gtk_css_selector_foreach (&tree->selector, matcher, gtk_css_selector_tree_match_foreach, res);
array = g_ptr_array_sized_new (g_hash_table_size (res));
g_hash_table_iter_init (&iter, res);
while (g_hash_table_iter_next (&iter, &key, NULL))
g_ptr_array_add (array, key);
g_hash_table_destroy (res);
qsort (array->pdata, array->len, sizeof (gpointer), direct_ptr_compare);
return array;
}
/* When checking for changes via the tree we need to know if a rule further
down the tree matched, because if so we need to add "our bit" to the
Change. For instance in a a match like *.class:active we'll
get a tree that first checks :active, if that matches we continue down
to the tree, and if we get a match we add CHANGE_CLASS. However, the
end of the tree where we have a match is an ANY which doesn't actually
modify the change, so we don't know if we have a match or not. We fix
this by setting GTK_CSS_CHANGE_GOT_MATCH which lets us guarantee
that change != 0 on any match. */
#define GTK_CSS_CHANGE_GOT_MATCH GTK_CSS_CHANGE_RESERVED_BIT
static GtkCssChange
gtk_css_selector_tree_collect_change (const GtkCssSelectorTree *tree)
{
GtkCssChange change = 0;
const GtkCssSelectorTree *prev;
for (prev = gtk_css_selector_tree_get_previous (tree);
prev != NULL;
prev = gtk_css_selector_tree_get_sibling (prev))
change |= gtk_css_selector_tree_collect_change (prev);
change = tree->selector.class->get_change (&tree->selector, change);
return change;
}
static GtkCssChange
gtk_css_selector_tree_get_change (const GtkCssSelectorTree *tree,
const GtkCssMatcher *matcher)
{
GtkCssChange change = 0;
const GtkCssSelectorTree *prev;
if (!gtk_css_selector_match (&tree->selector, matcher))
return 0;
if (!tree->selector.class->is_simple)
return gtk_css_selector_tree_collect_change (tree) | GTK_CSS_CHANGE_GOT_MATCH;
for (prev = gtk_css_selector_tree_get_previous (tree);
prev != NULL;
prev = gtk_css_selector_tree_get_sibling (prev))
change |= gtk_css_selector_tree_get_change (prev, matcher);
if (change || gtk_css_selector_tree_get_matches (tree))
change = tree->selector.class->get_change (&tree->selector, change & ~GTK_CSS_CHANGE_GOT_MATCH) | GTK_CSS_CHANGE_GOT_MATCH;
return change;
}
GtkCssChange
_gtk_css_selector_tree_get_change_all (const GtkCssSelectorTree *tree,
const GtkCssMatcher *matcher)
{
GtkCssChange change;
change = 0;
/* no need to foreach here because we abort for non-simple selectors */
for (; tree != NULL;
tree = gtk_css_selector_tree_get_sibling (tree))
change |= gtk_css_selector_tree_get_change (tree, matcher);
/* Never return reserved bit set */
return change & ~GTK_CSS_CHANGE_RESERVED_BIT;
}
#ifdef PRINT_TREE
static void
_gtk_css_selector_tree_print (const GtkCssSelectorTree *tree, GString *str, char *prefix)
{
gboolean first = TRUE;
int len, i;
for (; tree != NULL; tree = gtk_css_selector_tree_get_sibling (tree), first = FALSE)
{
if (!first)
g_string_append (str, prefix);
if (first)
{
if (gtk_css_selector_tree_get_sibling (tree))
g_string_append (str, "─┬─");
else
g_string_append (str, "───");
}
else
{
if (gtk_css_selector_tree_get_sibling (tree))
g_string_append (str, " ├─");
else
g_string_append (str, " └─");
}
len = str->len;
tree->selector.class->print (&tree->selector, str);
len = str->len - len;
if (gtk_css_selector_tree_get_previous (tree))
{
GString *prefix2 = g_string_new (prefix);
if (gtk_css_selector_tree_get_sibling (tree))
g_string_append (prefix2, " │ ");
else
g_string_append (prefix2, " ");
for (i = 0; i < len; i++)
g_string_append_c (prefix2, ' ');
_gtk_css_selector_tree_print (gtk_css_selector_tree_get_previous (tree), str, prefix2->str);
g_string_free (prefix2, TRUE);
}
else
g_string_append (str, "\n");
}
}
#endif
void
_gtk_css_selector_tree_match_print (const GtkCssSelectorTree *tree,
GString *str)
{
const GtkCssSelectorTree *parent;
g_return_if_fail (tree != NULL);
tree->selector.class->print (&tree->selector, str);
parent = gtk_css_selector_tree_get_parent (tree);
if (parent != NULL)
_gtk_css_selector_tree_match_print (parent, str);
}
void
_gtk_css_selector_tree_free (GtkCssSelectorTree *tree)
{
if (tree == NULL)
return;
g_free (tree);
}
typedef struct {
gpointer match;
GtkCssSelector *current_selector;
GtkCssSelectorTree **selector_match;
} GtkCssSelectorRuleSetInfo;
static GtkCssSelectorTree *
get_tree (GByteArray *array, gint32 offset)
{
return (GtkCssSelectorTree *) (array->data + offset);
}
static GtkCssSelectorTree *
alloc_tree (GByteArray *array, gint32 *offset)
{
GtkCssSelectorTree tree = { { NULL} };
*offset = array->len;
g_byte_array_append (array, (guint8 *)&tree, sizeof (GtkCssSelectorTree));
return get_tree (array, *offset);
}
static gint32
subdivide_infos (GByteArray *array, GList *infos, gint32 parent_offset)
{
GHashTable *ht;
GList *l;
GList *matched;
GList *remaining;
gint32 tree_offset;
GtkCssSelectorTree *tree;
GtkCssSelectorRuleSetInfo *info;
GtkCssSelector max_selector;
GHashTableIter iter;
guint max_count;
gpointer key, value;
GPtrArray *exact_matches;
gint32 res;
if (infos == NULL)
return GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET;
ht = gtk_css_selectors_count_initial_init ();
for (l = infos; l != NULL; l = l->next)
{
info = l->data;
gtk_css_selectors_count_initial (info->current_selector, ht);
}
/* Pick the selector with highest count, and use as decision on this level
as that makes it possible to skip the largest amount of checks later */
max_count = 0;
g_hash_table_iter_init (&iter, ht);
while (g_hash_table_iter_next (&iter, &key, &value))
{
GtkCssSelector *selector = key;
if (GPOINTER_TO_UINT (value) > max_count ||
(GPOINTER_TO_UINT (value) == max_count &&
gtk_css_selector_compare_one (selector, &max_selector) < 0))
{
max_count = GPOINTER_TO_UINT (value);
max_selector = *selector;
}
}
matched = NULL;
remaining = NULL;
tree = alloc_tree (array, &tree_offset);
tree->parent_offset = parent_offset;
tree->selector = max_selector;
exact_matches = NULL;
for (l = infos; l != NULL; l = l->next)
{
info = l->data;
if (gtk_css_selectors_has_initial_selector (info->current_selector, &max_selector))
{
info->current_selector = gtk_css_selectors_skip_initial_selector (info->current_selector, &max_selector);
if (info->current_selector == NULL)
{
/* Matches current node */
if (exact_matches == NULL)
exact_matches = g_ptr_array_new ();
g_ptr_array_add (exact_matches, info->match);
if (info->selector_match != NULL)
*info->selector_match = GUINT_TO_POINTER (tree_offset);
}
else
matched = g_list_prepend (matched, info);
}
else
{
remaining = g_list_prepend (remaining, info);
}
}
if (exact_matches)
{
g_ptr_array_add (exact_matches, NULL); /* Null terminate */
res = array->len;
g_byte_array_append (array, (guint8 *)exact_matches->pdata,
exact_matches->len * sizeof (gpointer));
g_ptr_array_free (exact_matches, TRUE);
}
else
res = GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET;
get_tree (array, tree_offset)->matches_offset = res;
res = subdivide_infos (array, matched, tree_offset);
get_tree (array, tree_offset)->previous_offset = res;
res = subdivide_infos (array, remaining, parent_offset);
get_tree (array, tree_offset)->sibling_offset = res;
g_list_free (matched);
g_list_free (remaining);
g_hash_table_unref (ht);
return tree_offset;
}
struct _GtkCssSelectorTreeBuilder {
GList *infos;
};
GtkCssSelectorTreeBuilder *
_gtk_css_selector_tree_builder_new (void)
{
return g_new0 (GtkCssSelectorTreeBuilder, 1);
}
void
_gtk_css_selector_tree_builder_free (GtkCssSelectorTreeBuilder *builder)
{
g_list_free_full (builder->infos, g_free);
g_free (builder);
}
void
_gtk_css_selector_tree_builder_add (GtkCssSelectorTreeBuilder *builder,
GtkCssSelector *selectors,
GtkCssSelectorTree **selector_match,
gpointer match)
{
GtkCssSelectorRuleSetInfo *info = g_new0 (GtkCssSelectorRuleSetInfo, 1);
info->match = match;
info->current_selector = selectors;
info->selector_match = selector_match;
builder->infos = g_list_prepend (builder->infos, info);
}
/* Convert all offsets to node-relative */
static void
fixup_offsets (GtkCssSelectorTree *tree, guint8 *data)
{
while (tree != NULL)
{
if (tree->parent_offset != GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET)
tree->parent_offset -= ((guint8 *)tree - data);
if (tree->previous_offset != GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET)
tree->previous_offset -= ((guint8 *)tree - data);
if (tree->sibling_offset != GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET)
tree->sibling_offset -= ((guint8 *)tree - data);
if (tree->matches_offset != GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET)
tree->matches_offset -= ((guint8 *)tree - data);
fixup_offsets ((GtkCssSelectorTree *)gtk_css_selector_tree_get_previous (tree), data);
tree = (GtkCssSelectorTree *)gtk_css_selector_tree_get_sibling (tree);
}
}
GtkCssSelectorTree *
_gtk_css_selector_tree_builder_build (GtkCssSelectorTreeBuilder *builder)
{
GtkCssSelectorTree *tree;
GByteArray *array;
guint8 *data;
guint len;
GList *l;
GtkCssSelectorRuleSetInfo *info;
array = g_byte_array_new ();
subdivide_infos (array, builder->infos, GTK_CSS_SELECTOR_TREE_EMPTY_OFFSET);
len = array->len;
data = g_byte_array_free (array, FALSE);
/* shrink to final size */
data = g_realloc (data, len);
tree = (GtkCssSelectorTree *)data;
fixup_offsets (tree, data);
/* Convert offsets to final pointers */
for (l = builder->infos; l != NULL; l = l->next)
{
info = l->data;
if (info->selector_match)
*info->selector_match = (GtkCssSelectorTree *)(data + GPOINTER_TO_UINT (*info->selector_match));
}
#ifdef PRINT_TREE
{
GString *s = g_string_new ("");
_gtk_css_selector_tree_print (tree, s, "");
g_print ("%s", s->str);
g_string_free (s, TRUE);
}
#endif
return tree;
}
| Java |
/*
Copyright (c) 2013, 2014 Daniel Vrátil <[email protected]>
This library is free software; you can redistribute it and/or modify it
under the terms of the GNU Library General Public License as published by
the Free Software Foundation; either version 2 of the License, or (at your
option) any later version.
This library is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
License for more details.
You should have received a copy of the GNU Library General Public License
along with this library; see the file COPYING.LIB. If not, write to the
Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
*/
#ifndef AKONADI_SEARCHREQUEST_H
#define AKONADI_SEARCHREQUEST_H
#include <QObject>
#include <QVector>
#include <QSet>
#include <QStringList>
namespace Akonadi {
namespace Server {
class Connection;
class SearchRequest: public QObject
{
Q_OBJECT
public:
SearchRequest( const QByteArray &connectionId );
~SearchRequest();
void setQuery( const QString &query );
QString query() const;
void setCollections( const QVector<qint64> &collections );
QVector<qint64> collections() const;
void setMimeTypes( const QStringList &mimeTypes );
QStringList mimeTypes() const;
void setRemoteSearch( bool remote );
bool remoteSearch() const;
/**
* Whether results should be stored after they are emitted via resultsAvailable(),
* so that they can be extracted via results() after the search is over. This
* is disabled by default.
*/
void setStoreResults( bool storeResults );
QByteArray connectionId() const;
void exec();
QSet<qint64> results() const;
Q_SIGNALS:
void resultsAvailable( const QSet<qint64> &results );
private:
void searchPlugins();
void emitResults( const QSet<qint64> &results );
QByteArray mConnectionId;
QString mQuery;
QVector<qint64> mCollections;
QStringList mMimeTypes;
bool mRemoteSearch;
bool mStoreResults;
QSet<qint64> mResults;
};
} // namespace Server
} // namespace Akonadi
#endif // AKONADI_SEARCHREQUEST_H
| Java |
/**
* Phoebe DOM Implementation.
*
* This is a C++ approximation of the W3C DOM model, which follows
* fairly closely the specifications in the various .idl files, copies of
* which are provided for reference. Most important is this one:
*
* http://www.w3.org/TR/2004/REC-DOM-Level-3-Core-20040407/idl-definitions.html
*
* Authors:
* Bob Jamison
*
* Copyright (C) 2005-2008 Bob Jamison
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* =======================================================================
* NOTES
*
*
*/
#include "svgreader.h"
#include "dom/cssreader.h"
#include "dom/ucd.h"
#include "xmlreader.h"
#include <stdarg.h>
namespace org
{
namespace w3c
{
namespace dom
{
namespace svg
{
//#########################################################################
//# M E S S A G E S
//#########################################################################
/**
*
*/
void SVGReader::error(char const *fmt, ...)
{
va_list args;
fprintf(stderr, "SVGReader:error: ");
va_start(args, fmt);
vfprintf(stderr, fmt, args);
va_end(args) ;
fprintf(stderr, "\n");
}
/**
*
*/
void SVGReader::trace(char const *fmt, ...)
{
va_list args;
fprintf(stdout, "SVGReader: ");
va_start(args, fmt);
vfprintf(stdout, fmt, args);
va_end(args) ;
fprintf(stdout, "\n");
}
//#########################################################################
//# P A R S I N G
//#########################################################################
/**
* Get the character at the position and record the fact
*/
XMLCh SVGReader::get(int p)
{
if (p >= parselen)
return 0;
XMLCh ch = parsebuf[p];
//printf("%c", ch);
lastPosition = p;
return ch;
}
/**
* Test if the given substring exists at the given position
* in parsebuf. Use get() in case of out-of-bounds
*/
bool SVGReader::match(int pos, char const *str)
{
while (*str)
{
if (get(pos++) != (XMLCh) *str++)
return false;
}
return true;
}
/**
*
*/
int SVGReader::skipwhite(int p)
{
while (p < parselen)
{
//# XML COMMENT
if (match(p, "<!--"))
{
p+=4;
bool done=false;
while (p<parselen)
{
if (match(p, "-->"))
{
p+=3;
done=true;
break;
}
p++;
}
lastPosition = p;
if (!done)
{
error("unterminated <!-- .. --> comment");
return -1;
}
}
//# C comment
else if (match(p, "/*"))
{
p+=2;
bool done=false;
while (p<parselen)
{
if (match(p, "*/"))
{
p+=2;
done=true;
break;
}
p++;
}
lastPosition = p;
if (!done)
{
error("unterminated /* .. */ comment");
return -1;
}
}
else if (!uni_is_space(get(p)))
break;
else
p++;
}
lastPosition = p;
return p;
}
/**
* get a word from the buffer
*/
int SVGReader::getWord(int p, DOMString &result)
{
XMLCh ch = get(p);
if (!uni_is_letter(ch))
return p;
DOMString str;
str.push_back(ch);
p++;
while (p < parselen)
{
ch = get(p);
if (uni_is_letter_or_digit(ch) || ch=='-' || ch=='_')
{
str.push_back(ch);
p++;
}
else if (ch == '\\')
{
p+=2;
}
else
break;
}
result = str;
return p;
}
# if 0
/**
* get a word from the buffer
*/
int SVGReader::getNumber(int p0, double &result)
{
int p=p0;
DOMString str;
//allow sign
if (get(p) == '-')
{
p++;
}
while (p < parselen)
{
XMLCh ch = get(p);
if (ch<'0' || ch>'9')
break;
str.push_back(ch);
p++;
}
if (get(p) == '.' && get(p+1)>='0' && get(p+1)<='9')
{
p++;
str.push_back('.');
while (p < parselen)
{
XMLCh ch = get(p);
if (ch<'0' || ch>'9')
break;
str.push_back(ch);
p++;
}
}
if (p>p0)
{
char *start = (char *)str.c_str();
char *end = NULL;
double val = strtod(start, &end);
if (end > start)
{
result = val;
return p;
}
}
//not a number
return p0;
}
#endif
/**
* get a word from the buffer
*/
int SVGReader::getNumber(int p0, double &result)
{
int p=p0;
char buf[64];
int i;
for (i=0 ; i<63 && p<parselen ; i++)
{
buf[i] = (char) get(p++);
}
buf[i] = '\0';
char *start = buf;
char *end = NULL;
double val = strtod(start, &end);
if (end > start)
{
result = val;
int count = (int)(end - start);
p = p0 + count;
return p;
}
//not a number
return p0;
}
bool SVGReader::parseTransform(const DOMString &str)
{
parsebuf = str;
parselen = str.size();
//printf("transform:%s\n", str.c_str());
SVGTransformList transformList;
int p = 0;
while (p < parselen)
{
p = skipwhite(p);
DOMString name;
int p2 = getWord(p, name);
if (p2<0)
return false;
if (p2<=p)
{
error("transform: need transform name");
//return false;
break;
}
p = p2;
//printf("transform name:%s\n", name.c_str());
//######### MATRIX
if (name == "matrix")
{
p = skipwhite(p);
if (get(p++) != '(')
{
error("matrix transform needs opening '('");
return false;
}
int nrVals = 0;
double vals[6];
bool seenBrace = false;
while (p < parselen && nrVals < 6)
{
p = skipwhite(p);
double val = 0.0;
p2 = getNumber(p, val);
if (p2<0)
return false;
if (p2<=p)
{
error("matrix() expected number");
return false;
}
vals[nrVals++] = val;
p = skipwhite(p2);
XMLCh ch = get(p);
if (ch == ',')
{
p++;
p = skipwhite(p);
ch = get(p);
}
if (ch == ')')
{
seenBrace = true;
p++;
break;
}
}
if (!seenBrace)
{
error("matrix() needs closing brace");
return false;
}
if (nrVals != 6)
{
error("matrix() requires exactly 6 arguments");
return false;
}
//We got our arguments
//printf("translate: %f %f %f %f %f %f\n",
// vals[0], vals[1], vals[2], vals[3], vals[4], vals[5]);
SVGMatrix matrix(vals[0], vals[1], vals[2],
vals[3], vals[4], vals[5]);
SVGTransform transform;
transform.setMatrix(matrix);
transformList.appendItem(transform);
}
//######### TRANSLATE
else if (name == "translate")
{
p = skipwhite(p);
if (get(p++) != '(')
{
error("matrix transform needs opening '('");
return false;
}
p = skipwhite(p);
double x = 0.0;
p2 = getNumber(p, x);
if (p2<0)
return false;
if (p2<=p)
{
error("translate() expected 'x' value");
return false;
}
p = skipwhite(p2);
if (get(p) == ',')
{
p++;
p = skipwhite(p);
}
double y = 0.0;
p2 = getNumber(p, y);
if (p2<0)
return false;
if (p2<=p) //no y specified. use default
y = 0.0;
p = skipwhite(p2);
if (get(p++) != ')')
{
error("translate() needs closing ')'");
return false;
}
//printf("translate: %f %f\n", x, y);
SVGTransform transform;
transform.setTranslate(x, y);
transformList.appendItem(transform);
}
//######### SCALE
else if (name == "scale")
{
p = skipwhite(p);
if (get(p++) != '(')
{
error("scale transform needs opening '('");
return false;
}
p = skipwhite(p);
double x = 0.0;
p2 = getNumber(p, x);
if (p2<0)
return false;
if (p2<=p)
{
error("scale() expected 'x' value");
return false;
}
p = skipwhite(p2);
if (get(p) == ',')
{
p++;
p = skipwhite(p);
}
double y = 0.0;
p2 = getNumber(p, y);
if (p2<0)
return false;
if (p2<=p) //no y specified. use default
y = x; // y is same as x. uniform scaling
p = skipwhite(p2);
if (get(p++) != ')')
{
error("scale() needs closing ')'");
return false;
}
//printf("scale: %f %f\n", x, y);
SVGTransform transform;
transform.setScale(x, y);
transformList.appendItem(transform);
}
//######### ROTATE
else if (name == "rotate")
{
p = skipwhite(p);
if (get(p++) != '(')
{
error("rotate transform needs opening '('");
return false;
}
p = skipwhite(p);
double angle = 0.0;
p2 = getNumber(p, angle);
if (p2<0)
return false;
if (p2<=p)
{
error("rotate() expected 'angle' value");
return false;
}
p = skipwhite(p2);
if (get(p) == ',')
{
p++;
p = skipwhite(p);
}
double cx = 0.0;
double cy = 0.0;
p2 = getNumber(p, cx);
if (p2>p)
{
p = skipwhite(p2);
if (get(p) == ',')
{
p++;
p = skipwhite(p);
}
p2 = getNumber(p, cy);
if (p2<0)
return false;
if (p2<=p)
{
error("rotate() arguments should be either rotate(angle) or rotate(angle, cx, cy)");
return false;
}
p = skipwhite(p2);
}
if (get(p++) != ')')
{
error("rotate() needs closing ')'");
return false;
}
//printf("rotate: %f %f %f\n", angle, cx, cy);
SVGTransform transform;
transform.setRotate(angle, cx, cy);
transformList.appendItem(transform);
}
//######### SKEWX
else if (name == "skewX")
{
p = skipwhite(p);
if (get(p++) != '(')
{
error("skewX transform needs opening '('");
return false;
}
p = skipwhite(p);
double x = 0.0;
p2 = getNumber(p, x);
if (p2<0)
return false;
if (p2<=p)
{
error("skewX() expected 'x' value");
return false;
}
p = skipwhite(p2);
if (get(p++) != ')')
{
error("skewX() needs closing ')'");
return false;
}
//printf("skewX: %f\n", x);
SVGTransform transform;
transform.setSkewX(x);
transformList.appendItem(transform);
}
//######### SKEWY
else if (name == "skewY")
{
p = skipwhite(p);
if (get(p++) != '(')
{
error("skewY transform needs opening '('");
return false;
}
p = skipwhite(p);
double y = 0.0;
p2 = getNumber(p, y);
if (p2<0)
return false;
if (p2<=p)
{
error("skewY() expected 'y' value");
return false;
}
p = skipwhite(p2);
if (get(p++) != ')')
{
error("skewY() needs closing ')'");
return false;
}
//printf("skewY: %f\n", y);
SVGTransform transform;
transform.setSkewY(y);
transformList.appendItem(transform);
}
//### NONE OF THE ABOVE
else
{
error("unknown transform type:'%s'", name.c_str());
}
p = skipwhite(p);
XMLCh ch = get(p);
if (ch == ',')
{
p++;
p = skipwhite(p);
}
}//WHILE p<parselen
return true;
}
/**
*
*/
bool SVGReader::parseElement(SVGElementImplPtr parent,
ElementImplPtr sourceElem)
{
if (!parent)
{
error("NULL dest element");
return false;
}
if (!sourceElem)
{
error("NULL source element");
return false;
}
DOMString namespaceURI = sourceElem->getNamespaceURI();
//printf("namespaceURI:%s\n", namespaceURI.c_str());
DOMString tagName = sourceElem->getTagName();
printf("tag name:%s\n", tagName.c_str());
ElementPtr newElement = doc->createElementNS(namespaceURI, tagName);
if (!newElement)
{
return false;
}
NamedNodeMap &attrs = sourceElem->getAttributes();
for (unsigned int i=0 ; i<attrs.getLength() ; i++)
{
NodePtr n = attrs.item(i);
newElement->setAttribute(n->getNodeName(), n->getNodeValue());//should be exception here
}
parent->appendChild(newElement);
NodeList children = sourceElem->getChildNodes();
int nodeCount = children.getLength();
for (int i=0 ; i<nodeCount ; i++)
{
NodePtr child = children.item(i);
int typ = child->getNodeType();
if (typ == Node::TEXT_NODE)
{
NodePtr newNode = doc->createTextNode(child->getNodeValue());
parent->appendChild(newNode);
}
else if (typ == Node::CDATA_SECTION_NODE)
{
NodePtr newNode = doc->createCDATASection(child->getNodeValue());
parent->appendChild(newNode);
}
else if (newElement.get() && typ == Node::ELEMENT_NODE)
{
//ElementImplPtr childElement = dynamic_cast<ElementImpl *>(child.get());
//parseElement(newElement, childElement);
}
}
return true;
}
/**
*
*/
SVGDocumentPtr SVGReader::parse(const DocumentPtr src)
{
if (!src)
{
error("NULL source document");
return NULL;
}
DOMImplementationImpl impl;
doc = new SVGDocumentImpl(&impl, SVG_NAMESPACE, "svg" , NULL);
SVGElementImplPtr destElem = dynamic_pointer_cast<SVGElementImpl, SVGElement>(doc->getRootElement());
ElementImplPtr srcElem = dynamic_pointer_cast<ElementImpl, Element>(src->getDocumentElement());
if (!parseElement(destElem, srcElem))
{
return NULL;
}
return doc;
}
/**
*
*/
SVGDocumentPtr SVGReader::parse(const DOMString &buf)
{
/* remember, smartptrs are null-testable*/
SVGDocumentPtr svgdoc;
XmlReader parser;
DocumentPtr doc = parser.parse(buf);
if (!doc)
{
return svgdoc;
}
svgdoc = parse(doc);
return svgdoc;
}
/**
*
*/
SVGDocumentPtr SVGReader::parseFile(const DOMString &fileName)
{
/* remember, smartptrs are null-testable*/
SVGDocumentPtr svgdoc;
XmlReader parser;
DocumentPtr doc = parser.parseFile(fileName);
if (!doc)
{
error("Could not load xml doc");
return svgdoc;
}
svgdoc = parse(doc);
return svgdoc;
}
} //namespace svg
} //namespace dom
} //namespace w3c
} //namespace org
/*#########################################################################
## E N D O F F I L E
#########################################################################*/
| Java |
/****************************************************************************
**
** Copyright (C) 2014 Digia Plc and/or its subsidiary(-ies).
** Contact: http://www.qt-project.org/legal
**
** This file is part of the QtOpenGL module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Digia. For licensing terms and
** conditions see http://qt.digia.com/licensing. For further information
** use the contact form at http://qt.digia.com/contact-us.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Digia gives you certain additional
** rights. These rights are described in the Digia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3.0 as published by the Free Software
** Foundation and appearing in the file LICENSE.GPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU General Public License version 3.0 requirements will be
** met: http://www.gnu.org/copyleft/gpl.html.
**
**
** $QT_END_LICENSE$
**
****************************************************************************/
#include "qgl.h"
#include "qgl_p.h"
#include "qmap.h"
#include "qapplication.h"
#include "qcolormap.h"
#include "qdesktopwidget.h"
#include "qpixmap.h"
#include "qhash.h"
#include "qlibrary.h"
#include "qdebug.h"
#include <private/qfontengine_ft_p.h>
#include <private/qt_x11_p.h>
#include <private/qpixmap_x11_p.h>
#include <private/qimagepixmapcleanuphooks_p.h>
#include <private/qunicodetables_p.h>
#ifdef Q_OS_HPUX
// for GLXPBuffer
#include <private/qglpixelbuffer_p.h>
#endif
// We always define GLX_EXT_texture_from_pixmap ourselves because
// we can't trust system headers to do it properly
#define GLX_EXT_texture_from_pixmap 1
#define INT8 dummy_INT8
#define INT32 dummy_INT32
#include <GL/glx.h>
#undef INT8
#undef INT32
#include <X11/Xlib.h>
#include <X11/Xutil.h>
#include <X11/Xos.h>
#ifdef Q_OS_VXWORS
# ifdef open
# undef open
# endif
# ifdef getpid
# undef getpid
# endif
#endif // Q_OS_VXWORKS
#include <X11/Xatom.h>
#if defined(Q_OS_LINUX) || defined(Q_OS_BSD4)
#include <dlfcn.h>
#endif
QT_BEGIN_NAMESPACE
extern Drawable qt_x11Handle(const QPaintDevice *pd);
extern const QX11Info *qt_x11Info(const QPaintDevice *pd);
#ifndef GLX_ARB_multisample
#define GLX_SAMPLE_BUFFERS_ARB 100000
#define GLX_SAMPLES_ARB 100001
#endif
#ifndef GLX_TEXTURE_2D_BIT_EXT
#define GLX_TEXTURE_2D_BIT_EXT 0x00000002
#define GLX_TEXTURE_RECTANGLE_BIT_EXT 0x00000004
#define GLX_BIND_TO_TEXTURE_RGB_EXT 0x20D0
#define GLX_BIND_TO_TEXTURE_RGBA_EXT 0x20D1
#define GLX_BIND_TO_MIPMAP_TEXTURE_EXT 0x20D2
#define GLX_BIND_TO_TEXTURE_TARGETS_EXT 0x20D3
#define GLX_Y_INVERTED_EXT 0x20D4
#define GLX_TEXTURE_FORMAT_EXT 0x20D5
#define GLX_TEXTURE_TARGET_EXT 0x20D6
#define GLX_MIPMAP_TEXTURE_EXT 0x20D7
#define GLX_TEXTURE_FORMAT_NONE_EXT 0x20D8
#define GLX_TEXTURE_FORMAT_RGB_EXT 0x20D9
#define GLX_TEXTURE_FORMAT_RGBA_EXT 0x20DA
#define GLX_TEXTURE_2D_EXT 0x20DC
#define GLX_TEXTURE_RECTANGLE_EXT 0x20DD
#define GLX_FRONT_LEFT_EXT 0x20DE
#endif
#ifndef GLX_ARB_create_context
#define GLX_CONTEXT_DEBUG_BIT_ARB 0x00000001
#define GLX_CONTEXT_FORWARD_COMPATIBLE_BIT_ARB 0x00000002
#define GLX_CONTEXT_MAJOR_VERSION_ARB 0x2091
#define GLX_CONTEXT_MINOR_VERSION_ARB 0x2092
#define GLX_CONTEXT_FLAGS_ARB 0x2094
#endif
#ifndef GLX_ARB_create_context_profile
#define GLX_CONTEXT_CORE_PROFILE_BIT_ARB 0x00000001
#define GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB 0x00000002
#define GLX_CONTEXT_PROFILE_MASK_ARB 0x9126
#endif
/*
The qt_gl_choose_cmap function is internal and used by QGLWidget::setContext()
and GLX (not Windows). If the application can't find any sharable
colormaps, it must at least create as few colormaps as possible. The
dictionary solution below ensures only one colormap is created per visual.
Colormaps are also deleted when the application terminates.
*/
struct QCMapEntry {
QCMapEntry();
~QCMapEntry();
Colormap cmap;
bool alloc;
XStandardColormap scmap;
};
QCMapEntry::QCMapEntry()
{
cmap = 0;
alloc = false;
scmap.colormap = 0;
}
QCMapEntry::~QCMapEntry()
{
if (alloc)
XFreeColormap(X11->display, cmap);
}
typedef QHash<int, QCMapEntry *> CMapEntryHash;
typedef QHash<int, QMap<int, QRgb> > GLCMapHash;
static bool mesa_gl = false;
static bool first_time = true;
static void cleanup_cmaps();
struct QGLCMapCleanupHandler {
QGLCMapCleanupHandler() {
cmap_hash = new CMapEntryHash;
qglcmap_hash = new GLCMapHash;
}
~QGLCMapCleanupHandler() {
delete cmap_hash;
delete qglcmap_hash;
}
CMapEntryHash *cmap_hash;
GLCMapHash *qglcmap_hash;
};
Q_GLOBAL_STATIC(QGLCMapCleanupHandler, cmap_handler)
static void cleanup_cmaps()
{
CMapEntryHash *hash = cmap_handler()->cmap_hash;
QHash<int, QCMapEntry *>::ConstIterator it = hash->constBegin();
while (it != hash->constEnd()) {
delete it.value();
++it;
}
hash->clear();
cmap_handler()->qglcmap_hash->clear();
}
Colormap qt_gl_choose_cmap(Display *dpy, XVisualInfo *vi)
{
if (first_time) {
const char *v = glXQueryServerString(dpy, vi->screen, GLX_VERSION);
if (v)
mesa_gl = (strstr(v, "Mesa") != 0);
first_time = false;
}
CMapEntryHash *hash = cmap_handler()->cmap_hash;
CMapEntryHash::ConstIterator it = hash->constFind((long) vi->visualid + (vi->screen * 256));
if (it != hash->constEnd())
return it.value()->cmap; // found colormap for visual
if (vi->visualid ==
XVisualIDFromVisual((Visual *) QX11Info::appVisual(vi->screen))) {
// qDebug("Using x11AppColormap");
return QX11Info::appColormap(vi->screen);
}
QCMapEntry *x = new QCMapEntry();
XStandardColormap *c;
int n, i;
// qDebug("Choosing cmap for vID %0x", vi->visualid);
if (mesa_gl) { // we're using MesaGL
Atom hp_cmaps = XInternAtom(dpy, "_HP_RGB_SMOOTH_MAP_LIST", true);
if (hp_cmaps && vi->visual->c_class == TrueColor && vi->depth == 8) {
if (XGetRGBColormaps(dpy,RootWindow(dpy,vi->screen),&c,&n,
hp_cmaps)) {
i = 0;
while (i < n && x->cmap == 0) {
if (c[i].visualid == vi->visual->visualid) {
x->cmap = c[i].colormap;
x->scmap = c[i];
//qDebug("Using HP_RGB scmap");
}
i++;
}
XFree((char *)c);
}
}
}
if (!x->cmap) {
if (XGetRGBColormaps(dpy,RootWindow(dpy,vi->screen),&c,&n,
XA_RGB_DEFAULT_MAP)) {
for (int i = 0; i < n && x->cmap == 0; ++i) {
if (!c[i].red_max ||
!c[i].green_max ||
!c[i].blue_max ||
!c[i].red_mult ||
!c[i].green_mult ||
!c[i].blue_mult)
continue; // invalid stdcmap
if (c[i].visualid == vi->visualid) {
x->cmap = c[i].colormap;
x->scmap = c[i];
//qDebug("Using RGB_DEFAULT scmap");
}
}
XFree((char *)c);
}
}
if (!x->cmap) { // no shared cmap found
x->cmap = XCreateColormap(dpy, RootWindow(dpy,vi->screen), vi->visual,
AllocNone);
x->alloc = true;
// qDebug("Allocating cmap");
}
// colormap hash should be cleanup only when the QApplication dtor is called
if (hash->isEmpty())
qAddPostRoutine(cleanup_cmaps);
// associate cmap with visualid
hash->insert((long) vi->visualid + (vi->screen * 256), x);
return x->cmap;
}
struct QTransColor
{
VisualID vis;
int screen;
long color;
};
static QVector<QTransColor> trans_colors;
static int trans_colors_init = false;
static void find_trans_colors()
{
struct OverlayProp {
long visual;
long type;
long value;
long layer;
};
trans_colors_init = true;
Display* appDisplay = X11->display;
int scr;
int lastsize = 0;
for (scr = 0; scr < ScreenCount(appDisplay); scr++) {
QWidget* rootWin = QApplication::desktop()->screen(scr);
if (!rootWin)
return; // Should not happen
Atom overlayVisualsAtom = XInternAtom(appDisplay,
"SERVER_OVERLAY_VISUALS", True);
if (overlayVisualsAtom == XNone)
return; // Server has no overlays
Atom actualType;
int actualFormat;
ulong nItems;
ulong bytesAfter;
unsigned char *retval = 0;
int res = XGetWindowProperty(appDisplay, rootWin->winId(),
overlayVisualsAtom, 0, 10000, False,
overlayVisualsAtom, &actualType,
&actualFormat, &nItems, &bytesAfter,
&retval);
if (res != Success || actualType != overlayVisualsAtom
|| actualFormat != 32 || nItems < 4 || !retval)
return; // Error reading property
OverlayProp *overlayProps = (OverlayProp *)retval;
int numProps = nItems / 4;
trans_colors.resize(lastsize + numProps);
int j = lastsize;
for (int i = 0; i < numProps; i++) {
if (overlayProps[i].type == 1) {
trans_colors[j].vis = (VisualID)overlayProps[i].visual;
trans_colors[j].screen = scr;
trans_colors[j].color = (int)overlayProps[i].value;
j++;
}
}
XFree(overlayProps);
lastsize = j;
trans_colors.resize(lastsize);
}
}
/*****************************************************************************
QGLFormat UNIX/GLX-specific code
*****************************************************************************/
void* qglx_getProcAddress(const char* procName)
{
// On systems where the GL driver is pluggable (like Mesa), we have to use
// the glXGetProcAddressARB extension to resolve other function pointers as
// the symbols wont be in the GL library, but rather in a plugin loaded by
// the GL library.
typedef void* (*qt_glXGetProcAddressARB)(const char *);
static qt_glXGetProcAddressARB glXGetProcAddressARB = 0;
static bool triedResolvingGlxGetProcAddress = false;
if (!triedResolvingGlxGetProcAddress) {
triedResolvingGlxGetProcAddress = true;
QGLExtensionMatcher extensions(glXGetClientString(QX11Info::display(), GLX_EXTENSIONS));
if (extensions.match("GLX_ARB_get_proc_address")) {
#if defined(Q_OS_LINUX) || defined(Q_OS_BSD4)
void *handle = dlopen(NULL, RTLD_LAZY);
if (handle) {
glXGetProcAddressARB = (qt_glXGetProcAddressARB) dlsym(handle, "glXGetProcAddressARB");
dlclose(handle);
}
if (!glXGetProcAddressARB)
#endif
{
#if !defined(QT_NO_LIBRARY)
extern const QString qt_gl_library_name();
QLibrary lib(qt_gl_library_name());
lib.setLoadHints(QLibrary::ImprovedSearchHeuristics);
glXGetProcAddressARB = (qt_glXGetProcAddressARB) lib.resolve("glXGetProcAddressARB");
#endif
}
}
}
void *procAddress = 0;
if (glXGetProcAddressARB)
procAddress = glXGetProcAddressARB(procName);
// If glXGetProcAddress didn't work, try looking the symbol up in the GL library
#if defined(Q_OS_LINUX) || defined(Q_OS_BSD4)
if (!procAddress) {
void *handle = dlopen(NULL, RTLD_LAZY);
if (handle) {
procAddress = dlsym(handle, procName);
dlclose(handle);
}
}
#endif
#if !defined(QT_NO_LIBRARY)
if (!procAddress) {
extern const QString qt_gl_library_name();
QLibrary lib(qt_gl_library_name());
lib.setLoadHints(QLibrary::ImprovedSearchHeuristics);
procAddress = lib.resolve(procName);
}
#endif
return procAddress;
}
bool QGLFormat::hasOpenGL()
{
return glXQueryExtension(X11->display, 0, 0) != 0;
}
bool QGLFormat::hasOpenGLOverlays()
{
if (!trans_colors_init)
find_trans_colors();
return trans_colors.size() > 0;
}
static bool buildSpec(int* spec, const QGLFormat& f, QPaintDevice* paintDevice,
int bufDepth, bool onlyFBConfig = false)
{
int i = 0;
spec[i++] = GLX_LEVEL;
spec[i++] = f.plane();
const QX11Info *xinfo = qt_x11Info(paintDevice);
bool useFBConfig = onlyFBConfig;
#if defined(GLX_VERSION_1_3) && !defined(QT_NO_XRENDER) && !defined(Q_OS_HPUX)
/*
HPUX defines GLX_VERSION_1_3 but does not implement the corresponding functions.
Specifically glXChooseFBConfig and glXGetVisualFromFBConfig are not implemented.
*/
QWidget* widget = 0;
if (paintDevice->devType() == QInternal::Widget)
widget = static_cast<QWidget*>(paintDevice);
// Only use glXChooseFBConfig for widgets if we're trying to get an ARGB visual
if (widget && widget->testAttribute(Qt::WA_TranslucentBackground) && X11->use_xrender)
useFBConfig = true;
#endif
#if defined(GLX_VERSION_1_1) && defined(GLX_EXT_visual_info)
static bool useTranspExt = false;
static bool useTranspExtChecked = false;
if (f.plane() && !useTranspExtChecked && paintDevice) {
QGLExtensionMatcher extensions(glXQueryExtensionsString(xinfo->display(), xinfo->screen()));
useTranspExt = extensions.match("GLX_EXT_visual_info");
//# (A bit simplistic; that could theoretically be a substring)
if (useTranspExt) {
QByteArray cstr(glXGetClientString(xinfo->display(), GLX_VENDOR));
useTranspExt = !cstr.contains("Xi Graphics"); // bug workaround
if (useTranspExt) {
// bug workaround - some systems (eg. FireGL) refuses to return an overlay
// visual if the GLX_TRANSPARENT_TYPE_EXT attribute is specified, even if
// the implementation supports transparent overlays
int tmpSpec[] = { GLX_LEVEL, f.plane(), GLX_TRANSPARENT_TYPE_EXT,
f.rgba() ? GLX_TRANSPARENT_RGB_EXT : GLX_TRANSPARENT_INDEX_EXT,
XNone };
XVisualInfo * vinf = glXChooseVisual(xinfo->display(), xinfo->screen(), tmpSpec);
if (!vinf) {
useTranspExt = false;
}
}
}
useTranspExtChecked = true;
}
if (f.plane() && useTranspExt && !useFBConfig) {
// Required to avoid non-transparent overlay visual(!) on some systems
spec[i++] = GLX_TRANSPARENT_TYPE_EXT;
spec[i++] = f.rgba() ? GLX_TRANSPARENT_RGB_EXT : GLX_TRANSPARENT_INDEX_EXT;
}
#endif
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
// GLX_RENDER_TYPE is only in glx >=1.3
if (useFBConfig) {
spec[i++] = GLX_RENDER_TYPE;
spec[i++] = f.rgba() ? GLX_RGBA_BIT : GLX_COLOR_INDEX_BIT;
}
#endif
if (f.doubleBuffer())
spec[i++] = GLX_DOUBLEBUFFER;
if (useFBConfig)
spec[i++] = True;
if (f.depth()) {
spec[i++] = GLX_DEPTH_SIZE;
spec[i++] = f.depthBufferSize() == -1 ? 1 : f.depthBufferSize();
}
if (f.stereo()) {
spec[i++] = GLX_STEREO;
if (useFBConfig)
spec[i++] = True;
}
if (f.stencil()) {
spec[i++] = GLX_STENCIL_SIZE;
spec[i++] = f.stencilBufferSize() == -1 ? 1 : f.stencilBufferSize();
}
if (f.rgba()) {
if (!useFBConfig)
spec[i++] = GLX_RGBA;
spec[i++] = GLX_RED_SIZE;
spec[i++] = f.redBufferSize() == -1 ? 1 : f.redBufferSize();
spec[i++] = GLX_GREEN_SIZE;
spec[i++] = f.greenBufferSize() == -1 ? 1 : f.greenBufferSize();
spec[i++] = GLX_BLUE_SIZE;
spec[i++] = f.blueBufferSize() == -1 ? 1 : f.blueBufferSize();
if (f.alpha()) {
spec[i++] = GLX_ALPHA_SIZE;
spec[i++] = f.alphaBufferSize() == -1 ? 1 : f.alphaBufferSize();
}
if (f.accum()) {
spec[i++] = GLX_ACCUM_RED_SIZE;
spec[i++] = f.accumBufferSize() == -1 ? 1 : f.accumBufferSize();
spec[i++] = GLX_ACCUM_GREEN_SIZE;
spec[i++] = f.accumBufferSize() == -1 ? 1 : f.accumBufferSize();
spec[i++] = GLX_ACCUM_BLUE_SIZE;
spec[i++] = f.accumBufferSize() == -1 ? 1 : f.accumBufferSize();
if (f.alpha()) {
spec[i++] = GLX_ACCUM_ALPHA_SIZE;
spec[i++] = f.accumBufferSize() == -1 ? 1 : f.accumBufferSize();
}
}
} else {
spec[i++] = GLX_BUFFER_SIZE;
spec[i++] = bufDepth;
}
if (f.sampleBuffers()) {
spec[i++] = GLX_SAMPLE_BUFFERS_ARB;
spec[i++] = 1;
spec[i++] = GLX_SAMPLES_ARB;
spec[i++] = f.samples() == -1 ? 4 : f.samples();
}
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
if (useFBConfig) {
spec[i++] = GLX_DRAWABLE_TYPE;
switch(paintDevice->devType()) {
case QInternal::Pixmap:
spec[i++] = GLX_PIXMAP_BIT;
break;
case QInternal::Pbuffer:
spec[i++] = GLX_PBUFFER_BIT;
break;
default:
qWarning("QGLContext: Unknown paint device type %d", paintDevice->devType());
// Fall-through & assume it's a window
case QInternal::Widget:
spec[i++] = GLX_WINDOW_BIT;
break;
};
}
#endif
spec[i] = XNone;
return useFBConfig;
}
/*****************************************************************************
QGLContext UNIX/GLX-specific code
*****************************************************************************/
bool QGLContext::chooseContext(const QGLContext* shareContext)
{
Q_D(QGLContext);
const QX11Info *xinfo = qt_x11Info(d->paintDevice);
Display* disp = xinfo->display();
d->vi = chooseVisual();
if (!d->vi)
return false;
if (deviceIsPixmap() &&
(((XVisualInfo*)d->vi)->depth != xinfo->depth() ||
((XVisualInfo*)d->vi)->screen != xinfo->screen()))
{
XFree(d->vi);
XVisualInfo appVisInfo;
memset(&appVisInfo, 0, sizeof(XVisualInfo));
appVisInfo.visualid = XVisualIDFromVisual((Visual *) xinfo->visual());
appVisInfo.screen = xinfo->screen();
int nvis;
d->vi = XGetVisualInfo(disp, VisualIDMask | VisualScreenMask, &appVisInfo, &nvis);
if (!d->vi)
return false;
int useGL;
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_USE_GL, &useGL);
if (!useGL)
return false; //# Chickening out already...
}
int res;
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_LEVEL, &res);
d->glFormat.setPlane(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_DOUBLEBUFFER, &res);
d->glFormat.setDoubleBuffer(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_DEPTH_SIZE, &res);
d->glFormat.setDepth(res);
if (d->glFormat.depth())
d->glFormat.setDepthBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_RGBA, &res);
d->glFormat.setRgba(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_RED_SIZE, &res);
d->glFormat.setRedBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_GREEN_SIZE, &res);
d->glFormat.setGreenBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_BLUE_SIZE, &res);
d->glFormat.setBlueBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_ALPHA_SIZE, &res);
d->glFormat.setAlpha(res);
if (d->glFormat.alpha())
d->glFormat.setAlphaBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_ACCUM_RED_SIZE, &res);
d->glFormat.setAccum(res);
if (d->glFormat.accum())
d->glFormat.setAccumBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_STENCIL_SIZE, &res);
d->glFormat.setStencil(res);
if (d->glFormat.stencil())
d->glFormat.setStencilBufferSize(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_STEREO, &res);
d->glFormat.setStereo(res);
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_SAMPLE_BUFFERS_ARB, &res);
d->glFormat.setSampleBuffers(res);
if (d->glFormat.sampleBuffers()) {
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_SAMPLES_ARB, &res);
d->glFormat.setSamples(res);
}
Bool direct = format().directRendering() ? True : False;
if (shareContext &&
(!shareContext->isValid() || !shareContext->d_func()->cx)) {
qWarning("QGLContext::chooseContext(): Cannot share with invalid context");
shareContext = 0;
}
// 1. Sharing between rgba and color-index will give wrong colors.
// 2. Contexts cannot be shared btw. direct/non-direct renderers.
// 3. Pixmaps cannot share contexts that are set up for direct rendering.
// 4. If the contexts are not created on the same screen, they can't be shared
if (shareContext
&& (format().rgba() != shareContext->format().rgba()
|| (deviceIsPixmap() && glXIsDirect(disp, (GLXContext)shareContext->d_func()->cx))
|| (shareContext->d_func()->screen != xinfo->screen())))
{
shareContext = 0;
}
const int major = d->reqFormat.majorVersion();
const int minor = d->reqFormat.minorVersion();
const int profile = d->reqFormat.profile() == QGLFormat::CompatibilityProfile
? GLX_CONTEXT_COMPATIBILITY_PROFILE_BIT_ARB
: GLX_CONTEXT_CORE_PROFILE_BIT_ARB;
d->cx = 0;
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
/*
HPUX defines GLX_VERSION_1_3 but does not implement the corresponding functions.
Specifically glXChooseFBConfig and glXGetVisualFromFBConfig are not implemented.
*/
if ((major == 3 && minor >= 2) || major > 3) {
QGLTemporaryContext *tmpContext = 0;
if (!QGLContext::currentContext())
tmpContext = new QGLTemporaryContext;
int attributes[] = { GLX_CONTEXT_MAJOR_VERSION_ARB, major,
GLX_CONTEXT_MINOR_VERSION_ARB, minor,
GLX_CONTEXT_PROFILE_MASK_ARB, profile,
0 };
typedef GLXContext ( * Q_PFNGLXCREATECONTEXTATTRIBSARBPROC)
(Display* dpy, GLXFBConfig config, GLXContext share_context, Bool direct, const int *attrib_list);
Q_PFNGLXCREATECONTEXTATTRIBSARBPROC glXCreateContextAttribs =
(Q_PFNGLXCREATECONTEXTATTRIBSARBPROC) qglx_getProcAddress("glXCreateContextAttribsARB");
if (glXCreateContextAttribs) {
int spec[45];
glXGetConfig(disp, (XVisualInfo*)d->vi, GLX_BUFFER_SIZE, &res);
buildSpec(spec, format(), d->paintDevice, res, true);
GLXFBConfig *configs;
int configCount = 0;
configs = glXChooseFBConfig(disp, xinfo->screen(), spec, &configCount);
if (configs && configCount > 0) {
d->cx = glXCreateContextAttribs(disp, configs[0],
shareContext ? (GLXContext)shareContext->d_func()->cx : 0, direct, attributes);
if (!d->cx && shareContext) {
shareContext = 0;
d->cx = glXCreateContextAttribs(disp, configs[0], 0, direct, attributes);
}
d->screen = ((XVisualInfo*)d->vi)->screen;
}
XFree(configs);
} else {
qWarning("QGLContext::chooseContext(): OpenGL %d.%d is not supported", major, minor);
}
if (tmpContext)
delete tmpContext;
}
#else
Q_UNUSED(major);
Q_UNUSED(minor);
Q_UNUSED(profile);
#endif
if (!d->cx && shareContext) {
d->cx = glXCreateContext(disp, (XVisualInfo *)d->vi,
(GLXContext)shareContext->d_func()->cx, direct);
d->screen = ((XVisualInfo*)d->vi)->screen;
}
if (!d->cx) {
d->cx = glXCreateContext(disp, (XVisualInfo *)d->vi, NULL, direct);
d->screen = ((XVisualInfo*)d->vi)->screen;
shareContext = 0;
}
if (shareContext && d->cx) {
QGLContext *share = const_cast<QGLContext *>(shareContext);
d->sharing = true;
share->d_func()->sharing = true;
}
if (!d->cx)
return false;
d->glFormat.setDirectRendering(glXIsDirect(disp, (GLXContext)d->cx));
if (deviceIsPixmap()) {
#if defined(GLX_MESA_pixmap_colormap) && defined(QGL_USE_MESA_EXT)
d->gpm = glXCreateGLXPixmapMESA(disp, (XVisualInfo *)d->vi,
qt_x11Handle(d->paintDevice),
qt_gl_choose_cmap(disp, (XVisualInfo *)d->vi));
#else
d->gpm = (quint32)glXCreateGLXPixmap(disp, (XVisualInfo *)d->vi,
qt_x11Handle(d->paintDevice));
#endif
if (!d->gpm)
return false;
}
QGLExtensionMatcher extensions(glXQueryExtensionsString(xinfo->display(), xinfo->screen()));
if (extensions.match("GLX_SGI_video_sync")) {
if (d->glFormat.swapInterval() == -1)
d->glFormat.setSwapInterval(0);
} else {
d->glFormat.setSwapInterval(-1);
}
return true;
}
/*
See qgl.cpp for qdoc comment.
*/
void *QGLContext::chooseVisual()
{
Q_D(QGLContext);
static const int bufDepths[] = { 8, 4, 2, 1 }; // Try 16, 12 also?
//todo: if pixmap, also make sure that vi->depth == pixmap->depth
void* vis = 0;
int i = 0;
bool fail = false;
QGLFormat fmt = format();
bool tryDouble = !fmt.doubleBuffer(); // Some GL impl's only have double
bool triedDouble = false;
bool triedSample = false;
if (fmt.sampleBuffers())
fmt.setSampleBuffers(QGLExtensions::glExtensions() & QGLExtensions::SampleBuffers);
while(!fail && !(vis = tryVisual(fmt, bufDepths[i]))) {
if (!fmt.rgba() && bufDepths[i] > 1) {
i++;
continue;
}
if (tryDouble) {
fmt.setDoubleBuffer(true);
tryDouble = false;
triedDouble = true;
continue;
} else if (triedDouble) {
fmt.setDoubleBuffer(false);
triedDouble = false;
}
if (!triedSample && fmt.sampleBuffers()) {
fmt.setSampleBuffers(false);
triedSample = true;
continue;
}
if (fmt.stereo()) {
fmt.setStereo(false);
continue;
}
if (fmt.accum()) {
fmt.setAccum(false);
continue;
}
if (fmt.stencil()) {
fmt.setStencil(false);
continue;
}
if (fmt.alpha()) {
fmt.setAlpha(false);
continue;
}
if (fmt.depth()) {
fmt.setDepth(false);
continue;
}
if (fmt.doubleBuffer()) {
fmt.setDoubleBuffer(false);
continue;
}
fail = true;
}
d->glFormat = fmt;
return vis;
}
/*
See qgl.cpp for qdoc comment.
*/
void *QGLContext::tryVisual(const QGLFormat& f, int bufDepth)
{
Q_D(QGLContext);
int spec[45];
const QX11Info *xinfo = qt_x11Info(d->paintDevice);
bool useFBConfig = buildSpec(spec, f, d->paintDevice, bufDepth, false);
XVisualInfo* chosenVisualInfo = 0;
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
while (useFBConfig) {
GLXFBConfig *configs;
int configCount = 0;
configs = glXChooseFBConfig(xinfo->display(), xinfo->screen(), spec, &configCount);
if (!configs)
break; // fallback to trying glXChooseVisual
for (int i = 0; i < configCount; ++i) {
XVisualInfo* vi;
vi = glXGetVisualFromFBConfig(xinfo->display(), configs[i]);
if (!vi)
continue;
#if !defined(QT_NO_XRENDER)
QWidget* w = 0;
if (d->paintDevice->devType() == QInternal::Widget)
w = static_cast<QWidget*>(d->paintDevice);
if (w && w->testAttribute(Qt::WA_TranslucentBackground) && f.alpha()) {
// Attempt to find a config who's visual has a proper alpha channel
XRenderPictFormat *pictFormat;
pictFormat = XRenderFindVisualFormat(xinfo->display(), vi->visual);
if (pictFormat && (pictFormat->type == PictTypeDirect) && pictFormat->direct.alphaMask) {
// The pict format for the visual matching the FBConfig indicates ARGB
if (chosenVisualInfo)
XFree(chosenVisualInfo);
chosenVisualInfo = vi;
break;
}
} else
#endif //QT_NO_XRENDER
if (chosenVisualInfo) {
// If we've got a visual we can use and we're not trying to find one with a
// real alpha channel, we might as well just use the one we've got
break;
}
if (!chosenVisualInfo)
chosenVisualInfo = vi; // Have something to fall back to
else
XFree(vi);
}
XFree(configs);
break;
}
#endif // defined(GLX_VERSION_1_3)
if (!chosenVisualInfo)
chosenVisualInfo = glXChooseVisual(xinfo->display(), xinfo->screen(), spec);
return chosenVisualInfo;
}
void QGLContext::reset()
{
Q_D(QGLContext);
if (!d->valid)
return;
d->cleanup();
const QX11Info *xinfo = qt_x11Info(d->paintDevice);
doneCurrent();
if (d->gpm)
glXDestroyGLXPixmap(xinfo->display(), (GLXPixmap)d->gpm);
d->gpm = 0;
glXDestroyContext(xinfo->display(), (GLXContext)d->cx);
if (d->vi)
XFree(d->vi);
d->vi = 0;
d->cx = 0;
d->crWin = false;
d->sharing = false;
d->valid = false;
d->transpColor = QColor();
d->initDone = false;
QGLContextGroup::removeShare(this);
}
void QGLContext::makeCurrent()
{
Q_D(QGLContext);
if (!d->valid) {
qWarning("QGLContext::makeCurrent(): Cannot make invalid context current.");
return;
}
const QX11Info *xinfo = qt_x11Info(d->paintDevice);
bool ok = true;
if (d->paintDevice->devType() == QInternal::Pixmap) {
ok = glXMakeCurrent(xinfo->display(), (GLXPixmap)d->gpm, (GLXContext)d->cx);
} else if (d->paintDevice->devType() == QInternal::Pbuffer) {
ok = glXMakeCurrent(xinfo->display(), (GLXPbuffer)d->pbuf, (GLXContext)d->cx);
} else if (d->paintDevice->devType() == QInternal::Widget) {
ok = glXMakeCurrent(xinfo->display(), ((QWidget *)d->paintDevice)->internalWinId(), (GLXContext)d->cx);
}
if (!ok)
qWarning("QGLContext::makeCurrent(): Failed.");
if (ok)
QGLContextPrivate::setCurrentContext(this);
}
void QGLContext::doneCurrent()
{
Q_D(QGLContext);
glXMakeCurrent(qt_x11Info(d->paintDevice)->display(), 0, 0);
QGLContextPrivate::setCurrentContext(0);
}
void QGLContext::swapBuffers() const
{
Q_D(const QGLContext);
if (!d->valid)
return;
if (!deviceIsPixmap()) {
int interval = d->glFormat.swapInterval();
if (interval > 0) {
typedef int (*qt_glXGetVideoSyncSGI)(uint *);
typedef int (*qt_glXWaitVideoSyncSGI)(int, int, uint *);
static qt_glXGetVideoSyncSGI glXGetVideoSyncSGI = 0;
static qt_glXWaitVideoSyncSGI glXWaitVideoSyncSGI = 0;
static bool resolved = false;
if (!resolved) {
const QX11Info *xinfo = qt_x11Info(d->paintDevice);
QGLExtensionMatcher extensions(glXQueryExtensionsString(xinfo->display(), xinfo->screen()));
if (extensions.match("GLX_SGI_video_sync")) {
glXGetVideoSyncSGI = (qt_glXGetVideoSyncSGI)qglx_getProcAddress("glXGetVideoSyncSGI");
glXWaitVideoSyncSGI = (qt_glXWaitVideoSyncSGI)qglx_getProcAddress("glXWaitVideoSyncSGI");
}
resolved = true;
}
if (glXGetVideoSyncSGI && glXWaitVideoSyncSGI) {
uint counter;
if (!glXGetVideoSyncSGI(&counter))
glXWaitVideoSyncSGI(interval + 1, (counter + interval) % (interval + 1), &counter);
}
}
glXSwapBuffers(qt_x11Info(d->paintDevice)->display(),
static_cast<QWidget *>(d->paintDevice)->winId());
}
}
QColor QGLContext::overlayTransparentColor() const
{
if (isValid())
return Qt::transparent;
return QColor(); // Invalid color
}
static uint qt_transparent_pixel(VisualID id, int screen)
{
for (int i = 0; i < trans_colors.size(); i++) {
if (trans_colors[i].vis == id && trans_colors[i].screen == screen)
return trans_colors[i].color;
}
return 0;
}
uint QGLContext::colorIndex(const QColor& c) const
{
Q_D(const QGLContext);
int screen = ((XVisualInfo *)d->vi)->screen;
QColormap colmap = QColormap::instance(screen);
if (isValid()) {
if (format().plane() && c == Qt::transparent) {
return qt_transparent_pixel(((XVisualInfo *)d->vi)->visualid,
((XVisualInfo *)d->vi)->screen);
}
if (((XVisualInfo*)d->vi)->visualid ==
XVisualIDFromVisual((Visual *) QX11Info::appVisual(screen)))
return colmap.pixel(c); // We're using QColor's cmap
XVisualInfo *info = (XVisualInfo *) d->vi;
CMapEntryHash *hash = cmap_handler()->cmap_hash;
CMapEntryHash::ConstIterator it = hash->constFind(long(info->visualid)
+ (info->screen * 256));
QCMapEntry *x = 0;
if (it != hash->constEnd())
x = it.value();
if (x && !x->alloc) { // It's a standard colormap
int rf = (int)(((float)c.red() * (x->scmap.red_max+1))/256.0);
int gf = (int)(((float)c.green() * (x->scmap.green_max+1))/256.0);
int bf = (int)(((float)c.blue() * (x->scmap.blue_max+1))/256.0);
uint p = x->scmap.base_pixel
+ (rf * x->scmap.red_mult)
+ (gf * x->scmap.green_mult)
+ (bf * x->scmap.blue_mult);
return p;
} else {
QMap<int, QRgb> &cmap = (*cmap_handler()->qglcmap_hash)[(long)info->visualid];
// already in the map?
QRgb target = c.rgb();
QMap<int, QRgb>::Iterator it = cmap.begin();
for (; it != cmap.end(); ++it) {
if ((*it) == target)
return it.key();
}
// need to alloc color
unsigned long plane_mask[2];
unsigned long color_map_entry;
if (!XAllocColorCells (QX11Info::display(), x->cmap, true, plane_mask, 0,
&color_map_entry, 1))
return colmap.pixel(c);
XColor col;
col.flags = DoRed | DoGreen | DoBlue;
col.pixel = color_map_entry;
col.red = (ushort)((qRed(c.rgb()) / 255.0) * 65535.0 + 0.5);
col.green = (ushort)((qGreen(c.rgb()) / 255.0) * 65535.0 + 0.5);
col.blue = (ushort)((qBlue(c.rgb()) / 255.0) * 65535.0 + 0.5);
XStoreColor(QX11Info::display(), x->cmap, &col);
cmap.insert(color_map_entry, target);
return color_map_entry;
}
}
return 0;
}
#ifndef QT_NO_FONTCONFIG
/*! \internal
This is basically a substitute for glxUseXFont() which can only
handle XLFD fonts. This version relies on freetype to render the
glyphs, but it works with all fonts that fontconfig provides - both
antialiased and aliased bitmap and outline fonts.
*/
static void qgl_use_font(QFontEngineFT *engine, int first, int count, int listBase)
{
GLfloat color[4];
glGetFloatv(GL_CURRENT_COLOR, color);
// save the pixel unpack state
GLint gl_swapbytes, gl_lsbfirst, gl_rowlength, gl_skiprows, gl_skippixels, gl_alignment;
glGetIntegerv (GL_UNPACK_SWAP_BYTES, &gl_swapbytes);
glGetIntegerv (GL_UNPACK_LSB_FIRST, &gl_lsbfirst);
glGetIntegerv (GL_UNPACK_ROW_LENGTH, &gl_rowlength);
glGetIntegerv (GL_UNPACK_SKIP_ROWS, &gl_skiprows);
glGetIntegerv (GL_UNPACK_SKIP_PIXELS, &gl_skippixels);
glGetIntegerv (GL_UNPACK_ALIGNMENT, &gl_alignment);
glPixelStorei(GL_UNPACK_SWAP_BYTES, GL_FALSE);
glPixelStorei(GL_UNPACK_LSB_FIRST, GL_FALSE);
glPixelStorei(GL_UNPACK_ROW_LENGTH, 0);
glPixelStorei(GL_UNPACK_SKIP_ROWS, 0);
glPixelStorei(GL_UNPACK_SKIP_PIXELS, 0);
glPixelStorei(GL_UNPACK_ALIGNMENT, 1);
const bool antialiased = engine->drawAntialiased();
FT_Face face = engine->lockFace();
// start generating font glyphs
for (int i = first; i < count; ++i) {
int list = listBase + i;
GLfloat x0, y0, dx, dy;
FT_Error err;
err = FT_Load_Glyph(face, FT_Get_Char_Index(face, i), FT_LOAD_DEFAULT);
if (err) {
qDebug("failed loading glyph %d from font", i);
Q_ASSERT(!err);
}
err = FT_Render_Glyph(face->glyph, (antialiased ? FT_RENDER_MODE_NORMAL
: FT_RENDER_MODE_MONO));
if (err) {
qDebug("failed rendering glyph %d from font", i);
Q_ASSERT(!err);
}
FT_Bitmap bm = face->glyph->bitmap;
x0 = face->glyph->metrics.horiBearingX >> 6;
y0 = (face->glyph->metrics.height - face->glyph->metrics.horiBearingY) >> 6;
dx = face->glyph->metrics.horiAdvance >> 6;
dy = 0;
int sz = bm.pitch * bm.rows;
uint *aa_glyph = 0;
uchar *ua_glyph = 0;
if (antialiased)
aa_glyph = new uint[sz];
else
ua_glyph = new uchar[sz];
// convert to GL format
for (int y = 0; y < bm.rows; ++y) {
for (int x = 0; x < bm.pitch; ++x) {
int c1 = y*bm.pitch + x;
int c2 = (bm.rows - y - 1) > 0 ? (bm.rows-y-1)*bm.pitch + x : x;
if (antialiased) {
aa_glyph[c1] = (int(color[0]*255) << 24)
| (int(color[1]*255) << 16)
| (int(color[2]*255) << 8) | bm.buffer[c2];
} else {
ua_glyph[c1] = bm.buffer[c2];
}
}
}
glNewList(list, GL_COMPILE);
if (antialiased) {
// calling glBitmap() is just a trick to move the current
// raster pos, since glGet*() won't work in display lists
glBitmap(0, 0, 0, 0, x0, -y0, 0);
glDrawPixels(bm.pitch, bm.rows, GL_RGBA, GL_UNSIGNED_INT_8_8_8_8, aa_glyph);
glBitmap(0, 0, 0, 0, dx-x0, y0, 0);
} else {
glBitmap(bm.pitch*8, bm.rows, -x0, y0, dx, dy, ua_glyph);
}
glEndList();
antialiased ? delete[] aa_glyph : delete[] ua_glyph;
}
engine->unlockFace();
// restore pixel unpack settings
glPixelStorei(GL_UNPACK_SWAP_BYTES, gl_swapbytes);
glPixelStorei(GL_UNPACK_LSB_FIRST, gl_lsbfirst);
glPixelStorei(GL_UNPACK_ROW_LENGTH, gl_rowlength);
glPixelStorei(GL_UNPACK_SKIP_ROWS, gl_skiprows);
glPixelStorei(GL_UNPACK_SKIP_PIXELS, gl_skippixels);
glPixelStorei(GL_UNPACK_ALIGNMENT, gl_alignment);
}
#endif
#undef d
void QGLContext::generateFontDisplayLists(const QFont & fnt, int listBase)
{
QFont f(fnt);
QFontEngine *engine = f.d->engineForScript(QUnicodeTables::Common);
if (engine->type() == QFontEngine::Multi)
engine = static_cast<QFontEngineMulti *>(engine)->engine(0);
#ifndef QT_NO_FONTCONFIG
if(engine->type() == QFontEngine::Freetype) {
qgl_use_font(static_cast<QFontEngineFT *>(engine), 0, 256, listBase);
return;
}
#endif
// glXUseXFont() only works with XLFD font structures and a few GL
// drivers crash if 0 is passed as the font handle
f.setStyleStrategy(QFont::OpenGLCompatible);
if (f.handle() && engine->type() == QFontEngine::XLFD)
glXUseXFont(static_cast<Font>(f.handle()), 0, 256, listBase);
}
void *QGLContext::getProcAddress(const QString &proc) const
{
typedef void *(*qt_glXGetProcAddressARB)(const GLubyte *);
static qt_glXGetProcAddressARB glXGetProcAddressARB = 0;
static bool resolved = false;
if (resolved && !glXGetProcAddressARB)
return 0;
if (!glXGetProcAddressARB) {
QGLExtensionMatcher extensions(glXGetClientString(QX11Info::display(), GLX_EXTENSIONS));
if (extensions.match("GLX_ARB_get_proc_address")) {
#if defined(Q_OS_LINUX) || defined(Q_OS_BSD4)
void *handle = dlopen(NULL, RTLD_LAZY);
if (handle) {
glXGetProcAddressARB = (qt_glXGetProcAddressARB) dlsym(handle, "glXGetProcAddressARB");
dlclose(handle);
}
if (!glXGetProcAddressARB)
#endif
{
#if !defined(QT_NO_LIBRARY)
extern const QString qt_gl_library_name();
QLibrary lib(qt_gl_library_name());
lib.setLoadHints(QLibrary::ImprovedSearchHeuristics);
glXGetProcAddressARB = (qt_glXGetProcAddressARB) lib.resolve("glXGetProcAddressARB");
#endif
}
}
resolved = true;
}
if (!glXGetProcAddressARB)
return 0;
return glXGetProcAddressARB(reinterpret_cast<const GLubyte *>(proc.toLatin1().data()));
}
/*
QGLTemporaryContext implementation
*/
class QGLTemporaryContextPrivate {
public:
bool initialized;
Window drawable;
GLXContext context;
GLXDrawable oldDrawable;
GLXContext oldContext;
};
QGLTemporaryContext::QGLTemporaryContext(bool, QWidget *)
: d(new QGLTemporaryContextPrivate)
{
d->initialized = false;
d->oldDrawable = 0;
d->oldContext = 0;
int screen = 0;
int attribs[] = {GLX_RGBA, XNone};
XVisualInfo *vi = glXChooseVisual(X11->display, screen, attribs);
if (!vi) {
qWarning("QGLTempContext: No GL capable X visuals available.");
return;
}
int useGL;
glXGetConfig(X11->display, vi, GLX_USE_GL, &useGL);
if (!useGL) {
XFree(vi);
return;
}
d->oldDrawable = glXGetCurrentDrawable();
d->oldContext = glXGetCurrentContext();
XSetWindowAttributes a;
a.colormap = qt_gl_choose_cmap(X11->display, vi);
d->drawable = XCreateWindow(X11->display, RootWindow(X11->display, screen),
0, 0, 1, 1, 0,
vi->depth, InputOutput, vi->visual,
CWColormap, &a);
d->context = glXCreateContext(X11->display, vi, 0, True);
if (d->context && glXMakeCurrent(X11->display, d->drawable, d->context)) {
d->initialized = true;
} else {
qWarning("QGLTempContext: Unable to create GL context.");
XDestroyWindow(X11->display, d->drawable);
}
XFree(vi);
}
QGLTemporaryContext::~QGLTemporaryContext()
{
if (d->initialized) {
glXMakeCurrent(X11->display, 0, 0);
glXDestroyContext(X11->display, d->context);
XDestroyWindow(X11->display, d->drawable);
}
if (d->oldDrawable && d->oldContext)
glXMakeCurrent(X11->display, d->oldDrawable, d->oldContext);
}
/*****************************************************************************
QGLOverlayWidget (Internal overlay class for X11)
*****************************************************************************/
class QGLOverlayWidget : public QGLWidget
{
Q_OBJECT
public:
QGLOverlayWidget(const QGLFormat& format, QGLWidget* parent, const QGLWidget* shareWidget=0);
protected:
void initializeGL();
void paintGL();
void resizeGL(int w, int h);
bool x11Event(XEvent *e) { return realWidget->x11Event(e); }
private:
QGLWidget* realWidget;
private:
Q_DISABLE_COPY(QGLOverlayWidget)
};
QGLOverlayWidget::QGLOverlayWidget(const QGLFormat& format, QGLWidget* parent,
const QGLWidget* shareWidget)
: QGLWidget(format, parent, shareWidget ? shareWidget->d_func()->olw : 0)
{
setAttribute(Qt::WA_X11OpenGLOverlay);
realWidget = parent;
}
void QGLOverlayWidget::initializeGL()
{
QColor transparentColor = context()->overlayTransparentColor();
if (transparentColor.isValid())
qglClearColor(transparentColor);
else
qWarning("QGLOverlayWidget::initializeGL(): Could not get transparent color");
realWidget->initializeOverlayGL();
}
void QGLOverlayWidget::resizeGL(int w, int h)
{
glViewport(0, 0, w, h);
realWidget->resizeOverlayGL(w, h);
}
void QGLOverlayWidget::paintGL()
{
realWidget->paintOverlayGL();
}
#undef Bool
QT_BEGIN_INCLUDE_NAMESPACE
#include "qgl_x11.moc"
QT_END_INCLUDE_NAMESPACE
/*****************************************************************************
QGLWidget UNIX/GLX-specific code
*****************************************************************************/
void QGLWidgetPrivate::init(QGLContext *context, const QGLWidget *shareWidget)
{
Q_Q(QGLWidget);
initContext(context, shareWidget);
olw = 0;
if (q->isValid() && context->format().hasOverlay()) {
QString olwName = q->objectName();
olwName += QLatin1String("-QGL_internal_overlay_widget");
olw = new QGLOverlayWidget(QGLFormat::defaultOverlayFormat(), q, shareWidget);
olw->setObjectName(olwName);
if (olw->isValid()) {
olw->setAutoBufferSwap(false);
olw->setFocusProxy(q);
}
else {
delete olw;
olw = 0;
glcx->d_func()->glFormat.setOverlay(false);
}
}
}
bool QGLWidgetPrivate::renderCxPm(QPixmap* pm)
{
Q_Q(QGLWidget);
if (((XVisualInfo*)glcx->d_func()->vi)->depth != pm->depth())
return false;
GLXPixmap glPm;
#if defined(GLX_MESA_pixmap_colormap) && defined(QGL_USE_MESA_EXT)
glPm = glXCreateGLXPixmapMESA(X11->display,
(XVisualInfo*)glcx->vi,
(Pixmap)pm->handle(),
qt_gl_choose_cmap(pm->X11->display,
(XVisualInfo*)glcx->vi));
#else
glPm = (quint32)glXCreateGLXPixmap(X11->display,
(XVisualInfo*)glcx->d_func()->vi,
(Pixmap)pm->handle());
#endif
if (!glXMakeCurrent(X11->display, glPm, (GLXContext)glcx->d_func()->cx)) {
glXDestroyGLXPixmap(X11->display, glPm);
return false;
}
glDrawBuffer(GL_FRONT);
if (!glcx->initialized())
q->glInit();
q->resizeGL(pm->width(), pm->height());
q->paintGL();
glFlush();
q->makeCurrent();
glXDestroyGLXPixmap(X11->display, glPm);
q->resizeGL(q->width(), q->height());
return true;
}
void QGLWidgetPrivate::cleanupColormaps()
{
if (!cmap.handle()) {
return;
} else {
XFreeColormap(X11->display, (Colormap) cmap.handle());
cmap.setHandle(0);
}
}
void QGLWidget::setMouseTracking(bool enable)
{
Q_D(QGLWidget);
if (d->olw)
d->olw->setMouseTracking(enable);
QWidget::setMouseTracking(enable);
}
void QGLWidget::resizeEvent(QResizeEvent *)
{
Q_D(QGLWidget);
if (!isValid())
return;
makeCurrent();
if (!d->glcx->initialized())
glInit();
glXWaitX();
resizeGL(width(), height());
if (d->olw)
d->olw->setGeometry(rect());
}
const QGLContext* QGLWidget::overlayContext() const
{
Q_D(const QGLWidget);
if (d->olw)
return d->olw->context();
else
return 0;
}
void QGLWidget::makeOverlayCurrent()
{
Q_D(QGLWidget);
if (d->olw)
d->olw->makeCurrent();
}
void QGLWidget::updateOverlayGL()
{
Q_D(QGLWidget);
if (d->olw)
d->olw->updateGL();
}
/*!
\internal
Sets a new QGLContext, \a context, for this QGLWidget, using the
shared context, \a shareContext. If \a deleteOldContext is true,
the original context is deleted; otherwise it is overridden.
*/
void QGLWidget::setContext(QGLContext *context,
const QGLContext* shareContext,
bool deleteOldContext)
{
Q_D(QGLWidget);
if (context == 0) {
qWarning("QGLWidget::setContext: Cannot set null context");
return;
}
if (!context->deviceIsPixmap() && context->device() != this) {
qWarning("QGLWidget::setContext: Context must refer to this widget");
return;
}
if (d->glcx)
d->glcx->doneCurrent();
QGLContext* oldcx = d->glcx;
d->glcx = context;
if (parentWidget()) {
// force creation of delay-created widgets
parentWidget()->winId();
if (parentWidget()->x11Info().screen() != x11Info().screen())
d_func()->xinfo = parentWidget()->d_func()->xinfo;
}
// If the application has set WA_TranslucentBackground and not explicitly set
// the alpha buffer size to zero, modify the format so it have an alpha channel
QGLFormat& fmt = d->glcx->d_func()->glFormat;
if (testAttribute(Qt::WA_TranslucentBackground) && fmt.alphaBufferSize() == -1)
fmt.setAlphaBufferSize(1);
bool createFailed = false;
if (!d->glcx->isValid()) {
if (!d->glcx->create(shareContext ? shareContext : oldcx))
createFailed = true;
}
if (createFailed) {
if (deleteOldContext)
delete oldcx;
return;
}
if (d->glcx->windowCreated() || d->glcx->deviceIsPixmap()) {
if (deleteOldContext)
delete oldcx;
return;
}
bool visible = isVisible();
if (visible)
hide();
XVisualInfo *vi = (XVisualInfo*)d->glcx->d_func()->vi;
XSetWindowAttributes a;
QColormap colmap = QColormap::instance(vi->screen);
a.colormap = qt_gl_choose_cmap(QX11Info::display(), vi); // find best colormap
a.background_pixel = colmap.pixel(palette().color(backgroundRole()));
a.border_pixel = colmap.pixel(Qt::black);
Window p = RootWindow(X11->display, vi->screen);
if (parentWidget())
p = parentWidget()->winId();
Window w = XCreateWindow(X11->display, p, x(), y(), width(), height(),
0, vi->depth, InputOutput, vi->visual,
CWBackPixel|CWBorderPixel|CWColormap, &a);
Window *cmw;
Window *cmwret;
int count;
if (XGetWMColormapWindows(X11->display, window()->winId(),
&cmwret, &count)) {
cmw = new Window[count+1];
memcpy((char *)cmw, (char *)cmwret, sizeof(Window)*count);
XFree((char *)cmwret);
int i;
for (i=0; i<count; i++) {
if (cmw[i] == winId()) { // replace old window
cmw[i] = w;
break;
}
}
if (i >= count) // append new window
cmw[count++] = w;
} else {
count = 1;
cmw = new Window[count];
cmw[0] = w;
}
#if defined(GLX_MESA_release_buffers) && defined(QGL_USE_MESA_EXT)
if (oldcx && oldcx->windowCreated())
glXReleaseBuffersMESA(X11->display, winId());
#endif
if (deleteOldContext)
delete oldcx;
oldcx = 0;
if (testAttribute(Qt::WA_WState_Created))
create(w);
else
d->createWinId(w);
XSetWMColormapWindows(X11->display, window()->winId(), cmw, count);
delete [] cmw;
// calling QWidget::create() will always result in a new paint
// engine being created - get rid of it and replace it with our
// own
if (visible)
show();
XFlush(X11->display);
d->glcx->setWindowCreated(true);
}
const QGLColormap & QGLWidget::colormap() const
{
Q_D(const QGLWidget);
return d->cmap;
}
/*\internal
Store color values in the given colormap.
*/
static void qStoreColors(QWidget * tlw, Colormap cmap,
const QGLColormap & cols)
{
Q_UNUSED(tlw);
XColor c;
QRgb color;
for (int i = 0; i < cols.size(); i++) {
color = cols.entryRgb(i);
c.pixel = i;
c.red = (ushort)((qRed(color) / 255.0) * 65535.0 + 0.5);
c.green = (ushort)((qGreen(color) / 255.0) * 65535.0 + 0.5);
c.blue = (ushort)((qBlue(color) / 255.0) * 65535.0 + 0.5);
c.flags = DoRed | DoGreen | DoBlue;
XStoreColor(X11->display, cmap, &c);
}
}
/*\internal
Check whether the given visual supports dynamic colormaps or not.
*/
static bool qCanAllocColors(QWidget * w)
{
bool validVisual = false;
int numVisuals;
long mask;
XVisualInfo templ;
XVisualInfo * visuals;
VisualID id = XVisualIDFromVisual((Visual *) w->window()->x11Info().visual());
mask = VisualScreenMask;
templ.screen = w->x11Info().screen();
visuals = XGetVisualInfo(X11->display, mask, &templ, &numVisuals);
for (int i = 0; i < numVisuals; i++) {
if (visuals[i].visualid == id) {
switch (visuals[i].c_class) {
case TrueColor:
case StaticColor:
case StaticGray:
case XGrayScale:
validVisual = false;
break;
case DirectColor:
case PseudoColor:
validVisual = true;
break;
}
break;
}
}
XFree(visuals);
if (!validVisual)
return false;
return true;
}
void QGLWidget::setColormap(const QGLColormap & c)
{
Q_D(QGLWidget);
QWidget * tlw = window(); // must return a valid widget
d->cmap = c;
if (!d->cmap.handle())
return;
if (!qCanAllocColors(this)) {
qWarning("QGLWidget::setColormap: Cannot create a read/write "
"colormap for this visual");
return;
}
// If the child GL widget is not of the same visual class as the
// toplevel widget we will get in trouble..
Window wid = tlw->winId();
Visual * vis = (Visual *) tlw->x11Info().visual();;
VisualID cvId = XVisualIDFromVisual((Visual *) x11Info().visual());
VisualID tvId = XVisualIDFromVisual((Visual *) tlw->x11Info().visual());
if (cvId != tvId) {
wid = winId();
vis = (Visual *) x11Info().visual();
}
if (!d->cmap.handle()) // allocate a cmap if necessary
d->cmap.setHandle(XCreateColormap(X11->display, wid, vis, AllocAll));
qStoreColors(this, (Colormap) d->cmap.handle(), c);
XSetWindowColormap(X11->display, wid, (Colormap) d->cmap.handle());
// tell the wm that this window has a special colormap
Window * cmw;
Window * cmwret;
int count;
if (XGetWMColormapWindows(X11->display, tlw->winId(), &cmwret, &count))
{
cmw = new Window[count+1];
memcpy((char *) cmw, (char *) cmwret, sizeof(Window) * count);
XFree((char *) cmwret);
int i;
for (i = 0; i < count; i++) {
if (cmw[i] == winId()) {
break;
}
}
if (i >= count) // append new window only if not in the list
cmw[count++] = winId();
} else {
count = 1;
cmw = new Window[count];
cmw[0] = winId();
}
XSetWMColormapWindows(X11->display, tlw->winId(), cmw, count);
delete [] cmw;
}
// Solaris defines glXBindTexImageEXT as part of the GL library
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
typedef void (*qt_glXBindTexImageEXT)(Display*, GLXDrawable, int, const int*);
typedef void (*qt_glXReleaseTexImageEXT)(Display*, GLXDrawable, int);
static qt_glXBindTexImageEXT glXBindTexImageEXT = 0;
static qt_glXReleaseTexImageEXT glXReleaseTexImageEXT = 0;
static bool qt_resolveTextureFromPixmap(QPaintDevice *paintDevice)
{
static bool resolvedTextureFromPixmap = false;
if (!resolvedTextureFromPixmap) {
resolvedTextureFromPixmap = true;
// Check to see if we have NPOT texture support
if ( !(QGLExtensions::glExtensions() & QGLExtensions::NPOTTextures) &&
!(QGLFormat::openGLVersionFlags() & QGLFormat::OpenGL_Version_2_0))
{
return false; // Can't use TFP without NPOT
}
const QX11Info *xinfo = qt_x11Info(paintDevice);
Display *display = xinfo ? xinfo->display() : X11->display;
int screen = xinfo ? xinfo->screen() : X11->defaultScreen;
QGLExtensionMatcher serverExtensions(glXQueryExtensionsString(display, screen));
QGLExtensionMatcher clientExtensions(glXGetClientString(display, GLX_EXTENSIONS));
if (serverExtensions.match("GLX_EXT_texture_from_pixmap")
&& clientExtensions.match("GLX_EXT_texture_from_pixmap"))
{
glXBindTexImageEXT = (qt_glXBindTexImageEXT) qglx_getProcAddress("glXBindTexImageEXT");
glXReleaseTexImageEXT = (qt_glXReleaseTexImageEXT) qglx_getProcAddress("glXReleaseTexImageEXT");
}
}
return glXBindTexImageEXT && glXReleaseTexImageEXT;
}
#endif //defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
QGLTexture *QGLContextPrivate::bindTextureFromNativePixmap(QPixmap *pixmap, const qint64 key,
QGLContext::BindOptions options)
{
#if !defined(GLX_VERSION_1_3) || defined(Q_OS_HPUX)
return 0;
#else
// Check we have GLX 1.3, as it is needed for glXCreatePixmap & glXDestroyPixmap
int majorVersion = 0;
int minorVersion = 0;
glXQueryVersion(X11->display, &majorVersion, &minorVersion);
if (majorVersion < 1 || (majorVersion == 1 && minorVersion < 3))
return 0;
Q_Q(QGLContext);
QX11PixmapData *pixmapData = static_cast<QX11PixmapData*>(pixmap->data_ptr().data());
Q_ASSERT(pixmapData->classId() == QPixmapData::X11Class);
// We can't use TFP if the pixmap has a separate X11 mask
if (pixmapData->x11_mask)
return 0;
if (!qt_resolveTextureFromPixmap(paintDevice))
return 0;
const QX11Info &x11Info = pixmapData->xinfo;
// Store the configs (Can be static because configs aren't dependent on current context)
static GLXFBConfig glxRGBPixmapConfig = 0;
static bool RGBConfigInverted = false;
static GLXFBConfig glxRGBAPixmapConfig = 0;
static bool RGBAConfigInverted = false;
bool hasAlpha = pixmapData->hasAlphaChannel();
// Check to see if we need a config
if ( (hasAlpha && !glxRGBAPixmapConfig) || (!hasAlpha && !glxRGBPixmapConfig) ) {
GLXFBConfig *configList = 0;
int configCount = 0;
int configAttribs[] = {
hasAlpha ? GLX_BIND_TO_TEXTURE_RGBA_EXT : GLX_BIND_TO_TEXTURE_RGB_EXT, True,
GLX_DRAWABLE_TYPE, GLX_PIXMAP_BIT,
GLX_BIND_TO_TEXTURE_TARGETS_EXT, GLX_TEXTURE_2D_BIT_EXT,
// QGLContext::bindTexture() can't return an inverted texture, but QPainter::drawPixmap() can:
GLX_Y_INVERTED_EXT, int(options & QGLContext::CanFlipNativePixmapBindOption ? GLX_DONT_CARE : False),
XNone
};
configList = glXChooseFBConfig(x11Info.display(), x11Info.screen(), configAttribs, &configCount);
if (!configList)
return 0;
int yInv;
glXGetFBConfigAttrib(x11Info.display(), configList[0], GLX_Y_INVERTED_EXT, &yInv);
if (hasAlpha) {
glxRGBAPixmapConfig = configList[0];
RGBAConfigInverted = yInv;
}
else {
glxRGBPixmapConfig = configList[0];
RGBConfigInverted = yInv;
}
XFree(configList);
}
// Check to see if the surface is still valid
if (pixmapData->gl_surface &&
hasAlpha != (pixmapData->flags & QX11PixmapData::GlSurfaceCreatedWithAlpha))
{
// Surface is invalid!
destroyGlSurfaceForPixmap(pixmapData);
}
// Check to see if we need a surface
if (!pixmapData->gl_surface) {
GLXPixmap glxPixmap;
int pixmapAttribs[] = {
GLX_TEXTURE_FORMAT_EXT, hasAlpha ? GLX_TEXTURE_FORMAT_RGBA_EXT : GLX_TEXTURE_FORMAT_RGB_EXT,
GLX_TEXTURE_TARGET_EXT, GLX_TEXTURE_2D_EXT,
GLX_MIPMAP_TEXTURE_EXT, False, // Maybe needs to be don't care
XNone
};
// Wrap the X Pixmap into a GLXPixmap:
glxPixmap = glXCreatePixmap(x11Info.display(),
hasAlpha ? glxRGBAPixmapConfig : glxRGBPixmapConfig,
pixmapData->handle(), pixmapAttribs);
if (!glxPixmap)
return 0;
pixmapData->gl_surface = (void*)glxPixmap;
// Make sure the cleanup hook gets called so we can delete the glx pixmap
QImagePixmapCleanupHooks::enableCleanupHooks(pixmapData);
}
GLuint textureId;
glGenTextures(1, &textureId);
glBindTexture(GL_TEXTURE_2D, textureId);
glXBindTexImageEXT(x11Info.display(), (GLXPixmap)pixmapData->gl_surface, GLX_FRONT_LEFT_EXT, 0);
glBindTexture(GL_TEXTURE_2D, textureId);
GLuint filtering = (options & QGLContext::LinearFilteringBindOption) ? GL_LINEAR : GL_NEAREST;
glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, filtering);
glTexParameterf(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, filtering);
if (!((hasAlpha && RGBAConfigInverted) || (!hasAlpha && RGBConfigInverted)))
options &= ~QGLContext::InvertedYBindOption;
QGLTexture *texture = new QGLTexture(q, textureId, GL_TEXTURE_2D, options);
if (texture->options & QGLContext::InvertedYBindOption)
pixmapData->flags |= QX11PixmapData::InvertedWhenBoundToTexture;
// We assume the cost of bound pixmaps is zero
QGLTextureCache::instance()->insert(q, key, texture, 0);
return texture;
#endif //!defined(GLX_VERSION_1_3) || defined(Q_OS_HPUX)
}
void QGLContextPrivate::destroyGlSurfaceForPixmap(QPixmapData* pmd)
{
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
Q_ASSERT(pmd->classId() == QPixmapData::X11Class);
QX11PixmapData *pixmapData = static_cast<QX11PixmapData*>(pmd);
if (pixmapData->gl_surface) {
glXDestroyPixmap(QX11Info::display(), (GLXPixmap)pixmapData->gl_surface);
pixmapData->gl_surface = 0;
}
#endif
}
void QGLContextPrivate::unbindPixmapFromTexture(QPixmapData* pmd)
{
#if defined(GLX_VERSION_1_3) && !defined(Q_OS_HPUX)
Q_ASSERT(pmd->classId() == QPixmapData::X11Class);
Q_ASSERT(QGLContext::currentContext());
QX11PixmapData *pixmapData = static_cast<QX11PixmapData*>(pmd);
if (pixmapData->gl_surface)
glXReleaseTexImageEXT(QX11Info::display(), (GLXPixmap)pixmapData->gl_surface, GLX_FRONT_LEFT_EXT);
#endif
}
QT_END_NAMESPACE
| Java |
/*
** ###################################################################
** Version: rev. 1.6, 2015-05-25
** Build: b150713
**
** Abstract:
** Chip specific module features.
**
** Copyright (c) 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: [email protected]
**
** Revisions:
** - rev. 1.0 (2014-03-27)
** Initial version.
** - rev. 1.1 (2014-05-26)
** I2S registers TCR2/RCR2 and others were changed.
** FLEXIO register FLEXIO_VERID has now bitfields: FEATURE, MINOR, MAJOR.
** Names of the bitfields of the FLEXIO_SHIFTBUF have been changed to the appropriate register name e.g.: FLEXIO_SHIFTBUFBBS_SHIFTBUFBBS.
** Peripheral_BASES macros has been changed to Peripheral_BASE_PTRS, e.g.: ADC_BASES to ADC_BASE_PTRS.
** Clock configuration for high range external oscillator has been added.
** RFSYS module access has been added.
** - rev. 1.2 (2014-07-10)
** GPIO - Renamed modules PTA,PTB,PTC,PTD,PTE to GPIOA,GPIOB,GPIOC,GPIOD,GPIOE.
** UART0 - UART0 module renamed to UART2.
** I2S - removed MDR register.
** - rev. 1.3 (2014-08-21)
** UART2 - Removed ED register.
** UART2 - Removed MODEM register.
** UART2 - Removed IR register.
** UART2 - Removed PFIFO register.
** UART2 - Removed CFIFO register.
** UART2 - Removed SFIFO register.
** UART2 - Removed TWFIFO register.
** UART2 - Removed TCFIFO register.
** UART2 - Removed RWFIFO register.
** UART2 - Removed RCFIFO register.
** SIM - Changed bitfield value MCGIRCLK to LIRC_CLK of bitfield CLKOUTSEL in SOPT2 register.
** SIM - Removed bitfield DIEID in SDID register.
** - rev. 1.4 (2015-01-21)
** Added FSL_FEATURE_SOC_peripheral_COUNT with number of peripheral instances
** - rev. 1.5 (2015-05-19)
** FSL_FEATURE_SOC_CAU_COUNT remamed to FSL_FEATURE_SOC_MMCAU_COUNT.
** Added FSL_FEATURE_SOC_peripheral_COUNT for TRNG and HSADC.
** Added features for PORT.
** - rev. 1.6 (2015-05-25)
** Added FSL_FEATURE_FLASH_PFLASH_START_ADDRESS
**
** ###################################################################
*/
#if !defined(__FSL_MKL33Z4_FEATURES_H__)
#define __FSL_MKL33Z4_FEATURES_H__
/* ADC16 module features */
/* @brief Has Programmable Gain Amplifier (PGA) in ADC (register PGA). */
#define FSL_FEATURE_ADC16_HAS_PGA (0)
/* @brief Has PGA chopping control in ADC (bit PGA[PGACHPb] or PGA[PGACHP]). */
#define FSL_FEATURE_ADC16_HAS_PGA_CHOPPING (0)
/* @brief Has PGA offset measurement mode in ADC (bit PGA[PGAOFSM]). */
#define FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT (0)
/* @brief Has DMA support (bit SC2[DMAEN] or SC4[DMAEN]). */
#define FSL_FEATURE_ADC16_HAS_DMA (1)
/* @brief Has differential mode (bitfield SC1x[DIFF]). */
#define FSL_FEATURE_ADC16_HAS_DIFF_MODE (1)
/* @brief Has FIFO (bit SC4[AFDEP]). */
#define FSL_FEATURE_ADC16_HAS_FIFO (0)
/* @brief FIFO size if available (bitfield SC4[AFDEP]). */
#define FSL_FEATURE_ADC16_FIFO_SIZE (0)
/* @brief Has channel set a/b multiplexor (bitfield CFG2[MUXSEL]). */
#define FSL_FEATURE_ADC16_HAS_MUX_SELECT (1)
/* @brief Has HW trigger masking (bitfield SC5[HTRGMASKE]. */
#define FSL_FEATURE_ADC16_HAS_HW_TRIGGER_MASK (0)
/* @brief Has calibration feature (bit SC3[CAL] and registers CLPx, CLMx). */
#define FSL_FEATURE_ADC16_HAS_CALIBRATION (1)
/* @brief Has HW averaging (bit SC3[AVGE]). */
#define FSL_FEATURE_ADC16_HAS_HW_AVERAGE (1)
/* @brief Has offset correction (register OFS). */
#define FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION (1)
/* @brief Maximum ADC resolution. */
#define FSL_FEATURE_ADC16_MAX_RESOLUTION (16)
/* @brief Number of SC1x and Rx register pairs (conversion control and result registers). */
#define FSL_FEATURE_ADC16_CONVERSION_CONTROL_COUNT (2)
/* CMP module features */
/* @brief Has Trigger mode in CMP (register bit field CR1[TRIGM]). */
#define FSL_FEATURE_CMP_HAS_TRIGGER_MODE (1)
/* @brief Has Window mode in CMP (register bit field CR1[WE]). */
#define FSL_FEATURE_CMP_HAS_WINDOW_MODE (0)
/* @brief Has External sample supported in CMP (register bit field CR1[SE]). */
#define FSL_FEATURE_CMP_HAS_EXTERNAL_SAMPLE_SUPPORT (0)
/* @brief Has DMA support in CMP (register bit field SCR[DMAEN]). */
#define FSL_FEATURE_CMP_HAS_DMA (1)
/* @brief Has Pass Through mode in CMP (register bit field MUXCR[PSTM]). */
#define FSL_FEATURE_CMP_HAS_PASS_THROUGH_MODE (0)
/* @brief Has DAC Test function in CMP (register DACTEST). */
#define FSL_FEATURE_CMP_HAS_DAC_TEST (0)
/* COP module features */
/* @brief Has the COP Debug Enable bit (COPC[COPDBGEN]) */
#define FSL_FEATURE_COP_HAS_DEBUG_ENABLE (1)
/* @brief Has the COP Stop mode Enable bit (COPC[COPSTPEN]) */
#define FSL_FEATURE_COP_HAS_STOP_ENABLE (1)
/* @brief Has more clock sources like MCGIRC */
#define FSL_FEATURE_COP_HAS_MORE_CLKSRC (1)
/* @brief Has the timeout long and short mode bit (COPC[COPCLKS]) */
#define FSL_FEATURE_COP_HAS_LONGTIME_MODE (1)
/* SOC module features */
/* @brief ACMP availability on the SoC. */
#define FSL_FEATURE_SOC_ACMP_COUNT (0)
/* @brief ADC16 availability on the SoC. */
#define FSL_FEATURE_SOC_ADC16_COUNT (1)
/* @brief AFE availability on the SoC. */
#define FSL_FEATURE_SOC_AFE_COUNT (0)
/* @brief AIPS availability on the SoC. */
#define FSL_FEATURE_SOC_AIPS_COUNT (0)
/* @brief AOI availability on the SoC. */
#define FSL_FEATURE_SOC_AOI_COUNT (0)
/* @brief AXBS availability on the SoC. */
#define FSL_FEATURE_SOC_AXBS_COUNT (0)
/* @brief CADC availability on the SoC. */
#define FSL_FEATURE_SOC_CADC_COUNT (0)
/* @brief FLEXCAN availability on the SoC. */
#define FSL_FEATURE_SOC_FLEXCAN_COUNT (0)
/* @brief MMCAU availability on the SoC. */
#define FSL_FEATURE_SOC_MMCAU_COUNT (0)
/* @brief CMP availability on the SoC. */
#define FSL_FEATURE_SOC_CMP_COUNT (1)
/* @brief CMT availability on the SoC. */
#define FSL_FEATURE_SOC_CMT_COUNT (0)
/* @brief CNC availability on the SoC. */
#define FSL_FEATURE_SOC_CNC_COUNT (0)
/* @brief CRC availability on the SoC. */
#define FSL_FEATURE_SOC_CRC_COUNT (0)
/* @brief DAC availability on the SoC. */
#define FSL_FEATURE_SOC_DAC_COUNT (1)
/* @brief DCDC availability on the SoC. */
#define FSL_FEATURE_SOC_DCDC_COUNT (0)
/* @brief DDR availability on the SoC. */
#define FSL_FEATURE_SOC_DDR_COUNT (0)
/* @brief DMA availability on the SoC. */
#define FSL_FEATURE_SOC_DMA_COUNT (1)
/* @brief DMAMUX availability on the SoC. */
#define FSL_FEATURE_SOC_DMAMUX_COUNT (1)
/* @brief DRY availability on the SoC. */
#define FSL_FEATURE_SOC_DRY_COUNT (0)
/* @brief DSPI availability on the SoC. */
#define FSL_FEATURE_SOC_DSPI_COUNT (0)
/* @brief EDMA availability on the SoC. */
#define FSL_FEATURE_SOC_EDMA_COUNT (0)
/* @brief EMVSIM availability on the SoC. */
#define FSL_FEATURE_SOC_EMVSIM_COUNT (0)
/* @brief ENC availability on the SoC. */
#define FSL_FEATURE_SOC_ENC_COUNT (0)
/* @brief ENET availability on the SoC. */
#define FSL_FEATURE_SOC_ENET_COUNT (0)
/* @brief EWM availability on the SoC. */
#define FSL_FEATURE_SOC_EWM_COUNT (0)
/* @brief FB availability on the SoC. */
#define FSL_FEATURE_SOC_FB_COUNT (0)
/* @brief FGPIO availability on the SoC. */
#define FSL_FEATURE_SOC_FGPIO_COUNT (0)
/* @brief FLEXIO availability on the SoC. */
#define FSL_FEATURE_SOC_FLEXIO_COUNT (1)
/* @brief FMC availability on the SoC. */
#define FSL_FEATURE_SOC_FMC_COUNT (0)
/* @brief FSKDT availability on the SoC. */
#define FSL_FEATURE_SOC_FSKDT_COUNT (0)
/* @brief FTFA availability on the SoC. */
#define FSL_FEATURE_SOC_FTFA_COUNT (1)
/* @brief FTFE availability on the SoC. */
#define FSL_FEATURE_SOC_FTFE_COUNT (0)
/* @brief FTFL availability on the SoC. */
#define FSL_FEATURE_SOC_FTFL_COUNT (0)
/* @brief FTM availability on the SoC. */
#define FSL_FEATURE_SOC_FTM_COUNT (0)
/* @brief FTMRA availability on the SoC. */
#define FSL_FEATURE_SOC_FTMRA_COUNT (0)
/* @brief FTMRE availability on the SoC. */
#define FSL_FEATURE_SOC_FTMRE_COUNT (0)
/* @brief FTMRH availability on the SoC. */
#define FSL_FEATURE_SOC_FTMRH_COUNT (0)
/* @brief GPIO availability on the SoC. */
#define FSL_FEATURE_SOC_GPIO_COUNT (5)
/* @brief HSADC availability on the SoC. */
#define FSL_FEATURE_SOC_HSADC_COUNT (0)
/* @brief I2C availability on the SoC. */
#define FSL_FEATURE_SOC_I2C_COUNT (2)
/* @brief I2S availability on the SoC. */
#define FSL_FEATURE_SOC_I2S_COUNT (1)
/* @brief ICS availability on the SoC. */
#define FSL_FEATURE_SOC_ICS_COUNT (0)
/* @brief IRQ availability on the SoC. */
#define FSL_FEATURE_SOC_IRQ_COUNT (0)
/* @brief KBI availability on the SoC. */
#define FSL_FEATURE_SOC_KBI_COUNT (0)
/* @brief SLCD availability on the SoC. */
#define FSL_FEATURE_SOC_SLCD_COUNT (1)
/* @brief LCDC availability on the SoC. */
#define FSL_FEATURE_SOC_LCDC_COUNT (0)
/* @brief LDO availability on the SoC. */
#define FSL_FEATURE_SOC_LDO_COUNT (0)
/* @brief LLWU availability on the SoC. */
#define FSL_FEATURE_SOC_LLWU_COUNT (1)
/* @brief LMEM availability on the SoC. */
#define FSL_FEATURE_SOC_LMEM_COUNT (0)
/* @brief LPSCI availability on the SoC. */
#define FSL_FEATURE_SOC_LPSCI_COUNT (0)
/* @brief LPTMR availability on the SoC. */
#define FSL_FEATURE_SOC_LPTMR_COUNT (1)
/* @brief LPTPM availability on the SoC. */
#define FSL_FEATURE_SOC_LPTPM_COUNT (0)
/* @brief LPUART availability on the SoC. */
#define FSL_FEATURE_SOC_LPUART_COUNT (2)
/* @brief LTC availability on the SoC. */
#define FSL_FEATURE_SOC_LTC_COUNT (0)
/* @brief MC availability on the SoC. */
#define FSL_FEATURE_SOC_MC_COUNT (0)
/* @brief MCG availability on the SoC. */
#define FSL_FEATURE_SOC_MCG_COUNT (0)
/* @brief MCGLITE availability on the SoC. */
#define FSL_FEATURE_SOC_MCGLITE_COUNT (1)
/* @brief MCM availability on the SoC. */
#define FSL_FEATURE_SOC_MCM_COUNT (1)
/* @brief MMAU availability on the SoC. */
#define FSL_FEATURE_SOC_MMAU_COUNT (0)
/* @brief MMDVSQ availability on the SoC. */
#define FSL_FEATURE_SOC_MMDVSQ_COUNT (0)
/* @brief MPU availability on the SoC. */
#define FSL_FEATURE_SOC_MPU_COUNT (0)
/* @brief MSCAN availability on the SoC. */
#define FSL_FEATURE_SOC_MSCAN_COUNT (0)
/* @brief MTB availability on the SoC. */
#define FSL_FEATURE_SOC_MTB_COUNT (1)
/* @brief MTBDWT availability on the SoC. */
#define FSL_FEATURE_SOC_MTBDWT_COUNT (1)
/* @brief NFC availability on the SoC. */
#define FSL_FEATURE_SOC_NFC_COUNT (0)
/* @brief OPAMP availability on the SoC. */
#define FSL_FEATURE_SOC_OPAMP_COUNT (0)
/* @brief OSC availability on the SoC. */
#define FSL_FEATURE_SOC_OSC_COUNT (1)
/* @brief OTFAD availability on the SoC. */
#define FSL_FEATURE_SOC_OTFAD_COUNT (0)
/* @brief PDB availability on the SoC. */
#define FSL_FEATURE_SOC_PDB_COUNT (0)
/* @brief PGA availability on the SoC. */
#define FSL_FEATURE_SOC_PGA_COUNT (0)
/* @brief PIT availability on the SoC. */
#define FSL_FEATURE_SOC_PIT_COUNT (1)
/* @brief PMC availability on the SoC. */
#define FSL_FEATURE_SOC_PMC_COUNT (1)
/* @brief PORT availability on the SoC. */
#define FSL_FEATURE_SOC_PORT_COUNT (5)
/* @brief PWM availability on the SoC. */
#define FSL_FEATURE_SOC_PWM_COUNT (0)
/* @brief PWT availability on the SoC. */
#define FSL_FEATURE_SOC_PWT_COUNT (0)
/* @brief QuadSPIO availability on the SoC. */
#define FSL_FEATURE_SOC_QuadSPIO_COUNT (0)
/* @brief RCM availability on the SoC. */
#define FSL_FEATURE_SOC_RCM_COUNT (1)
/* @brief RFSYS availability on the SoC. */
#define FSL_FEATURE_SOC_RFSYS_COUNT (0)
/* @brief RFVBAT availability on the SoC. */
#define FSL_FEATURE_SOC_RFVBAT_COUNT (0)
/* @brief RNG availability on the SoC. */
#define FSL_FEATURE_SOC_RNG_COUNT (0)
/* @brief RNGB availability on the SoC. */
#define FSL_FEATURE_SOC_RNGB_COUNT (0)
/* @brief ROM availability on the SoC. */
#define FSL_FEATURE_SOC_ROM_COUNT (1)
/* @brief RSIM availability on the SoC. */
#define FSL_FEATURE_SOC_RSIM_COUNT (0)
/* @brief RTC availability on the SoC. */
#define FSL_FEATURE_SOC_RTC_COUNT (1)
/* @brief SCI availability on the SoC. */
#define FSL_FEATURE_SOC_SCI_COUNT (0)
/* @brief SDHC availability on the SoC. */
#define FSL_FEATURE_SOC_SDHC_COUNT (0)
/* @brief SDRAM availability on the SoC. */
#define FSL_FEATURE_SOC_SDRAM_COUNT (0)
/* @brief SIM availability on the SoC. */
#define FSL_FEATURE_SOC_SIM_COUNT (1)
/* @brief SMC availability on the SoC. */
#define FSL_FEATURE_SOC_SMC_COUNT (1)
/* @brief SPI availability on the SoC. */
#define FSL_FEATURE_SOC_SPI_COUNT (2)
/* @brief TMR availability on the SoC. */
#define FSL_FEATURE_SOC_TMR_COUNT (0)
/* @brief TPM availability on the SoC. */
#define FSL_FEATURE_SOC_TPM_COUNT (3)
/* @brief TRIAMP availability on the SoC. */
#define FSL_FEATURE_SOC_TRIAMP_COUNT (0)
/* @brief TRNG availability on the SoC. */
#define FSL_FEATURE_SOC_TRNG_COUNT (0)
/* @brief TSI availability on the SoC. */
#define FSL_FEATURE_SOC_TSI_COUNT (0)
/* @brief UART availability on the SoC. */
#define FSL_FEATURE_SOC_UART_COUNT (1)
/* @brief USB availability on the SoC. */
#define FSL_FEATURE_SOC_USB_COUNT (0)
/* @brief USBDCD availability on the SoC. */
#define FSL_FEATURE_SOC_USBDCD_COUNT (0)
/* @brief USBHSDCD availability on the SoC. */
#define FSL_FEATURE_SOC_USBHSDCD_COUNT (0)
/* @brief USBPHY availability on the SoC. */
#define FSL_FEATURE_SOC_USBPHY_COUNT (0)
/* @brief VREF availability on the SoC. */
#define FSL_FEATURE_SOC_VREF_COUNT (1)
/* @brief WDOG availability on the SoC. */
#define FSL_FEATURE_SOC_WDOG_COUNT (0)
/* @brief XBAR availability on the SoC. */
#define FSL_FEATURE_SOC_XBAR_COUNT (0)
/* @brief XCVR availability on the SoC. */
#define FSL_FEATURE_SOC_XCVR_COUNT (0)
/* @brief ZLL availability on the SoC. */
#define FSL_FEATURE_SOC_ZLL_COUNT (0)
/* DAC module features */
/* @brief Define the size of hardware buffer */
#define FSL_FEATURE_DAC_BUFFER_SIZE (2)
/* @brief Define whether the buffer supports watermark event detection or not. */
#define FSL_FEATURE_DAC_HAS_WATERMARK_DETECTION (0)
/* @brief Define whether the buffer supports watermark selection detection or not. */
#define FSL_FEATURE_DAC_HAS_WATERMARK_SELECTION (0)
/* @brief Define whether the buffer supports watermark event 1 word before buffer upper limit. */
#define FSL_FEATURE_DAC_HAS_WATERMARK_1_WORD (0)
/* @brief Define whether the buffer supports watermark event 2 words before buffer upper limit. */
#define FSL_FEATURE_DAC_HAS_WATERMARK_2_WORDS (0)
/* @brief Define whether the buffer supports watermark event 3 words before buffer upper limit. */
#define FSL_FEATURE_DAC_HAS_WATERMARK_3_WORDS (0)
/* @brief Define whether the buffer supports watermark event 4 words before buffer upper limit. */
#define FSL_FEATURE_DAC_HAS_WATERMARK_4_WORDS (0)
/* @brief Define whether FIFO buffer mode is available or not. */
#define FSL_FEATURE_DAC_HAS_BUFFER_FIFO_MODE (1)
/* @brief Define whether swing buffer mode is available or not.. */
#define FSL_FEATURE_DAC_HAS_BUFFER_SWING_MODE (0)
/* DMA module features */
/* @brief Total number of DMA channels on all modules. */
#define FSL_FEATURE_DMA_DMAMUX_CHANNELS (DMA_INSTANCE_COUNT * 4)
/* DMAMUX module features */
/* @brief Number of DMA channels (related to number of register CHCFGn). */
#define FSL_FEATURE_DMAMUX_MODULE_CHANNEL (4)
/* @brief Total number of DMA channels on all modules. */
#define FSL_FEATURE_DMAMUX_DMAMUX_CHANNELS (DMAMUX_INSTANCE_COUNT * 4)
/* @brief Has the periodic trigger capability for the triggered DMA channel 0 (register bit CHCFG0[TRIG]). */
#define FSL_FEATURE_DMAMUX_HAS_TRIG (1)
/* FLEXIO module features */
/* @brief Has Shifter Status Register (FLEXIO_SHIFTSTAT) */
#define FSL_FEATURE_FLEXIO_HAS_SHIFTER_STATUS (1)
/* @brief Has Pin Data Input Register (FLEXIO_PIN) */
#define FSL_FEATURE_FLEXIO_HAS_PIN_STATUS (0)
/* @brief Has Shifter Buffer N Nibble Byte Swapped Register (FLEXIO_SHIFTBUFNBSn) */
#define FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_BYTE_SWAP (0)
/* @brief Has Shifter Buffer N Half Word Swapped Register (FLEXIO_SHIFTBUFHWSn) */
#define FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_HALF_WORD_SWAP (0)
/* @brief Has Shifter Buffer N Nibble Swapped Register (FLEXIO_SHIFTBUFNISn) */
#define FSL_FEATURE_FLEXIO_HAS_SHFT_BUFFER_NIBBLE_SWAP (0)
/* @brief Supports Shifter State Mode (FLEXIO_SHIFTCTLn[SMOD]) */
#define FSL_FEATURE_FLEXIO_HAS_STATE_MODE (0)
/* @brief Supports Shifter Logic Mode (FLEXIO_SHIFTCTLn[SMOD]) */
#define FSL_FEATURE_FLEXIO_HAS_LOGIC_MODE (0)
/* @brief Supports paralle width (FLEXIO_SHIFTCFGn[PWIDTH]) */
#define FSL_FEATURE_FLEXIO_HAS_PARALLEL_WIDTH (0)
/* @brief Reset value of the FLEXIO_VERID register */
#define FSL_FEATURE_FLEXIO_VERID_RESET_VALUE (0x1000000)
/* @brief Reset value of the FLEXIO_PARAM register */
#define FSL_FEATURE_FLEXIO_PARAM_RESET_VALUE (0x10080404)
/* FLASH module features */
#if defined(CPU_MKL33Z128VLH4) || defined(CPU_MKL33Z128VMP4)
/* @brief Is of type FTFA. */
#define FSL_FEATURE_FLASH_IS_FTFA (1)
/* @brief Is of type FTFE. */
#define FSL_FEATURE_FLASH_IS_FTFE (0)
/* @brief Is of type FTFL. */
#define FSL_FEATURE_FLASH_IS_FTFL (0)
/* @brief Has flags indicating the status of the FlexRAM (register bits FCNFG[EEERDY], FCNFG[RAMRDY] and FCNFG[PFLSH]). */
#define FSL_FEATURE_FLASH_HAS_FLEX_RAM_FLAGS (0)
/* @brief Has program flash swapping status flag (register bit FCNFG[SWAP]). */
#define FSL_FEATURE_FLASH_HAS_PFLASH_SWAPPING_STATUS_FLAG (0)
/* @brief Has EEPROM region protection (register FEPROT). */
#define FSL_FEATURE_FLASH_HAS_EEROM_REGION_PROTECTION (0)
/* @brief Has data flash region protection (register FDPROT). */
#define FSL_FEATURE_FLASH_HAS_DATA_FLASH_REGION_PROTECTION (0)
/* @brief Has flash access control (registers XACCHn, SACCHn, where n is a number, FACSS and FACSN). */
#define FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL (0)
/* @brief Has flash cache control in FMC module. */
#define FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS (0)
/* @brief Has flash cache control in MCM module. */
#define FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS (1)
/* @brief P-Flash start address. */
#define FSL_FEATURE_FLASH_PFLASH_START_ADDRESS (0x00000000)
/* @brief P-Flash block count. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT (2)
/* @brief P-Flash block size. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE (65536)
/* @brief P-Flash sector size. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE (1024)
/* @brief P-Flash write unit size. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE (4)
/* @brief P-Flash data path width. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (4)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */
#define FSL_FEATURE_FLASH_FLEX_NVM_START_ADDRESS (0x00000000)
/* @brief FlexNVM block count. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT (0)
/* @brief FlexNVM block size. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SIZE (0)
/* @brief FlexNVM sector size. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE (0)
/* @brief FlexNVM write unit size. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_WRITE_UNIT_SIZE (0)
/* @brief FlexNVM data path width. */
#define FSL_FEATURE_FLASH_FLEX_BLOCK_DATA_PATH_WIDTH (0)
/* @brief Has FlexRAM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_RAM (0)
/* @brief FlexRAM start address. (Valid only if FlexRAM is available.) */
#define FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS (0x00000000)
/* @brief FlexRAM size. */
#define FSL_FEATURE_FLASH_FLEX_RAM_SIZE (0)
/* @brief Has 0x00 Read 1s Block command. */
#define FSL_FEATURE_FLASH_HAS_READ_1S_BLOCK_CMD (1)
/* @brief Has 0x01 Read 1s Section command. */
#define FSL_FEATURE_FLASH_HAS_READ_1S_SECTION_CMD (1)
/* @brief Has 0x02 Program Check command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_CHECK_CMD (1)
/* @brief Has 0x03 Read Resource command. */
#define FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD (1)
/* @brief Has 0x06 Program Longword command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_LONGWORD_CMD (1)
/* @brief Has 0x07 Program Phrase command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_PHRASE_CMD (0)
/* @brief Has 0x08 Erase Flash Block command. */
#define FSL_FEATURE_FLASH_HAS_ERASE_FLASH_BLOCK_CMD (1)
/* @brief Has 0x09 Erase Flash Sector command. */
#define FSL_FEATURE_FLASH_HAS_ERASE_FLASH_SECTOR_CMD (1)
/* @brief Has 0x0B Program Section command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD (0)
/* @brief Has 0x40 Read 1s All Blocks command. */
#define FSL_FEATURE_FLASH_HAS_READ_1S_ALL_BLOCKS_CMD (1)
/* @brief Has 0x41 Read Once command. */
#define FSL_FEATURE_FLASH_HAS_READ_ONCE_CMD (1)
/* @brief Has 0x43 Program Once command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_ONCE_CMD (1)
/* @brief Has 0x44 Erase All Blocks command. */
#define FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_CMD (1)
/* @brief Has 0x45 Verify Backdoor Access Key command. */
#define FSL_FEATURE_FLASH_HAS_VERIFY_BACKDOOR_ACCESS_KEY_CMD (1)
/* @brief Has 0x46 Swap Control command. */
#define FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD (0)
/* @brief Has 0x80 Program Partition command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD (0)
/* @brief Has 0x81 Set FlexRAM Function command. */
#define FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD (0)
/* @brief P-Flash Erase/Read 1st all block command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Erase sector command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Rrogram/Verify section command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_SECTION_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Read resource command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_RESOURCE_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Program check command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_CHECK_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Program check command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Erase/Read 1st all block command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Erase sector command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_SECTOR_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Rrogram/Verify section command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_SECTION_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Read resource command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_RESOURCE_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Program check command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_CHECK_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 (0xFFFFFFFF)
/* @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0000 (0xFFFF)
/* @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0001 (0xFFFF)
/* @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0010 (0xFFFF)
/* @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0011 (0xFFFF)
/* @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0100 (0xFFFF)
/* @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0101 (0xFFFF)
/* @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0110 (0xFFFF)
/* @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0111 (0xFFFF)
/* @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1000 (0xFFFF)
/* @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1001 (0xFFFF)
/* @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1010 (0xFFFF)
/* @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1011 (0xFFFF)
/* @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1100 (0xFFFF)
/* @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1101 (0xFFFF)
/* @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1110 (0xFFFF)
/* @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1111 (0xFFFF)
#elif defined(CPU_MKL33Z256VLH4) || defined(CPU_MKL33Z256VMP4)
/* @brief Is of type FTFA. */
#define FSL_FEATURE_FLASH_IS_FTFA (1)
/* @brief Is of type FTFE. */
#define FSL_FEATURE_FLASH_IS_FTFE (0)
/* @brief Is of type FTFL. */
#define FSL_FEATURE_FLASH_IS_FTFL (0)
/* @brief Has flags indicating the status of the FlexRAM (register bits FCNFG[EEERDY], FCNFG[RAMRDY] and FCNFG[PFLSH]). */
#define FSL_FEATURE_FLASH_HAS_FLEX_RAM_FLAGS (0)
/* @brief Has program flash swapping status flag (register bit FCNFG[SWAP]). */
#define FSL_FEATURE_FLASH_HAS_PFLASH_SWAPPING_STATUS_FLAG (0)
/* @brief Has EEPROM region protection (register FEPROT). */
#define FSL_FEATURE_FLASH_HAS_EEROM_REGION_PROTECTION (0)
/* @brief Has data flash region protection (register FDPROT). */
#define FSL_FEATURE_FLASH_HAS_DATA_FLASH_REGION_PROTECTION (0)
/* @brief Has flash access control (registers XACCHn, SACCHn, where n is a number, FACSS and FACSN). */
#define FSL_FEATURE_FLASH_HAS_ACCESS_CONTROL (0)
/* @brief Has flash cache control in FMC module. */
#define FSL_FEATURE_FLASH_HAS_FMC_FLASH_CACHE_CONTROLS (0)
/* @brief Has flash cache control in MCM module. */
#define FSL_FEATURE_FLASH_HAS_MCM_FLASH_CACHE_CONTROLS (1)
/* @brief P-Flash start address. */
#define FSL_FEATURE_FLASH_PFLASH_START_ADDRESS (0x00000000)
/* @brief P-Flash block count. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_COUNT (2)
/* @brief P-Flash block size. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_SIZE (131072)
/* @brief P-Flash sector size. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE (1024)
/* @brief P-Flash write unit size. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE (4)
/* @brief P-Flash data path width. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_DATA_PATH_WIDTH (4)
/* @brief P-Flash block swap feature. */
#define FSL_FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP (0)
/* @brief Has FlexNVM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_NVM (0)
/* @brief FlexNVM start address. (Valid only if FlexNVM is available.) */
#define FSL_FEATURE_FLASH_FLEX_NVM_START_ADDRESS (0x00000000)
/* @brief FlexNVM block count. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_COUNT (0)
/* @brief FlexNVM block size. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SIZE (0)
/* @brief FlexNVM sector size. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_SECTOR_SIZE (0)
/* @brief FlexNVM write unit size. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_WRITE_UNIT_SIZE (0)
/* @brief FlexNVM data path width. */
#define FSL_FEATURE_FLASH_FLEX_BLOCK_DATA_PATH_WIDTH (0)
/* @brief Has FlexRAM memory. */
#define FSL_FEATURE_FLASH_HAS_FLEX_RAM (0)
/* @brief FlexRAM start address. (Valid only if FlexRAM is available.) */
#define FSL_FEATURE_FLASH_FLEX_RAM_START_ADDRESS (0x00000000)
/* @brief FlexRAM size. */
#define FSL_FEATURE_FLASH_FLEX_RAM_SIZE (0)
/* @brief Has 0x00 Read 1s Block command. */
#define FSL_FEATURE_FLASH_HAS_READ_1S_BLOCK_CMD (1)
/* @brief Has 0x01 Read 1s Section command. */
#define FSL_FEATURE_FLASH_HAS_READ_1S_SECTION_CMD (1)
/* @brief Has 0x02 Program Check command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_CHECK_CMD (1)
/* @brief Has 0x03 Read Resource command. */
#define FSL_FEATURE_FLASH_HAS_READ_RESOURCE_CMD (1)
/* @brief Has 0x06 Program Longword command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_LONGWORD_CMD (1)
/* @brief Has 0x07 Program Phrase command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_PHRASE_CMD (0)
/* @brief Has 0x08 Erase Flash Block command. */
#define FSL_FEATURE_FLASH_HAS_ERASE_FLASH_BLOCK_CMD (1)
/* @brief Has 0x09 Erase Flash Sector command. */
#define FSL_FEATURE_FLASH_HAS_ERASE_FLASH_SECTOR_CMD (1)
/* @brief Has 0x0B Program Section command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_SECTION_CMD (0)
/* @brief Has 0x40 Read 1s All Blocks command. */
#define FSL_FEATURE_FLASH_HAS_READ_1S_ALL_BLOCKS_CMD (1)
/* @brief Has 0x41 Read Once command. */
#define FSL_FEATURE_FLASH_HAS_READ_ONCE_CMD (1)
/* @brief Has 0x43 Program Once command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_ONCE_CMD (1)
/* @brief Has 0x44 Erase All Blocks command. */
#define FSL_FEATURE_FLASH_HAS_ERASE_ALL_BLOCKS_CMD (1)
/* @brief Has 0x45 Verify Backdoor Access Key command. */
#define FSL_FEATURE_FLASH_HAS_VERIFY_BACKDOOR_ACCESS_KEY_CMD (1)
/* @brief Has 0x46 Swap Control command. */
#define FSL_FEATURE_FLASH_HAS_SWAP_CONTROL_CMD (0)
/* @brief Has 0x80 Program Partition command. */
#define FSL_FEATURE_FLASH_HAS_PROGRAM_PARTITION_CMD (0)
/* @brief Has 0x81 Set FlexRAM Function command. */
#define FSL_FEATURE_FLASH_HAS_SET_FLEXRAM_FUNCTION_CMD (0)
/* @brief P-Flash Erase/Read 1st all block command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_BLOCK_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Erase sector command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_SECTOR_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Rrogram/Verify section command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_SECTION_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Read resource command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_RESOURCE_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Program check command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_CHECK_CMD_ADDRESS_ALIGMENT (4)
/* @brief P-Flash Program check command address alignment. */
#define FSL_FEATURE_FLASH_PFLASH_SWAP_CONTROL_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Erase/Read 1st all block command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_BLOCK_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Erase sector command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_SECTOR_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Rrogram/Verify section command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_SECTION_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Read resource command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_RESOURCE_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM Program check command address alignment. */
#define FSL_FEATURE_FLASH_FLEX_NVM_CHECK_CMD_ADDRESS_ALIGMENT (0)
/* @brief FlexNVM partition code 0000 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0000 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0001 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0001 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0010 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0010 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0011 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0011 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0100 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0100 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0101 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0101 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0110 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0110 (0xFFFFFFFF)
/* @brief FlexNVM partition code 0111 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_0111 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1000 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1000 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1001 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1001 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1010 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1010 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1011 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1011 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1100 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1100 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1101 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1101 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1110 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1110 (0xFFFFFFFF)
/* @brief FlexNVM partition code 1111 mapping to data flash size in bytes (0xFFFFFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_DFLASH_SIZE_FOR_DEPART_1111 (0xFFFFFFFF)
/* @brief Emulated eeprom size code 0000 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0000 (0xFFFF)
/* @brief Emulated eeprom size code 0001 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0001 (0xFFFF)
/* @brief Emulated eeprom size code 0010 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0010 (0xFFFF)
/* @brief Emulated eeprom size code 0011 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0011 (0xFFFF)
/* @brief Emulated eeprom size code 0100 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0100 (0xFFFF)
/* @brief Emulated eeprom size code 0101 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0101 (0xFFFF)
/* @brief Emulated eeprom size code 0110 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0110 (0xFFFF)
/* @brief Emulated eeprom size code 0111 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_0111 (0xFFFF)
/* @brief Emulated eeprom size code 1000 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1000 (0xFFFF)
/* @brief Emulated eeprom size code 1001 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1001 (0xFFFF)
/* @brief Emulated eeprom size code 1010 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1010 (0xFFFF)
/* @brief Emulated eeprom size code 1011 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1011 (0xFFFF)
/* @brief Emulated eeprom size code 1100 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1100 (0xFFFF)
/* @brief Emulated eeprom size code 1101 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1101 (0xFFFF)
/* @brief Emulated eeprom size code 1110 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1110 (0xFFFF)
/* @brief Emulated eeprom size code 1111 mapping to emulated eeprom size in bytes (0xFFFF = reserved). */
#define FSL_FEATURE_FLASH_FLEX_NVM_EEPROM_SIZE_FOR_EEESIZE_1111 (0xFFFF)
#endif
/* GPIO module features */
/* @brief Has fast (single cycle) access capability via a dedicated memory region. */
#define FSL_FEATURE_GPIO_HAS_FAST_GPIO (0)
/* @brief Has port input disable register (PIDR). */
#define FSL_FEATURE_GPIO_HAS_INPUT_DISABLE (0)
/* @brief Has dedicated interrupt vector. */
#define FSL_FEATURE_GPIO_HAS_INTERRUPT_VECTOR (1)
/* I2C module features */
/* @brief Has System Management Bus support (registers SMB, A2, SLTL and SLTH). */
#define FSL_FEATURE_I2C_HAS_SMBUS (1)
/* @brief Maximum supported baud rate in kilobit per second. */
#define FSL_FEATURE_I2C_MAX_BAUD_KBPS (400)
/* @brief Is affected by errata with ID 6070 (repeat start cannot be generated if the F[MULT] bit field is set to a non-zero value). */
#define FSL_FEATURE_I2C_HAS_ERRATA_6070 (0)
/* @brief Has DMA support (register bit C1[DMAEN]). */
#define FSL_FEATURE_I2C_HAS_DMA_SUPPORT (1)
/* @brief Has I2C bus start and stop detection (register bits FLT[SSIE], FLT[STARTF] and FLT[STOPF]). */
#define FSL_FEATURE_I2C_HAS_START_STOP_DETECT (1)
/* @brief Has I2C bus stop detection (register bits FLT[STOPIE] and FLT[STOPF]). */
#define FSL_FEATURE_I2C_HAS_STOP_DETECT (0)
/* @brief Has I2C bus stop hold off (register bit FLT[SHEN]). */
#define FSL_FEATURE_I2C_HAS_STOP_HOLD_OFF (1)
/* @brief Maximum width of the glitch filter in number of bus clocks. */
#define FSL_FEATURE_I2C_MAX_GLITCH_FILTER_WIDTH (15)
/* @brief Has control of the drive capability of the I2C pins. */
#define FSL_FEATURE_I2C_HAS_HIGH_DRIVE_SELECTION (1)
/* @brief Has double buffering support (register S2). */
#define FSL_FEATURE_I2C_HAS_DOUBLE_BUFFERING (1)
/* SAI module features */
/* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW], RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */
#define FSL_FEATURE_SAI_FIFO_COUNT (1)
/* @brief Receive/transmit channel number (register bit fields TCR3[TCE], RCR3[RCE], registers TDRn and RDRn). */
#define FSL_FEATURE_SAI_CHANNEL_COUNT (1)
/* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ], RMR[RWM]). */
#define FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME (2)
/* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR], TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */
#define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (0)
/* @brief Has packing of 8-bit and 16-bit data into each 32-bit FIFO word (register bit fields TCR4[FPACK], RCR4[FPACK]). */
#define FSL_FEATURE_SAI_HAS_FIFO_PACKING (1)
/* @brief Configures when the SAI will continue transmitting after a FIFO error has been detected (register bit fields TCR4[FCONT], RCR4[FCONT]). */
#define FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR (1)
/* @brief Configures if the frame sync is generated internally, a frame sync is only generated when the FIFO warning flag is clear or continuously (register bit fields TCR4[ONDEM], RCR4[ONDEM]). */
#define FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE (1)
/* @brief Simplified bit clock source and asynchronous/synchronous mode selection (register bit fields TCR2[CLKMODE], RCR2[CLKMODE]), in comparison with the exclusively implemented TCR2[SYNC,BCS,BCI,MSEL], RCR2[SYNC,BCS,BCI,MSEL]. */
#define FSL_FEATURE_SAI_HAS_CLOCKING_MODE (0)
/* @brief Has register for configuration of the MCLK divide ratio (register bit fields MDR[FRACT], MDR[DIVIDE]). */
#define FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER (0)
/* @brief Ihe interrupt source number */
#define FSL_FEATURE_SAI_INT_SOURCE_NUM (1)
/* SLCD module features */
/* @brief Has Multi Alternate Clock Source (register bit GCR[ATLSOURCE]). */
#define FSL_FEATURE_SLCD_HAS_MULTI_ALTERNATE_CLOCK_SOURCE (1)
/* @brief Has fast frame rate (register bit GCR[FFR]). */
#define FSL_FEATURE_SLCD_HAS_FAST_FRAME_RATE (1)
/* @brief Has frame frequency interrupt (register bit GCR[LCDIEN]). */
#define FSL_FEATURE_SLCD_HAS_FRAME_FREQUENCY_INTERRUPT (0)
/* @brief Has pad safe (register bit GCR[PADSAFE]). */
#define FSL_FEATURE_SLCD_HAS_PAD_SAFE (1)
/* @brief Total pin number on LCD. */
#define FSL_FEATURE_SLCD_HAS_PIN_NUM (64)
/* @brief Total phase number on SLCD. */
#define FSL_FEATURE_SLCD_HAS_PHASE_NUM (8)
/* LLWU module features */
/* @brief Maximum number of pins (maximal index plus one) connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN (16)
/* @brief Has pins 8-15 connected to LLWU device. */
#define FSL_FEATURE_LLWU_EXTERNAL_PIN_GROUP2 (1)
/* @brief Maximum number of internal modules connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE (8)
/* @brief Number of digital filters. */
#define FSL_FEATURE_LLWU_HAS_PIN_FILTER (2)
/* @brief Has MF5 register. */
#define FSL_FEATURE_LLWU_HAS_MF (0)
/* @brief Has possibility to enable reset in low leakage power mode and enable digital filter for RESET pin (register LLWU_RST). */
#define FSL_FEATURE_LLWU_HAS_RESET_ENABLE (0)
/* @brief Has external pin 0 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN0 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN0_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN0_GPIO_PIN (0)
/* @brief Has external pin 1 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN1 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN1_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN1_GPIO_PIN (0)
/* @brief Has external pin 2 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN2 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN2_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN2_GPIO_PIN (0)
/* @brief Has external pin 3 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN3 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN3_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN3_GPIO_PIN (0)
/* @brief Has external pin 4 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN4 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN4_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN4_GPIO_PIN (0)
/* @brief Has external pin 5 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN5 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN5_GPIO_IDX (GPIOB_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN5_GPIO_PIN (0)
/* @brief Has external pin 6 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN6 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN6_GPIO_IDX (GPIOC_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN6_GPIO_PIN (1)
/* @brief Has external pin 7 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN7 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN7_GPIO_IDX (GPIOC_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN7_GPIO_PIN (3)
/* @brief Has external pin 8 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN8 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN8_GPIO_IDX (GPIOC_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN8_GPIO_PIN (4)
/* @brief Has external pin 9 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN9 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN9_GPIO_IDX (GPIOC_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN9_GPIO_PIN (5)
/* @brief Has external pin 10 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN10 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN10_GPIO_IDX (GPIOC_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN10_GPIO_PIN (6)
/* @brief Has external pin 11 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN11 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN11_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN11_GPIO_PIN (0)
/* @brief Has external pin 12 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN12 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN12_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN12_GPIO_PIN (0)
/* @brief Has external pin 13 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN13 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN13_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN13_GPIO_PIN (0)
/* @brief Has external pin 14 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN14 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN14_GPIO_IDX (GPIOD_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN14_GPIO_PIN (4)
/* @brief Has external pin 15 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN15 (1)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN15_GPIO_IDX (GPIOD_IDX)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN15_GPIO_PIN (6)
/* @brief Has external pin 16 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN16 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN16_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN16_GPIO_PIN (0)
/* @brief Has external pin 17 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN17 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN17_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN17_GPIO_PIN (0)
/* @brief Has external pin 18 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN18 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN18_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN18_GPIO_PIN (0)
/* @brief Has external pin 19 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN19 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN19_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN19_GPIO_PIN (0)
/* @brief Has external pin 20 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN20 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN20_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN20_GPIO_PIN (0)
/* @brief Has external pin 21 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN21 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN21_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN21_GPIO_PIN (0)
/* @brief Has external pin 22 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN22 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN22_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN22_GPIO_PIN (0)
/* @brief Has external pin 23 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN23 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN23_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN23_GPIO_PIN (0)
/* @brief Has external pin 24 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN24 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN24_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN24_GPIO_PIN (0)
/* @brief Has external pin 25 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN25 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN25_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN25_GPIO_PIN (0)
/* @brief Has external pin 26 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN26 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN26_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN26_GPIO_PIN (0)
/* @brief Has external pin 27 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN27 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN27_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN27_GPIO_PIN (0)
/* @brief Has external pin 28 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN28 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN28_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN28_GPIO_PIN (0)
/* @brief Has external pin 29 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN29 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN29_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN29_GPIO_PIN (0)
/* @brief Has external pin 30 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN30 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN30_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN30_GPIO_PIN (0)
/* @brief Has external pin 31 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN31 (0)
/* @brief Index of port of external pin. */
#define FSL_FEATURE_LLWU_PIN31_GPIO_IDX (0)
/* @brief Number of external pin port on specified port. */
#define FSL_FEATURE_LLWU_PIN31_GPIO_PIN (0)
/* @brief Has internal module 0 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE0 (1)
/* @brief Has internal module 1 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE1 (1)
/* @brief Has internal module 2 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE2 (0)
/* @brief Has internal module 3 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE3 (0)
/* @brief Has internal module 4 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE4 (0)
/* @brief Has internal module 5 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE5 (1)
/* @brief Has internal module 6 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE6 (0)
/* @brief Has internal module 7 connected to LLWU device. */
#define FSL_FEATURE_LLWU_HAS_INTERNAL_MODULE7 (1)
/* LPTMR module features */
/* @brief Has shared interrupt handler with another LPTMR module. */
#define FSL_FEATURE_LPTMR_HAS_SHARED_IRQ_HANDLER (0)
/* LPUART module features */
/* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
#define FSL_FEATURE_LPUART_HAS_IRQ_EXTENDED_FUNCTIONS (0)
/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
#define FSL_FEATURE_LPUART_HAS_LOW_POWER_UART_SUPPORT (1)
/* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
#define FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS (1)
/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
#define FSL_FEATURE_LPUART_HAS_FIFO (0)
/* @brief Has 32-bit register MODIR */
#define FSL_FEATURE_LPUART_HAS_MODIR (0)
/* @brief Hardware flow control (RTS, CTS) is supported. */
#define FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT (0)
/* @brief Infrared (modulation) is supported. */
#define FSL_FEATURE_LPUART_HAS_IR_SUPPORT (0)
/* @brief 2 bits long stop bit is available. */
#define FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT (1)
/* @brief Maximal data width without parity bit. */
#define FSL_FEATURE_LPUART_HAS_10BIT_DATA_SUPPORT (1)
/* @brief Baud rate fine adjustment is available. */
#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (0)
/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
#define FSL_FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (1)
/* @brief Baud rate oversampling is available. */
#define FSL_FEATURE_LPUART_HAS_RX_RESYNC_SUPPORT (1)
/* @brief Baud rate oversampling is available. */
#define FSL_FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (1)
/* @brief Peripheral type. */
#define FSL_FEATURE_LPUART_IS_SCI (1)
/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
#define FSL_FEATURE_LPUART_FIFO_SIZE (0)
/* @brief Maximal data width without parity bit. */
#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_NO_PARITY (10)
/* @brief Maximal data width with parity bit. */
#define FSL_FEATURE_LPUART_MAX_DATA_WIDTH_WITH_PARITY (9)
/* @brief Supports two match addresses to filter incoming frames. */
#define FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING (1)
/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
#define FSL_FEATURE_LPUART_HAS_DMA_ENABLE (1)
/* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
#define FSL_FEATURE_LPUART_HAS_DMA_SELECT (0)
/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
#define FSL_FEATURE_LPUART_HAS_BIT_ORDER_SELECT (1)
/* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
#define FSL_FEATURE_LPUART_HAS_SMART_CARD_SUPPORT (0)
/* @brief Has improved smart card (ISO7816 protocol) support. */
#define FSL_FEATURE_LPUART_HAS_IMPROVED_SMART_CARD_SUPPORT (0)
/* @brief Has local operation network (CEA709.1-B protocol) support. */
#define FSL_FEATURE_LPUART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
/* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
#define FSL_FEATURE_LPUART_HAS_32BIT_REGISTERS (1)
/* @brief Lin break detect available (has bit BDH[LBKDIE]). */
#define FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT (0)
/* @brief UART stops in Wait mode available (has bit C1[UARTSWAI]). */
#define FSL_FEATURE_LPUART_HAS_WAIT_MODE_OPERATION (0)
/* @brief Has separate DMA RX and TX requests. */
#define FSL_FEATURE_LPUART_HAS_SEPARATE_DMA_RX_TX_REQn(x) \
((x) == 0 ? (1) : \
((x) == 1 ? (1) : (-1)))
/* MCGLITE module features */
/* @brief Defines that clock generator is MCG Lite. */
#define FSL_FEATURE_MCGLITE_MCGLITE (1)
/* @brief Has Crystal Oscillator Operation Mode Selection. */
#define FSL_FEATURE_MCGLITE_HAS_HGO0 (1)
/* @brief Has HCTRIM register available. */
#define FSL_FEATURE_MCGLITE_HAS_HCTRIM (1)
/* @brief Has HTTRIM register available. */
#define FSL_FEATURE_MCGLITE_HAS_HTTRIM (1)
/* @brief Has HFTRIM register available. */
#define FSL_FEATURE_MCGLITE_HAS_HFTRIM (1)
/* @brief Has LTRIMRNG register available. */
#define FSL_FEATURE_MCGLITE_HAS_LTRIMRNG (1)
/* @brief Has LFTRIM register available. */
#define FSL_FEATURE_MCGLITE_HAS_LFTRIM (1)
/* @brief Has LSTRIM register available. */
#define FSL_FEATURE_MCGLITE_HAS_LSTRIM (1)
/* @brief Has External Clock Source Frequency Range Selection. */
#define FSL_FEATURE_MCGLITE_HAS_RANGE0 (1)
/* interrupt module features */
/* @brief Lowest interrupt request number. */
#define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
/* @brief Highest interrupt request number. */
#define FSL_FEATURE_INTERRUPT_IRQ_MAX (31)
/* OSC module features */
/* @brief Has OSC1 external oscillator. */
#define FSL_FEATURE_OSC_HAS_OSC1 (0)
/* @brief Has OSC0 external oscillator. */
#define FSL_FEATURE_OSC_HAS_OSC0 (1)
/* @brief Has OSC external oscillator (without index). */
#define FSL_FEATURE_OSC_HAS_OSC (0)
/* @brief Number of OSC external oscillators. */
#define FSL_FEATURE_OSC_OSC_COUNT (1)
/* @brief Has external reference clock divider (register bit field DIV[ERPS]). */
#define FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER (0)
/* PIT module features */
/* @brief Number of channels (related to number of registers LDVALn, CVALn, TCTRLn, TFLGn). */
#define FSL_FEATURE_PIT_TIMER_COUNT (2)
/* @brief Has lifetime timer (related to existence of registers LTMR64L and LTMR64H). */
#define FSL_FEATURE_PIT_HAS_LIFETIME_TIMER (1)
/* @brief Has chain mode (related to existence of register bit field TCTRLn[CHN]). */
#define FSL_FEATURE_PIT_HAS_CHAIN_MODE (1)
/* @brief Has shared interrupt handler (has not individual interrupt handler for each channel). */
#define FSL_FEATURE_PIT_HAS_SHARED_IRQ_HANDLER (1)
/* PMC module features */
/* @brief Has Bandgap Enable In VLPx Operation support. */
#define FSL_FEATURE_PMC_HAS_BGEN (1)
/* @brief Has Bandgap Buffer Drive Select. */
#define FSL_FEATURE_PMC_HAS_BGBDS (0)
/* PORT module features */
/* @brief Has control lock (register bit PCR[LK]). */
#define FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK (0)
/* @brief Has open drain control (register bit PCR[ODE]). */
#define FSL_FEATURE_PORT_HAS_OPEN_DRAIN (0)
/* @brief Has digital filter (registers DFER, DFCR and DFWR). */
#define FSL_FEATURE_PORT_HAS_DIGITAL_FILTER (0)
/* @brief Has DMA request (register bit field PCR[IRQC] values). */
#define FSL_FEATURE_PORT_HAS_DMA_REQUEST (1)
/* @brief Has pull resistor selection available. */
#define FSL_FEATURE_PORT_HAS_PULL_SELECTION (1)
/* @brief Has pull resistor enable (register bit PCR[PE]). */
#define FSL_FEATURE_PORT_HAS_PULL_ENABLE (1)
/* @brief Has slew rate control (register bit PCR[SRE]). */
#define FSL_FEATURE_PORT_HAS_SLEW_RATE (1)
/* @brief Has passive filter (register bit field PCR[PFE]). */
#define FSL_FEATURE_PORT_HAS_PASSIVE_FILTER (1)
/* @brief Has drive strength control (register bit PCR[DSE]). */
#define FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH (1)
/* @brief Has separate drive strength register (HDRVE). */
#define FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH_REGISTER (0)
/* @brief Has glitch filter (register IOFLT). */
#define FSL_FEATURE_PORT_HAS_GLITCH_FILTER (0)
/* @brief Defines width of PCR[MUX] field. */
#define FSL_FEATURE_PORT_PCR_MUX_WIDTH (3)
/* @brief Defines whether PCR[IRQC] bit-field has flag states. */
#define FSL_FEATURE_PORT_HAS_IRQC_FLAG (0)
/* @brief Defines whether PCR[IRQC] bit-field has trigger states. */
#define FSL_FEATURE_PORT_HAS_IRQC_TRIGGER (0)
/* RCM module features */
/* @brief Has Loss-of-Lock Reset support. */
#define FSL_FEATURE_RCM_HAS_LOL (0)
/* @brief Has Loss-of-Clock Reset support. */
#define FSL_FEATURE_RCM_HAS_LOC (0)
/* @brief Has JTAG generated Reset support. */
#define FSL_FEATURE_RCM_HAS_JTAG (0)
/* @brief Has EzPort generated Reset support. */
#define FSL_FEATURE_RCM_HAS_EZPORT (0)
/* @brief Has bit-field indicating EZP_MS_B pin state during last reset. */
#define FSL_FEATURE_RCM_HAS_EZPMS (0)
/* @brief Has boot ROM configuration, MR[BOOTROM], FM[FORCEROM] */
#define FSL_FEATURE_RCM_HAS_BOOTROM (1)
/* @brief Has sticky system reset status register RCM_SSRS0 and RCM_SSRS1. */
#define FSL_FEATURE_RCM_HAS_SSRS (1)
/* RTC module features */
/* @brief Has wakeup pin (bit field CR[WPS]). */
#define FSL_FEATURE_RTC_HAS_WAKEUP_PIN (1)
/* @brief Has low power features (registers MER, MCLR and MCHR). */
#define FSL_FEATURE_RTC_HAS_MONOTONIC (0)
/* @brief Has read/write access control (registers WAR and RAR). */
#define FSL_FEATURE_RTC_HAS_ACCESS_CONTROL (0)
/* @brief Has security features (registers TTSR, MER, MCLR and MCHR). */
#define FSL_FEATURE_RTC_HAS_SECURITY (0)
/* SIM module features */
/* @brief Has USB FS divider. */
#define FSL_FEATURE_SIM_USBFS_USE_SPECIAL_DIVIDER (0)
/* @brief Is PLL clock divided by 2 before MCG PLL/FLL clock selection. */
#define FSL_FEATURE_SIM_PLLCLK_USE_SPECIAL_DIVIDER (0)
/* @brief Has RAM size specification (register bit field SOPT1[RAMSIZE]). */
#define FSL_FEATURE_SIM_OPT_HAS_RAMSIZE (0)
/* @brief Has 32k oscillator clock output (register bit SOPT1[OSC32KOUT]). */
#define FSL_FEATURE_SIM_OPT_HAS_OSC32K_OUT (1)
/* @brief Has 32k oscillator clock selection (register bit field SOPT1[OSC32KSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_OSC32K_SELECTION (1)
/* @brief 32k oscillator clock selection width (width of register bit field SOPT1[OSC32KSEL]). */
#define FSL_FEATURE_SIM_OPT_OSC32K_SELECTION_WIDTH (2)
/* @brief Has RTC clock output selection (register bit SOPT2[RTCCLKOUTSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_RTC_CLOCK_OUT_SELECTION (1)
/* @brief Has USB voltage regulator (register bits SOPT1[USBVSTBY], SOPT1[USBSSTBY], SOPT1[USBREGEN], SOPT1CFG[URWE], SOPT1CFG[UVSWE], SOPT1CFG[USSWE]). */
#define FSL_FEATURE_SIM_OPT_HAS_USB_VOLTAGE_REGULATOR (1)
/* @brief USB has integrated PHY (register bits USBPHYCTL[USBVREGSEL], USBPHYCTL[USBVREGPD], USBPHYCTL[USB3VOUTTRG], USBPHYCTL[USBDISILIM], SOPT2[USBSLSRC], SOPT2[USBREGEN]). */
#define FSL_FEATURE_SIM_OPT_HAS_USB_PHY (0)
/* @brief Has PTD7 pad drive strength control (register bit SOPT2[PTD7PAD]). */
#define FSL_FEATURE_SIM_OPT_HAS_PTD7PAD (0)
/* @brief Has FlexBus security level selection (register bit SOPT2[FBSL]). */
#define FSL_FEATURE_SIM_OPT_HAS_FBSL (0)
/* @brief Has number of FlexBus hold cycle before FlexBus can release bus (register bit SOPT6[PCR]). */
#define FSL_FEATURE_SIM_OPT_HAS_PCR (0)
/* @brief Has number of NFC hold cycle in case of FlexBus request (register bit SOPT6[MCC]). */
#define FSL_FEATURE_SIM_OPT_HAS_MCC (0)
/* @brief Has UART open drain enable (register bits UARTnODE, where n is a number, in register SOPT5). */
#define FSL_FEATURE_SIM_OPT_HAS_ODE (1)
/* @brief Number of LPUART modules (number of register bits LPUARTn, where n is a number, in register SCGC5). */
#define FSL_FEATURE_SIM_OPT_LPUART_COUNT (2)
/* @brief Number of UART modules (number of register bits UARTn, where n is a number, in register SCGC4). */
#define FSL_FEATURE_SIM_OPT_UART_COUNT (1)
/* @brief Has UART0 open drain enable (register bit SOPT5[UART0ODE]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART0_ODE (0)
/* @brief Has UART1 open drain enable (register bit SOPT5[UART1ODE]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART1_ODE (0)
/* @brief Has UART2 open drain enable (register bit SOPT5[UART2ODE]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART2_ODE (1)
/* @brief Has LPUART0 open drain enable (register bit SOPT5[LPUART0ODE]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART0_ODE (1)
/* @brief Has LPUART1 open drain enable (register bit SOPT5[LPUART1ODE]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART1_ODE (1)
/* @brief Has CMT/UART pad drive strength control (register bit SOPT2[CMTUARTPAD]). */
#define FSL_FEATURE_SIM_OPT_HAS_CMTUARTPAD (0)
/* @brief Has LPUART0 transmit data source selection (register bit SOPT5[LPUART0TXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART0_TX_SRC (1)
/* @brief Has LPUART0 receive data source selection (register bit SOPT5[LPUART0RXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART0_RX_SRC (1)
/* @brief Has LPUART1 transmit data source selection (register bit SOPT5[LPUART1TXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART1_TX_SRC (1)
/* @brief Has LPUART1 receive data source selection (register bit SOPT5[LPUART1RXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART1_RX_SRC (1)
/* @brief Has UART0 transmit data source selection (register bit SOPT5[UART0TXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART0_TX_SRC (0)
/* @brief UART0 transmit data source selection width (width of register bit SOPT5[UART0TXSRC]). */
#define FSL_FEATURE_SIM_OPT_UART0_TX_SRC_WIDTH (0)
/* @brief Has UART0 receive data source selection (register bit SOPT5[UART0RXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART0_RX_SRC (0)
/* @brief UART0 receive data source selection width (width of register bit SOPT5[UART0RXSRC]). */
#define FSL_FEATURE_SIM_OPT_UART0_RX_SRC_WIDTH (0)
/* @brief Has UART1 transmit data source selection (register bit SOPT5[UART1TXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART1_TX_SRC (0)
/* @brief Has UART1 receive data source selection (register bit SOPT5[UART1RXSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART1_RX_SRC (0)
/* @brief UART1 receive data source selection width (width of register bit SOPT5[UART1RXSRC]). */
#define FSL_FEATURE_SIM_OPT_UART1_RX_SRC_WIDTH (0)
/* @brief Has FTM module(s) configuration. */
#define FSL_FEATURE_SIM_OPT_HAS_FTM (0)
/* @brief Number of FTM modules. */
#define FSL_FEATURE_SIM_OPT_FTM_COUNT (0)
/* @brief Number of FTM triggers with selectable source. */
#define FSL_FEATURE_SIM_OPT_FTM_TRIGGER_COUNT (0)
/* @brief Has FTM0 triggers source selection (register bits SOPT4[FTM0TRGnSRC], where n is a number). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM0_TRIGGER (0)
/* @brief Has FTM3 triggers source selection (register bits SOPT4[FTM3TRGnSRC], where n is a number). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM3_TRIGGER (0)
/* @brief Has FTM1 channel 0 input capture source selection (register bit SOPT4[FTM1CH0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM1_CHANNELS (0)
/* @brief Has FTM2 channel 0 input capture source selection (register bit SOPT4[FTM2CH0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNELS (0)
/* @brief Has FTM3 channel 0 input capture source selection (register bit SOPT4[FTM3CH0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM3_CHANNELS (0)
/* @brief Has FTM2 channel 1 input capture source selection (register bit SOPT4[FTM2CH1SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM2_CHANNEL1 (0)
/* @brief Number of configurable FTM0 fault detection input (number of register bits SOPT4[FTM0FLTn], where n is a number starting from zero). */
#define FSL_FEATURE_SIM_OPT_FTM0_FAULT_COUNT (0)
/* @brief Number of configurable FTM1 fault detection input (number of register bits SOPT4[FTM1FLTn], where n is a number starting from zero). */
#define FSL_FEATURE_SIM_OPT_FTM1_FAULT_COUNT (0)
/* @brief Number of configurable FTM2 fault detection input (number of register bits SOPT4[FTM2FLTn], where n is a number starting from zero). */
#define FSL_FEATURE_SIM_OPT_FTM2_FAULT_COUNT (0)
/* @brief Number of configurable FTM3 fault detection input (number of register bits SOPT4[FTM3FLTn], where n is a number starting from zero). */
#define FSL_FEATURE_SIM_OPT_FTM3_FAULT_COUNT (0)
/* @brief Has FTM hardware trigger 0 software synchronization (register bit SOPT8[FTMnSYNCBIT], where n is a module instance index). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM_TRIGGER_SYNC (0)
/* @brief Has FTM channels output source selection (register bit SOPT8[FTMxOCHnSRC], where x is a module instance index and n is a channel index). */
#define FSL_FEATURE_SIM_OPT_HAS_FTM_CHANNELS_OUTPUT_SRC (0)
/* @brief Has TPM module(s) configuration. */
#define FSL_FEATURE_SIM_OPT_HAS_TPM (1)
/* @brief The highest TPM module index. */
#define FSL_FEATURE_SIM_OPT_MAX_TPM_INDEX (2)
/* @brief Has TPM module with index 0. */
#define FSL_FEATURE_SIM_OPT_HAS_TPM0 (1)
/* @brief Has TPM0 clock selection (register bit field SOPT4[TPM0CLKSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_TPM0_CLK_SEL (1)
/* @brief Is TPM channels configuration in the SOPT4 (not SOPT9) register (register bits TPMnCH0SRC, TPMnCLKSEL, where n is a module instance index). */
#define FSL_FEATURE_SIM_OPT_HAS_TPM_CHANNELS_CONFIG_IN_SOPT4_REG (1)
/* @brief Has TPM1 channel 0 input capture source selection (register bit field SOPT4[TPM1CH0SRC] or SOPT9[TPM1CH0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_TPM1_CH0_SRC_SELECTION (1)
/* @brief Has TPM1 clock selection (register bit field SOPT4[TPM1CLKSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_TPM1_CLK_SEL (1)
/* @brief TPM1 channel 0 input capture source selection width (width of register bit field SOPT4[TPM1CH0SRC] or SOPT9[TPM1CH0SRC]). */
#define FSL_FEATURE_SIM_OPT_TPM1_CH0_SRC_SELECTION_WIDTH (2)
/* @brief Has TPM2 channel 0 input capture source selection (register bit field SOPT4[TPM2CH0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_TPM2_CH0_SRC_SELECTION (1)
/* @brief Has TPM2 clock selection (register bit field SOPT4[TPM2CLKSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_TPM2_CLK_SEL (1)
/* @brief Has PLL/FLL clock selection (register bit field SOPT2[PLLFLLSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_PLL_FLL_SELECTION (0)
/* @brief PLL/FLL clock selection width (width of register bit field SOPT2[PLLFLLSEL]). */
#define FSL_FEATURE_SIM_OPT_PLL_FLL_SELECTION_WIDTH (0)
/* @brief Has NFC clock source selection (register bit SOPT2[NFCSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_NFCSRC (0)
/* @brief Has eSDHC clock source selection (register bit SOPT2[ESDHCSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_ESDHCSRC (0)
/* @brief Has SDHC clock source selection (register bit SOPT2[SDHCSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_SDHCSRC (0)
/* @brief Has LCDC clock source selection (register bits SOPT2[LCDCSRC], SOPT2[LCDC_CLKSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_LCDCSRC (0)
/* @brief Has ENET timestamp clock source selection (register bit SOPT2[TIMESRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_TIMESRC (0)
/* @brief Has ENET RMII clock source selection (register bit SOPT2[RMIISRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_RMIISRC (0)
/* @brief Has USB clock source selection (register bit SOPT2[USBSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_USBSRC (1)
/* @brief Has USB FS clock source selection (register bit SOPT2[USBFSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_USBFSRC (0)
/* @brief Has USB HS clock source selection (register bit SOPT2[USBHSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_USBHSRC (0)
/* @brief Has LPUART clock source selection (register bit SOPT2[LPUARTSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUARTSRC (0)
/* @brief Has LPUART0 clock source selection (register bit SOPT2[LPUART0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART0SRC (1)
/* @brief Has LPUART1 clock source selection (register bit SOPT2[LPUART1SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_LPUART1SRC (1)
/* @brief Has FLEXIOSRC clock source selection (register bit SOPT2[FLEXIOSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_FLEXIOSRC (1)
/* @brief Has UART0 clock source selection (register bit SOPT2[UART0SRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_UART0SRC (0)
/* @brief Has TPM clock source selection (register bit SOPT2[TPMSRC]). */
#define FSL_FEATURE_SIM_OPT_HAS_TPMSRC (1)
/* @brief Has debug trace clock selection (register bit SOPT2[TRACECLKSEL]). */
#define FSL_FEATURE_SIM_OPT_HAS_TRACE_CLKSEL (0)
/* @brief Number of ADC modules (register bits SOPT7[ADCnTRGSEL], SOPT7[ADCnPRETRGSEL], SOPT7[ADCnALTTRGSEL], where n is a module instance index). */
#define FSL_FEATURE_SIM_OPT_ADC_COUNT (1)
/* @brief Has clock 2 output divider (register bit field CLKDIV1[OUTDIV2]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV2 (0)
/* @brief Has clock 3 output divider (register bit field CLKDIV1[OUTDIV3]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV3 (0)
/* @brief Has clock 4 output divider (register bit field CLKDIV1[OUTDIV4]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV4 (1)
/* @brief Clock 4 output divider width (width of register bit field CLKDIV1[OUTDIV4]). */
#define FSL_FEATURE_SIM_DIVIDER_OUTDIV4_WIDTH (3)
/* @brief Has clock 5 output divider (register bit field CLKDIV1[OUTDIV5]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_OUTDIV5 (0)
/* @brief Has USB clock divider (register bit field CLKDIV2[USBDIV] and CLKDIV2[USBFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_USBDIV (0)
/* @brief Has USB FS clock divider (register bit field CLKDIV2[USBFSDIV] and CLKDIV2[USBFSFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_USBFSDIV (0)
/* @brief Has USB HS clock divider (register bit field CLKDIV2[USBHSDIV] and CLKDIV2[USBHSFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_USBHSDIV (0)
/* @brief Has PLL/FLL clock divider (register bit field CLKDIV3[PLLFLLDIV] and CLKDIV3[PLLFLLFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_PLLFLLDIV (0)
/* @brief Has LCDC clock divider (register bit field CLKDIV3[LCDCDIV] and CLKDIV3[LCDCFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_LCDCDIV (0)
/* @brief Has trace clock divider (register bit field CLKDIV4[TRACEDIV] and CLKDIV4[TRACEFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_TRACEDIV (0)
/* @brief Has NFC clock divider (register bit field CLKDIV4[NFCDIV] and CLKDIV4[NFCFRAC]). */
#define FSL_FEATURE_SIM_DIVIDER_HAS_NFCDIV (0)
/* @brief Has Kinetis family ID (register bit field SDID[FAMILYID]). */
#define FSL_FEATURE_SIM_SDID_HAS_FAMILYID (0)
/* @brief Has Kinetis family ID (register bit field SDID[FAMID]). */
#define FSL_FEATURE_SIM_SDID_HAS_FAMID (1)
/* @brief Has Kinetis sub-family ID (register bit field SDID[SUBFAMID]). */
#define FSL_FEATURE_SIM_SDID_HAS_SUBFAMID (1)
/* @brief Has Kinetis series ID (register bit field SDID[SERIESID]). */
#define FSL_FEATURE_SIM_SDID_HAS_SERIESID (1)
/* @brief Has device die ID (register bit field SDID[DIEID]). */
#define FSL_FEATURE_SIM_SDID_HAS_DIEID (0)
/* @brief Has system SRAM size specifier (register bit field SDID[SRAMSIZE]). */
#define FSL_FEATURE_SIM_SDID_HAS_SRAMSIZE (1)
/* @brief Has flash mode (register bit FCFG1[FLASHDOZE]). */
#define FSL_FEATURE_SIM_FCFG_HAS_FLASHDOZE (1)
/* @brief Has flash disable (register bit FCFG1[FLASHDIS]). */
#define FSL_FEATURE_SIM_FCFG_HAS_FLASHDIS (1)
/* @brief Has FTFE disable (register bit FCFG1[FTFDIS]). */
#define FSL_FEATURE_SIM_FCFG_HAS_FTFDIS (0)
/* @brief Has FlexNVM size specifier (register bit field FCFG1[NVMSIZE]). */
#define FSL_FEATURE_SIM_FCFG_HAS_NVMSIZE (0)
/* @brief Has EEPROM size specifier (register bit field FCFG1[EESIZE]). */
#define FSL_FEATURE_SIM_FCFG_HAS_EESIZE (0)
/* @brief Has FlexNVM partition (register bit field FCFG1[DEPART]). */
#define FSL_FEATURE_SIM_FCFG_HAS_DEPART (0)
/* @brief Maximum flash address block 0 address specifier (register bit field FCFG2[MAXADDR0]). */
#define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR0 (1)
/* @brief Maximum flash address block 1 address specifier (register bit field FCFG2[MAXADDR1]). */
#define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR1 (1)
/* @brief Maximum flash address block 0 or 1 address specifier (register bit field FCFG2[MAXADDR01]). */
#define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR01 (0)
/* @brief Maximum flash address block 2 or 3 address specifier (register bit field FCFG2[MAXADDR23]). */
#define FSL_FEATURE_SIM_FCFG_HAS_MAXADDR23 (0)
/* @brief Has program flash availability specifier (register bit FCFG2[PFLSH]). */
#define FSL_FEATURE_SIM_FCFG_HAS_PFLSH (0)
/* @brief Has program flash swapping (register bit FCFG2[SWAPPFLSH]). */
#define FSL_FEATURE_SIM_FCFG_HAS_PFLSH_SWAP (0)
/* @brief Has miscellanious control register (register MCR). */
#define FSL_FEATURE_SIM_HAS_MISC_CONTROLS (0)
/* @brief Has COP watchdog (registers COPC and SRVCOP). */
#define FSL_FEATURE_SIM_HAS_COP_WATCHDOG (1)
/* @brief Has COP watchdog stop (register bits COPC[COPSTPEN], COPC[COPDBGEN] and COPC[COPCLKSEL]). */
#define FSL_FEATURE_SIM_HAS_COP_STOP (1)
/* @brief Has LLWU clock gate bit (e.g SIM_SCGC4). */
#define FSL_FEATURE_SIM_HAS_SCGC_LLWU (0)
/* SMC module features */
/* @brief Has partial stop option (register bit STOPCTRL[PSTOPO]). */
#define FSL_FEATURE_SMC_HAS_PSTOPO (1)
/* @brief Has LPO power option (register bit STOPCTRL[LPOPO]). */
#define FSL_FEATURE_SMC_HAS_LPOPO (0)
/* @brief Has POR power option (register bit STOPCTRL[PORPO] or VLLSCTRL[PORPO]). */
#define FSL_FEATURE_SMC_HAS_PORPO (1)
/* @brief Has low power wakeup on interrupt (register bit PMCTRL[LPWUI]). */
#define FSL_FEATURE_SMC_HAS_LPWUI (0)
/* @brief Has LLS or VLLS mode control (register bit STOPCTRL[LLSM]). */
#define FSL_FEATURE_SMC_HAS_LLS_SUBMODE (0)
/* @brief Has VLLS mode control (register bit VLLSCTRL[VLLSM]). */
#define FSL_FEATURE_SMC_USE_VLLSCTRL_REG (0)
/* @brief Has VLLS mode control (register bit STOPCTRL[VLLSM]). */
#define FSL_FEATURE_SMC_USE_STOPCTRL_VLLSM (1)
/* @brief Has RAM partition 2 power option (register bit STOPCTRL[RAM2PO]). */
#define FSL_FEATURE_SMC_HAS_RAM2_POWER_OPTION (0)
/* @brief Has high speed run mode (register bit PMPROT[AHSRUN]). */
#define FSL_FEATURE_SMC_HAS_HIGH_SPEED_RUN_MODE (0)
/* @brief Has low leakage stop mode (register bit PMPROT[ALLS]). */
#define FSL_FEATURE_SMC_HAS_LOW_LEAKAGE_STOP_MODE (1)
/* @brief Has stop submode 0(VLLS0). */
#define FSL_FEATURE_SMC_HAS_STOP_SUBMODE0 (1)
/* @brief Has stop submode 2(VLLS2). */
#define FSL_FEATURE_SMC_HAS_STOP_SUBMODE2 (0)
/* SPI module features */
/* @brief Has DMA support (register bit fields C2[RXDMAE] and C2[TXDMAE]). */
#define FSL_FEATURE_SPI_HAS_DMA_SUPPORT (1)
/* @brief Receive/transmit FIFO size in number of 16-bit communication items. */
#define FSL_FEATURE_SPI_FIFO_SIZE (4)
#define FSL_FEATURE_SPI_FIFO_SIZEx { 0, 4 }
/* @brief Maximum transfer data width in bits. */
#define FSL_FEATURE_SPI_MAX_DATA_WIDTH (16)
/* @brief The data register name has postfix (L as low and H as high). */
#define FSL_FEATURE_SPI_DATA_REGISTER_HAS_POSTFIX (1)
/* @brief Has separated TXDATA and CMD FIFOs (register SREX). */
#define FSL_FEATURE_SPI_HAS_SEPARATE_TXDATA_CMD_FIFO (0)
/* @brief Has 16-bit data transfer support. */
#define FSL_FEATURE_SPI_16BIT_TRANSFERS (1)
/* SysTick module features */
/* @brief Systick has external reference clock. */
#define FSL_FEATURE_SYSTICK_HAS_EXT_REF (1)
/* @brief Systick external reference clock is core clock divided by this value. */
#define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (16)
/* TPM module features */
/* @brief Bus clock is the source clock for the module. */
#define FSL_FEATURE_TPM_BUS_CLOCK (0)
/* @brief Number of channels. */
#define FSL_FEATURE_TPM_CHANNEL_COUNT (6)
#define FSL_FEATURE_TPM_CHANNEL_COUNTx { 6, 2, 2 }
/* @brief Has counter reset by the selected input capture event (register bits C0SC[ICRST], C1SC[ICRST], ...). */
#define FSL_FEATURE_TPM_HAS_COUNTER_RESET_BY_CAPTURE_EVENT (0)
/* UART module features */
/* @brief Has receive FIFO overflow detection (bit field CFIFO[RXOFE]). */
#define FSL_FEATURE_UART_HAS_IRQ_EXTENDED_FUNCTIONS (0)
/* @brief Has low power features (can be enabled in wait mode via register bit C1[DOZEEN] or CTRL[DOZEEN] if the registers are 32-bit wide). */
#define FSL_FEATURE_UART_HAS_LOW_POWER_UART_SUPPORT (0)
/* @brief Has extended data register ED (or extra flags in the DATA register if the registers are 32-bit wide). */
#define FSL_FEATURE_UART_HAS_EXTENDED_DATA_REGISTER_FLAGS (0)
/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
#define FSL_FEATURE_UART_HAS_FIFO (0)
/* @brief Hardware flow control (RTS, CTS) is supported. */
#define FSL_FEATURE_UART_HAS_MODEM_SUPPORT (0)
/* @brief Infrared (modulation) is supported. */
#define FSL_FEATURE_UART_HAS_IR_SUPPORT (0)
/* @brief 2 bits long stop bit is available. */
#define FSL_FEATURE_UART_HAS_STOP_BIT_CONFIG_SUPPORT (0)
/* @brief Maximal data width without parity bit. */
#define FSL_FEATURE_UART_HAS_10BIT_DATA_SUPPORT (0)
/* @brief Baud rate fine adjustment is available. */
#define FSL_FEATURE_UART_HAS_BAUD_RATE_FINE_ADJUST_SUPPORT (1)
/* @brief Baud rate oversampling is available (has bit fields C4[OSR], C5[BOTHEDGE], C5[RESYNCDIS] or BAUD[OSR], BAUD[BOTHEDGE], BAUD[RESYNCDIS] if the registers are 32-bit wide). */
#define FSL_FEATURE_UART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT (0)
/* @brief Baud rate oversampling is available. */
#define FSL_FEATURE_UART_HAS_RX_RESYNC_SUPPORT (0)
/* @brief Baud rate oversampling is available. */
#define FSL_FEATURE_UART_HAS_BOTH_EDGE_SAMPLING_SUPPORT (0)
/* @brief Peripheral type. */
#define FSL_FEATURE_UART_IS_SCI (0)
/* @brief Capacity (number of entries) of the transmit/receive FIFO (or zero if no FIFO is available). */
#define FSL_FEATURE_UART_FIFO_SIZE (0)
/* @brief Maximal data width without parity bit. */
#define FSL_FEATURE_UART_MAX_DATA_WIDTH_WITH_NO_PARITY (9)
/* @brief Maximal data width with parity bit. */
#define FSL_FEATURE_UART_MAX_DATA_WIDTH_WITH_PARITY (10)
/* @brief Supports two match addresses to filter incoming frames. */
#define FSL_FEATURE_UART_HAS_ADDRESS_MATCHING (1)
/* @brief Has transmitter/receiver DMA enable bits C5[TDMAE]/C5[RDMAE] (or BAUD[TDMAE]/BAUD[RDMAE] if the registers are 32-bit wide). */
#define FSL_FEATURE_UART_HAS_DMA_ENABLE (0)
/* @brief Has transmitter/receiver DMA select bits C4[TDMAS]/C4[RDMAS], resp. C5[TDMAS]/C5[RDMAS] if IS_SCI = 0. */
#define FSL_FEATURE_UART_HAS_DMA_SELECT (1)
/* @brief Data character bit order selection is supported (bit field S2[MSBF] or STAT[MSBF] if the registers are 32-bit wide). */
#define FSL_FEATURE_UART_HAS_BIT_ORDER_SELECT (1)
/* @brief Has smart card (ISO7816 protocol) support and no improved smart card support. */
#define FSL_FEATURE_UART_HAS_SMART_CARD_SUPPORT (1)
/* @brief Has improved smart card (ISO7816 protocol) support. */
#define FSL_FEATURE_UART_HAS_IMPROVED_SMART_CARD_SUPPORT (1)
/* @brief Has local operation network (CEA709.1-B protocol) support. */
#define FSL_FEATURE_UART_HAS_LOCAL_OPERATION_NETWORK_SUPPORT (0)
/* @brief Has 32-bit registers (BAUD, STAT, CTRL, DATA, MATCH, MODIR) instead of 8-bit (BDH, BDL, C1, S1, D, etc.). */
#define FSL_FEATURE_UART_HAS_32BIT_REGISTERS (0)
/* @brief Lin break detect available (has bit BDH[LBKDIE]). */
#define FSL_FEATURE_UART_HAS_LIN_BREAK_DETECT (0)
/* @brief UART stops in Wait mode available (has bit C1[UARTSWAI]). */
#define FSL_FEATURE_UART_HAS_WAIT_MODE_OPERATION (0)
/* @brief Has separate DMA RX and TX requests. */
#define FSL_FEATURE_UART_HAS_SEPARATE_DMA_RX_TX_REQn(x) \
((x) == 2 ? (1) : (-1))
/* VREF module features */
/* @brief Has chop oscillator (bit TRM[CHOPEN]) */
#define FSL_FEATURE_VREF_HAS_CHOP_OSC (1)
/* @brief Has second order curvature compensation (bit SC[ICOMPEN]) */
#define FSL_FEATURE_VREF_HAS_COMPENSATION (1)
/* @brief Describes the set of SC[MODE_LV] bitfield values */
#define FSL_FEATURE_VREF_MODE_LV_TYPE (1)
/* @brief Module has also low reference (registers VREFL/VREFH) */
#define FSL_FEATURE_VREF_HAS_LOW_REFERENCE (0)
#endif /* __FSL_MKL33Z4_FEATURES_H__ */
/*******************************************************************************
* EOF
******************************************************************************/
| Java |
#!/usr/bin/env bash
set -e
ci_dir="$(dirname "$0")"
. "${ci_dir}/ci-common.sh"
git_download quickchick
if [ "$DOWNLOAD_ONLY" ]; then exit 0; fi
( cd "${CI_BUILD_DIR}/quickchick"
make
make install
make tests
)
| Java |
/**************************************************************************
**
** This file is part of Qt Creator
**
** Copyright (c) 2011 Nokia Corporation and/or its subsidiary(-ies).
**
** Contact: Nokia Corporation ([email protected])
**
** No Commercial Usage
**
** This file contains pre-release code and may not be distributed.
** You may use this file in accordance with the terms and conditions
** contained in the Technology Preview License Agreement accompanying
** this package.
**
** GNU Lesser General Public License Usage
**
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Nokia gives you certain additional
** rights. These rights are described in the Nokia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** If you have questions regarding the use of this file, please contact
** Nokia at [email protected].
**
**************************************************************************/
#ifndef HIGHLIGHTER_H
#define HIGHLIGHTER_H
#include "basetextdocumentlayout.h"
#include "syntaxhighlighter.h"
#include <QtCore/QString>
#include <QtCore/QVector>
#include <QtCore/QStack>
#include <QtCore/QSharedPointer>
#include <QtCore/QStringList>
#include <QtGui/QSyntaxHighlighter>
#include <QtGui/QTextCharFormat>
namespace TextEditor {
class TabSettings;
namespace Internal {
class Rule;
class Context;
class HighlightDefinition;
class ProgressData;
class Highlighter : public TextEditor::SyntaxHighlighter
{
Q_OBJECT
public:
Highlighter(QTextDocument *parent = 0);
virtual ~Highlighter();
enum TextFormatId {
Normal,
VisualWhitespace,
Keyword,
DataType,
Decimal,
BaseN,
Float,
Char,
String,
Comment,
Alert,
Error,
Function,
RegionMarker,
Others
};
void configureFormat(TextFormatId id, const QTextCharFormat &format);
void setTabSettings(const TabSettings &ts);
void setDefaultContext(const QSharedPointer<Context> &defaultContext);
protected:
virtual void highlightBlock(const QString &text);
private:
void setupDataForBlock(const QString &text);
void setupDefault();
void setupFromWillContinue();
void setupFromContinued();
void setupFromPersistent();
void iterateThroughRules(const QString &text,
const int length,
ProgressData *progress,
const bool childRule,
const QList<QSharedPointer<Rule> > &rules);
void assignCurrentContext();
bool contextChangeRequired(const QString &contextName) const;
void handleContextChange(const QString &contextName,
const QSharedPointer<HighlightDefinition> &definition,
const bool setCurrent = true);
void changeContext(const QString &contextName,
const QSharedPointer<HighlightDefinition> &definition,
const bool assignCurrent = true);
QString currentContextSequence() const;
void mapPersistentSequence(const QString &contextSequence);
void mapLeadingSequence(const QString &contextSequence);
void pushContextSequence(int state);
void pushDynamicContext(const QSharedPointer<Context> &baseContext);
void createWillContinueBlock();
void analyseConsistencyOfWillContinueBlock(const QString &text);
void applyFormat(int offset,
int count,
const QString &itemDataName,
const QSharedPointer<HighlightDefinition> &definition);
void applyRegionBasedFolding() const;
void applyIndentationBasedFolding(const QString &text) const;
int neighbouringNonEmptyBlockIndent(QTextBlock block, const bool previous) const;
// Mapping from Kate format strings to format ids.
struct KateFormatMap
{
KateFormatMap();
QHash<QString, TextFormatId> m_ids;
};
static const KateFormatMap m_kateFormats;
QHash<TextFormatId, QTextCharFormat> m_creatorFormats;
struct BlockData : TextBlockUserData
{
BlockData();
virtual ~BlockData();
int m_foldingIndentDelta;
int m_originalObservableState;
QStack<QString> m_foldingRegions;
QSharedPointer<Context> m_contextToContinue;
};
BlockData *initializeBlockData();
static BlockData *blockData(QTextBlockUserData *userData);
// Block states are composed by the region depth (used for code folding) and what I call
// observable states. Observable states occupy the 12 least significant bits. They might have
// the following values:
// - Default [0]: Nothing special.
// - WillContinue [1]: When there is match of the LineContinue rule (backslash as the last
// character).
// - Continued [2]: Blocks that happen after a WillContinue block and continue from their
// context until the next line end.
// - Persistent(s) [Anything >= 3]: Correspond to persistent contexts which last until a pop
// occurs due to a matching rule. Every sequence of persistent contexts seen so far is
// associated with a number (incremented by a unit each time).
// Region depths occupy the remaining bits.
enum ObservableBlockState {
Default = 0,
WillContinue,
Continued,
PersistentsStart
};
int computeState(const int observableState) const;
static int extractRegionDepth(const int state);
static int extractObservableState(const int state);
int m_regionDepth;
bool m_indentationBasedFolding;
const TabSettings *m_tabSettings;
int m_persistentObservableStatesCounter;
int m_dynamicContextsCounter;
bool m_isBroken;
QSharedPointer<Context> m_defaultContext;
QSharedPointer<Context> m_currentContext;
QVector<QSharedPointer<Context> > m_contexts;
// Mapping from context sequences to the observable persistent state they represent.
QHash<QString, int> m_persistentObservableStates;
// Mapping from context sequences to the non-persistent observable state that led to them.
QHash<QString, int> m_leadingObservableStates;
// Mapping from observable persistent states to context sequences (the actual "stack").
QHash<int, QVector<QSharedPointer<Context> > > m_persistentContexts;
// Captures used in dynamic rules.
QStringList m_currentCaptures;
};
} // namespace Internal
} // namespace TextEditor
#endif // HIGHLIGHTER_H
| Java |
/****************************************************************************
**
** Copyright (C) 2014 Digia Plc and/or its subsidiary(-ies).
** Contact: http://www.qt-project.org/legal
**
** This file is part of the QtDeclarative module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Digia. For licensing terms and
** conditions see http://qt.digia.com/licensing. For further information
** use the contact form at http://qt.digia.com/contact-us.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Digia gives you certain additional
** rights. These rights are described in the Digia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3.0 as published by the Free Software
** Foundation and appearing in the file LICENSE.GPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU General Public License version 3.0 requirements will be
** met: http://www.gnu.org/copyleft/gpl.html.
**
**
** $QT_END_LICENSE$
**
****************************************************************************/
#include "private/qdeclarativestate_p_p.h"
#include "private/qdeclarativestate_p.h"
#include "private/qdeclarativetransition_p.h"
#include "private/qdeclarativestategroup_p.h"
#include "private/qdeclarativestateoperations_p.h"
#include "private/qdeclarativeanimation_p.h"
#include "private/qdeclarativeanimation_p_p.h"
#include <qdeclarativebinding_p.h>
#include <qdeclarativeglobal_p.h>
#include <QtCore/qdebug.h>
QT_BEGIN_NAMESPACE
DEFINE_BOOL_CONFIG_OPTION(stateChangeDebug, STATECHANGE_DEBUG);
QDeclarativeAction::QDeclarativeAction()
: restore(true), actionDone(false), reverseEvent(false), deletableToBinding(false), fromBinding(0), event(0),
specifiedObject(0)
{
}
QDeclarativeAction::QDeclarativeAction(QObject *target, const QString &propertyName,
const QVariant &value)
: restore(true), actionDone(false), reverseEvent(false), deletableToBinding(false),
property(target, propertyName, qmlEngine(target)), toValue(value),
fromBinding(0), event(0),
specifiedObject(target), specifiedProperty(propertyName)
{
if (property.isValid())
fromValue = property.read();
}
QDeclarativeAction::QDeclarativeAction(QObject *target, const QString &propertyName,
QDeclarativeContext *context, const QVariant &value)
: restore(true), actionDone(false), reverseEvent(false), deletableToBinding(false),
property(target, propertyName, context), toValue(value),
fromBinding(0), event(0),
specifiedObject(target), specifiedProperty(propertyName)
{
if (property.isValid())
fromValue = property.read();
}
QDeclarativeActionEvent::~QDeclarativeActionEvent()
{
}
QString QDeclarativeActionEvent::typeName() const
{
return QString();
}
void QDeclarativeActionEvent::execute(Reason)
{
}
bool QDeclarativeActionEvent::isReversable()
{
return false;
}
void QDeclarativeActionEvent::reverse(Reason)
{
}
bool QDeclarativeActionEvent::changesBindings()
{
return false;
}
void QDeclarativeActionEvent::clearBindings()
{
}
bool QDeclarativeActionEvent::override(QDeclarativeActionEvent *other)
{
Q_UNUSED(other);
return false;
}
QDeclarativeStateOperation::QDeclarativeStateOperation(QObjectPrivate &dd, QObject *parent)
: QObject(dd, parent)
{
}
/*!
\qmlclass State QDeclarativeState
\ingroup qml-state-elements
\since 4.7
\brief The State element defines configurations of objects and properties.
A \e state is a set of batched changes from the default configuration.
All items have a default state that defines the default configuration of objects
and property values. New states can be defined by adding State items to the \l {Item::states}{states} property to
allow items to switch between different configurations. These configurations
can, for example, be used to apply different sets of property values or execute
different scripts.
The following example displays a single \l Rectangle. In the default state, the rectangle
is colored black. In the "clicked" state, a PropertyChanges element changes the
rectangle's color to red. Clicking within the MouseArea toggles the rectangle's state
between the default state and the "clicked" state, thus toggling the color of the
rectangle between black and red.
\snippet doc/src/snippets/declarative/state.qml 0
Notice the default state is referred to using an empty string ("").
States are commonly used together with \l{QML Animation and Transitions}{Transitions} to provide
animations when state changes occur.
\note Setting the state of an object from within another state of the same object is
not allowed.
\sa {declarative/animation/states}{states example}, {qmlstates}{States},
{QML Animation and Transitions}{Transitions}, QtDeclarative
*/
QDeclarativeState::QDeclarativeState(QObject *parent)
: QObject(*(new QDeclarativeStatePrivate), parent)
{
Q_D(QDeclarativeState);
d->transitionManager.setState(this);
}
QDeclarativeState::~QDeclarativeState()
{
Q_D(QDeclarativeState);
if (d->group)
d->group->removeState(this);
/*
destroying an active state does not return us to the
base state, so we need to clean up our revert list to
prevent leaks. In the future we may want to redconsider
this overall architecture.
*/
for (int i = 0; i < d->revertList.count(); ++i) {
if (d->revertList.at(i).binding()) {
d->revertList.at(i).binding()->destroy();
}
}
}
/*!
\qmlproperty string State::name
This property holds the name of the state.
Each state should have a unique name within its item.
*/
QString QDeclarativeState::name() const
{
Q_D(const QDeclarativeState);
return d->name;
}
void QDeclarativeState::setName(const QString &n)
{
Q_D(QDeclarativeState);
d->name = n;
d->named = true;
}
bool QDeclarativeState::isNamed() const
{
Q_D(const QDeclarativeState);
return d->named;
}
bool QDeclarativeState::isWhenKnown() const
{
Q_D(const QDeclarativeState);
return d->when != 0;
}
/*!
\qmlproperty bool State::when
This property holds when the state should be applied.
This should be set to an expression that evaluates to \c true when you want the state to
be applied. For example, the following \l Rectangle changes in and out of the "hidden"
state when the \l MouseArea is pressed:
\snippet doc/src/snippets/declarative/state-when.qml 0
If multiple states in a group have \c when clauses that evaluate to \c true
at the same time, the first matching state will be applied. For example, in
the following snippet \c state1 will always be selected rather than
\c state2 when sharedCondition becomes \c true.
\qml
Item {
states: [
State { name: "state1"; when: sharedCondition },
State { name: "state2"; when: sharedCondition }
]
// ...
}
\endqml
*/
QDeclarativeBinding *QDeclarativeState::when() const
{
Q_D(const QDeclarativeState);
return d->when;
}
void QDeclarativeState::setWhen(QDeclarativeBinding *when)
{
Q_D(QDeclarativeState);
d->when = when;
if (d->group)
d->group->updateAutoState();
}
/*!
\qmlproperty string State::extend
This property holds the state that this state extends.
When a state extends another state, it inherits all the changes of that state.
The state being extended is treated as the base state in regards to
the changes specified by the extending state.
*/
QString QDeclarativeState::extends() const
{
Q_D(const QDeclarativeState);
return d->extends;
}
void QDeclarativeState::setExtends(const QString &extends)
{
Q_D(QDeclarativeState);
d->extends = extends;
}
/*!
\qmlproperty list<Change> State::changes
This property holds the changes to apply for this state
\default
By default these changes are applied against the default state. If the state
extends another state, then the changes are applied against the state being
extended.
*/
QDeclarativeListProperty<QDeclarativeStateOperation> QDeclarativeState::changes()
{
Q_D(QDeclarativeState);
return QDeclarativeListProperty<QDeclarativeStateOperation>(this, &d->operations, QDeclarativeStatePrivate::operations_append,
QDeclarativeStatePrivate::operations_count, QDeclarativeStatePrivate::operations_at,
QDeclarativeStatePrivate::operations_clear);
}
int QDeclarativeState::operationCount() const
{
Q_D(const QDeclarativeState);
return d->operations.count();
}
QDeclarativeStateOperation *QDeclarativeState::operationAt(int index) const
{
Q_D(const QDeclarativeState);
return d->operations.at(index);
}
QDeclarativeState &QDeclarativeState::operator<<(QDeclarativeStateOperation *op)
{
Q_D(QDeclarativeState);
d->operations.append(QDeclarativeStatePrivate::OperationGuard(op, &d->operations));
return *this;
}
void QDeclarativeStatePrivate::complete()
{
Q_Q(QDeclarativeState);
for (int ii = 0; ii < reverting.count(); ++ii) {
for (int jj = 0; jj < revertList.count(); ++jj) {
if (revertList.at(jj).property() == reverting.at(ii)) {
revertList.removeAt(jj);
break;
}
}
}
reverting.clear();
emit q->completed();
}
// Generate a list of actions for this state. This includes coelescing state
// actions that this state "extends"
QDeclarativeStateOperation::ActionList
QDeclarativeStatePrivate::generateActionList(QDeclarativeStateGroup *group) const
{
QDeclarativeStateOperation::ActionList applyList;
if (inState)
return applyList;
// Prevent "extends" recursion
inState = true;
if (!extends.isEmpty()) {
QList<QDeclarativeState *> states = group->states();
for (int ii = 0; ii < states.count(); ++ii)
if (states.at(ii)->name() == extends) {
qmlExecuteDeferred(states.at(ii));
applyList = static_cast<QDeclarativeStatePrivate*>(states.at(ii)->d_func())->generateActionList(group);
}
}
foreach(QDeclarativeStateOperation *op, operations)
applyList << op->actions();
inState = false;
return applyList;
}
QDeclarativeStateGroup *QDeclarativeState::stateGroup() const
{
Q_D(const QDeclarativeState);
return d->group;
}
void QDeclarativeState::setStateGroup(QDeclarativeStateGroup *group)
{
Q_D(QDeclarativeState);
d->group = group;
}
void QDeclarativeState::cancel()
{
Q_D(QDeclarativeState);
d->transitionManager.cancel();
}
void QDeclarativeAction::deleteFromBinding()
{
if (fromBinding) {
QDeclarativePropertyPrivate::setBinding(property, 0);
fromBinding->destroy();
fromBinding = 0;
}
}
bool QDeclarativeState::containsPropertyInRevertList(QObject *target, const QString &name) const
{
Q_D(const QDeclarativeState);
if (isStateActive()) {
QListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
const QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.specifiedObject() == target && simpleAction.specifiedProperty() == name)
return true;
}
}
return false;
}
bool QDeclarativeState::changeValueInRevertList(QObject *target, const QString &name, const QVariant &revertValue)
{
Q_D(QDeclarativeState);
if (isStateActive()) {
QMutableListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.specifiedObject() == target && simpleAction.specifiedProperty() == name) {
simpleAction.setValue(revertValue);
return true;
}
}
}
return false;
}
bool QDeclarativeState::changeBindingInRevertList(QObject *target, const QString &name, QDeclarativeAbstractBinding *binding)
{
Q_D(QDeclarativeState);
if (isStateActive()) {
QMutableListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.specifiedObject() == target && simpleAction.specifiedProperty() == name) {
if (simpleAction.binding())
simpleAction.binding()->destroy();
simpleAction.setBinding(binding);
return true;
}
}
}
return false;
}
bool QDeclarativeState::removeEntryFromRevertList(QObject *target, const QString &name)
{
Q_D(QDeclarativeState);
if (isStateActive()) {
QMutableListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.property().object() == target && simpleAction.property().name() == name) {
QDeclarativeAbstractBinding *oldBinding = QDeclarativePropertyPrivate::binding(simpleAction.property());
if (oldBinding) {
QDeclarativePropertyPrivate::setBinding(simpleAction.property(), 0);
oldBinding->destroy();
}
simpleAction.property().write(simpleAction.value());
if (simpleAction.binding())
QDeclarativePropertyPrivate::setBinding(simpleAction.property(), simpleAction.binding());
revertListIterator.remove();
return true;
}
}
}
return false;
}
void QDeclarativeState::addEntryToRevertList(const QDeclarativeAction &action)
{
Q_D(QDeclarativeState);
QDeclarativeSimpleAction simpleAction(action);
d->revertList.append(simpleAction);
}
void QDeclarativeState::removeAllEntriesFromRevertList(QObject *target)
{
Q_D(QDeclarativeState);
if (isStateActive()) {
QMutableListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.property().object() == target) {
QDeclarativeAbstractBinding *oldBinding = QDeclarativePropertyPrivate::binding(simpleAction.property());
if (oldBinding) {
QDeclarativePropertyPrivate::setBinding(simpleAction.property(), 0);
oldBinding->destroy();
}
simpleAction.property().write(simpleAction.value());
if (simpleAction.binding())
QDeclarativePropertyPrivate::setBinding(simpleAction.property(), simpleAction.binding());
revertListIterator.remove();
}
}
}
}
void QDeclarativeState::addEntriesToRevertList(const QList<QDeclarativeAction> &actionList)
{
Q_D(QDeclarativeState);
if (isStateActive()) {
QList<QDeclarativeSimpleAction> simpleActionList;
QListIterator<QDeclarativeAction> actionListIterator(actionList);
while(actionListIterator.hasNext()) {
const QDeclarativeAction &action = actionListIterator.next();
QDeclarativeSimpleAction simpleAction(action);
action.property.write(action.toValue);
if (!action.toBinding.isNull()) {
QDeclarativeAbstractBinding *oldBinding = QDeclarativePropertyPrivate::binding(simpleAction.property());
if (oldBinding)
QDeclarativePropertyPrivate::setBinding(simpleAction.property(), 0);
QDeclarativePropertyPrivate::setBinding(simpleAction.property(), action.toBinding.data(), QDeclarativePropertyPrivate::DontRemoveBinding);
}
simpleActionList.append(simpleAction);
}
d->revertList.append(simpleActionList);
}
}
QVariant QDeclarativeState::valueInRevertList(QObject *target, const QString &name) const
{
Q_D(const QDeclarativeState);
if (isStateActive()) {
QListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
const QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.specifiedObject() == target && simpleAction.specifiedProperty() == name)
return simpleAction.value();
}
}
return QVariant();
}
QDeclarativeAbstractBinding *QDeclarativeState::bindingInRevertList(QObject *target, const QString &name) const
{
Q_D(const QDeclarativeState);
if (isStateActive()) {
QListIterator<QDeclarativeSimpleAction> revertListIterator(d->revertList);
while (revertListIterator.hasNext()) {
const QDeclarativeSimpleAction &simpleAction = revertListIterator.next();
if (simpleAction.specifiedObject() == target && simpleAction.specifiedProperty() == name)
return simpleAction.binding();
}
}
return 0;
}
bool QDeclarativeState::isStateActive() const
{
return stateGroup() && stateGroup()->state() == name();
}
void QDeclarativeState::apply(QDeclarativeStateGroup *group, QDeclarativeTransition *trans, QDeclarativeState *revert)
{
Q_D(QDeclarativeState);
qmlExecuteDeferred(this);
cancel();
if (revert)
revert->cancel();
d->revertList.clear();
d->reverting.clear();
if (revert) {
QDeclarativeStatePrivate *revertPrivate =
static_cast<QDeclarativeStatePrivate*>(revert->d_func());
d->revertList = revertPrivate->revertList;
revertPrivate->revertList.clear();
}
// List of actions caused by this state
QDeclarativeStateOperation::ActionList applyList = d->generateActionList(group);
// List of actions that need to be reverted to roll back (just) this state
QDeclarativeStatePrivate::SimpleActionList additionalReverts;
// First add the reverse of all the applyList actions
for (int ii = 0; ii < applyList.count(); ++ii) {
QDeclarativeAction &action = applyList[ii];
if (action.event) {
if (!action.event->isReversable())
continue;
bool found = false;
for (int jj = 0; jj < d->revertList.count(); ++jj) {
QDeclarativeActionEvent *event = d->revertList.at(jj).event();
if (event && event->typeName() == action.event->typeName()) {
if (action.event->override(event)) {
found = true;
if (action.event != d->revertList.at(jj).event() && action.event->needsCopy()) {
action.event->copyOriginals(d->revertList.at(jj).event());
QDeclarativeSimpleAction r(action);
additionalReverts << r;
d->revertList.removeAt(jj);
--jj;
} else if (action.event->isRewindable()) //###why needed?
action.event->saveCurrentValues();
break;
}
}
}
if (!found) {
action.event->saveOriginals();
// Only need to revert the applyList action if the previous
// state doesn't have a higher priority revert already
QDeclarativeSimpleAction r(action);
additionalReverts << r;
}
} else {
bool found = false;
action.fromBinding = QDeclarativePropertyPrivate::binding(action.property);
for (int jj = 0; jj < d->revertList.count(); ++jj) {
if (d->revertList.at(jj).property() == action.property) {
found = true;
if (d->revertList.at(jj).binding() != action.fromBinding) {
action.deleteFromBinding();
}
break;
}
}
if (!found) {
if (!action.restore) {
action.deleteFromBinding();;
} else {
// Only need to revert the applyList action if the previous
// state doesn't have a higher priority revert already
QDeclarativeSimpleAction r(action);
additionalReverts << r;
}
}
}
}
// Any reverts from a previous state that aren't carried forth
// into this state need to be translated into apply actions
for (int ii = 0; ii < d->revertList.count(); ++ii) {
bool found = false;
if (d->revertList.at(ii).event()) {
QDeclarativeActionEvent *event = d->revertList.at(ii).event();
if (!event->isReversable())
continue;
for (int jj = 0; !found && jj < applyList.count(); ++jj) {
const QDeclarativeAction &action = applyList.at(jj);
if (action.event && action.event->typeName() == event->typeName()) {
if (action.event->override(event))
found = true;
}
}
} else {
for (int jj = 0; !found && jj < applyList.count(); ++jj) {
const QDeclarativeAction &action = applyList.at(jj);
if (action.property == d->revertList.at(ii).property())
found = true;
}
}
if (!found) {
QVariant cur = d->revertList.at(ii).property().read();
QDeclarativeAbstractBinding *delBinding =
QDeclarativePropertyPrivate::setBinding(d->revertList.at(ii).property(), 0);
if (delBinding)
delBinding->destroy();
QDeclarativeAction a;
a.property = d->revertList.at(ii).property();
a.fromValue = cur;
a.toValue = d->revertList.at(ii).value();
a.toBinding = QDeclarativeAbstractBinding::getPointer(d->revertList.at(ii).binding());
a.specifiedObject = d->revertList.at(ii).specifiedObject();
a.specifiedProperty = d->revertList.at(ii).specifiedProperty();
a.event = d->revertList.at(ii).event();
a.reverseEvent = d->revertList.at(ii).reverseEvent();
if (a.event && a.event->isRewindable())
a.event->saveCurrentValues();
applyList << a;
// Store these special reverts in the reverting list
d->reverting << d->revertList.at(ii).property();
}
}
// All the local reverts now become part of the ongoing revertList
d->revertList << additionalReverts;
#ifndef QT_NO_DEBUG_STREAM
// Output for debugging
if (stateChangeDebug()) {
foreach(const QDeclarativeAction &action, applyList) {
if (action.event)
qWarning() << " QDeclarativeAction event:" << action.event->typeName();
else
qWarning() << " QDeclarativeAction:" << action.property.object()
<< action.property.name() << "From:" << action.fromValue
<< "To:" << action.toValue;
}
}
#endif
d->transitionManager.transition(applyList, trans);
}
QDeclarativeStateOperation::ActionList QDeclarativeStateOperation::actions()
{
return ActionList();
}
QDeclarativeState *QDeclarativeStateOperation::state() const
{
Q_D(const QDeclarativeStateOperation);
return d->m_state;
}
void QDeclarativeStateOperation::setState(QDeclarativeState *state)
{
Q_D(QDeclarativeStateOperation);
d->m_state = state;
}
QT_END_NAMESPACE
| Java |
/*
** ###################################################################
** Compilers: Keil ARM C/C++ Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** GNU C Compiler - CodeSourcery Sourcery G++
** IAR ANSI C/C++ Compiler for ARM
**
** Reference manual: MKW40Z160RM, Rev. 1.1, 4/2015
** Version: rev. 1.2, 2015-05-07
** Build: b150513
**
** Abstract:
** CMSIS Peripheral Access Layer for MKW20Z4
**
** Copyright (c) 1997 - 2015 Freescale Semiconductor, Inc.
** All rights reserved.
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** o Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** o Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.freescale.com
** mail: [email protected]
**
** Revisions:
** - rev. 1.0 (2014-08-27)
** Initial version.
** - rev. 1.1 (2015-03-05)
** Update with reference manual rev 1.0
** - rev. 1.2 (2015-05-07)
** Update with reference manual rev 1.1
**
** ###################################################################
*/
/*!
* @file MKW20Z4.h
* @version 1.2
* @date 2015-05-07
* @brief CMSIS Peripheral Access Layer for MKW20Z4
*
* CMSIS Peripheral Access Layer for MKW20Z4
*/
/* ----------------------------------------------------------------------------
-- MCU activation
---------------------------------------------------------------------------- */
/* Prevention from multiple including the same memory map */
#if !defined(MKW20Z4_H_) /* Check if memory map has not been already included */
#define MKW20Z4_H_
#define MCU_MKW20Z4
/* Check if another memory map has not been also included */
#if (defined(MCU_ACTIVE))
#error MKW20Z4 memory map: There is already included another memory map. Only one memory map can be included.
#endif /* (defined(MCU_ACTIVE)) */
#define MCU_ACTIVE
#include <stdint.h>
/** Memory map major version (memory maps with equal major version number are
* compatible) */
#define MCU_MEM_MAP_VERSION 0x0100u
/** Memory map minor version */
#define MCU_MEM_MAP_VERSION_MINOR 0x0002u
/* ----------------------------------------------------------------------------
-- Interrupt vector numbers
---------------------------------------------------------------------------- */
/*!
* @addtogroup Interrupt_vector_numbers Interrupt vector numbers
* @{
*/
/** Interrupt Number Definitions */
#define NUMBER_OF_INT_VECTORS 48 /**< Number of interrupts in the Vector table */
typedef enum IRQn {
/* Auxiliary constants */
NotAvail_IRQn = -128, /**< Not available device specific interrupt */
/* Core interrupts */
NonMaskableInt_IRQn = -14, /**< Non Maskable Interrupt */
HardFault_IRQn = -13, /**< Cortex-M0 SV Hard Fault Interrupt */
SVCall_IRQn = -5, /**< Cortex-M0 SV Call Interrupt */
PendSV_IRQn = -2, /**< Cortex-M0 Pend SV Interrupt */
SysTick_IRQn = -1, /**< Cortex-M0 System Tick Interrupt */
/* Device specific interrupts */
DMA0_IRQn = 0, /**< DMA channel 0 transfer complete */
DMA1_IRQn = 1, /**< DMA channel 1 transfer complete */
DMA2_IRQn = 2, /**< DMA channel 2 transfer complete */
DMA3_IRQn = 3, /**< DMA channel 3 transfer complete */
Reserved20_IRQn = 4, /**< Reserved interrupt */
FTFA_IRQn = 5, /**< Command complete and read collision */
LVD_LVW_DCDC_IRQn = 6, /**< Low-voltage detect, low-voltage warning, DCDC */
LLWU_IRQn = 7, /**< Low leakage wakeup Unit */
I2C0_IRQn = 8, /**< I2C0 interrupt */
I2C1_IRQn = 9, /**< I2C1 interrupt */
SPI0_IRQn = 10, /**< SPI0 single interrupt vector for all sources */
TSI0_IRQn = 11, /**< TSI0 single interrupt vector for all sources */
LPUART0_IRQn = 12, /**< LPUART0 status and error */
TRNG0_IRQn = 13, /**< TRNG0 interrupt */
CMT_IRQn = 14, /**< CMT interrupt */
ADC0_IRQn = 15, /**< ADC0 interrupt */
CMP0_IRQn = 16, /**< CMP0 interrupt */
TPM0_IRQn = 17, /**< TPM0 single interrupt vector for all sources */
TPM1_IRQn = 18, /**< TPM1 single interrupt vector for all sources */
TPM2_IRQn = 19, /**< TPM2 single interrupt vector for all sources */
RTC_IRQn = 20, /**< RTC alarm */
RTC_Seconds_IRQn = 21, /**< RTC seconds */
PIT_IRQn = 22, /**< PIT interrupt */
LTC0_IRQn = 23, /**< LTC0 interrupt */
BTLL_RSIM_IRQn = 24, /**< BTLL and RSIM interrupt */
DAC0_IRQn = 25, /**< DAC0 interrupt */
ZigBee_IRQn = 26, /**< ZigBee interrupt */
MCG_IRQn = 27, /**< MCG interrupt */
LPTMR0_IRQn = 28, /**< LPTMR0 interrupt */
SPI1_IRQn = 29, /**< SPI1 single interrupt vector for all sources */
PORTA_IRQn = 30, /**< PORTA Pin detect */
PORTB_PORTC_IRQn = 31 /**< PORTB and PORTC Pin detect */
} IRQn_Type;
/*!
* @}
*/ /* end of group Interrupt_vector_numbers */
/* ----------------------------------------------------------------------------
-- Cortex M0 Core Configuration
---------------------------------------------------------------------------- */
/*!
* @addtogroup Cortex_Core_Configuration Cortex M0 Core Configuration
* @{
*/
#define __CM0PLUS_REV 0x0000 /**< Core revision r0p0 */
#define __MPU_PRESENT 0 /**< Defines if an MPU is present or not */
#define __VTOR_PRESENT 1 /**< Defines if an MPU is present or not */
#define __NVIC_PRIO_BITS 2 /**< Number of priority bits implemented in the NVIC */
#define __Vendor_SysTickConfig 0 /**< Vendor specific implementation of SysTickConfig is defined */
#include "core_cm0plus.h" /* Core Peripheral Access Layer */
#include "system_MKW20Z4.h" /* Device specific configuration file */
/*!
* @}
*/ /* end of group Cortex_Core_Configuration */
/* ----------------------------------------------------------------------------
-- Device Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup Peripheral_access_layer Device Peripheral Access Layer
* @{
*/
/*
** Start of section using anonymous unions
*/
#if defined(__ARMCC_VERSION)
#pragma push
#pragma anon_unions
#elif defined(__CWCC__)
#pragma push
#pragma cpp_extensions on
#elif defined(__GNUC__)
/* anonymous unions are enabled by default */
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma language=extended
#else
#error Not supported compiler type
#endif
/* ----------------------------------------------------------------------------
-- ADC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup ADC_Peripheral_Access_Layer ADC Peripheral Access Layer
* @{
*/
/** ADC - Register Layout Typedef */
typedef struct {
__IO uint32_t SC1[2]; /**< ADC Status and Control Registers 1, array offset: 0x0, array step: 0x4 */
__IO uint32_t CFG1; /**< ADC Configuration Register 1, offset: 0x8 */
__IO uint32_t CFG2; /**< ADC Configuration Register 2, offset: 0xC */
__I uint32_t R[2]; /**< ADC Data Result Register, array offset: 0x10, array step: 0x4 */
__IO uint32_t CV1; /**< Compare Value Registers, offset: 0x18 */
__IO uint32_t CV2; /**< Compare Value Registers, offset: 0x1C */
__IO uint32_t SC2; /**< Status and Control Register 2, offset: 0x20 */
__IO uint32_t SC3; /**< Status and Control Register 3, offset: 0x24 */
__IO uint32_t OFS; /**< ADC Offset Correction Register, offset: 0x28 */
__IO uint32_t PG; /**< ADC Plus-Side Gain Register, offset: 0x2C */
__IO uint32_t MG; /**< ADC Minus-Side Gain Register, offset: 0x30 */
__IO uint32_t CLPD; /**< ADC Plus-Side General Calibration Value Register, offset: 0x34 */
__IO uint32_t CLPS; /**< ADC Plus-Side General Calibration Value Register, offset: 0x38 */
__IO uint32_t CLP4; /**< ADC Plus-Side General Calibration Value Register, offset: 0x3C */
__IO uint32_t CLP3; /**< ADC Plus-Side General Calibration Value Register, offset: 0x40 */
__IO uint32_t CLP2; /**< ADC Plus-Side General Calibration Value Register, offset: 0x44 */
__IO uint32_t CLP1; /**< ADC Plus-Side General Calibration Value Register, offset: 0x48 */
__IO uint32_t CLP0; /**< ADC Plus-Side General Calibration Value Register, offset: 0x4C */
uint8_t RESERVED_0[4];
__IO uint32_t CLMD; /**< ADC Minus-Side General Calibration Value Register, offset: 0x54 */
__IO uint32_t CLMS; /**< ADC Minus-Side General Calibration Value Register, offset: 0x58 */
__IO uint32_t CLM4; /**< ADC Minus-Side General Calibration Value Register, offset: 0x5C */
__IO uint32_t CLM3; /**< ADC Minus-Side General Calibration Value Register, offset: 0x60 */
__IO uint32_t CLM2; /**< ADC Minus-Side General Calibration Value Register, offset: 0x64 */
__IO uint32_t CLM1; /**< ADC Minus-Side General Calibration Value Register, offset: 0x68 */
__IO uint32_t CLM0; /**< ADC Minus-Side General Calibration Value Register, offset: 0x6C */
} ADC_Type, *ADC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- ADC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup ADC_Register_Accessor_Macros ADC - Register accessor macros
* @{
*/
/* ADC - Register accessors */
#define ADC_SC1_REG(base,index) ((base)->SC1[index])
#define ADC_SC1_COUNT 2
#define ADC_CFG1_REG(base) ((base)->CFG1)
#define ADC_CFG2_REG(base) ((base)->CFG2)
#define ADC_R_REG(base,index) ((base)->R[index])
#define ADC_R_COUNT 2
#define ADC_CV1_REG(base) ((base)->CV1)
#define ADC_CV2_REG(base) ((base)->CV2)
#define ADC_SC2_REG(base) ((base)->SC2)
#define ADC_SC3_REG(base) ((base)->SC3)
#define ADC_OFS_REG(base) ((base)->OFS)
#define ADC_PG_REG(base) ((base)->PG)
#define ADC_MG_REG(base) ((base)->MG)
#define ADC_CLPD_REG(base) ((base)->CLPD)
#define ADC_CLPS_REG(base) ((base)->CLPS)
#define ADC_CLP4_REG(base) ((base)->CLP4)
#define ADC_CLP3_REG(base) ((base)->CLP3)
#define ADC_CLP2_REG(base) ((base)->CLP2)
#define ADC_CLP1_REG(base) ((base)->CLP1)
#define ADC_CLP0_REG(base) ((base)->CLP0)
#define ADC_CLMD_REG(base) ((base)->CLMD)
#define ADC_CLMS_REG(base) ((base)->CLMS)
#define ADC_CLM4_REG(base) ((base)->CLM4)
#define ADC_CLM3_REG(base) ((base)->CLM3)
#define ADC_CLM2_REG(base) ((base)->CLM2)
#define ADC_CLM1_REG(base) ((base)->CLM1)
#define ADC_CLM0_REG(base) ((base)->CLM0)
/*!
* @}
*/ /* end of group ADC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- ADC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup ADC_Register_Masks ADC Register Masks
* @{
*/
/* SC1 Bit Fields */
#define ADC_SC1_ADCH_MASK 0x1Fu
#define ADC_SC1_ADCH_SHIFT 0
#define ADC_SC1_ADCH_WIDTH 5
#define ADC_SC1_ADCH(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC1_ADCH_SHIFT))&ADC_SC1_ADCH_MASK)
#define ADC_SC1_DIFF_MASK 0x20u
#define ADC_SC1_DIFF_SHIFT 5
#define ADC_SC1_DIFF_WIDTH 1
#define ADC_SC1_DIFF(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC1_DIFF_SHIFT))&ADC_SC1_DIFF_MASK)
#define ADC_SC1_AIEN_MASK 0x40u
#define ADC_SC1_AIEN_SHIFT 6
#define ADC_SC1_AIEN_WIDTH 1
#define ADC_SC1_AIEN(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC1_AIEN_SHIFT))&ADC_SC1_AIEN_MASK)
#define ADC_SC1_COCO_MASK 0x80u
#define ADC_SC1_COCO_SHIFT 7
#define ADC_SC1_COCO_WIDTH 1
#define ADC_SC1_COCO(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC1_COCO_SHIFT))&ADC_SC1_COCO_MASK)
/* CFG1 Bit Fields */
#define ADC_CFG1_ADICLK_MASK 0x3u
#define ADC_CFG1_ADICLK_SHIFT 0
#define ADC_CFG1_ADICLK_WIDTH 2
#define ADC_CFG1_ADICLK(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADICLK_SHIFT))&ADC_CFG1_ADICLK_MASK)
#define ADC_CFG1_MODE_MASK 0xCu
#define ADC_CFG1_MODE_SHIFT 2
#define ADC_CFG1_MODE_WIDTH 2
#define ADC_CFG1_MODE(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_MODE_SHIFT))&ADC_CFG1_MODE_MASK)
#define ADC_CFG1_ADLSMP_MASK 0x10u
#define ADC_CFG1_ADLSMP_SHIFT 4
#define ADC_CFG1_ADLSMP_WIDTH 1
#define ADC_CFG1_ADLSMP(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADLSMP_SHIFT))&ADC_CFG1_ADLSMP_MASK)
#define ADC_CFG1_ADIV_MASK 0x60u
#define ADC_CFG1_ADIV_SHIFT 5
#define ADC_CFG1_ADIV_WIDTH 2
#define ADC_CFG1_ADIV(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADIV_SHIFT))&ADC_CFG1_ADIV_MASK)
#define ADC_CFG1_ADLPC_MASK 0x80u
#define ADC_CFG1_ADLPC_SHIFT 7
#define ADC_CFG1_ADLPC_WIDTH 1
#define ADC_CFG1_ADLPC(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG1_ADLPC_SHIFT))&ADC_CFG1_ADLPC_MASK)
/* CFG2 Bit Fields */
#define ADC_CFG2_ADLSTS_MASK 0x3u
#define ADC_CFG2_ADLSTS_SHIFT 0
#define ADC_CFG2_ADLSTS_WIDTH 2
#define ADC_CFG2_ADLSTS(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_ADLSTS_SHIFT))&ADC_CFG2_ADLSTS_MASK)
#define ADC_CFG2_ADHSC_MASK 0x4u
#define ADC_CFG2_ADHSC_SHIFT 2
#define ADC_CFG2_ADHSC_WIDTH 1
#define ADC_CFG2_ADHSC(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_ADHSC_SHIFT))&ADC_CFG2_ADHSC_MASK)
#define ADC_CFG2_ADACKEN_MASK 0x8u
#define ADC_CFG2_ADACKEN_SHIFT 3
#define ADC_CFG2_ADACKEN_WIDTH 1
#define ADC_CFG2_ADACKEN(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_ADACKEN_SHIFT))&ADC_CFG2_ADACKEN_MASK)
#define ADC_CFG2_MUXSEL_MASK 0x10u
#define ADC_CFG2_MUXSEL_SHIFT 4
#define ADC_CFG2_MUXSEL_WIDTH 1
#define ADC_CFG2_MUXSEL(x) (((uint32_t)(((uint32_t)(x))<<ADC_CFG2_MUXSEL_SHIFT))&ADC_CFG2_MUXSEL_MASK)
/* R Bit Fields */
#define ADC_R_D_MASK 0xFFFFu
#define ADC_R_D_SHIFT 0
#define ADC_R_D_WIDTH 16
#define ADC_R_D(x) (((uint32_t)(((uint32_t)(x))<<ADC_R_D_SHIFT))&ADC_R_D_MASK)
/* CV1 Bit Fields */
#define ADC_CV1_CV_MASK 0xFFFFu
#define ADC_CV1_CV_SHIFT 0
#define ADC_CV1_CV_WIDTH 16
#define ADC_CV1_CV(x) (((uint32_t)(((uint32_t)(x))<<ADC_CV1_CV_SHIFT))&ADC_CV1_CV_MASK)
/* CV2 Bit Fields */
#define ADC_CV2_CV_MASK 0xFFFFu
#define ADC_CV2_CV_SHIFT 0
#define ADC_CV2_CV_WIDTH 16
#define ADC_CV2_CV(x) (((uint32_t)(((uint32_t)(x))<<ADC_CV2_CV_SHIFT))&ADC_CV2_CV_MASK)
/* SC2 Bit Fields */
#define ADC_SC2_REFSEL_MASK 0x3u
#define ADC_SC2_REFSEL_SHIFT 0
#define ADC_SC2_REFSEL_WIDTH 2
#define ADC_SC2_REFSEL(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_REFSEL_SHIFT))&ADC_SC2_REFSEL_MASK)
#define ADC_SC2_DMAEN_MASK 0x4u
#define ADC_SC2_DMAEN_SHIFT 2
#define ADC_SC2_DMAEN_WIDTH 1
#define ADC_SC2_DMAEN(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_DMAEN_SHIFT))&ADC_SC2_DMAEN_MASK)
#define ADC_SC2_ACREN_MASK 0x8u
#define ADC_SC2_ACREN_SHIFT 3
#define ADC_SC2_ACREN_WIDTH 1
#define ADC_SC2_ACREN(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_ACREN_SHIFT))&ADC_SC2_ACREN_MASK)
#define ADC_SC2_ACFGT_MASK 0x10u
#define ADC_SC2_ACFGT_SHIFT 4
#define ADC_SC2_ACFGT_WIDTH 1
#define ADC_SC2_ACFGT(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_ACFGT_SHIFT))&ADC_SC2_ACFGT_MASK)
#define ADC_SC2_ACFE_MASK 0x20u
#define ADC_SC2_ACFE_SHIFT 5
#define ADC_SC2_ACFE_WIDTH 1
#define ADC_SC2_ACFE(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_ACFE_SHIFT))&ADC_SC2_ACFE_MASK)
#define ADC_SC2_ADTRG_MASK 0x40u
#define ADC_SC2_ADTRG_SHIFT 6
#define ADC_SC2_ADTRG_WIDTH 1
#define ADC_SC2_ADTRG(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_ADTRG_SHIFT))&ADC_SC2_ADTRG_MASK)
#define ADC_SC2_ADACT_MASK 0x80u
#define ADC_SC2_ADACT_SHIFT 7
#define ADC_SC2_ADACT_WIDTH 1
#define ADC_SC2_ADACT(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC2_ADACT_SHIFT))&ADC_SC2_ADACT_MASK)
/* SC3 Bit Fields */
#define ADC_SC3_AVGS_MASK 0x3u
#define ADC_SC3_AVGS_SHIFT 0
#define ADC_SC3_AVGS_WIDTH 2
#define ADC_SC3_AVGS(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_AVGS_SHIFT))&ADC_SC3_AVGS_MASK)
#define ADC_SC3_AVGE_MASK 0x4u
#define ADC_SC3_AVGE_SHIFT 2
#define ADC_SC3_AVGE_WIDTH 1
#define ADC_SC3_AVGE(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_AVGE_SHIFT))&ADC_SC3_AVGE_MASK)
#define ADC_SC3_ADCO_MASK 0x8u
#define ADC_SC3_ADCO_SHIFT 3
#define ADC_SC3_ADCO_WIDTH 1
#define ADC_SC3_ADCO(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_ADCO_SHIFT))&ADC_SC3_ADCO_MASK)
#define ADC_SC3_CALF_MASK 0x40u
#define ADC_SC3_CALF_SHIFT 6
#define ADC_SC3_CALF_WIDTH 1
#define ADC_SC3_CALF(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_CALF_SHIFT))&ADC_SC3_CALF_MASK)
#define ADC_SC3_CAL_MASK 0x80u
#define ADC_SC3_CAL_SHIFT 7
#define ADC_SC3_CAL_WIDTH 1
#define ADC_SC3_CAL(x) (((uint32_t)(((uint32_t)(x))<<ADC_SC3_CAL_SHIFT))&ADC_SC3_CAL_MASK)
/* OFS Bit Fields */
#define ADC_OFS_OFS_MASK 0xFFFFu
#define ADC_OFS_OFS_SHIFT 0
#define ADC_OFS_OFS_WIDTH 16
#define ADC_OFS_OFS(x) (((uint32_t)(((uint32_t)(x))<<ADC_OFS_OFS_SHIFT))&ADC_OFS_OFS_MASK)
/* PG Bit Fields */
#define ADC_PG_PG_MASK 0xFFFFu
#define ADC_PG_PG_SHIFT 0
#define ADC_PG_PG_WIDTH 16
#define ADC_PG_PG(x) (((uint32_t)(((uint32_t)(x))<<ADC_PG_PG_SHIFT))&ADC_PG_PG_MASK)
/* MG Bit Fields */
#define ADC_MG_MG_MASK 0xFFFFu
#define ADC_MG_MG_SHIFT 0
#define ADC_MG_MG_WIDTH 16
#define ADC_MG_MG(x) (((uint32_t)(((uint32_t)(x))<<ADC_MG_MG_SHIFT))&ADC_MG_MG_MASK)
/* CLPD Bit Fields */
#define ADC_CLPD_CLPD_MASK 0x3Fu
#define ADC_CLPD_CLPD_SHIFT 0
#define ADC_CLPD_CLPD_WIDTH 6
#define ADC_CLPD_CLPD(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPD_CLPD_SHIFT))&ADC_CLPD_CLPD_MASK)
/* CLPS Bit Fields */
#define ADC_CLPS_CLPS_MASK 0x3Fu
#define ADC_CLPS_CLPS_SHIFT 0
#define ADC_CLPS_CLPS_WIDTH 6
#define ADC_CLPS_CLPS(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLPS_CLPS_SHIFT))&ADC_CLPS_CLPS_MASK)
/* CLP4 Bit Fields */
#define ADC_CLP4_CLP4_MASK 0x3FFu
#define ADC_CLP4_CLP4_SHIFT 0
#define ADC_CLP4_CLP4_WIDTH 10
#define ADC_CLP4_CLP4(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP4_CLP4_SHIFT))&ADC_CLP4_CLP4_MASK)
/* CLP3 Bit Fields */
#define ADC_CLP3_CLP3_MASK 0x1FFu
#define ADC_CLP3_CLP3_SHIFT 0
#define ADC_CLP3_CLP3_WIDTH 9
#define ADC_CLP3_CLP3(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP3_CLP3_SHIFT))&ADC_CLP3_CLP3_MASK)
/* CLP2 Bit Fields */
#define ADC_CLP2_CLP2_MASK 0xFFu
#define ADC_CLP2_CLP2_SHIFT 0
#define ADC_CLP2_CLP2_WIDTH 8
#define ADC_CLP2_CLP2(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP2_CLP2_SHIFT))&ADC_CLP2_CLP2_MASK)
/* CLP1 Bit Fields */
#define ADC_CLP1_CLP1_MASK 0x7Fu
#define ADC_CLP1_CLP1_SHIFT 0
#define ADC_CLP1_CLP1_WIDTH 7
#define ADC_CLP1_CLP1(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP1_CLP1_SHIFT))&ADC_CLP1_CLP1_MASK)
/* CLP0 Bit Fields */
#define ADC_CLP0_CLP0_MASK 0x3Fu
#define ADC_CLP0_CLP0_SHIFT 0
#define ADC_CLP0_CLP0_WIDTH 6
#define ADC_CLP0_CLP0(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLP0_CLP0_SHIFT))&ADC_CLP0_CLP0_MASK)
/* CLMD Bit Fields */
#define ADC_CLMD_CLMD_MASK 0x3Fu
#define ADC_CLMD_CLMD_SHIFT 0
#define ADC_CLMD_CLMD_WIDTH 6
#define ADC_CLMD_CLMD(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLMD_CLMD_SHIFT))&ADC_CLMD_CLMD_MASK)
/* CLMS Bit Fields */
#define ADC_CLMS_CLMS_MASK 0x3Fu
#define ADC_CLMS_CLMS_SHIFT 0
#define ADC_CLMS_CLMS_WIDTH 6
#define ADC_CLMS_CLMS(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLMS_CLMS_SHIFT))&ADC_CLMS_CLMS_MASK)
/* CLM4 Bit Fields */
#define ADC_CLM4_CLM4_MASK 0x3FFu
#define ADC_CLM4_CLM4_SHIFT 0
#define ADC_CLM4_CLM4_WIDTH 10
#define ADC_CLM4_CLM4(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLM4_CLM4_SHIFT))&ADC_CLM4_CLM4_MASK)
/* CLM3 Bit Fields */
#define ADC_CLM3_CLM3_MASK 0x1FFu
#define ADC_CLM3_CLM3_SHIFT 0
#define ADC_CLM3_CLM3_WIDTH 9
#define ADC_CLM3_CLM3(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLM3_CLM3_SHIFT))&ADC_CLM3_CLM3_MASK)
/* CLM2 Bit Fields */
#define ADC_CLM2_CLM2_MASK 0xFFu
#define ADC_CLM2_CLM2_SHIFT 0
#define ADC_CLM2_CLM2_WIDTH 8
#define ADC_CLM2_CLM2(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLM2_CLM2_SHIFT))&ADC_CLM2_CLM2_MASK)
/* CLM1 Bit Fields */
#define ADC_CLM1_CLM1_MASK 0x7Fu
#define ADC_CLM1_CLM1_SHIFT 0
#define ADC_CLM1_CLM1_WIDTH 7
#define ADC_CLM1_CLM1(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLM1_CLM1_SHIFT))&ADC_CLM1_CLM1_MASK)
/* CLM0 Bit Fields */
#define ADC_CLM0_CLM0_MASK 0x3Fu
#define ADC_CLM0_CLM0_SHIFT 0
#define ADC_CLM0_CLM0_WIDTH 6
#define ADC_CLM0_CLM0(x) (((uint32_t)(((uint32_t)(x))<<ADC_CLM0_CLM0_SHIFT))&ADC_CLM0_CLM0_MASK)
/*!
* @}
*/ /* end of group ADC_Register_Masks */
/* ADC - Peripheral instance base addresses */
/** Peripheral ADC0 base address */
#define ADC0_BASE (0x4003B000u)
/** Peripheral ADC0 base pointer */
#define ADC0 ((ADC_Type *)ADC0_BASE)
#define ADC0_BASE_PTR (ADC0)
/** Array initializer of ADC peripheral base addresses */
#define ADC_BASE_ADDRS { ADC0_BASE }
/** Array initializer of ADC peripheral base pointers */
#define ADC_BASE_PTRS { ADC0 }
/** Interrupt vectors for the ADC peripheral type */
#define ADC_IRQS { ADC0_IRQn }
/* ----------------------------------------------------------------------------
-- ADC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup ADC_Register_Accessor_Macros ADC - Register accessor macros
* @{
*/
/* ADC - Register instance definitions */
/* ADC0 */
#define ADC0_SC1A ADC_SC1_REG(ADC0,0)
#define ADC0_SC1B ADC_SC1_REG(ADC0,1)
#define ADC0_CFG1 ADC_CFG1_REG(ADC0)
#define ADC0_CFG2 ADC_CFG2_REG(ADC0)
#define ADC0_RA ADC_R_REG(ADC0,0)
#define ADC0_RB ADC_R_REG(ADC0,1)
#define ADC0_CV1 ADC_CV1_REG(ADC0)
#define ADC0_CV2 ADC_CV2_REG(ADC0)
#define ADC0_SC2 ADC_SC2_REG(ADC0)
#define ADC0_SC3 ADC_SC3_REG(ADC0)
#define ADC0_OFS ADC_OFS_REG(ADC0)
#define ADC0_PG ADC_PG_REG(ADC0)
#define ADC0_MG ADC_MG_REG(ADC0)
#define ADC0_CLPD ADC_CLPD_REG(ADC0)
#define ADC0_CLPS ADC_CLPS_REG(ADC0)
#define ADC0_CLP4 ADC_CLP4_REG(ADC0)
#define ADC0_CLP3 ADC_CLP3_REG(ADC0)
#define ADC0_CLP2 ADC_CLP2_REG(ADC0)
#define ADC0_CLP1 ADC_CLP1_REG(ADC0)
#define ADC0_CLP0 ADC_CLP0_REG(ADC0)
#define ADC0_CLMD ADC_CLMD_REG(ADC0)
#define ADC0_CLMS ADC_CLMS_REG(ADC0)
#define ADC0_CLM4 ADC_CLM4_REG(ADC0)
#define ADC0_CLM3 ADC_CLM3_REG(ADC0)
#define ADC0_CLM2 ADC_CLM2_REG(ADC0)
#define ADC0_CLM1 ADC_CLM1_REG(ADC0)
#define ADC0_CLM0 ADC_CLM0_REG(ADC0)
/* ADC - Register array accessors */
#define ADC0_SC1(index) ADC_SC1_REG(ADC0,index)
#define ADC0_R(index) ADC_R_REG(ADC0,index)
/*!
* @}
*/ /* end of group ADC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group ADC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- BLE_RF_REGS Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup BLE_RF_REGS_Peripheral_Access_Layer BLE_RF_REGS Peripheral Access Layer
* @{
*/
/** BLE_RF_REGS - Register Layout Typedef */
typedef struct {
uint8_t RESERVED_0[3328];
__I uint16_t BLE_PART_ID; /**< Bluetooth Low Energy Part ID, offset: 0xD00 */
uint8_t RESERVED_1[2];
__I uint16_t DSM_STATUS; /**< DSM Status, offset: 0xD04 */
uint8_t RESERVED_2[2];
__IO uint16_t BLE_AFC; /**< Bluetooth Low Energy AFC, offset: 0xD08 */
uint8_t RESERVED_3[2];
__IO uint16_t BLE_BSM; /**< Bluetooth Low Energy BSM, offset: 0xD0C */
} BLE_RF_REGS_Type, *BLE_RF_REGS_MemMapPtr;
/* ----------------------------------------------------------------------------
-- BLE_RF_REGS - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup BLE_RF_REGS_Register_Accessor_Macros BLE_RF_REGS - Register accessor macros
* @{
*/
/* BLE_RF_REGS - Register accessors */
#define BLE_RF_REGS_BLE_PART_ID_REG(base) ((base)->BLE_PART_ID)
#define BLE_RF_REGS_DSM_STATUS_REG(base) ((base)->DSM_STATUS)
#define BLE_RF_REGS_BLE_AFC_REG(base) ((base)->BLE_AFC)
#define BLE_RF_REGS_BLE_BSM_REG(base) ((base)->BLE_BSM)
/*!
* @}
*/ /* end of group BLE_RF_REGS_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- BLE_RF_REGS Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup BLE_RF_REGS_Register_Masks BLE_RF_REGS Register Masks
* @{
*/
/* BLE_PART_ID Bit Fields */
#define BLE_RF_REGS_BLE_PART_ID_BLE_PART_ID_MASK 0xFFFFu
#define BLE_RF_REGS_BLE_PART_ID_BLE_PART_ID_SHIFT 0
#define BLE_RF_REGS_BLE_PART_ID_BLE_PART_ID_WIDTH 16
#define BLE_RF_REGS_BLE_PART_ID_BLE_PART_ID(x) (((uint16_t)(((uint16_t)(x))<<BLE_RF_REGS_BLE_PART_ID_BLE_PART_ID_SHIFT))&BLE_RF_REGS_BLE_PART_ID_BLE_PART_ID_MASK)
/* DSM_STATUS Bit Fields */
#define BLE_RF_REGS_DSM_STATUS_ORF_SYSCLK_REQ_MASK 0x1u
#define BLE_RF_REGS_DSM_STATUS_ORF_SYSCLK_REQ_SHIFT 0
#define BLE_RF_REGS_DSM_STATUS_ORF_SYSCLK_REQ_WIDTH 1
#define BLE_RF_REGS_DSM_STATUS_ORF_SYSCLK_REQ(x) (((uint16_t)(((uint16_t)(x))<<BLE_RF_REGS_DSM_STATUS_ORF_SYSCLK_REQ_SHIFT))&BLE_RF_REGS_DSM_STATUS_ORF_SYSCLK_REQ_MASK)
#define BLE_RF_REGS_DSM_STATUS_RIF_LL_ACTIVE_MASK 0x2u
#define BLE_RF_REGS_DSM_STATUS_RIF_LL_ACTIVE_SHIFT 1
#define BLE_RF_REGS_DSM_STATUS_RIF_LL_ACTIVE_WIDTH 1
#define BLE_RF_REGS_DSM_STATUS_RIF_LL_ACTIVE(x) (((uint16_t)(((uint16_t)(x))<<BLE_RF_REGS_DSM_STATUS_RIF_LL_ACTIVE_SHIFT))&BLE_RF_REGS_DSM_STATUS_RIF_LL_ACTIVE_MASK)
/* BLE_AFC Bit Fields */
#define BLE_RF_REGS_BLE_AFC_BLE_AFC_MASK 0x3FFFu
#define BLE_RF_REGS_BLE_AFC_BLE_AFC_SHIFT 0
#define BLE_RF_REGS_BLE_AFC_BLE_AFC_WIDTH 14
#define BLE_RF_REGS_BLE_AFC_BLE_AFC(x) (((uint16_t)(((uint16_t)(x))<<BLE_RF_REGS_BLE_AFC_BLE_AFC_SHIFT))&BLE_RF_REGS_BLE_AFC_BLE_AFC_MASK)
#define BLE_RF_REGS_BLE_AFC_LATCH_AFC_ON_ACCESS_MATCH_MASK 0x8000u
#define BLE_RF_REGS_BLE_AFC_LATCH_AFC_ON_ACCESS_MATCH_SHIFT 15
#define BLE_RF_REGS_BLE_AFC_LATCH_AFC_ON_ACCESS_MATCH_WIDTH 1
#define BLE_RF_REGS_BLE_AFC_LATCH_AFC_ON_ACCESS_MATCH(x) (((uint16_t)(((uint16_t)(x))<<BLE_RF_REGS_BLE_AFC_LATCH_AFC_ON_ACCESS_MATCH_SHIFT))&BLE_RF_REGS_BLE_AFC_LATCH_AFC_ON_ACCESS_MATCH_MASK)
/* BLE_BSM Bit Fields */
#define BLE_RF_REGS_BLE_BSM_BSM_EN_BLE_MASK 0x1u
#define BLE_RF_REGS_BLE_BSM_BSM_EN_BLE_SHIFT 0
#define BLE_RF_REGS_BLE_BSM_BSM_EN_BLE_WIDTH 1
#define BLE_RF_REGS_BLE_BSM_BSM_EN_BLE(x) (((uint16_t)(((uint16_t)(x))<<BLE_RF_REGS_BLE_BSM_BSM_EN_BLE_SHIFT))&BLE_RF_REGS_BLE_BSM_BSM_EN_BLE_MASK)
/*!
* @}
*/ /* end of group BLE_RF_REGS_Register_Masks */
/* BLE_RF_REGS - Peripheral instance base addresses */
/** Peripheral BLE_RF_REGS base address */
#define BLE_RF_REGS_BASE (0x4005B000u)
/** Peripheral BLE_RF_REGS base pointer */
#define BLE_RF_REGS ((BLE_RF_REGS_Type *)BLE_RF_REGS_BASE)
#define BLE_RF_REGS_BASE_PTR (BLE_RF_REGS)
/** Array initializer of BLE_RF_REGS peripheral base addresses */
#define BLE_RF_REGS_BASE_ADDRS { BLE_RF_REGS_BASE }
/** Array initializer of BLE_RF_REGS peripheral base pointers */
#define BLE_RF_REGS_BASE_PTRS { BLE_RF_REGS }
/* ----------------------------------------------------------------------------
-- BLE_RF_REGS - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup BLE_RF_REGS_Register_Accessor_Macros BLE_RF_REGS - Register accessor macros
* @{
*/
/* BLE_RF_REGS - Register instance definitions */
/* BLE_RF_REGS */
#define BLE_RF_REGS_BLE_PART_ID BLE_RF_REGS_BLE_PART_ID_REG(BLE_RF_REGS)
#define BLE_RF_REGS_DSM_STATUS BLE_RF_REGS_DSM_STATUS_REG(BLE_RF_REGS)
#define BLE_RF_REGS_BLE_AFC BLE_RF_REGS_BLE_AFC_REG(BLE_RF_REGS)
#define BLE_RF_REGS_BLE_BSM BLE_RF_REGS_BLE_BSM_REG(BLE_RF_REGS)
/*!
* @}
*/ /* end of group BLE_RF_REGS_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group BLE_RF_REGS_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- CMP Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMP_Peripheral_Access_Layer CMP Peripheral Access Layer
* @{
*/
/** CMP - Register Layout Typedef */
typedef struct {
__IO uint8_t CR0; /**< CMP Control Register 0, offset: 0x0 */
__IO uint8_t CR1; /**< CMP Control Register 1, offset: 0x1 */
__IO uint8_t FPR; /**< CMP Filter Period Register, offset: 0x2 */
__IO uint8_t SCR; /**< CMP Status and Control Register, offset: 0x3 */
__IO uint8_t DACCR; /**< DAC Control Register, offset: 0x4 */
__IO uint8_t MUXCR; /**< MUX Control Register, offset: 0x5 */
} CMP_Type, *CMP_MemMapPtr;
/* ----------------------------------------------------------------------------
-- CMP - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMP_Register_Accessor_Macros CMP - Register accessor macros
* @{
*/
/* CMP - Register accessors */
#define CMP_CR0_REG(base) ((base)->CR0)
#define CMP_CR1_REG(base) ((base)->CR1)
#define CMP_FPR_REG(base) ((base)->FPR)
#define CMP_SCR_REG(base) ((base)->SCR)
#define CMP_DACCR_REG(base) ((base)->DACCR)
#define CMP_MUXCR_REG(base) ((base)->MUXCR)
/*!
* @}
*/ /* end of group CMP_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- CMP Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMP_Register_Masks CMP Register Masks
* @{
*/
/* CR0 Bit Fields */
#define CMP_CR0_HYSTCTR_MASK 0x3u
#define CMP_CR0_HYSTCTR_SHIFT 0
#define CMP_CR0_HYSTCTR_WIDTH 2
#define CMP_CR0_HYSTCTR(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR0_HYSTCTR_SHIFT))&CMP_CR0_HYSTCTR_MASK)
#define CMP_CR0_FILTER_CNT_MASK 0x70u
#define CMP_CR0_FILTER_CNT_SHIFT 4
#define CMP_CR0_FILTER_CNT_WIDTH 3
#define CMP_CR0_FILTER_CNT(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR0_FILTER_CNT_SHIFT))&CMP_CR0_FILTER_CNT_MASK)
/* CR1 Bit Fields */
#define CMP_CR1_EN_MASK 0x1u
#define CMP_CR1_EN_SHIFT 0
#define CMP_CR1_EN_WIDTH 1
#define CMP_CR1_EN(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_EN_SHIFT))&CMP_CR1_EN_MASK)
#define CMP_CR1_OPE_MASK 0x2u
#define CMP_CR1_OPE_SHIFT 1
#define CMP_CR1_OPE_WIDTH 1
#define CMP_CR1_OPE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_OPE_SHIFT))&CMP_CR1_OPE_MASK)
#define CMP_CR1_COS_MASK 0x4u
#define CMP_CR1_COS_SHIFT 2
#define CMP_CR1_COS_WIDTH 1
#define CMP_CR1_COS(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_COS_SHIFT))&CMP_CR1_COS_MASK)
#define CMP_CR1_INV_MASK 0x8u
#define CMP_CR1_INV_SHIFT 3
#define CMP_CR1_INV_WIDTH 1
#define CMP_CR1_INV(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_INV_SHIFT))&CMP_CR1_INV_MASK)
#define CMP_CR1_PMODE_MASK 0x10u
#define CMP_CR1_PMODE_SHIFT 4
#define CMP_CR1_PMODE_WIDTH 1
#define CMP_CR1_PMODE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_PMODE_SHIFT))&CMP_CR1_PMODE_MASK)
#define CMP_CR1_TRIGM_MASK 0x20u
#define CMP_CR1_TRIGM_SHIFT 5
#define CMP_CR1_TRIGM_WIDTH 1
#define CMP_CR1_TRIGM(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_TRIGM_SHIFT))&CMP_CR1_TRIGM_MASK)
#define CMP_CR1_WE_MASK 0x40u
#define CMP_CR1_WE_SHIFT 6
#define CMP_CR1_WE_WIDTH 1
#define CMP_CR1_WE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_WE_SHIFT))&CMP_CR1_WE_MASK)
#define CMP_CR1_SE_MASK 0x80u
#define CMP_CR1_SE_SHIFT 7
#define CMP_CR1_SE_WIDTH 1
#define CMP_CR1_SE(x) (((uint8_t)(((uint8_t)(x))<<CMP_CR1_SE_SHIFT))&CMP_CR1_SE_MASK)
/* FPR Bit Fields */
#define CMP_FPR_FILT_PER_MASK 0xFFu
#define CMP_FPR_FILT_PER_SHIFT 0
#define CMP_FPR_FILT_PER_WIDTH 8
#define CMP_FPR_FILT_PER(x) (((uint8_t)(((uint8_t)(x))<<CMP_FPR_FILT_PER_SHIFT))&CMP_FPR_FILT_PER_MASK)
/* SCR Bit Fields */
#define CMP_SCR_COUT_MASK 0x1u
#define CMP_SCR_COUT_SHIFT 0
#define CMP_SCR_COUT_WIDTH 1
#define CMP_SCR_COUT(x) (((uint8_t)(((uint8_t)(x))<<CMP_SCR_COUT_SHIFT))&CMP_SCR_COUT_MASK)
#define CMP_SCR_CFF_MASK 0x2u
#define CMP_SCR_CFF_SHIFT 1
#define CMP_SCR_CFF_WIDTH 1
#define CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x))<<CMP_SCR_CFF_SHIFT))&CMP_SCR_CFF_MASK)
#define CMP_SCR_CFR_MASK 0x4u
#define CMP_SCR_CFR_SHIFT 2
#define CMP_SCR_CFR_WIDTH 1
#define CMP_SCR_CFR(x) (((uint8_t)(((uint8_t)(x))<<CMP_SCR_CFR_SHIFT))&CMP_SCR_CFR_MASK)
#define CMP_SCR_IEF_MASK 0x8u
#define CMP_SCR_IEF_SHIFT 3
#define CMP_SCR_IEF_WIDTH 1
#define CMP_SCR_IEF(x) (((uint8_t)(((uint8_t)(x))<<CMP_SCR_IEF_SHIFT))&CMP_SCR_IEF_MASK)
#define CMP_SCR_IER_MASK 0x10u
#define CMP_SCR_IER_SHIFT 4
#define CMP_SCR_IER_WIDTH 1
#define CMP_SCR_IER(x) (((uint8_t)(((uint8_t)(x))<<CMP_SCR_IER_SHIFT))&CMP_SCR_IER_MASK)
#define CMP_SCR_DMAEN_MASK 0x40u
#define CMP_SCR_DMAEN_SHIFT 6
#define CMP_SCR_DMAEN_WIDTH 1
#define CMP_SCR_DMAEN(x) (((uint8_t)(((uint8_t)(x))<<CMP_SCR_DMAEN_SHIFT))&CMP_SCR_DMAEN_MASK)
/* DACCR Bit Fields */
#define CMP_DACCR_VOSEL_MASK 0x3Fu
#define CMP_DACCR_VOSEL_SHIFT 0
#define CMP_DACCR_VOSEL_WIDTH 6
#define CMP_DACCR_VOSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_DACCR_VOSEL_SHIFT))&CMP_DACCR_VOSEL_MASK)
#define CMP_DACCR_VRSEL_MASK 0x40u
#define CMP_DACCR_VRSEL_SHIFT 6
#define CMP_DACCR_VRSEL_WIDTH 1
#define CMP_DACCR_VRSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_DACCR_VRSEL_SHIFT))&CMP_DACCR_VRSEL_MASK)
#define CMP_DACCR_DACEN_MASK 0x80u
#define CMP_DACCR_DACEN_SHIFT 7
#define CMP_DACCR_DACEN_WIDTH 1
#define CMP_DACCR_DACEN(x) (((uint8_t)(((uint8_t)(x))<<CMP_DACCR_DACEN_SHIFT))&CMP_DACCR_DACEN_MASK)
/* MUXCR Bit Fields */
#define CMP_MUXCR_MSEL_MASK 0x7u
#define CMP_MUXCR_MSEL_SHIFT 0
#define CMP_MUXCR_MSEL_WIDTH 3
#define CMP_MUXCR_MSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_MSEL_SHIFT))&CMP_MUXCR_MSEL_MASK)
#define CMP_MUXCR_PSEL_MASK 0x38u
#define CMP_MUXCR_PSEL_SHIFT 3
#define CMP_MUXCR_PSEL_WIDTH 3
#define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSEL_SHIFT))&CMP_MUXCR_PSEL_MASK)
#define CMP_MUXCR_PSTM_MASK 0x80u
#define CMP_MUXCR_PSTM_SHIFT 7
#define CMP_MUXCR_PSTM_WIDTH 1
#define CMP_MUXCR_PSTM(x) (((uint8_t)(((uint8_t)(x))<<CMP_MUXCR_PSTM_SHIFT))&CMP_MUXCR_PSTM_MASK)
/*!
* @}
*/ /* end of group CMP_Register_Masks */
/* CMP - Peripheral instance base addresses */
/** Peripheral CMP0 base address */
#define CMP0_BASE (0x40073000u)
/** Peripheral CMP0 base pointer */
#define CMP0 ((CMP_Type *)CMP0_BASE)
#define CMP0_BASE_PTR (CMP0)
/** Array initializer of CMP peripheral base addresses */
#define CMP_BASE_ADDRS { CMP0_BASE }
/** Array initializer of CMP peripheral base pointers */
#define CMP_BASE_PTRS { CMP0 }
/** Interrupt vectors for the CMP peripheral type */
#define CMP_IRQS { CMP0_IRQn }
/* ----------------------------------------------------------------------------
-- CMP - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMP_Register_Accessor_Macros CMP - Register accessor macros
* @{
*/
/* CMP - Register instance definitions */
/* CMP0 */
#define CMP0_CR0 CMP_CR0_REG(CMP0)
#define CMP0_CR1 CMP_CR1_REG(CMP0)
#define CMP0_FPR CMP_FPR_REG(CMP0)
#define CMP0_SCR CMP_SCR_REG(CMP0)
#define CMP0_DACCR CMP_DACCR_REG(CMP0)
#define CMP0_MUXCR CMP_MUXCR_REG(CMP0)
/*!
* @}
*/ /* end of group CMP_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group CMP_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- CMT Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMT_Peripheral_Access_Layer CMT Peripheral Access Layer
* @{
*/
/** CMT - Register Layout Typedef */
typedef struct {
__IO uint8_t CGH1; /**< CMT Carrier Generator High Data Register 1, offset: 0x0 */
__IO uint8_t CGL1; /**< CMT Carrier Generator Low Data Register 1, offset: 0x1 */
__IO uint8_t CGH2; /**< CMT Carrier Generator High Data Register 2, offset: 0x2 */
__IO uint8_t CGL2; /**< CMT Carrier Generator Low Data Register 2, offset: 0x3 */
__IO uint8_t OC; /**< CMT Output Control Register, offset: 0x4 */
__IO uint8_t MSC; /**< CMT Modulator Status and Control Register, offset: 0x5 */
__IO uint8_t CMD1; /**< CMT Modulator Data Register Mark High, offset: 0x6 */
__IO uint8_t CMD2; /**< CMT Modulator Data Register Mark Low, offset: 0x7 */
__IO uint8_t CMD3; /**< CMT Modulator Data Register Space High, offset: 0x8 */
__IO uint8_t CMD4; /**< CMT Modulator Data Register Space Low, offset: 0x9 */
__IO uint8_t PPS; /**< CMT Primary Prescaler Register, offset: 0xA */
__IO uint8_t DMA; /**< CMT Direct Memory Access Register, offset: 0xB */
} CMT_Type, *CMT_MemMapPtr;
/* ----------------------------------------------------------------------------
-- CMT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMT_Register_Accessor_Macros CMT - Register accessor macros
* @{
*/
/* CMT - Register accessors */
#define CMT_CGH1_REG(base) ((base)->CGH1)
#define CMT_CGL1_REG(base) ((base)->CGL1)
#define CMT_CGH2_REG(base) ((base)->CGH2)
#define CMT_CGL2_REG(base) ((base)->CGL2)
#define CMT_OC_REG(base) ((base)->OC)
#define CMT_MSC_REG(base) ((base)->MSC)
#define CMT_CMD1_REG(base) ((base)->CMD1)
#define CMT_CMD2_REG(base) ((base)->CMD2)
#define CMT_CMD3_REG(base) ((base)->CMD3)
#define CMT_CMD4_REG(base) ((base)->CMD4)
#define CMT_PPS_REG(base) ((base)->PPS)
#define CMT_DMA_REG(base) ((base)->DMA)
/*!
* @}
*/ /* end of group CMT_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- CMT Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMT_Register_Masks CMT Register Masks
* @{
*/
/* CGH1 Bit Fields */
#define CMT_CGH1_PH_MASK 0xFFu
#define CMT_CGH1_PH_SHIFT 0
#define CMT_CGH1_PH_WIDTH 8
#define CMT_CGH1_PH(x) (((uint8_t)(((uint8_t)(x))<<CMT_CGH1_PH_SHIFT))&CMT_CGH1_PH_MASK)
/* CGL1 Bit Fields */
#define CMT_CGL1_PL_MASK 0xFFu
#define CMT_CGL1_PL_SHIFT 0
#define CMT_CGL1_PL_WIDTH 8
#define CMT_CGL1_PL(x) (((uint8_t)(((uint8_t)(x))<<CMT_CGL1_PL_SHIFT))&CMT_CGL1_PL_MASK)
/* CGH2 Bit Fields */
#define CMT_CGH2_SH_MASK 0xFFu
#define CMT_CGH2_SH_SHIFT 0
#define CMT_CGH2_SH_WIDTH 8
#define CMT_CGH2_SH(x) (((uint8_t)(((uint8_t)(x))<<CMT_CGH2_SH_SHIFT))&CMT_CGH2_SH_MASK)
/* CGL2 Bit Fields */
#define CMT_CGL2_SL_MASK 0xFFu
#define CMT_CGL2_SL_SHIFT 0
#define CMT_CGL2_SL_WIDTH 8
#define CMT_CGL2_SL(x) (((uint8_t)(((uint8_t)(x))<<CMT_CGL2_SL_SHIFT))&CMT_CGL2_SL_MASK)
/* OC Bit Fields */
#define CMT_OC_IROPEN_MASK 0x20u
#define CMT_OC_IROPEN_SHIFT 5
#define CMT_OC_IROPEN_WIDTH 1
#define CMT_OC_IROPEN(x) (((uint8_t)(((uint8_t)(x))<<CMT_OC_IROPEN_SHIFT))&CMT_OC_IROPEN_MASK)
#define CMT_OC_CMTPOL_MASK 0x40u
#define CMT_OC_CMTPOL_SHIFT 6
#define CMT_OC_CMTPOL_WIDTH 1
#define CMT_OC_CMTPOL(x) (((uint8_t)(((uint8_t)(x))<<CMT_OC_CMTPOL_SHIFT))&CMT_OC_CMTPOL_MASK)
#define CMT_OC_IROL_MASK 0x80u
#define CMT_OC_IROL_SHIFT 7
#define CMT_OC_IROL_WIDTH 1
#define CMT_OC_IROL(x) (((uint8_t)(((uint8_t)(x))<<CMT_OC_IROL_SHIFT))&CMT_OC_IROL_MASK)
/* MSC Bit Fields */
#define CMT_MSC_MCGEN_MASK 0x1u
#define CMT_MSC_MCGEN_SHIFT 0
#define CMT_MSC_MCGEN_WIDTH 1
#define CMT_MSC_MCGEN(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_MCGEN_SHIFT))&CMT_MSC_MCGEN_MASK)
#define CMT_MSC_EOCIE_MASK 0x2u
#define CMT_MSC_EOCIE_SHIFT 1
#define CMT_MSC_EOCIE_WIDTH 1
#define CMT_MSC_EOCIE(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_EOCIE_SHIFT))&CMT_MSC_EOCIE_MASK)
#define CMT_MSC_FSK_MASK 0x4u
#define CMT_MSC_FSK_SHIFT 2
#define CMT_MSC_FSK_WIDTH 1
#define CMT_MSC_FSK(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_FSK_SHIFT))&CMT_MSC_FSK_MASK)
#define CMT_MSC_BASE_MASK 0x8u
#define CMT_MSC_BASE_SHIFT 3
#define CMT_MSC_BASE_WIDTH 1
#define CMT_MSC_BASE(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_BASE_SHIFT))&CMT_MSC_BASE_MASK)
#define CMT_MSC_EXSPC_MASK 0x10u
#define CMT_MSC_EXSPC_SHIFT 4
#define CMT_MSC_EXSPC_WIDTH 1
#define CMT_MSC_EXSPC(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_EXSPC_SHIFT))&CMT_MSC_EXSPC_MASK)
#define CMT_MSC_CMTDIV_MASK 0x60u
#define CMT_MSC_CMTDIV_SHIFT 5
#define CMT_MSC_CMTDIV_WIDTH 2
#define CMT_MSC_CMTDIV(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_CMTDIV_SHIFT))&CMT_MSC_CMTDIV_MASK)
#define CMT_MSC_EOCF_MASK 0x80u
#define CMT_MSC_EOCF_SHIFT 7
#define CMT_MSC_EOCF_WIDTH 1
#define CMT_MSC_EOCF(x) (((uint8_t)(((uint8_t)(x))<<CMT_MSC_EOCF_SHIFT))&CMT_MSC_EOCF_MASK)
/* CMD1 Bit Fields */
#define CMT_CMD1_MB_MASK 0xFFu
#define CMT_CMD1_MB_SHIFT 0
#define CMT_CMD1_MB_WIDTH 8
#define CMT_CMD1_MB(x) (((uint8_t)(((uint8_t)(x))<<CMT_CMD1_MB_SHIFT))&CMT_CMD1_MB_MASK)
/* CMD2 Bit Fields */
#define CMT_CMD2_MB_MASK 0xFFu
#define CMT_CMD2_MB_SHIFT 0
#define CMT_CMD2_MB_WIDTH 8
#define CMT_CMD2_MB(x) (((uint8_t)(((uint8_t)(x))<<CMT_CMD2_MB_SHIFT))&CMT_CMD2_MB_MASK)
/* CMD3 Bit Fields */
#define CMT_CMD3_SB_MASK 0xFFu
#define CMT_CMD3_SB_SHIFT 0
#define CMT_CMD3_SB_WIDTH 8
#define CMT_CMD3_SB(x) (((uint8_t)(((uint8_t)(x))<<CMT_CMD3_SB_SHIFT))&CMT_CMD3_SB_MASK)
/* CMD4 Bit Fields */
#define CMT_CMD4_SB_MASK 0xFFu
#define CMT_CMD4_SB_SHIFT 0
#define CMT_CMD4_SB_WIDTH 8
#define CMT_CMD4_SB(x) (((uint8_t)(((uint8_t)(x))<<CMT_CMD4_SB_SHIFT))&CMT_CMD4_SB_MASK)
/* PPS Bit Fields */
#define CMT_PPS_PPSDIV_MASK 0xFu
#define CMT_PPS_PPSDIV_SHIFT 0
#define CMT_PPS_PPSDIV_WIDTH 4
#define CMT_PPS_PPSDIV(x) (((uint8_t)(((uint8_t)(x))<<CMT_PPS_PPSDIV_SHIFT))&CMT_PPS_PPSDIV_MASK)
/* DMA Bit Fields */
#define CMT_DMA_DMA_MASK 0x1u
#define CMT_DMA_DMA_SHIFT 0
#define CMT_DMA_DMA_WIDTH 1
#define CMT_DMA_DMA(x) (((uint8_t)(((uint8_t)(x))<<CMT_DMA_DMA_SHIFT))&CMT_DMA_DMA_MASK)
/*!
* @}
*/ /* end of group CMT_Register_Masks */
/* CMT - Peripheral instance base addresses */
/** Peripheral CMT base address */
#define CMT_BASE (0x40062000u)
/** Peripheral CMT base pointer */
#define CMT ((CMT_Type *)CMT_BASE)
#define CMT_BASE_PTR (CMT)
/** Array initializer of CMT peripheral base addresses */
#define CMT_BASE_ADDRS { CMT_BASE }
/** Array initializer of CMT peripheral base pointers */
#define CMT_BASE_PTRS { CMT }
/** Interrupt vectors for the CMT peripheral type */
#define CMT_IRQS { CMT_IRQn }
/* ----------------------------------------------------------------------------
-- CMT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup CMT_Register_Accessor_Macros CMT - Register accessor macros
* @{
*/
/* CMT - Register instance definitions */
/* CMT */
#define CMT_CGH1 CMT_CGH1_REG(CMT)
#define CMT_CGL1 CMT_CGL1_REG(CMT)
#define CMT_CGH2 CMT_CGH2_REG(CMT)
#define CMT_CGL2 CMT_CGL2_REG(CMT)
#define CMT_OC CMT_OC_REG(CMT)
#define CMT_MSC CMT_MSC_REG(CMT)
#define CMT_CMD1 CMT_CMD1_REG(CMT)
#define CMT_CMD2 CMT_CMD2_REG(CMT)
#define CMT_CMD3 CMT_CMD3_REG(CMT)
#define CMT_CMD4 CMT_CMD4_REG(CMT)
#define CMT_PPS CMT_PPS_REG(CMT)
#define CMT_DMA CMT_DMA_REG(CMT)
/*!
* @}
*/ /* end of group CMT_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group CMT_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- DAC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup DAC_Peripheral_Access_Layer DAC Peripheral Access Layer
* @{
*/
/** DAC - Register Layout Typedef */
typedef struct {
struct { /* offset: 0x0, array step: 0x2 */
__IO uint8_t DATL; /**< DAC Data Low Register, array offset: 0x0, array step: 0x2 */
__IO uint8_t DATH; /**< DAC Data High Register, array offset: 0x1, array step: 0x2 */
} DAT[2];
uint8_t RESERVED_0[28];
__IO uint8_t SR; /**< DAC Status Register, offset: 0x20 */
__IO uint8_t C0; /**< DAC Control Register, offset: 0x21 */
__IO uint8_t C1; /**< DAC Control Register 1, offset: 0x22 */
__IO uint8_t C2; /**< DAC Control Register 2, offset: 0x23 */
} DAC_Type, *DAC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- DAC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DAC_Register_Accessor_Macros DAC - Register accessor macros
* @{
*/
/* DAC - Register accessors */
#define DAC_DATL_REG(base,index) ((base)->DAT[index].DATL)
#define DAC_DATL_COUNT 2
#define DAC_DATH_REG(base,index) ((base)->DAT[index].DATH)
#define DAC_DATH_COUNT 2
#define DAC_SR_REG(base) ((base)->SR)
#define DAC_C0_REG(base) ((base)->C0)
#define DAC_C1_REG(base) ((base)->C1)
#define DAC_C2_REG(base) ((base)->C2)
/*!
* @}
*/ /* end of group DAC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- DAC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup DAC_Register_Masks DAC Register Masks
* @{
*/
/* DATL Bit Fields */
#define DAC_DATL_DATA0_MASK 0xFFu
#define DAC_DATL_DATA0_SHIFT 0
#define DAC_DATL_DATA0_WIDTH 8
#define DAC_DATL_DATA0(x) (((uint8_t)(((uint8_t)(x))<<DAC_DATL_DATA0_SHIFT))&DAC_DATL_DATA0_MASK)
/* DATH Bit Fields */
#define DAC_DATH_DATA1_MASK 0xFu
#define DAC_DATH_DATA1_SHIFT 0
#define DAC_DATH_DATA1_WIDTH 4
#define DAC_DATH_DATA1(x) (((uint8_t)(((uint8_t)(x))<<DAC_DATH_DATA1_SHIFT))&DAC_DATH_DATA1_MASK)
/* SR Bit Fields */
#define DAC_SR_DACBFRPBF_MASK 0x1u
#define DAC_SR_DACBFRPBF_SHIFT 0
#define DAC_SR_DACBFRPBF_WIDTH 1
#define DAC_SR_DACBFRPBF(x) (((uint8_t)(((uint8_t)(x))<<DAC_SR_DACBFRPBF_SHIFT))&DAC_SR_DACBFRPBF_MASK)
#define DAC_SR_DACBFRPTF_MASK 0x2u
#define DAC_SR_DACBFRPTF_SHIFT 1
#define DAC_SR_DACBFRPTF_WIDTH 1
#define DAC_SR_DACBFRPTF(x) (((uint8_t)(((uint8_t)(x))<<DAC_SR_DACBFRPTF_SHIFT))&DAC_SR_DACBFRPTF_MASK)
/* C0 Bit Fields */
#define DAC_C0_DACBBIEN_MASK 0x1u
#define DAC_C0_DACBBIEN_SHIFT 0
#define DAC_C0_DACBBIEN_WIDTH 1
#define DAC_C0_DACBBIEN(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_DACBBIEN_SHIFT))&DAC_C0_DACBBIEN_MASK)
#define DAC_C0_DACBTIEN_MASK 0x2u
#define DAC_C0_DACBTIEN_SHIFT 1
#define DAC_C0_DACBTIEN_WIDTH 1
#define DAC_C0_DACBTIEN(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_DACBTIEN_SHIFT))&DAC_C0_DACBTIEN_MASK)
#define DAC_C0_LPEN_MASK 0x8u
#define DAC_C0_LPEN_SHIFT 3
#define DAC_C0_LPEN_WIDTH 1
#define DAC_C0_LPEN(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_LPEN_SHIFT))&DAC_C0_LPEN_MASK)
#define DAC_C0_DACSWTRG_MASK 0x10u
#define DAC_C0_DACSWTRG_SHIFT 4
#define DAC_C0_DACSWTRG_WIDTH 1
#define DAC_C0_DACSWTRG(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_DACSWTRG_SHIFT))&DAC_C0_DACSWTRG_MASK)
#define DAC_C0_DACTRGSEL_MASK 0x20u
#define DAC_C0_DACTRGSEL_SHIFT 5
#define DAC_C0_DACTRGSEL_WIDTH 1
#define DAC_C0_DACTRGSEL(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_DACTRGSEL_SHIFT))&DAC_C0_DACTRGSEL_MASK)
#define DAC_C0_DACRFS_MASK 0x40u
#define DAC_C0_DACRFS_SHIFT 6
#define DAC_C0_DACRFS_WIDTH 1
#define DAC_C0_DACRFS(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_DACRFS_SHIFT))&DAC_C0_DACRFS_MASK)
#define DAC_C0_DACEN_MASK 0x80u
#define DAC_C0_DACEN_SHIFT 7
#define DAC_C0_DACEN_WIDTH 1
#define DAC_C0_DACEN(x) (((uint8_t)(((uint8_t)(x))<<DAC_C0_DACEN_SHIFT))&DAC_C0_DACEN_MASK)
/* C1 Bit Fields */
#define DAC_C1_DACBFEN_MASK 0x1u
#define DAC_C1_DACBFEN_SHIFT 0
#define DAC_C1_DACBFEN_WIDTH 1
#define DAC_C1_DACBFEN(x) (((uint8_t)(((uint8_t)(x))<<DAC_C1_DACBFEN_SHIFT))&DAC_C1_DACBFEN_MASK)
#define DAC_C1_DACBFMD_MASK 0x4u
#define DAC_C1_DACBFMD_SHIFT 2
#define DAC_C1_DACBFMD_WIDTH 1
#define DAC_C1_DACBFMD(x) (((uint8_t)(((uint8_t)(x))<<DAC_C1_DACBFMD_SHIFT))&DAC_C1_DACBFMD_MASK)
#define DAC_C1_DMAEN_MASK 0x80u
#define DAC_C1_DMAEN_SHIFT 7
#define DAC_C1_DMAEN_WIDTH 1
#define DAC_C1_DMAEN(x) (((uint8_t)(((uint8_t)(x))<<DAC_C1_DMAEN_SHIFT))&DAC_C1_DMAEN_MASK)
/* C2 Bit Fields */
#define DAC_C2_DACBFUP_MASK 0x1u
#define DAC_C2_DACBFUP_SHIFT 0
#define DAC_C2_DACBFUP_WIDTH 1
#define DAC_C2_DACBFUP(x) (((uint8_t)(((uint8_t)(x))<<DAC_C2_DACBFUP_SHIFT))&DAC_C2_DACBFUP_MASK)
#define DAC_C2_DACBFRP_MASK 0x10u
#define DAC_C2_DACBFRP_SHIFT 4
#define DAC_C2_DACBFRP_WIDTH 1
#define DAC_C2_DACBFRP(x) (((uint8_t)(((uint8_t)(x))<<DAC_C2_DACBFRP_SHIFT))&DAC_C2_DACBFRP_MASK)
/*!
* @}
*/ /* end of group DAC_Register_Masks */
/* DAC - Peripheral instance base addresses */
/** Peripheral DAC0 base address */
#define DAC0_BASE (0x4003F000u)
/** Peripheral DAC0 base pointer */
#define DAC0 ((DAC_Type *)DAC0_BASE)
#define DAC0_BASE_PTR (DAC0)
/** Array initializer of DAC peripheral base addresses */
#define DAC_BASE_ADDRS { DAC0_BASE }
/** Array initializer of DAC peripheral base pointers */
#define DAC_BASE_PTRS { DAC0 }
/** Interrupt vectors for the DAC peripheral type */
#define DAC_IRQS { DAC0_IRQn }
/* ----------------------------------------------------------------------------
-- DAC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DAC_Register_Accessor_Macros DAC - Register accessor macros
* @{
*/
/* DAC - Register instance definitions */
/* DAC0 */
#define DAC0_DAT0L DAC_DATL_REG(DAC0,0)
#define DAC0_DAT0H DAC_DATH_REG(DAC0,0)
#define DAC0_DAT1L DAC_DATL_REG(DAC0,1)
#define DAC0_DAT1H DAC_DATH_REG(DAC0,1)
#define DAC0_SR DAC_SR_REG(DAC0)
#define DAC0_C0 DAC_C0_REG(DAC0)
#define DAC0_C1 DAC_C1_REG(DAC0)
#define DAC0_C2 DAC_C2_REG(DAC0)
/* DAC - Register array accessors */
#define DAC0_DATL(index) DAC_DATL_REG(DAC0,index)
#define DAC0_DATH(index) DAC_DATH_REG(DAC0,index)
/*!
* @}
*/ /* end of group DAC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group DAC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- DCDC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup DCDC_Peripheral_Access_Layer DCDC Peripheral Access Layer
* @{
*/
/** DCDC - Register Layout Typedef */
typedef struct {
__IO uint32_t REG0; /**< DCDC REGISTER 0, offset: 0x0 */
__IO uint32_t REG1; /**< DCDC REGISTER 1, offset: 0x4 */
__IO uint32_t REG2; /**< DCDC REGISTER 2, offset: 0x8 */
__IO uint32_t REG3; /**< DCDC REGISTER 3, offset: 0xC */
__IO uint32_t REG4; /**< DCDC REGISTER 4, offset: 0x10 */
uint8_t RESERVED_0[4];
__IO uint32_t REG6; /**< DCDC REGISTER 6, offset: 0x18 */
__IO uint32_t REG7; /**< DCDC REGISTER 7, offset: 0x1C */
} DCDC_Type, *DCDC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- DCDC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DCDC_Register_Accessor_Macros DCDC - Register accessor macros
* @{
*/
/* DCDC - Register accessors */
#define DCDC_REG0_REG(base) ((base)->REG0)
#define DCDC_REG1_REG(base) ((base)->REG1)
#define DCDC_REG2_REG(base) ((base)->REG2)
#define DCDC_REG3_REG(base) ((base)->REG3)
#define DCDC_REG4_REG(base) ((base)->REG4)
#define DCDC_REG6_REG(base) ((base)->REG6)
#define DCDC_REG7_REG(base) ((base)->REG7)
/*!
* @}
*/ /* end of group DCDC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- DCDC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup DCDC_Register_Masks DCDC Register Masks
* @{
*/
/* REG0 Bit Fields */
#define DCDC_REG0_DCDC_DISABLE_AUTO_CLK_SWITCH_MASK 0x2u
#define DCDC_REG0_DCDC_DISABLE_AUTO_CLK_SWITCH_SHIFT 1
#define DCDC_REG0_DCDC_DISABLE_AUTO_CLK_SWITCH_WIDTH 1
#define DCDC_REG0_DCDC_DISABLE_AUTO_CLK_SWITCH(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_DISABLE_AUTO_CLK_SWITCH_SHIFT))&DCDC_REG0_DCDC_DISABLE_AUTO_CLK_SWITCH_MASK)
#define DCDC_REG0_DCDC_SEL_CLK_MASK 0x4u
#define DCDC_REG0_DCDC_SEL_CLK_SHIFT 2
#define DCDC_REG0_DCDC_SEL_CLK_WIDTH 1
#define DCDC_REG0_DCDC_SEL_CLK(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_SEL_CLK_SHIFT))&DCDC_REG0_DCDC_SEL_CLK_MASK)
#define DCDC_REG0_DCDC_PWD_OSC_INT_MASK 0x8u
#define DCDC_REG0_DCDC_PWD_OSC_INT_SHIFT 3
#define DCDC_REG0_DCDC_PWD_OSC_INT_WIDTH 1
#define DCDC_REG0_DCDC_PWD_OSC_INT(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_PWD_OSC_INT_SHIFT))&DCDC_REG0_DCDC_PWD_OSC_INT_MASK)
#define DCDC_REG0_DCDC_LP_DF_CMP_ENABLE_MASK 0x200u
#define DCDC_REG0_DCDC_LP_DF_CMP_ENABLE_SHIFT 9
#define DCDC_REG0_DCDC_LP_DF_CMP_ENABLE_WIDTH 1
#define DCDC_REG0_DCDC_LP_DF_CMP_ENABLE(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_LP_DF_CMP_ENABLE_SHIFT))&DCDC_REG0_DCDC_LP_DF_CMP_ENABLE_MASK)
#define DCDC_REG0_DCDC_VBAT_DIV_CTRL_MASK 0xC00u
#define DCDC_REG0_DCDC_VBAT_DIV_CTRL_SHIFT 10
#define DCDC_REG0_DCDC_VBAT_DIV_CTRL_WIDTH 2
#define DCDC_REG0_DCDC_VBAT_DIV_CTRL(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_VBAT_DIV_CTRL_SHIFT))&DCDC_REG0_DCDC_VBAT_DIV_CTRL_MASK)
#define DCDC_REG0_DCDC_LP_STATE_HYS_L_MASK 0x60000u
#define DCDC_REG0_DCDC_LP_STATE_HYS_L_SHIFT 17
#define DCDC_REG0_DCDC_LP_STATE_HYS_L_WIDTH 2
#define DCDC_REG0_DCDC_LP_STATE_HYS_L(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_LP_STATE_HYS_L_SHIFT))&DCDC_REG0_DCDC_LP_STATE_HYS_L_MASK)
#define DCDC_REG0_DCDC_LP_STATE_HYS_H_MASK 0x180000u
#define DCDC_REG0_DCDC_LP_STATE_HYS_H_SHIFT 19
#define DCDC_REG0_DCDC_LP_STATE_HYS_H_WIDTH 2
#define DCDC_REG0_DCDC_LP_STATE_HYS_H(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_LP_STATE_HYS_H_SHIFT))&DCDC_REG0_DCDC_LP_STATE_HYS_H_MASK)
#define DCDC_REG0_HYST_LP_COMP_ADJ_MASK 0x200000u
#define DCDC_REG0_HYST_LP_COMP_ADJ_SHIFT 21
#define DCDC_REG0_HYST_LP_COMP_ADJ_WIDTH 1
#define DCDC_REG0_HYST_LP_COMP_ADJ(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_HYST_LP_COMP_ADJ_SHIFT))&DCDC_REG0_HYST_LP_COMP_ADJ_MASK)
#define DCDC_REG0_HYST_LP_CMP_DISABLE_MASK 0x400000u
#define DCDC_REG0_HYST_LP_CMP_DISABLE_SHIFT 22
#define DCDC_REG0_HYST_LP_CMP_DISABLE_WIDTH 1
#define DCDC_REG0_HYST_LP_CMP_DISABLE(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_HYST_LP_CMP_DISABLE_SHIFT))&DCDC_REG0_HYST_LP_CMP_DISABLE_MASK)
#define DCDC_REG0_OFFSET_RSNS_LP_ADJ_MASK 0x800000u
#define DCDC_REG0_OFFSET_RSNS_LP_ADJ_SHIFT 23
#define DCDC_REG0_OFFSET_RSNS_LP_ADJ_WIDTH 1
#define DCDC_REG0_OFFSET_RSNS_LP_ADJ(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_OFFSET_RSNS_LP_ADJ_SHIFT))&DCDC_REG0_OFFSET_RSNS_LP_ADJ_MASK)
#define DCDC_REG0_OFFSET_RSNS_LP_DISABLE_MASK 0x1000000u
#define DCDC_REG0_OFFSET_RSNS_LP_DISABLE_SHIFT 24
#define DCDC_REG0_OFFSET_RSNS_LP_DISABLE_WIDTH 1
#define DCDC_REG0_OFFSET_RSNS_LP_DISABLE(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_OFFSET_RSNS_LP_DISABLE_SHIFT))&DCDC_REG0_OFFSET_RSNS_LP_DISABLE_MASK)
#define DCDC_REG0_DCDC_LESS_I_MASK 0x2000000u
#define DCDC_REG0_DCDC_LESS_I_SHIFT 25
#define DCDC_REG0_DCDC_LESS_I_WIDTH 1
#define DCDC_REG0_DCDC_LESS_I(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_LESS_I_SHIFT))&DCDC_REG0_DCDC_LESS_I_MASK)
#define DCDC_REG0_PWD_CMP_OFFSET_MASK 0x4000000u
#define DCDC_REG0_PWD_CMP_OFFSET_SHIFT 26
#define DCDC_REG0_PWD_CMP_OFFSET_WIDTH 1
#define DCDC_REG0_PWD_CMP_OFFSET(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_PWD_CMP_OFFSET_SHIFT))&DCDC_REG0_PWD_CMP_OFFSET_MASK)
#define DCDC_REG0_DCDC_XTALOK_DISABLE_MASK 0x8000000u
#define DCDC_REG0_DCDC_XTALOK_DISABLE_SHIFT 27
#define DCDC_REG0_DCDC_XTALOK_DISABLE_WIDTH 1
#define DCDC_REG0_DCDC_XTALOK_DISABLE(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_XTALOK_DISABLE_SHIFT))&DCDC_REG0_DCDC_XTALOK_DISABLE_MASK)
#define DCDC_REG0_PSWITCH_STATUS_MASK 0x10000000u
#define DCDC_REG0_PSWITCH_STATUS_SHIFT 28
#define DCDC_REG0_PSWITCH_STATUS_WIDTH 1
#define DCDC_REG0_PSWITCH_STATUS(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_PSWITCH_STATUS_SHIFT))&DCDC_REG0_PSWITCH_STATUS_MASK)
#define DCDC_REG0_VLPS_CONFIG_DCDC_HP_MASK 0x20000000u
#define DCDC_REG0_VLPS_CONFIG_DCDC_HP_SHIFT 29
#define DCDC_REG0_VLPS_CONFIG_DCDC_HP_WIDTH 1
#define DCDC_REG0_VLPS_CONFIG_DCDC_HP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_VLPS_CONFIG_DCDC_HP_SHIFT))&DCDC_REG0_VLPS_CONFIG_DCDC_HP_MASK)
#define DCDC_REG0_VLPR_VLPW_CONFIG_DCDC_HP_MASK 0x40000000u
#define DCDC_REG0_VLPR_VLPW_CONFIG_DCDC_HP_SHIFT 30
#define DCDC_REG0_VLPR_VLPW_CONFIG_DCDC_HP_WIDTH 1
#define DCDC_REG0_VLPR_VLPW_CONFIG_DCDC_HP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_VLPR_VLPW_CONFIG_DCDC_HP_SHIFT))&DCDC_REG0_VLPR_VLPW_CONFIG_DCDC_HP_MASK)
#define DCDC_REG0_DCDC_STS_DC_OK_MASK 0x80000000u
#define DCDC_REG0_DCDC_STS_DC_OK_SHIFT 31
#define DCDC_REG0_DCDC_STS_DC_OK_WIDTH 1
#define DCDC_REG0_DCDC_STS_DC_OK(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG0_DCDC_STS_DC_OK_SHIFT))&DCDC_REG0_DCDC_STS_DC_OK_MASK)
/* REG1 Bit Fields */
#define DCDC_REG1_POSLIMIT_BUCK_IN_MASK 0x7Fu
#define DCDC_REG1_POSLIMIT_BUCK_IN_SHIFT 0
#define DCDC_REG1_POSLIMIT_BUCK_IN_WIDTH 7
#define DCDC_REG1_POSLIMIT_BUCK_IN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG1_POSLIMIT_BUCK_IN_SHIFT))&DCDC_REG1_POSLIMIT_BUCK_IN_MASK)
#define DCDC_REG1_POSLIMIT_BOOST_IN_MASK 0x3F80u
#define DCDC_REG1_POSLIMIT_BOOST_IN_SHIFT 7
#define DCDC_REG1_POSLIMIT_BOOST_IN_WIDTH 7
#define DCDC_REG1_POSLIMIT_BOOST_IN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG1_POSLIMIT_BOOST_IN_SHIFT))&DCDC_REG1_POSLIMIT_BOOST_IN_MASK)
#define DCDC_REG1_DCDC_LOOPCTRL_CM_HST_THRESH_MASK 0x200000u
#define DCDC_REG1_DCDC_LOOPCTRL_CM_HST_THRESH_SHIFT 21
#define DCDC_REG1_DCDC_LOOPCTRL_CM_HST_THRESH_WIDTH 1
#define DCDC_REG1_DCDC_LOOPCTRL_CM_HST_THRESH(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG1_DCDC_LOOPCTRL_CM_HST_THRESH_SHIFT))&DCDC_REG1_DCDC_LOOPCTRL_CM_HST_THRESH_MASK)
#define DCDC_REG1_DCDC_LOOPCTRL_DF_HST_THRESH_MASK 0x400000u
#define DCDC_REG1_DCDC_LOOPCTRL_DF_HST_THRESH_SHIFT 22
#define DCDC_REG1_DCDC_LOOPCTRL_DF_HST_THRESH_WIDTH 1
#define DCDC_REG1_DCDC_LOOPCTRL_DF_HST_THRESH(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG1_DCDC_LOOPCTRL_DF_HST_THRESH_SHIFT))&DCDC_REG1_DCDC_LOOPCTRL_DF_HST_THRESH_MASK)
#define DCDC_REG1_DCDC_LOOPCTRL_EN_CM_HYST_MASK 0x800000u
#define DCDC_REG1_DCDC_LOOPCTRL_EN_CM_HYST_SHIFT 23
#define DCDC_REG1_DCDC_LOOPCTRL_EN_CM_HYST_WIDTH 1
#define DCDC_REG1_DCDC_LOOPCTRL_EN_CM_HYST(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG1_DCDC_LOOPCTRL_EN_CM_HYST_SHIFT))&DCDC_REG1_DCDC_LOOPCTRL_EN_CM_HYST_MASK)
#define DCDC_REG1_DCDC_LOOPCTRL_EN_DF_HYST_MASK 0x1000000u
#define DCDC_REG1_DCDC_LOOPCTRL_EN_DF_HYST_SHIFT 24
#define DCDC_REG1_DCDC_LOOPCTRL_EN_DF_HYST_WIDTH 1
#define DCDC_REG1_DCDC_LOOPCTRL_EN_DF_HYST(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG1_DCDC_LOOPCTRL_EN_DF_HYST_SHIFT))&DCDC_REG1_DCDC_LOOPCTRL_EN_DF_HYST_MASK)
/* REG2 Bit Fields */
#define DCDC_REG2_DCDC_LOOPCTRL_DC_C_MASK 0x3u
#define DCDC_REG2_DCDC_LOOPCTRL_DC_C_SHIFT 0
#define DCDC_REG2_DCDC_LOOPCTRL_DC_C_WIDTH 2
#define DCDC_REG2_DCDC_LOOPCTRL_DC_C(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG2_DCDC_LOOPCTRL_DC_C_SHIFT))&DCDC_REG2_DCDC_LOOPCTRL_DC_C_MASK)
#define DCDC_REG2_DCDC_LOOPCTRL_DC_FF_MASK 0x1C0u
#define DCDC_REG2_DCDC_LOOPCTRL_DC_FF_SHIFT 6
#define DCDC_REG2_DCDC_LOOPCTRL_DC_FF_WIDTH 3
#define DCDC_REG2_DCDC_LOOPCTRL_DC_FF(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG2_DCDC_LOOPCTRL_DC_FF_SHIFT))&DCDC_REG2_DCDC_LOOPCTRL_DC_FF_MASK)
#define DCDC_REG2_DCDC_LOOPCTRL_HYST_SIGN_MASK 0x2000u
#define DCDC_REG2_DCDC_LOOPCTRL_HYST_SIGN_SHIFT 13
#define DCDC_REG2_DCDC_LOOPCTRL_HYST_SIGN_WIDTH 1
#define DCDC_REG2_DCDC_LOOPCTRL_HYST_SIGN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG2_DCDC_LOOPCTRL_HYST_SIGN_SHIFT))&DCDC_REG2_DCDC_LOOPCTRL_HYST_SIGN_MASK)
#define DCDC_REG2_DCDC_LOOPCTRL_TOGGLE_DIF_MASK 0x4000u
#define DCDC_REG2_DCDC_LOOPCTRL_TOGGLE_DIF_SHIFT 14
#define DCDC_REG2_DCDC_LOOPCTRL_TOGGLE_DIF_WIDTH 1
#define DCDC_REG2_DCDC_LOOPCTRL_TOGGLE_DIF(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG2_DCDC_LOOPCTRL_TOGGLE_DIF_SHIFT))&DCDC_REG2_DCDC_LOOPCTRL_TOGGLE_DIF_MASK)
#define DCDC_REG2_DCDC_BATTMONITOR_EN_BATADJ_MASK 0x8000u
#define DCDC_REG2_DCDC_BATTMONITOR_EN_BATADJ_SHIFT 15
#define DCDC_REG2_DCDC_BATTMONITOR_EN_BATADJ_WIDTH 1
#define DCDC_REG2_DCDC_BATTMONITOR_EN_BATADJ(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG2_DCDC_BATTMONITOR_EN_BATADJ_SHIFT))&DCDC_REG2_DCDC_BATTMONITOR_EN_BATADJ_MASK)
#define DCDC_REG2_DCDC_BATTMONITOR_BATT_VAL_MASK 0x3FF0000u
#define DCDC_REG2_DCDC_BATTMONITOR_BATT_VAL_SHIFT 16
#define DCDC_REG2_DCDC_BATTMONITOR_BATT_VAL_WIDTH 10
#define DCDC_REG2_DCDC_BATTMONITOR_BATT_VAL(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG2_DCDC_BATTMONITOR_BATT_VAL_SHIFT))&DCDC_REG2_DCDC_BATTMONITOR_BATT_VAL_MASK)
/* REG3 Bit Fields */
#define DCDC_REG3_DCDC_VDD1P8CTRL_TRG_MASK 0x3Fu
#define DCDC_REG3_DCDC_VDD1P8CTRL_TRG_SHIFT 0
#define DCDC_REG3_DCDC_VDD1P8CTRL_TRG_WIDTH 6
#define DCDC_REG3_DCDC_VDD1P8CTRL_TRG(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_VDD1P8CTRL_TRG_SHIFT))&DCDC_REG3_DCDC_VDD1P8CTRL_TRG_MASK)
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BUCK_MASK 0x7C0u
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BUCK_SHIFT 6
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BUCK_WIDTH 5
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BUCK(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BUCK_SHIFT))&DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BUCK_MASK)
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BOOST_MASK 0xF800u
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BOOST_SHIFT 11
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BOOST_WIDTH 5
#define DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BOOST(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BOOST_SHIFT))&DCDC_REG3_DCDC_VDD1P45CTRL_TRG_BOOST_MASK)
#define DCDC_REG3_DCDC_VDD1P45CTRL_ADJTN_MASK 0x1E0000u
#define DCDC_REG3_DCDC_VDD1P45CTRL_ADJTN_SHIFT 17
#define DCDC_REG3_DCDC_VDD1P45CTRL_ADJTN_WIDTH 4
#define DCDC_REG3_DCDC_VDD1P45CTRL_ADJTN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_VDD1P45CTRL_ADJTN_SHIFT))&DCDC_REG3_DCDC_VDD1P45CTRL_ADJTN_MASK)
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_LIMP_MASK 0x200000u
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_LIMP_SHIFT 21
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_LIMP_WIDTH 1
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_LIMP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_LIMP_SHIFT))&DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_LIMP_MASK)
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_LIMP_MASK 0x400000u
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_LIMP_SHIFT 22
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_LIMP_WIDTH 1
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_LIMP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_LIMP_SHIFT))&DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_LIMP_MASK)
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_LIMP_MASK 0x800000u
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_LIMP_SHIFT 23
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_LIMP_WIDTH 1
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_LIMP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_MINPWR_HALF_FETS_LIMP_SHIFT))&DCDC_REG3_DCDC_MINPWR_HALF_FETS_LIMP_MASK)
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_MASK 0x1000000u
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_SHIFT 24
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_WIDTH 1
#define DCDC_REG3_DCDC_MINPWR_DC_HALFCLK(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_SHIFT))&DCDC_REG3_DCDC_MINPWR_DC_HALFCLK_MASK)
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_MASK 0x2000000u
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_SHIFT 25
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_WIDTH 1
#define DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_SHIFT))&DCDC_REG3_DCDC_MINPWR_DOUBLE_FETS_MASK)
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_MASK 0x4000000u
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_SHIFT 26
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS_WIDTH 1
#define DCDC_REG3_DCDC_MINPWR_HALF_FETS(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_MINPWR_HALF_FETS_SHIFT))&DCDC_REG3_DCDC_MINPWR_HALF_FETS_MASK)
#define DCDC_REG3_DCDC_VDD1P45CTRL_DISABLE_STEP_MASK 0x20000000u
#define DCDC_REG3_DCDC_VDD1P45CTRL_DISABLE_STEP_SHIFT 29
#define DCDC_REG3_DCDC_VDD1P45CTRL_DISABLE_STEP_WIDTH 1
#define DCDC_REG3_DCDC_VDD1P45CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_VDD1P45CTRL_DISABLE_STEP_SHIFT))&DCDC_REG3_DCDC_VDD1P45CTRL_DISABLE_STEP_MASK)
#define DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP_MASK 0x40000000u
#define DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP_SHIFT 30
#define DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP_WIDTH 1
#define DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP_SHIFT))&DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP_MASK)
/* REG4 Bit Fields */
#define DCDC_REG4_DCDC_SW_SHUTDOWN_MASK 0x1u
#define DCDC_REG4_DCDC_SW_SHUTDOWN_SHIFT 0
#define DCDC_REG4_DCDC_SW_SHUTDOWN_WIDTH 1
#define DCDC_REG4_DCDC_SW_SHUTDOWN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG4_DCDC_SW_SHUTDOWN_SHIFT))&DCDC_REG4_DCDC_SW_SHUTDOWN_MASK)
#define DCDC_REG4_UNLOCK_MASK 0xFFFF0000u
#define DCDC_REG4_UNLOCK_SHIFT 16
#define DCDC_REG4_UNLOCK_WIDTH 16
#define DCDC_REG4_UNLOCK(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG4_UNLOCK_SHIFT))&DCDC_REG4_UNLOCK_MASK)
/* REG6 Bit Fields */
#define DCDC_REG6_PSWITCH_INT_RISE_EN_MASK 0x1u
#define DCDC_REG6_PSWITCH_INT_RISE_EN_SHIFT 0
#define DCDC_REG6_PSWITCH_INT_RISE_EN_WIDTH 1
#define DCDC_REG6_PSWITCH_INT_RISE_EN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG6_PSWITCH_INT_RISE_EN_SHIFT))&DCDC_REG6_PSWITCH_INT_RISE_EN_MASK)
#define DCDC_REG6_PSWITCH_INT_FALL_EN_MASK 0x2u
#define DCDC_REG6_PSWITCH_INT_FALL_EN_SHIFT 1
#define DCDC_REG6_PSWITCH_INT_FALL_EN_WIDTH 1
#define DCDC_REG6_PSWITCH_INT_FALL_EN(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG6_PSWITCH_INT_FALL_EN_SHIFT))&DCDC_REG6_PSWITCH_INT_FALL_EN_MASK)
#define DCDC_REG6_PSWITCH_INT_CLEAR_MASK 0x4u
#define DCDC_REG6_PSWITCH_INT_CLEAR_SHIFT 2
#define DCDC_REG6_PSWITCH_INT_CLEAR_WIDTH 1
#define DCDC_REG6_PSWITCH_INT_CLEAR(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG6_PSWITCH_INT_CLEAR_SHIFT))&DCDC_REG6_PSWITCH_INT_CLEAR_MASK)
#define DCDC_REG6_PSWITCH_INT_MUTE_MASK 0x8u
#define DCDC_REG6_PSWITCH_INT_MUTE_SHIFT 3
#define DCDC_REG6_PSWITCH_INT_MUTE_WIDTH 1
#define DCDC_REG6_PSWITCH_INT_MUTE(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG6_PSWITCH_INT_MUTE_SHIFT))&DCDC_REG6_PSWITCH_INT_MUTE_MASK)
#define DCDC_REG6_PSWITCH_INT_STS_MASK 0x80000000u
#define DCDC_REG6_PSWITCH_INT_STS_SHIFT 31
#define DCDC_REG6_PSWITCH_INT_STS_WIDTH 1
#define DCDC_REG6_PSWITCH_INT_STS(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG6_PSWITCH_INT_STS_SHIFT))&DCDC_REG6_PSWITCH_INT_STS_MASK)
/* REG7 Bit Fields */
#define DCDC_REG7_INTEGRATOR_VALUE_MASK 0x7FFFFu
#define DCDC_REG7_INTEGRATOR_VALUE_SHIFT 0
#define DCDC_REG7_INTEGRATOR_VALUE_WIDTH 19
#define DCDC_REG7_INTEGRATOR_VALUE(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG7_INTEGRATOR_VALUE_SHIFT))&DCDC_REG7_INTEGRATOR_VALUE_MASK)
#define DCDC_REG7_INTEGRATOR_VALUE_SEL_MASK 0x80000u
#define DCDC_REG7_INTEGRATOR_VALUE_SEL_SHIFT 19
#define DCDC_REG7_INTEGRATOR_VALUE_SEL_WIDTH 1
#define DCDC_REG7_INTEGRATOR_VALUE_SEL(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG7_INTEGRATOR_VALUE_SEL_SHIFT))&DCDC_REG7_INTEGRATOR_VALUE_SEL_MASK)
#define DCDC_REG7_PULSE_RUN_SPEEDUP_MASK 0x100000u
#define DCDC_REG7_PULSE_RUN_SPEEDUP_SHIFT 20
#define DCDC_REG7_PULSE_RUN_SPEEDUP_WIDTH 1
#define DCDC_REG7_PULSE_RUN_SPEEDUP(x) (((uint32_t)(((uint32_t)(x))<<DCDC_REG7_PULSE_RUN_SPEEDUP_SHIFT))&DCDC_REG7_PULSE_RUN_SPEEDUP_MASK)
/*!
* @}
*/ /* end of group DCDC_Register_Masks */
/* DCDC - Peripheral instance base addresses */
/** Peripheral DCDC base address */
#define DCDC_BASE (0x4005A000u)
/** Peripheral DCDC base pointer */
#define DCDC ((DCDC_Type *)DCDC_BASE)
#define DCDC_BASE_PTR (DCDC)
/** Array initializer of DCDC peripheral base addresses */
#define DCDC_BASE_ADDRS { DCDC_BASE }
/** Array initializer of DCDC peripheral base pointers */
#define DCDC_BASE_PTRS { DCDC }
/* ----------------------------------------------------------------------------
-- DCDC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DCDC_Register_Accessor_Macros DCDC - Register accessor macros
* @{
*/
/* DCDC - Register instance definitions */
/* DCDC */
#define DCDC_REG0 DCDC_REG0_REG(DCDC)
#define DCDC_REG1 DCDC_REG1_REG(DCDC)
#define DCDC_REG2 DCDC_REG2_REG(DCDC)
#define DCDC_REG3 DCDC_REG3_REG(DCDC)
#define DCDC_REG4 DCDC_REG4_REG(DCDC)
#define DCDC_REG6 DCDC_REG6_REG(DCDC)
#define DCDC_REG7 DCDC_REG7_REG(DCDC)
/*!
* @}
*/ /* end of group DCDC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group DCDC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- DMA Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMA_Peripheral_Access_Layer DMA Peripheral Access Layer
* @{
*/
/** DMA - Register Layout Typedef */
typedef struct {
uint8_t RESERVED_0[256];
struct { /* offset: 0x100, array step: 0x10 */
__IO uint32_t SAR; /**< Source Address Register, array offset: 0x100, array step: 0x10 */
__IO uint32_t DAR; /**< Destination Address Register, array offset: 0x104, array step: 0x10 */
union { /* offset: 0x108, array step: 0x10 */
__IO uint32_t DSR_BCR; /**< DMA Status Register / Byte Count Register, array offset: 0x108, array step: 0x10 */
struct { /* offset: 0x108, array step: 0x10 */
uint8_t RESERVED_0[3];
__IO uint8_t DSR; /**< DMA_DSR0 register...DMA_DSR3 register., array offset: 0x10B, array step: 0x10 */
} DMA_DSR_ACCESS8BIT;
};
__IO uint32_t DCR; /**< DMA Control Register, array offset: 0x10C, array step: 0x10 */
} DMA[4];
} DMA_Type, *DMA_MemMapPtr;
/* ----------------------------------------------------------------------------
-- DMA - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMA_Register_Accessor_Macros DMA - Register accessor macros
* @{
*/
/* DMA - Register accessors */
#define DMA_SAR_REG(base,index) ((base)->DMA[index].SAR)
#define DMA_SAR_COUNT 4
#define DMA_DAR_REG(base,index) ((base)->DMA[index].DAR)
#define DMA_DAR_COUNT 4
#define DMA_DSR_BCR_REG(base,index) ((base)->DMA[index].DSR_BCR)
#define DMA_DSR_BCR_COUNT 4
#define DMA_DSR_REG(base,index) ((base)->DMA[index].DMA_DSR_ACCESS8BIT.DSR)
#define DMA_DSR_COUNT 4
#define DMA_DCR_REG(base,index) ((base)->DMA[index].DCR)
#define DMA_DCR_COUNT 4
/*!
* @}
*/ /* end of group DMA_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- DMA Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMA_Register_Masks DMA Register Masks
* @{
*/
/* SAR Bit Fields */
#define DMA_SAR_SAR_MASK 0xFFFFFFFFu
#define DMA_SAR_SAR_SHIFT 0
#define DMA_SAR_SAR_WIDTH 32
#define DMA_SAR_SAR(x) (((uint32_t)(((uint32_t)(x))<<DMA_SAR_SAR_SHIFT))&DMA_SAR_SAR_MASK)
/* DAR Bit Fields */
#define DMA_DAR_DAR_MASK 0xFFFFFFFFu
#define DMA_DAR_DAR_SHIFT 0
#define DMA_DAR_DAR_WIDTH 32
#define DMA_DAR_DAR(x) (((uint32_t)(((uint32_t)(x))<<DMA_DAR_DAR_SHIFT))&DMA_DAR_DAR_MASK)
/* DSR_BCR Bit Fields */
#define DMA_DSR_BCR_BCR_MASK 0xFFFFFFu
#define DMA_DSR_BCR_BCR_SHIFT 0
#define DMA_DSR_BCR_BCR_WIDTH 24
#define DMA_DSR_BCR_BCR(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_BCR_SHIFT))&DMA_DSR_BCR_BCR_MASK)
#define DMA_DSR_BCR_DONE_MASK 0x1000000u
#define DMA_DSR_BCR_DONE_SHIFT 24
#define DMA_DSR_BCR_DONE_WIDTH 1
#define DMA_DSR_BCR_DONE(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_DONE_SHIFT))&DMA_DSR_BCR_DONE_MASK)
#define DMA_DSR_BCR_BSY_MASK 0x2000000u
#define DMA_DSR_BCR_BSY_SHIFT 25
#define DMA_DSR_BCR_BSY_WIDTH 1
#define DMA_DSR_BCR_BSY(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_BSY_SHIFT))&DMA_DSR_BCR_BSY_MASK)
#define DMA_DSR_BCR_REQ_MASK 0x4000000u
#define DMA_DSR_BCR_REQ_SHIFT 26
#define DMA_DSR_BCR_REQ_WIDTH 1
#define DMA_DSR_BCR_REQ(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_REQ_SHIFT))&DMA_DSR_BCR_REQ_MASK)
#define DMA_DSR_BCR_BED_MASK 0x10000000u
#define DMA_DSR_BCR_BED_SHIFT 28
#define DMA_DSR_BCR_BED_WIDTH 1
#define DMA_DSR_BCR_BED(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_BED_SHIFT))&DMA_DSR_BCR_BED_MASK)
#define DMA_DSR_BCR_BES_MASK 0x20000000u
#define DMA_DSR_BCR_BES_SHIFT 29
#define DMA_DSR_BCR_BES_WIDTH 1
#define DMA_DSR_BCR_BES(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_BES_SHIFT))&DMA_DSR_BCR_BES_MASK)
#define DMA_DSR_BCR_CE_MASK 0x40000000u
#define DMA_DSR_BCR_CE_SHIFT 30
#define DMA_DSR_BCR_CE_WIDTH 1
#define DMA_DSR_BCR_CE(x) (((uint32_t)(((uint32_t)(x))<<DMA_DSR_BCR_CE_SHIFT))&DMA_DSR_BCR_CE_MASK)
/* DCR Bit Fields */
#define DMA_DCR_LCH2_MASK 0x3u
#define DMA_DCR_LCH2_SHIFT 0
#define DMA_DCR_LCH2_WIDTH 2
#define DMA_DCR_LCH2(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_LCH2_SHIFT))&DMA_DCR_LCH2_MASK)
#define DMA_DCR_LCH1_MASK 0xCu
#define DMA_DCR_LCH1_SHIFT 2
#define DMA_DCR_LCH1_WIDTH 2
#define DMA_DCR_LCH1(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_LCH1_SHIFT))&DMA_DCR_LCH1_MASK)
#define DMA_DCR_LINKCC_MASK 0x30u
#define DMA_DCR_LINKCC_SHIFT 4
#define DMA_DCR_LINKCC_WIDTH 2
#define DMA_DCR_LINKCC(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_LINKCC_SHIFT))&DMA_DCR_LINKCC_MASK)
#define DMA_DCR_D_REQ_MASK 0x80u
#define DMA_DCR_D_REQ_SHIFT 7
#define DMA_DCR_D_REQ_WIDTH 1
#define DMA_DCR_D_REQ(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_D_REQ_SHIFT))&DMA_DCR_D_REQ_MASK)
#define DMA_DCR_DMOD_MASK 0xF00u
#define DMA_DCR_DMOD_SHIFT 8
#define DMA_DCR_DMOD_WIDTH 4
#define DMA_DCR_DMOD(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_DMOD_SHIFT))&DMA_DCR_DMOD_MASK)
#define DMA_DCR_SMOD_MASK 0xF000u
#define DMA_DCR_SMOD_SHIFT 12
#define DMA_DCR_SMOD_WIDTH 4
#define DMA_DCR_SMOD(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_SMOD_SHIFT))&DMA_DCR_SMOD_MASK)
#define DMA_DCR_START_MASK 0x10000u
#define DMA_DCR_START_SHIFT 16
#define DMA_DCR_START_WIDTH 1
#define DMA_DCR_START(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_START_SHIFT))&DMA_DCR_START_MASK)
#define DMA_DCR_DSIZE_MASK 0x60000u
#define DMA_DCR_DSIZE_SHIFT 17
#define DMA_DCR_DSIZE_WIDTH 2
#define DMA_DCR_DSIZE(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_DSIZE_SHIFT))&DMA_DCR_DSIZE_MASK)
#define DMA_DCR_DINC_MASK 0x80000u
#define DMA_DCR_DINC_SHIFT 19
#define DMA_DCR_DINC_WIDTH 1
#define DMA_DCR_DINC(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_DINC_SHIFT))&DMA_DCR_DINC_MASK)
#define DMA_DCR_SSIZE_MASK 0x300000u
#define DMA_DCR_SSIZE_SHIFT 20
#define DMA_DCR_SSIZE_WIDTH 2
#define DMA_DCR_SSIZE(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_SSIZE_SHIFT))&DMA_DCR_SSIZE_MASK)
#define DMA_DCR_SINC_MASK 0x400000u
#define DMA_DCR_SINC_SHIFT 22
#define DMA_DCR_SINC_WIDTH 1
#define DMA_DCR_SINC(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_SINC_SHIFT))&DMA_DCR_SINC_MASK)
#define DMA_DCR_EADREQ_MASK 0x800000u
#define DMA_DCR_EADREQ_SHIFT 23
#define DMA_DCR_EADREQ_WIDTH 1
#define DMA_DCR_EADREQ(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_EADREQ_SHIFT))&DMA_DCR_EADREQ_MASK)
#define DMA_DCR_AA_MASK 0x10000000u
#define DMA_DCR_AA_SHIFT 28
#define DMA_DCR_AA_WIDTH 1
#define DMA_DCR_AA(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_AA_SHIFT))&DMA_DCR_AA_MASK)
#define DMA_DCR_CS_MASK 0x20000000u
#define DMA_DCR_CS_SHIFT 29
#define DMA_DCR_CS_WIDTH 1
#define DMA_DCR_CS(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_CS_SHIFT))&DMA_DCR_CS_MASK)
#define DMA_DCR_ERQ_MASK 0x40000000u
#define DMA_DCR_ERQ_SHIFT 30
#define DMA_DCR_ERQ_WIDTH 1
#define DMA_DCR_ERQ(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_ERQ_SHIFT))&DMA_DCR_ERQ_MASK)
#define DMA_DCR_EINT_MASK 0x80000000u
#define DMA_DCR_EINT_SHIFT 31
#define DMA_DCR_EINT_WIDTH 1
#define DMA_DCR_EINT(x) (((uint32_t)(((uint32_t)(x))<<DMA_DCR_EINT_SHIFT))&DMA_DCR_EINT_MASK)
/*!
* @}
*/ /* end of group DMA_Register_Masks */
/* DMA - Peripheral instance base addresses */
/** Peripheral DMA base address */
#define DMA_BASE (0x40008000u)
/** Peripheral DMA base pointer */
#define DMA0 ((DMA_Type *)DMA_BASE)
#define DMA_BASE_PTR (DMA0)
/** Array initializer of DMA peripheral base addresses */
#define DMA_BASE_ADDRS { DMA_BASE }
/** Array initializer of DMA peripheral base pointers */
#define DMA_BASE_PTRS { DMA0 }
/** Interrupt vectors for the DMA peripheral type */
#define DMA_CHN_IRQS { DMA0_IRQn, DMA1_IRQn, DMA2_IRQn, DMA3_IRQn }
/* ----------------------------------------------------------------------------
-- DMA - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMA_Register_Accessor_Macros DMA - Register accessor macros
* @{
*/
/* DMA - Register instance definitions */
/* DMA */
#define DMA_SAR0 DMA_SAR_REG(DMA0,0)
#define DMA_DAR0 DMA_DAR_REG(DMA0,0)
#define DMA_DSR_BCR0 DMA_DSR_BCR_REG(DMA0,0)
#define DMA_DSR0 DMA_DSR_REG(DMA0,0)
#define DMA_DCR0 DMA_DCR_REG(DMA0,0)
#define DMA_SAR1 DMA_SAR_REG(DMA0,1)
#define DMA_DAR1 DMA_DAR_REG(DMA0,1)
#define DMA_DSR_BCR1 DMA_DSR_BCR_REG(DMA0,1)
#define DMA_DSR1 DMA_DSR_REG(DMA0,1)
#define DMA_DCR1 DMA_DCR_REG(DMA0,1)
#define DMA_SAR2 DMA_SAR_REG(DMA0,2)
#define DMA_DAR2 DMA_DAR_REG(DMA0,2)
#define DMA_DSR_BCR2 DMA_DSR_BCR_REG(DMA0,2)
#define DMA_DSR2 DMA_DSR_REG(DMA0,2)
#define DMA_DCR2 DMA_DCR_REG(DMA0,2)
#define DMA_SAR3 DMA_SAR_REG(DMA0,3)
#define DMA_DAR3 DMA_DAR_REG(DMA0,3)
#define DMA_DSR_BCR3 DMA_DSR_BCR_REG(DMA0,3)
#define DMA_DSR3 DMA_DSR_REG(DMA0,3)
#define DMA_DCR3 DMA_DCR_REG(DMA0,3)
/* DMA - Register array accessors */
#define DMA_SAR(index) DMA_SAR_REG(DMA0,index)
#define DMA_DAR(index) DMA_DAR_REG(DMA0,index)
#define DMA_DSR_BCR(index) DMA_DSR_BCR_REG(DMA0,index)
#define DMA_DSR(index) DMA_DSR_REG(DMA0,index)
#define DMA_DCR(index) DMA_DCR_REG(DMA0,index)
/*!
* @}
*/ /* end of group DMA_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group DMA_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- DMAMUX Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMAMUX_Peripheral_Access_Layer DMAMUX Peripheral Access Layer
* @{
*/
/** DMAMUX - Register Layout Typedef */
typedef struct {
__IO uint8_t CHCFG[4]; /**< Channel Configuration register, array offset: 0x0, array step: 0x1 */
} DMAMUX_Type, *DMAMUX_MemMapPtr;
/* ----------------------------------------------------------------------------
-- DMAMUX - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMAMUX_Register_Accessor_Macros DMAMUX - Register accessor macros
* @{
*/
/* DMAMUX - Register accessors */
#define DMAMUX_CHCFG_REG(base,index) ((base)->CHCFG[index])
#define DMAMUX_CHCFG_COUNT 4
/*!
* @}
*/ /* end of group DMAMUX_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- DMAMUX Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMAMUX_Register_Masks DMAMUX Register Masks
* @{
*/
/* CHCFG Bit Fields */
#define DMAMUX_CHCFG_SOURCE_MASK 0x3Fu
#define DMAMUX_CHCFG_SOURCE_SHIFT 0
#define DMAMUX_CHCFG_SOURCE_WIDTH 6
#define DMAMUX_CHCFG_SOURCE(x) (((uint8_t)(((uint8_t)(x))<<DMAMUX_CHCFG_SOURCE_SHIFT))&DMAMUX_CHCFG_SOURCE_MASK)
#define DMAMUX_CHCFG_TRIG_MASK 0x40u
#define DMAMUX_CHCFG_TRIG_SHIFT 6
#define DMAMUX_CHCFG_TRIG_WIDTH 1
#define DMAMUX_CHCFG_TRIG(x) (((uint8_t)(((uint8_t)(x))<<DMAMUX_CHCFG_TRIG_SHIFT))&DMAMUX_CHCFG_TRIG_MASK)
#define DMAMUX_CHCFG_ENBL_MASK 0x80u
#define DMAMUX_CHCFG_ENBL_SHIFT 7
#define DMAMUX_CHCFG_ENBL_WIDTH 1
#define DMAMUX_CHCFG_ENBL(x) (((uint8_t)(((uint8_t)(x))<<DMAMUX_CHCFG_ENBL_SHIFT))&DMAMUX_CHCFG_ENBL_MASK)
/*!
* @}
*/ /* end of group DMAMUX_Register_Masks */
/* DMAMUX - Peripheral instance base addresses */
/** Peripheral DMAMUX0 base address */
#define DMAMUX0_BASE (0x40021000u)
/** Peripheral DMAMUX0 base pointer */
#define DMAMUX0 ((DMAMUX_Type *)DMAMUX0_BASE)
#define DMAMUX0_BASE_PTR (DMAMUX0)
/** Array initializer of DMAMUX peripheral base addresses */
#define DMAMUX_BASE_ADDRS { DMAMUX0_BASE }
/** Array initializer of DMAMUX peripheral base pointers */
#define DMAMUX_BASE_PTRS { DMAMUX0 }
/* ----------------------------------------------------------------------------
-- DMAMUX - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup DMAMUX_Register_Accessor_Macros DMAMUX - Register accessor macros
* @{
*/
/* DMAMUX - Register instance definitions */
/* DMAMUX0 */
#define DMAMUX0_CHCFG0 DMAMUX_CHCFG_REG(DMAMUX0,0)
#define DMAMUX0_CHCFG1 DMAMUX_CHCFG_REG(DMAMUX0,1)
#define DMAMUX0_CHCFG2 DMAMUX_CHCFG_REG(DMAMUX0,2)
#define DMAMUX0_CHCFG3 DMAMUX_CHCFG_REG(DMAMUX0,3)
/* DMAMUX - Register array accessors */
#define DMAMUX0_CHCFG(index) DMAMUX_CHCFG_REG(DMAMUX0,index)
/*!
* @}
*/ /* end of group DMAMUX_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group DMAMUX_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- FGPIO Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup FGPIO_Peripheral_Access_Layer FGPIO Peripheral Access Layer
* @{
*/
/** FGPIO - Register Layout Typedef */
typedef struct {
__IO uint32_t PDOR; /**< Port Data Output Register, offset: 0x0 */
__O uint32_t PSOR; /**< Port Set Output Register, offset: 0x4 */
__O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */
__O uint32_t PTOR; /**< Port Toggle Output Register, offset: 0xC */
__I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */
__IO uint32_t PDDR; /**< Port Data Direction Register, offset: 0x14 */
} FGPIO_Type, *FGPIO_MemMapPtr;
/* ----------------------------------------------------------------------------
-- FGPIO - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup FGPIO_Register_Accessor_Macros FGPIO - Register accessor macros
* @{
*/
/* FGPIO - Register accessors */
#define FGPIO_PDOR_REG(base) ((base)->PDOR)
#define FGPIO_PSOR_REG(base) ((base)->PSOR)
#define FGPIO_PCOR_REG(base) ((base)->PCOR)
#define FGPIO_PTOR_REG(base) ((base)->PTOR)
#define FGPIO_PDIR_REG(base) ((base)->PDIR)
#define FGPIO_PDDR_REG(base) ((base)->PDDR)
/*!
* @}
*/ /* end of group FGPIO_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- FGPIO Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup FGPIO_Register_Masks FGPIO Register Masks
* @{
*/
/* PDOR Bit Fields */
#define FGPIO_PDOR_PDO_MASK 0xFFFFFFFFu
#define FGPIO_PDOR_PDO_SHIFT 0
#define FGPIO_PDOR_PDO_WIDTH 32
#define FGPIO_PDOR_PDO(x) (((uint32_t)(((uint32_t)(x))<<FGPIO_PDOR_PDO_SHIFT))&FGPIO_PDOR_PDO_MASK)
/* PSOR Bit Fields */
#define FGPIO_PSOR_PTSO_MASK 0xFFFFFFFFu
#define FGPIO_PSOR_PTSO_SHIFT 0
#define FGPIO_PSOR_PTSO_WIDTH 32
#define FGPIO_PSOR_PTSO(x) (((uint32_t)(((uint32_t)(x))<<FGPIO_PSOR_PTSO_SHIFT))&FGPIO_PSOR_PTSO_MASK)
/* PCOR Bit Fields */
#define FGPIO_PCOR_PTCO_MASK 0xFFFFFFFFu
#define FGPIO_PCOR_PTCO_SHIFT 0
#define FGPIO_PCOR_PTCO_WIDTH 32
#define FGPIO_PCOR_PTCO(x) (((uint32_t)(((uint32_t)(x))<<FGPIO_PCOR_PTCO_SHIFT))&FGPIO_PCOR_PTCO_MASK)
/* PTOR Bit Fields */
#define FGPIO_PTOR_PTTO_MASK 0xFFFFFFFFu
#define FGPIO_PTOR_PTTO_SHIFT 0
#define FGPIO_PTOR_PTTO_WIDTH 32
#define FGPIO_PTOR_PTTO(x) (((uint32_t)(((uint32_t)(x))<<FGPIO_PTOR_PTTO_SHIFT))&FGPIO_PTOR_PTTO_MASK)
/* PDIR Bit Fields */
#define FGPIO_PDIR_PDI_MASK 0xFFFFFFFFu
#define FGPIO_PDIR_PDI_SHIFT 0
#define FGPIO_PDIR_PDI_WIDTH 32
#define FGPIO_PDIR_PDI(x) (((uint32_t)(((uint32_t)(x))<<FGPIO_PDIR_PDI_SHIFT))&FGPIO_PDIR_PDI_MASK)
/* PDDR Bit Fields */
#define FGPIO_PDDR_PDD_MASK 0xFFFFFFFFu
#define FGPIO_PDDR_PDD_SHIFT 0
#define FGPIO_PDDR_PDD_WIDTH 32
#define FGPIO_PDDR_PDD(x) (((uint32_t)(((uint32_t)(x))<<FGPIO_PDDR_PDD_SHIFT))&FGPIO_PDDR_PDD_MASK)
/*!
* @}
*/ /* end of group FGPIO_Register_Masks */
/* FGPIO - Peripheral instance base addresses */
/** Peripheral FGPIOA base address */
#define FGPIOA_BASE (0xF8000000u)
/** Peripheral FGPIOA base pointer */
#define FGPIOA ((FGPIO_Type *)FGPIOA_BASE)
#define FGPIOA_BASE_PTR (FGPIOA)
/** Peripheral FGPIOB base address */
#define FGPIOB_BASE (0xF8000040u)
/** Peripheral FGPIOB base pointer */
#define FGPIOB ((FGPIO_Type *)FGPIOB_BASE)
#define FGPIOB_BASE_PTR (FGPIOB)
/** Peripheral FGPIOC base address */
#define FGPIOC_BASE (0xF8000080u)
/** Peripheral FGPIOC base pointer */
#define FGPIOC ((FGPIO_Type *)FGPIOC_BASE)
#define FGPIOC_BASE_PTR (FGPIOC)
/** Array initializer of FGPIO peripheral base addresses */
#define FGPIO_BASE_ADDRS { FGPIOA_BASE, FGPIOB_BASE, FGPIOC_BASE }
/** Array initializer of FGPIO peripheral base pointers */
#define FGPIO_BASE_PTRS { FGPIOA, FGPIOB, FGPIOC }
/* ----------------------------------------------------------------------------
-- FGPIO - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup FGPIO_Register_Accessor_Macros FGPIO - Register accessor macros
* @{
*/
/* FGPIO - Register instance definitions */
/* FGPIOA */
#define FGPIOA_PDOR FGPIO_PDOR_REG(FGPIOA)
#define FGPIOA_PSOR FGPIO_PSOR_REG(FGPIOA)
#define FGPIOA_PCOR FGPIO_PCOR_REG(FGPIOA)
#define FGPIOA_PTOR FGPIO_PTOR_REG(FGPIOA)
#define FGPIOA_PDIR FGPIO_PDIR_REG(FGPIOA)
#define FGPIOA_PDDR FGPIO_PDDR_REG(FGPIOA)
/* FGPIOB */
#define FGPIOB_PDOR FGPIO_PDOR_REG(FGPIOB)
#define FGPIOB_PSOR FGPIO_PSOR_REG(FGPIOB)
#define FGPIOB_PCOR FGPIO_PCOR_REG(FGPIOB)
#define FGPIOB_PTOR FGPIO_PTOR_REG(FGPIOB)
#define FGPIOB_PDIR FGPIO_PDIR_REG(FGPIOB)
#define FGPIOB_PDDR FGPIO_PDDR_REG(FGPIOB)
/* FGPIOC */
#define FGPIOC_PDOR FGPIO_PDOR_REG(FGPIOC)
#define FGPIOC_PSOR FGPIO_PSOR_REG(FGPIOC)
#define FGPIOC_PCOR FGPIO_PCOR_REG(FGPIOC)
#define FGPIOC_PTOR FGPIO_PTOR_REG(FGPIOC)
#define FGPIOC_PDIR FGPIO_PDIR_REG(FGPIOC)
#define FGPIOC_PDDR FGPIO_PDDR_REG(FGPIOC)
/*!
* @}
*/ /* end of group FGPIO_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group FGPIO_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- FTFA Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup FTFA_Peripheral_Access_Layer FTFA Peripheral Access Layer
* @{
*/
/** FTFA - Register Layout Typedef */
typedef struct {
__IO uint8_t FSTAT; /**< Flash Status Register, offset: 0x0 */
__IO uint8_t FCNFG; /**< Flash Configuration Register, offset: 0x1 */
__I uint8_t FSEC; /**< Flash Security Register, offset: 0x2 */
__I uint8_t FOPT; /**< Flash Option Register, offset: 0x3 */
__IO uint8_t FCCOB3; /**< Flash Common Command Object Registers, offset: 0x4 */
__IO uint8_t FCCOB2; /**< Flash Common Command Object Registers, offset: 0x5 */
__IO uint8_t FCCOB1; /**< Flash Common Command Object Registers, offset: 0x6 */
__IO uint8_t FCCOB0; /**< Flash Common Command Object Registers, offset: 0x7 */
__IO uint8_t FCCOB7; /**< Flash Common Command Object Registers, offset: 0x8 */
__IO uint8_t FCCOB6; /**< Flash Common Command Object Registers, offset: 0x9 */
__IO uint8_t FCCOB5; /**< Flash Common Command Object Registers, offset: 0xA */
__IO uint8_t FCCOB4; /**< Flash Common Command Object Registers, offset: 0xB */
__IO uint8_t FCCOBB; /**< Flash Common Command Object Registers, offset: 0xC */
__IO uint8_t FCCOBA; /**< Flash Common Command Object Registers, offset: 0xD */
__IO uint8_t FCCOB9; /**< Flash Common Command Object Registers, offset: 0xE */
__IO uint8_t FCCOB8; /**< Flash Common Command Object Registers, offset: 0xF */
__IO uint8_t FPROT3; /**< Program Flash Protection Registers, offset: 0x10 */
__IO uint8_t FPROT2; /**< Program Flash Protection Registers, offset: 0x11 */
__IO uint8_t FPROT1; /**< Program Flash Protection Registers, offset: 0x12 */
__IO uint8_t FPROT0; /**< Program Flash Protection Registers, offset: 0x13 */
uint8_t RESERVED_0[4];
__I uint8_t XACCH3; /**< Execute-only Access Registers, offset: 0x18 */
__I uint8_t XACCH2; /**< Execute-only Access Registers, offset: 0x19 */
__I uint8_t XACCH1; /**< Execute-only Access Registers, offset: 0x1A */
__I uint8_t XACCH0; /**< Execute-only Access Registers, offset: 0x1B */
__I uint8_t XACCL3; /**< Execute-only Access Registers, offset: 0x1C */
__I uint8_t XACCL2; /**< Execute-only Access Registers, offset: 0x1D */
__I uint8_t XACCL1; /**< Execute-only Access Registers, offset: 0x1E */
__I uint8_t XACCL0; /**< Execute-only Access Registers, offset: 0x1F */
__I uint8_t SACCH3; /**< Supervisor-only Access Registers, offset: 0x20 */
__I uint8_t SACCH2; /**< Supervisor-only Access Registers, offset: 0x21 */
__I uint8_t SACCH1; /**< Supervisor-only Access Registers, offset: 0x22 */
__I uint8_t SACCH0; /**< Supervisor-only Access Registers, offset: 0x23 */
__I uint8_t SACCL3; /**< Supervisor-only Access Registers, offset: 0x24 */
__I uint8_t SACCL2; /**< Supervisor-only Access Registers, offset: 0x25 */
__I uint8_t SACCL1; /**< Supervisor-only Access Registers, offset: 0x26 */
__I uint8_t SACCL0; /**< Supervisor-only Access Registers, offset: 0x27 */
__I uint8_t FACSS; /**< Flash Access Segment Size Register, offset: 0x28 */
uint8_t RESERVED_1[2];
__I uint8_t FACSN; /**< Flash Access Segment Number Register, offset: 0x2B */
} FTFA_Type, *FTFA_MemMapPtr;
/* ----------------------------------------------------------------------------
-- FTFA - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup FTFA_Register_Accessor_Macros FTFA - Register accessor macros
* @{
*/
/* FTFA - Register accessors */
#define FTFA_FSTAT_REG(base) ((base)->FSTAT)
#define FTFA_FCNFG_REG(base) ((base)->FCNFG)
#define FTFA_FSEC_REG(base) ((base)->FSEC)
#define FTFA_FOPT_REG(base) ((base)->FOPT)
#define FTFA_FCCOB3_REG(base) ((base)->FCCOB3)
#define FTFA_FCCOB2_REG(base) ((base)->FCCOB2)
#define FTFA_FCCOB1_REG(base) ((base)->FCCOB1)
#define FTFA_FCCOB0_REG(base) ((base)->FCCOB0)
#define FTFA_FCCOB7_REG(base) ((base)->FCCOB7)
#define FTFA_FCCOB6_REG(base) ((base)->FCCOB6)
#define FTFA_FCCOB5_REG(base) ((base)->FCCOB5)
#define FTFA_FCCOB4_REG(base) ((base)->FCCOB4)
#define FTFA_FCCOBB_REG(base) ((base)->FCCOBB)
#define FTFA_FCCOBA_REG(base) ((base)->FCCOBA)
#define FTFA_FCCOB9_REG(base) ((base)->FCCOB9)
#define FTFA_FCCOB8_REG(base) ((base)->FCCOB8)
#define FTFA_FPROT3_REG(base) ((base)->FPROT3)
#define FTFA_FPROT2_REG(base) ((base)->FPROT2)
#define FTFA_FPROT1_REG(base) ((base)->FPROT1)
#define FTFA_FPROT0_REG(base) ((base)->FPROT0)
#define FTFA_XACCH3_REG(base) ((base)->XACCH3)
#define FTFA_XACCH2_REG(base) ((base)->XACCH2)
#define FTFA_XACCH1_REG(base) ((base)->XACCH1)
#define FTFA_XACCH0_REG(base) ((base)->XACCH0)
#define FTFA_XACCL3_REG(base) ((base)->XACCL3)
#define FTFA_XACCL2_REG(base) ((base)->XACCL2)
#define FTFA_XACCL1_REG(base) ((base)->XACCL1)
#define FTFA_XACCL0_REG(base) ((base)->XACCL0)
#define FTFA_SACCH3_REG(base) ((base)->SACCH3)
#define FTFA_SACCH2_REG(base) ((base)->SACCH2)
#define FTFA_SACCH1_REG(base) ((base)->SACCH1)
#define FTFA_SACCH0_REG(base) ((base)->SACCH0)
#define FTFA_SACCL3_REG(base) ((base)->SACCL3)
#define FTFA_SACCL2_REG(base) ((base)->SACCL2)
#define FTFA_SACCL1_REG(base) ((base)->SACCL1)
#define FTFA_SACCL0_REG(base) ((base)->SACCL0)
#define FTFA_FACSS_REG(base) ((base)->FACSS)
#define FTFA_FACSN_REG(base) ((base)->FACSN)
/*!
* @}
*/ /* end of group FTFA_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- FTFA Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup FTFA_Register_Masks FTFA Register Masks
* @{
*/
/* FSTAT Bit Fields */
#define FTFA_FSTAT_MGSTAT0_MASK 0x1u
#define FTFA_FSTAT_MGSTAT0_SHIFT 0
#define FTFA_FSTAT_MGSTAT0_WIDTH 1
#define FTFA_FSTAT_MGSTAT0(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_MGSTAT0_SHIFT))&FTFA_FSTAT_MGSTAT0_MASK)
#define FTFA_FSTAT_FPVIOL_MASK 0x10u
#define FTFA_FSTAT_FPVIOL_SHIFT 4
#define FTFA_FSTAT_FPVIOL_WIDTH 1
#define FTFA_FSTAT_FPVIOL(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_FPVIOL_SHIFT))&FTFA_FSTAT_FPVIOL_MASK)
#define FTFA_FSTAT_ACCERR_MASK 0x20u
#define FTFA_FSTAT_ACCERR_SHIFT 5
#define FTFA_FSTAT_ACCERR_WIDTH 1
#define FTFA_FSTAT_ACCERR(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_ACCERR_SHIFT))&FTFA_FSTAT_ACCERR_MASK)
#define FTFA_FSTAT_RDCOLERR_MASK 0x40u
#define FTFA_FSTAT_RDCOLERR_SHIFT 6
#define FTFA_FSTAT_RDCOLERR_WIDTH 1
#define FTFA_FSTAT_RDCOLERR(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_RDCOLERR_SHIFT))&FTFA_FSTAT_RDCOLERR_MASK)
#define FTFA_FSTAT_CCIF_MASK 0x80u
#define FTFA_FSTAT_CCIF_SHIFT 7
#define FTFA_FSTAT_CCIF_WIDTH 1
#define FTFA_FSTAT_CCIF(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSTAT_CCIF_SHIFT))&FTFA_FSTAT_CCIF_MASK)
/* FCNFG Bit Fields */
#define FTFA_FCNFG_ERSSUSP_MASK 0x10u
#define FTFA_FCNFG_ERSSUSP_SHIFT 4
#define FTFA_FCNFG_ERSSUSP_WIDTH 1
#define FTFA_FCNFG_ERSSUSP(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCNFG_ERSSUSP_SHIFT))&FTFA_FCNFG_ERSSUSP_MASK)
#define FTFA_FCNFG_ERSAREQ_MASK 0x20u
#define FTFA_FCNFG_ERSAREQ_SHIFT 5
#define FTFA_FCNFG_ERSAREQ_WIDTH 1
#define FTFA_FCNFG_ERSAREQ(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCNFG_ERSAREQ_SHIFT))&FTFA_FCNFG_ERSAREQ_MASK)
#define FTFA_FCNFG_RDCOLLIE_MASK 0x40u
#define FTFA_FCNFG_RDCOLLIE_SHIFT 6
#define FTFA_FCNFG_RDCOLLIE_WIDTH 1
#define FTFA_FCNFG_RDCOLLIE(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCNFG_RDCOLLIE_SHIFT))&FTFA_FCNFG_RDCOLLIE_MASK)
#define FTFA_FCNFG_CCIE_MASK 0x80u
#define FTFA_FCNFG_CCIE_SHIFT 7
#define FTFA_FCNFG_CCIE_WIDTH 1
#define FTFA_FCNFG_CCIE(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCNFG_CCIE_SHIFT))&FTFA_FCNFG_CCIE_MASK)
/* FSEC Bit Fields */
#define FTFA_FSEC_SEC_MASK 0x3u
#define FTFA_FSEC_SEC_SHIFT 0
#define FTFA_FSEC_SEC_WIDTH 2
#define FTFA_FSEC_SEC(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSEC_SEC_SHIFT))&FTFA_FSEC_SEC_MASK)
#define FTFA_FSEC_FSLACC_MASK 0xCu
#define FTFA_FSEC_FSLACC_SHIFT 2
#define FTFA_FSEC_FSLACC_WIDTH 2
#define FTFA_FSEC_FSLACC(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSEC_FSLACC_SHIFT))&FTFA_FSEC_FSLACC_MASK)
#define FTFA_FSEC_MEEN_MASK 0x30u
#define FTFA_FSEC_MEEN_SHIFT 4
#define FTFA_FSEC_MEEN_WIDTH 2
#define FTFA_FSEC_MEEN(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSEC_MEEN_SHIFT))&FTFA_FSEC_MEEN_MASK)
#define FTFA_FSEC_KEYEN_MASK 0xC0u
#define FTFA_FSEC_KEYEN_SHIFT 6
#define FTFA_FSEC_KEYEN_WIDTH 2
#define FTFA_FSEC_KEYEN(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FSEC_KEYEN_SHIFT))&FTFA_FSEC_KEYEN_MASK)
/* FOPT Bit Fields */
#define FTFA_FOPT_OPT_MASK 0xFFu
#define FTFA_FOPT_OPT_SHIFT 0
#define FTFA_FOPT_OPT_WIDTH 8
#define FTFA_FOPT_OPT(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FOPT_OPT_SHIFT))&FTFA_FOPT_OPT_MASK)
/* FCCOB3 Bit Fields */
#define FTFA_FCCOB3_CCOBn_MASK 0xFFu
#define FTFA_FCCOB3_CCOBn_SHIFT 0
#define FTFA_FCCOB3_CCOBn_WIDTH 8
#define FTFA_FCCOB3_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB3_CCOBn_SHIFT))&FTFA_FCCOB3_CCOBn_MASK)
/* FCCOB2 Bit Fields */
#define FTFA_FCCOB2_CCOBn_MASK 0xFFu
#define FTFA_FCCOB2_CCOBn_SHIFT 0
#define FTFA_FCCOB2_CCOBn_WIDTH 8
#define FTFA_FCCOB2_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB2_CCOBn_SHIFT))&FTFA_FCCOB2_CCOBn_MASK)
/* FCCOB1 Bit Fields */
#define FTFA_FCCOB1_CCOBn_MASK 0xFFu
#define FTFA_FCCOB1_CCOBn_SHIFT 0
#define FTFA_FCCOB1_CCOBn_WIDTH 8
#define FTFA_FCCOB1_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB1_CCOBn_SHIFT))&FTFA_FCCOB1_CCOBn_MASK)
/* FCCOB0 Bit Fields */
#define FTFA_FCCOB0_CCOBn_MASK 0xFFu
#define FTFA_FCCOB0_CCOBn_SHIFT 0
#define FTFA_FCCOB0_CCOBn_WIDTH 8
#define FTFA_FCCOB0_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB0_CCOBn_SHIFT))&FTFA_FCCOB0_CCOBn_MASK)
/* FCCOB7 Bit Fields */
#define FTFA_FCCOB7_CCOBn_MASK 0xFFu
#define FTFA_FCCOB7_CCOBn_SHIFT 0
#define FTFA_FCCOB7_CCOBn_WIDTH 8
#define FTFA_FCCOB7_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB7_CCOBn_SHIFT))&FTFA_FCCOB7_CCOBn_MASK)
/* FCCOB6 Bit Fields */
#define FTFA_FCCOB6_CCOBn_MASK 0xFFu
#define FTFA_FCCOB6_CCOBn_SHIFT 0
#define FTFA_FCCOB6_CCOBn_WIDTH 8
#define FTFA_FCCOB6_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB6_CCOBn_SHIFT))&FTFA_FCCOB6_CCOBn_MASK)
/* FCCOB5 Bit Fields */
#define FTFA_FCCOB5_CCOBn_MASK 0xFFu
#define FTFA_FCCOB5_CCOBn_SHIFT 0
#define FTFA_FCCOB5_CCOBn_WIDTH 8
#define FTFA_FCCOB5_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB5_CCOBn_SHIFT))&FTFA_FCCOB5_CCOBn_MASK)
/* FCCOB4 Bit Fields */
#define FTFA_FCCOB4_CCOBn_MASK 0xFFu
#define FTFA_FCCOB4_CCOBn_SHIFT 0
#define FTFA_FCCOB4_CCOBn_WIDTH 8
#define FTFA_FCCOB4_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB4_CCOBn_SHIFT))&FTFA_FCCOB4_CCOBn_MASK)
/* FCCOBB Bit Fields */
#define FTFA_FCCOBB_CCOBn_MASK 0xFFu
#define FTFA_FCCOBB_CCOBn_SHIFT 0
#define FTFA_FCCOBB_CCOBn_WIDTH 8
#define FTFA_FCCOBB_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOBB_CCOBn_SHIFT))&FTFA_FCCOBB_CCOBn_MASK)
/* FCCOBA Bit Fields */
#define FTFA_FCCOBA_CCOBn_MASK 0xFFu
#define FTFA_FCCOBA_CCOBn_SHIFT 0
#define FTFA_FCCOBA_CCOBn_WIDTH 8
#define FTFA_FCCOBA_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOBA_CCOBn_SHIFT))&FTFA_FCCOBA_CCOBn_MASK)
/* FCCOB9 Bit Fields */
#define FTFA_FCCOB9_CCOBn_MASK 0xFFu
#define FTFA_FCCOB9_CCOBn_SHIFT 0
#define FTFA_FCCOB9_CCOBn_WIDTH 8
#define FTFA_FCCOB9_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB9_CCOBn_SHIFT))&FTFA_FCCOB9_CCOBn_MASK)
/* FCCOB8 Bit Fields */
#define FTFA_FCCOB8_CCOBn_MASK 0xFFu
#define FTFA_FCCOB8_CCOBn_SHIFT 0
#define FTFA_FCCOB8_CCOBn_WIDTH 8
#define FTFA_FCCOB8_CCOBn(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FCCOB8_CCOBn_SHIFT))&FTFA_FCCOB8_CCOBn_MASK)
/* FPROT3 Bit Fields */
#define FTFA_FPROT3_PROT_MASK 0xFFu
#define FTFA_FPROT3_PROT_SHIFT 0
#define FTFA_FPROT3_PROT_WIDTH 8
#define FTFA_FPROT3_PROT(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FPROT3_PROT_SHIFT))&FTFA_FPROT3_PROT_MASK)
/* FPROT2 Bit Fields */
#define FTFA_FPROT2_PROT_MASK 0xFFu
#define FTFA_FPROT2_PROT_SHIFT 0
#define FTFA_FPROT2_PROT_WIDTH 8
#define FTFA_FPROT2_PROT(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FPROT2_PROT_SHIFT))&FTFA_FPROT2_PROT_MASK)
/* FPROT1 Bit Fields */
#define FTFA_FPROT1_PROT_MASK 0xFFu
#define FTFA_FPROT1_PROT_SHIFT 0
#define FTFA_FPROT1_PROT_WIDTH 8
#define FTFA_FPROT1_PROT(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FPROT1_PROT_SHIFT))&FTFA_FPROT1_PROT_MASK)
/* FPROT0 Bit Fields */
#define FTFA_FPROT0_PROT_MASK 0xFFu
#define FTFA_FPROT0_PROT_SHIFT 0
#define FTFA_FPROT0_PROT_WIDTH 8
#define FTFA_FPROT0_PROT(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FPROT0_PROT_SHIFT))&FTFA_FPROT0_PROT_MASK)
/* XACCH3 Bit Fields */
#define FTFA_XACCH3_XA_MASK 0xFFu
#define FTFA_XACCH3_XA_SHIFT 0
#define FTFA_XACCH3_XA_WIDTH 8
#define FTFA_XACCH3_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCH3_XA_SHIFT))&FTFA_XACCH3_XA_MASK)
/* XACCH2 Bit Fields */
#define FTFA_XACCH2_XA_MASK 0xFFu
#define FTFA_XACCH2_XA_SHIFT 0
#define FTFA_XACCH2_XA_WIDTH 8
#define FTFA_XACCH2_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCH2_XA_SHIFT))&FTFA_XACCH2_XA_MASK)
/* XACCH1 Bit Fields */
#define FTFA_XACCH1_XA_MASK 0xFFu
#define FTFA_XACCH1_XA_SHIFT 0
#define FTFA_XACCH1_XA_WIDTH 8
#define FTFA_XACCH1_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCH1_XA_SHIFT))&FTFA_XACCH1_XA_MASK)
/* XACCH0 Bit Fields */
#define FTFA_XACCH0_XA_MASK 0xFFu
#define FTFA_XACCH0_XA_SHIFT 0
#define FTFA_XACCH0_XA_WIDTH 8
#define FTFA_XACCH0_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCH0_XA_SHIFT))&FTFA_XACCH0_XA_MASK)
/* XACCL3 Bit Fields */
#define FTFA_XACCL3_XA_MASK 0xFFu
#define FTFA_XACCL3_XA_SHIFT 0
#define FTFA_XACCL3_XA_WIDTH 8
#define FTFA_XACCL3_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCL3_XA_SHIFT))&FTFA_XACCL3_XA_MASK)
/* XACCL2 Bit Fields */
#define FTFA_XACCL2_XA_MASK 0xFFu
#define FTFA_XACCL2_XA_SHIFT 0
#define FTFA_XACCL2_XA_WIDTH 8
#define FTFA_XACCL2_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCL2_XA_SHIFT))&FTFA_XACCL2_XA_MASK)
/* XACCL1 Bit Fields */
#define FTFA_XACCL1_XA_MASK 0xFFu
#define FTFA_XACCL1_XA_SHIFT 0
#define FTFA_XACCL1_XA_WIDTH 8
#define FTFA_XACCL1_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCL1_XA_SHIFT))&FTFA_XACCL1_XA_MASK)
/* XACCL0 Bit Fields */
#define FTFA_XACCL0_XA_MASK 0xFFu
#define FTFA_XACCL0_XA_SHIFT 0
#define FTFA_XACCL0_XA_WIDTH 8
#define FTFA_XACCL0_XA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_XACCL0_XA_SHIFT))&FTFA_XACCL0_XA_MASK)
/* SACCH3 Bit Fields */
#define FTFA_SACCH3_SA_MASK 0xFFu
#define FTFA_SACCH3_SA_SHIFT 0
#define FTFA_SACCH3_SA_WIDTH 8
#define FTFA_SACCH3_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCH3_SA_SHIFT))&FTFA_SACCH3_SA_MASK)
/* SACCH2 Bit Fields */
#define FTFA_SACCH2_SA_MASK 0xFFu
#define FTFA_SACCH2_SA_SHIFT 0
#define FTFA_SACCH2_SA_WIDTH 8
#define FTFA_SACCH2_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCH2_SA_SHIFT))&FTFA_SACCH2_SA_MASK)
/* SACCH1 Bit Fields */
#define FTFA_SACCH1_SA_MASK 0xFFu
#define FTFA_SACCH1_SA_SHIFT 0
#define FTFA_SACCH1_SA_WIDTH 8
#define FTFA_SACCH1_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCH1_SA_SHIFT))&FTFA_SACCH1_SA_MASK)
/* SACCH0 Bit Fields */
#define FTFA_SACCH0_SA_MASK 0xFFu
#define FTFA_SACCH0_SA_SHIFT 0
#define FTFA_SACCH0_SA_WIDTH 8
#define FTFA_SACCH0_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCH0_SA_SHIFT))&FTFA_SACCH0_SA_MASK)
/* SACCL3 Bit Fields */
#define FTFA_SACCL3_SA_MASK 0xFFu
#define FTFA_SACCL3_SA_SHIFT 0
#define FTFA_SACCL3_SA_WIDTH 8
#define FTFA_SACCL3_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCL3_SA_SHIFT))&FTFA_SACCL3_SA_MASK)
/* SACCL2 Bit Fields */
#define FTFA_SACCL2_SA_MASK 0xFFu
#define FTFA_SACCL2_SA_SHIFT 0
#define FTFA_SACCL2_SA_WIDTH 8
#define FTFA_SACCL2_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCL2_SA_SHIFT))&FTFA_SACCL2_SA_MASK)
/* SACCL1 Bit Fields */
#define FTFA_SACCL1_SA_MASK 0xFFu
#define FTFA_SACCL1_SA_SHIFT 0
#define FTFA_SACCL1_SA_WIDTH 8
#define FTFA_SACCL1_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCL1_SA_SHIFT))&FTFA_SACCL1_SA_MASK)
/* SACCL0 Bit Fields */
#define FTFA_SACCL0_SA_MASK 0xFFu
#define FTFA_SACCL0_SA_SHIFT 0
#define FTFA_SACCL0_SA_WIDTH 8
#define FTFA_SACCL0_SA(x) (((uint8_t)(((uint8_t)(x))<<FTFA_SACCL0_SA_SHIFT))&FTFA_SACCL0_SA_MASK)
/* FACSS Bit Fields */
#define FTFA_FACSS_SGSIZE_MASK 0xFFu
#define FTFA_FACSS_SGSIZE_SHIFT 0
#define FTFA_FACSS_SGSIZE_WIDTH 8
#define FTFA_FACSS_SGSIZE(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FACSS_SGSIZE_SHIFT))&FTFA_FACSS_SGSIZE_MASK)
/* FACSN Bit Fields */
#define FTFA_FACSN_NUMSG_MASK 0xFFu
#define FTFA_FACSN_NUMSG_SHIFT 0
#define FTFA_FACSN_NUMSG_WIDTH 8
#define FTFA_FACSN_NUMSG(x) (((uint8_t)(((uint8_t)(x))<<FTFA_FACSN_NUMSG_SHIFT))&FTFA_FACSN_NUMSG_MASK)
/*!
* @}
*/ /* end of group FTFA_Register_Masks */
/* FTFA - Peripheral instance base addresses */
/** Peripheral FTFA base address */
#define FTFA_BASE (0x40020000u)
/** Peripheral FTFA base pointer */
#define FTFA ((FTFA_Type *)FTFA_BASE)
#define FTFA_BASE_PTR (FTFA)
/** Array initializer of FTFA peripheral base addresses */
#define FTFA_BASE_ADDRS { FTFA_BASE }
/** Array initializer of FTFA peripheral base pointers */
#define FTFA_BASE_PTRS { FTFA }
/** Interrupt vectors for the FTFA peripheral type */
#define FTFA_COMMAND_COMPLETE_IRQS { FTFA_IRQn }
/* ----------------------------------------------------------------------------
-- FTFA - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup FTFA_Register_Accessor_Macros FTFA - Register accessor macros
* @{
*/
/* FTFA - Register instance definitions */
/* FTFA */
#define FTFA_FSTAT FTFA_FSTAT_REG(FTFA)
#define FTFA_FCNFG FTFA_FCNFG_REG(FTFA)
#define FTFA_FSEC FTFA_FSEC_REG(FTFA)
#define FTFA_FOPT FTFA_FOPT_REG(FTFA)
#define FTFA_FCCOB3 FTFA_FCCOB3_REG(FTFA)
#define FTFA_FCCOB2 FTFA_FCCOB2_REG(FTFA)
#define FTFA_FCCOB1 FTFA_FCCOB1_REG(FTFA)
#define FTFA_FCCOB0 FTFA_FCCOB0_REG(FTFA)
#define FTFA_FCCOB7 FTFA_FCCOB7_REG(FTFA)
#define FTFA_FCCOB6 FTFA_FCCOB6_REG(FTFA)
#define FTFA_FCCOB5 FTFA_FCCOB5_REG(FTFA)
#define FTFA_FCCOB4 FTFA_FCCOB4_REG(FTFA)
#define FTFA_FCCOBB FTFA_FCCOBB_REG(FTFA)
#define FTFA_FCCOBA FTFA_FCCOBA_REG(FTFA)
#define FTFA_FCCOB9 FTFA_FCCOB9_REG(FTFA)
#define FTFA_FCCOB8 FTFA_FCCOB8_REG(FTFA)
#define FTFA_FPROT3 FTFA_FPROT3_REG(FTFA)
#define FTFA_FPROT2 FTFA_FPROT2_REG(FTFA)
#define FTFA_FPROT1 FTFA_FPROT1_REG(FTFA)
#define FTFA_FPROT0 FTFA_FPROT0_REG(FTFA)
#define FTFA_XACCH3 FTFA_XACCH3_REG(FTFA)
#define FTFA_XACCH2 FTFA_XACCH2_REG(FTFA)
#define FTFA_XACCH1 FTFA_XACCH1_REG(FTFA)
#define FTFA_XACCH0 FTFA_XACCH0_REG(FTFA)
#define FTFA_XACCL3 FTFA_XACCL3_REG(FTFA)
#define FTFA_XACCL2 FTFA_XACCL2_REG(FTFA)
#define FTFA_XACCL1 FTFA_XACCL1_REG(FTFA)
#define FTFA_XACCL0 FTFA_XACCL0_REG(FTFA)
#define FTFA_SACCH3 FTFA_SACCH3_REG(FTFA)
#define FTFA_SACCH2 FTFA_SACCH2_REG(FTFA)
#define FTFA_SACCH1 FTFA_SACCH1_REG(FTFA)
#define FTFA_SACCH0 FTFA_SACCH0_REG(FTFA)
#define FTFA_SACCL3 FTFA_SACCL3_REG(FTFA)
#define FTFA_SACCL2 FTFA_SACCL2_REG(FTFA)
#define FTFA_SACCL1 FTFA_SACCL1_REG(FTFA)
#define FTFA_SACCL0 FTFA_SACCL0_REG(FTFA)
#define FTFA_FACSS FTFA_FACSS_REG(FTFA)
#define FTFA_FACSN FTFA_FACSN_REG(FTFA)
/*!
* @}
*/ /* end of group FTFA_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group FTFA_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- GPIO Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup GPIO_Peripheral_Access_Layer GPIO Peripheral Access Layer
* @{
*/
/** GPIO - Register Layout Typedef */
typedef struct {
__IO uint32_t PDOR; /**< Port Data Output Register, offset: 0x0 */
__O uint32_t PSOR; /**< Port Set Output Register, offset: 0x4 */
__O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */
__O uint32_t PTOR; /**< Port Toggle Output Register, offset: 0xC */
__I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */
__IO uint32_t PDDR; /**< Port Data Direction Register, offset: 0x14 */
} GPIO_Type, *GPIO_MemMapPtr;
/* ----------------------------------------------------------------------------
-- GPIO - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup GPIO_Register_Accessor_Macros GPIO - Register accessor macros
* @{
*/
/* GPIO - Register accessors */
#define GPIO_PDOR_REG(base) ((base)->PDOR)
#define GPIO_PSOR_REG(base) ((base)->PSOR)
#define GPIO_PCOR_REG(base) ((base)->PCOR)
#define GPIO_PTOR_REG(base) ((base)->PTOR)
#define GPIO_PDIR_REG(base) ((base)->PDIR)
#define GPIO_PDDR_REG(base) ((base)->PDDR)
/*!
* @}
*/ /* end of group GPIO_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- GPIO Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup GPIO_Register_Masks GPIO Register Masks
* @{
*/
/* PDOR Bit Fields */
#define GPIO_PDOR_PDO_MASK 0xFFFFFFFFu
#define GPIO_PDOR_PDO_SHIFT 0
#define GPIO_PDOR_PDO_WIDTH 32
#define GPIO_PDOR_PDO(x) (((uint32_t)(((uint32_t)(x))<<GPIO_PDOR_PDO_SHIFT))&GPIO_PDOR_PDO_MASK)
/* PSOR Bit Fields */
#define GPIO_PSOR_PTSO_MASK 0xFFFFFFFFu
#define GPIO_PSOR_PTSO_SHIFT 0
#define GPIO_PSOR_PTSO_WIDTH 32
#define GPIO_PSOR_PTSO(x) (((uint32_t)(((uint32_t)(x))<<GPIO_PSOR_PTSO_SHIFT))&GPIO_PSOR_PTSO_MASK)
/* PCOR Bit Fields */
#define GPIO_PCOR_PTCO_MASK 0xFFFFFFFFu
#define GPIO_PCOR_PTCO_SHIFT 0
#define GPIO_PCOR_PTCO_WIDTH 32
#define GPIO_PCOR_PTCO(x) (((uint32_t)(((uint32_t)(x))<<GPIO_PCOR_PTCO_SHIFT))&GPIO_PCOR_PTCO_MASK)
/* PTOR Bit Fields */
#define GPIO_PTOR_PTTO_MASK 0xFFFFFFFFu
#define GPIO_PTOR_PTTO_SHIFT 0
#define GPIO_PTOR_PTTO_WIDTH 32
#define GPIO_PTOR_PTTO(x) (((uint32_t)(((uint32_t)(x))<<GPIO_PTOR_PTTO_SHIFT))&GPIO_PTOR_PTTO_MASK)
/* PDIR Bit Fields */
#define GPIO_PDIR_PDI_MASK 0xFFFFFFFFu
#define GPIO_PDIR_PDI_SHIFT 0
#define GPIO_PDIR_PDI_WIDTH 32
#define GPIO_PDIR_PDI(x) (((uint32_t)(((uint32_t)(x))<<GPIO_PDIR_PDI_SHIFT))&GPIO_PDIR_PDI_MASK)
/* PDDR Bit Fields */
#define GPIO_PDDR_PDD_MASK 0xFFFFFFFFu
#define GPIO_PDDR_PDD_SHIFT 0
#define GPIO_PDDR_PDD_WIDTH 32
#define GPIO_PDDR_PDD(x) (((uint32_t)(((uint32_t)(x))<<GPIO_PDDR_PDD_SHIFT))&GPIO_PDDR_PDD_MASK)
/*!
* @}
*/ /* end of group GPIO_Register_Masks */
/* GPIO - Peripheral instance base addresses */
/** Peripheral GPIOA base address */
#define GPIOA_BASE (0x400FF000u)
/** Peripheral GPIOA base pointer */
#define GPIOA ((GPIO_Type *)GPIOA_BASE)
#define GPIOA_BASE_PTR (GPIOA)
/** Peripheral GPIOB base address */
#define GPIOB_BASE (0x400FF040u)
/** Peripheral GPIOB base pointer */
#define GPIOB ((GPIO_Type *)GPIOB_BASE)
#define GPIOB_BASE_PTR (GPIOB)
/** Peripheral GPIOC base address */
#define GPIOC_BASE (0x400FF080u)
/** Peripheral GPIOC base pointer */
#define GPIOC ((GPIO_Type *)GPIOC_BASE)
#define GPIOC_BASE_PTR (GPIOC)
/** Array initializer of GPIO peripheral base addresses */
#define GPIO_BASE_ADDRS { GPIOA_BASE, GPIOB_BASE, GPIOC_BASE }
/** Array initializer of GPIO peripheral base pointers */
#define GPIO_BASE_PTRS { GPIOA, GPIOB, GPIOC }
/* ----------------------------------------------------------------------------
-- GPIO - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup GPIO_Register_Accessor_Macros GPIO - Register accessor macros
* @{
*/
/* GPIO - Register instance definitions */
/* GPIOA */
#define GPIOA_PDOR GPIO_PDOR_REG(GPIOA)
#define GPIOA_PSOR GPIO_PSOR_REG(GPIOA)
#define GPIOA_PCOR GPIO_PCOR_REG(GPIOA)
#define GPIOA_PTOR GPIO_PTOR_REG(GPIOA)
#define GPIOA_PDIR GPIO_PDIR_REG(GPIOA)
#define GPIOA_PDDR GPIO_PDDR_REG(GPIOA)
/* GPIOB */
#define GPIOB_PDOR GPIO_PDOR_REG(GPIOB)
#define GPIOB_PSOR GPIO_PSOR_REG(GPIOB)
#define GPIOB_PCOR GPIO_PCOR_REG(GPIOB)
#define GPIOB_PTOR GPIO_PTOR_REG(GPIOB)
#define GPIOB_PDIR GPIO_PDIR_REG(GPIOB)
#define GPIOB_PDDR GPIO_PDDR_REG(GPIOB)
/* GPIOC */
#define GPIOC_PDOR GPIO_PDOR_REG(GPIOC)
#define GPIOC_PSOR GPIO_PSOR_REG(GPIOC)
#define GPIOC_PCOR GPIO_PCOR_REG(GPIOC)
#define GPIOC_PTOR GPIO_PTOR_REG(GPIOC)
#define GPIOC_PDIR GPIO_PDIR_REG(GPIOC)
#define GPIOC_PDDR GPIO_PDDR_REG(GPIOC)
/*!
* @}
*/ /* end of group GPIO_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group GPIO_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- I2C Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup I2C_Peripheral_Access_Layer I2C Peripheral Access Layer
* @{
*/
/** I2C - Register Layout Typedef */
typedef struct {
__IO uint8_t A1; /**< I2C Address Register 1, offset: 0x0 */
__IO uint8_t F; /**< I2C Frequency Divider register, offset: 0x1 */
__IO uint8_t C1; /**< I2C Control Register 1, offset: 0x2 */
__IO uint8_t S; /**< I2C Status register, offset: 0x3 */
__IO uint8_t D; /**< I2C Data I/O register, offset: 0x4 */
__IO uint8_t C2; /**< I2C Control Register 2, offset: 0x5 */
__IO uint8_t FLT; /**< I2C Programmable Input Glitch Filter Register, offset: 0x6 */
__IO uint8_t RA; /**< I2C Range Address register, offset: 0x7 */
__IO uint8_t SMB; /**< I2C SMBus Control and Status register, offset: 0x8 */
__IO uint8_t A2; /**< I2C Address Register 2, offset: 0x9 */
__IO uint8_t SLTH; /**< I2C SCL Low Timeout Register High, offset: 0xA */
__IO uint8_t SLTL; /**< I2C SCL Low Timeout Register Low, offset: 0xB */
__IO uint8_t S2; /**< I2C Status register 2, offset: 0xC */
} I2C_Type, *I2C_MemMapPtr;
/* ----------------------------------------------------------------------------
-- I2C - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup I2C_Register_Accessor_Macros I2C - Register accessor macros
* @{
*/
/* I2C - Register accessors */
#define I2C_A1_REG(base) ((base)->A1)
#define I2C_F_REG(base) ((base)->F)
#define I2C_C1_REG(base) ((base)->C1)
#define I2C_S_REG(base) ((base)->S)
#define I2C_D_REG(base) ((base)->D)
#define I2C_C2_REG(base) ((base)->C2)
#define I2C_FLT_REG(base) ((base)->FLT)
#define I2C_RA_REG(base) ((base)->RA)
#define I2C_SMB_REG(base) ((base)->SMB)
#define I2C_A2_REG(base) ((base)->A2)
#define I2C_SLTH_REG(base) ((base)->SLTH)
#define I2C_SLTL_REG(base) ((base)->SLTL)
#define I2C_S2_REG(base) ((base)->S2)
/*!
* @}
*/ /* end of group I2C_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- I2C Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup I2C_Register_Masks I2C Register Masks
* @{
*/
/* A1 Bit Fields */
#define I2C_A1_AD_MASK 0xFEu
#define I2C_A1_AD_SHIFT 1
#define I2C_A1_AD_WIDTH 7
#define I2C_A1_AD(x) (((uint8_t)(((uint8_t)(x))<<I2C_A1_AD_SHIFT))&I2C_A1_AD_MASK)
/* F Bit Fields */
#define I2C_F_ICR_MASK 0x3Fu
#define I2C_F_ICR_SHIFT 0
#define I2C_F_ICR_WIDTH 6
#define I2C_F_ICR(x) (((uint8_t)(((uint8_t)(x))<<I2C_F_ICR_SHIFT))&I2C_F_ICR_MASK)
#define I2C_F_MULT_MASK 0xC0u
#define I2C_F_MULT_SHIFT 6
#define I2C_F_MULT_WIDTH 2
#define I2C_F_MULT(x) (((uint8_t)(((uint8_t)(x))<<I2C_F_MULT_SHIFT))&I2C_F_MULT_MASK)
/* C1 Bit Fields */
#define I2C_C1_DMAEN_MASK 0x1u
#define I2C_C1_DMAEN_SHIFT 0
#define I2C_C1_DMAEN_WIDTH 1
#define I2C_C1_DMAEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_DMAEN_SHIFT))&I2C_C1_DMAEN_MASK)
#define I2C_C1_WUEN_MASK 0x2u
#define I2C_C1_WUEN_SHIFT 1
#define I2C_C1_WUEN_WIDTH 1
#define I2C_C1_WUEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_WUEN_SHIFT))&I2C_C1_WUEN_MASK)
#define I2C_C1_RSTA_MASK 0x4u
#define I2C_C1_RSTA_SHIFT 2
#define I2C_C1_RSTA_WIDTH 1
#define I2C_C1_RSTA(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_RSTA_SHIFT))&I2C_C1_RSTA_MASK)
#define I2C_C1_TXAK_MASK 0x8u
#define I2C_C1_TXAK_SHIFT 3
#define I2C_C1_TXAK_WIDTH 1
#define I2C_C1_TXAK(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_TXAK_SHIFT))&I2C_C1_TXAK_MASK)
#define I2C_C1_TX_MASK 0x10u
#define I2C_C1_TX_SHIFT 4
#define I2C_C1_TX_WIDTH 1
#define I2C_C1_TX(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_TX_SHIFT))&I2C_C1_TX_MASK)
#define I2C_C1_MST_MASK 0x20u
#define I2C_C1_MST_SHIFT 5
#define I2C_C1_MST_WIDTH 1
#define I2C_C1_MST(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_MST_SHIFT))&I2C_C1_MST_MASK)
#define I2C_C1_IICIE_MASK 0x40u
#define I2C_C1_IICIE_SHIFT 6
#define I2C_C1_IICIE_WIDTH 1
#define I2C_C1_IICIE(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_IICIE_SHIFT))&I2C_C1_IICIE_MASK)
#define I2C_C1_IICEN_MASK 0x80u
#define I2C_C1_IICEN_SHIFT 7
#define I2C_C1_IICEN_WIDTH 1
#define I2C_C1_IICEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_C1_IICEN_SHIFT))&I2C_C1_IICEN_MASK)
/* S Bit Fields */
#define I2C_S_RXAK_MASK 0x1u
#define I2C_S_RXAK_SHIFT 0
#define I2C_S_RXAK_WIDTH 1
#define I2C_S_RXAK(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_RXAK_SHIFT))&I2C_S_RXAK_MASK)
#define I2C_S_IICIF_MASK 0x2u
#define I2C_S_IICIF_SHIFT 1
#define I2C_S_IICIF_WIDTH 1
#define I2C_S_IICIF(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_IICIF_SHIFT))&I2C_S_IICIF_MASK)
#define I2C_S_SRW_MASK 0x4u
#define I2C_S_SRW_SHIFT 2
#define I2C_S_SRW_WIDTH 1
#define I2C_S_SRW(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_SRW_SHIFT))&I2C_S_SRW_MASK)
#define I2C_S_RAM_MASK 0x8u
#define I2C_S_RAM_SHIFT 3
#define I2C_S_RAM_WIDTH 1
#define I2C_S_RAM(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_RAM_SHIFT))&I2C_S_RAM_MASK)
#define I2C_S_ARBL_MASK 0x10u
#define I2C_S_ARBL_SHIFT 4
#define I2C_S_ARBL_WIDTH 1
#define I2C_S_ARBL(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_ARBL_SHIFT))&I2C_S_ARBL_MASK)
#define I2C_S_BUSY_MASK 0x20u
#define I2C_S_BUSY_SHIFT 5
#define I2C_S_BUSY_WIDTH 1
#define I2C_S_BUSY(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_BUSY_SHIFT))&I2C_S_BUSY_MASK)
#define I2C_S_IAAS_MASK 0x40u
#define I2C_S_IAAS_SHIFT 6
#define I2C_S_IAAS_WIDTH 1
#define I2C_S_IAAS(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_IAAS_SHIFT))&I2C_S_IAAS_MASK)
#define I2C_S_TCF_MASK 0x80u
#define I2C_S_TCF_SHIFT 7
#define I2C_S_TCF_WIDTH 1
#define I2C_S_TCF(x) (((uint8_t)(((uint8_t)(x))<<I2C_S_TCF_SHIFT))&I2C_S_TCF_MASK)
/* D Bit Fields */
#define I2C_D_DATA_MASK 0xFFu
#define I2C_D_DATA_SHIFT 0
#define I2C_D_DATA_WIDTH 8
#define I2C_D_DATA(x) (((uint8_t)(((uint8_t)(x))<<I2C_D_DATA_SHIFT))&I2C_D_DATA_MASK)
/* C2 Bit Fields */
#define I2C_C2_AD_MASK 0x7u
#define I2C_C2_AD_SHIFT 0
#define I2C_C2_AD_WIDTH 3
#define I2C_C2_AD(x) (((uint8_t)(((uint8_t)(x))<<I2C_C2_AD_SHIFT))&I2C_C2_AD_MASK)
#define I2C_C2_RMEN_MASK 0x8u
#define I2C_C2_RMEN_SHIFT 3
#define I2C_C2_RMEN_WIDTH 1
#define I2C_C2_RMEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_C2_RMEN_SHIFT))&I2C_C2_RMEN_MASK)
#define I2C_C2_SBRC_MASK 0x10u
#define I2C_C2_SBRC_SHIFT 4
#define I2C_C2_SBRC_WIDTH 1
#define I2C_C2_SBRC(x) (((uint8_t)(((uint8_t)(x))<<I2C_C2_SBRC_SHIFT))&I2C_C2_SBRC_MASK)
#define I2C_C2_HDRS_MASK 0x20u
#define I2C_C2_HDRS_SHIFT 5
#define I2C_C2_HDRS_WIDTH 1
#define I2C_C2_HDRS(x) (((uint8_t)(((uint8_t)(x))<<I2C_C2_HDRS_SHIFT))&I2C_C2_HDRS_MASK)
#define I2C_C2_ADEXT_MASK 0x40u
#define I2C_C2_ADEXT_SHIFT 6
#define I2C_C2_ADEXT_WIDTH 1
#define I2C_C2_ADEXT(x) (((uint8_t)(((uint8_t)(x))<<I2C_C2_ADEXT_SHIFT))&I2C_C2_ADEXT_MASK)
#define I2C_C2_GCAEN_MASK 0x80u
#define I2C_C2_GCAEN_SHIFT 7
#define I2C_C2_GCAEN_WIDTH 1
#define I2C_C2_GCAEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_C2_GCAEN_SHIFT))&I2C_C2_GCAEN_MASK)
/* FLT Bit Fields */
#define I2C_FLT_FLT_MASK 0xFu
#define I2C_FLT_FLT_SHIFT 0
#define I2C_FLT_FLT_WIDTH 4
#define I2C_FLT_FLT(x) (((uint8_t)(((uint8_t)(x))<<I2C_FLT_FLT_SHIFT))&I2C_FLT_FLT_MASK)
#define I2C_FLT_STARTF_MASK 0x10u
#define I2C_FLT_STARTF_SHIFT 4
#define I2C_FLT_STARTF_WIDTH 1
#define I2C_FLT_STARTF(x) (((uint8_t)(((uint8_t)(x))<<I2C_FLT_STARTF_SHIFT))&I2C_FLT_STARTF_MASK)
#define I2C_FLT_SSIE_MASK 0x20u
#define I2C_FLT_SSIE_SHIFT 5
#define I2C_FLT_SSIE_WIDTH 1
#define I2C_FLT_SSIE(x) (((uint8_t)(((uint8_t)(x))<<I2C_FLT_SSIE_SHIFT))&I2C_FLT_SSIE_MASK)
#define I2C_FLT_STOPF_MASK 0x40u
#define I2C_FLT_STOPF_SHIFT 6
#define I2C_FLT_STOPF_WIDTH 1
#define I2C_FLT_STOPF(x) (((uint8_t)(((uint8_t)(x))<<I2C_FLT_STOPF_SHIFT))&I2C_FLT_STOPF_MASK)
#define I2C_FLT_SHEN_MASK 0x80u
#define I2C_FLT_SHEN_SHIFT 7
#define I2C_FLT_SHEN_WIDTH 1
#define I2C_FLT_SHEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_FLT_SHEN_SHIFT))&I2C_FLT_SHEN_MASK)
/* RA Bit Fields */
#define I2C_RA_RAD_MASK 0xFEu
#define I2C_RA_RAD_SHIFT 1
#define I2C_RA_RAD_WIDTH 7
#define I2C_RA_RAD(x) (((uint8_t)(((uint8_t)(x))<<I2C_RA_RAD_SHIFT))&I2C_RA_RAD_MASK)
/* SMB Bit Fields */
#define I2C_SMB_SHTF2IE_MASK 0x1u
#define I2C_SMB_SHTF2IE_SHIFT 0
#define I2C_SMB_SHTF2IE_WIDTH 1
#define I2C_SMB_SHTF2IE(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_SHTF2IE_SHIFT))&I2C_SMB_SHTF2IE_MASK)
#define I2C_SMB_SHTF2_MASK 0x2u
#define I2C_SMB_SHTF2_SHIFT 1
#define I2C_SMB_SHTF2_WIDTH 1
#define I2C_SMB_SHTF2(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_SHTF2_SHIFT))&I2C_SMB_SHTF2_MASK)
#define I2C_SMB_SHTF1_MASK 0x4u
#define I2C_SMB_SHTF1_SHIFT 2
#define I2C_SMB_SHTF1_WIDTH 1
#define I2C_SMB_SHTF1(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_SHTF1_SHIFT))&I2C_SMB_SHTF1_MASK)
#define I2C_SMB_SLTF_MASK 0x8u
#define I2C_SMB_SLTF_SHIFT 3
#define I2C_SMB_SLTF_WIDTH 1
#define I2C_SMB_SLTF(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_SLTF_SHIFT))&I2C_SMB_SLTF_MASK)
#define I2C_SMB_TCKSEL_MASK 0x10u
#define I2C_SMB_TCKSEL_SHIFT 4
#define I2C_SMB_TCKSEL_WIDTH 1
#define I2C_SMB_TCKSEL(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_TCKSEL_SHIFT))&I2C_SMB_TCKSEL_MASK)
#define I2C_SMB_SIICAEN_MASK 0x20u
#define I2C_SMB_SIICAEN_SHIFT 5
#define I2C_SMB_SIICAEN_WIDTH 1
#define I2C_SMB_SIICAEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_SIICAEN_SHIFT))&I2C_SMB_SIICAEN_MASK)
#define I2C_SMB_ALERTEN_MASK 0x40u
#define I2C_SMB_ALERTEN_SHIFT 6
#define I2C_SMB_ALERTEN_WIDTH 1
#define I2C_SMB_ALERTEN(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_ALERTEN_SHIFT))&I2C_SMB_ALERTEN_MASK)
#define I2C_SMB_FACK_MASK 0x80u
#define I2C_SMB_FACK_SHIFT 7
#define I2C_SMB_FACK_WIDTH 1
#define I2C_SMB_FACK(x) (((uint8_t)(((uint8_t)(x))<<I2C_SMB_FACK_SHIFT))&I2C_SMB_FACK_MASK)
/* A2 Bit Fields */
#define I2C_A2_SAD_MASK 0xFEu
#define I2C_A2_SAD_SHIFT 1
#define I2C_A2_SAD_WIDTH 7
#define I2C_A2_SAD(x) (((uint8_t)(((uint8_t)(x))<<I2C_A2_SAD_SHIFT))&I2C_A2_SAD_MASK)
/* SLTH Bit Fields */
#define I2C_SLTH_SSLT_MASK 0xFFu
#define I2C_SLTH_SSLT_SHIFT 0
#define I2C_SLTH_SSLT_WIDTH 8
#define I2C_SLTH_SSLT(x) (((uint8_t)(((uint8_t)(x))<<I2C_SLTH_SSLT_SHIFT))&I2C_SLTH_SSLT_MASK)
/* SLTL Bit Fields */
#define I2C_SLTL_SSLT_MASK 0xFFu
#define I2C_SLTL_SSLT_SHIFT 0
#define I2C_SLTL_SSLT_WIDTH 8
#define I2C_SLTL_SSLT(x) (((uint8_t)(((uint8_t)(x))<<I2C_SLTL_SSLT_SHIFT))&I2C_SLTL_SSLT_MASK)
/* S2 Bit Fields */
#define I2C_S2_EMPTY_MASK 0x1u
#define I2C_S2_EMPTY_SHIFT 0
#define I2C_S2_EMPTY_WIDTH 1
#define I2C_S2_EMPTY(x) (((uint8_t)(((uint8_t)(x))<<I2C_S2_EMPTY_SHIFT))&I2C_S2_EMPTY_MASK)
#define I2C_S2_ERROR_MASK 0x2u
#define I2C_S2_ERROR_SHIFT 1
#define I2C_S2_ERROR_WIDTH 1
#define I2C_S2_ERROR(x) (((uint8_t)(((uint8_t)(x))<<I2C_S2_ERROR_SHIFT))&I2C_S2_ERROR_MASK)
/*!
* @}
*/ /* end of group I2C_Register_Masks */
/* I2C - Peripheral instance base addresses */
/** Peripheral I2C0 base address */
#define I2C0_BASE (0x40066000u)
/** Peripheral I2C0 base pointer */
#define I2C0 ((I2C_Type *)I2C0_BASE)
#define I2C0_BASE_PTR (I2C0)
/** Peripheral I2C1 base address */
#define I2C1_BASE (0x40067000u)
/** Peripheral I2C1 base pointer */
#define I2C1 ((I2C_Type *)I2C1_BASE)
#define I2C1_BASE_PTR (I2C1)
/** Array initializer of I2C peripheral base addresses */
#define I2C_BASE_ADDRS { I2C0_BASE, I2C1_BASE }
/** Array initializer of I2C peripheral base pointers */
#define I2C_BASE_PTRS { I2C0, I2C1 }
/** Interrupt vectors for the I2C peripheral type */
#define I2C_IRQS { I2C0_IRQn, I2C1_IRQn }
/* ----------------------------------------------------------------------------
-- I2C - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup I2C_Register_Accessor_Macros I2C - Register accessor macros
* @{
*/
/* I2C - Register instance definitions */
/* I2C0 */
#define I2C0_A1 I2C_A1_REG(I2C0)
#define I2C0_F I2C_F_REG(I2C0)
#define I2C0_C1 I2C_C1_REG(I2C0)
#define I2C0_S I2C_S_REG(I2C0)
#define I2C0_D I2C_D_REG(I2C0)
#define I2C0_C2 I2C_C2_REG(I2C0)
#define I2C0_FLT I2C_FLT_REG(I2C0)
#define I2C0_RA I2C_RA_REG(I2C0)
#define I2C0_SMB I2C_SMB_REG(I2C0)
#define I2C0_A2 I2C_A2_REG(I2C0)
#define I2C0_SLTH I2C_SLTH_REG(I2C0)
#define I2C0_SLTL I2C_SLTL_REG(I2C0)
#define I2C0_S2 I2C_S2_REG(I2C0)
/* I2C1 */
#define I2C1_A1 I2C_A1_REG(I2C1)
#define I2C1_F I2C_F_REG(I2C1)
#define I2C1_C1 I2C_C1_REG(I2C1)
#define I2C1_S I2C_S_REG(I2C1)
#define I2C1_D I2C_D_REG(I2C1)
#define I2C1_C2 I2C_C2_REG(I2C1)
#define I2C1_FLT I2C_FLT_REG(I2C1)
#define I2C1_RA I2C_RA_REG(I2C1)
#define I2C1_SMB I2C_SMB_REG(I2C1)
#define I2C1_A2 I2C_A2_REG(I2C1)
#define I2C1_SLTH I2C_SLTH_REG(I2C1)
#define I2C1_SLTL I2C_SLTL_REG(I2C1)
#define I2C1_S2 I2C_S2_REG(I2C1)
/*!
* @}
*/ /* end of group I2C_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group I2C_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- LLWU Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup LLWU_Peripheral_Access_Layer LLWU Peripheral Access Layer
* @{
*/
/** LLWU - Register Layout Typedef */
typedef struct {
__IO uint8_t PE1; /**< LLWU Pin Enable 1 register, offset: 0x0 */
__IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */
__IO uint8_t PE3; /**< LLWU Pin Enable 3 register, offset: 0x2 */
__IO uint8_t PE4; /**< LLWU Pin Enable 4 register, offset: 0x3 */
__IO uint8_t ME; /**< LLWU Module Enable register, offset: 0x4 */
__IO uint8_t F1; /**< LLWU Flag 1 register, offset: 0x5 */
__IO uint8_t F2; /**< LLWU Flag 2 register, offset: 0x6 */
__I uint8_t F3; /**< LLWU Flag 3 register, offset: 0x7 */
__IO uint8_t FILT1; /**< LLWU Pin Filter 1 register, offset: 0x8 */
__IO uint8_t FILT2; /**< LLWU Pin Filter 2 register, offset: 0x9 */
} LLWU_Type, *LLWU_MemMapPtr;
/* ----------------------------------------------------------------------------
-- LLWU - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LLWU_Register_Accessor_Macros LLWU - Register accessor macros
* @{
*/
/* LLWU - Register accessors */
#define LLWU_PE1_REG(base) ((base)->PE1)
#define LLWU_PE2_REG(base) ((base)->PE2)
#define LLWU_PE3_REG(base) ((base)->PE3)
#define LLWU_PE4_REG(base) ((base)->PE4)
#define LLWU_ME_REG(base) ((base)->ME)
#define LLWU_F1_REG(base) ((base)->F1)
#define LLWU_F2_REG(base) ((base)->F2)
#define LLWU_F3_REG(base) ((base)->F3)
#define LLWU_FILT1_REG(base) ((base)->FILT1)
#define LLWU_FILT2_REG(base) ((base)->FILT2)
/*!
* @}
*/ /* end of group LLWU_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- LLWU Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup LLWU_Register_Masks LLWU Register Masks
* @{
*/
/* PE1 Bit Fields */
#define LLWU_PE1_WUPE0_MASK 0x3u
#define LLWU_PE1_WUPE0_SHIFT 0
#define LLWU_PE1_WUPE0_WIDTH 2
#define LLWU_PE1_WUPE0(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE1_WUPE0_SHIFT))&LLWU_PE1_WUPE0_MASK)
#define LLWU_PE1_WUPE1_MASK 0xCu
#define LLWU_PE1_WUPE1_SHIFT 2
#define LLWU_PE1_WUPE1_WIDTH 2
#define LLWU_PE1_WUPE1(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE1_WUPE1_SHIFT))&LLWU_PE1_WUPE1_MASK)
#define LLWU_PE1_WUPE2_MASK 0x30u
#define LLWU_PE1_WUPE2_SHIFT 4
#define LLWU_PE1_WUPE2_WIDTH 2
#define LLWU_PE1_WUPE2(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE1_WUPE2_SHIFT))&LLWU_PE1_WUPE2_MASK)
#define LLWU_PE1_WUPE3_MASK 0xC0u
#define LLWU_PE1_WUPE3_SHIFT 6
#define LLWU_PE1_WUPE3_WIDTH 2
#define LLWU_PE1_WUPE3(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE1_WUPE3_SHIFT))&LLWU_PE1_WUPE3_MASK)
/* PE2 Bit Fields */
#define LLWU_PE2_WUPE4_MASK 0x3u
#define LLWU_PE2_WUPE4_SHIFT 0
#define LLWU_PE2_WUPE4_WIDTH 2
#define LLWU_PE2_WUPE4(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE2_WUPE4_SHIFT))&LLWU_PE2_WUPE4_MASK)
#define LLWU_PE2_WUPE5_MASK 0xCu
#define LLWU_PE2_WUPE5_SHIFT 2
#define LLWU_PE2_WUPE5_WIDTH 2
#define LLWU_PE2_WUPE5(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE2_WUPE5_SHIFT))&LLWU_PE2_WUPE5_MASK)
#define LLWU_PE2_WUPE6_MASK 0x30u
#define LLWU_PE2_WUPE6_SHIFT 4
#define LLWU_PE2_WUPE6_WIDTH 2
#define LLWU_PE2_WUPE6(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE2_WUPE6_SHIFT))&LLWU_PE2_WUPE6_MASK)
#define LLWU_PE2_WUPE7_MASK 0xC0u
#define LLWU_PE2_WUPE7_SHIFT 6
#define LLWU_PE2_WUPE7_WIDTH 2
#define LLWU_PE2_WUPE7(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE2_WUPE7_SHIFT))&LLWU_PE2_WUPE7_MASK)
/* PE3 Bit Fields */
#define LLWU_PE3_WUPE8_MASK 0x3u
#define LLWU_PE3_WUPE8_SHIFT 0
#define LLWU_PE3_WUPE8_WIDTH 2
#define LLWU_PE3_WUPE8(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE3_WUPE8_SHIFT))&LLWU_PE3_WUPE8_MASK)
#define LLWU_PE3_WUPE9_MASK 0xCu
#define LLWU_PE3_WUPE9_SHIFT 2
#define LLWU_PE3_WUPE9_WIDTH 2
#define LLWU_PE3_WUPE9(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE3_WUPE9_SHIFT))&LLWU_PE3_WUPE9_MASK)
#define LLWU_PE3_WUPE10_MASK 0x30u
#define LLWU_PE3_WUPE10_SHIFT 4
#define LLWU_PE3_WUPE10_WIDTH 2
#define LLWU_PE3_WUPE10(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE3_WUPE10_SHIFT))&LLWU_PE3_WUPE10_MASK)
#define LLWU_PE3_WUPE11_MASK 0xC0u
#define LLWU_PE3_WUPE11_SHIFT 6
#define LLWU_PE3_WUPE11_WIDTH 2
#define LLWU_PE3_WUPE11(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE3_WUPE11_SHIFT))&LLWU_PE3_WUPE11_MASK)
/* PE4 Bit Fields */
#define LLWU_PE4_WUPE12_MASK 0x3u
#define LLWU_PE4_WUPE12_SHIFT 0
#define LLWU_PE4_WUPE12_WIDTH 2
#define LLWU_PE4_WUPE12(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE4_WUPE12_SHIFT))&LLWU_PE4_WUPE12_MASK)
#define LLWU_PE4_WUPE13_MASK 0xCu
#define LLWU_PE4_WUPE13_SHIFT 2
#define LLWU_PE4_WUPE13_WIDTH 2
#define LLWU_PE4_WUPE13(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE4_WUPE13_SHIFT))&LLWU_PE4_WUPE13_MASK)
#define LLWU_PE4_WUPE14_MASK 0x30u
#define LLWU_PE4_WUPE14_SHIFT 4
#define LLWU_PE4_WUPE14_WIDTH 2
#define LLWU_PE4_WUPE14(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE4_WUPE14_SHIFT))&LLWU_PE4_WUPE14_MASK)
#define LLWU_PE4_WUPE15_MASK 0xC0u
#define LLWU_PE4_WUPE15_SHIFT 6
#define LLWU_PE4_WUPE15_WIDTH 2
#define LLWU_PE4_WUPE15(x) (((uint8_t)(((uint8_t)(x))<<LLWU_PE4_WUPE15_SHIFT))&LLWU_PE4_WUPE15_MASK)
/* ME Bit Fields */
#define LLWU_ME_WUME0_MASK 0x1u
#define LLWU_ME_WUME0_SHIFT 0
#define LLWU_ME_WUME0_WIDTH 1
#define LLWU_ME_WUME0(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME0_SHIFT))&LLWU_ME_WUME0_MASK)
#define LLWU_ME_WUME1_MASK 0x2u
#define LLWU_ME_WUME1_SHIFT 1
#define LLWU_ME_WUME1_WIDTH 1
#define LLWU_ME_WUME1(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME1_SHIFT))&LLWU_ME_WUME1_MASK)
#define LLWU_ME_WUME2_MASK 0x4u
#define LLWU_ME_WUME2_SHIFT 2
#define LLWU_ME_WUME2_WIDTH 1
#define LLWU_ME_WUME2(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME2_SHIFT))&LLWU_ME_WUME2_MASK)
#define LLWU_ME_WUME3_MASK 0x8u
#define LLWU_ME_WUME3_SHIFT 3
#define LLWU_ME_WUME3_WIDTH 1
#define LLWU_ME_WUME3(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME3_SHIFT))&LLWU_ME_WUME3_MASK)
#define LLWU_ME_WUME4_MASK 0x10u
#define LLWU_ME_WUME4_SHIFT 4
#define LLWU_ME_WUME4_WIDTH 1
#define LLWU_ME_WUME4(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME4_SHIFT))&LLWU_ME_WUME4_MASK)
#define LLWU_ME_WUME5_MASK 0x20u
#define LLWU_ME_WUME5_SHIFT 5
#define LLWU_ME_WUME5_WIDTH 1
#define LLWU_ME_WUME5(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME5_SHIFT))&LLWU_ME_WUME5_MASK)
#define LLWU_ME_WUME6_MASK 0x40u
#define LLWU_ME_WUME6_SHIFT 6
#define LLWU_ME_WUME6_WIDTH 1
#define LLWU_ME_WUME6(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME6_SHIFT))&LLWU_ME_WUME6_MASK)
#define LLWU_ME_WUME7_MASK 0x80u
#define LLWU_ME_WUME7_SHIFT 7
#define LLWU_ME_WUME7_WIDTH 1
#define LLWU_ME_WUME7(x) (((uint8_t)(((uint8_t)(x))<<LLWU_ME_WUME7_SHIFT))&LLWU_ME_WUME7_MASK)
/* F1 Bit Fields */
#define LLWU_F1_WUF0_MASK 0x1u
#define LLWU_F1_WUF0_SHIFT 0
#define LLWU_F1_WUF0_WIDTH 1
#define LLWU_F1_WUF0(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF0_SHIFT))&LLWU_F1_WUF0_MASK)
#define LLWU_F1_WUF1_MASK 0x2u
#define LLWU_F1_WUF1_SHIFT 1
#define LLWU_F1_WUF1_WIDTH 1
#define LLWU_F1_WUF1(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF1_SHIFT))&LLWU_F1_WUF1_MASK)
#define LLWU_F1_WUF2_MASK 0x4u
#define LLWU_F1_WUF2_SHIFT 2
#define LLWU_F1_WUF2_WIDTH 1
#define LLWU_F1_WUF2(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF2_SHIFT))&LLWU_F1_WUF2_MASK)
#define LLWU_F1_WUF3_MASK 0x8u
#define LLWU_F1_WUF3_SHIFT 3
#define LLWU_F1_WUF3_WIDTH 1
#define LLWU_F1_WUF3(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF3_SHIFT))&LLWU_F1_WUF3_MASK)
#define LLWU_F1_WUF4_MASK 0x10u
#define LLWU_F1_WUF4_SHIFT 4
#define LLWU_F1_WUF4_WIDTH 1
#define LLWU_F1_WUF4(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF4_SHIFT))&LLWU_F1_WUF4_MASK)
#define LLWU_F1_WUF5_MASK 0x20u
#define LLWU_F1_WUF5_SHIFT 5
#define LLWU_F1_WUF5_WIDTH 1
#define LLWU_F1_WUF5(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF5_SHIFT))&LLWU_F1_WUF5_MASK)
#define LLWU_F1_WUF6_MASK 0x40u
#define LLWU_F1_WUF6_SHIFT 6
#define LLWU_F1_WUF6_WIDTH 1
#define LLWU_F1_WUF6(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF6_SHIFT))&LLWU_F1_WUF6_MASK)
#define LLWU_F1_WUF7_MASK 0x80u
#define LLWU_F1_WUF7_SHIFT 7
#define LLWU_F1_WUF7_WIDTH 1
#define LLWU_F1_WUF7(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F1_WUF7_SHIFT))&LLWU_F1_WUF7_MASK)
/* F2 Bit Fields */
#define LLWU_F2_WUF8_MASK 0x1u
#define LLWU_F2_WUF8_SHIFT 0
#define LLWU_F2_WUF8_WIDTH 1
#define LLWU_F2_WUF8(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF8_SHIFT))&LLWU_F2_WUF8_MASK)
#define LLWU_F2_WUF9_MASK 0x2u
#define LLWU_F2_WUF9_SHIFT 1
#define LLWU_F2_WUF9_WIDTH 1
#define LLWU_F2_WUF9(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF9_SHIFT))&LLWU_F2_WUF9_MASK)
#define LLWU_F2_WUF10_MASK 0x4u
#define LLWU_F2_WUF10_SHIFT 2
#define LLWU_F2_WUF10_WIDTH 1
#define LLWU_F2_WUF10(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF10_SHIFT))&LLWU_F2_WUF10_MASK)
#define LLWU_F2_WUF11_MASK 0x8u
#define LLWU_F2_WUF11_SHIFT 3
#define LLWU_F2_WUF11_WIDTH 1
#define LLWU_F2_WUF11(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF11_SHIFT))&LLWU_F2_WUF11_MASK)
#define LLWU_F2_WUF12_MASK 0x10u
#define LLWU_F2_WUF12_SHIFT 4
#define LLWU_F2_WUF12_WIDTH 1
#define LLWU_F2_WUF12(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF12_SHIFT))&LLWU_F2_WUF12_MASK)
#define LLWU_F2_WUF13_MASK 0x20u
#define LLWU_F2_WUF13_SHIFT 5
#define LLWU_F2_WUF13_WIDTH 1
#define LLWU_F2_WUF13(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF13_SHIFT))&LLWU_F2_WUF13_MASK)
#define LLWU_F2_WUF14_MASK 0x40u
#define LLWU_F2_WUF14_SHIFT 6
#define LLWU_F2_WUF14_WIDTH 1
#define LLWU_F2_WUF14(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF14_SHIFT))&LLWU_F2_WUF14_MASK)
#define LLWU_F2_WUF15_MASK 0x80u
#define LLWU_F2_WUF15_SHIFT 7
#define LLWU_F2_WUF15_WIDTH 1
#define LLWU_F2_WUF15(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F2_WUF15_SHIFT))&LLWU_F2_WUF15_MASK)
/* F3 Bit Fields */
#define LLWU_F3_MWUF0_MASK 0x1u
#define LLWU_F3_MWUF0_SHIFT 0
#define LLWU_F3_MWUF0_WIDTH 1
#define LLWU_F3_MWUF0(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF0_SHIFT))&LLWU_F3_MWUF0_MASK)
#define LLWU_F3_MWUF1_MASK 0x2u
#define LLWU_F3_MWUF1_SHIFT 1
#define LLWU_F3_MWUF1_WIDTH 1
#define LLWU_F3_MWUF1(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF1_SHIFT))&LLWU_F3_MWUF1_MASK)
#define LLWU_F3_MWUF2_MASK 0x4u
#define LLWU_F3_MWUF2_SHIFT 2
#define LLWU_F3_MWUF2_WIDTH 1
#define LLWU_F3_MWUF2(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF2_SHIFT))&LLWU_F3_MWUF2_MASK)
#define LLWU_F3_MWUF3_MASK 0x8u
#define LLWU_F3_MWUF3_SHIFT 3
#define LLWU_F3_MWUF3_WIDTH 1
#define LLWU_F3_MWUF3(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF3_SHIFT))&LLWU_F3_MWUF3_MASK)
#define LLWU_F3_MWUF4_MASK 0x10u
#define LLWU_F3_MWUF4_SHIFT 4
#define LLWU_F3_MWUF4_WIDTH 1
#define LLWU_F3_MWUF4(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF4_SHIFT))&LLWU_F3_MWUF4_MASK)
#define LLWU_F3_MWUF5_MASK 0x20u
#define LLWU_F3_MWUF5_SHIFT 5
#define LLWU_F3_MWUF5_WIDTH 1
#define LLWU_F3_MWUF5(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF5_SHIFT))&LLWU_F3_MWUF5_MASK)
#define LLWU_F3_MWUF6_MASK 0x40u
#define LLWU_F3_MWUF6_SHIFT 6
#define LLWU_F3_MWUF6_WIDTH 1
#define LLWU_F3_MWUF6(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF6_SHIFT))&LLWU_F3_MWUF6_MASK)
#define LLWU_F3_MWUF7_MASK 0x80u
#define LLWU_F3_MWUF7_SHIFT 7
#define LLWU_F3_MWUF7_WIDTH 1
#define LLWU_F3_MWUF7(x) (((uint8_t)(((uint8_t)(x))<<LLWU_F3_MWUF7_SHIFT))&LLWU_F3_MWUF7_MASK)
/* FILT1 Bit Fields */
#define LLWU_FILT1_FILTSEL_MASK 0xFu
#define LLWU_FILT1_FILTSEL_SHIFT 0
#define LLWU_FILT1_FILTSEL_WIDTH 4
#define LLWU_FILT1_FILTSEL(x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTSEL_SHIFT))&LLWU_FILT1_FILTSEL_MASK)
#define LLWU_FILT1_FILTE_MASK 0x60u
#define LLWU_FILT1_FILTE_SHIFT 5
#define LLWU_FILT1_FILTE_WIDTH 2
#define LLWU_FILT1_FILTE(x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTE_SHIFT))&LLWU_FILT1_FILTE_MASK)
#define LLWU_FILT1_FILTF_MASK 0x80u
#define LLWU_FILT1_FILTF_SHIFT 7
#define LLWU_FILT1_FILTF_WIDTH 1
#define LLWU_FILT1_FILTF(x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT1_FILTF_SHIFT))&LLWU_FILT1_FILTF_MASK)
/* FILT2 Bit Fields */
#define LLWU_FILT2_FILTSEL_MASK 0xFu
#define LLWU_FILT2_FILTSEL_SHIFT 0
#define LLWU_FILT2_FILTSEL_WIDTH 4
#define LLWU_FILT2_FILTSEL(x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT2_FILTSEL_SHIFT))&LLWU_FILT2_FILTSEL_MASK)
#define LLWU_FILT2_FILTE_MASK 0x60u
#define LLWU_FILT2_FILTE_SHIFT 5
#define LLWU_FILT2_FILTE_WIDTH 2
#define LLWU_FILT2_FILTE(x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT2_FILTE_SHIFT))&LLWU_FILT2_FILTE_MASK)
#define LLWU_FILT2_FILTF_MASK 0x80u
#define LLWU_FILT2_FILTF_SHIFT 7
#define LLWU_FILT2_FILTF_WIDTH 1
#define LLWU_FILT2_FILTF(x) (((uint8_t)(((uint8_t)(x))<<LLWU_FILT2_FILTF_SHIFT))&LLWU_FILT2_FILTF_MASK)
/*!
* @}
*/ /* end of group LLWU_Register_Masks */
/* LLWU - Peripheral instance base addresses */
/** Peripheral LLWU base address */
#define LLWU_BASE (0x4007C000u)
/** Peripheral LLWU base pointer */
#define LLWU ((LLWU_Type *)LLWU_BASE)
#define LLWU_BASE_PTR (LLWU)
/** Array initializer of LLWU peripheral base addresses */
#define LLWU_BASE_ADDRS { LLWU_BASE }
/** Array initializer of LLWU peripheral base pointers */
#define LLWU_BASE_PTRS { LLWU }
/** Interrupt vectors for the LLWU peripheral type */
#define LLWU_IRQS { LLWU_IRQn }
/* ----------------------------------------------------------------------------
-- LLWU - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LLWU_Register_Accessor_Macros LLWU - Register accessor macros
* @{
*/
/* LLWU - Register instance definitions */
/* LLWU */
#define LLWU_PE1 LLWU_PE1_REG(LLWU)
#define LLWU_PE2 LLWU_PE2_REG(LLWU)
#define LLWU_PE3 LLWU_PE3_REG(LLWU)
#define LLWU_PE4 LLWU_PE4_REG(LLWU)
#define LLWU_ME LLWU_ME_REG(LLWU)
#define LLWU_F1 LLWU_F1_REG(LLWU)
#define LLWU_F2 LLWU_F2_REG(LLWU)
#define LLWU_F3 LLWU_F3_REG(LLWU)
#define LLWU_FILT1 LLWU_FILT1_REG(LLWU)
#define LLWU_FILT2 LLWU_FILT2_REG(LLWU)
/*!
* @}
*/ /* end of group LLWU_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group LLWU_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- LPTMR Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPTMR_Peripheral_Access_Layer LPTMR Peripheral Access Layer
* @{
*/
/** LPTMR - Register Layout Typedef */
typedef struct {
__IO uint32_t CSR; /**< Low Power Timer Control Status Register, offset: 0x0 */
__IO uint32_t PSR; /**< Low Power Timer Prescale Register, offset: 0x4 */
__IO uint32_t CMR; /**< Low Power Timer Compare Register, offset: 0x8 */
__IO uint32_t CNR; /**< Low Power Timer Counter Register, offset: 0xC */
} LPTMR_Type, *LPTMR_MemMapPtr;
/* ----------------------------------------------------------------------------
-- LPTMR - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPTMR_Register_Accessor_Macros LPTMR - Register accessor macros
* @{
*/
/* LPTMR - Register accessors */
#define LPTMR_CSR_REG(base) ((base)->CSR)
#define LPTMR_PSR_REG(base) ((base)->PSR)
#define LPTMR_CMR_REG(base) ((base)->CMR)
#define LPTMR_CNR_REG(base) ((base)->CNR)
/*!
* @}
*/ /* end of group LPTMR_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- LPTMR Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPTMR_Register_Masks LPTMR Register Masks
* @{
*/
/* CSR Bit Fields */
#define LPTMR_CSR_TEN_MASK 0x1u
#define LPTMR_CSR_TEN_SHIFT 0
#define LPTMR_CSR_TEN_WIDTH 1
#define LPTMR_CSR_TEN(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TEN_SHIFT))&LPTMR_CSR_TEN_MASK)
#define LPTMR_CSR_TMS_MASK 0x2u
#define LPTMR_CSR_TMS_SHIFT 1
#define LPTMR_CSR_TMS_WIDTH 1
#define LPTMR_CSR_TMS(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TMS_SHIFT))&LPTMR_CSR_TMS_MASK)
#define LPTMR_CSR_TFC_MASK 0x4u
#define LPTMR_CSR_TFC_SHIFT 2
#define LPTMR_CSR_TFC_WIDTH 1
#define LPTMR_CSR_TFC(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TFC_SHIFT))&LPTMR_CSR_TFC_MASK)
#define LPTMR_CSR_TPP_MASK 0x8u
#define LPTMR_CSR_TPP_SHIFT 3
#define LPTMR_CSR_TPP_WIDTH 1
#define LPTMR_CSR_TPP(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TPP_SHIFT))&LPTMR_CSR_TPP_MASK)
#define LPTMR_CSR_TPS_MASK 0x30u
#define LPTMR_CSR_TPS_SHIFT 4
#define LPTMR_CSR_TPS_WIDTH 2
#define LPTMR_CSR_TPS(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TPS_SHIFT))&LPTMR_CSR_TPS_MASK)
#define LPTMR_CSR_TIE_MASK 0x40u
#define LPTMR_CSR_TIE_SHIFT 6
#define LPTMR_CSR_TIE_WIDTH 1
#define LPTMR_CSR_TIE(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TIE_SHIFT))&LPTMR_CSR_TIE_MASK)
#define LPTMR_CSR_TCF_MASK 0x80u
#define LPTMR_CSR_TCF_SHIFT 7
#define LPTMR_CSR_TCF_WIDTH 1
#define LPTMR_CSR_TCF(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CSR_TCF_SHIFT))&LPTMR_CSR_TCF_MASK)
/* PSR Bit Fields */
#define LPTMR_PSR_PCS_MASK 0x3u
#define LPTMR_PSR_PCS_SHIFT 0
#define LPTMR_PSR_PCS_WIDTH 2
#define LPTMR_PSR_PCS(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_PSR_PCS_SHIFT))&LPTMR_PSR_PCS_MASK)
#define LPTMR_PSR_PBYP_MASK 0x4u
#define LPTMR_PSR_PBYP_SHIFT 2
#define LPTMR_PSR_PBYP_WIDTH 1
#define LPTMR_PSR_PBYP(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_PSR_PBYP_SHIFT))&LPTMR_PSR_PBYP_MASK)
#define LPTMR_PSR_PRESCALE_MASK 0x78u
#define LPTMR_PSR_PRESCALE_SHIFT 3
#define LPTMR_PSR_PRESCALE_WIDTH 4
#define LPTMR_PSR_PRESCALE(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_PSR_PRESCALE_SHIFT))&LPTMR_PSR_PRESCALE_MASK)
/* CMR Bit Fields */
#define LPTMR_CMR_COMPARE_MASK 0xFFFFu
#define LPTMR_CMR_COMPARE_SHIFT 0
#define LPTMR_CMR_COMPARE_WIDTH 16
#define LPTMR_CMR_COMPARE(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CMR_COMPARE_SHIFT))&LPTMR_CMR_COMPARE_MASK)
/* CNR Bit Fields */
#define LPTMR_CNR_COUNTER_MASK 0xFFFFu
#define LPTMR_CNR_COUNTER_SHIFT 0
#define LPTMR_CNR_COUNTER_WIDTH 16
#define LPTMR_CNR_COUNTER(x) (((uint32_t)(((uint32_t)(x))<<LPTMR_CNR_COUNTER_SHIFT))&LPTMR_CNR_COUNTER_MASK)
/*!
* @}
*/ /* end of group LPTMR_Register_Masks */
/* LPTMR - Peripheral instance base addresses */
/** Peripheral LPTMR0 base address */
#define LPTMR0_BASE (0x40040000u)
/** Peripheral LPTMR0 base pointer */
#define LPTMR0 ((LPTMR_Type *)LPTMR0_BASE)
#define LPTMR0_BASE_PTR (LPTMR0)
/** Array initializer of LPTMR peripheral base addresses */
#define LPTMR_BASE_ADDRS { LPTMR0_BASE }
/** Array initializer of LPTMR peripheral base pointers */
#define LPTMR_BASE_PTRS { LPTMR0 }
/** Interrupt vectors for the LPTMR peripheral type */
#define LPTMR_IRQS { LPTMR0_IRQn }
/* ----------------------------------------------------------------------------
-- LPTMR - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPTMR_Register_Accessor_Macros LPTMR - Register accessor macros
* @{
*/
/* LPTMR - Register instance definitions */
/* LPTMR0 */
#define LPTMR0_CSR LPTMR_CSR_REG(LPTMR0)
#define LPTMR0_PSR LPTMR_PSR_REG(LPTMR0)
#define LPTMR0_CMR LPTMR_CMR_REG(LPTMR0)
#define LPTMR0_CNR LPTMR_CNR_REG(LPTMR0)
/*!
* @}
*/ /* end of group LPTMR_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group LPTMR_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- LPUART Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPUART_Peripheral_Access_Layer LPUART Peripheral Access Layer
* @{
*/
/** LPUART - Register Layout Typedef */
typedef struct {
__IO uint32_t BAUD; /**< LPUART Baud Rate Register, offset: 0x0 */
__IO uint32_t STAT; /**< LPUART Status Register, offset: 0x4 */
__IO uint32_t CTRL; /**< LPUART Control Register, offset: 0x8 */
__IO uint32_t DATA; /**< LPUART Data Register, offset: 0xC */
__IO uint32_t MATCH; /**< LPUART Match Address Register, offset: 0x10 */
__IO uint32_t MODIR; /**< LPUART Modem IrDA Register, offset: 0x14 */
} LPUART_Type, *LPUART_MemMapPtr;
/* ----------------------------------------------------------------------------
-- LPUART - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPUART_Register_Accessor_Macros LPUART - Register accessor macros
* @{
*/
/* LPUART - Register accessors */
#define LPUART_BAUD_REG(base) ((base)->BAUD)
#define LPUART_STAT_REG(base) ((base)->STAT)
#define LPUART_CTRL_REG(base) ((base)->CTRL)
#define LPUART_DATA_REG(base) ((base)->DATA)
#define LPUART_MATCH_REG(base) ((base)->MATCH)
#define LPUART_MODIR_REG(base) ((base)->MODIR)
/*!
* @}
*/ /* end of group LPUART_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- LPUART Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPUART_Register_Masks LPUART Register Masks
* @{
*/
/* BAUD Bit Fields */
#define LPUART_BAUD_SBR_MASK 0x1FFFu
#define LPUART_BAUD_SBR_SHIFT 0
#define LPUART_BAUD_SBR_WIDTH 13
#define LPUART_BAUD_SBR(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_SBR_SHIFT))&LPUART_BAUD_SBR_MASK)
#define LPUART_BAUD_SBNS_MASK 0x2000u
#define LPUART_BAUD_SBNS_SHIFT 13
#define LPUART_BAUD_SBNS_WIDTH 1
#define LPUART_BAUD_SBNS(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_SBNS_SHIFT))&LPUART_BAUD_SBNS_MASK)
#define LPUART_BAUD_RXEDGIE_MASK 0x4000u
#define LPUART_BAUD_RXEDGIE_SHIFT 14
#define LPUART_BAUD_RXEDGIE_WIDTH 1
#define LPUART_BAUD_RXEDGIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_RXEDGIE_SHIFT))&LPUART_BAUD_RXEDGIE_MASK)
#define LPUART_BAUD_LBKDIE_MASK 0x8000u
#define LPUART_BAUD_LBKDIE_SHIFT 15
#define LPUART_BAUD_LBKDIE_WIDTH 1
#define LPUART_BAUD_LBKDIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_LBKDIE_SHIFT))&LPUART_BAUD_LBKDIE_MASK)
#define LPUART_BAUD_RESYNCDIS_MASK 0x10000u
#define LPUART_BAUD_RESYNCDIS_SHIFT 16
#define LPUART_BAUD_RESYNCDIS_WIDTH 1
#define LPUART_BAUD_RESYNCDIS(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_RESYNCDIS_SHIFT))&LPUART_BAUD_RESYNCDIS_MASK)
#define LPUART_BAUD_BOTHEDGE_MASK 0x20000u
#define LPUART_BAUD_BOTHEDGE_SHIFT 17
#define LPUART_BAUD_BOTHEDGE_WIDTH 1
#define LPUART_BAUD_BOTHEDGE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_BOTHEDGE_SHIFT))&LPUART_BAUD_BOTHEDGE_MASK)
#define LPUART_BAUD_MATCFG_MASK 0xC0000u
#define LPUART_BAUD_MATCFG_SHIFT 18
#define LPUART_BAUD_MATCFG_WIDTH 2
#define LPUART_BAUD_MATCFG(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_MATCFG_SHIFT))&LPUART_BAUD_MATCFG_MASK)
#define LPUART_BAUD_RDMAE_MASK 0x200000u
#define LPUART_BAUD_RDMAE_SHIFT 21
#define LPUART_BAUD_RDMAE_WIDTH 1
#define LPUART_BAUD_RDMAE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_RDMAE_SHIFT))&LPUART_BAUD_RDMAE_MASK)
#define LPUART_BAUD_TDMAE_MASK 0x800000u
#define LPUART_BAUD_TDMAE_SHIFT 23
#define LPUART_BAUD_TDMAE_WIDTH 1
#define LPUART_BAUD_TDMAE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_TDMAE_SHIFT))&LPUART_BAUD_TDMAE_MASK)
#define LPUART_BAUD_OSR_MASK 0x1F000000u
#define LPUART_BAUD_OSR_SHIFT 24
#define LPUART_BAUD_OSR_WIDTH 5
#define LPUART_BAUD_OSR(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_OSR_SHIFT))&LPUART_BAUD_OSR_MASK)
#define LPUART_BAUD_M10_MASK 0x20000000u
#define LPUART_BAUD_M10_SHIFT 29
#define LPUART_BAUD_M10_WIDTH 1
#define LPUART_BAUD_M10(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_M10_SHIFT))&LPUART_BAUD_M10_MASK)
#define LPUART_BAUD_MAEN2_MASK 0x40000000u
#define LPUART_BAUD_MAEN2_SHIFT 30
#define LPUART_BAUD_MAEN2_WIDTH 1
#define LPUART_BAUD_MAEN2(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_MAEN2_SHIFT))&LPUART_BAUD_MAEN2_MASK)
#define LPUART_BAUD_MAEN1_MASK 0x80000000u
#define LPUART_BAUD_MAEN1_SHIFT 31
#define LPUART_BAUD_MAEN1_WIDTH 1
#define LPUART_BAUD_MAEN1(x) (((uint32_t)(((uint32_t)(x))<<LPUART_BAUD_MAEN1_SHIFT))&LPUART_BAUD_MAEN1_MASK)
/* STAT Bit Fields */
#define LPUART_STAT_MA2F_MASK 0x4000u
#define LPUART_STAT_MA2F_SHIFT 14
#define LPUART_STAT_MA2F_WIDTH 1
#define LPUART_STAT_MA2F(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_MA2F_SHIFT))&LPUART_STAT_MA2F_MASK)
#define LPUART_STAT_MA1F_MASK 0x8000u
#define LPUART_STAT_MA1F_SHIFT 15
#define LPUART_STAT_MA1F_WIDTH 1
#define LPUART_STAT_MA1F(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_MA1F_SHIFT))&LPUART_STAT_MA1F_MASK)
#define LPUART_STAT_PF_MASK 0x10000u
#define LPUART_STAT_PF_SHIFT 16
#define LPUART_STAT_PF_WIDTH 1
#define LPUART_STAT_PF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_PF_SHIFT))&LPUART_STAT_PF_MASK)
#define LPUART_STAT_FE_MASK 0x20000u
#define LPUART_STAT_FE_SHIFT 17
#define LPUART_STAT_FE_WIDTH 1
#define LPUART_STAT_FE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_FE_SHIFT))&LPUART_STAT_FE_MASK)
#define LPUART_STAT_NF_MASK 0x40000u
#define LPUART_STAT_NF_SHIFT 18
#define LPUART_STAT_NF_WIDTH 1
#define LPUART_STAT_NF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_NF_SHIFT))&LPUART_STAT_NF_MASK)
#define LPUART_STAT_OR_MASK 0x80000u
#define LPUART_STAT_OR_SHIFT 19
#define LPUART_STAT_OR_WIDTH 1
#define LPUART_STAT_OR(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_OR_SHIFT))&LPUART_STAT_OR_MASK)
#define LPUART_STAT_IDLE_MASK 0x100000u
#define LPUART_STAT_IDLE_SHIFT 20
#define LPUART_STAT_IDLE_WIDTH 1
#define LPUART_STAT_IDLE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_IDLE_SHIFT))&LPUART_STAT_IDLE_MASK)
#define LPUART_STAT_RDRF_MASK 0x200000u
#define LPUART_STAT_RDRF_SHIFT 21
#define LPUART_STAT_RDRF_WIDTH 1
#define LPUART_STAT_RDRF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_RDRF_SHIFT))&LPUART_STAT_RDRF_MASK)
#define LPUART_STAT_TC_MASK 0x400000u
#define LPUART_STAT_TC_SHIFT 22
#define LPUART_STAT_TC_WIDTH 1
#define LPUART_STAT_TC(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_TC_SHIFT))&LPUART_STAT_TC_MASK)
#define LPUART_STAT_TDRE_MASK 0x800000u
#define LPUART_STAT_TDRE_SHIFT 23
#define LPUART_STAT_TDRE_WIDTH 1
#define LPUART_STAT_TDRE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_TDRE_SHIFT))&LPUART_STAT_TDRE_MASK)
#define LPUART_STAT_RAF_MASK 0x1000000u
#define LPUART_STAT_RAF_SHIFT 24
#define LPUART_STAT_RAF_WIDTH 1
#define LPUART_STAT_RAF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_RAF_SHIFT))&LPUART_STAT_RAF_MASK)
#define LPUART_STAT_LBKDE_MASK 0x2000000u
#define LPUART_STAT_LBKDE_SHIFT 25
#define LPUART_STAT_LBKDE_WIDTH 1
#define LPUART_STAT_LBKDE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_LBKDE_SHIFT))&LPUART_STAT_LBKDE_MASK)
#define LPUART_STAT_BRK13_MASK 0x4000000u
#define LPUART_STAT_BRK13_SHIFT 26
#define LPUART_STAT_BRK13_WIDTH 1
#define LPUART_STAT_BRK13(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_BRK13_SHIFT))&LPUART_STAT_BRK13_MASK)
#define LPUART_STAT_RWUID_MASK 0x8000000u
#define LPUART_STAT_RWUID_SHIFT 27
#define LPUART_STAT_RWUID_WIDTH 1
#define LPUART_STAT_RWUID(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_RWUID_SHIFT))&LPUART_STAT_RWUID_MASK)
#define LPUART_STAT_RXINV_MASK 0x10000000u
#define LPUART_STAT_RXINV_SHIFT 28
#define LPUART_STAT_RXINV_WIDTH 1
#define LPUART_STAT_RXINV(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_RXINV_SHIFT))&LPUART_STAT_RXINV_MASK)
#define LPUART_STAT_MSBF_MASK 0x20000000u
#define LPUART_STAT_MSBF_SHIFT 29
#define LPUART_STAT_MSBF_WIDTH 1
#define LPUART_STAT_MSBF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_MSBF_SHIFT))&LPUART_STAT_MSBF_MASK)
#define LPUART_STAT_RXEDGIF_MASK 0x40000000u
#define LPUART_STAT_RXEDGIF_SHIFT 30
#define LPUART_STAT_RXEDGIF_WIDTH 1
#define LPUART_STAT_RXEDGIF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_RXEDGIF_SHIFT))&LPUART_STAT_RXEDGIF_MASK)
#define LPUART_STAT_LBKDIF_MASK 0x80000000u
#define LPUART_STAT_LBKDIF_SHIFT 31
#define LPUART_STAT_LBKDIF_WIDTH 1
#define LPUART_STAT_LBKDIF(x) (((uint32_t)(((uint32_t)(x))<<LPUART_STAT_LBKDIF_SHIFT))&LPUART_STAT_LBKDIF_MASK)
/* CTRL Bit Fields */
#define LPUART_CTRL_PT_MASK 0x1u
#define LPUART_CTRL_PT_SHIFT 0
#define LPUART_CTRL_PT_WIDTH 1
#define LPUART_CTRL_PT(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_PT_SHIFT))&LPUART_CTRL_PT_MASK)
#define LPUART_CTRL_PE_MASK 0x2u
#define LPUART_CTRL_PE_SHIFT 1
#define LPUART_CTRL_PE_WIDTH 1
#define LPUART_CTRL_PE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_PE_SHIFT))&LPUART_CTRL_PE_MASK)
#define LPUART_CTRL_ILT_MASK 0x4u
#define LPUART_CTRL_ILT_SHIFT 2
#define LPUART_CTRL_ILT_WIDTH 1
#define LPUART_CTRL_ILT(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_ILT_SHIFT))&LPUART_CTRL_ILT_MASK)
#define LPUART_CTRL_WAKE_MASK 0x8u
#define LPUART_CTRL_WAKE_SHIFT 3
#define LPUART_CTRL_WAKE_WIDTH 1
#define LPUART_CTRL_WAKE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_WAKE_SHIFT))&LPUART_CTRL_WAKE_MASK)
#define LPUART_CTRL_M_MASK 0x10u
#define LPUART_CTRL_M_SHIFT 4
#define LPUART_CTRL_M_WIDTH 1
#define LPUART_CTRL_M(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_M_SHIFT))&LPUART_CTRL_M_MASK)
#define LPUART_CTRL_RSRC_MASK 0x20u
#define LPUART_CTRL_RSRC_SHIFT 5
#define LPUART_CTRL_RSRC_WIDTH 1
#define LPUART_CTRL_RSRC(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_RSRC_SHIFT))&LPUART_CTRL_RSRC_MASK)
#define LPUART_CTRL_DOZEEN_MASK 0x40u
#define LPUART_CTRL_DOZEEN_SHIFT 6
#define LPUART_CTRL_DOZEEN_WIDTH 1
#define LPUART_CTRL_DOZEEN(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_DOZEEN_SHIFT))&LPUART_CTRL_DOZEEN_MASK)
#define LPUART_CTRL_LOOPS_MASK 0x80u
#define LPUART_CTRL_LOOPS_SHIFT 7
#define LPUART_CTRL_LOOPS_WIDTH 1
#define LPUART_CTRL_LOOPS(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_LOOPS_SHIFT))&LPUART_CTRL_LOOPS_MASK)
#define LPUART_CTRL_IDLECFG_MASK 0x700u
#define LPUART_CTRL_IDLECFG_SHIFT 8
#define LPUART_CTRL_IDLECFG_WIDTH 3
#define LPUART_CTRL_IDLECFG(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_IDLECFG_SHIFT))&LPUART_CTRL_IDLECFG_MASK)
#define LPUART_CTRL_MA2IE_MASK 0x4000u
#define LPUART_CTRL_MA2IE_SHIFT 14
#define LPUART_CTRL_MA2IE_WIDTH 1
#define LPUART_CTRL_MA2IE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_MA2IE_SHIFT))&LPUART_CTRL_MA2IE_MASK)
#define LPUART_CTRL_MA1IE_MASK 0x8000u
#define LPUART_CTRL_MA1IE_SHIFT 15
#define LPUART_CTRL_MA1IE_WIDTH 1
#define LPUART_CTRL_MA1IE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_MA1IE_SHIFT))&LPUART_CTRL_MA1IE_MASK)
#define LPUART_CTRL_SBK_MASK 0x10000u
#define LPUART_CTRL_SBK_SHIFT 16
#define LPUART_CTRL_SBK_WIDTH 1
#define LPUART_CTRL_SBK(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_SBK_SHIFT))&LPUART_CTRL_SBK_MASK)
#define LPUART_CTRL_RWU_MASK 0x20000u
#define LPUART_CTRL_RWU_SHIFT 17
#define LPUART_CTRL_RWU_WIDTH 1
#define LPUART_CTRL_RWU(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_RWU_SHIFT))&LPUART_CTRL_RWU_MASK)
#define LPUART_CTRL_RE_MASK 0x40000u
#define LPUART_CTRL_RE_SHIFT 18
#define LPUART_CTRL_RE_WIDTH 1
#define LPUART_CTRL_RE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_RE_SHIFT))&LPUART_CTRL_RE_MASK)
#define LPUART_CTRL_TE_MASK 0x80000u
#define LPUART_CTRL_TE_SHIFT 19
#define LPUART_CTRL_TE_WIDTH 1
#define LPUART_CTRL_TE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_TE_SHIFT))&LPUART_CTRL_TE_MASK)
#define LPUART_CTRL_ILIE_MASK 0x100000u
#define LPUART_CTRL_ILIE_SHIFT 20
#define LPUART_CTRL_ILIE_WIDTH 1
#define LPUART_CTRL_ILIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_ILIE_SHIFT))&LPUART_CTRL_ILIE_MASK)
#define LPUART_CTRL_RIE_MASK 0x200000u
#define LPUART_CTRL_RIE_SHIFT 21
#define LPUART_CTRL_RIE_WIDTH 1
#define LPUART_CTRL_RIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_RIE_SHIFT))&LPUART_CTRL_RIE_MASK)
#define LPUART_CTRL_TCIE_MASK 0x400000u
#define LPUART_CTRL_TCIE_SHIFT 22
#define LPUART_CTRL_TCIE_WIDTH 1
#define LPUART_CTRL_TCIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_TCIE_SHIFT))&LPUART_CTRL_TCIE_MASK)
#define LPUART_CTRL_TIE_MASK 0x800000u
#define LPUART_CTRL_TIE_SHIFT 23
#define LPUART_CTRL_TIE_WIDTH 1
#define LPUART_CTRL_TIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_TIE_SHIFT))&LPUART_CTRL_TIE_MASK)
#define LPUART_CTRL_PEIE_MASK 0x1000000u
#define LPUART_CTRL_PEIE_SHIFT 24
#define LPUART_CTRL_PEIE_WIDTH 1
#define LPUART_CTRL_PEIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_PEIE_SHIFT))&LPUART_CTRL_PEIE_MASK)
#define LPUART_CTRL_FEIE_MASK 0x2000000u
#define LPUART_CTRL_FEIE_SHIFT 25
#define LPUART_CTRL_FEIE_WIDTH 1
#define LPUART_CTRL_FEIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_FEIE_SHIFT))&LPUART_CTRL_FEIE_MASK)
#define LPUART_CTRL_NEIE_MASK 0x4000000u
#define LPUART_CTRL_NEIE_SHIFT 26
#define LPUART_CTRL_NEIE_WIDTH 1
#define LPUART_CTRL_NEIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_NEIE_SHIFT))&LPUART_CTRL_NEIE_MASK)
#define LPUART_CTRL_ORIE_MASK 0x8000000u
#define LPUART_CTRL_ORIE_SHIFT 27
#define LPUART_CTRL_ORIE_WIDTH 1
#define LPUART_CTRL_ORIE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_ORIE_SHIFT))&LPUART_CTRL_ORIE_MASK)
#define LPUART_CTRL_TXINV_MASK 0x10000000u
#define LPUART_CTRL_TXINV_SHIFT 28
#define LPUART_CTRL_TXINV_WIDTH 1
#define LPUART_CTRL_TXINV(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_TXINV_SHIFT))&LPUART_CTRL_TXINV_MASK)
#define LPUART_CTRL_TXDIR_MASK 0x20000000u
#define LPUART_CTRL_TXDIR_SHIFT 29
#define LPUART_CTRL_TXDIR_WIDTH 1
#define LPUART_CTRL_TXDIR(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_TXDIR_SHIFT))&LPUART_CTRL_TXDIR_MASK)
#define LPUART_CTRL_R9T8_MASK 0x40000000u
#define LPUART_CTRL_R9T8_SHIFT 30
#define LPUART_CTRL_R9T8_WIDTH 1
#define LPUART_CTRL_R9T8(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_R9T8_SHIFT))&LPUART_CTRL_R9T8_MASK)
#define LPUART_CTRL_R8T9_MASK 0x80000000u
#define LPUART_CTRL_R8T9_SHIFT 31
#define LPUART_CTRL_R8T9_WIDTH 1
#define LPUART_CTRL_R8T9(x) (((uint32_t)(((uint32_t)(x))<<LPUART_CTRL_R8T9_SHIFT))&LPUART_CTRL_R8T9_MASK)
/* DATA Bit Fields */
#define LPUART_DATA_R0T0_MASK 0x1u
#define LPUART_DATA_R0T0_SHIFT 0
#define LPUART_DATA_R0T0_WIDTH 1
#define LPUART_DATA_R0T0(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R0T0_SHIFT))&LPUART_DATA_R0T0_MASK)
#define LPUART_DATA_R1T1_MASK 0x2u
#define LPUART_DATA_R1T1_SHIFT 1
#define LPUART_DATA_R1T1_WIDTH 1
#define LPUART_DATA_R1T1(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R1T1_SHIFT))&LPUART_DATA_R1T1_MASK)
#define LPUART_DATA_R2T2_MASK 0x4u
#define LPUART_DATA_R2T2_SHIFT 2
#define LPUART_DATA_R2T2_WIDTH 1
#define LPUART_DATA_R2T2(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R2T2_SHIFT))&LPUART_DATA_R2T2_MASK)
#define LPUART_DATA_R3T3_MASK 0x8u
#define LPUART_DATA_R3T3_SHIFT 3
#define LPUART_DATA_R3T3_WIDTH 1
#define LPUART_DATA_R3T3(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R3T3_SHIFT))&LPUART_DATA_R3T3_MASK)
#define LPUART_DATA_R4T4_MASK 0x10u
#define LPUART_DATA_R4T4_SHIFT 4
#define LPUART_DATA_R4T4_WIDTH 1
#define LPUART_DATA_R4T4(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R4T4_SHIFT))&LPUART_DATA_R4T4_MASK)
#define LPUART_DATA_R5T5_MASK 0x20u
#define LPUART_DATA_R5T5_SHIFT 5
#define LPUART_DATA_R5T5_WIDTH 1
#define LPUART_DATA_R5T5(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R5T5_SHIFT))&LPUART_DATA_R5T5_MASK)
#define LPUART_DATA_R6T6_MASK 0x40u
#define LPUART_DATA_R6T6_SHIFT 6
#define LPUART_DATA_R6T6_WIDTH 1
#define LPUART_DATA_R6T6(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R6T6_SHIFT))&LPUART_DATA_R6T6_MASK)
#define LPUART_DATA_R7T7_MASK 0x80u
#define LPUART_DATA_R7T7_SHIFT 7
#define LPUART_DATA_R7T7_WIDTH 1
#define LPUART_DATA_R7T7(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R7T7_SHIFT))&LPUART_DATA_R7T7_MASK)
#define LPUART_DATA_R8T8_MASK 0x100u
#define LPUART_DATA_R8T8_SHIFT 8
#define LPUART_DATA_R8T8_WIDTH 1
#define LPUART_DATA_R8T8(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R8T8_SHIFT))&LPUART_DATA_R8T8_MASK)
#define LPUART_DATA_R9T9_MASK 0x200u
#define LPUART_DATA_R9T9_SHIFT 9
#define LPUART_DATA_R9T9_WIDTH 1
#define LPUART_DATA_R9T9(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_R9T9_SHIFT))&LPUART_DATA_R9T9_MASK)
#define LPUART_DATA_IDLINE_MASK 0x800u
#define LPUART_DATA_IDLINE_SHIFT 11
#define LPUART_DATA_IDLINE_WIDTH 1
#define LPUART_DATA_IDLINE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_IDLINE_SHIFT))&LPUART_DATA_IDLINE_MASK)
#define LPUART_DATA_RXEMPT_MASK 0x1000u
#define LPUART_DATA_RXEMPT_SHIFT 12
#define LPUART_DATA_RXEMPT_WIDTH 1
#define LPUART_DATA_RXEMPT(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_RXEMPT_SHIFT))&LPUART_DATA_RXEMPT_MASK)
#define LPUART_DATA_FRETSC_MASK 0x2000u
#define LPUART_DATA_FRETSC_SHIFT 13
#define LPUART_DATA_FRETSC_WIDTH 1
#define LPUART_DATA_FRETSC(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_FRETSC_SHIFT))&LPUART_DATA_FRETSC_MASK)
#define LPUART_DATA_PARITYE_MASK 0x4000u
#define LPUART_DATA_PARITYE_SHIFT 14
#define LPUART_DATA_PARITYE_WIDTH 1
#define LPUART_DATA_PARITYE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_PARITYE_SHIFT))&LPUART_DATA_PARITYE_MASK)
#define LPUART_DATA_NOISY_MASK 0x8000u
#define LPUART_DATA_NOISY_SHIFT 15
#define LPUART_DATA_NOISY_WIDTH 1
#define LPUART_DATA_NOISY(x) (((uint32_t)(((uint32_t)(x))<<LPUART_DATA_NOISY_SHIFT))&LPUART_DATA_NOISY_MASK)
/* MATCH Bit Fields */
#define LPUART_MATCH_MA1_MASK 0x3FFu
#define LPUART_MATCH_MA1_SHIFT 0
#define LPUART_MATCH_MA1_WIDTH 10
#define LPUART_MATCH_MA1(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MATCH_MA1_SHIFT))&LPUART_MATCH_MA1_MASK)
#define LPUART_MATCH_MA2_MASK 0x3FF0000u
#define LPUART_MATCH_MA2_SHIFT 16
#define LPUART_MATCH_MA2_WIDTH 10
#define LPUART_MATCH_MA2(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MATCH_MA2_SHIFT))&LPUART_MATCH_MA2_MASK)
/* MODIR Bit Fields */
#define LPUART_MODIR_TXCTSE_MASK 0x1u
#define LPUART_MODIR_TXCTSE_SHIFT 0
#define LPUART_MODIR_TXCTSE_WIDTH 1
#define LPUART_MODIR_TXCTSE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_TXCTSE_SHIFT))&LPUART_MODIR_TXCTSE_MASK)
#define LPUART_MODIR_TXRTSE_MASK 0x2u
#define LPUART_MODIR_TXRTSE_SHIFT 1
#define LPUART_MODIR_TXRTSE_WIDTH 1
#define LPUART_MODIR_TXRTSE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_TXRTSE_SHIFT))&LPUART_MODIR_TXRTSE_MASK)
#define LPUART_MODIR_TXRTSPOL_MASK 0x4u
#define LPUART_MODIR_TXRTSPOL_SHIFT 2
#define LPUART_MODIR_TXRTSPOL_WIDTH 1
#define LPUART_MODIR_TXRTSPOL(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_TXRTSPOL_SHIFT))&LPUART_MODIR_TXRTSPOL_MASK)
#define LPUART_MODIR_RXRTSE_MASK 0x8u
#define LPUART_MODIR_RXRTSE_SHIFT 3
#define LPUART_MODIR_RXRTSE_WIDTH 1
#define LPUART_MODIR_RXRTSE(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_RXRTSE_SHIFT))&LPUART_MODIR_RXRTSE_MASK)
#define LPUART_MODIR_TXCTSC_MASK 0x10u
#define LPUART_MODIR_TXCTSC_SHIFT 4
#define LPUART_MODIR_TXCTSC_WIDTH 1
#define LPUART_MODIR_TXCTSC(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_TXCTSC_SHIFT))&LPUART_MODIR_TXCTSC_MASK)
#define LPUART_MODIR_TXCTSSRC_MASK 0x20u
#define LPUART_MODIR_TXCTSSRC_SHIFT 5
#define LPUART_MODIR_TXCTSSRC_WIDTH 1
#define LPUART_MODIR_TXCTSSRC(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_TXCTSSRC_SHIFT))&LPUART_MODIR_TXCTSSRC_MASK)
#define LPUART_MODIR_TNP_MASK 0x30000u
#define LPUART_MODIR_TNP_SHIFT 16
#define LPUART_MODIR_TNP_WIDTH 2
#define LPUART_MODIR_TNP(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_TNP_SHIFT))&LPUART_MODIR_TNP_MASK)
#define LPUART_MODIR_IREN_MASK 0x40000u
#define LPUART_MODIR_IREN_SHIFT 18
#define LPUART_MODIR_IREN_WIDTH 1
#define LPUART_MODIR_IREN(x) (((uint32_t)(((uint32_t)(x))<<LPUART_MODIR_IREN_SHIFT))&LPUART_MODIR_IREN_MASK)
/*!
* @}
*/ /* end of group LPUART_Register_Masks */
/* LPUART - Peripheral instance base addresses */
/** Peripheral LPUART0 base address */
#define LPUART0_BASE (0x40054000u)
/** Peripheral LPUART0 base pointer */
#define LPUART0 ((LPUART_Type *)LPUART0_BASE)
#define LPUART0_BASE_PTR (LPUART0)
/** Array initializer of LPUART peripheral base addresses */
#define LPUART_BASE_ADDRS { LPUART0_BASE }
/** Array initializer of LPUART peripheral base pointers */
#define LPUART_BASE_PTRS { LPUART0 }
/** Interrupt vectors for the LPUART peripheral type */
#define LPUART_RX_TX_IRQS { LPUART0_IRQn }
#define LPUART_ERR_IRQS { LPUART0_IRQn }
/* ----------------------------------------------------------------------------
-- LPUART - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LPUART_Register_Accessor_Macros LPUART - Register accessor macros
* @{
*/
/* LPUART - Register instance definitions */
/* LPUART0 */
#define LPUART0_BAUD LPUART_BAUD_REG(LPUART0)
#define LPUART0_STAT LPUART_STAT_REG(LPUART0)
#define LPUART0_CTRL LPUART_CTRL_REG(LPUART0)
#define LPUART0_DATA LPUART_DATA_REG(LPUART0)
#define LPUART0_MATCH LPUART_MATCH_REG(LPUART0)
#define LPUART0_MODIR LPUART_MODIR_REG(LPUART0)
/*!
* @}
*/ /* end of group LPUART_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group LPUART_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- LTC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup LTC_Peripheral_Access_Layer LTC Peripheral Access Layer
* @{
*/
/** LTC - Register Layout Typedef */
typedef struct {
union { /* offset: 0x0 */
__IO uint32_t MD; /**< LTC Mode Register (non-PKHA/non-RNG use), offset: 0x0 */
};
uint8_t RESERVED_0[4];
__IO uint32_t KS; /**< LTC Key Size Register, offset: 0x8 */
uint8_t RESERVED_1[4];
__IO uint32_t DS; /**< LTC Data Size Register, offset: 0x10 */
uint8_t RESERVED_2[4];
__IO uint32_t ICVS; /**< LTC ICV Size Register, offset: 0x18 */
uint8_t RESERVED_3[20];
__IO uint32_t COM; /**< LTC Command Register, offset: 0x30 */
__IO uint32_t CTL; /**< LTC Control Register, offset: 0x34 */
uint8_t RESERVED_4[8];
__IO uint32_t CW; /**< LTC Clear Written Register, offset: 0x40 */
uint8_t RESERVED_5[4];
__IO uint32_t STA; /**< LTC Status Register, offset: 0x48 */
__I uint32_t ESTA; /**< LTC Error Status Register, offset: 0x4C */
uint8_t RESERVED_6[8];
__IO uint32_t AADSZ; /**< LTC AAD Size Register, offset: 0x58 */
uint8_t RESERVED_7[164];
__IO uint32_t CTX[16]; /**< LTC Context Register, array offset: 0x100, array step: 0x4 */
uint8_t RESERVED_8[192];
__IO uint32_t KEY[4]; /**< LTC Key Registers, array offset: 0x200, array step: 0x4 */
uint8_t RESERVED_9[1456];
__I uint32_t FIFOSTA; /**< LTC FIFO Status Register, offset: 0x7C0 */
uint8_t RESERVED_10[28];
__O uint32_t IFIFO; /**< LTC Input Data FIFO, offset: 0x7E0 */
uint8_t RESERVED_11[12];
__I uint32_t OFIFO; /**< LTC Output Data FIFO, offset: 0x7F0 */
uint8_t RESERVED_12[252];
__I uint32_t VID1; /**< LTC Version ID Register, offset: 0x8F0 */
uint8_t RESERVED_13[4];
__I uint32_t CHAVID; /**< LTC CHA Version ID Register, offset: 0x8F8 */
} LTC_Type, *LTC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- LTC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LTC_Register_Accessor_Macros LTC - Register accessor macros
* @{
*/
/* LTC - Register accessors */
#define LTC_MD_REG(base) ((base)->MD)
#define LTC_KS_REG(base) ((base)->KS)
#define LTC_DS_REG(base) ((base)->DS)
#define LTC_ICVS_REG(base) ((base)->ICVS)
#define LTC_COM_REG(base) ((base)->COM)
#define LTC_CTL_REG(base) ((base)->CTL)
#define LTC_CW_REG(base) ((base)->CW)
#define LTC_STA_REG(base) ((base)->STA)
#define LTC_ESTA_REG(base) ((base)->ESTA)
#define LTC_AADSZ_REG(base) ((base)->AADSZ)
#define LTC_CTX_REG(base,index) ((base)->CTX[index])
#define LTC_CTX_COUNT 16
#define LTC_KEY_REG(base,index) ((base)->KEY[index])
#define LTC_KEY_COUNT 4
#define LTC_FIFOSTA_REG(base) ((base)->FIFOSTA)
#define LTC_IFIFO_REG(base) ((base)->IFIFO)
#define LTC_OFIFO_REG(base) ((base)->OFIFO)
#define LTC_VID1_REG(base) ((base)->VID1)
#define LTC_CHAVID_REG(base) ((base)->CHAVID)
/*!
* @}
*/ /* end of group LTC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- LTC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup LTC_Register_Masks LTC Register Masks
* @{
*/
/* MD Bit Fields */
#define LTC_MD_ENC_MASK 0x1u
#define LTC_MD_ENC_SHIFT 0
#define LTC_MD_ENC_WIDTH 1
#define LTC_MD_ENC(x) (((uint32_t)(((uint32_t)(x))<<LTC_MD_ENC_SHIFT))<C_MD_ENC_MASK)
#define LTC_MD_ICV_TEST_MASK 0x2u
#define LTC_MD_ICV_TEST_SHIFT 1
#define LTC_MD_ICV_TEST_WIDTH 1
#define LTC_MD_ICV_TEST(x) (((uint32_t)(((uint32_t)(x))<<LTC_MD_ICV_TEST_SHIFT))<C_MD_ICV_TEST_MASK)
#define LTC_MD_AS_MASK 0xCu
#define LTC_MD_AS_SHIFT 2
#define LTC_MD_AS_WIDTH 2
#define LTC_MD_AS(x) (((uint32_t)(((uint32_t)(x))<<LTC_MD_AS_SHIFT))<C_MD_AS_MASK)
#define LTC_MD_AAI_MASK 0x1FF0u
#define LTC_MD_AAI_SHIFT 4
#define LTC_MD_AAI_WIDTH 9
#define LTC_MD_AAI(x) (((uint32_t)(((uint32_t)(x))<<LTC_MD_AAI_SHIFT))<C_MD_AAI_MASK)
#define LTC_MD_ALG_MASK 0xFF0000u
#define LTC_MD_ALG_SHIFT 16
#define LTC_MD_ALG_WIDTH 8
#define LTC_MD_ALG(x) (((uint32_t)(((uint32_t)(x))<<LTC_MD_ALG_SHIFT))<C_MD_ALG_MASK)
/* KS Bit Fields */
#define LTC_KS_KS_MASK 0xFFFFFFFFu
#define LTC_KS_KS_SHIFT 0
#define LTC_KS_KS_WIDTH 32
#define LTC_KS_KS(x) (((uint32_t)(((uint32_t)(x))<<LTC_KS_KS_SHIFT))<C_KS_KS_MASK)
/* DS Bit Fields */
#define LTC_DS_DS_MASK 0xFFFu
#define LTC_DS_DS_SHIFT 0
#define LTC_DS_DS_WIDTH 12
#define LTC_DS_DS(x) (((uint32_t)(((uint32_t)(x))<<LTC_DS_DS_SHIFT))<C_DS_DS_MASK)
/* ICVS Bit Fields */
#define LTC_ICVS_ICVS_MASK 0x1Fu
#define LTC_ICVS_ICVS_SHIFT 0
#define LTC_ICVS_ICVS_WIDTH 5
#define LTC_ICVS_ICVS(x) (((uint32_t)(((uint32_t)(x))<<LTC_ICVS_ICVS_SHIFT))<C_ICVS_ICVS_MASK)
/* COM Bit Fields */
#define LTC_COM_ALL_MASK 0x1u
#define LTC_COM_ALL_SHIFT 0
#define LTC_COM_ALL_WIDTH 1
#define LTC_COM_ALL(x) (((uint32_t)(((uint32_t)(x))<<LTC_COM_ALL_SHIFT))<C_COM_ALL_MASK)
#define LTC_COM_AES_MASK 0x2u
#define LTC_COM_AES_SHIFT 1
#define LTC_COM_AES_WIDTH 1
#define LTC_COM_AES(x) (((uint32_t)(((uint32_t)(x))<<LTC_COM_AES_SHIFT))<C_COM_AES_MASK)
/* CTL Bit Fields */
#define LTC_CTL_IM_MASK 0x1u
#define LTC_CTL_IM_SHIFT 0
#define LTC_CTL_IM_WIDTH 1
#define LTC_CTL_IM(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_IM_SHIFT))<C_CTL_IM_MASK)
#define LTC_CTL_IFE_MASK 0x100u
#define LTC_CTL_IFE_SHIFT 8
#define LTC_CTL_IFE_WIDTH 1
#define LTC_CTL_IFE(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_IFE_SHIFT))<C_CTL_IFE_MASK)
#define LTC_CTL_IFR_MASK 0x200u
#define LTC_CTL_IFR_SHIFT 9
#define LTC_CTL_IFR_WIDTH 1
#define LTC_CTL_IFR(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_IFR_SHIFT))<C_CTL_IFR_MASK)
#define LTC_CTL_OFE_MASK 0x1000u
#define LTC_CTL_OFE_SHIFT 12
#define LTC_CTL_OFE_WIDTH 1
#define LTC_CTL_OFE(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_OFE_SHIFT))<C_CTL_OFE_MASK)
#define LTC_CTL_OFR_MASK 0x2000u
#define LTC_CTL_OFR_SHIFT 13
#define LTC_CTL_OFR_WIDTH 1
#define LTC_CTL_OFR(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_OFR_SHIFT))<C_CTL_OFR_MASK)
#define LTC_CTL_IFS_MASK 0x10000u
#define LTC_CTL_IFS_SHIFT 16
#define LTC_CTL_IFS_WIDTH 1
#define LTC_CTL_IFS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_IFS_SHIFT))<C_CTL_IFS_MASK)
#define LTC_CTL_OFS_MASK 0x20000u
#define LTC_CTL_OFS_SHIFT 17
#define LTC_CTL_OFS_WIDTH 1
#define LTC_CTL_OFS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_OFS_SHIFT))<C_CTL_OFS_MASK)
#define LTC_CTL_KIS_MASK 0x100000u
#define LTC_CTL_KIS_SHIFT 20
#define LTC_CTL_KIS_WIDTH 1
#define LTC_CTL_KIS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_KIS_SHIFT))<C_CTL_KIS_MASK)
#define LTC_CTL_KOS_MASK 0x200000u
#define LTC_CTL_KOS_SHIFT 21
#define LTC_CTL_KOS_WIDTH 1
#define LTC_CTL_KOS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_KOS_SHIFT))<C_CTL_KOS_MASK)
#define LTC_CTL_CIS_MASK 0x400000u
#define LTC_CTL_CIS_SHIFT 22
#define LTC_CTL_CIS_WIDTH 1
#define LTC_CTL_CIS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_CIS_SHIFT))<C_CTL_CIS_MASK)
#define LTC_CTL_COS_MASK 0x800000u
#define LTC_CTL_COS_SHIFT 23
#define LTC_CTL_COS_WIDTH 1
#define LTC_CTL_COS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_COS_SHIFT))<C_CTL_COS_MASK)
#define LTC_CTL_KAL_MASK 0x80000000u
#define LTC_CTL_KAL_SHIFT 31
#define LTC_CTL_KAL_WIDTH 1
#define LTC_CTL_KAL(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTL_KAL_SHIFT))<C_CTL_KAL_MASK)
/* CW Bit Fields */
#define LTC_CW_CM_MASK 0x1u
#define LTC_CW_CM_SHIFT 0
#define LTC_CW_CM_WIDTH 1
#define LTC_CW_CM(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_CM_SHIFT))<C_CW_CM_MASK)
#define LTC_CW_CDS_MASK 0x4u
#define LTC_CW_CDS_SHIFT 2
#define LTC_CW_CDS_WIDTH 1
#define LTC_CW_CDS(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_CDS_SHIFT))<C_CW_CDS_MASK)
#define LTC_CW_CICV_MASK 0x8u
#define LTC_CW_CICV_SHIFT 3
#define LTC_CW_CICV_WIDTH 1
#define LTC_CW_CICV(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_CICV_SHIFT))<C_CW_CICV_MASK)
#define LTC_CW_CCR_MASK 0x20u
#define LTC_CW_CCR_SHIFT 5
#define LTC_CW_CCR_WIDTH 1
#define LTC_CW_CCR(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_CCR_SHIFT))<C_CW_CCR_MASK)
#define LTC_CW_CKR_MASK 0x40u
#define LTC_CW_CKR_SHIFT 6
#define LTC_CW_CKR_WIDTH 1
#define LTC_CW_CKR(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_CKR_SHIFT))<C_CW_CKR_MASK)
#define LTC_CW_COF_MASK 0x40000000u
#define LTC_CW_COF_SHIFT 30
#define LTC_CW_COF_WIDTH 1
#define LTC_CW_COF(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_COF_SHIFT))<C_CW_COF_MASK)
#define LTC_CW_CIF_MASK 0x80000000u
#define LTC_CW_CIF_SHIFT 31
#define LTC_CW_CIF_WIDTH 1
#define LTC_CW_CIF(x) (((uint32_t)(((uint32_t)(x))<<LTC_CW_CIF_SHIFT))<C_CW_CIF_MASK)
/* STA Bit Fields */
#define LTC_STA_AB_MASK 0x2u
#define LTC_STA_AB_SHIFT 1
#define LTC_STA_AB_WIDTH 1
#define LTC_STA_AB(x) (((uint32_t)(((uint32_t)(x))<<LTC_STA_AB_SHIFT))<C_STA_AB_MASK)
#define LTC_STA_DI_MASK 0x10000u
#define LTC_STA_DI_SHIFT 16
#define LTC_STA_DI_WIDTH 1
#define LTC_STA_DI(x) (((uint32_t)(((uint32_t)(x))<<LTC_STA_DI_SHIFT))<C_STA_DI_MASK)
#define LTC_STA_EI_MASK 0x100000u
#define LTC_STA_EI_SHIFT 20
#define LTC_STA_EI_WIDTH 1
#define LTC_STA_EI(x) (((uint32_t)(((uint32_t)(x))<<LTC_STA_EI_SHIFT))<C_STA_EI_MASK)
/* ESTA Bit Fields */
#define LTC_ESTA_ERRID1_MASK 0xFu
#define LTC_ESTA_ERRID1_SHIFT 0
#define LTC_ESTA_ERRID1_WIDTH 4
#define LTC_ESTA_ERRID1(x) (((uint32_t)(((uint32_t)(x))<<LTC_ESTA_ERRID1_SHIFT))<C_ESTA_ERRID1_MASK)
#define LTC_ESTA_CL1_MASK 0xF00u
#define LTC_ESTA_CL1_SHIFT 8
#define LTC_ESTA_CL1_WIDTH 4
#define LTC_ESTA_CL1(x) (((uint32_t)(((uint32_t)(x))<<LTC_ESTA_CL1_SHIFT))<C_ESTA_CL1_MASK)
/* AADSZ Bit Fields */
#define LTC_AADSZ_AADSZ_MASK 0xFu
#define LTC_AADSZ_AADSZ_SHIFT 0
#define LTC_AADSZ_AADSZ_WIDTH 4
#define LTC_AADSZ_AADSZ(x) (((uint32_t)(((uint32_t)(x))<<LTC_AADSZ_AADSZ_SHIFT))<C_AADSZ_AADSZ_MASK)
#define LTC_AADSZ_AL_MASK 0x80000000u
#define LTC_AADSZ_AL_SHIFT 31
#define LTC_AADSZ_AL_WIDTH 1
#define LTC_AADSZ_AL(x) (((uint32_t)(((uint32_t)(x))<<LTC_AADSZ_AL_SHIFT))<C_AADSZ_AL_MASK)
/* CTX Bit Fields */
#define LTC_CTX_CTX_MASK 0xFFFFFFFFu
#define LTC_CTX_CTX_SHIFT 0
#define LTC_CTX_CTX_WIDTH 32
#define LTC_CTX_CTX(x) (((uint32_t)(((uint32_t)(x))<<LTC_CTX_CTX_SHIFT))<C_CTX_CTX_MASK)
/* KEY Bit Fields */
#define LTC_KEY_KEY_MASK 0xFFFFFFFFu
#define LTC_KEY_KEY_SHIFT 0
#define LTC_KEY_KEY_WIDTH 32
#define LTC_KEY_KEY(x) (((uint32_t)(((uint32_t)(x))<<LTC_KEY_KEY_SHIFT))<C_KEY_KEY_MASK)
/* FIFOSTA Bit Fields */
#define LTC_FIFOSTA_IFL_MASK 0x7Fu
#define LTC_FIFOSTA_IFL_SHIFT 0
#define LTC_FIFOSTA_IFL_WIDTH 7
#define LTC_FIFOSTA_IFL(x) (((uint32_t)(((uint32_t)(x))<<LTC_FIFOSTA_IFL_SHIFT))<C_FIFOSTA_IFL_MASK)
#define LTC_FIFOSTA_IFF_MASK 0x8000u
#define LTC_FIFOSTA_IFF_SHIFT 15
#define LTC_FIFOSTA_IFF_WIDTH 1
#define LTC_FIFOSTA_IFF(x) (((uint32_t)(((uint32_t)(x))<<LTC_FIFOSTA_IFF_SHIFT))<C_FIFOSTA_IFF_MASK)
#define LTC_FIFOSTA_OFL_MASK 0x7F0000u
#define LTC_FIFOSTA_OFL_SHIFT 16
#define LTC_FIFOSTA_OFL_WIDTH 7
#define LTC_FIFOSTA_OFL(x) (((uint32_t)(((uint32_t)(x))<<LTC_FIFOSTA_OFL_SHIFT))<C_FIFOSTA_OFL_MASK)
#define LTC_FIFOSTA_OFF_MASK 0x80000000u
#define LTC_FIFOSTA_OFF_SHIFT 31
#define LTC_FIFOSTA_OFF_WIDTH 1
#define LTC_FIFOSTA_OFF(x) (((uint32_t)(((uint32_t)(x))<<LTC_FIFOSTA_OFF_SHIFT))<C_FIFOSTA_OFF_MASK)
/* IFIFO Bit Fields */
#define LTC_IFIFO_IFIFO_MASK 0xFFFFFFFFu
#define LTC_IFIFO_IFIFO_SHIFT 0
#define LTC_IFIFO_IFIFO_WIDTH 32
#define LTC_IFIFO_IFIFO(x) (((uint32_t)(((uint32_t)(x))<<LTC_IFIFO_IFIFO_SHIFT))<C_IFIFO_IFIFO_MASK)
/* OFIFO Bit Fields */
#define LTC_OFIFO_OFIFO_MASK 0xFFFFFFFFu
#define LTC_OFIFO_OFIFO_SHIFT 0
#define LTC_OFIFO_OFIFO_WIDTH 32
#define LTC_OFIFO_OFIFO(x) (((uint32_t)(((uint32_t)(x))<<LTC_OFIFO_OFIFO_SHIFT))<C_OFIFO_OFIFO_MASK)
/* VID1 Bit Fields */
#define LTC_VID1_MIN_REV_MASK 0xFFu
#define LTC_VID1_MIN_REV_SHIFT 0
#define LTC_VID1_MIN_REV_WIDTH 8
#define LTC_VID1_MIN_REV(x) (((uint32_t)(((uint32_t)(x))<<LTC_VID1_MIN_REV_SHIFT))<C_VID1_MIN_REV_MASK)
#define LTC_VID1_MAJ_REV_MASK 0xFF00u
#define LTC_VID1_MAJ_REV_SHIFT 8
#define LTC_VID1_MAJ_REV_WIDTH 8
#define LTC_VID1_MAJ_REV(x) (((uint32_t)(((uint32_t)(x))<<LTC_VID1_MAJ_REV_SHIFT))<C_VID1_MAJ_REV_MASK)
#define LTC_VID1_IP_ID_MASK 0xFFFF0000u
#define LTC_VID1_IP_ID_SHIFT 16
#define LTC_VID1_IP_ID_WIDTH 16
#define LTC_VID1_IP_ID(x) (((uint32_t)(((uint32_t)(x))<<LTC_VID1_IP_ID_SHIFT))<C_VID1_IP_ID_MASK)
/* CHAVID Bit Fields */
#define LTC_CHAVID_AESREV_MASK 0xFu
#define LTC_CHAVID_AESREV_SHIFT 0
#define LTC_CHAVID_AESREV_WIDTH 4
#define LTC_CHAVID_AESREV(x) (((uint32_t)(((uint32_t)(x))<<LTC_CHAVID_AESREV_SHIFT))<C_CHAVID_AESREV_MASK)
#define LTC_CHAVID_AESVID_MASK 0xF0u
#define LTC_CHAVID_AESVID_SHIFT 4
#define LTC_CHAVID_AESVID_WIDTH 4
#define LTC_CHAVID_AESVID(x) (((uint32_t)(((uint32_t)(x))<<LTC_CHAVID_AESVID_SHIFT))<C_CHAVID_AESVID_MASK)
/*!
* @}
*/ /* end of group LTC_Register_Masks */
/* LTC - Peripheral instance base addresses */
/** Peripheral LTC0 base address */
#define LTC0_BASE (0x40058000u)
/** Peripheral LTC0 base pointer */
#define LTC0 ((LTC_Type *)LTC0_BASE)
#define LTC0_BASE_PTR (LTC0)
/** Array initializer of LTC peripheral base addresses */
#define LTC_BASE_ADDRS { LTC0_BASE }
/** Array initializer of LTC peripheral base pointers */
#define LTC_BASE_PTRS { LTC0 }
/** Interrupt vectors for the LTC peripheral type */
#define LTC_IRQS { LTC0_IRQn }
/* ----------------------------------------------------------------------------
-- LTC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup LTC_Register_Accessor_Macros LTC - Register accessor macros
* @{
*/
/* LTC - Register instance definitions */
/* LTC0 */
#define LTC_MD LTC_MD_REG(LTC0)
#define LTC_KS LTC_KS_REG(LTC0)
#define LTC_DS LTC_DS_REG(LTC0)
#define LTC_ICVS LTC_ICVS_REG(LTC0)
#define LTC_COM LTC_COM_REG(LTC0)
#define LTC_CTL LTC_CTL_REG(LTC0)
#define LTC_CW LTC_CW_REG(LTC0)
#define LTC_STA LTC_STA_REG(LTC0)
#define LTC_ESTA LTC_ESTA_REG(LTC0)
#define LTC_AADSZ LTC_AADSZ_REG(LTC0)
#define LTC_CTX_0 LTC_CTX_REG(LTC0,0)
#define LTC_CTX_1 LTC_CTX_REG(LTC0,1)
#define LTC_CTX_2 LTC_CTX_REG(LTC0,2)
#define LTC_CTX_3 LTC_CTX_REG(LTC0,3)
#define LTC_CTX_4 LTC_CTX_REG(LTC0,4)
#define LTC_CTX_5 LTC_CTX_REG(LTC0,5)
#define LTC_CTX_6 LTC_CTX_REG(LTC0,6)
#define LTC_CTX_7 LTC_CTX_REG(LTC0,7)
#define LTC_CTX_8 LTC_CTX_REG(LTC0,8)
#define LTC_CTX_9 LTC_CTX_REG(LTC0,9)
#define LTC_CTX_10 LTC_CTX_REG(LTC0,10)
#define LTC_CTX_11 LTC_CTX_REG(LTC0,11)
#define LTC_CTX_12 LTC_CTX_REG(LTC0,12)
#define LTC_CTX_13 LTC_CTX_REG(LTC0,13)
#define LTC_CTX_14 LTC_CTX_REG(LTC0,14)
#define LTC_CTX_15 LTC_CTX_REG(LTC0,15)
#define LTC_KEY_0 LTC_KEY_REG(LTC0,0)
#define LTC_KEY_1 LTC_KEY_REG(LTC0,1)
#define LTC_KEY_2 LTC_KEY_REG(LTC0,2)
#define LTC_KEY_3 LTC_KEY_REG(LTC0,3)
#define LTC_FIFOSTA LTC_FIFOSTA_REG(LTC0)
#define LTC_IFIFO LTC_IFIFO_REG(LTC0)
#define LTC_OFIFO LTC_OFIFO_REG(LTC0)
#define LTC_VID1 LTC_VID1_REG(LTC0)
#define LTC_CHAVID LTC_CHAVID_REG(LTC0)
/* LTC - Register array accessors */
#define LTC0_CTX(index) LTC_CTX_REG(LTC0,index)
#define LTC0_KEY(index) LTC_KEY_REG(LTC0,index)
/*!
* @}
*/ /* end of group LTC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group LTC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- MCG Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCG_Peripheral_Access_Layer MCG Peripheral Access Layer
* @{
*/
/** MCG - Register Layout Typedef */
typedef struct {
__IO uint8_t C1; /**< MCG Control 1 Register, offset: 0x0 */
__IO uint8_t C2; /**< MCG Control 2 Register, offset: 0x1 */
__IO uint8_t C3; /**< MCG Control 3 Register, offset: 0x2 */
__IO uint8_t C4; /**< MCG Control 4 Register, offset: 0x3 */
__I uint8_t C5; /**< MCG Control 5 Register, offset: 0x4 */
__IO uint8_t C6; /**< MCG Control 6 Register, offset: 0x5 */
__I uint8_t S; /**< MCG Status Register, offset: 0x6 */
uint8_t RESERVED_0[1];
__IO uint8_t SC; /**< MCG Status and Control Register, offset: 0x8 */
uint8_t RESERVED_1[1];
__IO uint8_t ATCVH; /**< MCG Auto Trim Compare Value High Register, offset: 0xA */
__IO uint8_t ATCVL; /**< MCG Auto Trim Compare Value Low Register, offset: 0xB */
__IO uint8_t C7; /**< MCG Control 7 Register, offset: 0xC */
__IO uint8_t C8; /**< MCG Control 8 Register, offset: 0xD */
} MCG_Type, *MCG_MemMapPtr;
/* ----------------------------------------------------------------------------
-- MCG - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCG_Register_Accessor_Macros MCG - Register accessor macros
* @{
*/
/* MCG - Register accessors */
#define MCG_C1_REG(base) ((base)->C1)
#define MCG_C2_REG(base) ((base)->C2)
#define MCG_C3_REG(base) ((base)->C3)
#define MCG_C4_REG(base) ((base)->C4)
#define MCG_C5_REG(base) ((base)->C5)
#define MCG_C6_REG(base) ((base)->C6)
#define MCG_S_REG(base) ((base)->S)
#define MCG_SC_REG(base) ((base)->SC)
#define MCG_ATCVH_REG(base) ((base)->ATCVH)
#define MCG_ATCVL_REG(base) ((base)->ATCVL)
#define MCG_C7_REG(base) ((base)->C7)
#define MCG_C8_REG(base) ((base)->C8)
/*!
* @}
*/ /* end of group MCG_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- MCG Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCG_Register_Masks MCG Register Masks
* @{
*/
/* C1 Bit Fields */
#define MCG_C1_IREFSTEN_MASK 0x1u
#define MCG_C1_IREFSTEN_SHIFT 0
#define MCG_C1_IREFSTEN_WIDTH 1
#define MCG_C1_IREFSTEN(x) (((uint8_t)(((uint8_t)(x))<<MCG_C1_IREFSTEN_SHIFT))&MCG_C1_IREFSTEN_MASK)
#define MCG_C1_IRCLKEN_MASK 0x2u
#define MCG_C1_IRCLKEN_SHIFT 1
#define MCG_C1_IRCLKEN_WIDTH 1
#define MCG_C1_IRCLKEN(x) (((uint8_t)(((uint8_t)(x))<<MCG_C1_IRCLKEN_SHIFT))&MCG_C1_IRCLKEN_MASK)
#define MCG_C1_IREFS_MASK 0x4u
#define MCG_C1_IREFS_SHIFT 2
#define MCG_C1_IREFS_WIDTH 1
#define MCG_C1_IREFS(x) (((uint8_t)(((uint8_t)(x))<<MCG_C1_IREFS_SHIFT))&MCG_C1_IREFS_MASK)
#define MCG_C1_FRDIV_MASK 0x38u
#define MCG_C1_FRDIV_SHIFT 3
#define MCG_C1_FRDIV_WIDTH 3
#define MCG_C1_FRDIV(x) (((uint8_t)(((uint8_t)(x))<<MCG_C1_FRDIV_SHIFT))&MCG_C1_FRDIV_MASK)
#define MCG_C1_CLKS_MASK 0xC0u
#define MCG_C1_CLKS_SHIFT 6
#define MCG_C1_CLKS_WIDTH 2
#define MCG_C1_CLKS(x) (((uint8_t)(((uint8_t)(x))<<MCG_C1_CLKS_SHIFT))&MCG_C1_CLKS_MASK)
/* C2 Bit Fields */
#define MCG_C2_IRCS_MASK 0x1u
#define MCG_C2_IRCS_SHIFT 0
#define MCG_C2_IRCS_WIDTH 1
#define MCG_C2_IRCS(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_IRCS_SHIFT))&MCG_C2_IRCS_MASK)
#define MCG_C2_LP_MASK 0x2u
#define MCG_C2_LP_SHIFT 1
#define MCG_C2_LP_WIDTH 1
#define MCG_C2_LP(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_LP_SHIFT))&MCG_C2_LP_MASK)
#define MCG_C2_EREFS_MASK 0x4u
#define MCG_C2_EREFS_SHIFT 2
#define MCG_C2_EREFS_WIDTH 1
#define MCG_C2_EREFS(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_EREFS_SHIFT))&MCG_C2_EREFS_MASK)
#define MCG_C2_HGO_MASK 0x8u
#define MCG_C2_HGO_SHIFT 3
#define MCG_C2_HGO_WIDTH 1
#define MCG_C2_HGO(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_HGO_SHIFT))&MCG_C2_HGO_MASK)
#define MCG_C2_RANGE_MASK 0x30u
#define MCG_C2_RANGE_SHIFT 4
#define MCG_C2_RANGE_WIDTH 2
#define MCG_C2_RANGE(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_RANGE_SHIFT))&MCG_C2_RANGE_MASK)
#define MCG_C2_FCFTRIM_MASK 0x40u
#define MCG_C2_FCFTRIM_SHIFT 6
#define MCG_C2_FCFTRIM_WIDTH 1
#define MCG_C2_FCFTRIM(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_FCFTRIM_SHIFT))&MCG_C2_FCFTRIM_MASK)
#define MCG_C2_LOCRE0_MASK 0x80u
#define MCG_C2_LOCRE0_SHIFT 7
#define MCG_C2_LOCRE0_WIDTH 1
#define MCG_C2_LOCRE0(x) (((uint8_t)(((uint8_t)(x))<<MCG_C2_LOCRE0_SHIFT))&MCG_C2_LOCRE0_MASK)
/* C3 Bit Fields */
#define MCG_C3_SCTRIM_MASK 0xFFu
#define MCG_C3_SCTRIM_SHIFT 0
#define MCG_C3_SCTRIM_WIDTH 8
#define MCG_C3_SCTRIM(x) (((uint8_t)(((uint8_t)(x))<<MCG_C3_SCTRIM_SHIFT))&MCG_C3_SCTRIM_MASK)
/* C4 Bit Fields */
#define MCG_C4_SCFTRIM_MASK 0x1u
#define MCG_C4_SCFTRIM_SHIFT 0
#define MCG_C4_SCFTRIM_WIDTH 1
#define MCG_C4_SCFTRIM(x) (((uint8_t)(((uint8_t)(x))<<MCG_C4_SCFTRIM_SHIFT))&MCG_C4_SCFTRIM_MASK)
#define MCG_C4_FCTRIM_MASK 0x1Eu
#define MCG_C4_FCTRIM_SHIFT 1
#define MCG_C4_FCTRIM_WIDTH 4
#define MCG_C4_FCTRIM(x) (((uint8_t)(((uint8_t)(x))<<MCG_C4_FCTRIM_SHIFT))&MCG_C4_FCTRIM_MASK)
#define MCG_C4_DRST_DRS_MASK 0x60u
#define MCG_C4_DRST_DRS_SHIFT 5
#define MCG_C4_DRST_DRS_WIDTH 2
#define MCG_C4_DRST_DRS(x) (((uint8_t)(((uint8_t)(x))<<MCG_C4_DRST_DRS_SHIFT))&MCG_C4_DRST_DRS_MASK)
#define MCG_C4_DMX32_MASK 0x80u
#define MCG_C4_DMX32_SHIFT 7
#define MCG_C4_DMX32_WIDTH 1
#define MCG_C4_DMX32(x) (((uint8_t)(((uint8_t)(x))<<MCG_C4_DMX32_SHIFT))&MCG_C4_DMX32_MASK)
/* C6 Bit Fields */
#define MCG_C6_CME_MASK 0x20u
#define MCG_C6_CME_SHIFT 5
#define MCG_C6_CME_WIDTH 1
#define MCG_C6_CME(x) (((uint8_t)(((uint8_t)(x))<<MCG_C6_CME_SHIFT))&MCG_C6_CME_MASK)
/* S Bit Fields */
#define MCG_S_IRCST_MASK 0x1u
#define MCG_S_IRCST_SHIFT 0
#define MCG_S_IRCST_WIDTH 1
#define MCG_S_IRCST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_IRCST_SHIFT))&MCG_S_IRCST_MASK)
#define MCG_S_OSCINIT0_MASK 0x2u
#define MCG_S_OSCINIT0_SHIFT 1
#define MCG_S_OSCINIT0_WIDTH 1
#define MCG_S_OSCINIT0(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_OSCINIT0_SHIFT))&MCG_S_OSCINIT0_MASK)
#define MCG_S_CLKST_MASK 0xCu
#define MCG_S_CLKST_SHIFT 2
#define MCG_S_CLKST_WIDTH 2
#define MCG_S_CLKST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_CLKST_SHIFT))&MCG_S_CLKST_MASK)
#define MCG_S_IREFST_MASK 0x10u
#define MCG_S_IREFST_SHIFT 4
#define MCG_S_IREFST_WIDTH 1
#define MCG_S_IREFST(x) (((uint8_t)(((uint8_t)(x))<<MCG_S_IREFST_SHIFT))&MCG_S_IREFST_MASK)
/* SC Bit Fields */
#define MCG_SC_LOCS0_MASK 0x1u
#define MCG_SC_LOCS0_SHIFT 0
#define MCG_SC_LOCS0_WIDTH 1
#define MCG_SC_LOCS0(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_LOCS0_SHIFT))&MCG_SC_LOCS0_MASK)
#define MCG_SC_FCRDIV_MASK 0xEu
#define MCG_SC_FCRDIV_SHIFT 1
#define MCG_SC_FCRDIV_WIDTH 3
#define MCG_SC_FCRDIV(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_FCRDIV_SHIFT))&MCG_SC_FCRDIV_MASK)
#define MCG_SC_FLTPRSRV_MASK 0x10u
#define MCG_SC_FLTPRSRV_SHIFT 4
#define MCG_SC_FLTPRSRV_WIDTH 1
#define MCG_SC_FLTPRSRV(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_FLTPRSRV_SHIFT))&MCG_SC_FLTPRSRV_MASK)
#define MCG_SC_ATMF_MASK 0x20u
#define MCG_SC_ATMF_SHIFT 5
#define MCG_SC_ATMF_WIDTH 1
#define MCG_SC_ATMF(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_ATMF_SHIFT))&MCG_SC_ATMF_MASK)
#define MCG_SC_ATMS_MASK 0x40u
#define MCG_SC_ATMS_SHIFT 6
#define MCG_SC_ATMS_WIDTH 1
#define MCG_SC_ATMS(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_ATMS_SHIFT))&MCG_SC_ATMS_MASK)
#define MCG_SC_ATME_MASK 0x80u
#define MCG_SC_ATME_SHIFT 7
#define MCG_SC_ATME_WIDTH 1
#define MCG_SC_ATME(x) (((uint8_t)(((uint8_t)(x))<<MCG_SC_ATME_SHIFT))&MCG_SC_ATME_MASK)
/* ATCVH Bit Fields */
#define MCG_ATCVH_ATCVH_MASK 0xFFu
#define MCG_ATCVH_ATCVH_SHIFT 0
#define MCG_ATCVH_ATCVH_WIDTH 8
#define MCG_ATCVH_ATCVH(x) (((uint8_t)(((uint8_t)(x))<<MCG_ATCVH_ATCVH_SHIFT))&MCG_ATCVH_ATCVH_MASK)
/* ATCVL Bit Fields */
#define MCG_ATCVL_ATCVL_MASK 0xFFu
#define MCG_ATCVL_ATCVL_SHIFT 0
#define MCG_ATCVL_ATCVL_WIDTH 8
#define MCG_ATCVL_ATCVL(x) (((uint8_t)(((uint8_t)(x))<<MCG_ATCVL_ATCVL_SHIFT))&MCG_ATCVL_ATCVL_MASK)
/* C7 Bit Fields */
#define MCG_C7_OSCSEL_MASK 0x1u
#define MCG_C7_OSCSEL_SHIFT 0
#define MCG_C7_OSCSEL_WIDTH 1
#define MCG_C7_OSCSEL(x) (((uint8_t)(((uint8_t)(x))<<MCG_C7_OSCSEL_SHIFT))&MCG_C7_OSCSEL_MASK)
/* C8 Bit Fields */
#define MCG_C8_LOCS1_MASK 0x1u
#define MCG_C8_LOCS1_SHIFT 0
#define MCG_C8_LOCS1_WIDTH 1
#define MCG_C8_LOCS1(x) (((uint8_t)(((uint8_t)(x))<<MCG_C8_LOCS1_SHIFT))&MCG_C8_LOCS1_MASK)
#define MCG_C8_CME1_MASK 0x20u
#define MCG_C8_CME1_SHIFT 5
#define MCG_C8_CME1_WIDTH 1
#define MCG_C8_CME1(x) (((uint8_t)(((uint8_t)(x))<<MCG_C8_CME1_SHIFT))&MCG_C8_CME1_MASK)
#define MCG_C8_LOCRE1_MASK 0x80u
#define MCG_C8_LOCRE1_SHIFT 7
#define MCG_C8_LOCRE1_WIDTH 1
#define MCG_C8_LOCRE1(x) (((uint8_t)(((uint8_t)(x))<<MCG_C8_LOCRE1_SHIFT))&MCG_C8_LOCRE1_MASK)
/*!
* @}
*/ /* end of group MCG_Register_Masks */
/* MCG - Peripheral instance base addresses */
/** Peripheral MCG base address */
#define MCG_BASE (0x40064000u)
/** Peripheral MCG base pointer */
#define MCG ((MCG_Type *)MCG_BASE)
#define MCG_BASE_PTR (MCG)
/** Array initializer of MCG peripheral base addresses */
#define MCG_BASE_ADDRS { MCG_BASE }
/** Array initializer of MCG peripheral base pointers */
#define MCG_BASE_PTRS { MCG }
/** Interrupt vectors for the MCG peripheral type */
#define MCG_IRQS { MCG_IRQn }
/* ----------------------------------------------------------------------------
-- MCG - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCG_Register_Accessor_Macros MCG - Register accessor macros
* @{
*/
/* MCG - Register instance definitions */
/* MCG */
#define MCG_C1 MCG_C1_REG(MCG)
#define MCG_C2 MCG_C2_REG(MCG)
#define MCG_C3 MCG_C3_REG(MCG)
#define MCG_C4 MCG_C4_REG(MCG)
#define MCG_C5 MCG_C5_REG(MCG)
#define MCG_C6 MCG_C6_REG(MCG)
#define MCG_S MCG_S_REG(MCG)
#define MCG_SC MCG_SC_REG(MCG)
#define MCG_ATCVH MCG_ATCVH_REG(MCG)
#define MCG_ATCVL MCG_ATCVL_REG(MCG)
#define MCG_C7 MCG_C7_REG(MCG)
#define MCG_C8 MCG_C8_REG(MCG)
/*!
* @}
*/ /* end of group MCG_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group MCG_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- MCM Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCM_Peripheral_Access_Layer MCM Peripheral Access Layer
* @{
*/
/** MCM - Register Layout Typedef */
typedef struct {
uint8_t RESERVED_0[8];
__I uint16_t PLASC; /**< Crossbar Switch (AXBS) Slave Configuration, offset: 0x8 */
__I uint16_t PLAMC; /**< Crossbar Switch (AXBS) Master Configuration, offset: 0xA */
__IO uint32_t PLACR; /**< Platform Control Register, offset: 0xC */
uint8_t RESERVED_1[48];
__IO uint32_t CPO; /**< Compute Operation Control Register, offset: 0x40 */
} MCM_Type, *MCM_MemMapPtr;
/* ----------------------------------------------------------------------------
-- MCM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCM_Register_Accessor_Macros MCM - Register accessor macros
* @{
*/
/* MCM - Register accessors */
#define MCM_PLASC_REG(base) ((base)->PLASC)
#define MCM_PLAMC_REG(base) ((base)->PLAMC)
#define MCM_PLACR_REG(base) ((base)->PLACR)
#define MCM_CPO_REG(base) ((base)->CPO)
/*!
* @}
*/ /* end of group MCM_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- MCM Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCM_Register_Masks MCM Register Masks
* @{
*/
/* PLASC Bit Fields */
#define MCM_PLASC_ASC_MASK 0xFFu
#define MCM_PLASC_ASC_SHIFT 0
#define MCM_PLASC_ASC_WIDTH 8
#define MCM_PLASC_ASC(x) (((uint16_t)(((uint16_t)(x))<<MCM_PLASC_ASC_SHIFT))&MCM_PLASC_ASC_MASK)
/* PLAMC Bit Fields */
#define MCM_PLAMC_AMC_MASK 0xFFu
#define MCM_PLAMC_AMC_SHIFT 0
#define MCM_PLAMC_AMC_WIDTH 8
#define MCM_PLAMC_AMC(x) (((uint16_t)(((uint16_t)(x))<<MCM_PLAMC_AMC_SHIFT))&MCM_PLAMC_AMC_MASK)
/* PLACR Bit Fields */
#define MCM_PLACR_ARB_MASK 0x200u
#define MCM_PLACR_ARB_SHIFT 9
#define MCM_PLACR_ARB_WIDTH 1
#define MCM_PLACR_ARB(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_ARB_SHIFT))&MCM_PLACR_ARB_MASK)
#define MCM_PLACR_CFCC_MASK 0x400u
#define MCM_PLACR_CFCC_SHIFT 10
#define MCM_PLACR_CFCC_WIDTH 1
#define MCM_PLACR_CFCC(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_CFCC_SHIFT))&MCM_PLACR_CFCC_MASK)
#define MCM_PLACR_DFCDA_MASK 0x800u
#define MCM_PLACR_DFCDA_SHIFT 11
#define MCM_PLACR_DFCDA_WIDTH 1
#define MCM_PLACR_DFCDA(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCDA_SHIFT))&MCM_PLACR_DFCDA_MASK)
#define MCM_PLACR_DFCIC_MASK 0x1000u
#define MCM_PLACR_DFCIC_SHIFT 12
#define MCM_PLACR_DFCIC_WIDTH 1
#define MCM_PLACR_DFCIC(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCIC_SHIFT))&MCM_PLACR_DFCIC_MASK)
#define MCM_PLACR_DFCC_MASK 0x2000u
#define MCM_PLACR_DFCC_SHIFT 13
#define MCM_PLACR_DFCC_WIDTH 1
#define MCM_PLACR_DFCC(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCC_SHIFT))&MCM_PLACR_DFCC_MASK)
#define MCM_PLACR_EFDS_MASK 0x4000u
#define MCM_PLACR_EFDS_SHIFT 14
#define MCM_PLACR_EFDS_WIDTH 1
#define MCM_PLACR_EFDS(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_EFDS_SHIFT))&MCM_PLACR_EFDS_MASK)
#define MCM_PLACR_DFCS_MASK 0x8000u
#define MCM_PLACR_DFCS_SHIFT 15
#define MCM_PLACR_DFCS_WIDTH 1
#define MCM_PLACR_DFCS(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_DFCS_SHIFT))&MCM_PLACR_DFCS_MASK)
#define MCM_PLACR_ESFC_MASK 0x10000u
#define MCM_PLACR_ESFC_SHIFT 16
#define MCM_PLACR_ESFC_WIDTH 1
#define MCM_PLACR_ESFC(x) (((uint32_t)(((uint32_t)(x))<<MCM_PLACR_ESFC_SHIFT))&MCM_PLACR_ESFC_MASK)
/* CPO Bit Fields */
#define MCM_CPO_CPOREQ_MASK 0x1u
#define MCM_CPO_CPOREQ_SHIFT 0
#define MCM_CPO_CPOREQ_WIDTH 1
#define MCM_CPO_CPOREQ(x) (((uint32_t)(((uint32_t)(x))<<MCM_CPO_CPOREQ_SHIFT))&MCM_CPO_CPOREQ_MASK)
#define MCM_CPO_CPOACK_MASK 0x2u
#define MCM_CPO_CPOACK_SHIFT 1
#define MCM_CPO_CPOACK_WIDTH 1
#define MCM_CPO_CPOACK(x) (((uint32_t)(((uint32_t)(x))<<MCM_CPO_CPOACK_SHIFT))&MCM_CPO_CPOACK_MASK)
#define MCM_CPO_CPOWOI_MASK 0x4u
#define MCM_CPO_CPOWOI_SHIFT 2
#define MCM_CPO_CPOWOI_WIDTH 1
#define MCM_CPO_CPOWOI(x) (((uint32_t)(((uint32_t)(x))<<MCM_CPO_CPOWOI_SHIFT))&MCM_CPO_CPOWOI_MASK)
/*!
* @}
*/ /* end of group MCM_Register_Masks */
/* MCM - Peripheral instance base addresses */
/** Peripheral MCM base address */
#define MCM_BASE (0xF0003000u)
/** Peripheral MCM base pointer */
#define MCM ((MCM_Type *)MCM_BASE)
#define MCM_BASE_PTR (MCM)
/** Array initializer of MCM peripheral base addresses */
#define MCM_BASE_ADDRS { MCM_BASE }
/** Array initializer of MCM peripheral base pointers */
#define MCM_BASE_PTRS { MCM }
/* ----------------------------------------------------------------------------
-- MCM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MCM_Register_Accessor_Macros MCM - Register accessor macros
* @{
*/
/* MCM - Register instance definitions */
/* MCM */
#define MCM_PLASC MCM_PLASC_REG(MCM)
#define MCM_PLAMC MCM_PLAMC_REG(MCM)
#define MCM_PLACR MCM_PLACR_REG(MCM)
#define MCM_CPO MCM_CPO_REG(MCM)
/*!
* @}
*/ /* end of group MCM_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group MCM_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- MTB Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTB_Peripheral_Access_Layer MTB Peripheral Access Layer
* @{
*/
/** MTB - Register Layout Typedef */
typedef struct {
__IO uint32_t POSITION; /**< MTB Position Register, offset: 0x0 */
__IO uint32_t MASTER; /**< MTB Master Register, offset: 0x4 */
__IO uint32_t FLOW; /**< MTB Flow Register, offset: 0x8 */
__I uint32_t BASE; /**< MTB Base Register, offset: 0xC */
uint8_t RESERVED_0[3824];
__I uint32_t MODECTRL; /**< Integration Mode Control Register, offset: 0xF00 */
uint8_t RESERVED_1[156];
__I uint32_t TAGSET; /**< Claim TAG Set Register, offset: 0xFA0 */
__I uint32_t TAGCLEAR; /**< Claim TAG Clear Register, offset: 0xFA4 */
uint8_t RESERVED_2[8];
__I uint32_t LOCKACCESS; /**< Lock Access Register, offset: 0xFB0 */
__I uint32_t LOCKSTAT; /**< Lock Status Register, offset: 0xFB4 */
__I uint32_t AUTHSTAT; /**< Authentication Status Register, offset: 0xFB8 */
__I uint32_t DEVICEARCH; /**< Device Architecture Register, offset: 0xFBC */
uint8_t RESERVED_3[8];
__I uint32_t DEVICECFG; /**< Device Configuration Register, offset: 0xFC8 */
__I uint32_t DEVICETYPID; /**< Device Type Identifier Register, offset: 0xFCC */
__I uint32_t PERIPHID[8]; /**< Peripheral ID Register, array offset: 0xFD0, array step: 0x4 */
__I uint32_t COMPID[4]; /**< Component ID Register, array offset: 0xFF0, array step: 0x4 */
} MTB_Type, *MTB_MemMapPtr;
/* ----------------------------------------------------------------------------
-- MTB - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTB_Register_Accessor_Macros MTB - Register accessor macros
* @{
*/
/* MTB - Register accessors */
#define MTB_POSITION_REG(base) ((base)->POSITION)
#define MTB_MASTER_REG(base) ((base)->MASTER)
#define MTB_FLOW_REG(base) ((base)->FLOW)
#define MTB_BASE_REG(base) ((base)->BASE)
#define MTB_MODECTRL_REG(base) ((base)->MODECTRL)
#define MTB_TAGSET_REG(base) ((base)->TAGSET)
#define MTB_TAGCLEAR_REG(base) ((base)->TAGCLEAR)
#define MTB_LOCKACCESS_REG(base) ((base)->LOCKACCESS)
#define MTB_LOCKSTAT_REG(base) ((base)->LOCKSTAT)
#define MTB_AUTHSTAT_REG(base) ((base)->AUTHSTAT)
#define MTB_DEVICEARCH_REG(base) ((base)->DEVICEARCH)
#define MTB_DEVICECFG_REG(base) ((base)->DEVICECFG)
#define MTB_DEVICETYPID_REG(base) ((base)->DEVICETYPID)
#define MTB_PERIPHID_REG(base,index) ((base)->PERIPHID[index])
#define MTB_PERIPHID_COUNT 8
#define MTB_COMPID_REG(base,index) ((base)->COMPID[index])
#define MTB_COMPID_COUNT 4
/*!
* @}
*/ /* end of group MTB_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- MTB Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTB_Register_Masks MTB Register Masks
* @{
*/
/* POSITION Bit Fields */
#define MTB_POSITION_WRAP_MASK 0x4u
#define MTB_POSITION_WRAP_SHIFT 2
#define MTB_POSITION_WRAP_WIDTH 1
#define MTB_POSITION_WRAP(x) (((uint32_t)(((uint32_t)(x))<<MTB_POSITION_WRAP_SHIFT))&MTB_POSITION_WRAP_MASK)
#define MTB_POSITION_POINTER_MASK 0xFFFFFFF8u
#define MTB_POSITION_POINTER_SHIFT 3
#define MTB_POSITION_POINTER_WIDTH 29
#define MTB_POSITION_POINTER(x) (((uint32_t)(((uint32_t)(x))<<MTB_POSITION_POINTER_SHIFT))&MTB_POSITION_POINTER_MASK)
/* MASTER Bit Fields */
#define MTB_MASTER_MASK_MASK 0x1Fu
#define MTB_MASTER_MASK_SHIFT 0
#define MTB_MASTER_MASK_WIDTH 5
#define MTB_MASTER_MASK(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_MASK_SHIFT))&MTB_MASTER_MASK_MASK)
#define MTB_MASTER_TSTARTEN_MASK 0x20u
#define MTB_MASTER_TSTARTEN_SHIFT 5
#define MTB_MASTER_TSTARTEN_WIDTH 1
#define MTB_MASTER_TSTARTEN(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_TSTARTEN_SHIFT))&MTB_MASTER_TSTARTEN_MASK)
#define MTB_MASTER_TSTOPEN_MASK 0x40u
#define MTB_MASTER_TSTOPEN_SHIFT 6
#define MTB_MASTER_TSTOPEN_WIDTH 1
#define MTB_MASTER_TSTOPEN(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_TSTOPEN_SHIFT))&MTB_MASTER_TSTOPEN_MASK)
#define MTB_MASTER_SFRWPRIV_MASK 0x80u
#define MTB_MASTER_SFRWPRIV_SHIFT 7
#define MTB_MASTER_SFRWPRIV_WIDTH 1
#define MTB_MASTER_SFRWPRIV(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_SFRWPRIV_SHIFT))&MTB_MASTER_SFRWPRIV_MASK)
#define MTB_MASTER_RAMPRIV_MASK 0x100u
#define MTB_MASTER_RAMPRIV_SHIFT 8
#define MTB_MASTER_RAMPRIV_WIDTH 1
#define MTB_MASTER_RAMPRIV(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_RAMPRIV_SHIFT))&MTB_MASTER_RAMPRIV_MASK)
#define MTB_MASTER_HALTREQ_MASK 0x200u
#define MTB_MASTER_HALTREQ_SHIFT 9
#define MTB_MASTER_HALTREQ_WIDTH 1
#define MTB_MASTER_HALTREQ(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_HALTREQ_SHIFT))&MTB_MASTER_HALTREQ_MASK)
#define MTB_MASTER_EN_MASK 0x80000000u
#define MTB_MASTER_EN_SHIFT 31
#define MTB_MASTER_EN_WIDTH 1
#define MTB_MASTER_EN(x) (((uint32_t)(((uint32_t)(x))<<MTB_MASTER_EN_SHIFT))&MTB_MASTER_EN_MASK)
/* FLOW Bit Fields */
#define MTB_FLOW_AUTOSTOP_MASK 0x1u
#define MTB_FLOW_AUTOSTOP_SHIFT 0
#define MTB_FLOW_AUTOSTOP_WIDTH 1
#define MTB_FLOW_AUTOSTOP(x) (((uint32_t)(((uint32_t)(x))<<MTB_FLOW_AUTOSTOP_SHIFT))&MTB_FLOW_AUTOSTOP_MASK)
#define MTB_FLOW_AUTOHALT_MASK 0x2u
#define MTB_FLOW_AUTOHALT_SHIFT 1
#define MTB_FLOW_AUTOHALT_WIDTH 1
#define MTB_FLOW_AUTOHALT(x) (((uint32_t)(((uint32_t)(x))<<MTB_FLOW_AUTOHALT_SHIFT))&MTB_FLOW_AUTOHALT_MASK)
#define MTB_FLOW_WATERMARK_MASK 0xFFFFFFF8u
#define MTB_FLOW_WATERMARK_SHIFT 3
#define MTB_FLOW_WATERMARK_WIDTH 29
#define MTB_FLOW_WATERMARK(x) (((uint32_t)(((uint32_t)(x))<<MTB_FLOW_WATERMARK_SHIFT))&MTB_FLOW_WATERMARK_MASK)
/* BASE Bit Fields */
#define MTB_BASE_BASEADDR_MASK 0xFFFFFFFFu
#define MTB_BASE_BASEADDR_SHIFT 0
#define MTB_BASE_BASEADDR_WIDTH 32
#define MTB_BASE_BASEADDR(x) (((uint32_t)(((uint32_t)(x))<<MTB_BASE_BASEADDR_SHIFT))&MTB_BASE_BASEADDR_MASK)
/* MODECTRL Bit Fields */
#define MTB_MODECTRL_MODECTRL_MASK 0xFFFFFFFFu
#define MTB_MODECTRL_MODECTRL_SHIFT 0
#define MTB_MODECTRL_MODECTRL_WIDTH 32
#define MTB_MODECTRL_MODECTRL(x) (((uint32_t)(((uint32_t)(x))<<MTB_MODECTRL_MODECTRL_SHIFT))&MTB_MODECTRL_MODECTRL_MASK)
/* TAGSET Bit Fields */
#define MTB_TAGSET_TAGSET_MASK 0xFFFFFFFFu
#define MTB_TAGSET_TAGSET_SHIFT 0
#define MTB_TAGSET_TAGSET_WIDTH 32
#define MTB_TAGSET_TAGSET(x) (((uint32_t)(((uint32_t)(x))<<MTB_TAGSET_TAGSET_SHIFT))&MTB_TAGSET_TAGSET_MASK)
/* TAGCLEAR Bit Fields */
#define MTB_TAGCLEAR_TAGCLEAR_MASK 0xFFFFFFFFu
#define MTB_TAGCLEAR_TAGCLEAR_SHIFT 0
#define MTB_TAGCLEAR_TAGCLEAR_WIDTH 32
#define MTB_TAGCLEAR_TAGCLEAR(x) (((uint32_t)(((uint32_t)(x))<<MTB_TAGCLEAR_TAGCLEAR_SHIFT))&MTB_TAGCLEAR_TAGCLEAR_MASK)
/* LOCKACCESS Bit Fields */
#define MTB_LOCKACCESS_LOCKACCESS_MASK 0xFFFFFFFFu
#define MTB_LOCKACCESS_LOCKACCESS_SHIFT 0
#define MTB_LOCKACCESS_LOCKACCESS_WIDTH 32
#define MTB_LOCKACCESS_LOCKACCESS(x) (((uint32_t)(((uint32_t)(x))<<MTB_LOCKACCESS_LOCKACCESS_SHIFT))&MTB_LOCKACCESS_LOCKACCESS_MASK)
/* LOCKSTAT Bit Fields */
#define MTB_LOCKSTAT_LOCKSTAT_MASK 0xFFFFFFFFu
#define MTB_LOCKSTAT_LOCKSTAT_SHIFT 0
#define MTB_LOCKSTAT_LOCKSTAT_WIDTH 32
#define MTB_LOCKSTAT_LOCKSTAT(x) (((uint32_t)(((uint32_t)(x))<<MTB_LOCKSTAT_LOCKSTAT_SHIFT))&MTB_LOCKSTAT_LOCKSTAT_MASK)
/* AUTHSTAT Bit Fields */
#define MTB_AUTHSTAT_BIT0_MASK 0x1u
#define MTB_AUTHSTAT_BIT0_SHIFT 0
#define MTB_AUTHSTAT_BIT0_WIDTH 1
#define MTB_AUTHSTAT_BIT0(x) (((uint32_t)(((uint32_t)(x))<<MTB_AUTHSTAT_BIT0_SHIFT))&MTB_AUTHSTAT_BIT0_MASK)
#define MTB_AUTHSTAT_BIT1_MASK 0x2u
#define MTB_AUTHSTAT_BIT1_SHIFT 1
#define MTB_AUTHSTAT_BIT1_WIDTH 1
#define MTB_AUTHSTAT_BIT1(x) (((uint32_t)(((uint32_t)(x))<<MTB_AUTHSTAT_BIT1_SHIFT))&MTB_AUTHSTAT_BIT1_MASK)
#define MTB_AUTHSTAT_BIT2_MASK 0x4u
#define MTB_AUTHSTAT_BIT2_SHIFT 2
#define MTB_AUTHSTAT_BIT2_WIDTH 1
#define MTB_AUTHSTAT_BIT2(x) (((uint32_t)(((uint32_t)(x))<<MTB_AUTHSTAT_BIT2_SHIFT))&MTB_AUTHSTAT_BIT2_MASK)
#define MTB_AUTHSTAT_BIT3_MASK 0x8u
#define MTB_AUTHSTAT_BIT3_SHIFT 3
#define MTB_AUTHSTAT_BIT3_WIDTH 1
#define MTB_AUTHSTAT_BIT3(x) (((uint32_t)(((uint32_t)(x))<<MTB_AUTHSTAT_BIT3_SHIFT))&MTB_AUTHSTAT_BIT3_MASK)
/* DEVICEARCH Bit Fields */
#define MTB_DEVICEARCH_DEVICEARCH_MASK 0xFFFFFFFFu
#define MTB_DEVICEARCH_DEVICEARCH_SHIFT 0
#define MTB_DEVICEARCH_DEVICEARCH_WIDTH 32
#define MTB_DEVICEARCH_DEVICEARCH(x) (((uint32_t)(((uint32_t)(x))<<MTB_DEVICEARCH_DEVICEARCH_SHIFT))&MTB_DEVICEARCH_DEVICEARCH_MASK)
/* DEVICECFG Bit Fields */
#define MTB_DEVICECFG_DEVICECFG_MASK 0xFFFFFFFFu
#define MTB_DEVICECFG_DEVICECFG_SHIFT 0
#define MTB_DEVICECFG_DEVICECFG_WIDTH 32
#define MTB_DEVICECFG_DEVICECFG(x) (((uint32_t)(((uint32_t)(x))<<MTB_DEVICECFG_DEVICECFG_SHIFT))&MTB_DEVICECFG_DEVICECFG_MASK)
/* DEVICETYPID Bit Fields */
#define MTB_DEVICETYPID_DEVICETYPID_MASK 0xFFFFFFFFu
#define MTB_DEVICETYPID_DEVICETYPID_SHIFT 0
#define MTB_DEVICETYPID_DEVICETYPID_WIDTH 32
#define MTB_DEVICETYPID_DEVICETYPID(x) (((uint32_t)(((uint32_t)(x))<<MTB_DEVICETYPID_DEVICETYPID_SHIFT))&MTB_DEVICETYPID_DEVICETYPID_MASK)
/* PERIPHID Bit Fields */
#define MTB_PERIPHID_PERIPHID_MASK 0xFFFFFFFFu
#define MTB_PERIPHID_PERIPHID_SHIFT 0
#define MTB_PERIPHID_PERIPHID_WIDTH 32
#define MTB_PERIPHID_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<MTB_PERIPHID_PERIPHID_SHIFT))&MTB_PERIPHID_PERIPHID_MASK)
/* COMPID Bit Fields */
#define MTB_COMPID_COMPID_MASK 0xFFFFFFFFu
#define MTB_COMPID_COMPID_SHIFT 0
#define MTB_COMPID_COMPID_WIDTH 32
#define MTB_COMPID_COMPID(x) (((uint32_t)(((uint32_t)(x))<<MTB_COMPID_COMPID_SHIFT))&MTB_COMPID_COMPID_MASK)
/*!
* @}
*/ /* end of group MTB_Register_Masks */
/* MTB - Peripheral instance base addresses */
/** Peripheral MTB base address */
#define MTB_BASE (0xF0000000u)
/** Peripheral MTB base pointer */
#define MTB ((MTB_Type *)MTB_BASE)
#define MTB_BASE_PTR (MTB)
/** Array initializer of MTB peripheral base addresses */
#define MTB_BASE_ADDRS { MTB_BASE }
/** Array initializer of MTB peripheral base pointers */
#define MTB_BASE_PTRS { MTB }
/* ----------------------------------------------------------------------------
-- MTB - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTB_Register_Accessor_Macros MTB - Register accessor macros
* @{
*/
/* MTB - Register instance definitions */
/* MTB */
#define MTB_POSITION MTB_POSITION_REG(MTB)
#define MTB_MASTER MTB_MASTER_REG(MTB)
#define MTB_FLOW MTB_FLOW_REG(MTB)
#define MTB_BASEr MTB_BASE_REG(MTB)
#define MTB_MODECTRL MTB_MODECTRL_REG(MTB)
#define MTB_TAGSET MTB_TAGSET_REG(MTB)
#define MTB_TAGCLEAR MTB_TAGCLEAR_REG(MTB)
#define MTB_LOCKACCESS MTB_LOCKACCESS_REG(MTB)
#define MTB_LOCKSTAT MTB_LOCKSTAT_REG(MTB)
#define MTB_AUTHSTAT MTB_AUTHSTAT_REG(MTB)
#define MTB_DEVICEARCH MTB_DEVICEARCH_REG(MTB)
#define MTB_DEVICECFG MTB_DEVICECFG_REG(MTB)
#define MTB_DEVICETYPID MTB_DEVICETYPID_REG(MTB)
#define MTB_PERIPHID4 MTB_PERIPHID_REG(MTB,0)
#define MTB_PERIPHID5 MTB_PERIPHID_REG(MTB,1)
#define MTB_PERIPHID6 MTB_PERIPHID_REG(MTB,2)
#define MTB_PERIPHID7 MTB_PERIPHID_REG(MTB,3)
#define MTB_PERIPHID0 MTB_PERIPHID_REG(MTB,4)
#define MTB_PERIPHID1 MTB_PERIPHID_REG(MTB,5)
#define MTB_PERIPHID2 MTB_PERIPHID_REG(MTB,6)
#define MTB_PERIPHID3 MTB_PERIPHID_REG(MTB,7)
#define MTB_COMPID0 MTB_COMPID_REG(MTB,0)
#define MTB_COMPID1 MTB_COMPID_REG(MTB,1)
#define MTB_COMPID2 MTB_COMPID_REG(MTB,2)
#define MTB_COMPID3 MTB_COMPID_REG(MTB,3)
/* MTB - Register array accessors */
#define MTB_PERIPHID(index) MTB_PERIPHID_REG(MTB,index)
#define MTB_COMPID(index) MTB_COMPID_REG(MTB,index)
/*!
* @}
*/ /* end of group MTB_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group MTB_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- MTBDWT Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTBDWT_Peripheral_Access_Layer MTBDWT Peripheral Access Layer
* @{
*/
/** MTBDWT - Register Layout Typedef */
typedef struct {
__I uint32_t CTRL; /**< MTB DWT Control Register, offset: 0x0 */
uint8_t RESERVED_0[28];
struct { /* offset: 0x20, array step: 0x10 */
__IO uint32_t COMP; /**< MTB_DWT Comparator Register, array offset: 0x20, array step: 0x10 */
__IO uint32_t MASK; /**< MTB_DWT Comparator Mask Register, array offset: 0x24, array step: 0x10 */
__IO uint32_t FCT; /**< MTB_DWT Comparator Function Register 0..MTB_DWT Comparator Function Register 1, array offset: 0x28, array step: 0x10 */
uint8_t RESERVED_0[4];
} COMPARATOR[2];
uint8_t RESERVED_1[448];
__IO uint32_t TBCTRL; /**< MTB_DWT Trace Buffer Control Register, offset: 0x200 */
uint8_t RESERVED_2[3524];
__I uint32_t DEVICECFG; /**< Device Configuration Register, offset: 0xFC8 */
__I uint32_t DEVICETYPID; /**< Device Type Identifier Register, offset: 0xFCC */
__I uint32_t PERIPHID[8]; /**< Peripheral ID Register, array offset: 0xFD0, array step: 0x4 */
__I uint32_t COMPID[4]; /**< Component ID Register, array offset: 0xFF0, array step: 0x4 */
} MTBDWT_Type, *MTBDWT_MemMapPtr;
/* ----------------------------------------------------------------------------
-- MTBDWT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTBDWT_Register_Accessor_Macros MTBDWT - Register accessor macros
* @{
*/
/* MTBDWT - Register accessors */
#define MTBDWT_CTRL_REG(base) ((base)->CTRL)
#define MTBDWT_COMP_REG(base,index) ((base)->COMPARATOR[index].COMP)
#define MTBDWT_COMP_COUNT 2
#define MTBDWT_MASK_REG(base,index) ((base)->COMPARATOR[index].MASK)
#define MTBDWT_MASK_COUNT 2
#define MTBDWT_FCT_REG(base,index) ((base)->COMPARATOR[index].FCT)
#define MTBDWT_FCT_COUNT 2
#define MTBDWT_TBCTRL_REG(base) ((base)->TBCTRL)
#define MTBDWT_DEVICECFG_REG(base) ((base)->DEVICECFG)
#define MTBDWT_DEVICETYPID_REG(base) ((base)->DEVICETYPID)
#define MTBDWT_PERIPHID_REG(base,index) ((base)->PERIPHID[index])
#define MTBDWT_PERIPHID_COUNT 8
#define MTBDWT_COMPID_REG(base,index) ((base)->COMPID[index])
#define MTBDWT_COMPID_COUNT 4
/*!
* @}
*/ /* end of group MTBDWT_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- MTBDWT Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTBDWT_Register_Masks MTBDWT Register Masks
* @{
*/
/* CTRL Bit Fields */
#define MTBDWT_CTRL_DWTCFGCTRL_MASK 0xFFFFFFFu
#define MTBDWT_CTRL_DWTCFGCTRL_SHIFT 0
#define MTBDWT_CTRL_DWTCFGCTRL_WIDTH 28
#define MTBDWT_CTRL_DWTCFGCTRL(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_CTRL_DWTCFGCTRL_SHIFT))&MTBDWT_CTRL_DWTCFGCTRL_MASK)
#define MTBDWT_CTRL_NUMCMP_MASK 0xF0000000u
#define MTBDWT_CTRL_NUMCMP_SHIFT 28
#define MTBDWT_CTRL_NUMCMP_WIDTH 4
#define MTBDWT_CTRL_NUMCMP(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_CTRL_NUMCMP_SHIFT))&MTBDWT_CTRL_NUMCMP_MASK)
/* COMP Bit Fields */
#define MTBDWT_COMP_COMP_MASK 0xFFFFFFFFu
#define MTBDWT_COMP_COMP_SHIFT 0
#define MTBDWT_COMP_COMP_WIDTH 32
#define MTBDWT_COMP_COMP(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_COMP_COMP_SHIFT))&MTBDWT_COMP_COMP_MASK)
/* MASK Bit Fields */
#define MTBDWT_MASK_MASK_MASK 0x1Fu
#define MTBDWT_MASK_MASK_SHIFT 0
#define MTBDWT_MASK_MASK_WIDTH 5
#define MTBDWT_MASK_MASK(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_MASK_MASK_SHIFT))&MTBDWT_MASK_MASK_MASK)
/* FCT Bit Fields */
#define MTBDWT_FCT_FUNCTION_MASK 0xFu
#define MTBDWT_FCT_FUNCTION_SHIFT 0
#define MTBDWT_FCT_FUNCTION_WIDTH 4
#define MTBDWT_FCT_FUNCTION(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_FCT_FUNCTION_SHIFT))&MTBDWT_FCT_FUNCTION_MASK)
#define MTBDWT_FCT_DATAVMATCH_MASK 0x100u
#define MTBDWT_FCT_DATAVMATCH_SHIFT 8
#define MTBDWT_FCT_DATAVMATCH_WIDTH 1
#define MTBDWT_FCT_DATAVMATCH(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_FCT_DATAVMATCH_SHIFT))&MTBDWT_FCT_DATAVMATCH_MASK)
#define MTBDWT_FCT_DATAVSIZE_MASK 0xC00u
#define MTBDWT_FCT_DATAVSIZE_SHIFT 10
#define MTBDWT_FCT_DATAVSIZE_WIDTH 2
#define MTBDWT_FCT_DATAVSIZE(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_FCT_DATAVSIZE_SHIFT))&MTBDWT_FCT_DATAVSIZE_MASK)
#define MTBDWT_FCT_DATAVADDR0_MASK 0xF000u
#define MTBDWT_FCT_DATAVADDR0_SHIFT 12
#define MTBDWT_FCT_DATAVADDR0_WIDTH 4
#define MTBDWT_FCT_DATAVADDR0(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_FCT_DATAVADDR0_SHIFT))&MTBDWT_FCT_DATAVADDR0_MASK)
#define MTBDWT_FCT_MATCHED_MASK 0x1000000u
#define MTBDWT_FCT_MATCHED_SHIFT 24
#define MTBDWT_FCT_MATCHED_WIDTH 1
#define MTBDWT_FCT_MATCHED(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_FCT_MATCHED_SHIFT))&MTBDWT_FCT_MATCHED_MASK)
/* TBCTRL Bit Fields */
#define MTBDWT_TBCTRL_ACOMP0_MASK 0x1u
#define MTBDWT_TBCTRL_ACOMP0_SHIFT 0
#define MTBDWT_TBCTRL_ACOMP0_WIDTH 1
#define MTBDWT_TBCTRL_ACOMP0(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_TBCTRL_ACOMP0_SHIFT))&MTBDWT_TBCTRL_ACOMP0_MASK)
#define MTBDWT_TBCTRL_ACOMP1_MASK 0x2u
#define MTBDWT_TBCTRL_ACOMP1_SHIFT 1
#define MTBDWT_TBCTRL_ACOMP1_WIDTH 1
#define MTBDWT_TBCTRL_ACOMP1(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_TBCTRL_ACOMP1_SHIFT))&MTBDWT_TBCTRL_ACOMP1_MASK)
#define MTBDWT_TBCTRL_NUMCOMP_MASK 0xF0000000u
#define MTBDWT_TBCTRL_NUMCOMP_SHIFT 28
#define MTBDWT_TBCTRL_NUMCOMP_WIDTH 4
#define MTBDWT_TBCTRL_NUMCOMP(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_TBCTRL_NUMCOMP_SHIFT))&MTBDWT_TBCTRL_NUMCOMP_MASK)
/* DEVICECFG Bit Fields */
#define MTBDWT_DEVICECFG_DEVICECFG_MASK 0xFFFFFFFFu
#define MTBDWT_DEVICECFG_DEVICECFG_SHIFT 0
#define MTBDWT_DEVICECFG_DEVICECFG_WIDTH 32
#define MTBDWT_DEVICECFG_DEVICECFG(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_DEVICECFG_DEVICECFG_SHIFT))&MTBDWT_DEVICECFG_DEVICECFG_MASK)
/* DEVICETYPID Bit Fields */
#define MTBDWT_DEVICETYPID_DEVICETYPID_MASK 0xFFFFFFFFu
#define MTBDWT_DEVICETYPID_DEVICETYPID_SHIFT 0
#define MTBDWT_DEVICETYPID_DEVICETYPID_WIDTH 32
#define MTBDWT_DEVICETYPID_DEVICETYPID(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_DEVICETYPID_DEVICETYPID_SHIFT))&MTBDWT_DEVICETYPID_DEVICETYPID_MASK)
/* PERIPHID Bit Fields */
#define MTBDWT_PERIPHID_PERIPHID_MASK 0xFFFFFFFFu
#define MTBDWT_PERIPHID_PERIPHID_SHIFT 0
#define MTBDWT_PERIPHID_PERIPHID_WIDTH 32
#define MTBDWT_PERIPHID_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_PERIPHID_PERIPHID_SHIFT))&MTBDWT_PERIPHID_PERIPHID_MASK)
/* COMPID Bit Fields */
#define MTBDWT_COMPID_COMPID_MASK 0xFFFFFFFFu
#define MTBDWT_COMPID_COMPID_SHIFT 0
#define MTBDWT_COMPID_COMPID_WIDTH 32
#define MTBDWT_COMPID_COMPID(x) (((uint32_t)(((uint32_t)(x))<<MTBDWT_COMPID_COMPID_SHIFT))&MTBDWT_COMPID_COMPID_MASK)
/*!
* @}
*/ /* end of group MTBDWT_Register_Masks */
/* MTBDWT - Peripheral instance base addresses */
/** Peripheral MTBDWT base address */
#define MTBDWT_BASE (0xF0001000u)
/** Peripheral MTBDWT base pointer */
#define MTBDWT ((MTBDWT_Type *)MTBDWT_BASE)
#define MTBDWT_BASE_PTR (MTBDWT)
/** Array initializer of MTBDWT peripheral base addresses */
#define MTBDWT_BASE_ADDRS { MTBDWT_BASE }
/** Array initializer of MTBDWT peripheral base pointers */
#define MTBDWT_BASE_PTRS { MTBDWT }
/* ----------------------------------------------------------------------------
-- MTBDWT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup MTBDWT_Register_Accessor_Macros MTBDWT - Register accessor macros
* @{
*/
/* MTBDWT - Register instance definitions */
/* MTBDWT */
#define MTBDWT_CTRL MTBDWT_CTRL_REG(MTBDWT)
#define MTBDWT_COMP0 MTBDWT_COMP_REG(MTBDWT,0)
#define MTBDWT_MASK0 MTBDWT_MASK_REG(MTBDWT,0)
#define MTBDWT_FCT0 MTBDWT_FCT_REG(MTBDWT,0)
#define MTBDWT_COMP1 MTBDWT_COMP_REG(MTBDWT,1)
#define MTBDWT_MASK1 MTBDWT_MASK_REG(MTBDWT,1)
#define MTBDWT_FCT1 MTBDWT_FCT_REG(MTBDWT,1)
#define MTBDWT_TBCTRL MTBDWT_TBCTRL_REG(MTBDWT)
#define MTBDWT_DEVICECFG MTBDWT_DEVICECFG_REG(MTBDWT)
#define MTBDWT_DEVICETYPID MTBDWT_DEVICETYPID_REG(MTBDWT)
#define MTBDWT_PERIPHID4 MTBDWT_PERIPHID_REG(MTBDWT,0)
#define MTBDWT_PERIPHID5 MTBDWT_PERIPHID_REG(MTBDWT,1)
#define MTBDWT_PERIPHID6 MTBDWT_PERIPHID_REG(MTBDWT,2)
#define MTBDWT_PERIPHID7 MTBDWT_PERIPHID_REG(MTBDWT,3)
#define MTBDWT_PERIPHID0 MTBDWT_PERIPHID_REG(MTBDWT,4)
#define MTBDWT_PERIPHID1 MTBDWT_PERIPHID_REG(MTBDWT,5)
#define MTBDWT_PERIPHID2 MTBDWT_PERIPHID_REG(MTBDWT,6)
#define MTBDWT_PERIPHID3 MTBDWT_PERIPHID_REG(MTBDWT,7)
#define MTBDWT_COMPID0 MTBDWT_COMPID_REG(MTBDWT,0)
#define MTBDWT_COMPID1 MTBDWT_COMPID_REG(MTBDWT,1)
#define MTBDWT_COMPID2 MTBDWT_COMPID_REG(MTBDWT,2)
#define MTBDWT_COMPID3 MTBDWT_COMPID_REG(MTBDWT,3)
/* MTBDWT - Register array accessors */
#define MTBDWT_COMP(index) MTBDWT_COMP_REG(MTBDWT,index)
#define MTBDWT_MASK(index) MTBDWT_MASK_REG(MTBDWT,index)
#define MTBDWT_FCT(index) MTBDWT_FCT_REG(MTBDWT,index)
#define MTBDWT_PERIPHID(index) MTBDWT_PERIPHID_REG(MTBDWT,index)
#define MTBDWT_COMPID(index) MTBDWT_COMPID_REG(MTBDWT,index)
/*!
* @}
*/ /* end of group MTBDWT_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group MTBDWT_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- NV Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup NV_Peripheral_Access_Layer NV Peripheral Access Layer
* @{
*/
/** NV - Register Layout Typedef */
typedef struct {
__I uint8_t BACKKEY3; /**< Backdoor Comparison Key 3., offset: 0x0 */
__I uint8_t BACKKEY2; /**< Backdoor Comparison Key 2., offset: 0x1 */
__I uint8_t BACKKEY1; /**< Backdoor Comparison Key 1., offset: 0x2 */
__I uint8_t BACKKEY0; /**< Backdoor Comparison Key 0., offset: 0x3 */
__I uint8_t BACKKEY7; /**< Backdoor Comparison Key 7., offset: 0x4 */
__I uint8_t BACKKEY6; /**< Backdoor Comparison Key 6., offset: 0x5 */
__I uint8_t BACKKEY5; /**< Backdoor Comparison Key 5., offset: 0x6 */
__I uint8_t BACKKEY4; /**< Backdoor Comparison Key 4., offset: 0x7 */
__I uint8_t FPROT3; /**< Non-volatile P-Flash Protection 1 - Low Register, offset: 0x8 */
__I uint8_t FPROT2; /**< Non-volatile P-Flash Protection 1 - High Register, offset: 0x9 */
__I uint8_t FPROT1; /**< Non-volatile P-Flash Protection 0 - Low Register, offset: 0xA */
__I uint8_t FPROT0; /**< Non-volatile P-Flash Protection 0 - High Register, offset: 0xB */
__I uint8_t FSEC; /**< Non-volatile Flash Security Register, offset: 0xC */
__I uint8_t FOPT; /**< Non-volatile Flash Option Register, offset: 0xD */
} NV_Type, *NV_MemMapPtr;
/* ----------------------------------------------------------------------------
-- NV - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup NV_Register_Accessor_Macros NV - Register accessor macros
* @{
*/
/* NV - Register accessors */
#define NV_BACKKEY3_REG(base) ((base)->BACKKEY3)
#define NV_BACKKEY2_REG(base) ((base)->BACKKEY2)
#define NV_BACKKEY1_REG(base) ((base)->BACKKEY1)
#define NV_BACKKEY0_REG(base) ((base)->BACKKEY0)
#define NV_BACKKEY7_REG(base) ((base)->BACKKEY7)
#define NV_BACKKEY6_REG(base) ((base)->BACKKEY6)
#define NV_BACKKEY5_REG(base) ((base)->BACKKEY5)
#define NV_BACKKEY4_REG(base) ((base)->BACKKEY4)
#define NV_FPROT3_REG(base) ((base)->FPROT3)
#define NV_FPROT2_REG(base) ((base)->FPROT2)
#define NV_FPROT1_REG(base) ((base)->FPROT1)
#define NV_FPROT0_REG(base) ((base)->FPROT0)
#define NV_FSEC_REG(base) ((base)->FSEC)
#define NV_FOPT_REG(base) ((base)->FOPT)
/*!
* @}
*/ /* end of group NV_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- NV Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup NV_Register_Masks NV Register Masks
* @{
*/
/* BACKKEY3 Bit Fields */
#define NV_BACKKEY3_KEY_MASK 0xFFu
#define NV_BACKKEY3_KEY_SHIFT 0
#define NV_BACKKEY3_KEY_WIDTH 8
#define NV_BACKKEY3_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY3_KEY_SHIFT))&NV_BACKKEY3_KEY_MASK)
/* BACKKEY2 Bit Fields */
#define NV_BACKKEY2_KEY_MASK 0xFFu
#define NV_BACKKEY2_KEY_SHIFT 0
#define NV_BACKKEY2_KEY_WIDTH 8
#define NV_BACKKEY2_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY2_KEY_SHIFT))&NV_BACKKEY2_KEY_MASK)
/* BACKKEY1 Bit Fields */
#define NV_BACKKEY1_KEY_MASK 0xFFu
#define NV_BACKKEY1_KEY_SHIFT 0
#define NV_BACKKEY1_KEY_WIDTH 8
#define NV_BACKKEY1_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY1_KEY_SHIFT))&NV_BACKKEY1_KEY_MASK)
/* BACKKEY0 Bit Fields */
#define NV_BACKKEY0_KEY_MASK 0xFFu
#define NV_BACKKEY0_KEY_SHIFT 0
#define NV_BACKKEY0_KEY_WIDTH 8
#define NV_BACKKEY0_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY0_KEY_SHIFT))&NV_BACKKEY0_KEY_MASK)
/* BACKKEY7 Bit Fields */
#define NV_BACKKEY7_KEY_MASK 0xFFu
#define NV_BACKKEY7_KEY_SHIFT 0
#define NV_BACKKEY7_KEY_WIDTH 8
#define NV_BACKKEY7_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY7_KEY_SHIFT))&NV_BACKKEY7_KEY_MASK)
/* BACKKEY6 Bit Fields */
#define NV_BACKKEY6_KEY_MASK 0xFFu
#define NV_BACKKEY6_KEY_SHIFT 0
#define NV_BACKKEY6_KEY_WIDTH 8
#define NV_BACKKEY6_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY6_KEY_SHIFT))&NV_BACKKEY6_KEY_MASK)
/* BACKKEY5 Bit Fields */
#define NV_BACKKEY5_KEY_MASK 0xFFu
#define NV_BACKKEY5_KEY_SHIFT 0
#define NV_BACKKEY5_KEY_WIDTH 8
#define NV_BACKKEY5_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY5_KEY_SHIFT))&NV_BACKKEY5_KEY_MASK)
/* BACKKEY4 Bit Fields */
#define NV_BACKKEY4_KEY_MASK 0xFFu
#define NV_BACKKEY4_KEY_SHIFT 0
#define NV_BACKKEY4_KEY_WIDTH 8
#define NV_BACKKEY4_KEY(x) (((uint8_t)(((uint8_t)(x))<<NV_BACKKEY4_KEY_SHIFT))&NV_BACKKEY4_KEY_MASK)
/* FPROT3 Bit Fields */
#define NV_FPROT3_PROT_MASK 0xFFu
#define NV_FPROT3_PROT_SHIFT 0
#define NV_FPROT3_PROT_WIDTH 8
#define NV_FPROT3_PROT(x) (((uint8_t)(((uint8_t)(x))<<NV_FPROT3_PROT_SHIFT))&NV_FPROT3_PROT_MASK)
/* FPROT2 Bit Fields */
#define NV_FPROT2_PROT_MASK 0xFFu
#define NV_FPROT2_PROT_SHIFT 0
#define NV_FPROT2_PROT_WIDTH 8
#define NV_FPROT2_PROT(x) (((uint8_t)(((uint8_t)(x))<<NV_FPROT2_PROT_SHIFT))&NV_FPROT2_PROT_MASK)
/* FPROT1 Bit Fields */
#define NV_FPROT1_PROT_MASK 0xFFu
#define NV_FPROT1_PROT_SHIFT 0
#define NV_FPROT1_PROT_WIDTH 8
#define NV_FPROT1_PROT(x) (((uint8_t)(((uint8_t)(x))<<NV_FPROT1_PROT_SHIFT))&NV_FPROT1_PROT_MASK)
/* FPROT0 Bit Fields */
#define NV_FPROT0_PROT_MASK 0xFFu
#define NV_FPROT0_PROT_SHIFT 0
#define NV_FPROT0_PROT_WIDTH 8
#define NV_FPROT0_PROT(x) (((uint8_t)(((uint8_t)(x))<<NV_FPROT0_PROT_SHIFT))&NV_FPROT0_PROT_MASK)
/* FSEC Bit Fields */
#define NV_FSEC_SEC_MASK 0x3u
#define NV_FSEC_SEC_SHIFT 0
#define NV_FSEC_SEC_WIDTH 2
#define NV_FSEC_SEC(x) (((uint8_t)(((uint8_t)(x))<<NV_FSEC_SEC_SHIFT))&NV_FSEC_SEC_MASK)
#define NV_FSEC_FSLACC_MASK 0xCu
#define NV_FSEC_FSLACC_SHIFT 2
#define NV_FSEC_FSLACC_WIDTH 2
#define NV_FSEC_FSLACC(x) (((uint8_t)(((uint8_t)(x))<<NV_FSEC_FSLACC_SHIFT))&NV_FSEC_FSLACC_MASK)
#define NV_FSEC_MEEN_MASK 0x30u
#define NV_FSEC_MEEN_SHIFT 4
#define NV_FSEC_MEEN_WIDTH 2
#define NV_FSEC_MEEN(x) (((uint8_t)(((uint8_t)(x))<<NV_FSEC_MEEN_SHIFT))&NV_FSEC_MEEN_MASK)
#define NV_FSEC_KEYEN_MASK 0xC0u
#define NV_FSEC_KEYEN_SHIFT 6
#define NV_FSEC_KEYEN_WIDTH 2
#define NV_FSEC_KEYEN(x) (((uint8_t)(((uint8_t)(x))<<NV_FSEC_KEYEN_SHIFT))&NV_FSEC_KEYEN_MASK)
/* FOPT Bit Fields */
#define NV_FOPT_LPBOOT0_MASK 0x1u
#define NV_FOPT_LPBOOT0_SHIFT 0
#define NV_FOPT_LPBOOT0_WIDTH 1
#define NV_FOPT_LPBOOT0(x) (((uint8_t)(((uint8_t)(x))<<NV_FOPT_LPBOOT0_SHIFT))&NV_FOPT_LPBOOT0_MASK)
#define NV_FOPT_NMI_DIS_MASK 0x4u
#define NV_FOPT_NMI_DIS_SHIFT 2
#define NV_FOPT_NMI_DIS_WIDTH 1
#define NV_FOPT_NMI_DIS(x) (((uint8_t)(((uint8_t)(x))<<NV_FOPT_NMI_DIS_SHIFT))&NV_FOPT_NMI_DIS_MASK)
#define NV_FOPT_RESET_PIN_CFG_MASK 0x8u
#define NV_FOPT_RESET_PIN_CFG_SHIFT 3
#define NV_FOPT_RESET_PIN_CFG_WIDTH 1
#define NV_FOPT_RESET_PIN_CFG(x) (((uint8_t)(((uint8_t)(x))<<NV_FOPT_RESET_PIN_CFG_SHIFT))&NV_FOPT_RESET_PIN_CFG_MASK)
#define NV_FOPT_LPBOOT1_MASK 0x10u
#define NV_FOPT_LPBOOT1_SHIFT 4
#define NV_FOPT_LPBOOT1_WIDTH 1
#define NV_FOPT_LPBOOT1(x) (((uint8_t)(((uint8_t)(x))<<NV_FOPT_LPBOOT1_SHIFT))&NV_FOPT_LPBOOT1_MASK)
#define NV_FOPT_FAST_INIT_MASK 0x20u
#define NV_FOPT_FAST_INIT_SHIFT 5
#define NV_FOPT_FAST_INIT_WIDTH 1
#define NV_FOPT_FAST_INIT(x) (((uint8_t)(((uint8_t)(x))<<NV_FOPT_FAST_INIT_SHIFT))&NV_FOPT_FAST_INIT_MASK)
/*!
* @}
*/ /* end of group NV_Register_Masks */
/* NV - Peripheral instance base addresses */
/** Peripheral FTFA_FlashConfig base address */
#define FTFA_FlashConfig_BASE (0x400u)
/** Peripheral FTFA_FlashConfig base pointer */
#define FTFA_FlashConfig ((NV_Type *)FTFA_FlashConfig_BASE)
#define FTFA_FlashConfig_BASE_PTR (FTFA_FlashConfig)
/** Array initializer of NV peripheral base addresses */
#define NV_BASE_ADDRS { FTFA_FlashConfig_BASE }
/** Array initializer of NV peripheral base pointers */
#define NV_BASE_PTRS { FTFA_FlashConfig }
/* ----------------------------------------------------------------------------
-- NV - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup NV_Register_Accessor_Macros NV - Register accessor macros
* @{
*/
/* NV - Register instance definitions */
/* FTFA_FlashConfig */
#define NV_BACKKEY3 NV_BACKKEY3_REG(FTFA_FlashConfig)
#define NV_BACKKEY2 NV_BACKKEY2_REG(FTFA_FlashConfig)
#define NV_BACKKEY1 NV_BACKKEY1_REG(FTFA_FlashConfig)
#define NV_BACKKEY0 NV_BACKKEY0_REG(FTFA_FlashConfig)
#define NV_BACKKEY7 NV_BACKKEY7_REG(FTFA_FlashConfig)
#define NV_BACKKEY6 NV_BACKKEY6_REG(FTFA_FlashConfig)
#define NV_BACKKEY5 NV_BACKKEY5_REG(FTFA_FlashConfig)
#define NV_BACKKEY4 NV_BACKKEY4_REG(FTFA_FlashConfig)
#define NV_FPROT3 NV_FPROT3_REG(FTFA_FlashConfig)
#define NV_FPROT2 NV_FPROT2_REG(FTFA_FlashConfig)
#define NV_FPROT1 NV_FPROT1_REG(FTFA_FlashConfig)
#define NV_FPROT0 NV_FPROT0_REG(FTFA_FlashConfig)
#define NV_FSEC NV_FSEC_REG(FTFA_FlashConfig)
#define NV_FOPT NV_FOPT_REG(FTFA_FlashConfig)
/*!
* @}
*/ /* end of group NV_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group NV_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- PIT Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup PIT_Peripheral_Access_Layer PIT Peripheral Access Layer
* @{
*/
/** PIT - Register Layout Typedef */
typedef struct {
__IO uint32_t MCR; /**< PIT Module Control Register, offset: 0x0 */
uint8_t RESERVED_0[220];
__I uint32_t LTMR64H; /**< PIT Upper Lifetime Timer Register, offset: 0xE0 */
__I uint32_t LTMR64L; /**< PIT Lower Lifetime Timer Register, offset: 0xE4 */
uint8_t RESERVED_1[24];
struct { /* offset: 0x100, array step: 0x10 */
__IO uint32_t LDVAL; /**< Timer Load Value Register, array offset: 0x100, array step: 0x10 */
__I uint32_t CVAL; /**< Current Timer Value Register, array offset: 0x104, array step: 0x10 */
__IO uint32_t TCTRL; /**< Timer Control Register, array offset: 0x108, array step: 0x10 */
__IO uint32_t TFLG; /**< Timer Flag Register, array offset: 0x10C, array step: 0x10 */
} CHANNEL[2];
} PIT_Type, *PIT_MemMapPtr;
/* ----------------------------------------------------------------------------
-- PIT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup PIT_Register_Accessor_Macros PIT - Register accessor macros
* @{
*/
/* PIT - Register accessors */
#define PIT_MCR_REG(base) ((base)->MCR)
#define PIT_LTMR64H_REG(base) ((base)->LTMR64H)
#define PIT_LTMR64L_REG(base) ((base)->LTMR64L)
#define PIT_LDVAL_REG(base,index) ((base)->CHANNEL[index].LDVAL)
#define PIT_LDVAL_COUNT 2
#define PIT_CVAL_REG(base,index) ((base)->CHANNEL[index].CVAL)
#define PIT_CVAL_COUNT 2
#define PIT_TCTRL_REG(base,index) ((base)->CHANNEL[index].TCTRL)
#define PIT_TCTRL_COUNT 2
#define PIT_TFLG_REG(base,index) ((base)->CHANNEL[index].TFLG)
#define PIT_TFLG_COUNT 2
/*!
* @}
*/ /* end of group PIT_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- PIT Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup PIT_Register_Masks PIT Register Masks
* @{
*/
/* MCR Bit Fields */
#define PIT_MCR_FRZ_MASK 0x1u
#define PIT_MCR_FRZ_SHIFT 0
#define PIT_MCR_FRZ_WIDTH 1
#define PIT_MCR_FRZ(x) (((uint32_t)(((uint32_t)(x))<<PIT_MCR_FRZ_SHIFT))&PIT_MCR_FRZ_MASK)
#define PIT_MCR_MDIS_MASK 0x2u
#define PIT_MCR_MDIS_SHIFT 1
#define PIT_MCR_MDIS_WIDTH 1
#define PIT_MCR_MDIS(x) (((uint32_t)(((uint32_t)(x))<<PIT_MCR_MDIS_SHIFT))&PIT_MCR_MDIS_MASK)
/* LTMR64H Bit Fields */
#define PIT_LTMR64H_LTH_MASK 0xFFFFFFFFu
#define PIT_LTMR64H_LTH_SHIFT 0
#define PIT_LTMR64H_LTH_WIDTH 32
#define PIT_LTMR64H_LTH(x) (((uint32_t)(((uint32_t)(x))<<PIT_LTMR64H_LTH_SHIFT))&PIT_LTMR64H_LTH_MASK)
/* LTMR64L Bit Fields */
#define PIT_LTMR64L_LTL_MASK 0xFFFFFFFFu
#define PIT_LTMR64L_LTL_SHIFT 0
#define PIT_LTMR64L_LTL_WIDTH 32
#define PIT_LTMR64L_LTL(x) (((uint32_t)(((uint32_t)(x))<<PIT_LTMR64L_LTL_SHIFT))&PIT_LTMR64L_LTL_MASK)
/* LDVAL Bit Fields */
#define PIT_LDVAL_TSV_MASK 0xFFFFFFFFu
#define PIT_LDVAL_TSV_SHIFT 0
#define PIT_LDVAL_TSV_WIDTH 32
#define PIT_LDVAL_TSV(x) (((uint32_t)(((uint32_t)(x))<<PIT_LDVAL_TSV_SHIFT))&PIT_LDVAL_TSV_MASK)
/* CVAL Bit Fields */
#define PIT_CVAL_TVL_MASK 0xFFFFFFFFu
#define PIT_CVAL_TVL_SHIFT 0
#define PIT_CVAL_TVL_WIDTH 32
#define PIT_CVAL_TVL(x) (((uint32_t)(((uint32_t)(x))<<PIT_CVAL_TVL_SHIFT))&PIT_CVAL_TVL_MASK)
/* TCTRL Bit Fields */
#define PIT_TCTRL_TEN_MASK 0x1u
#define PIT_TCTRL_TEN_SHIFT 0
#define PIT_TCTRL_TEN_WIDTH 1
#define PIT_TCTRL_TEN(x) (((uint32_t)(((uint32_t)(x))<<PIT_TCTRL_TEN_SHIFT))&PIT_TCTRL_TEN_MASK)
#define PIT_TCTRL_TIE_MASK 0x2u
#define PIT_TCTRL_TIE_SHIFT 1
#define PIT_TCTRL_TIE_WIDTH 1
#define PIT_TCTRL_TIE(x) (((uint32_t)(((uint32_t)(x))<<PIT_TCTRL_TIE_SHIFT))&PIT_TCTRL_TIE_MASK)
#define PIT_TCTRL_CHN_MASK 0x4u
#define PIT_TCTRL_CHN_SHIFT 2
#define PIT_TCTRL_CHN_WIDTH 1
#define PIT_TCTRL_CHN(x) (((uint32_t)(((uint32_t)(x))<<PIT_TCTRL_CHN_SHIFT))&PIT_TCTRL_CHN_MASK)
/* TFLG Bit Fields */
#define PIT_TFLG_TIF_MASK 0x1u
#define PIT_TFLG_TIF_SHIFT 0
#define PIT_TFLG_TIF_WIDTH 1
#define PIT_TFLG_TIF(x) (((uint32_t)(((uint32_t)(x))<<PIT_TFLG_TIF_SHIFT))&PIT_TFLG_TIF_MASK)
/*!
* @}
*/ /* end of group PIT_Register_Masks */
/* PIT - Peripheral instance base addresses */
/** Peripheral PIT base address */
#define PIT_BASE (0x40037000u)
/** Peripheral PIT base pointer */
#define PIT ((PIT_Type *)PIT_BASE)
#define PIT_BASE_PTR (PIT)
/** Array initializer of PIT peripheral base addresses */
#define PIT_BASE_ADDRS { PIT_BASE }
/** Array initializer of PIT peripheral base pointers */
#define PIT_BASE_PTRS { PIT }
/** Interrupt vectors for the PIT peripheral type */
#define PIT_IRQS { PIT_IRQn, PIT_IRQn }
/* ----------------------------------------------------------------------------
-- PIT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup PIT_Register_Accessor_Macros PIT - Register accessor macros
* @{
*/
/* PIT - Register instance definitions */
/* PIT */
#define PIT_MCR PIT_MCR_REG(PIT)
#define PIT_LTMR64H PIT_LTMR64H_REG(PIT)
#define PIT_LTMR64L PIT_LTMR64L_REG(PIT)
#define PIT_LDVAL0 PIT_LDVAL_REG(PIT,0)
#define PIT_CVAL0 PIT_CVAL_REG(PIT,0)
#define PIT_TCTRL0 PIT_TCTRL_REG(PIT,0)
#define PIT_TFLG0 PIT_TFLG_REG(PIT,0)
#define PIT_LDVAL1 PIT_LDVAL_REG(PIT,1)
#define PIT_CVAL1 PIT_CVAL_REG(PIT,1)
#define PIT_TCTRL1 PIT_TCTRL_REG(PIT,1)
#define PIT_TFLG1 PIT_TFLG_REG(PIT,1)
/* PIT - Register array accessors */
#define PIT_LDVAL(index) PIT_LDVAL_REG(PIT,index)
#define PIT_CVAL(index) PIT_CVAL_REG(PIT,index)
#define PIT_TCTRL(index) PIT_TCTRL_REG(PIT,index)
#define PIT_TFLG(index) PIT_TFLG_REG(PIT,index)
/*!
* @}
*/ /* end of group PIT_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group PIT_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- PMC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup PMC_Peripheral_Access_Layer PMC Peripheral Access Layer
* @{
*/
/** PMC - Register Layout Typedef */
typedef struct {
__IO uint8_t LVDSC1; /**< Low Voltage Detect Status And Control 1 register, offset: 0x0 */
__IO uint8_t LVDSC2; /**< Low Voltage Detect Status And Control 2 register, offset: 0x1 */
__IO uint8_t REGSC; /**< Regulator Status And Control register, offset: 0x2 */
} PMC_Type, *PMC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- PMC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup PMC_Register_Accessor_Macros PMC - Register accessor macros
* @{
*/
/* PMC - Register accessors */
#define PMC_LVDSC1_REG(base) ((base)->LVDSC1)
#define PMC_LVDSC2_REG(base) ((base)->LVDSC2)
#define PMC_REGSC_REG(base) ((base)->REGSC)
/*!
* @}
*/ /* end of group PMC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- PMC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup PMC_Register_Masks PMC Register Masks
* @{
*/
/* LVDSC1 Bit Fields */
#define PMC_LVDSC1_LVDV_MASK 0x3u
#define PMC_LVDSC1_LVDV_SHIFT 0
#define PMC_LVDSC1_LVDV_WIDTH 2
#define PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDV_SHIFT))&PMC_LVDSC1_LVDV_MASK)
#define PMC_LVDSC1_LVDRE_MASK 0x10u
#define PMC_LVDSC1_LVDRE_SHIFT 4
#define PMC_LVDSC1_LVDRE_WIDTH 1
#define PMC_LVDSC1_LVDRE(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDRE_SHIFT))&PMC_LVDSC1_LVDRE_MASK)
#define PMC_LVDSC1_LVDIE_MASK 0x20u
#define PMC_LVDSC1_LVDIE_SHIFT 5
#define PMC_LVDSC1_LVDIE_WIDTH 1
#define PMC_LVDSC1_LVDIE(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDIE_SHIFT))&PMC_LVDSC1_LVDIE_MASK)
#define PMC_LVDSC1_LVDACK_MASK 0x40u
#define PMC_LVDSC1_LVDACK_SHIFT 6
#define PMC_LVDSC1_LVDACK_WIDTH 1
#define PMC_LVDSC1_LVDACK(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDACK_SHIFT))&PMC_LVDSC1_LVDACK_MASK)
#define PMC_LVDSC1_LVDF_MASK 0x80u
#define PMC_LVDSC1_LVDF_SHIFT 7
#define PMC_LVDSC1_LVDF_WIDTH 1
#define PMC_LVDSC1_LVDF(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDF_SHIFT))&PMC_LVDSC1_LVDF_MASK)
/* LVDSC2 Bit Fields */
#define PMC_LVDSC2_LVWV_MASK 0x3u
#define PMC_LVDSC2_LVWV_SHIFT 0
#define PMC_LVDSC2_LVWV_WIDTH 2
#define PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC2_LVWV_SHIFT))&PMC_LVDSC2_LVWV_MASK)
#define PMC_LVDSC2_LVWIE_MASK 0x20u
#define PMC_LVDSC2_LVWIE_SHIFT 5
#define PMC_LVDSC2_LVWIE_WIDTH 1
#define PMC_LVDSC2_LVWIE(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC2_LVWIE_SHIFT))&PMC_LVDSC2_LVWIE_MASK)
#define PMC_LVDSC2_LVWACK_MASK 0x40u
#define PMC_LVDSC2_LVWACK_SHIFT 6
#define PMC_LVDSC2_LVWACK_WIDTH 1
#define PMC_LVDSC2_LVWACK(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC2_LVWACK_SHIFT))&PMC_LVDSC2_LVWACK_MASK)
#define PMC_LVDSC2_LVWF_MASK 0x80u
#define PMC_LVDSC2_LVWF_SHIFT 7
#define PMC_LVDSC2_LVWF_WIDTH 1
#define PMC_LVDSC2_LVWF(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC2_LVWF_SHIFT))&PMC_LVDSC2_LVWF_MASK)
/* REGSC Bit Fields */
#define PMC_REGSC_BGBE_MASK 0x1u
#define PMC_REGSC_BGBE_SHIFT 0
#define PMC_REGSC_BGBE_WIDTH 1
#define PMC_REGSC_BGBE(x) (((uint8_t)(((uint8_t)(x))<<PMC_REGSC_BGBE_SHIFT))&PMC_REGSC_BGBE_MASK)
#define PMC_REGSC_REGONS_MASK 0x4u
#define PMC_REGSC_REGONS_SHIFT 2
#define PMC_REGSC_REGONS_WIDTH 1
#define PMC_REGSC_REGONS(x) (((uint8_t)(((uint8_t)(x))<<PMC_REGSC_REGONS_SHIFT))&PMC_REGSC_REGONS_MASK)
#define PMC_REGSC_ACKISO_MASK 0x8u
#define PMC_REGSC_ACKISO_SHIFT 3
#define PMC_REGSC_ACKISO_WIDTH 1
#define PMC_REGSC_ACKISO(x) (((uint8_t)(((uint8_t)(x))<<PMC_REGSC_ACKISO_SHIFT))&PMC_REGSC_ACKISO_MASK)
#define PMC_REGSC_VLPO_MASK 0x40u
#define PMC_REGSC_VLPO_SHIFT 6
#define PMC_REGSC_VLPO_WIDTH 1
#define PMC_REGSC_VLPO(x) (((uint8_t)(((uint8_t)(x))<<PMC_REGSC_VLPO_SHIFT))&PMC_REGSC_VLPO_MASK)
/*!
* @}
*/ /* end of group PMC_Register_Masks */
/* PMC - Peripheral instance base addresses */
/** Peripheral PMC base address */
#define PMC_BASE (0x4007D000u)
/** Peripheral PMC base pointer */
#define PMC ((PMC_Type *)PMC_BASE)
#define PMC_BASE_PTR (PMC)
/** Array initializer of PMC peripheral base addresses */
#define PMC_BASE_ADDRS { PMC_BASE }
/** Array initializer of PMC peripheral base pointers */
#define PMC_BASE_PTRS { PMC }
/** Interrupt vectors for the PMC peripheral type */
#define PMC_IRQS { LVD_LVW_DCDC_IRQn }
/* ----------------------------------------------------------------------------
-- PMC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup PMC_Register_Accessor_Macros PMC - Register accessor macros
* @{
*/
/* PMC - Register instance definitions */
/* PMC */
#define PMC_LVDSC1 PMC_LVDSC1_REG(PMC)
#define PMC_LVDSC2 PMC_LVDSC2_REG(PMC)
#define PMC_REGSC PMC_REGSC_REG(PMC)
/*!
* @}
*/ /* end of group PMC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group PMC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- PORT Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup PORT_Peripheral_Access_Layer PORT Peripheral Access Layer
* @{
*/
/** PORT - Register Layout Typedef */
typedef struct {
__IO uint32_t PCR[32]; /**< Pin Control Register n, array offset: 0x0, array step: 0x4 */
__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x80 */
__O uint32_t GPCHR; /**< Global Pin Control High Register, offset: 0x84 */
uint8_t RESERVED_0[24];
__IO uint32_t ISFR; /**< Interrupt Status Flag Register, offset: 0xA0 */
} PORT_Type, *PORT_MemMapPtr;
/* ----------------------------------------------------------------------------
-- PORT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup PORT_Register_Accessor_Macros PORT - Register accessor macros
* @{
*/
/* PORT - Register accessors */
#define PORT_PCR_REG(base,index) ((base)->PCR[index])
#define PORT_PCR_COUNT 32
#define PORT_GPCLR_REG(base) ((base)->GPCLR)
#define PORT_GPCHR_REG(base) ((base)->GPCHR)
#define PORT_ISFR_REG(base) ((base)->ISFR)
/*!
* @}
*/ /* end of group PORT_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- PORT Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup PORT_Register_Masks PORT Register Masks
* @{
*/
/* PCR Bit Fields */
#define PORT_PCR_PS_MASK 0x1u
#define PORT_PCR_PS_SHIFT 0
#define PORT_PCR_PS_WIDTH 1
#define PORT_PCR_PS(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_PS_SHIFT))&PORT_PCR_PS_MASK)
#define PORT_PCR_PE_MASK 0x2u
#define PORT_PCR_PE_SHIFT 1
#define PORT_PCR_PE_WIDTH 1
#define PORT_PCR_PE(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_PE_SHIFT))&PORT_PCR_PE_MASK)
#define PORT_PCR_SRE_MASK 0x4u
#define PORT_PCR_SRE_SHIFT 2
#define PORT_PCR_SRE_WIDTH 1
#define PORT_PCR_SRE(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_SRE_SHIFT))&PORT_PCR_SRE_MASK)
#define PORT_PCR_PFE_MASK 0x10u
#define PORT_PCR_PFE_SHIFT 4
#define PORT_PCR_PFE_WIDTH 1
#define PORT_PCR_PFE(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_PFE_SHIFT))&PORT_PCR_PFE_MASK)
#define PORT_PCR_DSE_MASK 0x40u
#define PORT_PCR_DSE_SHIFT 6
#define PORT_PCR_DSE_WIDTH 1
#define PORT_PCR_DSE(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_DSE_SHIFT))&PORT_PCR_DSE_MASK)
#define PORT_PCR_MUX_MASK 0x700u
#define PORT_PCR_MUX_SHIFT 8
#define PORT_PCR_MUX_WIDTH 3
#define PORT_PCR_MUX(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_MUX_SHIFT))&PORT_PCR_MUX_MASK)
#define PORT_PCR_IRQC_MASK 0xF0000u
#define PORT_PCR_IRQC_SHIFT 16
#define PORT_PCR_IRQC_WIDTH 4
#define PORT_PCR_IRQC(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_IRQC_SHIFT))&PORT_PCR_IRQC_MASK)
#define PORT_PCR_ISF_MASK 0x1000000u
#define PORT_PCR_ISF_SHIFT 24
#define PORT_PCR_ISF_WIDTH 1
#define PORT_PCR_ISF(x) (((uint32_t)(((uint32_t)(x))<<PORT_PCR_ISF_SHIFT))&PORT_PCR_ISF_MASK)
/* GPCLR Bit Fields */
#define PORT_GPCLR_GPWD_MASK 0xFFFFu
#define PORT_GPCLR_GPWD_SHIFT 0
#define PORT_GPCLR_GPWD_WIDTH 16
#define PORT_GPCLR_GPWD(x) (((uint32_t)(((uint32_t)(x))<<PORT_GPCLR_GPWD_SHIFT))&PORT_GPCLR_GPWD_MASK)
#define PORT_GPCLR_GPWE_MASK 0xFFFF0000u
#define PORT_GPCLR_GPWE_SHIFT 16
#define PORT_GPCLR_GPWE_WIDTH 16
#define PORT_GPCLR_GPWE(x) (((uint32_t)(((uint32_t)(x))<<PORT_GPCLR_GPWE_SHIFT))&PORT_GPCLR_GPWE_MASK)
/* GPCHR Bit Fields */
#define PORT_GPCHR_GPWD_MASK 0xFFFFu
#define PORT_GPCHR_GPWD_SHIFT 0
#define PORT_GPCHR_GPWD_WIDTH 16
#define PORT_GPCHR_GPWD(x) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWD_SHIFT))&PORT_GPCHR_GPWD_MASK)
#define PORT_GPCHR_GPWE_MASK 0xFFFF0000u
#define PORT_GPCHR_GPWE_SHIFT 16
#define PORT_GPCHR_GPWE_WIDTH 16
#define PORT_GPCHR_GPWE(x) (((uint32_t)(((uint32_t)(x))<<PORT_GPCHR_GPWE_SHIFT))&PORT_GPCHR_GPWE_MASK)
/* ISFR Bit Fields */
#define PORT_ISFR_ISF_MASK 0xFFFFFFFFu
#define PORT_ISFR_ISF_SHIFT 0
#define PORT_ISFR_ISF_WIDTH 32
#define PORT_ISFR_ISF(x) (((uint32_t)(((uint32_t)(x))<<PORT_ISFR_ISF_SHIFT))&PORT_ISFR_ISF_MASK)
/*!
* @}
*/ /* end of group PORT_Register_Masks */
/* PORT - Peripheral instance base addresses */
/** Peripheral PORTA base address */
#define PORTA_BASE (0x40049000u)
/** Peripheral PORTA base pointer */
#define PORTA ((PORT_Type *)PORTA_BASE)
#define PORTA_BASE_PTR (PORTA)
/** Peripheral PORTB base address */
#define PORTB_BASE (0x4004A000u)
/** Peripheral PORTB base pointer */
#define PORTB ((PORT_Type *)PORTB_BASE)
#define PORTB_BASE_PTR (PORTB)
/** Peripheral PORTC base address */
#define PORTC_BASE (0x4004B000u)
/** Peripheral PORTC base pointer */
#define PORTC ((PORT_Type *)PORTC_BASE)
#define PORTC_BASE_PTR (PORTC)
/** Array initializer of PORT peripheral base addresses */
#define PORT_BASE_ADDRS { PORTA_BASE, PORTB_BASE, PORTC_BASE }
/** Array initializer of PORT peripheral base pointers */
#define PORT_BASE_PTRS { PORTA, PORTB, PORTC }
/** Interrupt vectors for the PORT peripheral type */
#define PORT_IRQS { PORTA_IRQn, PORTB_PORTC_IRQn, PORTB_PORTC_IRQn }
/* ----------------------------------------------------------------------------
-- PORT - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup PORT_Register_Accessor_Macros PORT - Register accessor macros
* @{
*/
/* PORT - Register instance definitions */
/* PORTA */
#define PORTA_PCR0 PORT_PCR_REG(PORTA,0)
#define PORTA_PCR1 PORT_PCR_REG(PORTA,1)
#define PORTA_PCR2 PORT_PCR_REG(PORTA,2)
#define PORTA_PCR3 PORT_PCR_REG(PORTA,3)
#define PORTA_PCR4 PORT_PCR_REG(PORTA,4)
#define PORTA_PCR5 PORT_PCR_REG(PORTA,5)
#define PORTA_PCR6 PORT_PCR_REG(PORTA,6)
#define PORTA_PCR7 PORT_PCR_REG(PORTA,7)
#define PORTA_PCR8 PORT_PCR_REG(PORTA,8)
#define PORTA_PCR9 PORT_PCR_REG(PORTA,9)
#define PORTA_PCR10 PORT_PCR_REG(PORTA,10)
#define PORTA_PCR11 PORT_PCR_REG(PORTA,11)
#define PORTA_PCR12 PORT_PCR_REG(PORTA,12)
#define PORTA_PCR13 PORT_PCR_REG(PORTA,13)
#define PORTA_PCR14 PORT_PCR_REG(PORTA,14)
#define PORTA_PCR15 PORT_PCR_REG(PORTA,15)
#define PORTA_PCR16 PORT_PCR_REG(PORTA,16)
#define PORTA_PCR17 PORT_PCR_REG(PORTA,17)
#define PORTA_PCR18 PORT_PCR_REG(PORTA,18)
#define PORTA_PCR19 PORT_PCR_REG(PORTA,19)
#define PORTA_PCR20 PORT_PCR_REG(PORTA,20)
#define PORTA_PCR21 PORT_PCR_REG(PORTA,21)
#define PORTA_PCR22 PORT_PCR_REG(PORTA,22)
#define PORTA_PCR23 PORT_PCR_REG(PORTA,23)
#define PORTA_PCR24 PORT_PCR_REG(PORTA,24)
#define PORTA_PCR25 PORT_PCR_REG(PORTA,25)
#define PORTA_PCR26 PORT_PCR_REG(PORTA,26)
#define PORTA_PCR27 PORT_PCR_REG(PORTA,27)
#define PORTA_PCR28 PORT_PCR_REG(PORTA,28)
#define PORTA_PCR29 PORT_PCR_REG(PORTA,29)
#define PORTA_PCR30 PORT_PCR_REG(PORTA,30)
#define PORTA_PCR31 PORT_PCR_REG(PORTA,31)
#define PORTA_GPCLR PORT_GPCLR_REG(PORTA)
#define PORTA_GPCHR PORT_GPCHR_REG(PORTA)
#define PORTA_ISFR PORT_ISFR_REG(PORTA)
/* PORTB */
#define PORTB_PCR0 PORT_PCR_REG(PORTB,0)
#define PORTB_PCR1 PORT_PCR_REG(PORTB,1)
#define PORTB_PCR2 PORT_PCR_REG(PORTB,2)
#define PORTB_PCR3 PORT_PCR_REG(PORTB,3)
#define PORTB_PCR4 PORT_PCR_REG(PORTB,4)
#define PORTB_PCR5 PORT_PCR_REG(PORTB,5)
#define PORTB_PCR6 PORT_PCR_REG(PORTB,6)
#define PORTB_PCR7 PORT_PCR_REG(PORTB,7)
#define PORTB_PCR8 PORT_PCR_REG(PORTB,8)
#define PORTB_PCR9 PORT_PCR_REG(PORTB,9)
#define PORTB_PCR10 PORT_PCR_REG(PORTB,10)
#define PORTB_PCR11 PORT_PCR_REG(PORTB,11)
#define PORTB_PCR12 PORT_PCR_REG(PORTB,12)
#define PORTB_PCR13 PORT_PCR_REG(PORTB,13)
#define PORTB_PCR14 PORT_PCR_REG(PORTB,14)
#define PORTB_PCR15 PORT_PCR_REG(PORTB,15)
#define PORTB_PCR16 PORT_PCR_REG(PORTB,16)
#define PORTB_PCR17 PORT_PCR_REG(PORTB,17)
#define PORTB_PCR18 PORT_PCR_REG(PORTB,18)
#define PORTB_PCR19 PORT_PCR_REG(PORTB,19)
#define PORTB_PCR20 PORT_PCR_REG(PORTB,20)
#define PORTB_PCR21 PORT_PCR_REG(PORTB,21)
#define PORTB_PCR22 PORT_PCR_REG(PORTB,22)
#define PORTB_PCR23 PORT_PCR_REG(PORTB,23)
#define PORTB_PCR24 PORT_PCR_REG(PORTB,24)
#define PORTB_PCR25 PORT_PCR_REG(PORTB,25)
#define PORTB_PCR26 PORT_PCR_REG(PORTB,26)
#define PORTB_PCR27 PORT_PCR_REG(PORTB,27)
#define PORTB_PCR28 PORT_PCR_REG(PORTB,28)
#define PORTB_PCR29 PORT_PCR_REG(PORTB,29)
#define PORTB_PCR30 PORT_PCR_REG(PORTB,30)
#define PORTB_PCR31 PORT_PCR_REG(PORTB,31)
#define PORTB_GPCLR PORT_GPCLR_REG(PORTB)
#define PORTB_GPCHR PORT_GPCHR_REG(PORTB)
#define PORTB_ISFR PORT_ISFR_REG(PORTB)
/* PORTC */
#define PORTC_PCR0 PORT_PCR_REG(PORTC,0)
#define PORTC_PCR1 PORT_PCR_REG(PORTC,1)
#define PORTC_PCR2 PORT_PCR_REG(PORTC,2)
#define PORTC_PCR3 PORT_PCR_REG(PORTC,3)
#define PORTC_PCR4 PORT_PCR_REG(PORTC,4)
#define PORTC_PCR5 PORT_PCR_REG(PORTC,5)
#define PORTC_PCR6 PORT_PCR_REG(PORTC,6)
#define PORTC_PCR7 PORT_PCR_REG(PORTC,7)
#define PORTC_PCR8 PORT_PCR_REG(PORTC,8)
#define PORTC_PCR9 PORT_PCR_REG(PORTC,9)
#define PORTC_PCR10 PORT_PCR_REG(PORTC,10)
#define PORTC_PCR11 PORT_PCR_REG(PORTC,11)
#define PORTC_PCR12 PORT_PCR_REG(PORTC,12)
#define PORTC_PCR13 PORT_PCR_REG(PORTC,13)
#define PORTC_PCR14 PORT_PCR_REG(PORTC,14)
#define PORTC_PCR15 PORT_PCR_REG(PORTC,15)
#define PORTC_PCR16 PORT_PCR_REG(PORTC,16)
#define PORTC_PCR17 PORT_PCR_REG(PORTC,17)
#define PORTC_PCR18 PORT_PCR_REG(PORTC,18)
#define PORTC_PCR19 PORT_PCR_REG(PORTC,19)
#define PORTC_PCR20 PORT_PCR_REG(PORTC,20)
#define PORTC_PCR21 PORT_PCR_REG(PORTC,21)
#define PORTC_PCR22 PORT_PCR_REG(PORTC,22)
#define PORTC_PCR23 PORT_PCR_REG(PORTC,23)
#define PORTC_PCR24 PORT_PCR_REG(PORTC,24)
#define PORTC_PCR25 PORT_PCR_REG(PORTC,25)
#define PORTC_PCR26 PORT_PCR_REG(PORTC,26)
#define PORTC_PCR27 PORT_PCR_REG(PORTC,27)
#define PORTC_PCR28 PORT_PCR_REG(PORTC,28)
#define PORTC_PCR29 PORT_PCR_REG(PORTC,29)
#define PORTC_PCR30 PORT_PCR_REG(PORTC,30)
#define PORTC_PCR31 PORT_PCR_REG(PORTC,31)
#define PORTC_GPCLR PORT_GPCLR_REG(PORTC)
#define PORTC_GPCHR PORT_GPCHR_REG(PORTC)
#define PORTC_ISFR PORT_ISFR_REG(PORTC)
/* PORT - Register array accessors */
#define PORTA_PCR(index) PORT_PCR_REG(PORTA,index)
#define PORTB_PCR(index) PORT_PCR_REG(PORTB,index)
#define PORTC_PCR(index) PORT_PCR_REG(PORTC,index)
/*!
* @}
*/ /* end of group PORT_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group PORT_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- RCM Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup RCM_Peripheral_Access_Layer RCM Peripheral Access Layer
* @{
*/
/** RCM - Register Layout Typedef */
typedef struct {
__I uint8_t SRS0; /**< System Reset Status Register 0, offset: 0x0 */
__I uint8_t SRS1; /**< System Reset Status Register 1, offset: 0x1 */
uint8_t RESERVED_0[2];
__IO uint8_t RPFC; /**< Reset Pin Filter Control register, offset: 0x4 */
__IO uint8_t RPFW; /**< Reset Pin Filter Width register, offset: 0x5 */
} RCM_Type, *RCM_MemMapPtr;
/* ----------------------------------------------------------------------------
-- RCM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup RCM_Register_Accessor_Macros RCM - Register accessor macros
* @{
*/
/* RCM - Register accessors */
#define RCM_SRS0_REG(base) ((base)->SRS0)
#define RCM_SRS1_REG(base) ((base)->SRS1)
#define RCM_RPFC_REG(base) ((base)->RPFC)
#define RCM_RPFW_REG(base) ((base)->RPFW)
/*!
* @}
*/ /* end of group RCM_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- RCM Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup RCM_Register_Masks RCM Register Masks
* @{
*/
/* SRS0 Bit Fields */
#define RCM_SRS0_WAKEUP_MASK 0x1u
#define RCM_SRS0_WAKEUP_SHIFT 0
#define RCM_SRS0_WAKEUP_WIDTH 1
#define RCM_SRS0_WAKEUP(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS0_WAKEUP_SHIFT))&RCM_SRS0_WAKEUP_MASK)
#define RCM_SRS0_LVD_MASK 0x2u
#define RCM_SRS0_LVD_SHIFT 1
#define RCM_SRS0_LVD_WIDTH 1
#define RCM_SRS0_LVD(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS0_LVD_SHIFT))&RCM_SRS0_LVD_MASK)
#define RCM_SRS0_LOC_MASK 0x4u
#define RCM_SRS0_LOC_SHIFT 2
#define RCM_SRS0_LOC_WIDTH 1
#define RCM_SRS0_LOC(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS0_LOC_SHIFT))&RCM_SRS0_LOC_MASK)
#define RCM_SRS0_WDOG_MASK 0x20u
#define RCM_SRS0_WDOG_SHIFT 5
#define RCM_SRS0_WDOG_WIDTH 1
#define RCM_SRS0_WDOG(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS0_WDOG_SHIFT))&RCM_SRS0_WDOG_MASK)
#define RCM_SRS0_PIN_MASK 0x40u
#define RCM_SRS0_PIN_SHIFT 6
#define RCM_SRS0_PIN_WIDTH 1
#define RCM_SRS0_PIN(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS0_PIN_SHIFT))&RCM_SRS0_PIN_MASK)
#define RCM_SRS0_POR_MASK 0x80u
#define RCM_SRS0_POR_SHIFT 7
#define RCM_SRS0_POR_WIDTH 1
#define RCM_SRS0_POR(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS0_POR_SHIFT))&RCM_SRS0_POR_MASK)
/* SRS1 Bit Fields */
#define RCM_SRS1_LOCKUP_MASK 0x2u
#define RCM_SRS1_LOCKUP_SHIFT 1
#define RCM_SRS1_LOCKUP_WIDTH 1
#define RCM_SRS1_LOCKUP(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS1_LOCKUP_SHIFT))&RCM_SRS1_LOCKUP_MASK)
#define RCM_SRS1_SW_MASK 0x4u
#define RCM_SRS1_SW_SHIFT 2
#define RCM_SRS1_SW_WIDTH 1
#define RCM_SRS1_SW(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS1_SW_SHIFT))&RCM_SRS1_SW_MASK)
#define RCM_SRS1_MDM_AP_MASK 0x8u
#define RCM_SRS1_MDM_AP_SHIFT 3
#define RCM_SRS1_MDM_AP_WIDTH 1
#define RCM_SRS1_MDM_AP(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS1_MDM_AP_SHIFT))&RCM_SRS1_MDM_AP_MASK)
#define RCM_SRS1_SACKERR_MASK 0x20u
#define RCM_SRS1_SACKERR_SHIFT 5
#define RCM_SRS1_SACKERR_WIDTH 1
#define RCM_SRS1_SACKERR(x) (((uint8_t)(((uint8_t)(x))<<RCM_SRS1_SACKERR_SHIFT))&RCM_SRS1_SACKERR_MASK)
/* RPFC Bit Fields */
#define RCM_RPFC_RSTFLTSRW_MASK 0x3u
#define RCM_RPFC_RSTFLTSRW_SHIFT 0
#define RCM_RPFC_RSTFLTSRW_WIDTH 2
#define RCM_RPFC_RSTFLTSRW(x) (((uint8_t)(((uint8_t)(x))<<RCM_RPFC_RSTFLTSRW_SHIFT))&RCM_RPFC_RSTFLTSRW_MASK)
#define RCM_RPFC_RSTFLTSS_MASK 0x4u
#define RCM_RPFC_RSTFLTSS_SHIFT 2
#define RCM_RPFC_RSTFLTSS_WIDTH 1
#define RCM_RPFC_RSTFLTSS(x) (((uint8_t)(((uint8_t)(x))<<RCM_RPFC_RSTFLTSS_SHIFT))&RCM_RPFC_RSTFLTSS_MASK)
/* RPFW Bit Fields */
#define RCM_RPFW_RSTFLTSEL_MASK 0x1Fu
#define RCM_RPFW_RSTFLTSEL_SHIFT 0
#define RCM_RPFW_RSTFLTSEL_WIDTH 5
#define RCM_RPFW_RSTFLTSEL(x) (((uint8_t)(((uint8_t)(x))<<RCM_RPFW_RSTFLTSEL_SHIFT))&RCM_RPFW_RSTFLTSEL_MASK)
/*!
* @}
*/ /* end of group RCM_Register_Masks */
/* RCM - Peripheral instance base addresses */
/** Peripheral RCM base address */
#define RCM_BASE (0x4007F000u)
/** Peripheral RCM base pointer */
#define RCM ((RCM_Type *)RCM_BASE)
#define RCM_BASE_PTR (RCM)
/** Array initializer of RCM peripheral base addresses */
#define RCM_BASE_ADDRS { RCM_BASE }
/** Array initializer of RCM peripheral base pointers */
#define RCM_BASE_PTRS { RCM }
/* ----------------------------------------------------------------------------
-- RCM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup RCM_Register_Accessor_Macros RCM - Register accessor macros
* @{
*/
/* RCM - Register instance definitions */
/* RCM */
#define RCM_SRS0 RCM_SRS0_REG(RCM)
#define RCM_SRS1 RCM_SRS1_REG(RCM)
#define RCM_RPFC RCM_RPFC_REG(RCM)
#define RCM_RPFW RCM_RPFW_REG(RCM)
/*!
* @}
*/ /* end of group RCM_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group RCM_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- ROM Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup ROM_Peripheral_Access_Layer ROM Peripheral Access Layer
* @{
*/
/** ROM - Register Layout Typedef */
typedef struct {
__I uint32_t ENTRY[3]; /**< Entry, array offset: 0x0, array step: 0x4 */
__I uint32_t TABLEMARK; /**< End of Table Marker Register, offset: 0xC */
uint8_t RESERVED_0[4028];
__I uint32_t SYSACCESS; /**< System Access Register, offset: 0xFCC */
__I uint32_t PERIPHID4; /**< Peripheral ID Register, offset: 0xFD0 */
__I uint32_t PERIPHID5; /**< Peripheral ID Register, offset: 0xFD4 */
__I uint32_t PERIPHID6; /**< Peripheral ID Register, offset: 0xFD8 */
__I uint32_t PERIPHID7; /**< Peripheral ID Register, offset: 0xFDC */
__I uint32_t PERIPHID0; /**< Peripheral ID Register, offset: 0xFE0 */
__I uint32_t PERIPHID1; /**< Peripheral ID Register, offset: 0xFE4 */
__I uint32_t PERIPHID2; /**< Peripheral ID Register, offset: 0xFE8 */
__I uint32_t PERIPHID3; /**< Peripheral ID Register, offset: 0xFEC */
__I uint32_t COMPID[4]; /**< Component ID Register, array offset: 0xFF0, array step: 0x4 */
} ROM_Type, *ROM_MemMapPtr;
/* ----------------------------------------------------------------------------
-- ROM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup ROM_Register_Accessor_Macros ROM - Register accessor macros
* @{
*/
/* ROM - Register accessors */
#define ROM_ENTRY_REG(base,index) ((base)->ENTRY[index])
#define ROM_ENTRY_COUNT 3
#define ROM_TABLEMARK_REG(base) ((base)->TABLEMARK)
#define ROM_SYSACCESS_REG(base) ((base)->SYSACCESS)
#define ROM_PERIPHID4_REG(base) ((base)->PERIPHID4)
#define ROM_PERIPHID5_REG(base) ((base)->PERIPHID5)
#define ROM_PERIPHID6_REG(base) ((base)->PERIPHID6)
#define ROM_PERIPHID7_REG(base) ((base)->PERIPHID7)
#define ROM_PERIPHID0_REG(base) ((base)->PERIPHID0)
#define ROM_PERIPHID1_REG(base) ((base)->PERIPHID1)
#define ROM_PERIPHID2_REG(base) ((base)->PERIPHID2)
#define ROM_PERIPHID3_REG(base) ((base)->PERIPHID3)
#define ROM_COMPID_REG(base,index) ((base)->COMPID[index])
#define ROM_COMPID_COUNT 4
/*!
* @}
*/ /* end of group ROM_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- ROM Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup ROM_Register_Masks ROM Register Masks
* @{
*/
/* ENTRY Bit Fields */
#define ROM_ENTRY_ENTRY_MASK 0xFFFFFFFFu
#define ROM_ENTRY_ENTRY_SHIFT 0
#define ROM_ENTRY_ENTRY_WIDTH 32
#define ROM_ENTRY_ENTRY(x) (((uint32_t)(((uint32_t)(x))<<ROM_ENTRY_ENTRY_SHIFT))&ROM_ENTRY_ENTRY_MASK)
/* TABLEMARK Bit Fields */
#define ROM_TABLEMARK_MARK_MASK 0xFFFFFFFFu
#define ROM_TABLEMARK_MARK_SHIFT 0
#define ROM_TABLEMARK_MARK_WIDTH 32
#define ROM_TABLEMARK_MARK(x) (((uint32_t)(((uint32_t)(x))<<ROM_TABLEMARK_MARK_SHIFT))&ROM_TABLEMARK_MARK_MASK)
/* SYSACCESS Bit Fields */
#define ROM_SYSACCESS_SYSACCESS_MASK 0xFFFFFFFFu
#define ROM_SYSACCESS_SYSACCESS_SHIFT 0
#define ROM_SYSACCESS_SYSACCESS_WIDTH 32
#define ROM_SYSACCESS_SYSACCESS(x) (((uint32_t)(((uint32_t)(x))<<ROM_SYSACCESS_SYSACCESS_SHIFT))&ROM_SYSACCESS_SYSACCESS_MASK)
/* PERIPHID4 Bit Fields */
#define ROM_PERIPHID4_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID4_PERIPHID_SHIFT 0
#define ROM_PERIPHID4_PERIPHID_WIDTH 32
#define ROM_PERIPHID4_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID4_PERIPHID_SHIFT))&ROM_PERIPHID4_PERIPHID_MASK)
/* PERIPHID5 Bit Fields */
#define ROM_PERIPHID5_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID5_PERIPHID_SHIFT 0
#define ROM_PERIPHID5_PERIPHID_WIDTH 32
#define ROM_PERIPHID5_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID5_PERIPHID_SHIFT))&ROM_PERIPHID5_PERIPHID_MASK)
/* PERIPHID6 Bit Fields */
#define ROM_PERIPHID6_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID6_PERIPHID_SHIFT 0
#define ROM_PERIPHID6_PERIPHID_WIDTH 32
#define ROM_PERIPHID6_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID6_PERIPHID_SHIFT))&ROM_PERIPHID6_PERIPHID_MASK)
/* PERIPHID7 Bit Fields */
#define ROM_PERIPHID7_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID7_PERIPHID_SHIFT 0
#define ROM_PERIPHID7_PERIPHID_WIDTH 32
#define ROM_PERIPHID7_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID7_PERIPHID_SHIFT))&ROM_PERIPHID7_PERIPHID_MASK)
/* PERIPHID0 Bit Fields */
#define ROM_PERIPHID0_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID0_PERIPHID_SHIFT 0
#define ROM_PERIPHID0_PERIPHID_WIDTH 32
#define ROM_PERIPHID0_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID0_PERIPHID_SHIFT))&ROM_PERIPHID0_PERIPHID_MASK)
/* PERIPHID1 Bit Fields */
#define ROM_PERIPHID1_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID1_PERIPHID_SHIFT 0
#define ROM_PERIPHID1_PERIPHID_WIDTH 32
#define ROM_PERIPHID1_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID1_PERIPHID_SHIFT))&ROM_PERIPHID1_PERIPHID_MASK)
/* PERIPHID2 Bit Fields */
#define ROM_PERIPHID2_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID2_PERIPHID_SHIFT 0
#define ROM_PERIPHID2_PERIPHID_WIDTH 32
#define ROM_PERIPHID2_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID2_PERIPHID_SHIFT))&ROM_PERIPHID2_PERIPHID_MASK)
/* PERIPHID3 Bit Fields */
#define ROM_PERIPHID3_PERIPHID_MASK 0xFFFFFFFFu
#define ROM_PERIPHID3_PERIPHID_SHIFT 0
#define ROM_PERIPHID3_PERIPHID_WIDTH 32
#define ROM_PERIPHID3_PERIPHID(x) (((uint32_t)(((uint32_t)(x))<<ROM_PERIPHID3_PERIPHID_SHIFT))&ROM_PERIPHID3_PERIPHID_MASK)
/* COMPID Bit Fields */
#define ROM_COMPID_COMPID_MASK 0xFFFFFFFFu
#define ROM_COMPID_COMPID_SHIFT 0
#define ROM_COMPID_COMPID_WIDTH 32
#define ROM_COMPID_COMPID(x) (((uint32_t)(((uint32_t)(x))<<ROM_COMPID_COMPID_SHIFT))&ROM_COMPID_COMPID_MASK)
/*!
* @}
*/ /* end of group ROM_Register_Masks */
/* ROM - Peripheral instance base addresses */
/** Peripheral ROM base address */
#define ROM_BASE (0xF0002000u)
/** Peripheral ROM base pointer */
#define ROM ((ROM_Type *)ROM_BASE)
#define ROM_BASE_PTR (ROM)
/** Array initializer of ROM peripheral base addresses */
#define ROM_BASE_ADDRS { ROM_BASE }
/** Array initializer of ROM peripheral base pointers */
#define ROM_BASE_PTRS { ROM }
/* ----------------------------------------------------------------------------
-- ROM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup ROM_Register_Accessor_Macros ROM - Register accessor macros
* @{
*/
/* ROM - Register instance definitions */
/* ROM */
#define ROM_ENTRY0 ROM_ENTRY_REG(ROM,0)
#define ROM_ENTRY1 ROM_ENTRY_REG(ROM,1)
#define ROM_ENTRY2 ROM_ENTRY_REG(ROM,2)
#define ROM_TABLEMARK ROM_TABLEMARK_REG(ROM)
#define ROM_SYSACCESS ROM_SYSACCESS_REG(ROM)
#define ROM_PERIPHID4 ROM_PERIPHID4_REG(ROM)
#define ROM_PERIPHID5 ROM_PERIPHID5_REG(ROM)
#define ROM_PERIPHID6 ROM_PERIPHID6_REG(ROM)
#define ROM_PERIPHID7 ROM_PERIPHID7_REG(ROM)
#define ROM_PERIPHID0 ROM_PERIPHID0_REG(ROM)
#define ROM_PERIPHID1 ROM_PERIPHID1_REG(ROM)
#define ROM_PERIPHID2 ROM_PERIPHID2_REG(ROM)
#define ROM_PERIPHID3 ROM_PERIPHID3_REG(ROM)
#define ROM_COMPID0 ROM_COMPID_REG(ROM,0)
#define ROM_COMPID1 ROM_COMPID_REG(ROM,1)
#define ROM_COMPID2 ROM_COMPID_REG(ROM,2)
#define ROM_COMPID3 ROM_COMPID_REG(ROM,3)
/* ROM - Register array accessors */
#define ROM_ENTRY(index) ROM_ENTRY_REG(ROM,index)
#define ROM_COMPID(index) ROM_COMPID_REG(ROM,index)
/*!
* @}
*/ /* end of group ROM_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group ROM_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- RSIM Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup RSIM_Peripheral_Access_Layer RSIM Peripheral Access Layer
* @{
*/
/** RSIM - Register Layout Typedef */
typedef struct {
__IO uint32_t CONTROL; /**< RSIM Control, offset: 0x0 */
__IO uint32_t ACTIVE_DELAY; /**< RSIM BLE Active Delay, offset: 0x4 */
__I uint32_t MAC_MSB; /**< RSIM MAC MSB, offset: 0x8 */
__I uint32_t MAC_LSB; /**< RSIM MAC LSB, offset: 0xC */
__IO uint32_t ANA_TEST; /**< RSIM Analog Test, offset: 0x10 */
} RSIM_Type, *RSIM_MemMapPtr;
/* ----------------------------------------------------------------------------
-- RSIM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup RSIM_Register_Accessor_Macros RSIM - Register accessor macros
* @{
*/
/* RSIM - Register accessors */
#define RSIM_CONTROL_REG(base) ((base)->CONTROL)
#define RSIM_ACTIVE_DELAY_REG(base) ((base)->ACTIVE_DELAY)
#define RSIM_MAC_MSB_REG(base) ((base)->MAC_MSB)
#define RSIM_MAC_LSB_REG(base) ((base)->MAC_LSB)
#define RSIM_ANA_TEST_REG(base) ((base)->ANA_TEST)
/*!
* @}
*/ /* end of group RSIM_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- RSIM Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup RSIM_Register_Masks RSIM Register Masks
* @{
*/
/* CONTROL Bit Fields */
#define RSIM_CONTROL_BLE_RF_OSC_REQ_EN_MASK 0x1u
#define RSIM_CONTROL_BLE_RF_OSC_REQ_EN_SHIFT 0
#define RSIM_CONTROL_BLE_RF_OSC_REQ_EN_WIDTH 1
#define RSIM_CONTROL_BLE_RF_OSC_REQ_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_RF_OSC_REQ_EN_SHIFT))&RSIM_CONTROL_BLE_RF_OSC_REQ_EN_MASK)
#define RSIM_CONTROL_BLE_RF_OSC_REQ_STAT_MASK 0x2u
#define RSIM_CONTROL_BLE_RF_OSC_REQ_STAT_SHIFT 1
#define RSIM_CONTROL_BLE_RF_OSC_REQ_STAT_WIDTH 1
#define RSIM_CONTROL_BLE_RF_OSC_REQ_STAT(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_RF_OSC_REQ_STAT_SHIFT))&RSIM_CONTROL_BLE_RF_OSC_REQ_STAT_MASK)
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_EN_MASK 0x10u
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_EN_SHIFT 4
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_EN_WIDTH 1
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_RF_OSC_REQ_INT_EN_SHIFT))&RSIM_CONTROL_BLE_RF_OSC_REQ_INT_EN_MASK)
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_MASK 0x20u
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_SHIFT 5
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT_WIDTH 1
#define RSIM_CONTROL_BLE_RF_OSC_REQ_INT(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_RF_OSC_REQ_INT_SHIFT))&RSIM_CONTROL_BLE_RF_OSC_REQ_INT_MASK)
#define RSIM_CONTROL_RF_OSC_EN_MASK 0xF00u
#define RSIM_CONTROL_RF_OSC_EN_SHIFT 8
#define RSIM_CONTROL_RF_OSC_EN_WIDTH 4
#define RSIM_CONTROL_RF_OSC_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_RF_OSC_EN_SHIFT))&RSIM_CONTROL_RF_OSC_EN_MASK)
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_EN_MASK 0x1000u
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_EN_SHIFT 12
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_EN_WIDTH 1
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_GASKET_BYPASS_OVRD_EN_SHIFT))&RSIM_CONTROL_GASKET_BYPASS_OVRD_EN_MASK)
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_MASK 0x2000u
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_SHIFT 13
#define RSIM_CONTROL_GASKET_BYPASS_OVRD_WIDTH 1
#define RSIM_CONTROL_GASKET_BYPASS_OVRD(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_GASKET_BYPASS_OVRD_SHIFT))&RSIM_CONTROL_GASKET_BYPASS_OVRD_MASK)
#define RSIM_CONTROL_RF_OSC_BYPASS_EN_MASK 0x4000u
#define RSIM_CONTROL_RF_OSC_BYPASS_EN_SHIFT 14
#define RSIM_CONTROL_RF_OSC_BYPASS_EN_WIDTH 1
#define RSIM_CONTROL_RF_OSC_BYPASS_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_RF_OSC_BYPASS_EN_SHIFT))&RSIM_CONTROL_RF_OSC_BYPASS_EN_MASK)
#define RSIM_CONTROL_BLE_ACTIVE_PORT_1_SEL_MASK 0x10000u
#define RSIM_CONTROL_BLE_ACTIVE_PORT_1_SEL_SHIFT 16
#define RSIM_CONTROL_BLE_ACTIVE_PORT_1_SEL_WIDTH 1
#define RSIM_CONTROL_BLE_ACTIVE_PORT_1_SEL(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_ACTIVE_PORT_1_SEL_SHIFT))&RSIM_CONTROL_BLE_ACTIVE_PORT_1_SEL_MASK)
#define RSIM_CONTROL_BLE_ACTIVE_PORT_2_SEL_MASK 0x20000u
#define RSIM_CONTROL_BLE_ACTIVE_PORT_2_SEL_SHIFT 17
#define RSIM_CONTROL_BLE_ACTIVE_PORT_2_SEL_WIDTH 1
#define RSIM_CONTROL_BLE_ACTIVE_PORT_2_SEL(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_ACTIVE_PORT_2_SEL_SHIFT))&RSIM_CONTROL_BLE_ACTIVE_PORT_2_SEL_MASK)
#define RSIM_CONTROL_BLE_DEEP_SLEEP_EXIT_MASK 0x100000u
#define RSIM_CONTROL_BLE_DEEP_SLEEP_EXIT_SHIFT 20
#define RSIM_CONTROL_BLE_DEEP_SLEEP_EXIT_WIDTH 1
#define RSIM_CONTROL_BLE_DEEP_SLEEP_EXIT(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLE_DEEP_SLEEP_EXIT_SHIFT))&RSIM_CONTROL_BLE_DEEP_SLEEP_EXIT_MASK)
#define RSIM_CONTROL_STOP_ACK_OVRD_EN_MASK 0x400000u
#define RSIM_CONTROL_STOP_ACK_OVRD_EN_SHIFT 22
#define RSIM_CONTROL_STOP_ACK_OVRD_EN_WIDTH 1
#define RSIM_CONTROL_STOP_ACK_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_STOP_ACK_OVRD_EN_SHIFT))&RSIM_CONTROL_STOP_ACK_OVRD_EN_MASK)
#define RSIM_CONTROL_STOP_ACK_OVRD_MASK 0x800000u
#define RSIM_CONTROL_STOP_ACK_OVRD_SHIFT 23
#define RSIM_CONTROL_STOP_ACK_OVRD_WIDTH 1
#define RSIM_CONTROL_STOP_ACK_OVRD(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_STOP_ACK_OVRD_SHIFT))&RSIM_CONTROL_STOP_ACK_OVRD_MASK)
#define RSIM_CONTROL_RF_OSC_READY_MASK 0x1000000u
#define RSIM_CONTROL_RF_OSC_READY_SHIFT 24
#define RSIM_CONTROL_RF_OSC_READY_WIDTH 1
#define RSIM_CONTROL_RF_OSC_READY(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_RF_OSC_READY_SHIFT))&RSIM_CONTROL_RF_OSC_READY_MASK)
#define RSIM_CONTROL_RF_OSC_READY_OVRD_EN_MASK 0x2000000u
#define RSIM_CONTROL_RF_OSC_READY_OVRD_EN_SHIFT 25
#define RSIM_CONTROL_RF_OSC_READY_OVRD_EN_WIDTH 1
#define RSIM_CONTROL_RF_OSC_READY_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_RF_OSC_READY_OVRD_EN_SHIFT))&RSIM_CONTROL_RF_OSC_READY_OVRD_EN_MASK)
#define RSIM_CONTROL_RF_OSC_READY_OVRD_MASK 0x4000000u
#define RSIM_CONTROL_RF_OSC_READY_OVRD_SHIFT 26
#define RSIM_CONTROL_RF_OSC_READY_OVRD_WIDTH 1
#define RSIM_CONTROL_RF_OSC_READY_OVRD(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_RF_OSC_READY_OVRD_SHIFT))&RSIM_CONTROL_RF_OSC_READY_OVRD_MASK)
#define RSIM_CONTROL_BLOCK_RADIO_RESETS_MASK 0x10000000u
#define RSIM_CONTROL_BLOCK_RADIO_RESETS_SHIFT 28
#define RSIM_CONTROL_BLOCK_RADIO_RESETS_WIDTH 1
#define RSIM_CONTROL_BLOCK_RADIO_RESETS(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLOCK_RADIO_RESETS_SHIFT))&RSIM_CONTROL_BLOCK_RADIO_RESETS_MASK)
#define RSIM_CONTROL_BLOCK_RADIO_OUTPUTS_MASK 0x20000000u
#define RSIM_CONTROL_BLOCK_RADIO_OUTPUTS_SHIFT 29
#define RSIM_CONTROL_BLOCK_RADIO_OUTPUTS_WIDTH 1
#define RSIM_CONTROL_BLOCK_RADIO_OUTPUTS(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_BLOCK_RADIO_OUTPUTS_SHIFT))&RSIM_CONTROL_BLOCK_RADIO_OUTPUTS_MASK)
#define RSIM_CONTROL_RADIO_RESET_MASK 0x80000000u
#define RSIM_CONTROL_RADIO_RESET_SHIFT 31
#define RSIM_CONTROL_RADIO_RESET_WIDTH 1
#define RSIM_CONTROL_RADIO_RESET(x) (((uint32_t)(((uint32_t)(x))<<RSIM_CONTROL_RADIO_RESET_SHIFT))&RSIM_CONTROL_RADIO_RESET_MASK)
/* ACTIVE_DELAY Bit Fields */
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_FINE_DELAY_MASK 0x3Fu
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_FINE_DELAY_SHIFT 0
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_FINE_DELAY_WIDTH 6
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_FINE_DELAY(x) (((uint32_t)(((uint32_t)(x))<<RSIM_ACTIVE_DELAY_BLE_ACTIVE_FINE_DELAY_SHIFT))&RSIM_ACTIVE_DELAY_BLE_ACTIVE_FINE_DELAY_MASK)
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_COARSE_DELAY_MASK 0xF0000u
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_COARSE_DELAY_SHIFT 16
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_COARSE_DELAY_WIDTH 4
#define RSIM_ACTIVE_DELAY_BLE_ACTIVE_COARSE_DELAY(x) (((uint32_t)(((uint32_t)(x))<<RSIM_ACTIVE_DELAY_BLE_ACTIVE_COARSE_DELAY_SHIFT))&RSIM_ACTIVE_DELAY_BLE_ACTIVE_COARSE_DELAY_MASK)
/* MAC_MSB Bit Fields */
#define RSIM_MAC_MSB_MAC_ADDR_MSB_MASK 0xFFu
#define RSIM_MAC_MSB_MAC_ADDR_MSB_SHIFT 0
#define RSIM_MAC_MSB_MAC_ADDR_MSB_WIDTH 8
#define RSIM_MAC_MSB_MAC_ADDR_MSB(x) (((uint32_t)(((uint32_t)(x))<<RSIM_MAC_MSB_MAC_ADDR_MSB_SHIFT))&RSIM_MAC_MSB_MAC_ADDR_MSB_MASK)
/* MAC_LSB Bit Fields */
#define RSIM_MAC_LSB_MAC_ADDR_LSB_MASK 0xFFFFFFFFu
#define RSIM_MAC_LSB_MAC_ADDR_LSB_SHIFT 0
#define RSIM_MAC_LSB_MAC_ADDR_LSB_WIDTH 32
#define RSIM_MAC_LSB_MAC_ADDR_LSB(x) (((uint32_t)(((uint32_t)(x))<<RSIM_MAC_LSB_MAC_ADDR_LSB_SHIFT))&RSIM_MAC_LSB_MAC_ADDR_LSB_MASK)
/* ANA_TEST Bit Fields */
#define RSIM_ANA_TEST_ATST_GATE_EN_MASK 0x1Fu
#define RSIM_ANA_TEST_ATST_GATE_EN_SHIFT 0
#define RSIM_ANA_TEST_ATST_GATE_EN_WIDTH 5
#define RSIM_ANA_TEST_ATST_GATE_EN(x) (((uint32_t)(((uint32_t)(x))<<RSIM_ANA_TEST_ATST_GATE_EN_SHIFT))&RSIM_ANA_TEST_ATST_GATE_EN_MASK)
#define RSIM_ANA_TEST_RADIO_ID_MASK 0xF000000u
#define RSIM_ANA_TEST_RADIO_ID_SHIFT 24
#define RSIM_ANA_TEST_RADIO_ID_WIDTH 4
#define RSIM_ANA_TEST_RADIO_ID(x) (((uint32_t)(((uint32_t)(x))<<RSIM_ANA_TEST_RADIO_ID_SHIFT))&RSIM_ANA_TEST_RADIO_ID_MASK)
/*!
* @}
*/ /* end of group RSIM_Register_Masks */
/* RSIM - Peripheral instance base addresses */
/** Peripheral RSIM base address */
#define RSIM_BASE (0x40059000u)
/** Peripheral RSIM base pointer */
#define RSIM ((RSIM_Type *)RSIM_BASE)
#define RSIM_BASE_PTR (RSIM)
/** Array initializer of RSIM peripheral base addresses */
#define RSIM_BASE_ADDRS { RSIM_BASE }
/** Array initializer of RSIM peripheral base pointers */
#define RSIM_BASE_PTRS { RSIM }
/* ----------------------------------------------------------------------------
-- RSIM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup RSIM_Register_Accessor_Macros RSIM - Register accessor macros
* @{
*/
/* RSIM - Register instance definitions */
/* RSIM */
#define RSIM_CONTROL RSIM_CONTROL_REG(RSIM)
#define RSIM_ACTIVE_DELAY RSIM_ACTIVE_DELAY_REG(RSIM)
#define RSIM_MAC_MSB RSIM_MAC_MSB_REG(RSIM)
#define RSIM_MAC_LSB RSIM_MAC_LSB_REG(RSIM)
#define RSIM_ANA_TEST RSIM_ANA_TEST_REG(RSIM)
/*!
* @}
*/ /* end of group RSIM_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group RSIM_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- RTC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup RTC_Peripheral_Access_Layer RTC Peripheral Access Layer
* @{
*/
/** RTC - Register Layout Typedef */
typedef struct {
__IO uint32_t TSR; /**< RTC Time Seconds Register, offset: 0x0 */
__IO uint32_t TPR; /**< RTC Time Prescaler Register, offset: 0x4 */
__IO uint32_t TAR; /**< RTC Time Alarm Register, offset: 0x8 */
__IO uint32_t TCR; /**< RTC Time Compensation Register, offset: 0xC */
__IO uint32_t CR; /**< RTC Control Register, offset: 0x10 */
__IO uint32_t SR; /**< RTC Status Register, offset: 0x14 */
__IO uint32_t LR; /**< RTC Lock Register, offset: 0x18 */
__IO uint32_t IER; /**< RTC Interrupt Enable Register, offset: 0x1C */
} RTC_Type, *RTC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- RTC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup RTC_Register_Accessor_Macros RTC - Register accessor macros
* @{
*/
/* RTC - Register accessors */
#define RTC_TSR_REG(base) ((base)->TSR)
#define RTC_TPR_REG(base) ((base)->TPR)
#define RTC_TAR_REG(base) ((base)->TAR)
#define RTC_TCR_REG(base) ((base)->TCR)
#define RTC_CR_REG(base) ((base)->CR)
#define RTC_SR_REG(base) ((base)->SR)
#define RTC_LR_REG(base) ((base)->LR)
#define RTC_IER_REG(base) ((base)->IER)
/*!
* @}
*/ /* end of group RTC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- RTC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup RTC_Register_Masks RTC Register Masks
* @{
*/
/* TSR Bit Fields */
#define RTC_TSR_TSR_MASK 0xFFFFFFFFu
#define RTC_TSR_TSR_SHIFT 0
#define RTC_TSR_TSR_WIDTH 32
#define RTC_TSR_TSR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TSR_TSR_SHIFT))&RTC_TSR_TSR_MASK)
/* TPR Bit Fields */
#define RTC_TPR_TPR_MASK 0xFFFFu
#define RTC_TPR_TPR_SHIFT 0
#define RTC_TPR_TPR_WIDTH 16
#define RTC_TPR_TPR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TPR_TPR_SHIFT))&RTC_TPR_TPR_MASK)
/* TAR Bit Fields */
#define RTC_TAR_TAR_MASK 0xFFFFFFFFu
#define RTC_TAR_TAR_SHIFT 0
#define RTC_TAR_TAR_WIDTH 32
#define RTC_TAR_TAR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TAR_TAR_SHIFT))&RTC_TAR_TAR_MASK)
/* TCR Bit Fields */
#define RTC_TCR_TCR_MASK 0xFFu
#define RTC_TCR_TCR_SHIFT 0
#define RTC_TCR_TCR_WIDTH 8
#define RTC_TCR_TCR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_TCR_SHIFT))&RTC_TCR_TCR_MASK)
#define RTC_TCR_CIR_MASK 0xFF00u
#define RTC_TCR_CIR_SHIFT 8
#define RTC_TCR_CIR_WIDTH 8
#define RTC_TCR_CIR(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_CIR_SHIFT))&RTC_TCR_CIR_MASK)
#define RTC_TCR_TCV_MASK 0xFF0000u
#define RTC_TCR_TCV_SHIFT 16
#define RTC_TCR_TCV_WIDTH 8
#define RTC_TCR_TCV(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_TCV_SHIFT))&RTC_TCR_TCV_MASK)
#define RTC_TCR_CIC_MASK 0xFF000000u
#define RTC_TCR_CIC_SHIFT 24
#define RTC_TCR_CIC_WIDTH 8
#define RTC_TCR_CIC(x) (((uint32_t)(((uint32_t)(x))<<RTC_TCR_CIC_SHIFT))&RTC_TCR_CIC_MASK)
/* CR Bit Fields */
#define RTC_CR_SWR_MASK 0x1u
#define RTC_CR_SWR_SHIFT 0
#define RTC_CR_SWR_WIDTH 1
#define RTC_CR_SWR(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_SWR_SHIFT))&RTC_CR_SWR_MASK)
#define RTC_CR_WPE_MASK 0x2u
#define RTC_CR_WPE_SHIFT 1
#define RTC_CR_WPE_WIDTH 1
#define RTC_CR_WPE(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_WPE_SHIFT))&RTC_CR_WPE_MASK)
#define RTC_CR_SUP_MASK 0x4u
#define RTC_CR_SUP_SHIFT 2
#define RTC_CR_SUP_WIDTH 1
#define RTC_CR_SUP(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_SUP_SHIFT))&RTC_CR_SUP_MASK)
#define RTC_CR_UM_MASK 0x8u
#define RTC_CR_UM_SHIFT 3
#define RTC_CR_UM_WIDTH 1
#define RTC_CR_UM(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_UM_SHIFT))&RTC_CR_UM_MASK)
#define RTC_CR_WPS_MASK 0x10u
#define RTC_CR_WPS_SHIFT 4
#define RTC_CR_WPS_WIDTH 1
#define RTC_CR_WPS(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_WPS_SHIFT))&RTC_CR_WPS_MASK)
#define RTC_CR_OSCE_MASK 0x100u
#define RTC_CR_OSCE_SHIFT 8
#define RTC_CR_OSCE_WIDTH 1
#define RTC_CR_OSCE(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_OSCE_SHIFT))&RTC_CR_OSCE_MASK)
#define RTC_CR_CLKO_MASK 0x200u
#define RTC_CR_CLKO_SHIFT 9
#define RTC_CR_CLKO_WIDTH 1
#define RTC_CR_CLKO(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_CLKO_SHIFT))&RTC_CR_CLKO_MASK)
#define RTC_CR_SC16P_MASK 0x400u
#define RTC_CR_SC16P_SHIFT 10
#define RTC_CR_SC16P_WIDTH 1
#define RTC_CR_SC16P(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_SC16P_SHIFT))&RTC_CR_SC16P_MASK)
#define RTC_CR_SC8P_MASK 0x800u
#define RTC_CR_SC8P_SHIFT 11
#define RTC_CR_SC8P_WIDTH 1
#define RTC_CR_SC8P(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_SC8P_SHIFT))&RTC_CR_SC8P_MASK)
#define RTC_CR_SC4P_MASK 0x1000u
#define RTC_CR_SC4P_SHIFT 12
#define RTC_CR_SC4P_WIDTH 1
#define RTC_CR_SC4P(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_SC4P_SHIFT))&RTC_CR_SC4P_MASK)
#define RTC_CR_SC2P_MASK 0x2000u
#define RTC_CR_SC2P_SHIFT 13
#define RTC_CR_SC2P_WIDTH 1
#define RTC_CR_SC2P(x) (((uint32_t)(((uint32_t)(x))<<RTC_CR_SC2P_SHIFT))&RTC_CR_SC2P_MASK)
/* SR Bit Fields */
#define RTC_SR_TIF_MASK 0x1u
#define RTC_SR_TIF_SHIFT 0
#define RTC_SR_TIF_WIDTH 1
#define RTC_SR_TIF(x) (((uint32_t)(((uint32_t)(x))<<RTC_SR_TIF_SHIFT))&RTC_SR_TIF_MASK)
#define RTC_SR_TOF_MASK 0x2u
#define RTC_SR_TOF_SHIFT 1
#define RTC_SR_TOF_WIDTH 1
#define RTC_SR_TOF(x) (((uint32_t)(((uint32_t)(x))<<RTC_SR_TOF_SHIFT))&RTC_SR_TOF_MASK)
#define RTC_SR_TAF_MASK 0x4u
#define RTC_SR_TAF_SHIFT 2
#define RTC_SR_TAF_WIDTH 1
#define RTC_SR_TAF(x) (((uint32_t)(((uint32_t)(x))<<RTC_SR_TAF_SHIFT))&RTC_SR_TAF_MASK)
#define RTC_SR_TCE_MASK 0x10u
#define RTC_SR_TCE_SHIFT 4
#define RTC_SR_TCE_WIDTH 1
#define RTC_SR_TCE(x) (((uint32_t)(((uint32_t)(x))<<RTC_SR_TCE_SHIFT))&RTC_SR_TCE_MASK)
/* LR Bit Fields */
#define RTC_LR_TCL_MASK 0x8u
#define RTC_LR_TCL_SHIFT 3
#define RTC_LR_TCL_WIDTH 1
#define RTC_LR_TCL(x) (((uint32_t)(((uint32_t)(x))<<RTC_LR_TCL_SHIFT))&RTC_LR_TCL_MASK)
#define RTC_LR_CRL_MASK 0x10u
#define RTC_LR_CRL_SHIFT 4
#define RTC_LR_CRL_WIDTH 1
#define RTC_LR_CRL(x) (((uint32_t)(((uint32_t)(x))<<RTC_LR_CRL_SHIFT))&RTC_LR_CRL_MASK)
#define RTC_LR_SRL_MASK 0x20u
#define RTC_LR_SRL_SHIFT 5
#define RTC_LR_SRL_WIDTH 1
#define RTC_LR_SRL(x) (((uint32_t)(((uint32_t)(x))<<RTC_LR_SRL_SHIFT))&RTC_LR_SRL_MASK)
#define RTC_LR_LRL_MASK 0x40u
#define RTC_LR_LRL_SHIFT 6
#define RTC_LR_LRL_WIDTH 1
#define RTC_LR_LRL(x) (((uint32_t)(((uint32_t)(x))<<RTC_LR_LRL_SHIFT))&RTC_LR_LRL_MASK)
/* IER Bit Fields */
#define RTC_IER_TIIE_MASK 0x1u
#define RTC_IER_TIIE_SHIFT 0
#define RTC_IER_TIIE_WIDTH 1
#define RTC_IER_TIIE(x) (((uint32_t)(((uint32_t)(x))<<RTC_IER_TIIE_SHIFT))&RTC_IER_TIIE_MASK)
#define RTC_IER_TOIE_MASK 0x2u
#define RTC_IER_TOIE_SHIFT 1
#define RTC_IER_TOIE_WIDTH 1
#define RTC_IER_TOIE(x) (((uint32_t)(((uint32_t)(x))<<RTC_IER_TOIE_SHIFT))&RTC_IER_TOIE_MASK)
#define RTC_IER_TAIE_MASK 0x4u
#define RTC_IER_TAIE_SHIFT 2
#define RTC_IER_TAIE_WIDTH 1
#define RTC_IER_TAIE(x) (((uint32_t)(((uint32_t)(x))<<RTC_IER_TAIE_SHIFT))&RTC_IER_TAIE_MASK)
#define RTC_IER_TSIE_MASK 0x10u
#define RTC_IER_TSIE_SHIFT 4
#define RTC_IER_TSIE_WIDTH 1
#define RTC_IER_TSIE(x) (((uint32_t)(((uint32_t)(x))<<RTC_IER_TSIE_SHIFT))&RTC_IER_TSIE_MASK)
#define RTC_IER_WPON_MASK 0x80u
#define RTC_IER_WPON_SHIFT 7
#define RTC_IER_WPON_WIDTH 1
#define RTC_IER_WPON(x) (((uint32_t)(((uint32_t)(x))<<RTC_IER_WPON_SHIFT))&RTC_IER_WPON_MASK)
/*!
* @}
*/ /* end of group RTC_Register_Masks */
/* RTC - Peripheral instance base addresses */
/** Peripheral RTC base address */
#define RTC_BASE (0x4003D000u)
/** Peripheral RTC base pointer */
#define RTC ((RTC_Type *)RTC_BASE)
#define RTC_BASE_PTR (RTC)
/** Array initializer of RTC peripheral base addresses */
#define RTC_BASE_ADDRS { RTC_BASE }
/** Array initializer of RTC peripheral base pointers */
#define RTC_BASE_PTRS { RTC }
/** Interrupt vectors for the RTC peripheral type */
#define RTC_IRQS { RTC_IRQn }
#define RTC_SECONDS_IRQS { RTC_Seconds_IRQn }
/* ----------------------------------------------------------------------------
-- RTC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup RTC_Register_Accessor_Macros RTC - Register accessor macros
* @{
*/
/* RTC - Register instance definitions */
/* RTC */
#define RTC_TSR RTC_TSR_REG(RTC)
#define RTC_TPR RTC_TPR_REG(RTC)
#define RTC_TAR RTC_TAR_REG(RTC)
#define RTC_TCR RTC_TCR_REG(RTC)
#define RTC_CR RTC_CR_REG(RTC)
#define RTC_SR RTC_SR_REG(RTC)
#define RTC_LR RTC_LR_REG(RTC)
#define RTC_IER RTC_IER_REG(RTC)
/*!
* @}
*/ /* end of group RTC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group RTC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- SIM Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup SIM_Peripheral_Access_Layer SIM Peripheral Access Layer
* @{
*/
/** SIM - Register Layout Typedef */
typedef struct {
__IO uint32_t SOPT1; /**< System Options Register 1, offset: 0x0 */
uint8_t RESERVED_0[4096];
__IO uint32_t SOPT2; /**< System Options Register 2, offset: 0x1004 */
uint8_t RESERVED_1[4];
__IO uint32_t SOPT4; /**< System Options Register 4, offset: 0x100C */
__IO uint32_t SOPT5; /**< System Options Register 5, offset: 0x1010 */
uint8_t RESERVED_2[4];
__IO uint32_t SOPT7; /**< System Options Register 7, offset: 0x1018 */
uint8_t RESERVED_3[8];
__I uint32_t SDID; /**< System Device Identification Register, offset: 0x1024 */
uint8_t RESERVED_4[12];
__IO uint32_t SCGC4; /**< System Clock Gating Control Register 4, offset: 0x1034 */
__IO uint32_t SCGC5; /**< System Clock Gating Control Register 5, offset: 0x1038 */
__IO uint32_t SCGC6; /**< System Clock Gating Control Register 6, offset: 0x103C */
__IO uint32_t SCGC7; /**< System Clock Gating Control Register 7, offset: 0x1040 */
__IO uint32_t CLKDIV1; /**< System Clock Divider Register 1, offset: 0x1044 */
uint8_t RESERVED_5[4];
__IO uint32_t FCFG1; /**< Flash Configuration Register 1, offset: 0x104C */
__I uint32_t FCFG2; /**< Flash Configuration Register 2, offset: 0x1050 */
uint8_t RESERVED_6[4];
__I uint32_t UIDMH; /**< Unique Identification Register Mid-High, offset: 0x1058 */
__I uint32_t UIDML; /**< Unique Identification Register Mid Low, offset: 0x105C */
__I uint32_t UIDL; /**< Unique Identification Register Low, offset: 0x1060 */
uint8_t RESERVED_7[156];
__IO uint32_t COPC; /**< COP Control Register, offset: 0x1100 */
__O uint32_t SRVCOP; /**< Service COP, offset: 0x1104 */
} SIM_Type, *SIM_MemMapPtr;
/* ----------------------------------------------------------------------------
-- SIM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup SIM_Register_Accessor_Macros SIM - Register accessor macros
* @{
*/
/* SIM - Register accessors */
#define SIM_SOPT1_REG(base) ((base)->SOPT1)
#define SIM_SOPT2_REG(base) ((base)->SOPT2)
#define SIM_SOPT4_REG(base) ((base)->SOPT4)
#define SIM_SOPT5_REG(base) ((base)->SOPT5)
#define SIM_SOPT7_REG(base) ((base)->SOPT7)
#define SIM_SDID_REG(base) ((base)->SDID)
#define SIM_SCGC4_REG(base) ((base)->SCGC4)
#define SIM_SCGC5_REG(base) ((base)->SCGC5)
#define SIM_SCGC6_REG(base) ((base)->SCGC6)
#define SIM_SCGC7_REG(base) ((base)->SCGC7)
#define SIM_CLKDIV1_REG(base) ((base)->CLKDIV1)
#define SIM_FCFG1_REG(base) ((base)->FCFG1)
#define SIM_FCFG2_REG(base) ((base)->FCFG2)
#define SIM_UIDMH_REG(base) ((base)->UIDMH)
#define SIM_UIDML_REG(base) ((base)->UIDML)
#define SIM_UIDL_REG(base) ((base)->UIDL)
#define SIM_COPC_REG(base) ((base)->COPC)
#define SIM_SRVCOP_REG(base) ((base)->SRVCOP)
/*!
* @}
*/ /* end of group SIM_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- SIM Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup SIM_Register_Masks SIM Register Masks
* @{
*/
/* SOPT1 Bit Fields */
#define SIM_SOPT1_OSC32KOUT_MASK 0x30000u
#define SIM_SOPT1_OSC32KOUT_SHIFT 16
#define SIM_SOPT1_OSC32KOUT_WIDTH 2
#define SIM_SOPT1_OSC32KOUT(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT1_OSC32KOUT_SHIFT))&SIM_SOPT1_OSC32KOUT_MASK)
#define SIM_SOPT1_OSC32KSEL_MASK 0xC0000u
#define SIM_SOPT1_OSC32KSEL_SHIFT 18
#define SIM_SOPT1_OSC32KSEL_WIDTH 2
#define SIM_SOPT1_OSC32KSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT1_OSC32KSEL_SHIFT))&SIM_SOPT1_OSC32KSEL_MASK)
/* SOPT2 Bit Fields */
#define SIM_SOPT2_CLKOUTSEL_MASK 0xE0u
#define SIM_SOPT2_CLKOUTSEL_SHIFT 5
#define SIM_SOPT2_CLKOUTSEL_WIDTH 3
#define SIM_SOPT2_CLKOUTSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT2_CLKOUTSEL_SHIFT))&SIM_SOPT2_CLKOUTSEL_MASK)
#define SIM_SOPT2_TPMSRC_MASK 0x3000000u
#define SIM_SOPT2_TPMSRC_SHIFT 24
#define SIM_SOPT2_TPMSRC_WIDTH 2
#define SIM_SOPT2_TPMSRC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT2_TPMSRC_SHIFT))&SIM_SOPT2_TPMSRC_MASK)
#define SIM_SOPT2_LPUART0SRC_MASK 0xC000000u
#define SIM_SOPT2_LPUART0SRC_SHIFT 26
#define SIM_SOPT2_LPUART0SRC_WIDTH 2
#define SIM_SOPT2_LPUART0SRC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT2_LPUART0SRC_SHIFT))&SIM_SOPT2_LPUART0SRC_MASK)
/* SOPT4 Bit Fields */
#define SIM_SOPT4_TPM1CH0SRC_MASK 0x40000u
#define SIM_SOPT4_TPM1CH0SRC_SHIFT 18
#define SIM_SOPT4_TPM1CH0SRC_WIDTH 1
#define SIM_SOPT4_TPM1CH0SRC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT4_TPM1CH0SRC_SHIFT))&SIM_SOPT4_TPM1CH0SRC_MASK)
#define SIM_SOPT4_TPM2CH0SRC_MASK 0x100000u
#define SIM_SOPT4_TPM2CH0SRC_SHIFT 20
#define SIM_SOPT4_TPM2CH0SRC_WIDTH 1
#define SIM_SOPT4_TPM2CH0SRC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT4_TPM2CH0SRC_SHIFT))&SIM_SOPT4_TPM2CH0SRC_MASK)
#define SIM_SOPT4_TPM0CLKSEL_MASK 0x1000000u
#define SIM_SOPT4_TPM0CLKSEL_SHIFT 24
#define SIM_SOPT4_TPM0CLKSEL_WIDTH 1
#define SIM_SOPT4_TPM0CLKSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT4_TPM0CLKSEL_SHIFT))&SIM_SOPT4_TPM0CLKSEL_MASK)
#define SIM_SOPT4_TPM1CLKSEL_MASK 0x2000000u
#define SIM_SOPT4_TPM1CLKSEL_SHIFT 25
#define SIM_SOPT4_TPM1CLKSEL_WIDTH 1
#define SIM_SOPT4_TPM1CLKSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT4_TPM1CLKSEL_SHIFT))&SIM_SOPT4_TPM1CLKSEL_MASK)
#define SIM_SOPT4_TPM2CLKSEL_MASK 0x4000000u
#define SIM_SOPT4_TPM2CLKSEL_SHIFT 26
#define SIM_SOPT4_TPM2CLKSEL_WIDTH 1
#define SIM_SOPT4_TPM2CLKSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT4_TPM2CLKSEL_SHIFT))&SIM_SOPT4_TPM2CLKSEL_MASK)
/* SOPT5 Bit Fields */
#define SIM_SOPT5_LPUART0TXSRC_MASK 0x3u
#define SIM_SOPT5_LPUART0TXSRC_SHIFT 0
#define SIM_SOPT5_LPUART0TXSRC_WIDTH 2
#define SIM_SOPT5_LPUART0TXSRC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT5_LPUART0TXSRC_SHIFT))&SIM_SOPT5_LPUART0TXSRC_MASK)
#define SIM_SOPT5_LPUART0RXSRC_MASK 0x4u
#define SIM_SOPT5_LPUART0RXSRC_SHIFT 2
#define SIM_SOPT5_LPUART0RXSRC_WIDTH 1
#define SIM_SOPT5_LPUART0RXSRC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT5_LPUART0RXSRC_SHIFT))&SIM_SOPT5_LPUART0RXSRC_MASK)
#define SIM_SOPT5_LPUART0ODE_MASK 0x10000u
#define SIM_SOPT5_LPUART0ODE_SHIFT 16
#define SIM_SOPT5_LPUART0ODE_WIDTH 1
#define SIM_SOPT5_LPUART0ODE(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT5_LPUART0ODE_SHIFT))&SIM_SOPT5_LPUART0ODE_MASK)
/* SOPT7 Bit Fields */
#define SIM_SOPT7_ADC0TRGSEL_MASK 0xFu
#define SIM_SOPT7_ADC0TRGSEL_SHIFT 0
#define SIM_SOPT7_ADC0TRGSEL_WIDTH 4
#define SIM_SOPT7_ADC0TRGSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT7_ADC0TRGSEL_SHIFT))&SIM_SOPT7_ADC0TRGSEL_MASK)
#define SIM_SOPT7_ADC0PRETRGSEL_MASK 0x10u
#define SIM_SOPT7_ADC0PRETRGSEL_SHIFT 4
#define SIM_SOPT7_ADC0PRETRGSEL_WIDTH 1
#define SIM_SOPT7_ADC0PRETRGSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT7_ADC0PRETRGSEL_SHIFT))&SIM_SOPT7_ADC0PRETRGSEL_MASK)
#define SIM_SOPT7_ADC0ALTTRGEN_MASK 0x80u
#define SIM_SOPT7_ADC0ALTTRGEN_SHIFT 7
#define SIM_SOPT7_ADC0ALTTRGEN_WIDTH 1
#define SIM_SOPT7_ADC0ALTTRGEN(x) (((uint32_t)(((uint32_t)(x))<<SIM_SOPT7_ADC0ALTTRGEN_SHIFT))&SIM_SOPT7_ADC0ALTTRGEN_MASK)
/* SDID Bit Fields */
#define SIM_SDID_PINID_MASK 0xFu
#define SIM_SDID_PINID_SHIFT 0
#define SIM_SDID_PINID_WIDTH 4
#define SIM_SDID_PINID(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_PINID_SHIFT))&SIM_SDID_PINID_MASK)
#define SIM_SDID_DIEID_MASK 0xF80u
#define SIM_SDID_DIEID_SHIFT 7
#define SIM_SDID_DIEID_WIDTH 5
#define SIM_SDID_DIEID(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_DIEID_SHIFT))&SIM_SDID_DIEID_MASK)
#define SIM_SDID_REVID_MASK 0xF000u
#define SIM_SDID_REVID_SHIFT 12
#define SIM_SDID_REVID_WIDTH 4
#define SIM_SDID_REVID(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_REVID_SHIFT))&SIM_SDID_REVID_MASK)
#define SIM_SDID_SRAMSIZE_MASK 0xF0000u
#define SIM_SDID_SRAMSIZE_SHIFT 16
#define SIM_SDID_SRAMSIZE_WIDTH 4
#define SIM_SDID_SRAMSIZE(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_SRAMSIZE_SHIFT))&SIM_SDID_SRAMSIZE_MASK)
#define SIM_SDID_SERIESID_MASK 0xF00000u
#define SIM_SDID_SERIESID_SHIFT 20
#define SIM_SDID_SERIESID_WIDTH 4
#define SIM_SDID_SERIESID(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_SERIESID_SHIFT))&SIM_SDID_SERIESID_MASK)
#define SIM_SDID_SUBFAMID_MASK 0x3000000u
#define SIM_SDID_SUBFAMID_SHIFT 24
#define SIM_SDID_SUBFAMID_WIDTH 2
#define SIM_SDID_SUBFAMID(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_SUBFAMID_SHIFT))&SIM_SDID_SUBFAMID_MASK)
#define SIM_SDID_FAMID_MASK 0xF0000000u
#define SIM_SDID_FAMID_SHIFT 28
#define SIM_SDID_FAMID_WIDTH 4
#define SIM_SDID_FAMID(x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_FAMID_SHIFT))&SIM_SDID_FAMID_MASK)
/* SCGC4 Bit Fields */
#define SIM_SCGC4_CMT_MASK 0x4u
#define SIM_SCGC4_CMT_SHIFT 2
#define SIM_SCGC4_CMT_WIDTH 1
#define SIM_SCGC4_CMT(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC4_CMT_SHIFT))&SIM_SCGC4_CMT_MASK)
#define SIM_SCGC4_I2C0_MASK 0x40u
#define SIM_SCGC4_I2C0_SHIFT 6
#define SIM_SCGC4_I2C0_WIDTH 1
#define SIM_SCGC4_I2C0(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC4_I2C0_SHIFT))&SIM_SCGC4_I2C0_MASK)
#define SIM_SCGC4_I2C1_MASK 0x80u
#define SIM_SCGC4_I2C1_SHIFT 7
#define SIM_SCGC4_I2C1_WIDTH 1
#define SIM_SCGC4_I2C1(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC4_I2C1_SHIFT))&SIM_SCGC4_I2C1_MASK)
#define SIM_SCGC4_CMP_MASK 0x80000u
#define SIM_SCGC4_CMP_SHIFT 19
#define SIM_SCGC4_CMP_WIDTH 1
#define SIM_SCGC4_CMP(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC4_CMP_SHIFT))&SIM_SCGC4_CMP_MASK)
/* SCGC5 Bit Fields */
#define SIM_SCGC5_LPTMR_MASK 0x1u
#define SIM_SCGC5_LPTMR_SHIFT 0
#define SIM_SCGC5_LPTMR_WIDTH 1
#define SIM_SCGC5_LPTMR(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LPTMR_SHIFT))&SIM_SCGC5_LPTMR_MASK)
#define SIM_SCGC5_TSI_MASK 0x20u
#define SIM_SCGC5_TSI_SHIFT 5
#define SIM_SCGC5_TSI_WIDTH 1
#define SIM_SCGC5_TSI(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_TSI_SHIFT))&SIM_SCGC5_TSI_MASK)
#define SIM_SCGC5_PORTA_MASK 0x200u
#define SIM_SCGC5_PORTA_SHIFT 9
#define SIM_SCGC5_PORTA_WIDTH 1
#define SIM_SCGC5_PORTA(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_PORTA_SHIFT))&SIM_SCGC5_PORTA_MASK)
#define SIM_SCGC5_PORTB_MASK 0x400u
#define SIM_SCGC5_PORTB_SHIFT 10
#define SIM_SCGC5_PORTB_WIDTH 1
#define SIM_SCGC5_PORTB(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_PORTB_SHIFT))&SIM_SCGC5_PORTB_MASK)
#define SIM_SCGC5_PORTC_MASK 0x800u
#define SIM_SCGC5_PORTC_SHIFT 11
#define SIM_SCGC5_PORTC_WIDTH 1
#define SIM_SCGC5_PORTC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_PORTC_SHIFT))&SIM_SCGC5_PORTC_MASK)
#define SIM_SCGC5_LPUART0_MASK 0x100000u
#define SIM_SCGC5_LPUART0_SHIFT 20
#define SIM_SCGC5_LPUART0_WIDTH 1
#define SIM_SCGC5_LPUART0(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LPUART0_SHIFT))&SIM_SCGC5_LPUART0_MASK)
#define SIM_SCGC5_LTC_MASK 0x1000000u
#define SIM_SCGC5_LTC_SHIFT 24
#define SIM_SCGC5_LTC_WIDTH 1
#define SIM_SCGC5_LTC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_LTC_SHIFT))&SIM_SCGC5_LTC_MASK)
#define SIM_SCGC5_RSIM_MASK 0x2000000u
#define SIM_SCGC5_RSIM_SHIFT 25
#define SIM_SCGC5_RSIM_WIDTH 1
#define SIM_SCGC5_RSIM(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_RSIM_SHIFT))&SIM_SCGC5_RSIM_MASK)
#define SIM_SCGC5_DCDC_MASK 0x4000000u
#define SIM_SCGC5_DCDC_SHIFT 26
#define SIM_SCGC5_DCDC_WIDTH 1
#define SIM_SCGC5_DCDC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_DCDC_SHIFT))&SIM_SCGC5_DCDC_MASK)
#define SIM_SCGC5_BTLL_MASK 0x8000000u
#define SIM_SCGC5_BTLL_SHIFT 27
#define SIM_SCGC5_BTLL_WIDTH 1
#define SIM_SCGC5_BTLL(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_BTLL_SHIFT))&SIM_SCGC5_BTLL_MASK)
#define SIM_SCGC5_PHYDIG_MASK 0x10000000u
#define SIM_SCGC5_PHYDIG_SHIFT 28
#define SIM_SCGC5_PHYDIG_WIDTH 1
#define SIM_SCGC5_PHYDIG(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_PHYDIG_SHIFT))&SIM_SCGC5_PHYDIG_MASK)
#define SIM_SCGC5_ZigBee_MASK 0x20000000u
#define SIM_SCGC5_ZigBee_SHIFT 29
#define SIM_SCGC5_ZigBee_WIDTH 1
#define SIM_SCGC5_ZigBee(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC5_ZigBee_SHIFT))&SIM_SCGC5_ZigBee_MASK)
/* SCGC6 Bit Fields */
#define SIM_SCGC6_FTF_MASK 0x1u
#define SIM_SCGC6_FTF_SHIFT 0
#define SIM_SCGC6_FTF_WIDTH 1
#define SIM_SCGC6_FTF(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_FTF_SHIFT))&SIM_SCGC6_FTF_MASK)
#define SIM_SCGC6_DMAMUX_MASK 0x2u
#define SIM_SCGC6_DMAMUX_SHIFT 1
#define SIM_SCGC6_DMAMUX_WIDTH 1
#define SIM_SCGC6_DMAMUX(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_DMAMUX_SHIFT))&SIM_SCGC6_DMAMUX_MASK)
#define SIM_SCGC6_TRNG_MASK 0x200u
#define SIM_SCGC6_TRNG_SHIFT 9
#define SIM_SCGC6_TRNG_WIDTH 1
#define SIM_SCGC6_TRNG(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_TRNG_SHIFT))&SIM_SCGC6_TRNG_MASK)
#define SIM_SCGC6_SPI0_MASK 0x1000u
#define SIM_SCGC6_SPI0_SHIFT 12
#define SIM_SCGC6_SPI0_WIDTH 1
#define SIM_SCGC6_SPI0(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_SPI0_SHIFT))&SIM_SCGC6_SPI0_MASK)
#define SIM_SCGC6_SPI1_MASK 0x2000u
#define SIM_SCGC6_SPI1_SHIFT 13
#define SIM_SCGC6_SPI1_WIDTH 1
#define SIM_SCGC6_SPI1(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_SPI1_SHIFT))&SIM_SCGC6_SPI1_MASK)
#define SIM_SCGC6_PIT_MASK 0x800000u
#define SIM_SCGC6_PIT_SHIFT 23
#define SIM_SCGC6_PIT_WIDTH 1
#define SIM_SCGC6_PIT(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_PIT_SHIFT))&SIM_SCGC6_PIT_MASK)
#define SIM_SCGC6_TPM0_MASK 0x1000000u
#define SIM_SCGC6_TPM0_SHIFT 24
#define SIM_SCGC6_TPM0_WIDTH 1
#define SIM_SCGC6_TPM0(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_TPM0_SHIFT))&SIM_SCGC6_TPM0_MASK)
#define SIM_SCGC6_TPM1_MASK 0x2000000u
#define SIM_SCGC6_TPM1_SHIFT 25
#define SIM_SCGC6_TPM1_WIDTH 1
#define SIM_SCGC6_TPM1(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_TPM1_SHIFT))&SIM_SCGC6_TPM1_MASK)
#define SIM_SCGC6_TPM2_MASK 0x4000000u
#define SIM_SCGC6_TPM2_SHIFT 26
#define SIM_SCGC6_TPM2_WIDTH 1
#define SIM_SCGC6_TPM2(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_TPM2_SHIFT))&SIM_SCGC6_TPM2_MASK)
#define SIM_SCGC6_ADC0_MASK 0x8000000u
#define SIM_SCGC6_ADC0_SHIFT 27
#define SIM_SCGC6_ADC0_WIDTH 1
#define SIM_SCGC6_ADC0(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_ADC0_SHIFT))&SIM_SCGC6_ADC0_MASK)
#define SIM_SCGC6_RTC_MASK 0x20000000u
#define SIM_SCGC6_RTC_SHIFT 29
#define SIM_SCGC6_RTC_WIDTH 1
#define SIM_SCGC6_RTC(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_RTC_SHIFT))&SIM_SCGC6_RTC_MASK)
#define SIM_SCGC6_DAC0_MASK 0x80000000u
#define SIM_SCGC6_DAC0_SHIFT 31
#define SIM_SCGC6_DAC0_WIDTH 1
#define SIM_SCGC6_DAC0(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC6_DAC0_SHIFT))&SIM_SCGC6_DAC0_MASK)
/* SCGC7 Bit Fields */
#define SIM_SCGC7_DMA_MASK 0x100u
#define SIM_SCGC7_DMA_SHIFT 8
#define SIM_SCGC7_DMA_WIDTH 1
#define SIM_SCGC7_DMA(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC7_DMA_SHIFT))&SIM_SCGC7_DMA_MASK)
/* CLKDIV1 Bit Fields */
#define SIM_CLKDIV1_OUTDIV4_MASK 0x70000u
#define SIM_CLKDIV1_OUTDIV4_SHIFT 16
#define SIM_CLKDIV1_OUTDIV4_WIDTH 3
#define SIM_CLKDIV1_OUTDIV4(x) (((uint32_t)(((uint32_t)(x))<<SIM_CLKDIV1_OUTDIV4_SHIFT))&SIM_CLKDIV1_OUTDIV4_MASK)
#define SIM_CLKDIV1_OUTDIV1_MASK 0xF0000000u
#define SIM_CLKDIV1_OUTDIV1_SHIFT 28
#define SIM_CLKDIV1_OUTDIV1_WIDTH 4
#define SIM_CLKDIV1_OUTDIV1(x) (((uint32_t)(((uint32_t)(x))<<SIM_CLKDIV1_OUTDIV1_SHIFT))&SIM_CLKDIV1_OUTDIV1_MASK)
/* FCFG1 Bit Fields */
#define SIM_FCFG1_FLASHDIS_MASK 0x1u
#define SIM_FCFG1_FLASHDIS_SHIFT 0
#define SIM_FCFG1_FLASHDIS_WIDTH 1
#define SIM_FCFG1_FLASHDIS(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG1_FLASHDIS_SHIFT))&SIM_FCFG1_FLASHDIS_MASK)
#define SIM_FCFG1_FLASHDOZE_MASK 0x2u
#define SIM_FCFG1_FLASHDOZE_SHIFT 1
#define SIM_FCFG1_FLASHDOZE_WIDTH 1
#define SIM_FCFG1_FLASHDOZE(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG1_FLASHDOZE_SHIFT))&SIM_FCFG1_FLASHDOZE_MASK)
#define SIM_FCFG1_PFSIZE_MASK 0xF000000u
#define SIM_FCFG1_PFSIZE_SHIFT 24
#define SIM_FCFG1_PFSIZE_WIDTH 4
#define SIM_FCFG1_PFSIZE(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG1_PFSIZE_SHIFT))&SIM_FCFG1_PFSIZE_MASK)
/* FCFG2 Bit Fields */
#define SIM_FCFG2_MAXADDR1_MASK 0x7F0000u
#define SIM_FCFG2_MAXADDR1_SHIFT 16
#define SIM_FCFG2_MAXADDR1_WIDTH 7
#define SIM_FCFG2_MAXADDR1(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG2_MAXADDR1_SHIFT))&SIM_FCFG2_MAXADDR1_MASK)
#define SIM_FCFG2_MAXADDR0_MASK 0x7F000000u
#define SIM_FCFG2_MAXADDR0_SHIFT 24
#define SIM_FCFG2_MAXADDR0_WIDTH 7
#define SIM_FCFG2_MAXADDR0(x) (((uint32_t)(((uint32_t)(x))<<SIM_FCFG2_MAXADDR0_SHIFT))&SIM_FCFG2_MAXADDR0_MASK)
/* UIDMH Bit Fields */
#define SIM_UIDMH_UID_MASK 0xFFFFu
#define SIM_UIDMH_UID_SHIFT 0
#define SIM_UIDMH_UID_WIDTH 16
#define SIM_UIDMH_UID(x) (((uint32_t)(((uint32_t)(x))<<SIM_UIDMH_UID_SHIFT))&SIM_UIDMH_UID_MASK)
/* UIDML Bit Fields */
#define SIM_UIDML_UID_MASK 0xFFFFFFFFu
#define SIM_UIDML_UID_SHIFT 0
#define SIM_UIDML_UID_WIDTH 32
#define SIM_UIDML_UID(x) (((uint32_t)(((uint32_t)(x))<<SIM_UIDML_UID_SHIFT))&SIM_UIDML_UID_MASK)
/* UIDL Bit Fields */
#define SIM_UIDL_UID_MASK 0xFFFFFFFFu
#define SIM_UIDL_UID_SHIFT 0
#define SIM_UIDL_UID_WIDTH 32
#define SIM_UIDL_UID(x) (((uint32_t)(((uint32_t)(x))<<SIM_UIDL_UID_SHIFT))&SIM_UIDL_UID_MASK)
/* COPC Bit Fields */
#define SIM_COPC_COPW_MASK 0x1u
#define SIM_COPC_COPW_SHIFT 0
#define SIM_COPC_COPW_WIDTH 1
#define SIM_COPC_COPW(x) (((uint32_t)(((uint32_t)(x))<<SIM_COPC_COPW_SHIFT))&SIM_COPC_COPW_MASK)
#define SIM_COPC_COPCLKS_MASK 0x2u
#define SIM_COPC_COPCLKS_SHIFT 1
#define SIM_COPC_COPCLKS_WIDTH 1
#define SIM_COPC_COPCLKS(x) (((uint32_t)(((uint32_t)(x))<<SIM_COPC_COPCLKS_SHIFT))&SIM_COPC_COPCLKS_MASK)
#define SIM_COPC_COPT_MASK 0xCu
#define SIM_COPC_COPT_SHIFT 2
#define SIM_COPC_COPT_WIDTH 2
#define SIM_COPC_COPT(x) (((uint32_t)(((uint32_t)(x))<<SIM_COPC_COPT_SHIFT))&SIM_COPC_COPT_MASK)
#define SIM_COPC_COPSTPEN_MASK 0x10u
#define SIM_COPC_COPSTPEN_SHIFT 4
#define SIM_COPC_COPSTPEN_WIDTH 1
#define SIM_COPC_COPSTPEN(x) (((uint32_t)(((uint32_t)(x))<<SIM_COPC_COPSTPEN_SHIFT))&SIM_COPC_COPSTPEN_MASK)
#define SIM_COPC_COPDBGEN_MASK 0x20u
#define SIM_COPC_COPDBGEN_SHIFT 5
#define SIM_COPC_COPDBGEN_WIDTH 1
#define SIM_COPC_COPDBGEN(x) (((uint32_t)(((uint32_t)(x))<<SIM_COPC_COPDBGEN_SHIFT))&SIM_COPC_COPDBGEN_MASK)
#define SIM_COPC_COPCLKSEL_MASK 0xC0u
#define SIM_COPC_COPCLKSEL_SHIFT 6
#define SIM_COPC_COPCLKSEL_WIDTH 2
#define SIM_COPC_COPCLKSEL(x) (((uint32_t)(((uint32_t)(x))<<SIM_COPC_COPCLKSEL_SHIFT))&SIM_COPC_COPCLKSEL_MASK)
/* SRVCOP Bit Fields */
#define SIM_SRVCOP_SRVCOP_MASK 0xFFu
#define SIM_SRVCOP_SRVCOP_SHIFT 0
#define SIM_SRVCOP_SRVCOP_WIDTH 8
#define SIM_SRVCOP_SRVCOP(x) (((uint32_t)(((uint32_t)(x))<<SIM_SRVCOP_SRVCOP_SHIFT))&SIM_SRVCOP_SRVCOP_MASK)
/*!
* @}
*/ /* end of group SIM_Register_Masks */
/* SIM - Peripheral instance base addresses */
/** Peripheral SIM base address */
#define SIM_BASE (0x40047000u)
/** Peripheral SIM base pointer */
#define SIM ((SIM_Type *)SIM_BASE)
#define SIM_BASE_PTR (SIM)
/** Array initializer of SIM peripheral base addresses */
#define SIM_BASE_ADDRS { SIM_BASE }
/** Array initializer of SIM peripheral base pointers */
#define SIM_BASE_PTRS { SIM }
/* ----------------------------------------------------------------------------
-- SIM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup SIM_Register_Accessor_Macros SIM - Register accessor macros
* @{
*/
/* SIM - Register instance definitions */
/* SIM */
#define SIM_SOPT1 SIM_SOPT1_REG(SIM)
#define SIM_SOPT2 SIM_SOPT2_REG(SIM)
#define SIM_SOPT4 SIM_SOPT4_REG(SIM)
#define SIM_SOPT5 SIM_SOPT5_REG(SIM)
#define SIM_SOPT7 SIM_SOPT7_REG(SIM)
#define SIM_SDID SIM_SDID_REG(SIM)
#define SIM_SCGC4 SIM_SCGC4_REG(SIM)
#define SIM_SCGC5 SIM_SCGC5_REG(SIM)
#define SIM_SCGC6 SIM_SCGC6_REG(SIM)
#define SIM_SCGC7 SIM_SCGC7_REG(SIM)
#define SIM_CLKDIV1 SIM_CLKDIV1_REG(SIM)
#define SIM_FCFG1 SIM_FCFG1_REG(SIM)
#define SIM_FCFG2 SIM_FCFG2_REG(SIM)
#define SIM_UIDMH SIM_UIDMH_REG(SIM)
#define SIM_UIDML SIM_UIDML_REG(SIM)
#define SIM_UIDL SIM_UIDL_REG(SIM)
#define SIM_COPC SIM_COPC_REG(SIM)
#define SIM_SRVCOP SIM_SRVCOP_REG(SIM)
/*!
* @}
*/ /* end of group SIM_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group SIM_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- SMC Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup SMC_Peripheral_Access_Layer SMC Peripheral Access Layer
* @{
*/
/** SMC - Register Layout Typedef */
typedef struct {
__IO uint8_t PMPROT; /**< Power Mode Protection register, offset: 0x0 */
__IO uint8_t PMCTRL; /**< Power Mode Control register, offset: 0x1 */
__IO uint8_t STOPCTRL; /**< Stop Control Register, offset: 0x2 */
__I uint8_t PMSTAT; /**< Power Mode Status register, offset: 0x3 */
} SMC_Type, *SMC_MemMapPtr;
/* ----------------------------------------------------------------------------
-- SMC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup SMC_Register_Accessor_Macros SMC - Register accessor macros
* @{
*/
/* SMC - Register accessors */
#define SMC_PMPROT_REG(base) ((base)->PMPROT)
#define SMC_PMCTRL_REG(base) ((base)->PMCTRL)
#define SMC_STOPCTRL_REG(base) ((base)->STOPCTRL)
#define SMC_PMSTAT_REG(base) ((base)->PMSTAT)
/*!
* @}
*/ /* end of group SMC_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- SMC Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup SMC_Register_Masks SMC Register Masks
* @{
*/
/* PMPROT Bit Fields */
#define SMC_PMPROT_AVLLS_MASK 0x2u
#define SMC_PMPROT_AVLLS_SHIFT 1
#define SMC_PMPROT_AVLLS_WIDTH 1
#define SMC_PMPROT_AVLLS(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMPROT_AVLLS_SHIFT))&SMC_PMPROT_AVLLS_MASK)
#define SMC_PMPROT_ALLS_MASK 0x8u
#define SMC_PMPROT_ALLS_SHIFT 3
#define SMC_PMPROT_ALLS_WIDTH 1
#define SMC_PMPROT_ALLS(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMPROT_ALLS_SHIFT))&SMC_PMPROT_ALLS_MASK)
#define SMC_PMPROT_AVLP_MASK 0x20u
#define SMC_PMPROT_AVLP_SHIFT 5
#define SMC_PMPROT_AVLP_WIDTH 1
#define SMC_PMPROT_AVLP(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMPROT_AVLP_SHIFT))&SMC_PMPROT_AVLP_MASK)
/* PMCTRL Bit Fields */
#define SMC_PMCTRL_STOPM_MASK 0x7u
#define SMC_PMCTRL_STOPM_SHIFT 0
#define SMC_PMCTRL_STOPM_WIDTH 3
#define SMC_PMCTRL_STOPM(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMCTRL_STOPM_SHIFT))&SMC_PMCTRL_STOPM_MASK)
#define SMC_PMCTRL_STOPA_MASK 0x8u
#define SMC_PMCTRL_STOPA_SHIFT 3
#define SMC_PMCTRL_STOPA_WIDTH 1
#define SMC_PMCTRL_STOPA(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMCTRL_STOPA_SHIFT))&SMC_PMCTRL_STOPA_MASK)
#define SMC_PMCTRL_RUNM_MASK 0x60u
#define SMC_PMCTRL_RUNM_SHIFT 5
#define SMC_PMCTRL_RUNM_WIDTH 2
#define SMC_PMCTRL_RUNM(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMCTRL_RUNM_SHIFT))&SMC_PMCTRL_RUNM_MASK)
/* STOPCTRL Bit Fields */
#define SMC_STOPCTRL_LLSM_MASK 0x7u
#define SMC_STOPCTRL_LLSM_SHIFT 0
#define SMC_STOPCTRL_LLSM_WIDTH 3
#define SMC_STOPCTRL_LLSM(x) (((uint8_t)(((uint8_t)(x))<<SMC_STOPCTRL_LLSM_SHIFT))&SMC_STOPCTRL_LLSM_MASK)
#define SMC_STOPCTRL_PORPO_MASK 0x20u
#define SMC_STOPCTRL_PORPO_SHIFT 5
#define SMC_STOPCTRL_PORPO_WIDTH 1
#define SMC_STOPCTRL_PORPO(x) (((uint8_t)(((uint8_t)(x))<<SMC_STOPCTRL_PORPO_SHIFT))&SMC_STOPCTRL_PORPO_MASK)
#define SMC_STOPCTRL_PSTOPO_MASK 0xC0u
#define SMC_STOPCTRL_PSTOPO_SHIFT 6
#define SMC_STOPCTRL_PSTOPO_WIDTH 2
#define SMC_STOPCTRL_PSTOPO(x) (((uint8_t)(((uint8_t)(x))<<SMC_STOPCTRL_PSTOPO_SHIFT))&SMC_STOPCTRL_PSTOPO_MASK)
/* PMSTAT Bit Fields */
#define SMC_PMSTAT_PMSTAT_MASK 0xFFu
#define SMC_PMSTAT_PMSTAT_SHIFT 0
#define SMC_PMSTAT_PMSTAT_WIDTH 8
#define SMC_PMSTAT_PMSTAT(x) (((uint8_t)(((uint8_t)(x))<<SMC_PMSTAT_PMSTAT_SHIFT))&SMC_PMSTAT_PMSTAT_MASK)
/*!
* @}
*/ /* end of group SMC_Register_Masks */
/* SMC - Peripheral instance base addresses */
/** Peripheral SMC base address */
#define SMC_BASE (0x4007E000u)
/** Peripheral SMC base pointer */
#define SMC ((SMC_Type *)SMC_BASE)
#define SMC_BASE_PTR (SMC)
/** Array initializer of SMC peripheral base addresses */
#define SMC_BASE_ADDRS { SMC_BASE }
/** Array initializer of SMC peripheral base pointers */
#define SMC_BASE_PTRS { SMC }
/* ----------------------------------------------------------------------------
-- SMC - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup SMC_Register_Accessor_Macros SMC - Register accessor macros
* @{
*/
/* SMC - Register instance definitions */
/* SMC */
#define SMC_PMPROT SMC_PMPROT_REG(SMC)
#define SMC_PMCTRL SMC_PMCTRL_REG(SMC)
#define SMC_STOPCTRL SMC_STOPCTRL_REG(SMC)
#define SMC_PMSTAT SMC_PMSTAT_REG(SMC)
/*!
* @}
*/ /* end of group SMC_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group SMC_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- SPI Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup SPI_Peripheral_Access_Layer SPI Peripheral Access Layer
* @{
*/
/** SPI - Register Layout Typedef */
typedef struct {
__IO uint32_t MCR; /**< Module Configuration Register, offset: 0x0 */
uint8_t RESERVED_0[4];
__IO uint32_t TCR; /**< Transfer Count Register, offset: 0x8 */
union { /* offset: 0xC */
__IO uint32_t CTAR[2]; /**< Clock and Transfer Attributes Register (In Master Mode), array offset: 0xC, array step: 0x4 */
__IO uint32_t CTAR_SLAVE[1]; /**< Clock and Transfer Attributes Register (In Slave Mode), array offset: 0xC, array step: 0x4 */
};
uint8_t RESERVED_1[24];
__IO uint32_t SR; /**< Status Register, offset: 0x2C */
__IO uint32_t RSER; /**< DMA/Interrupt Request Select and Enable Register, offset: 0x30 */
union { /* offset: 0x34 */
__IO uint32_t PUSHR; /**< PUSH TX FIFO Register In Master Mode, offset: 0x34 */
__IO uint32_t PUSHR_SLAVE; /**< PUSH TX FIFO Register In Slave Mode, offset: 0x34 */
};
__I uint32_t POPR; /**< POP RX FIFO Register, offset: 0x38 */
__I uint32_t TXFR0; /**< Transmit FIFO Registers, offset: 0x3C */
__I uint32_t TXFR1; /**< Transmit FIFO Registers, offset: 0x40 */
__I uint32_t TXFR2; /**< Transmit FIFO Registers, offset: 0x44 */
__I uint32_t TXFR3; /**< Transmit FIFO Registers, offset: 0x48 */
uint8_t RESERVED_2[48];
__I uint32_t RXFR0; /**< Receive FIFO Registers, offset: 0x7C */
__I uint32_t RXFR1; /**< Receive FIFO Registers, offset: 0x80 */
__I uint32_t RXFR2; /**< Receive FIFO Registers, offset: 0x84 */
__I uint32_t RXFR3; /**< Receive FIFO Registers, offset: 0x88 */
} SPI_Type, *SPI_MemMapPtr;
/* ----------------------------------------------------------------------------
-- SPI - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup SPI_Register_Accessor_Macros SPI - Register accessor macros
* @{
*/
/* SPI - Register accessors */
#define SPI_MCR_REG(base) ((base)->MCR)
#define SPI_TCR_REG(base) ((base)->TCR)
#define SPI_CTAR_REG(base,index2) ((base)->CTAR[index2])
#define SPI_CTAR_COUNT 2
#define SPI_CTAR_SLAVE_REG(base,index2) ((base)->CTAR_SLAVE[index2])
#define SPI_CTAR_SLAVE_COUNT 1
#define SPI_SR_REG(base) ((base)->SR)
#define SPI_RSER_REG(base) ((base)->RSER)
#define SPI_PUSHR_REG(base) ((base)->PUSHR)
#define SPI_PUSHR_SLAVE_REG(base) ((base)->PUSHR_SLAVE)
#define SPI_POPR_REG(base) ((base)->POPR)
#define SPI_TXFR0_REG(base) ((base)->TXFR0)
#define SPI_TXFR1_REG(base) ((base)->TXFR1)
#define SPI_TXFR2_REG(base) ((base)->TXFR2)
#define SPI_TXFR3_REG(base) ((base)->TXFR3)
#define SPI_RXFR0_REG(base) ((base)->RXFR0)
#define SPI_RXFR1_REG(base) ((base)->RXFR1)
#define SPI_RXFR2_REG(base) ((base)->RXFR2)
#define SPI_RXFR3_REG(base) ((base)->RXFR3)
/*!
* @}
*/ /* end of group SPI_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- SPI Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup SPI_Register_Masks SPI Register Masks
* @{
*/
/* MCR Bit Fields */
#define SPI_MCR_HALT_MASK 0x1u
#define SPI_MCR_HALT_SHIFT 0
#define SPI_MCR_HALT_WIDTH 1
#define SPI_MCR_HALT(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_HALT_SHIFT))&SPI_MCR_HALT_MASK)
#define SPI_MCR_SMPL_PT_MASK 0x300u
#define SPI_MCR_SMPL_PT_SHIFT 8
#define SPI_MCR_SMPL_PT_WIDTH 2
#define SPI_MCR_SMPL_PT(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_SMPL_PT_SHIFT))&SPI_MCR_SMPL_PT_MASK)
#define SPI_MCR_CLR_RXF_MASK 0x400u
#define SPI_MCR_CLR_RXF_SHIFT 10
#define SPI_MCR_CLR_RXF_WIDTH 1
#define SPI_MCR_CLR_RXF(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_CLR_RXF_SHIFT))&SPI_MCR_CLR_RXF_MASK)
#define SPI_MCR_CLR_TXF_MASK 0x800u
#define SPI_MCR_CLR_TXF_SHIFT 11
#define SPI_MCR_CLR_TXF_WIDTH 1
#define SPI_MCR_CLR_TXF(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_CLR_TXF_SHIFT))&SPI_MCR_CLR_TXF_MASK)
#define SPI_MCR_DIS_RXF_MASK 0x1000u
#define SPI_MCR_DIS_RXF_SHIFT 12
#define SPI_MCR_DIS_RXF_WIDTH 1
#define SPI_MCR_DIS_RXF(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_DIS_RXF_SHIFT))&SPI_MCR_DIS_RXF_MASK)
#define SPI_MCR_DIS_TXF_MASK 0x2000u
#define SPI_MCR_DIS_TXF_SHIFT 13
#define SPI_MCR_DIS_TXF_WIDTH 1
#define SPI_MCR_DIS_TXF(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_DIS_TXF_SHIFT))&SPI_MCR_DIS_TXF_MASK)
#define SPI_MCR_MDIS_MASK 0x4000u
#define SPI_MCR_MDIS_SHIFT 14
#define SPI_MCR_MDIS_WIDTH 1
#define SPI_MCR_MDIS(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_MDIS_SHIFT))&SPI_MCR_MDIS_MASK)
#define SPI_MCR_DOZE_MASK 0x8000u
#define SPI_MCR_DOZE_SHIFT 15
#define SPI_MCR_DOZE_WIDTH 1
#define SPI_MCR_DOZE(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_DOZE_SHIFT))&SPI_MCR_DOZE_MASK)
#define SPI_MCR_PCSIS_MASK 0xF0000u
#define SPI_MCR_PCSIS_SHIFT 16
#define SPI_MCR_PCSIS_WIDTH 4
#define SPI_MCR_PCSIS(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_PCSIS_SHIFT))&SPI_MCR_PCSIS_MASK)
#define SPI_MCR_ROOE_MASK 0x1000000u
#define SPI_MCR_ROOE_SHIFT 24
#define SPI_MCR_ROOE_WIDTH 1
#define SPI_MCR_ROOE(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_ROOE_SHIFT))&SPI_MCR_ROOE_MASK)
#define SPI_MCR_MTFE_MASK 0x4000000u
#define SPI_MCR_MTFE_SHIFT 26
#define SPI_MCR_MTFE_WIDTH 1
#define SPI_MCR_MTFE(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_MTFE_SHIFT))&SPI_MCR_MTFE_MASK)
#define SPI_MCR_FRZ_MASK 0x8000000u
#define SPI_MCR_FRZ_SHIFT 27
#define SPI_MCR_FRZ_WIDTH 1
#define SPI_MCR_FRZ(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_FRZ_SHIFT))&SPI_MCR_FRZ_MASK)
#define SPI_MCR_DCONF_MASK 0x30000000u
#define SPI_MCR_DCONF_SHIFT 28
#define SPI_MCR_DCONF_WIDTH 2
#define SPI_MCR_DCONF(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_DCONF_SHIFT))&SPI_MCR_DCONF_MASK)
#define SPI_MCR_CONT_SCKE_MASK 0x40000000u
#define SPI_MCR_CONT_SCKE_SHIFT 30
#define SPI_MCR_CONT_SCKE_WIDTH 1
#define SPI_MCR_CONT_SCKE(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_CONT_SCKE_SHIFT))&SPI_MCR_CONT_SCKE_MASK)
#define SPI_MCR_MSTR_MASK 0x80000000u
#define SPI_MCR_MSTR_SHIFT 31
#define SPI_MCR_MSTR_WIDTH 1
#define SPI_MCR_MSTR(x) (((uint32_t)(((uint32_t)(x))<<SPI_MCR_MSTR_SHIFT))&SPI_MCR_MSTR_MASK)
/* TCR Bit Fields */
#define SPI_TCR_SPI_TCNT_MASK 0xFFFF0000u
#define SPI_TCR_SPI_TCNT_SHIFT 16
#define SPI_TCR_SPI_TCNT_WIDTH 16
#define SPI_TCR_SPI_TCNT(x) (((uint32_t)(((uint32_t)(x))<<SPI_TCR_SPI_TCNT_SHIFT))&SPI_TCR_SPI_TCNT_MASK)
/* CTAR Bit Fields */
#define SPI_CTAR_BR_MASK 0xFu
#define SPI_CTAR_BR_SHIFT 0
#define SPI_CTAR_BR_WIDTH 4
#define SPI_CTAR_BR(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_BR_SHIFT))&SPI_CTAR_BR_MASK)
#define SPI_CTAR_DT_MASK 0xF0u
#define SPI_CTAR_DT_SHIFT 4
#define SPI_CTAR_DT_WIDTH 4
#define SPI_CTAR_DT(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_DT_SHIFT))&SPI_CTAR_DT_MASK)
#define SPI_CTAR_ASC_MASK 0xF00u
#define SPI_CTAR_ASC_SHIFT 8
#define SPI_CTAR_ASC_WIDTH 4
#define SPI_CTAR_ASC(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_ASC_SHIFT))&SPI_CTAR_ASC_MASK)
#define SPI_CTAR_CSSCK_MASK 0xF000u
#define SPI_CTAR_CSSCK_SHIFT 12
#define SPI_CTAR_CSSCK_WIDTH 4
#define SPI_CTAR_CSSCK(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_CSSCK_SHIFT))&SPI_CTAR_CSSCK_MASK)
#define SPI_CTAR_PBR_MASK 0x30000u
#define SPI_CTAR_PBR_SHIFT 16
#define SPI_CTAR_PBR_WIDTH 2
#define SPI_CTAR_PBR(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_PBR_SHIFT))&SPI_CTAR_PBR_MASK)
#define SPI_CTAR_PDT_MASK 0xC0000u
#define SPI_CTAR_PDT_SHIFT 18
#define SPI_CTAR_PDT_WIDTH 2
#define SPI_CTAR_PDT(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_PDT_SHIFT))&SPI_CTAR_PDT_MASK)
#define SPI_CTAR_PASC_MASK 0x300000u
#define SPI_CTAR_PASC_SHIFT 20
#define SPI_CTAR_PASC_WIDTH 2
#define SPI_CTAR_PASC(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_PASC_SHIFT))&SPI_CTAR_PASC_MASK)
#define SPI_CTAR_PCSSCK_MASK 0xC00000u
#define SPI_CTAR_PCSSCK_SHIFT 22
#define SPI_CTAR_PCSSCK_WIDTH 2
#define SPI_CTAR_PCSSCK(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_PCSSCK_SHIFT))&SPI_CTAR_PCSSCK_MASK)
#define SPI_CTAR_LSBFE_MASK 0x1000000u
#define SPI_CTAR_LSBFE_SHIFT 24
#define SPI_CTAR_LSBFE_WIDTH 1
#define SPI_CTAR_LSBFE(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_LSBFE_SHIFT))&SPI_CTAR_LSBFE_MASK)
#define SPI_CTAR_CPHA_MASK 0x2000000u
#define SPI_CTAR_CPHA_SHIFT 25
#define SPI_CTAR_CPHA_WIDTH 1
#define SPI_CTAR_CPHA(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_CPHA_SHIFT))&SPI_CTAR_CPHA_MASK)
#define SPI_CTAR_CPOL_MASK 0x4000000u
#define SPI_CTAR_CPOL_SHIFT 26
#define SPI_CTAR_CPOL_WIDTH 1
#define SPI_CTAR_CPOL(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_CPOL_SHIFT))&SPI_CTAR_CPOL_MASK)
#define SPI_CTAR_FMSZ_MASK 0x78000000u
#define SPI_CTAR_FMSZ_SHIFT 27
#define SPI_CTAR_FMSZ_WIDTH 4
#define SPI_CTAR_FMSZ(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_FMSZ_SHIFT))&SPI_CTAR_FMSZ_MASK)
#define SPI_CTAR_DBR_MASK 0x80000000u
#define SPI_CTAR_DBR_SHIFT 31
#define SPI_CTAR_DBR_WIDTH 1
#define SPI_CTAR_DBR(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_DBR_SHIFT))&SPI_CTAR_DBR_MASK)
/* CTAR_SLAVE Bit Fields */
#define SPI_CTAR_SLAVE_CPHA_MASK 0x2000000u
#define SPI_CTAR_SLAVE_CPHA_SHIFT 25
#define SPI_CTAR_SLAVE_CPHA_WIDTH 1
#define SPI_CTAR_SLAVE_CPHA(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_SLAVE_CPHA_SHIFT))&SPI_CTAR_SLAVE_CPHA_MASK)
#define SPI_CTAR_SLAVE_CPOL_MASK 0x4000000u
#define SPI_CTAR_SLAVE_CPOL_SHIFT 26
#define SPI_CTAR_SLAVE_CPOL_WIDTH 1
#define SPI_CTAR_SLAVE_CPOL(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_SLAVE_CPOL_SHIFT))&SPI_CTAR_SLAVE_CPOL_MASK)
#define SPI_CTAR_SLAVE_FMSZ_MASK 0x78000000u
#define SPI_CTAR_SLAVE_FMSZ_SHIFT 27
#define SPI_CTAR_SLAVE_FMSZ_WIDTH 4
#define SPI_CTAR_SLAVE_FMSZ(x) (((uint32_t)(((uint32_t)(x))<<SPI_CTAR_SLAVE_FMSZ_SHIFT))&SPI_CTAR_SLAVE_FMSZ_MASK)
/* SR Bit Fields */
#define SPI_SR_POPNXTPTR_MASK 0xFu
#define SPI_SR_POPNXTPTR_SHIFT 0
#define SPI_SR_POPNXTPTR_WIDTH 4
#define SPI_SR_POPNXTPTR(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_POPNXTPTR_SHIFT))&SPI_SR_POPNXTPTR_MASK)
#define SPI_SR_RXCTR_MASK 0xF0u
#define SPI_SR_RXCTR_SHIFT 4
#define SPI_SR_RXCTR_WIDTH 4
#define SPI_SR_RXCTR(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_RXCTR_SHIFT))&SPI_SR_RXCTR_MASK)
#define SPI_SR_TXNXTPTR_MASK 0xF00u
#define SPI_SR_TXNXTPTR_SHIFT 8
#define SPI_SR_TXNXTPTR_WIDTH 4
#define SPI_SR_TXNXTPTR(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_TXNXTPTR_SHIFT))&SPI_SR_TXNXTPTR_MASK)
#define SPI_SR_TXCTR_MASK 0xF000u
#define SPI_SR_TXCTR_SHIFT 12
#define SPI_SR_TXCTR_WIDTH 4
#define SPI_SR_TXCTR(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_TXCTR_SHIFT))&SPI_SR_TXCTR_MASK)
#define SPI_SR_RFDF_MASK 0x20000u
#define SPI_SR_RFDF_SHIFT 17
#define SPI_SR_RFDF_WIDTH 1
#define SPI_SR_RFDF(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_RFDF_SHIFT))&SPI_SR_RFDF_MASK)
#define SPI_SR_RFOF_MASK 0x80000u
#define SPI_SR_RFOF_SHIFT 19
#define SPI_SR_RFOF_WIDTH 1
#define SPI_SR_RFOF(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_RFOF_SHIFT))&SPI_SR_RFOF_MASK)
#define SPI_SR_TFFF_MASK 0x2000000u
#define SPI_SR_TFFF_SHIFT 25
#define SPI_SR_TFFF_WIDTH 1
#define SPI_SR_TFFF(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_TFFF_SHIFT))&SPI_SR_TFFF_MASK)
#define SPI_SR_TFUF_MASK 0x8000000u
#define SPI_SR_TFUF_SHIFT 27
#define SPI_SR_TFUF_WIDTH 1
#define SPI_SR_TFUF(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_TFUF_SHIFT))&SPI_SR_TFUF_MASK)
#define SPI_SR_EOQF_MASK 0x10000000u
#define SPI_SR_EOQF_SHIFT 28
#define SPI_SR_EOQF_WIDTH 1
#define SPI_SR_EOQF(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_EOQF_SHIFT))&SPI_SR_EOQF_MASK)
#define SPI_SR_TXRXS_MASK 0x40000000u
#define SPI_SR_TXRXS_SHIFT 30
#define SPI_SR_TXRXS_WIDTH 1
#define SPI_SR_TXRXS(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_TXRXS_SHIFT))&SPI_SR_TXRXS_MASK)
#define SPI_SR_TCF_MASK 0x80000000u
#define SPI_SR_TCF_SHIFT 31
#define SPI_SR_TCF_WIDTH 1
#define SPI_SR_TCF(x) (((uint32_t)(((uint32_t)(x))<<SPI_SR_TCF_SHIFT))&SPI_SR_TCF_MASK)
/* RSER Bit Fields */
#define SPI_RSER_RFDF_DIRS_MASK 0x10000u
#define SPI_RSER_RFDF_DIRS_SHIFT 16
#define SPI_RSER_RFDF_DIRS_WIDTH 1
#define SPI_RSER_RFDF_DIRS(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_RFDF_DIRS_SHIFT))&SPI_RSER_RFDF_DIRS_MASK)
#define SPI_RSER_RFDF_RE_MASK 0x20000u
#define SPI_RSER_RFDF_RE_SHIFT 17
#define SPI_RSER_RFDF_RE_WIDTH 1
#define SPI_RSER_RFDF_RE(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_RFDF_RE_SHIFT))&SPI_RSER_RFDF_RE_MASK)
#define SPI_RSER_RFOF_RE_MASK 0x80000u
#define SPI_RSER_RFOF_RE_SHIFT 19
#define SPI_RSER_RFOF_RE_WIDTH 1
#define SPI_RSER_RFOF_RE(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_RFOF_RE_SHIFT))&SPI_RSER_RFOF_RE_MASK)
#define SPI_RSER_TFFF_DIRS_MASK 0x1000000u
#define SPI_RSER_TFFF_DIRS_SHIFT 24
#define SPI_RSER_TFFF_DIRS_WIDTH 1
#define SPI_RSER_TFFF_DIRS(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_TFFF_DIRS_SHIFT))&SPI_RSER_TFFF_DIRS_MASK)
#define SPI_RSER_TFFF_RE_MASK 0x2000000u
#define SPI_RSER_TFFF_RE_SHIFT 25
#define SPI_RSER_TFFF_RE_WIDTH 1
#define SPI_RSER_TFFF_RE(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_TFFF_RE_SHIFT))&SPI_RSER_TFFF_RE_MASK)
#define SPI_RSER_TFUF_RE_MASK 0x8000000u
#define SPI_RSER_TFUF_RE_SHIFT 27
#define SPI_RSER_TFUF_RE_WIDTH 1
#define SPI_RSER_TFUF_RE(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_TFUF_RE_SHIFT))&SPI_RSER_TFUF_RE_MASK)
#define SPI_RSER_EOQF_RE_MASK 0x10000000u
#define SPI_RSER_EOQF_RE_SHIFT 28
#define SPI_RSER_EOQF_RE_WIDTH 1
#define SPI_RSER_EOQF_RE(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_EOQF_RE_SHIFT))&SPI_RSER_EOQF_RE_MASK)
#define SPI_RSER_TCF_RE_MASK 0x80000000u
#define SPI_RSER_TCF_RE_SHIFT 31
#define SPI_RSER_TCF_RE_WIDTH 1
#define SPI_RSER_TCF_RE(x) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_TCF_RE_SHIFT))&SPI_RSER_TCF_RE_MASK)
/* PUSHR Bit Fields */
#define SPI_PUSHR_TXDATA_MASK 0xFFFFu
#define SPI_PUSHR_TXDATA_SHIFT 0
#define SPI_PUSHR_TXDATA_WIDTH 16
#define SPI_PUSHR_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_TXDATA_SHIFT))&SPI_PUSHR_TXDATA_MASK)
#define SPI_PUSHR_PCS_MASK 0xF0000u
#define SPI_PUSHR_PCS_SHIFT 16
#define SPI_PUSHR_PCS_WIDTH 4
#define SPI_PUSHR_PCS(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_PCS_SHIFT))&SPI_PUSHR_PCS_MASK)
#define SPI_PUSHR_CTCNT_MASK 0x4000000u
#define SPI_PUSHR_CTCNT_SHIFT 26
#define SPI_PUSHR_CTCNT_WIDTH 1
#define SPI_PUSHR_CTCNT(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_CTCNT_SHIFT))&SPI_PUSHR_CTCNT_MASK)
#define SPI_PUSHR_EOQ_MASK 0x8000000u
#define SPI_PUSHR_EOQ_SHIFT 27
#define SPI_PUSHR_EOQ_WIDTH 1
#define SPI_PUSHR_EOQ(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_EOQ_SHIFT))&SPI_PUSHR_EOQ_MASK)
#define SPI_PUSHR_CTAS_MASK 0x70000000u
#define SPI_PUSHR_CTAS_SHIFT 28
#define SPI_PUSHR_CTAS_WIDTH 3
#define SPI_PUSHR_CTAS(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_CTAS_SHIFT))&SPI_PUSHR_CTAS_MASK)
#define SPI_PUSHR_CONT_MASK 0x80000000u
#define SPI_PUSHR_CONT_SHIFT 31
#define SPI_PUSHR_CONT_WIDTH 1
#define SPI_PUSHR_CONT(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_CONT_SHIFT))&SPI_PUSHR_CONT_MASK)
/* PUSHR_SLAVE Bit Fields */
#define SPI_PUSHR_SLAVE_TXDATA_MASK 0xFFFFFFFFu
#define SPI_PUSHR_SLAVE_TXDATA_SHIFT 0
#define SPI_PUSHR_SLAVE_TXDATA_WIDTH 32
#define SPI_PUSHR_SLAVE_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_PUSHR_SLAVE_TXDATA_SHIFT))&SPI_PUSHR_SLAVE_TXDATA_MASK)
/* POPR Bit Fields */
#define SPI_POPR_RXDATA_MASK 0xFFFFFFFFu
#define SPI_POPR_RXDATA_SHIFT 0
#define SPI_POPR_RXDATA_WIDTH 32
#define SPI_POPR_RXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_POPR_RXDATA_SHIFT))&SPI_POPR_RXDATA_MASK)
/* TXFR0 Bit Fields */
#define SPI_TXFR0_TXDATA_MASK 0xFFFFu
#define SPI_TXFR0_TXDATA_SHIFT 0
#define SPI_TXFR0_TXDATA_WIDTH 16
#define SPI_TXFR0_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR0_TXDATA_SHIFT))&SPI_TXFR0_TXDATA_MASK)
#define SPI_TXFR0_TXCMD_TXDATA_MASK 0xFFFF0000u
#define SPI_TXFR0_TXCMD_TXDATA_SHIFT 16
#define SPI_TXFR0_TXCMD_TXDATA_WIDTH 16
#define SPI_TXFR0_TXCMD_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR0_TXCMD_TXDATA_SHIFT))&SPI_TXFR0_TXCMD_TXDATA_MASK)
/* TXFR1 Bit Fields */
#define SPI_TXFR1_TXDATA_MASK 0xFFFFu
#define SPI_TXFR1_TXDATA_SHIFT 0
#define SPI_TXFR1_TXDATA_WIDTH 16
#define SPI_TXFR1_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR1_TXDATA_SHIFT))&SPI_TXFR1_TXDATA_MASK)
#define SPI_TXFR1_TXCMD_TXDATA_MASK 0xFFFF0000u
#define SPI_TXFR1_TXCMD_TXDATA_SHIFT 16
#define SPI_TXFR1_TXCMD_TXDATA_WIDTH 16
#define SPI_TXFR1_TXCMD_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR1_TXCMD_TXDATA_SHIFT))&SPI_TXFR1_TXCMD_TXDATA_MASK)
/* TXFR2 Bit Fields */
#define SPI_TXFR2_TXDATA_MASK 0xFFFFu
#define SPI_TXFR2_TXDATA_SHIFT 0
#define SPI_TXFR2_TXDATA_WIDTH 16
#define SPI_TXFR2_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR2_TXDATA_SHIFT))&SPI_TXFR2_TXDATA_MASK)
#define SPI_TXFR2_TXCMD_TXDATA_MASK 0xFFFF0000u
#define SPI_TXFR2_TXCMD_TXDATA_SHIFT 16
#define SPI_TXFR2_TXCMD_TXDATA_WIDTH 16
#define SPI_TXFR2_TXCMD_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR2_TXCMD_TXDATA_SHIFT))&SPI_TXFR2_TXCMD_TXDATA_MASK)
/* TXFR3 Bit Fields */
#define SPI_TXFR3_TXDATA_MASK 0xFFFFu
#define SPI_TXFR3_TXDATA_SHIFT 0
#define SPI_TXFR3_TXDATA_WIDTH 16
#define SPI_TXFR3_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR3_TXDATA_SHIFT))&SPI_TXFR3_TXDATA_MASK)
#define SPI_TXFR3_TXCMD_TXDATA_MASK 0xFFFF0000u
#define SPI_TXFR3_TXCMD_TXDATA_SHIFT 16
#define SPI_TXFR3_TXCMD_TXDATA_WIDTH 16
#define SPI_TXFR3_TXCMD_TXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_TXFR3_TXCMD_TXDATA_SHIFT))&SPI_TXFR3_TXCMD_TXDATA_MASK)
/* RXFR0 Bit Fields */
#define SPI_RXFR0_RXDATA_MASK 0xFFFFFFFFu
#define SPI_RXFR0_RXDATA_SHIFT 0
#define SPI_RXFR0_RXDATA_WIDTH 32
#define SPI_RXFR0_RXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_RXFR0_RXDATA_SHIFT))&SPI_RXFR0_RXDATA_MASK)
/* RXFR1 Bit Fields */
#define SPI_RXFR1_RXDATA_MASK 0xFFFFFFFFu
#define SPI_RXFR1_RXDATA_SHIFT 0
#define SPI_RXFR1_RXDATA_WIDTH 32
#define SPI_RXFR1_RXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_RXFR1_RXDATA_SHIFT))&SPI_RXFR1_RXDATA_MASK)
/* RXFR2 Bit Fields */
#define SPI_RXFR2_RXDATA_MASK 0xFFFFFFFFu
#define SPI_RXFR2_RXDATA_SHIFT 0
#define SPI_RXFR2_RXDATA_WIDTH 32
#define SPI_RXFR2_RXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_RXFR2_RXDATA_SHIFT))&SPI_RXFR2_RXDATA_MASK)
/* RXFR3 Bit Fields */
#define SPI_RXFR3_RXDATA_MASK 0xFFFFFFFFu
#define SPI_RXFR3_RXDATA_SHIFT 0
#define SPI_RXFR3_RXDATA_WIDTH 32
#define SPI_RXFR3_RXDATA(x) (((uint32_t)(((uint32_t)(x))<<SPI_RXFR3_RXDATA_SHIFT))&SPI_RXFR3_RXDATA_MASK)
/*!
* @}
*/ /* end of group SPI_Register_Masks */
/* SPI - Peripheral instance base addresses */
/** Peripheral SPI0 base address */
#define SPI0_BASE (0x4002C000u)
/** Peripheral SPI0 base pointer */
#define SPI0 ((SPI_Type *)SPI0_BASE)
#define SPI0_BASE_PTR (SPI0)
/** Peripheral SPI1 base address */
#define SPI1_BASE (0x4002D000u)
/** Peripheral SPI1 base pointer */
#define SPI1 ((SPI_Type *)SPI1_BASE)
#define SPI1_BASE_PTR (SPI1)
/** Array initializer of SPI peripheral base addresses */
#define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
/** Array initializer of SPI peripheral base pointers */
#define SPI_BASE_PTRS { SPI0, SPI1 }
/** Interrupt vectors for the SPI peripheral type */
#define SPI_IRQS { SPI0_IRQn, SPI1_IRQn }
/* ----------------------------------------------------------------------------
-- SPI - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup SPI_Register_Accessor_Macros SPI - Register accessor macros
* @{
*/
/* SPI - Register instance definitions */
/* SPI0 */
#define SPI0_MCR SPI_MCR_REG(SPI0)
#define SPI0_TCR SPI_TCR_REG(SPI0)
#define SPI0_CTAR0 SPI_CTAR_REG(SPI0,0)
#define SPI0_CTAR0_SLAVE SPI_CTAR_SLAVE_REG(SPI0,0)
#define SPI0_CTAR1 SPI_CTAR_REG(SPI0,1)
#define SPI0_SR SPI_SR_REG(SPI0)
#define SPI0_RSER SPI_RSER_REG(SPI0)
#define SPI0_PUSHR SPI_PUSHR_REG(SPI0)
#define SPI0_PUSHR_SLAVE SPI_PUSHR_SLAVE_REG(SPI0)
#define SPI0_POPR SPI_POPR_REG(SPI0)
#define SPI0_TXFR0 SPI_TXFR0_REG(SPI0)
#define SPI0_TXFR1 SPI_TXFR1_REG(SPI0)
#define SPI0_TXFR2 SPI_TXFR2_REG(SPI0)
#define SPI0_TXFR3 SPI_TXFR3_REG(SPI0)
#define SPI0_RXFR0 SPI_RXFR0_REG(SPI0)
#define SPI0_RXFR1 SPI_RXFR1_REG(SPI0)
#define SPI0_RXFR2 SPI_RXFR2_REG(SPI0)
#define SPI0_RXFR3 SPI_RXFR3_REG(SPI0)
/* SPI1 */
#define SPI1_MCR SPI_MCR_REG(SPI1)
#define SPI1_TCR SPI_TCR_REG(SPI1)
#define SPI1_CTAR0 SPI_CTAR_REG(SPI1,0)
#define SPI1_CTAR0_SLAVE SPI_CTAR_SLAVE_REG(SPI1,0)
#define SPI1_CTAR1 SPI_CTAR_REG(SPI1,1)
#define SPI1_SR SPI_SR_REG(SPI1)
#define SPI1_RSER SPI_RSER_REG(SPI1)
#define SPI1_PUSHR SPI_PUSHR_REG(SPI1)
#define SPI1_PUSHR_SLAVE SPI_PUSHR_SLAVE_REG(SPI1)
#define SPI1_POPR SPI_POPR_REG(SPI1)
#define SPI1_TXFR0 SPI_TXFR0_REG(SPI1)
#define SPI1_TXFR1 SPI_TXFR1_REG(SPI1)
#define SPI1_TXFR2 SPI_TXFR2_REG(SPI1)
#define SPI1_TXFR3 SPI_TXFR3_REG(SPI1)
#define SPI1_RXFR0 SPI_RXFR0_REG(SPI1)
#define SPI1_RXFR1 SPI_RXFR1_REG(SPI1)
#define SPI1_RXFR2 SPI_RXFR2_REG(SPI1)
#define SPI1_RXFR3 SPI_RXFR3_REG(SPI1)
/* SPI - Register array accessors */
#define SPI0_CTAR(index2) SPI_CTAR_REG(SPI0,index2)
#define SPI1_CTAR(index2) SPI_CTAR_REG(SPI1,index2)
#define SPI0_CTAR_SLAVE(index2) SPI_CTAR_SLAVE_REG(SPI0,index2)
#define SPI1_CTAR_SLAVE(index2) SPI_CTAR_SLAVE_REG(SPI1,index2)
/*!
* @}
*/ /* end of group SPI_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group SPI_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- TPM Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup TPM_Peripheral_Access_Layer TPM Peripheral Access Layer
* @{
*/
/** TPM - Register Layout Typedef */
typedef struct {
__IO uint32_t SC; /**< Status and Control, offset: 0x0 */
__IO uint32_t CNT; /**< Counter, offset: 0x4 */
__IO uint32_t MOD; /**< Modulo, offset: 0x8 */
struct { /* offset: 0xC, array step: 0x8 */
__IO uint32_t CnSC; /**< Channel (n) Status and Control, array offset: 0xC, array step: 0x8 */
__IO uint32_t CnV; /**< Channel (n) Value, array offset: 0x10, array step: 0x8 */
} CONTROLS[4];
uint8_t RESERVED_0[36];
__IO uint32_t STATUS; /**< Capture and Compare Status, offset: 0x50 */
uint8_t RESERVED_1[16];
__IO uint32_t COMBINE; /**< Combine Channel Register, offset: 0x64 */
uint8_t RESERVED_2[16];
__IO uint32_t FILTER; /**< Filter Control, offset: 0x78 */
uint8_t RESERVED_3[4];
__IO uint32_t QDCTRL; /**< Quadrature Decoder Control and Status, offset: 0x80 */
__IO uint32_t CONF; /**< Configuration, offset: 0x84 */
} TPM_Type, *TPM_MemMapPtr;
/* ----------------------------------------------------------------------------
-- TPM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup TPM_Register_Accessor_Macros TPM - Register accessor macros
* @{
*/
/* TPM - Register accessors */
#define TPM_SC_REG(base) ((base)->SC)
#define TPM_CNT_REG(base) ((base)->CNT)
#define TPM_MOD_REG(base) ((base)->MOD)
#define TPM_CnSC_REG(base,index) ((base)->CONTROLS[index].CnSC)
#define TPM_CnSC_COUNT 4
#define TPM_CnV_REG(base,index) ((base)->CONTROLS[index].CnV)
#define TPM_CnV_COUNT 4
#define TPM_STATUS_REG(base) ((base)->STATUS)
#define TPM_COMBINE_REG(base) ((base)->COMBINE)
#define TPM_FILTER_REG(base) ((base)->FILTER)
#define TPM_QDCTRL_REG(base) ((base)->QDCTRL)
#define TPM_CONF_REG(base) ((base)->CONF)
/*!
* @}
*/ /* end of group TPM_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- TPM Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup TPM_Register_Masks TPM Register Masks
* @{
*/
/* SC Bit Fields */
#define TPM_SC_PS_MASK 0x7u
#define TPM_SC_PS_SHIFT 0
#define TPM_SC_PS_WIDTH 3
#define TPM_SC_PS(x) (((uint32_t)(((uint32_t)(x))<<TPM_SC_PS_SHIFT))&TPM_SC_PS_MASK)
#define TPM_SC_CMOD_MASK 0x18u
#define TPM_SC_CMOD_SHIFT 3
#define TPM_SC_CMOD_WIDTH 2
#define TPM_SC_CMOD(x) (((uint32_t)(((uint32_t)(x))<<TPM_SC_CMOD_SHIFT))&TPM_SC_CMOD_MASK)
#define TPM_SC_CPWMS_MASK 0x20u
#define TPM_SC_CPWMS_SHIFT 5
#define TPM_SC_CPWMS_WIDTH 1
#define TPM_SC_CPWMS(x) (((uint32_t)(((uint32_t)(x))<<TPM_SC_CPWMS_SHIFT))&TPM_SC_CPWMS_MASK)
#define TPM_SC_TOIE_MASK 0x40u
#define TPM_SC_TOIE_SHIFT 6
#define TPM_SC_TOIE_WIDTH 1
#define TPM_SC_TOIE(x) (((uint32_t)(((uint32_t)(x))<<TPM_SC_TOIE_SHIFT))&TPM_SC_TOIE_MASK)
#define TPM_SC_TOF_MASK 0x80u
#define TPM_SC_TOF_SHIFT 7
#define TPM_SC_TOF_WIDTH 1
#define TPM_SC_TOF(x) (((uint32_t)(((uint32_t)(x))<<TPM_SC_TOF_SHIFT))&TPM_SC_TOF_MASK)
#define TPM_SC_DMA_MASK 0x100u
#define TPM_SC_DMA_SHIFT 8
#define TPM_SC_DMA_WIDTH 1
#define TPM_SC_DMA(x) (((uint32_t)(((uint32_t)(x))<<TPM_SC_DMA_SHIFT))&TPM_SC_DMA_MASK)
/* CNT Bit Fields */
#define TPM_CNT_COUNT_MASK 0xFFFFu
#define TPM_CNT_COUNT_SHIFT 0
#define TPM_CNT_COUNT_WIDTH 16
#define TPM_CNT_COUNT(x) (((uint32_t)(((uint32_t)(x))<<TPM_CNT_COUNT_SHIFT))&TPM_CNT_COUNT_MASK)
/* MOD Bit Fields */
#define TPM_MOD_MOD_MASK 0xFFFFu
#define TPM_MOD_MOD_SHIFT 0
#define TPM_MOD_MOD_WIDTH 16
#define TPM_MOD_MOD(x) (((uint32_t)(((uint32_t)(x))<<TPM_MOD_MOD_SHIFT))&TPM_MOD_MOD_MASK)
/* CnSC Bit Fields */
#define TPM_CnSC_DMA_MASK 0x1u
#define TPM_CnSC_DMA_SHIFT 0
#define TPM_CnSC_DMA_WIDTH 1
#define TPM_CnSC_DMA(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_DMA_SHIFT))&TPM_CnSC_DMA_MASK)
#define TPM_CnSC_ELSA_MASK 0x4u
#define TPM_CnSC_ELSA_SHIFT 2
#define TPM_CnSC_ELSA_WIDTH 1
#define TPM_CnSC_ELSA(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_ELSA_SHIFT))&TPM_CnSC_ELSA_MASK)
#define TPM_CnSC_ELSB_MASK 0x8u
#define TPM_CnSC_ELSB_SHIFT 3
#define TPM_CnSC_ELSB_WIDTH 1
#define TPM_CnSC_ELSB(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_ELSB_SHIFT))&TPM_CnSC_ELSB_MASK)
#define TPM_CnSC_MSA_MASK 0x10u
#define TPM_CnSC_MSA_SHIFT 4
#define TPM_CnSC_MSA_WIDTH 1
#define TPM_CnSC_MSA(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_MSA_SHIFT))&TPM_CnSC_MSA_MASK)
#define TPM_CnSC_MSB_MASK 0x20u
#define TPM_CnSC_MSB_SHIFT 5
#define TPM_CnSC_MSB_WIDTH 1
#define TPM_CnSC_MSB(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_MSB_SHIFT))&TPM_CnSC_MSB_MASK)
#define TPM_CnSC_CHIE_MASK 0x40u
#define TPM_CnSC_CHIE_SHIFT 6
#define TPM_CnSC_CHIE_WIDTH 1
#define TPM_CnSC_CHIE(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_CHIE_SHIFT))&TPM_CnSC_CHIE_MASK)
#define TPM_CnSC_CHF_MASK 0x80u
#define TPM_CnSC_CHF_SHIFT 7
#define TPM_CnSC_CHF_WIDTH 1
#define TPM_CnSC_CHF(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_CHF_SHIFT))&TPM_CnSC_CHF_MASK)
/* CnV Bit Fields */
#define TPM_CnV_VAL_MASK 0xFFFFu
#define TPM_CnV_VAL_SHIFT 0
#define TPM_CnV_VAL_WIDTH 16
#define TPM_CnV_VAL(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnV_VAL_SHIFT))&TPM_CnV_VAL_MASK)
/* STATUS Bit Fields */
#define TPM_STATUS_CH0F_MASK 0x1u
#define TPM_STATUS_CH0F_SHIFT 0
#define TPM_STATUS_CH0F_WIDTH 1
#define TPM_STATUS_CH0F(x) (((uint32_t)(((uint32_t)(x))<<TPM_STATUS_CH0F_SHIFT))&TPM_STATUS_CH0F_MASK)
#define TPM_STATUS_CH1F_MASK 0x2u
#define TPM_STATUS_CH1F_SHIFT 1
#define TPM_STATUS_CH1F_WIDTH 1
#define TPM_STATUS_CH1F(x) (((uint32_t)(((uint32_t)(x))<<TPM_STATUS_CH1F_SHIFT))&TPM_STATUS_CH1F_MASK)
#define TPM_STATUS_CH2F_MASK 0x4u
#define TPM_STATUS_CH2F_SHIFT 2
#define TPM_STATUS_CH2F_WIDTH 1
#define TPM_STATUS_CH2F(x) (((uint32_t)(((uint32_t)(x))<<TPM_STATUS_CH2F_SHIFT))&TPM_STATUS_CH2F_MASK)
#define TPM_STATUS_CH3F_MASK 0x8u
#define TPM_STATUS_CH3F_SHIFT 3
#define TPM_STATUS_CH3F_WIDTH 1
#define TPM_STATUS_CH3F(x) (((uint32_t)(((uint32_t)(x))<<TPM_STATUS_CH3F_SHIFT))&TPM_STATUS_CH3F_MASK)
#define TPM_STATUS_TOF_MASK 0x100u
#define TPM_STATUS_TOF_SHIFT 8
#define TPM_STATUS_TOF_WIDTH 1
#define TPM_STATUS_TOF(x) (((uint32_t)(((uint32_t)(x))<<TPM_STATUS_TOF_SHIFT))&TPM_STATUS_TOF_MASK)
/* COMBINE Bit Fields */
#define TPM_COMBINE_COMBINE0_MASK 0x1u
#define TPM_COMBINE_COMBINE0_SHIFT 0
#define TPM_COMBINE_COMBINE0_WIDTH 1
#define TPM_COMBINE_COMBINE0(x) (((uint32_t)(((uint32_t)(x))<<TPM_COMBINE_COMBINE0_SHIFT))&TPM_COMBINE_COMBINE0_MASK)
#define TPM_COMBINE_COMSWAP0_MASK 0x2u
#define TPM_COMBINE_COMSWAP0_SHIFT 1
#define TPM_COMBINE_COMSWAP0_WIDTH 1
#define TPM_COMBINE_COMSWAP0(x) (((uint32_t)(((uint32_t)(x))<<TPM_COMBINE_COMSWAP0_SHIFT))&TPM_COMBINE_COMSWAP0_MASK)
#define TPM_COMBINE_COMBINE1_MASK 0x100u
#define TPM_COMBINE_COMBINE1_SHIFT 8
#define TPM_COMBINE_COMBINE1_WIDTH 1
#define TPM_COMBINE_COMBINE1(x) (((uint32_t)(((uint32_t)(x))<<TPM_COMBINE_COMBINE1_SHIFT))&TPM_COMBINE_COMBINE1_MASK)
#define TPM_COMBINE_COMSWAP1_MASK 0x200u
#define TPM_COMBINE_COMSWAP1_SHIFT 9
#define TPM_COMBINE_COMSWAP1_WIDTH 1
#define TPM_COMBINE_COMSWAP1(x) (((uint32_t)(((uint32_t)(x))<<TPM_COMBINE_COMSWAP1_SHIFT))&TPM_COMBINE_COMSWAP1_MASK)
/* FILTER Bit Fields */
#define TPM_FILTER_CH0FVAL_MASK 0xFu
#define TPM_FILTER_CH0FVAL_SHIFT 0
#define TPM_FILTER_CH0FVAL_WIDTH 4
#define TPM_FILTER_CH0FVAL(x) (((uint32_t)(((uint32_t)(x))<<TPM_FILTER_CH0FVAL_SHIFT))&TPM_FILTER_CH0FVAL_MASK)
#define TPM_FILTER_CH1FVAL_MASK 0xF0u
#define TPM_FILTER_CH1FVAL_SHIFT 4
#define TPM_FILTER_CH1FVAL_WIDTH 4
#define TPM_FILTER_CH1FVAL(x) (((uint32_t)(((uint32_t)(x))<<TPM_FILTER_CH1FVAL_SHIFT))&TPM_FILTER_CH1FVAL_MASK)
#define TPM_FILTER_CH2FVAL_MASK 0xF00u
#define TPM_FILTER_CH2FVAL_SHIFT 8
#define TPM_FILTER_CH2FVAL_WIDTH 4
#define TPM_FILTER_CH2FVAL(x) (((uint32_t)(((uint32_t)(x))<<TPM_FILTER_CH2FVAL_SHIFT))&TPM_FILTER_CH2FVAL_MASK)
#define TPM_FILTER_CH3FVAL_MASK 0xF000u
#define TPM_FILTER_CH3FVAL_SHIFT 12
#define TPM_FILTER_CH3FVAL_WIDTH 4
#define TPM_FILTER_CH3FVAL(x) (((uint32_t)(((uint32_t)(x))<<TPM_FILTER_CH3FVAL_SHIFT))&TPM_FILTER_CH3FVAL_MASK)
/* QDCTRL Bit Fields */
#define TPM_QDCTRL_QUADEN_MASK 0x1u
#define TPM_QDCTRL_QUADEN_SHIFT 0
#define TPM_QDCTRL_QUADEN_WIDTH 1
#define TPM_QDCTRL_QUADEN(x) (((uint32_t)(((uint32_t)(x))<<TPM_QDCTRL_QUADEN_SHIFT))&TPM_QDCTRL_QUADEN_MASK)
#define TPM_QDCTRL_TOFDIR_MASK 0x2u
#define TPM_QDCTRL_TOFDIR_SHIFT 1
#define TPM_QDCTRL_TOFDIR_WIDTH 1
#define TPM_QDCTRL_TOFDIR(x) (((uint32_t)(((uint32_t)(x))<<TPM_QDCTRL_TOFDIR_SHIFT))&TPM_QDCTRL_TOFDIR_MASK)
#define TPM_QDCTRL_QUADIR_MASK 0x4u
#define TPM_QDCTRL_QUADIR_SHIFT 2
#define TPM_QDCTRL_QUADIR_WIDTH 1
#define TPM_QDCTRL_QUADIR(x) (((uint32_t)(((uint32_t)(x))<<TPM_QDCTRL_QUADIR_SHIFT))&TPM_QDCTRL_QUADIR_MASK)
#define TPM_QDCTRL_QUADMODE_MASK 0x8u
#define TPM_QDCTRL_QUADMODE_SHIFT 3
#define TPM_QDCTRL_QUADMODE_WIDTH 1
#define TPM_QDCTRL_QUADMODE(x) (((uint32_t)(((uint32_t)(x))<<TPM_QDCTRL_QUADMODE_SHIFT))&TPM_QDCTRL_QUADMODE_MASK)
/* CONF Bit Fields */
#define TPM_CONF_DOZEEN_MASK 0x20u
#define TPM_CONF_DOZEEN_SHIFT 5
#define TPM_CONF_DOZEEN_WIDTH 1
#define TPM_CONF_DOZEEN(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_DOZEEN_SHIFT))&TPM_CONF_DOZEEN_MASK)
#define TPM_CONF_DBGMODE_MASK 0xC0u
#define TPM_CONF_DBGMODE_SHIFT 6
#define TPM_CONF_DBGMODE_WIDTH 2
#define TPM_CONF_DBGMODE(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_DBGMODE_SHIFT))&TPM_CONF_DBGMODE_MASK)
#define TPM_CONF_GTBEEN_MASK 0x200u
#define TPM_CONF_GTBEEN_SHIFT 9
#define TPM_CONF_GTBEEN_WIDTH 1
#define TPM_CONF_GTBEEN(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_GTBEEN_SHIFT))&TPM_CONF_GTBEEN_MASK)
#define TPM_CONF_CSOT_MASK 0x10000u
#define TPM_CONF_CSOT_SHIFT 16
#define TPM_CONF_CSOT_WIDTH 1
#define TPM_CONF_CSOT(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_CSOT_SHIFT))&TPM_CONF_CSOT_MASK)
#define TPM_CONF_CSOO_MASK 0x20000u
#define TPM_CONF_CSOO_SHIFT 17
#define TPM_CONF_CSOO_WIDTH 1
#define TPM_CONF_CSOO(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_CSOO_SHIFT))&TPM_CONF_CSOO_MASK)
#define TPM_CONF_CROT_MASK 0x40000u
#define TPM_CONF_CROT_SHIFT 18
#define TPM_CONF_CROT_WIDTH 1
#define TPM_CONF_CROT(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_CROT_SHIFT))&TPM_CONF_CROT_MASK)
#define TPM_CONF_TRGSEL_MASK 0xF000000u
#define TPM_CONF_TRGSEL_SHIFT 24
#define TPM_CONF_TRGSEL_WIDTH 4
#define TPM_CONF_TRGSEL(x) (((uint32_t)(((uint32_t)(x))<<TPM_CONF_TRGSEL_SHIFT))&TPM_CONF_TRGSEL_MASK)
/*!
* @}
*/ /* end of group TPM_Register_Masks */
/* TPM - Peripheral instance base addresses */
/** Peripheral TPM0 base address */
#define TPM0_BASE (0x40038000u)
/** Peripheral TPM0 base pointer */
#define TPM0 ((TPM_Type *)TPM0_BASE)
#define TPM0_BASE_PTR (TPM0)
/** Peripheral TPM1 base address */
#define TPM1_BASE (0x40039000u)
/** Peripheral TPM1 base pointer */
#define TPM1 ((TPM_Type *)TPM1_BASE)
#define TPM1_BASE_PTR (TPM1)
/** Peripheral TPM2 base address */
#define TPM2_BASE (0x4003A000u)
/** Peripheral TPM2 base pointer */
#define TPM2 ((TPM_Type *)TPM2_BASE)
#define TPM2_BASE_PTR (TPM2)
/** Array initializer of TPM peripheral base addresses */
#define TPM_BASE_ADDRS { TPM0_BASE, TPM1_BASE, TPM2_BASE }
/** Array initializer of TPM peripheral base pointers */
#define TPM_BASE_PTRS { TPM0, TPM1, TPM2 }
/** Interrupt vectors for the TPM peripheral type */
#define TPM_IRQS { TPM0_IRQn, TPM1_IRQn, TPM2_IRQn }
/* ----------------------------------------------------------------------------
-- TPM - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup TPM_Register_Accessor_Macros TPM - Register accessor macros
* @{
*/
/* TPM - Register instance definitions */
/* TPM0 */
#define TPM0_SC TPM_SC_REG(TPM0)
#define TPM0_CNT TPM_CNT_REG(TPM0)
#define TPM0_MOD TPM_MOD_REG(TPM0)
#define TPM0_C0SC TPM_CnSC_REG(TPM0,0)
#define TPM0_C0V TPM_CnV_REG(TPM0,0)
#define TPM0_C1SC TPM_CnSC_REG(TPM0,1)
#define TPM0_C1V TPM_CnV_REG(TPM0,1)
#define TPM0_C2SC TPM_CnSC_REG(TPM0,2)
#define TPM0_C2V TPM_CnV_REG(TPM0,2)
#define TPM0_C3SC TPM_CnSC_REG(TPM0,3)
#define TPM0_C3V TPM_CnV_REG(TPM0,3)
#define TPM0_STATUS TPM_STATUS_REG(TPM0)
#define TPM0_COMBINE TPM_COMBINE_REG(TPM0)
#define TPM0_FILTER TPM_FILTER_REG(TPM0)
#define TPM0_QDCTRL TPM_QDCTRL_REG(TPM0)
#define TPM0_CONF TPM_CONF_REG(TPM0)
/* TPM1 */
#define TPM1_SC TPM_SC_REG(TPM1)
#define TPM1_CNT TPM_CNT_REG(TPM1)
#define TPM1_MOD TPM_MOD_REG(TPM1)
#define TPM1_C0SC TPM_CnSC_REG(TPM1,0)
#define TPM1_C0V TPM_CnV_REG(TPM1,0)
#define TPM1_C1SC TPM_CnSC_REG(TPM1,1)
#define TPM1_C1V TPM_CnV_REG(TPM1,1)
#define TPM1_STATUS TPM_STATUS_REG(TPM1)
#define TPM1_COMBINE TPM_COMBINE_REG(TPM1)
#define TPM1_FILTER TPM_FILTER_REG(TPM1)
#define TPM1_QDCTRL TPM_QDCTRL_REG(TPM1)
#define TPM1_CONF TPM_CONF_REG(TPM1)
/* TPM2 */
#define TPM2_SC TPM_SC_REG(TPM2)
#define TPM2_CNT TPM_CNT_REG(TPM2)
#define TPM2_MOD TPM_MOD_REG(TPM2)
#define TPM2_C0SC TPM_CnSC_REG(TPM2,0)
#define TPM2_C0V TPM_CnV_REG(TPM2,0)
#define TPM2_C1SC TPM_CnSC_REG(TPM2,1)
#define TPM2_C1V TPM_CnV_REG(TPM2,1)
#define TPM2_STATUS TPM_STATUS_REG(TPM2)
#define TPM2_COMBINE TPM_COMBINE_REG(TPM2)
#define TPM2_FILTER TPM_FILTER_REG(TPM2)
#define TPM2_QDCTRL TPM_QDCTRL_REG(TPM2)
#define TPM2_CONF TPM_CONF_REG(TPM2)
/* TPM - Register array accessors */
#define TPM0_CnSC(index) TPM_CnSC_REG(TPM0,index)
#define TPM1_CnSC(index) TPM_CnSC_REG(TPM1,index)
#define TPM2_CnSC(index) TPM_CnSC_REG(TPM2,index)
#define TPM0_CnV(index) TPM_CnV_REG(TPM0,index)
#define TPM1_CnV(index) TPM_CnV_REG(TPM1,index)
#define TPM2_CnV(index) TPM_CnV_REG(TPM2,index)
/*!
* @}
*/ /* end of group TPM_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group TPM_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- TRNG Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup TRNG_Peripheral_Access_Layer TRNG Peripheral Access Layer
* @{
*/
/** TRNG - Register Layout Typedef */
typedef struct {
__IO uint32_t MCTL; /**< RNG Miscellaneous Control Register, offset: 0x0 */
__IO uint32_t SCMISC; /**< RNG Statistical Check Miscellaneous Register, offset: 0x4 */
__IO uint32_t PKRRNG; /**< RNG Poker Range Register, offset: 0x8 */
union { /* offset: 0xC */
__IO uint32_t PKRMAX; /**< RNG Poker Maximum Limit Register, offset: 0xC */
__I uint32_t PKRSQ; /**< RNG Poker Square Calculation Result Register, offset: 0xC */
};
__IO uint32_t SDCTL; /**< RNG Seed Control Register, offset: 0x10 */
union { /* offset: 0x14 */
__IO uint32_t SBLIM; /**< RNG Sparse Bit Limit Register, offset: 0x14 */
__I uint32_t TOTSAM; /**< RNG Total Samples Register, offset: 0x14 */
};
__IO uint32_t FRQMIN; /**< RNG Frequency Count Minimum Limit Register, offset: 0x18 */
union { /* offset: 0x1C */
__I uint32_t FRQCNT; /**< RNG Frequency Count Register, offset: 0x1C */
__IO uint32_t FRQMAX; /**< RNG Frequency Count Maximum Limit Register, offset: 0x1C */
};
union { /* offset: 0x20 */
__I uint32_t SCMC; /**< RNG Statistical Check Monobit Count Register, offset: 0x20 */
__IO uint32_t SCML; /**< RNG Statistical Check Monobit Limit Register, offset: 0x20 */
};
union { /* offset: 0x24 */
__I uint32_t SCR1C; /**< RNG Statistical Check Run Length 1 Count Register, offset: 0x24 */
__IO uint32_t SCR1L; /**< RNG Statistical Check Run Length 1 Limit Register, offset: 0x24 */
};
union { /* offset: 0x28 */
__I uint32_t SCR2C; /**< RNG Statistical Check Run Length 2 Count Register, offset: 0x28 */
__IO uint32_t SCR2L; /**< RNG Statistical Check Run Length 2 Limit Register, offset: 0x28 */
};
union { /* offset: 0x2C */
__I uint32_t SCR3C; /**< RNG Statistical Check Run Length 3 Count Register, offset: 0x2C */
__IO uint32_t SCR3L; /**< RNG Statistical Check Run Length 3 Limit Register, offset: 0x2C */
};
union { /* offset: 0x30 */
__I uint32_t SCR4C; /**< RNG Statistical Check Run Length 4 Count Register, offset: 0x30 */
__IO uint32_t SCR4L; /**< RNG Statistical Check Run Length 4 Limit Register, offset: 0x30 */
};
union { /* offset: 0x34 */
__I uint32_t SCR5C; /**< RNG Statistical Check Run Length 5 Count Register, offset: 0x34 */
__IO uint32_t SCR5L; /**< RNG Statistical Check Run Length 5 Limit Register, offset: 0x34 */
};
union { /* offset: 0x38 */
__I uint32_t SCR6PC; /**< RNG Statistical Check Run Length 6+ Count Register, offset: 0x38 */
__IO uint32_t SCR6PL; /**< RNG Statistical Check Run Length 6+ Limit Register, offset: 0x38 */
};
__I uint32_t STATUS; /**< RNG Status Register, offset: 0x3C */
__I uint32_t ENT[16]; /**< RNG TRNG Entropy Read Register, array offset: 0x40, array step: 0x4 */
__I uint32_t PKRCNT10; /**< RNG Statistical Check Poker Count 1 and 0 Register, offset: 0x80 */
__I uint32_t PKRCNT32; /**< RNG Statistical Check Poker Count 3 and 2 Register, offset: 0x84 */
__I uint32_t PKRCNT54; /**< RNG Statistical Check Poker Count 5 and 4 Register, offset: 0x88 */
__I uint32_t PKRCNT76; /**< RNG Statistical Check Poker Count 7 and 6 Register, offset: 0x8C */
__I uint32_t PKRCNT98; /**< RNG Statistical Check Poker Count 9 and 8 Register, offset: 0x90 */
__I uint32_t PKRCNTBA; /**< RNG Statistical Check Poker Count B and A Register, offset: 0x94 */
__I uint32_t PKRCNTDC; /**< RNG Statistical Check Poker Count D and C Register, offset: 0x98 */
__I uint32_t PKRCNTFE; /**< RNG Statistical Check Poker Count F and E Register, offset: 0x9C */
uint8_t RESERVED_0[16];
__IO uint32_t SEC_CFG; /**< RNG Security Configuration Register, offset: 0xB0 */
__IO uint32_t INT_CTRL; /**< RNG Interrupt Control Register, offset: 0xB4 */
__IO uint32_t INT_MASK; /**< RNG Mask Register, offset: 0xB8 */
__IO uint32_t INT_STATUS; /**< RNG Interrupt Status Register, offset: 0xBC */
uint8_t RESERVED_1[48];
__I uint32_t VID1; /**< RNG Version ID Register (MS), offset: 0xF0 */
__I uint32_t VID2; /**< RNG Version ID Register (LS), offset: 0xF4 */
} TRNG_Type, *TRNG_MemMapPtr;
/* ----------------------------------------------------------------------------
-- TRNG - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup TRNG_Register_Accessor_Macros TRNG - Register accessor macros
* @{
*/
/* TRNG - Register accessors */
#define TRNG_MCTL_REG(base) ((base)->MCTL)
#define TRNG_SCMISC_REG(base) ((base)->SCMISC)
#define TRNG_PKRRNG_REG(base) ((base)->PKRRNG)
#define TRNG_PKRMAX_REG(base) ((base)->PKRMAX)
#define TRNG_PKRSQ_REG(base) ((base)->PKRSQ)
#define TRNG_SDCTL_REG(base) ((base)->SDCTL)
#define TRNG_SBLIM_REG(base) ((base)->SBLIM)
#define TRNG_TOTSAM_REG(base) ((base)->TOTSAM)
#define TRNG_FRQMIN_REG(base) ((base)->FRQMIN)
#define TRNG_FRQCNT_REG(base) ((base)->FRQCNT)
#define TRNG_FRQMAX_REG(base) ((base)->FRQMAX)
#define TRNG_SCMC_REG(base) ((base)->SCMC)
#define TRNG_SCML_REG(base) ((base)->SCML)
#define TRNG_SCR1C_REG(base) ((base)->SCR1C)
#define TRNG_SCR1L_REG(base) ((base)->SCR1L)
#define TRNG_SCR2C_REG(base) ((base)->SCR2C)
#define TRNG_SCR2L_REG(base) ((base)->SCR2L)
#define TRNG_SCR3C_REG(base) ((base)->SCR3C)
#define TRNG_SCR3L_REG(base) ((base)->SCR3L)
#define TRNG_SCR4C_REG(base) ((base)->SCR4C)
#define TRNG_SCR4L_REG(base) ((base)->SCR4L)
#define TRNG_SCR5C_REG(base) ((base)->SCR5C)
#define TRNG_SCR5L_REG(base) ((base)->SCR5L)
#define TRNG_SCR6PC_REG(base) ((base)->SCR6PC)
#define TRNG_SCR6PL_REG(base) ((base)->SCR6PL)
#define TRNG_STATUS_REG(base) ((base)->STATUS)
#define TRNG_ENT_REG(base,index) ((base)->ENT[index])
#define TRNG_ENT_COUNT 16
#define TRNG_PKRCNT10_REG(base) ((base)->PKRCNT10)
#define TRNG_PKRCNT32_REG(base) ((base)->PKRCNT32)
#define TRNG_PKRCNT54_REG(base) ((base)->PKRCNT54)
#define TRNG_PKRCNT76_REG(base) ((base)->PKRCNT76)
#define TRNG_PKRCNT98_REG(base) ((base)->PKRCNT98)
#define TRNG_PKRCNTBA_REG(base) ((base)->PKRCNTBA)
#define TRNG_PKRCNTDC_REG(base) ((base)->PKRCNTDC)
#define TRNG_PKRCNTFE_REG(base) ((base)->PKRCNTFE)
#define TRNG_SEC_CFG_REG(base) ((base)->SEC_CFG)
#define TRNG_INT_CTRL_REG(base) ((base)->INT_CTRL)
#define TRNG_INT_MASK_REG(base) ((base)->INT_MASK)
#define TRNG_INT_STATUS_REG(base) ((base)->INT_STATUS)
#define TRNG_VID1_REG(base) ((base)->VID1)
#define TRNG_VID2_REG(base) ((base)->VID2)
/*!
* @}
*/ /* end of group TRNG_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- TRNG Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup TRNG_Register_Masks TRNG Register Masks
* @{
*/
/* MCTL Bit Fields */
#define TRNG_MCTL_SAMP_MODE_MASK 0x3u
#define TRNG_MCTL_SAMP_MODE_SHIFT 0
#define TRNG_MCTL_SAMP_MODE_WIDTH 2
#define TRNG_MCTL_SAMP_MODE(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_SAMP_MODE_SHIFT))&TRNG_MCTL_SAMP_MODE_MASK)
#define TRNG_MCTL_OSC_DIV_MASK 0xCu
#define TRNG_MCTL_OSC_DIV_SHIFT 2
#define TRNG_MCTL_OSC_DIV_WIDTH 2
#define TRNG_MCTL_OSC_DIV(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_OSC_DIV_SHIFT))&TRNG_MCTL_OSC_DIV_MASK)
#define TRNG_MCTL_UNUSED_MASK 0x10u
#define TRNG_MCTL_UNUSED_SHIFT 4
#define TRNG_MCTL_UNUSED_WIDTH 1
#define TRNG_MCTL_UNUSED(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_UNUSED_SHIFT))&TRNG_MCTL_UNUSED_MASK)
#define TRNG_MCTL_TRNG_ACC_MASK 0x20u
#define TRNG_MCTL_TRNG_ACC_SHIFT 5
#define TRNG_MCTL_TRNG_ACC_WIDTH 1
#define TRNG_MCTL_TRNG_ACC(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_TRNG_ACC_SHIFT))&TRNG_MCTL_TRNG_ACC_MASK)
#define TRNG_MCTL_RST_DEF_MASK 0x40u
#define TRNG_MCTL_RST_DEF_SHIFT 6
#define TRNG_MCTL_RST_DEF_WIDTH 1
#define TRNG_MCTL_RST_DEF(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_RST_DEF_SHIFT))&TRNG_MCTL_RST_DEF_MASK)
#define TRNG_MCTL_FOR_SCLK_MASK 0x80u
#define TRNG_MCTL_FOR_SCLK_SHIFT 7
#define TRNG_MCTL_FOR_SCLK_WIDTH 1
#define TRNG_MCTL_FOR_SCLK(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_FOR_SCLK_SHIFT))&TRNG_MCTL_FOR_SCLK_MASK)
#define TRNG_MCTL_FCT_FAIL_MASK 0x100u
#define TRNG_MCTL_FCT_FAIL_SHIFT 8
#define TRNG_MCTL_FCT_FAIL_WIDTH 1
#define TRNG_MCTL_FCT_FAIL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_FCT_FAIL_SHIFT))&TRNG_MCTL_FCT_FAIL_MASK)
#define TRNG_MCTL_FCT_VAL_MASK 0x200u
#define TRNG_MCTL_FCT_VAL_SHIFT 9
#define TRNG_MCTL_FCT_VAL_WIDTH 1
#define TRNG_MCTL_FCT_VAL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_FCT_VAL_SHIFT))&TRNG_MCTL_FCT_VAL_MASK)
#define TRNG_MCTL_ENT_VAL_MASK 0x400u
#define TRNG_MCTL_ENT_VAL_SHIFT 10
#define TRNG_MCTL_ENT_VAL_WIDTH 1
#define TRNG_MCTL_ENT_VAL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_ENT_VAL_SHIFT))&TRNG_MCTL_ENT_VAL_MASK)
#define TRNG_MCTL_TST_OUT_MASK 0x800u
#define TRNG_MCTL_TST_OUT_SHIFT 11
#define TRNG_MCTL_TST_OUT_WIDTH 1
#define TRNG_MCTL_TST_OUT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_TST_OUT_SHIFT))&TRNG_MCTL_TST_OUT_MASK)
#define TRNG_MCTL_ERR_MASK 0x1000u
#define TRNG_MCTL_ERR_SHIFT 12
#define TRNG_MCTL_ERR_WIDTH 1
#define TRNG_MCTL_ERR(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_ERR_SHIFT))&TRNG_MCTL_ERR_MASK)
#define TRNG_MCTL_TSTOP_OK_MASK 0x2000u
#define TRNG_MCTL_TSTOP_OK_SHIFT 13
#define TRNG_MCTL_TSTOP_OK_WIDTH 1
#define TRNG_MCTL_TSTOP_OK(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_TSTOP_OK_SHIFT))&TRNG_MCTL_TSTOP_OK_MASK)
#define TRNG_MCTL_PRGM_MASK 0x10000u
#define TRNG_MCTL_PRGM_SHIFT 16
#define TRNG_MCTL_PRGM_WIDTH 1
#define TRNG_MCTL_PRGM(x) (((uint32_t)(((uint32_t)(x))<<TRNG_MCTL_PRGM_SHIFT))&TRNG_MCTL_PRGM_MASK)
/* SCMISC Bit Fields */
#define TRNG_SCMISC_LRUN_MAX_MASK 0xFFu
#define TRNG_SCMISC_LRUN_MAX_SHIFT 0
#define TRNG_SCMISC_LRUN_MAX_WIDTH 8
#define TRNG_SCMISC_LRUN_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCMISC_LRUN_MAX_SHIFT))&TRNG_SCMISC_LRUN_MAX_MASK)
#define TRNG_SCMISC_RTY_CT_MASK 0xF0000u
#define TRNG_SCMISC_RTY_CT_SHIFT 16
#define TRNG_SCMISC_RTY_CT_WIDTH 4
#define TRNG_SCMISC_RTY_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCMISC_RTY_CT_SHIFT))&TRNG_SCMISC_RTY_CT_MASK)
/* PKRRNG Bit Fields */
#define TRNG_PKRRNG_PKR_RNG_MASK 0xFFFFu
#define TRNG_PKRRNG_PKR_RNG_SHIFT 0
#define TRNG_PKRRNG_PKR_RNG_WIDTH 16
#define TRNG_PKRRNG_PKR_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRRNG_PKR_RNG_SHIFT))&TRNG_PKRRNG_PKR_RNG_MASK)
/* PKRMAX Bit Fields */
#define TRNG_PKRMAX_PKR_MAX_MASK 0xFFFFFFu
#define TRNG_PKRMAX_PKR_MAX_SHIFT 0
#define TRNG_PKRMAX_PKR_MAX_WIDTH 24
#define TRNG_PKRMAX_PKR_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRMAX_PKR_MAX_SHIFT))&TRNG_PKRMAX_PKR_MAX_MASK)
/* PKRSQ Bit Fields */
#define TRNG_PKRSQ_PKR_SQ_MASK 0xFFFFFFu
#define TRNG_PKRSQ_PKR_SQ_SHIFT 0
#define TRNG_PKRSQ_PKR_SQ_WIDTH 24
#define TRNG_PKRSQ_PKR_SQ(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRSQ_PKR_SQ_SHIFT))&TRNG_PKRSQ_PKR_SQ_MASK)
/* SDCTL Bit Fields */
#define TRNG_SDCTL_SAMP_SIZE_MASK 0xFFFFu
#define TRNG_SDCTL_SAMP_SIZE_SHIFT 0
#define TRNG_SDCTL_SAMP_SIZE_WIDTH 16
#define TRNG_SDCTL_SAMP_SIZE(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SDCTL_SAMP_SIZE_SHIFT))&TRNG_SDCTL_SAMP_SIZE_MASK)
#define TRNG_SDCTL_ENT_DLY_MASK 0xFFFF0000u
#define TRNG_SDCTL_ENT_DLY_SHIFT 16
#define TRNG_SDCTL_ENT_DLY_WIDTH 16
#define TRNG_SDCTL_ENT_DLY(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SDCTL_ENT_DLY_SHIFT))&TRNG_SDCTL_ENT_DLY_MASK)
/* SBLIM Bit Fields */
#define TRNG_SBLIM_SB_LIM_MASK 0x3FFu
#define TRNG_SBLIM_SB_LIM_SHIFT 0
#define TRNG_SBLIM_SB_LIM_WIDTH 10
#define TRNG_SBLIM_SB_LIM(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SBLIM_SB_LIM_SHIFT))&TRNG_SBLIM_SB_LIM_MASK)
/* TOTSAM Bit Fields */
#define TRNG_TOTSAM_TOT_SAM_MASK 0xFFFFFu
#define TRNG_TOTSAM_TOT_SAM_SHIFT 0
#define TRNG_TOTSAM_TOT_SAM_WIDTH 20
#define TRNG_TOTSAM_TOT_SAM(x) (((uint32_t)(((uint32_t)(x))<<TRNG_TOTSAM_TOT_SAM_SHIFT))&TRNG_TOTSAM_TOT_SAM_MASK)
/* FRQMIN Bit Fields */
#define TRNG_FRQMIN_FRQ_MIN_MASK 0x3FFFFFu
#define TRNG_FRQMIN_FRQ_MIN_SHIFT 0
#define TRNG_FRQMIN_FRQ_MIN_WIDTH 22
#define TRNG_FRQMIN_FRQ_MIN(x) (((uint32_t)(((uint32_t)(x))<<TRNG_FRQMIN_FRQ_MIN_SHIFT))&TRNG_FRQMIN_FRQ_MIN_MASK)
/* FRQCNT Bit Fields */
#define TRNG_FRQCNT_FRQ_CT_MASK 0x3FFFFFu
#define TRNG_FRQCNT_FRQ_CT_SHIFT 0
#define TRNG_FRQCNT_FRQ_CT_WIDTH 22
#define TRNG_FRQCNT_FRQ_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_FRQCNT_FRQ_CT_SHIFT))&TRNG_FRQCNT_FRQ_CT_MASK)
/* FRQMAX Bit Fields */
#define TRNG_FRQMAX_FRQ_MAX_MASK 0x3FFFFFu
#define TRNG_FRQMAX_FRQ_MAX_SHIFT 0
#define TRNG_FRQMAX_FRQ_MAX_WIDTH 22
#define TRNG_FRQMAX_FRQ_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_FRQMAX_FRQ_MAX_SHIFT))&TRNG_FRQMAX_FRQ_MAX_MASK)
/* SCMC Bit Fields */
#define TRNG_SCMC_MONO_CT_MASK 0xFFFFu
#define TRNG_SCMC_MONO_CT_SHIFT 0
#define TRNG_SCMC_MONO_CT_WIDTH 16
#define TRNG_SCMC_MONO_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCMC_MONO_CT_SHIFT))&TRNG_SCMC_MONO_CT_MASK)
/* SCML Bit Fields */
#define TRNG_SCML_MONO_MAX_MASK 0xFFFFu
#define TRNG_SCML_MONO_MAX_SHIFT 0
#define TRNG_SCML_MONO_MAX_WIDTH 16
#define TRNG_SCML_MONO_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCML_MONO_MAX_SHIFT))&TRNG_SCML_MONO_MAX_MASK)
#define TRNG_SCML_MONO_RNG_MASK 0xFFFF0000u
#define TRNG_SCML_MONO_RNG_SHIFT 16
#define TRNG_SCML_MONO_RNG_WIDTH 16
#define TRNG_SCML_MONO_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCML_MONO_RNG_SHIFT))&TRNG_SCML_MONO_RNG_MASK)
/* SCR1C Bit Fields */
#define TRNG_SCR1C_R1_0_CT_MASK 0x7FFFu
#define TRNG_SCR1C_R1_0_CT_SHIFT 0
#define TRNG_SCR1C_R1_0_CT_WIDTH 15
#define TRNG_SCR1C_R1_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR1C_R1_0_CT_SHIFT))&TRNG_SCR1C_R1_0_CT_MASK)
#define TRNG_SCR1C_R1_1_CT_MASK 0x7FFF0000u
#define TRNG_SCR1C_R1_1_CT_SHIFT 16
#define TRNG_SCR1C_R1_1_CT_WIDTH 15
#define TRNG_SCR1C_R1_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR1C_R1_1_CT_SHIFT))&TRNG_SCR1C_R1_1_CT_MASK)
/* SCR1L Bit Fields */
#define TRNG_SCR1L_RUN1_MAX_MASK 0x7FFFu
#define TRNG_SCR1L_RUN1_MAX_SHIFT 0
#define TRNG_SCR1L_RUN1_MAX_WIDTH 15
#define TRNG_SCR1L_RUN1_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR1L_RUN1_MAX_SHIFT))&TRNG_SCR1L_RUN1_MAX_MASK)
#define TRNG_SCR1L_RUN1_RNG_MASK 0x7FFF0000u
#define TRNG_SCR1L_RUN1_RNG_SHIFT 16
#define TRNG_SCR1L_RUN1_RNG_WIDTH 15
#define TRNG_SCR1L_RUN1_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR1L_RUN1_RNG_SHIFT))&TRNG_SCR1L_RUN1_RNG_MASK)
/* SCR2C Bit Fields */
#define TRNG_SCR2C_R2_0_CT_MASK 0x3FFFu
#define TRNG_SCR2C_R2_0_CT_SHIFT 0
#define TRNG_SCR2C_R2_0_CT_WIDTH 14
#define TRNG_SCR2C_R2_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR2C_R2_0_CT_SHIFT))&TRNG_SCR2C_R2_0_CT_MASK)
#define TRNG_SCR2C_R2_1_CT_MASK 0x3FFF0000u
#define TRNG_SCR2C_R2_1_CT_SHIFT 16
#define TRNG_SCR2C_R2_1_CT_WIDTH 14
#define TRNG_SCR2C_R2_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR2C_R2_1_CT_SHIFT))&TRNG_SCR2C_R2_1_CT_MASK)
/* SCR2L Bit Fields */
#define TRNG_SCR2L_RUN2_MAX_MASK 0x3FFFu
#define TRNG_SCR2L_RUN2_MAX_SHIFT 0
#define TRNG_SCR2L_RUN2_MAX_WIDTH 14
#define TRNG_SCR2L_RUN2_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR2L_RUN2_MAX_SHIFT))&TRNG_SCR2L_RUN2_MAX_MASK)
#define TRNG_SCR2L_RUN2_RNG_MASK 0x3FFF0000u
#define TRNG_SCR2L_RUN2_RNG_SHIFT 16
#define TRNG_SCR2L_RUN2_RNG_WIDTH 14
#define TRNG_SCR2L_RUN2_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR2L_RUN2_RNG_SHIFT))&TRNG_SCR2L_RUN2_RNG_MASK)
/* SCR3C Bit Fields */
#define TRNG_SCR3C_R3_0_CT_MASK 0x1FFFu
#define TRNG_SCR3C_R3_0_CT_SHIFT 0
#define TRNG_SCR3C_R3_0_CT_WIDTH 13
#define TRNG_SCR3C_R3_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR3C_R3_0_CT_SHIFT))&TRNG_SCR3C_R3_0_CT_MASK)
#define TRNG_SCR3C_R3_1_CT_MASK 0x1FFF0000u
#define TRNG_SCR3C_R3_1_CT_SHIFT 16
#define TRNG_SCR3C_R3_1_CT_WIDTH 13
#define TRNG_SCR3C_R3_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR3C_R3_1_CT_SHIFT))&TRNG_SCR3C_R3_1_CT_MASK)
/* SCR3L Bit Fields */
#define TRNG_SCR3L_RUN3_MAX_MASK 0x1FFFu
#define TRNG_SCR3L_RUN3_MAX_SHIFT 0
#define TRNG_SCR3L_RUN3_MAX_WIDTH 13
#define TRNG_SCR3L_RUN3_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR3L_RUN3_MAX_SHIFT))&TRNG_SCR3L_RUN3_MAX_MASK)
#define TRNG_SCR3L_RUN3_RNG_MASK 0x1FFF0000u
#define TRNG_SCR3L_RUN3_RNG_SHIFT 16
#define TRNG_SCR3L_RUN3_RNG_WIDTH 13
#define TRNG_SCR3L_RUN3_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR3L_RUN3_RNG_SHIFT))&TRNG_SCR3L_RUN3_RNG_MASK)
/* SCR4C Bit Fields */
#define TRNG_SCR4C_R4_0_CT_MASK 0xFFFu
#define TRNG_SCR4C_R4_0_CT_SHIFT 0
#define TRNG_SCR4C_R4_0_CT_WIDTH 12
#define TRNG_SCR4C_R4_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR4C_R4_0_CT_SHIFT))&TRNG_SCR4C_R4_0_CT_MASK)
#define TRNG_SCR4C_R4_1_CT_MASK 0xFFF0000u
#define TRNG_SCR4C_R4_1_CT_SHIFT 16
#define TRNG_SCR4C_R4_1_CT_WIDTH 12
#define TRNG_SCR4C_R4_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR4C_R4_1_CT_SHIFT))&TRNG_SCR4C_R4_1_CT_MASK)
/* SCR4L Bit Fields */
#define TRNG_SCR4L_RUN4_MAX_MASK 0xFFFu
#define TRNG_SCR4L_RUN4_MAX_SHIFT 0
#define TRNG_SCR4L_RUN4_MAX_WIDTH 12
#define TRNG_SCR4L_RUN4_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR4L_RUN4_MAX_SHIFT))&TRNG_SCR4L_RUN4_MAX_MASK)
#define TRNG_SCR4L_RUN4_RNG_MASK 0xFFF0000u
#define TRNG_SCR4L_RUN4_RNG_SHIFT 16
#define TRNG_SCR4L_RUN4_RNG_WIDTH 12
#define TRNG_SCR4L_RUN4_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR4L_RUN4_RNG_SHIFT))&TRNG_SCR4L_RUN4_RNG_MASK)
/* SCR5C Bit Fields */
#define TRNG_SCR5C_R5_0_CT_MASK 0x7FFu
#define TRNG_SCR5C_R5_0_CT_SHIFT 0
#define TRNG_SCR5C_R5_0_CT_WIDTH 11
#define TRNG_SCR5C_R5_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR5C_R5_0_CT_SHIFT))&TRNG_SCR5C_R5_0_CT_MASK)
#define TRNG_SCR5C_R5_1_CT_MASK 0x7FF0000u
#define TRNG_SCR5C_R5_1_CT_SHIFT 16
#define TRNG_SCR5C_R5_1_CT_WIDTH 11
#define TRNG_SCR5C_R5_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR5C_R5_1_CT_SHIFT))&TRNG_SCR5C_R5_1_CT_MASK)
/* SCR5L Bit Fields */
#define TRNG_SCR5L_RUN5_MAX_MASK 0x7FFu
#define TRNG_SCR5L_RUN5_MAX_SHIFT 0
#define TRNG_SCR5L_RUN5_MAX_WIDTH 11
#define TRNG_SCR5L_RUN5_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR5L_RUN5_MAX_SHIFT))&TRNG_SCR5L_RUN5_MAX_MASK)
#define TRNG_SCR5L_RUN5_RNG_MASK 0x7FF0000u
#define TRNG_SCR5L_RUN5_RNG_SHIFT 16
#define TRNG_SCR5L_RUN5_RNG_WIDTH 11
#define TRNG_SCR5L_RUN5_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR5L_RUN5_RNG_SHIFT))&TRNG_SCR5L_RUN5_RNG_MASK)
/* SCR6PC Bit Fields */
#define TRNG_SCR6PC_R6P_0_CT_MASK 0x7FFu
#define TRNG_SCR6PC_R6P_0_CT_SHIFT 0
#define TRNG_SCR6PC_R6P_0_CT_WIDTH 11
#define TRNG_SCR6PC_R6P_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR6PC_R6P_0_CT_SHIFT))&TRNG_SCR6PC_R6P_0_CT_MASK)
#define TRNG_SCR6PC_R6P_1_CT_MASK 0x7FF0000u
#define TRNG_SCR6PC_R6P_1_CT_SHIFT 16
#define TRNG_SCR6PC_R6P_1_CT_WIDTH 11
#define TRNG_SCR6PC_R6P_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR6PC_R6P_1_CT_SHIFT))&TRNG_SCR6PC_R6P_1_CT_MASK)
/* SCR6PL Bit Fields */
#define TRNG_SCR6PL_RUN6P_MAX_MASK 0x7FFu
#define TRNG_SCR6PL_RUN6P_MAX_SHIFT 0
#define TRNG_SCR6PL_RUN6P_MAX_WIDTH 11
#define TRNG_SCR6PL_RUN6P_MAX(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR6PL_RUN6P_MAX_SHIFT))&TRNG_SCR6PL_RUN6P_MAX_MASK)
#define TRNG_SCR6PL_RUN6P_RNG_MASK 0x7FF0000u
#define TRNG_SCR6PL_RUN6P_RNG_SHIFT 16
#define TRNG_SCR6PL_RUN6P_RNG_WIDTH 11
#define TRNG_SCR6PL_RUN6P_RNG(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SCR6PL_RUN6P_RNG_SHIFT))&TRNG_SCR6PL_RUN6P_RNG_MASK)
/* STATUS Bit Fields */
#define TRNG_STATUS_TF1BR0_MASK 0x1u
#define TRNG_STATUS_TF1BR0_SHIFT 0
#define TRNG_STATUS_TF1BR0_WIDTH 1
#define TRNG_STATUS_TF1BR0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF1BR0_SHIFT))&TRNG_STATUS_TF1BR0_MASK)
#define TRNG_STATUS_TF1BR1_MASK 0x2u
#define TRNG_STATUS_TF1BR1_SHIFT 1
#define TRNG_STATUS_TF1BR1_WIDTH 1
#define TRNG_STATUS_TF1BR1(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF1BR1_SHIFT))&TRNG_STATUS_TF1BR1_MASK)
#define TRNG_STATUS_TF2BR0_MASK 0x4u
#define TRNG_STATUS_TF2BR0_SHIFT 2
#define TRNG_STATUS_TF2BR0_WIDTH 1
#define TRNG_STATUS_TF2BR0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF2BR0_SHIFT))&TRNG_STATUS_TF2BR0_MASK)
#define TRNG_STATUS_TF2BR1_MASK 0x8u
#define TRNG_STATUS_TF2BR1_SHIFT 3
#define TRNG_STATUS_TF2BR1_WIDTH 1
#define TRNG_STATUS_TF2BR1(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF2BR1_SHIFT))&TRNG_STATUS_TF2BR1_MASK)
#define TRNG_STATUS_TF3BR0_MASK 0x10u
#define TRNG_STATUS_TF3BR0_SHIFT 4
#define TRNG_STATUS_TF3BR0_WIDTH 1
#define TRNG_STATUS_TF3BR0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF3BR0_SHIFT))&TRNG_STATUS_TF3BR0_MASK)
#define TRNG_STATUS_TF3BR1_MASK 0x20u
#define TRNG_STATUS_TF3BR1_SHIFT 5
#define TRNG_STATUS_TF3BR1_WIDTH 1
#define TRNG_STATUS_TF3BR1(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF3BR1_SHIFT))&TRNG_STATUS_TF3BR1_MASK)
#define TRNG_STATUS_TF4BR0_MASK 0x40u
#define TRNG_STATUS_TF4BR0_SHIFT 6
#define TRNG_STATUS_TF4BR0_WIDTH 1
#define TRNG_STATUS_TF4BR0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF4BR0_SHIFT))&TRNG_STATUS_TF4BR0_MASK)
#define TRNG_STATUS_TF4BR1_MASK 0x80u
#define TRNG_STATUS_TF4BR1_SHIFT 7
#define TRNG_STATUS_TF4BR1_WIDTH 1
#define TRNG_STATUS_TF4BR1(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF4BR1_SHIFT))&TRNG_STATUS_TF4BR1_MASK)
#define TRNG_STATUS_TF5BR0_MASK 0x100u
#define TRNG_STATUS_TF5BR0_SHIFT 8
#define TRNG_STATUS_TF5BR0_WIDTH 1
#define TRNG_STATUS_TF5BR0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF5BR0_SHIFT))&TRNG_STATUS_TF5BR0_MASK)
#define TRNG_STATUS_TF5BR1_MASK 0x200u
#define TRNG_STATUS_TF5BR1_SHIFT 9
#define TRNG_STATUS_TF5BR1_WIDTH 1
#define TRNG_STATUS_TF5BR1(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF5BR1_SHIFT))&TRNG_STATUS_TF5BR1_MASK)
#define TRNG_STATUS_TF6PBR0_MASK 0x400u
#define TRNG_STATUS_TF6PBR0_SHIFT 10
#define TRNG_STATUS_TF6PBR0_WIDTH 1
#define TRNG_STATUS_TF6PBR0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF6PBR0_SHIFT))&TRNG_STATUS_TF6PBR0_MASK)
#define TRNG_STATUS_TF6PBR1_MASK 0x800u
#define TRNG_STATUS_TF6PBR1_SHIFT 11
#define TRNG_STATUS_TF6PBR1_WIDTH 1
#define TRNG_STATUS_TF6PBR1(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF6PBR1_SHIFT))&TRNG_STATUS_TF6PBR1_MASK)
#define TRNG_STATUS_TFSB_MASK 0x1000u
#define TRNG_STATUS_TFSB_SHIFT 12
#define TRNG_STATUS_TFSB_WIDTH 1
#define TRNG_STATUS_TFSB(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TFSB_SHIFT))&TRNG_STATUS_TFSB_MASK)
#define TRNG_STATUS_TFLR_MASK 0x2000u
#define TRNG_STATUS_TFLR_SHIFT 13
#define TRNG_STATUS_TFLR_WIDTH 1
#define TRNG_STATUS_TFLR(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TFLR_SHIFT))&TRNG_STATUS_TFLR_MASK)
#define TRNG_STATUS_TFP_MASK 0x4000u
#define TRNG_STATUS_TFP_SHIFT 14
#define TRNG_STATUS_TFP_WIDTH 1
#define TRNG_STATUS_TFP(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TFP_SHIFT))&TRNG_STATUS_TFP_MASK)
#define TRNG_STATUS_TFMB_MASK 0x8000u
#define TRNG_STATUS_TFMB_SHIFT 15
#define TRNG_STATUS_TFMB_WIDTH 1
#define TRNG_STATUS_TFMB(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TFMB_SHIFT))&TRNG_STATUS_TFMB_MASK)
#define TRNG_STATUS_RETRY_CT_MASK 0xF0000u
#define TRNG_STATUS_RETRY_CT_SHIFT 16
#define TRNG_STATUS_RETRY_CT_WIDTH 4
#define TRNG_STATUS_RETRY_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_RETRY_CT_SHIFT))&TRNG_STATUS_RETRY_CT_MASK)
/* ENT Bit Fields */
#define TRNG_ENT_ENT_MASK 0xFFFFFFFFu
#define TRNG_ENT_ENT_SHIFT 0
#define TRNG_ENT_ENT_WIDTH 32
#define TRNG_ENT_ENT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_ENT_ENT_SHIFT))&TRNG_ENT_ENT_MASK)
/* PKRCNT10 Bit Fields */
#define TRNG_PKRCNT10_PKR_0_CT_MASK 0xFFFFu
#define TRNG_PKRCNT10_PKR_0_CT_SHIFT 0
#define TRNG_PKRCNT10_PKR_0_CT_WIDTH 16
#define TRNG_PKRCNT10_PKR_0_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT10_PKR_0_CT_SHIFT))&TRNG_PKRCNT10_PKR_0_CT_MASK)
#define TRNG_PKRCNT10_PKR_1_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNT10_PKR_1_CT_SHIFT 16
#define TRNG_PKRCNT10_PKR_1_CT_WIDTH 16
#define TRNG_PKRCNT10_PKR_1_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT10_PKR_1_CT_SHIFT))&TRNG_PKRCNT10_PKR_1_CT_MASK)
/* PKRCNT32 Bit Fields */
#define TRNG_PKRCNT32_PKR_2_CT_MASK 0xFFFFu
#define TRNG_PKRCNT32_PKR_2_CT_SHIFT 0
#define TRNG_PKRCNT32_PKR_2_CT_WIDTH 16
#define TRNG_PKRCNT32_PKR_2_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT32_PKR_2_CT_SHIFT))&TRNG_PKRCNT32_PKR_2_CT_MASK)
#define TRNG_PKRCNT32_PKR_3_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNT32_PKR_3_CT_SHIFT 16
#define TRNG_PKRCNT32_PKR_3_CT_WIDTH 16
#define TRNG_PKRCNT32_PKR_3_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT32_PKR_3_CT_SHIFT))&TRNG_PKRCNT32_PKR_3_CT_MASK)
/* PKRCNT54 Bit Fields */
#define TRNG_PKRCNT54_PKR_4_CT_MASK 0xFFFFu
#define TRNG_PKRCNT54_PKR_4_CT_SHIFT 0
#define TRNG_PKRCNT54_PKR_4_CT_WIDTH 16
#define TRNG_PKRCNT54_PKR_4_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT54_PKR_4_CT_SHIFT))&TRNG_PKRCNT54_PKR_4_CT_MASK)
#define TRNG_PKRCNT54_PKR_5_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNT54_PKR_5_CT_SHIFT 16
#define TRNG_PKRCNT54_PKR_5_CT_WIDTH 16
#define TRNG_PKRCNT54_PKR_5_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT54_PKR_5_CT_SHIFT))&TRNG_PKRCNT54_PKR_5_CT_MASK)
/* PKRCNT76 Bit Fields */
#define TRNG_PKRCNT76_PKR_6_CT_MASK 0xFFFFu
#define TRNG_PKRCNT76_PKR_6_CT_SHIFT 0
#define TRNG_PKRCNT76_PKR_6_CT_WIDTH 16
#define TRNG_PKRCNT76_PKR_6_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT76_PKR_6_CT_SHIFT))&TRNG_PKRCNT76_PKR_6_CT_MASK)
#define TRNG_PKRCNT76_PKR_7_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNT76_PKR_7_CT_SHIFT 16
#define TRNG_PKRCNT76_PKR_7_CT_WIDTH 16
#define TRNG_PKRCNT76_PKR_7_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT76_PKR_7_CT_SHIFT))&TRNG_PKRCNT76_PKR_7_CT_MASK)
/* PKRCNT98 Bit Fields */
#define TRNG_PKRCNT98_PKR_8_CT_MASK 0xFFFFu
#define TRNG_PKRCNT98_PKR_8_CT_SHIFT 0
#define TRNG_PKRCNT98_PKR_8_CT_WIDTH 16
#define TRNG_PKRCNT98_PKR_8_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT98_PKR_8_CT_SHIFT))&TRNG_PKRCNT98_PKR_8_CT_MASK)
#define TRNG_PKRCNT98_PKR_9_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNT98_PKR_9_CT_SHIFT 16
#define TRNG_PKRCNT98_PKR_9_CT_WIDTH 16
#define TRNG_PKRCNT98_PKR_9_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNT98_PKR_9_CT_SHIFT))&TRNG_PKRCNT98_PKR_9_CT_MASK)
/* PKRCNTBA Bit Fields */
#define TRNG_PKRCNTBA_PKR_A_CT_MASK 0xFFFFu
#define TRNG_PKRCNTBA_PKR_A_CT_SHIFT 0
#define TRNG_PKRCNTBA_PKR_A_CT_WIDTH 16
#define TRNG_PKRCNTBA_PKR_A_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNTBA_PKR_A_CT_SHIFT))&TRNG_PKRCNTBA_PKR_A_CT_MASK)
#define TRNG_PKRCNTBA_PKR_B_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNTBA_PKR_B_CT_SHIFT 16
#define TRNG_PKRCNTBA_PKR_B_CT_WIDTH 16
#define TRNG_PKRCNTBA_PKR_B_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNTBA_PKR_B_CT_SHIFT))&TRNG_PKRCNTBA_PKR_B_CT_MASK)
/* PKRCNTDC Bit Fields */
#define TRNG_PKRCNTDC_PKR_C_CT_MASK 0xFFFFu
#define TRNG_PKRCNTDC_PKR_C_CT_SHIFT 0
#define TRNG_PKRCNTDC_PKR_C_CT_WIDTH 16
#define TRNG_PKRCNTDC_PKR_C_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNTDC_PKR_C_CT_SHIFT))&TRNG_PKRCNTDC_PKR_C_CT_MASK)
#define TRNG_PKRCNTDC_PKR_D_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNTDC_PKR_D_CT_SHIFT 16
#define TRNG_PKRCNTDC_PKR_D_CT_WIDTH 16
#define TRNG_PKRCNTDC_PKR_D_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNTDC_PKR_D_CT_SHIFT))&TRNG_PKRCNTDC_PKR_D_CT_MASK)
/* PKRCNTFE Bit Fields */
#define TRNG_PKRCNTFE_PKR_E_CT_MASK 0xFFFFu
#define TRNG_PKRCNTFE_PKR_E_CT_SHIFT 0
#define TRNG_PKRCNTFE_PKR_E_CT_WIDTH 16
#define TRNG_PKRCNTFE_PKR_E_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNTFE_PKR_E_CT_SHIFT))&TRNG_PKRCNTFE_PKR_E_CT_MASK)
#define TRNG_PKRCNTFE_PKR_F_CT_MASK 0xFFFF0000u
#define TRNG_PKRCNTFE_PKR_F_CT_SHIFT 16
#define TRNG_PKRCNTFE_PKR_F_CT_WIDTH 16
#define TRNG_PKRCNTFE_PKR_F_CT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_PKRCNTFE_PKR_F_CT_SHIFT))&TRNG_PKRCNTFE_PKR_F_CT_MASK)
/* SEC_CFG Bit Fields */
#define TRNG_SEC_CFG_SH0_MASK 0x1u
#define TRNG_SEC_CFG_SH0_SHIFT 0
#define TRNG_SEC_CFG_SH0_WIDTH 1
#define TRNG_SEC_CFG_SH0(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SEC_CFG_SH0_SHIFT))&TRNG_SEC_CFG_SH0_MASK)
#define TRNG_SEC_CFG_NO_PRGM_MASK 0x2u
#define TRNG_SEC_CFG_NO_PRGM_SHIFT 1
#define TRNG_SEC_CFG_NO_PRGM_WIDTH 1
#define TRNG_SEC_CFG_NO_PRGM(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SEC_CFG_NO_PRGM_SHIFT))&TRNG_SEC_CFG_NO_PRGM_MASK)
#define TRNG_SEC_CFG_SK_VAL_MASK 0x4u
#define TRNG_SEC_CFG_SK_VAL_SHIFT 2
#define TRNG_SEC_CFG_SK_VAL_WIDTH 1
#define TRNG_SEC_CFG_SK_VAL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_SEC_CFG_SK_VAL_SHIFT))&TRNG_SEC_CFG_SK_VAL_MASK)
/* INT_CTRL Bit Fields */
#define TRNG_INT_CTRL_HW_ERR_MASK 0x1u
#define TRNG_INT_CTRL_HW_ERR_SHIFT 0
#define TRNG_INT_CTRL_HW_ERR_WIDTH 1
#define TRNG_INT_CTRL_HW_ERR(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_CTRL_HW_ERR_SHIFT))&TRNG_INT_CTRL_HW_ERR_MASK)
#define TRNG_INT_CTRL_ENT_VAL_MASK 0x2u
#define TRNG_INT_CTRL_ENT_VAL_SHIFT 1
#define TRNG_INT_CTRL_ENT_VAL_WIDTH 1
#define TRNG_INT_CTRL_ENT_VAL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_CTRL_ENT_VAL_SHIFT))&TRNG_INT_CTRL_ENT_VAL_MASK)
#define TRNG_INT_CTRL_FRQ_CT_FAIL_MASK 0x4u
#define TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT 2
#define TRNG_INT_CTRL_FRQ_CT_FAIL_WIDTH 1
#define TRNG_INT_CTRL_FRQ_CT_FAIL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_CTRL_FRQ_CT_FAIL_SHIFT))&TRNG_INT_CTRL_FRQ_CT_FAIL_MASK)
#define TRNG_INT_CTRL_UNUSED_MASK 0xFFFFFFF8u
#define TRNG_INT_CTRL_UNUSED_SHIFT 3
#define TRNG_INT_CTRL_UNUSED_WIDTH 29
#define TRNG_INT_CTRL_UNUSED(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_CTRL_UNUSED_SHIFT))&TRNG_INT_CTRL_UNUSED_MASK)
/* INT_MASK Bit Fields */
#define TRNG_INT_MASK_HW_ERR_MASK 0x1u
#define TRNG_INT_MASK_HW_ERR_SHIFT 0
#define TRNG_INT_MASK_HW_ERR_WIDTH 1
#define TRNG_INT_MASK_HW_ERR(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_MASK_HW_ERR_SHIFT))&TRNG_INT_MASK_HW_ERR_MASK)
#define TRNG_INT_MASK_ENT_VAL_MASK 0x2u
#define TRNG_INT_MASK_ENT_VAL_SHIFT 1
#define TRNG_INT_MASK_ENT_VAL_WIDTH 1
#define TRNG_INT_MASK_ENT_VAL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_MASK_ENT_VAL_SHIFT))&TRNG_INT_MASK_ENT_VAL_MASK)
#define TRNG_INT_MASK_FRQ_CT_FAIL_MASK 0x4u
#define TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT 2
#define TRNG_INT_MASK_FRQ_CT_FAIL_WIDTH 1
#define TRNG_INT_MASK_FRQ_CT_FAIL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_MASK_FRQ_CT_FAIL_SHIFT))&TRNG_INT_MASK_FRQ_CT_FAIL_MASK)
/* INT_STATUS Bit Fields */
#define TRNG_INT_STATUS_HW_ERR_MASK 0x1u
#define TRNG_INT_STATUS_HW_ERR_SHIFT 0
#define TRNG_INT_STATUS_HW_ERR_WIDTH 1
#define TRNG_INT_STATUS_HW_ERR(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_STATUS_HW_ERR_SHIFT))&TRNG_INT_STATUS_HW_ERR_MASK)
#define TRNG_INT_STATUS_ENT_VAL_MASK 0x2u
#define TRNG_INT_STATUS_ENT_VAL_SHIFT 1
#define TRNG_INT_STATUS_ENT_VAL_WIDTH 1
#define TRNG_INT_STATUS_ENT_VAL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_STATUS_ENT_VAL_SHIFT))&TRNG_INT_STATUS_ENT_VAL_MASK)
#define TRNG_INT_STATUS_FRQ_CT_FAIL_MASK 0x4u
#define TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT 2
#define TRNG_INT_STATUS_FRQ_CT_FAIL_WIDTH 1
#define TRNG_INT_STATUS_FRQ_CT_FAIL(x) (((uint32_t)(((uint32_t)(x))<<TRNG_INT_STATUS_FRQ_CT_FAIL_SHIFT))&TRNG_INT_STATUS_FRQ_CT_FAIL_MASK)
/* VID1 Bit Fields */
#define TRNG_VID1_RNG_MIN_REV_MASK 0xFFu
#define TRNG_VID1_RNG_MIN_REV_SHIFT 0
#define TRNG_VID1_RNG_MIN_REV_WIDTH 8
#define TRNG_VID1_RNG_MIN_REV(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID1_RNG_MIN_REV_SHIFT))&TRNG_VID1_RNG_MIN_REV_MASK)
#define TRNG_VID1_RNG_MAJ_REV_MASK 0xFF00u
#define TRNG_VID1_RNG_MAJ_REV_SHIFT 8
#define TRNG_VID1_RNG_MAJ_REV_WIDTH 8
#define TRNG_VID1_RNG_MAJ_REV(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID1_RNG_MAJ_REV_SHIFT))&TRNG_VID1_RNG_MAJ_REV_MASK)
#define TRNG_VID1_RNG_IP_ID_MASK 0xFFFF0000u
#define TRNG_VID1_RNG_IP_ID_SHIFT 16
#define TRNG_VID1_RNG_IP_ID_WIDTH 16
#define TRNG_VID1_RNG_IP_ID(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID1_RNG_IP_ID_SHIFT))&TRNG_VID1_RNG_IP_ID_MASK)
/* VID2 Bit Fields */
#define TRNG_VID2_RNG_CONFIG_OPT_MASK 0xFFu
#define TRNG_VID2_RNG_CONFIG_OPT_SHIFT 0
#define TRNG_VID2_RNG_CONFIG_OPT_WIDTH 8
#define TRNG_VID2_RNG_CONFIG_OPT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID2_RNG_CONFIG_OPT_SHIFT))&TRNG_VID2_RNG_CONFIG_OPT_MASK)
#define TRNG_VID2_RNG_ECO_REV_MASK 0xFF00u
#define TRNG_VID2_RNG_ECO_REV_SHIFT 8
#define TRNG_VID2_RNG_ECO_REV_WIDTH 8
#define TRNG_VID2_RNG_ECO_REV(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID2_RNG_ECO_REV_SHIFT))&TRNG_VID2_RNG_ECO_REV_MASK)
#define TRNG_VID2_RNG_INTG_OPT_MASK 0xFF0000u
#define TRNG_VID2_RNG_INTG_OPT_SHIFT 16
#define TRNG_VID2_RNG_INTG_OPT_WIDTH 8
#define TRNG_VID2_RNG_INTG_OPT(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID2_RNG_INTG_OPT_SHIFT))&TRNG_VID2_RNG_INTG_OPT_MASK)
#define TRNG_VID2_RNG_ERA_MASK 0xFF000000u
#define TRNG_VID2_RNG_ERA_SHIFT 24
#define TRNG_VID2_RNG_ERA_WIDTH 8
#define TRNG_VID2_RNG_ERA(x) (((uint32_t)(((uint32_t)(x))<<TRNG_VID2_RNG_ERA_SHIFT))&TRNG_VID2_RNG_ERA_MASK)
/*!
* @}
*/ /* end of group TRNG_Register_Masks */
/* TRNG - Peripheral instance base addresses */
/** Peripheral TRNG0 base address */
#define TRNG0_BASE (0x40029000u)
/** Peripheral TRNG0 base pointer */
#define TRNG0 ((TRNG_Type *)TRNG0_BASE)
#define TRNG0_BASE_PTR (TRNG0)
/** Array initializer of TRNG peripheral base addresses */
#define TRNG_BASE_ADDRS { TRNG0_BASE }
/** Array initializer of TRNG peripheral base pointers */
#define TRNG_BASE_PTRS { TRNG0 }
/** Interrupt vectors for the TRNG peripheral type */
#define TRNG_IRQS { TRNG0_IRQn }
/* ----------------------------------------------------------------------------
-- TRNG - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup TRNG_Register_Accessor_Macros TRNG - Register accessor macros
* @{
*/
/* TRNG - Register instance definitions */
/* TRNG0 */
#define TRNG0_MCTL TRNG_MCTL_REG(TRNG0)
#define TRNG0_SCMISC TRNG_SCMISC_REG(TRNG0)
#define TRNG0_PKRRNG TRNG_PKRRNG_REG(TRNG0)
#define TRNG0_PKRMAX TRNG_PKRMAX_REG(TRNG0)
#define TRNG0_PKRSQ TRNG_PKRSQ_REG(TRNG0)
#define TRNG0_SDCTL TRNG_SDCTL_REG(TRNG0)
#define TRNG0_SBLIM TRNG_SBLIM_REG(TRNG0)
#define TRNG0_TOTSAM TRNG_TOTSAM_REG(TRNG0)
#define TRNG0_FRQMIN TRNG_FRQMIN_REG(TRNG0)
#define TRNG0_FRQCNT TRNG_FRQCNT_REG(TRNG0)
#define TRNG0_FRQMAX TRNG_FRQMAX_REG(TRNG0)
#define TRNG0_SCMC TRNG_SCMC_REG(TRNG0)
#define TRNG0_SCML TRNG_SCML_REG(TRNG0)
#define TRNG0_SCR1C TRNG_SCR1C_REG(TRNG0)
#define TRNG0_SCR1L TRNG_SCR1L_REG(TRNG0)
#define TRNG0_SCR2C TRNG_SCR2C_REG(TRNG0)
#define TRNG0_SCR2L TRNG_SCR2L_REG(TRNG0)
#define TRNG0_SCR3C TRNG_SCR3C_REG(TRNG0)
#define TRNG0_SCR3L TRNG_SCR3L_REG(TRNG0)
#define TRNG0_SCR4C TRNG_SCR4C_REG(TRNG0)
#define TRNG0_SCR4L TRNG_SCR4L_REG(TRNG0)
#define TRNG0_SCR5C TRNG_SCR5C_REG(TRNG0)
#define TRNG0_SCR5L TRNG_SCR5L_REG(TRNG0)
#define TRNG0_SCR6PC TRNG_SCR6PC_REG(TRNG0)
#define TRNG0_SCR6PL TRNG_SCR6PL_REG(TRNG0)
#define TRNG0_STATUS TRNG_STATUS_REG(TRNG0)
#define TRNG0_ENT0 TRNG_ENT_REG(TRNG0,0)
#define TRNG0_ENT1 TRNG_ENT_REG(TRNG0,1)
#define TRNG0_ENT2 TRNG_ENT_REG(TRNG0,2)
#define TRNG0_ENT3 TRNG_ENT_REG(TRNG0,3)
#define TRNG0_ENT4 TRNG_ENT_REG(TRNG0,4)
#define TRNG0_ENT5 TRNG_ENT_REG(TRNG0,5)
#define TRNG0_ENT6 TRNG_ENT_REG(TRNG0,6)
#define TRNG0_ENT7 TRNG_ENT_REG(TRNG0,7)
#define TRNG0_ENT8 TRNG_ENT_REG(TRNG0,8)
#define TRNG0_ENT9 TRNG_ENT_REG(TRNG0,9)
#define TRNG0_ENT10 TRNG_ENT_REG(TRNG0,10)
#define TRNG0_ENT11 TRNG_ENT_REG(TRNG0,11)
#define TRNG0_ENT12 TRNG_ENT_REG(TRNG0,12)
#define TRNG0_ENT13 TRNG_ENT_REG(TRNG0,13)
#define TRNG0_ENT14 TRNG_ENT_REG(TRNG0,14)
#define TRNG0_ENT15 TRNG_ENT_REG(TRNG0,15)
#define TRNG0_PKRCNT10 TRNG_PKRCNT10_REG(TRNG0)
#define TRNG0_PKRCNT32 TRNG_PKRCNT32_REG(TRNG0)
#define TRNG0_PKRCNT54 TRNG_PKRCNT54_REG(TRNG0)
#define TRNG0_PKRCNT76 TRNG_PKRCNT76_REG(TRNG0)
#define TRNG0_PKRCNT98 TRNG_PKRCNT98_REG(TRNG0)
#define TRNG0_PKRCNTBA TRNG_PKRCNTBA_REG(TRNG0)
#define TRNG0_PKRCNTDC TRNG_PKRCNTDC_REG(TRNG0)
#define TRNG0_PKRCNTFE TRNG_PKRCNTFE_REG(TRNG0)
#define TRNG0_SEC_CFG TRNG_SEC_CFG_REG(TRNG0)
#define TRNG0_INT_CTRL TRNG_INT_CTRL_REG(TRNG0)
#define TRNG0_INT_MASK TRNG_INT_MASK_REG(TRNG0)
#define TRNG0_INT_STATUS TRNG_INT_STATUS_REG(TRNG0)
#define TRNG0_VID1 TRNG_VID1_REG(TRNG0)
#define TRNG0_VID2 TRNG_VID2_REG(TRNG0)
/* TRNG - Register array accessors */
#define TRNG0_ENT(index) TRNG_ENT_REG(TRNG0,index)
/*!
* @}
*/ /* end of group TRNG_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group TRNG_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- TSI Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup TSI_Peripheral_Access_Layer TSI Peripheral Access Layer
* @{
*/
/** TSI - Register Layout Typedef */
typedef struct {
__IO uint32_t GENCS; /**< TSI General Control and Status Register, offset: 0x0 */
__IO uint32_t DATA; /**< TSI DATA Register, offset: 0x4 */
__IO uint32_t TSHD; /**< TSI Threshold Register, offset: 0x8 */
} TSI_Type, *TSI_MemMapPtr;
/* ----------------------------------------------------------------------------
-- TSI - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup TSI_Register_Accessor_Macros TSI - Register accessor macros
* @{
*/
/* TSI - Register accessors */
#define TSI_GENCS_REG(base) ((base)->GENCS)
#define TSI_DATA_REG(base) ((base)->DATA)
#define TSI_TSHD_REG(base) ((base)->TSHD)
/*!
* @}
*/ /* end of group TSI_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- TSI Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup TSI_Register_Masks TSI Register Masks
* @{
*/
/* GENCS Bit Fields */
#define TSI_GENCS_CURSW_MASK 0x2u
#define TSI_GENCS_CURSW_SHIFT 1
#define TSI_GENCS_CURSW_WIDTH 1
#define TSI_GENCS_CURSW(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_CURSW_SHIFT))&TSI_GENCS_CURSW_MASK)
#define TSI_GENCS_EOSF_MASK 0x4u
#define TSI_GENCS_EOSF_SHIFT 2
#define TSI_GENCS_EOSF_WIDTH 1
#define TSI_GENCS_EOSF(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_EOSF_SHIFT))&TSI_GENCS_EOSF_MASK)
#define TSI_GENCS_SCNIP_MASK 0x8u
#define TSI_GENCS_SCNIP_SHIFT 3
#define TSI_GENCS_SCNIP_WIDTH 1
#define TSI_GENCS_SCNIP(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_SCNIP_SHIFT))&TSI_GENCS_SCNIP_MASK)
#define TSI_GENCS_STM_MASK 0x10u
#define TSI_GENCS_STM_SHIFT 4
#define TSI_GENCS_STM_WIDTH 1
#define TSI_GENCS_STM(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_STM_SHIFT))&TSI_GENCS_STM_MASK)
#define TSI_GENCS_STPE_MASK 0x20u
#define TSI_GENCS_STPE_SHIFT 5
#define TSI_GENCS_STPE_WIDTH 1
#define TSI_GENCS_STPE(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_STPE_SHIFT))&TSI_GENCS_STPE_MASK)
#define TSI_GENCS_TSIIEN_MASK 0x40u
#define TSI_GENCS_TSIIEN_SHIFT 6
#define TSI_GENCS_TSIIEN_WIDTH 1
#define TSI_GENCS_TSIIEN(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_TSIIEN_SHIFT))&TSI_GENCS_TSIIEN_MASK)
#define TSI_GENCS_TSIEN_MASK 0x80u
#define TSI_GENCS_TSIEN_SHIFT 7
#define TSI_GENCS_TSIEN_WIDTH 1
#define TSI_GENCS_TSIEN(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_TSIEN_SHIFT))&TSI_GENCS_TSIEN_MASK)
#define TSI_GENCS_NSCN_MASK 0x1F00u
#define TSI_GENCS_NSCN_SHIFT 8
#define TSI_GENCS_NSCN_WIDTH 5
#define TSI_GENCS_NSCN(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_NSCN_SHIFT))&TSI_GENCS_NSCN_MASK)
#define TSI_GENCS_PS_MASK 0xE000u
#define TSI_GENCS_PS_SHIFT 13
#define TSI_GENCS_PS_WIDTH 3
#define TSI_GENCS_PS(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_PS_SHIFT))&TSI_GENCS_PS_MASK)
#define TSI_GENCS_EXTCHRG_MASK 0x70000u
#define TSI_GENCS_EXTCHRG_SHIFT 16
#define TSI_GENCS_EXTCHRG_WIDTH 3
#define TSI_GENCS_EXTCHRG(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_EXTCHRG_SHIFT))&TSI_GENCS_EXTCHRG_MASK)
#define TSI_GENCS_DVOLT_MASK 0x180000u
#define TSI_GENCS_DVOLT_SHIFT 19
#define TSI_GENCS_DVOLT_WIDTH 2
#define TSI_GENCS_DVOLT(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_DVOLT_SHIFT))&TSI_GENCS_DVOLT_MASK)
#define TSI_GENCS_REFCHRG_MASK 0xE00000u
#define TSI_GENCS_REFCHRG_SHIFT 21
#define TSI_GENCS_REFCHRG_WIDTH 3
#define TSI_GENCS_REFCHRG(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_REFCHRG_SHIFT))&TSI_GENCS_REFCHRG_MASK)
#define TSI_GENCS_MODE_MASK 0xF000000u
#define TSI_GENCS_MODE_SHIFT 24
#define TSI_GENCS_MODE_WIDTH 4
#define TSI_GENCS_MODE(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_MODE_SHIFT))&TSI_GENCS_MODE_MASK)
#define TSI_GENCS_ESOR_MASK 0x10000000u
#define TSI_GENCS_ESOR_SHIFT 28
#define TSI_GENCS_ESOR_WIDTH 1
#define TSI_GENCS_ESOR(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_ESOR_SHIFT))&TSI_GENCS_ESOR_MASK)
#define TSI_GENCS_OUTRGF_MASK 0x80000000u
#define TSI_GENCS_OUTRGF_SHIFT 31
#define TSI_GENCS_OUTRGF_WIDTH 1
#define TSI_GENCS_OUTRGF(x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_OUTRGF_SHIFT))&TSI_GENCS_OUTRGF_MASK)
/* DATA Bit Fields */
#define TSI_DATA_TSICNT_MASK 0xFFFFu
#define TSI_DATA_TSICNT_SHIFT 0
#define TSI_DATA_TSICNT_WIDTH 16
#define TSI_DATA_TSICNT(x) (((uint32_t)(((uint32_t)(x))<<TSI_DATA_TSICNT_SHIFT))&TSI_DATA_TSICNT_MASK)
#define TSI_DATA_SWTS_MASK 0x400000u
#define TSI_DATA_SWTS_SHIFT 22
#define TSI_DATA_SWTS_WIDTH 1
#define TSI_DATA_SWTS(x) (((uint32_t)(((uint32_t)(x))<<TSI_DATA_SWTS_SHIFT))&TSI_DATA_SWTS_MASK)
#define TSI_DATA_DMAEN_MASK 0x800000u
#define TSI_DATA_DMAEN_SHIFT 23
#define TSI_DATA_DMAEN_WIDTH 1
#define TSI_DATA_DMAEN(x) (((uint32_t)(((uint32_t)(x))<<TSI_DATA_DMAEN_SHIFT))&TSI_DATA_DMAEN_MASK)
#define TSI_DATA_TSICH_MASK 0xF0000000u
#define TSI_DATA_TSICH_SHIFT 28
#define TSI_DATA_TSICH_WIDTH 4
#define TSI_DATA_TSICH(x) (((uint32_t)(((uint32_t)(x))<<TSI_DATA_TSICH_SHIFT))&TSI_DATA_TSICH_MASK)
/* TSHD Bit Fields */
#define TSI_TSHD_THRESL_MASK 0xFFFFu
#define TSI_TSHD_THRESL_SHIFT 0
#define TSI_TSHD_THRESL_WIDTH 16
#define TSI_TSHD_THRESL(x) (((uint32_t)(((uint32_t)(x))<<TSI_TSHD_THRESL_SHIFT))&TSI_TSHD_THRESL_MASK)
#define TSI_TSHD_THRESH_MASK 0xFFFF0000u
#define TSI_TSHD_THRESH_SHIFT 16
#define TSI_TSHD_THRESH_WIDTH 16
#define TSI_TSHD_THRESH(x) (((uint32_t)(((uint32_t)(x))<<TSI_TSHD_THRESH_SHIFT))&TSI_TSHD_THRESH_MASK)
/*!
* @}
*/ /* end of group TSI_Register_Masks */
/* TSI - Peripheral instance base addresses */
/** Peripheral TSI0 base address */
#define TSI0_BASE (0x40045000u)
/** Peripheral TSI0 base pointer */
#define TSI0 ((TSI_Type *)TSI0_BASE)
#define TSI0_BASE_PTR (TSI0)
/** Array initializer of TSI peripheral base addresses */
#define TSI_BASE_ADDRS { TSI0_BASE }
/** Array initializer of TSI peripheral base pointers */
#define TSI_BASE_PTRS { TSI0 }
/** Interrupt vectors for the TSI peripheral type */
#define TSI_IRQS { TSI0_IRQn }
/* ----------------------------------------------------------------------------
-- TSI - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup TSI_Register_Accessor_Macros TSI - Register accessor macros
* @{
*/
/* TSI - Register instance definitions */
/* TSI0 */
#define TSI0_GENCS TSI_GENCS_REG(TSI0)
#define TSI0_DATA TSI_DATA_REG(TSI0)
#define TSI0_TSHD TSI_TSHD_REG(TSI0)
/*!
* @}
*/ /* end of group TSI_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group TSI_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- XCVR Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup XCVR_Peripheral_Access_Layer XCVR Peripheral Access Layer
* @{
*/
/** XCVR - Register Layout Typedef */
typedef struct {
__IO uint32_t RX_DIG_CTRL; /**< RX Digital Control, offset: 0x0 */
__IO uint32_t AGC_CTRL_0; /**< AGC Control 0, offset: 0x4 */
__IO uint32_t AGC_CTRL_1; /**< AGC Control 1, offset: 0x8 */
__IO uint32_t AGC_CTRL_2; /**< AGC Control 2, offset: 0xC */
__IO uint32_t AGC_CTRL_3; /**< AGC Control 3, offset: 0x10 */
__I uint32_t AGC_STAT; /**< AGC Status, offset: 0x14 */
__IO uint32_t RSSI_CTRL_0; /**< RSSI Control 0, offset: 0x18 */
__IO uint32_t RSSI_CTRL_1; /**< RSSI Control 1, offset: 0x1C */
__IO uint32_t DCOC_CTRL_0; /**< DCOC Control 0, offset: 0x20 */
__IO uint32_t DCOC_CTRL_1; /**< DCOC Control 1, offset: 0x24 */
__IO uint32_t DCOC_CTRL_2; /**< DCOC Control 2, offset: 0x28 */
__IO uint32_t DCOC_CTRL_3; /**< DCOC Control 3, offset: 0x2C */
__IO uint32_t DCOC_CTRL_4; /**< DCOC Control 4, offset: 0x30 */
__IO uint32_t DCOC_CAL_GAIN; /**< DCOC Calibration Gain, offset: 0x34 */
__I uint32_t DCOC_STAT; /**< DCOC Status, offset: 0x38 */
__I uint32_t DCOC_DC_EST; /**< DCOC DC Estimate, offset: 0x3C */
__IO uint32_t DCOC_CAL_RCP; /**< DCOC Calibration Reciprocals, offset: 0x40 */
uint8_t RESERVED_0[8];
__IO uint32_t IQMC_CTRL; /**< IQMC Control, offset: 0x4C */
__IO uint32_t IQMC_CAL; /**< IQMC Calibration, offset: 0x50 */
__IO uint32_t TCA_AGC_VAL_3_0; /**< TCA AGC Step Values 3..0, offset: 0x54 */
__IO uint32_t TCA_AGC_VAL_7_4; /**< TCA AGC Step Values 7..4, offset: 0x58 */
__IO uint32_t TCA_AGC_VAL_8; /**< TCA AGC Step Values 8, offset: 0x5C */
__IO uint32_t BBF_RES_TUNE_VAL_7_0; /**< BBF Resistor Tune Values 7..0, offset: 0x60 */
__IO uint32_t BBF_RES_TUNE_VAL_10_8; /**< BBF Resistor Tune Values 10..8, offset: 0x64 */
__IO uint32_t TCA_AGC_LIN_VAL_2_0; /**< TCA AGC Linear Gain Values 2..0, offset: 0x68 */
__IO uint32_t TCA_AGC_LIN_VAL_5_3; /**< TCA AGC Linear Gain Values 5..3, offset: 0x6C */
__IO uint32_t TCA_AGC_LIN_VAL_8_6; /**< TCA AGC Linear Gain Values 8..6, offset: 0x70 */
__IO uint32_t BBF_RES_TUNE_LIN_VAL_3_0; /**< BBF Resistor Tune Values 3..0, offset: 0x74 */
__IO uint32_t BBF_RES_TUNE_LIN_VAL_7_4; /**< BBF Resistor Tune Values 7..4, offset: 0x78 */
__IO uint32_t BBF_RES_TUNE_LIN_VAL_10_8; /**< BBF Resistor Tune Values 10..8, offset: 0x7C */
__IO uint32_t AGC_GAIN_TBL_03_00; /**< AGC Gain Tables Step 03..00, offset: 0x80 */
__IO uint32_t AGC_GAIN_TBL_07_04; /**< AGC Gain Tables Step 07..04, offset: 0x84 */
__IO uint32_t AGC_GAIN_TBL_11_08; /**< AGC Gain Tables Step 11..08, offset: 0x88 */
__IO uint32_t AGC_GAIN_TBL_15_12; /**< AGC Gain Tables Step 15..12, offset: 0x8C */
__IO uint32_t AGC_GAIN_TBL_19_16; /**< AGC Gain Tables Step 19..16, offset: 0x90 */
__IO uint32_t AGC_GAIN_TBL_23_20; /**< AGC Gain Tables Step 23..20, offset: 0x94 */
__IO uint32_t AGC_GAIN_TBL_26_24; /**< AGC Gain Tables Step 26..24, offset: 0x98 */
uint8_t RESERVED_1[4];
__IO uint32_t DCOC_OFFSET_[27]; /**< DCOC Offset, array offset: 0xA0, array step: 0x4 */
uint8_t RESERVED_2[4];
__IO uint32_t DCOC_TZA_STEP_[11]; /**< DCOC TZA DC step, array offset: 0x110, array step: 0x4 */
uint8_t RESERVED_3[48];
__I uint32_t DCOC_CAL_ALPHA; /**< DCOC Calibration Alpha, offset: 0x16C */
__I uint32_t DCOC_CAL_BETA; /**< DCOC Calibration Beta, offset: 0x170 */
__I uint32_t DCOC_CAL_GAMMA; /**< DCOC Calibration Gamma, offset: 0x174 */
__IO uint32_t DCOC_CAL_IIR; /**< DCOC Calibration IIR, offset: 0x178 */
uint8_t RESERVED_4[4];
__I uint32_t DCOC_CAL[3]; /**< DCOC Calibration Result, array offset: 0x180, array step: 0x4 */
uint8_t RESERVED_5[20];
__IO uint32_t RX_CHF_COEF[8]; /**< Receive Channel Filter Coefficient, array offset: 0x1A0, array step: 0x4 */
uint8_t RESERVED_6[64];
__IO uint32_t TX_DIG_CTRL; /**< TX Digital Control, offset: 0x200 */
__IO uint32_t TX_DATA_PAD_PAT; /**< TX Data Padding Pattern, offset: 0x204 */
__IO uint32_t TX_GFSK_MOD_CTRL; /**< TX GFSK Modulation Control, offset: 0x208 */
__IO uint32_t TX_GFSK_COEFF2; /**< TX GFSK Filter Coefficients 2, offset: 0x20C */
__IO uint32_t TX_GFSK_COEFF1; /**< TX GFSK Filter Coefficients 1, offset: 0x210 */
__IO uint32_t TX_FSK_MOD_SCALE; /**< TX FSK Modulation Scale, offset: 0x214 */
__IO uint32_t TX_DFT_MOD_PAT; /**< TX DFT Modulation Pattern, offset: 0x218 */
__IO uint32_t TX_DFT_TONE_0_1; /**< TX DFT Tones 0 and 1, offset: 0x21C */
__IO uint32_t TX_DFT_TONE_2_3; /**< TX DFT Tones 2 and 3, offset: 0x220 */
uint8_t RESERVED_7[4];
__IO uint32_t PLL_MOD_OVRD; /**< PLL Modulation Overrides, offset: 0x228 */
__IO uint32_t PLL_CHAN_MAP; /**< PLL Channel Mapping, offset: 0x22C */
__IO uint32_t PLL_LOCK_DETECT; /**< PLL Lock Detect, offset: 0x230 */
__IO uint32_t PLL_HP_MOD_CTRL; /**< PLL High Port Modulation Control, offset: 0x234 */
__IO uint32_t PLL_HPM_CAL_CTRL; /**< PLL HPM Calibration Control, offset: 0x238 */
__IO uint32_t PLL_LD_HPM_CAL1; /**< PLL Cycle Slip Lock Detect Configuration and HPM Calibration 1, offset: 0x23C */
__IO uint32_t PLL_LD_HPM_CAL2; /**< PLL Cycle Slip Lock Detect Configuration and HPM Calibration 2, offset: 0x240 */
__IO uint32_t PLL_HPM_SDM_FRACTION; /**< PLL HPM SDM Fraction, offset: 0x244 */
__IO uint32_t PLL_LP_MOD_CTRL; /**< PLL Low Port Modulation Control, offset: 0x248 */
__IO uint32_t PLL_LP_SDM_CTRL1; /**< PLL Low Port SDM Control 1, offset: 0x24C */
__IO uint32_t PLL_LP_SDM_CTRL2; /**< PLL Low Port SDM Control 2, offset: 0x250 */
__IO uint32_t PLL_LP_SDM_CTRL3; /**< PLL Low Port SDM Control 3, offset: 0x254 */
__I uint32_t PLL_LP_SDM_NUM; /**< PLL Low Port SDM Numerator Applied, offset: 0x258 */
__I uint32_t PLL_LP_SDM_DENOM; /**< PLL Low Port SDM Denominator Applied, offset: 0x25C */
__IO uint32_t PLL_DELAY_MATCH; /**< PLL Delay Matching, offset: 0x260 */
__IO uint32_t PLL_CTUNE_CTRL; /**< PLL Coarse Tune Control, offset: 0x264 */
__I uint32_t PLL_CTUNE_CNT6; /**< PLL Coarse Tune Count 6, offset: 0x268 */
__I uint32_t PLL_CTUNE_CNT5_4; /**< PLL Coarse Tune Counts 5 and 4, offset: 0x26C */
__I uint32_t PLL_CTUNE_CNT3_2; /**< PLL Coarse Tune Counts 3 and 2, offset: 0x270 */
__I uint32_t PLL_CTUNE_CNT1_0; /**< PLL Coarse Tune Counts 1 and 0, offset: 0x274 */
__I uint32_t PLL_CTUNE_RESULTS; /**< PLL Coarse Tune Results, offset: 0x278 */
uint8_t RESERVED_8[4];
__IO uint32_t CTRL; /**< Transceiver Control, offset: 0x280 */
__I uint32_t STATUS; /**< Transceiver Status, offset: 0x284 */
__I uint32_t SOFT_RESET; /**< Soft Reset, offset: 0x288 */
uint8_t RESERVED_9[4];
__IO uint32_t OVERWRITE_VER; /**< Overwrite Version, offset: 0x290 */
__IO uint32_t DMA_CTRL; /**< DMA Control, offset: 0x294 */
__I uint32_t DMA_DATA; /**< DMA Data, offset: 0x298 */
__IO uint32_t DTEST_CTRL; /**< Digital Test Control, offset: 0x29C */
__IO uint32_t PB_CTRL; /**< Packet Buffer Control Register, offset: 0x2A0 */
uint8_t RESERVED_10[28];
__IO uint32_t TSM_CTRL; /**< Transceiver Sequence Manager Control, offset: 0x2C0 */
__IO uint32_t END_OF_SEQ; /**< End of Sequence Control, offset: 0x2C4 */
__IO uint32_t TSM_OVRD0; /**< TSM Override 0, offset: 0x2C8 */
__IO uint32_t TSM_OVRD1; /**< TSM Override 1, offset: 0x2CC */
__IO uint32_t TSM_OVRD2; /**< TSM Override 2, offset: 0x2D0 */
__IO uint32_t TSM_OVRD3; /**< TSM Override 3, offset: 0x2D4 */
__IO uint32_t PA_POWER; /**< PA Power, offset: 0x2D8 */
__IO uint32_t PA_BIAS_TBL0; /**< PA Bias Table 0, offset: 0x2DC */
__IO uint32_t PA_BIAS_TBL1; /**< PA Bias Table 1, offset: 0x2E0 */
__IO uint32_t RECYCLE_COUNT; /**< Recycle Count Register, offset: 0x2E4 */
__IO uint32_t TSM_TIMING00; /**< TSM_TIMING00, offset: 0x2E8 */
__IO uint32_t TSM_TIMING01; /**< TSM_TIMING01, offset: 0x2EC */
__IO uint32_t TSM_TIMING02; /**< TSM_TIMING02, offset: 0x2F0 */
__IO uint32_t TSM_TIMING03; /**< TSM_TIMING03, offset: 0x2F4 */
__IO uint32_t TSM_TIMING04; /**< TSM_TIMING04, offset: 0x2F8 */
__IO uint32_t TSM_TIMING05; /**< TSM_TIMING05, offset: 0x2FC */
__IO uint32_t TSM_TIMING06; /**< TSM_TIMING06, offset: 0x300 */
__IO uint32_t TSM_TIMING07; /**< TSM_TIMING07, offset: 0x304 */
__IO uint32_t TSM_TIMING08; /**< TSM_TIMING08, offset: 0x308 */
__IO uint32_t TSM_TIMING09; /**< TSM_TIMING09, offset: 0x30C */
__IO uint32_t TSM_TIMING10; /**< TSM_TIMING10, offset: 0x310 */
__IO uint32_t TSM_TIMING11; /**< TSM_TIMING11, offset: 0x314 */
__IO uint32_t TSM_TIMING12; /**< TSM_TIMING12, offset: 0x318 */
__IO uint32_t TSM_TIMING13; /**< TSM_TIMING13, offset: 0x31C */
__IO uint32_t TSM_TIMING14; /**< TSM_TIMING14, offset: 0x320 */
__IO uint32_t TSM_TIMING15; /**< TSM_TIMING15, offset: 0x324 */
__IO uint32_t TSM_TIMING16; /**< TSM_TIMING16, offset: 0x328 */
__IO uint32_t TSM_TIMING17; /**< TSM_TIMING17, offset: 0x32C */
__IO uint32_t TSM_TIMING18; /**< TSM_TIMING18, offset: 0x330 */
__IO uint32_t TSM_TIMING19; /**< TSM_TIMING19, offset: 0x334 */
__IO uint32_t TSM_TIMING20; /**< TSM_TIMING20, offset: 0x338 */
__IO uint32_t TSM_TIMING21; /**< TSM_TIMING21, offset: 0x33C */
__IO uint32_t TSM_TIMING22; /**< TSM_TIMING22, offset: 0x340 */
__IO uint32_t TSM_TIMING23; /**< TSM_TIMING23, offset: 0x344 */
__IO uint32_t TSM_TIMING24; /**< TSM_TIMING24, offset: 0x348 */
__IO uint32_t TSM_TIMING25; /**< TSM_TIMING25, offset: 0x34C */
__IO uint32_t TSM_TIMING26; /**< TSM_TIMING26, offset: 0x350 */
__IO uint32_t TSM_TIMING27; /**< TSM_TIMING27, offset: 0x354 */
__IO uint32_t TSM_TIMING28; /**< TSM_TIMING28, offset: 0x358 */
__IO uint32_t TSM_TIMING29; /**< TSM_TIMING29, offset: 0x35C */
__IO uint32_t TSM_TIMING30; /**< TSM_TIMING30, offset: 0x360 */
__IO uint32_t TSM_TIMING31; /**< TSM_TIMING31, offset: 0x364 */
__IO uint32_t TSM_TIMING32; /**< TSM_TIMING32, offset: 0x368 */
__IO uint32_t TSM_TIMING33; /**< TSM_TIMING33, offset: 0x36C */
__IO uint32_t TSM_TIMING34; /**< TSM_TIMING34, offset: 0x370 */
__IO uint32_t TSM_TIMING35; /**< TSM_TIMING35, offset: 0x374 */
__IO uint32_t TSM_TIMING36; /**< TSM_TIMING36, offset: 0x378 */
__IO uint32_t TSM_TIMING37; /**< TSM_TIMING37, offset: 0x37C */
__IO uint32_t TSM_TIMING38; /**< TSM_TIMING38, offset: 0x380 */
__IO uint32_t TSM_TIMING39; /**< TSM_TIMING39, offset: 0x384 */
__IO uint32_t TSM_TIMING40; /**< TSM_TIMING40, offset: 0x388 */
__IO uint32_t TSM_TIMING41; /**< TSM_TIMING41, offset: 0x38C */
__IO uint32_t TSM_TIMING42; /**< TSM_TIMING42, offset: 0x390 */
__IO uint32_t TSM_TIMING43; /**< TSM_TIMING43, offset: 0x394 */
uint8_t RESERVED_11[40];
__IO uint32_t CORR_CTRL; /**< CORR_CTRL, offset: 0x3C0 */
__IO uint32_t PN_TYPE; /**< PN_TYPE, offset: 0x3C4 */
__IO uint32_t PN_CODE; /**< PN_CODE, offset: 0x3C8 */
__IO uint32_t SYNC_CTRL; /**< Sync Control, offset: 0x3CC */
__IO uint32_t SNF_THR; /**< SNF_THR, offset: 0x3D0 */
__IO uint32_t FAD_THR; /**< FAD_THR, offset: 0x3D4 */
__IO uint32_t ZBDEM_AFC; /**< ZBDEM_AFC, offset: 0x3D8 */
__IO uint32_t LPPS_CTRL; /**< LPPS Control Register, offset: 0x3DC */
uint8_t RESERVED_12[32];
__IO uint32_t ADC_CTRL; /**< ADC Control, offset: 0x400 */
__IO uint32_t ADC_TUNE; /**< ADC Tuning, offset: 0x404 */
__IO uint32_t ADC_ADJ; /**< ADC Adjustment, offset: 0x408 */
__IO uint32_t ADC_REGS; /**< ADC Regulators, offset: 0x40C */
__IO uint32_t ADC_TRIMS; /**< ADC Regulator Trims, offset: 0x410 */
__IO uint32_t ADC_TEST_CTRL; /**< ADC Test Control, offset: 0x414 */
uint8_t RESERVED_13[8];
__IO uint32_t BBF_CTRL; /**< Baseband Filter Control, offset: 0x420 */
uint8_t RESERVED_14[8];
__IO uint32_t RX_ANA_CTRL; /**< RX Analog Control, offset: 0x42C */
uint8_t RESERVED_15[4];
__IO uint32_t XTAL_CTRL; /**< Crystal Oscillator Control Register 1, offset: 0x434 */
__IO uint32_t XTAL_CTRL2; /**< Crystal Oscillator Control Register 2, offset: 0x438 */
__IO uint32_t BGAP_CTRL; /**< Bandgap Control, offset: 0x43C */
uint8_t RESERVED_16[4];
__IO uint32_t PLL_CTRL; /**< PLL Control Register, offset: 0x444 */
__IO uint32_t PLL_CTRL2; /**< PLL Control Register 2, offset: 0x448 */
__IO uint32_t PLL_TEST_CTRL; /**< PLL Test Control, offset: 0x44C */
uint8_t RESERVED_17[8];
__IO uint32_t QGEN_CTRL; /**< QGEN Control, offset: 0x458 */
uint8_t RESERVED_18[8];
__IO uint32_t TCA_CTRL; /**< TCA Control, offset: 0x464 */
__IO uint32_t TZA_CTRL; /**< TZA Control, offset: 0x468 */
uint8_t RESERVED_19[8];
__IO uint32_t TX_ANA_CTRL; /**< TX Analog Control, offset: 0x474 */
uint8_t RESERVED_20[4];
__IO uint32_t ANA_SPARE; /**< Analog Spare, offset: 0x47C */
} XCVR_Type, *XCVR_MemMapPtr;
/* ----------------------------------------------------------------------------
-- XCVR - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup XCVR_Register_Accessor_Macros XCVR - Register accessor macros
* @{
*/
/* XCVR - Register accessors */
#define XCVR_RX_DIG_CTRL_REG(base) ((base)->RX_DIG_CTRL)
#define XCVR_AGC_CTRL_0_REG(base) ((base)->AGC_CTRL_0)
#define XCVR_AGC_CTRL_1_REG(base) ((base)->AGC_CTRL_1)
#define XCVR_AGC_CTRL_2_REG(base) ((base)->AGC_CTRL_2)
#define XCVR_AGC_CTRL_3_REG(base) ((base)->AGC_CTRL_3)
#define XCVR_AGC_STAT_REG(base) ((base)->AGC_STAT)
#define XCVR_RSSI_CTRL_0_REG(base) ((base)->RSSI_CTRL_0)
#define XCVR_RSSI_CTRL_1_REG(base) ((base)->RSSI_CTRL_1)
#define XCVR_DCOC_CTRL_0_REG(base) ((base)->DCOC_CTRL_0)
#define XCVR_DCOC_CTRL_1_REG(base) ((base)->DCOC_CTRL_1)
#define XCVR_DCOC_CTRL_2_REG(base) ((base)->DCOC_CTRL_2)
#define XCVR_DCOC_CTRL_3_REG(base) ((base)->DCOC_CTRL_3)
#define XCVR_DCOC_CTRL_4_REG(base) ((base)->DCOC_CTRL_4)
#define XCVR_DCOC_CAL_GAIN_REG(base) ((base)->DCOC_CAL_GAIN)
#define XCVR_DCOC_STAT_REG(base) ((base)->DCOC_STAT)
#define XCVR_DCOC_DC_EST_REG(base) ((base)->DCOC_DC_EST)
#define XCVR_DCOC_CAL_RCP_REG(base) ((base)->DCOC_CAL_RCP)
#define XCVR_IQMC_CTRL_REG(base) ((base)->IQMC_CTRL)
#define XCVR_IQMC_CAL_REG(base) ((base)->IQMC_CAL)
#define XCVR_TCA_AGC_VAL_3_0_REG(base) ((base)->TCA_AGC_VAL_3_0)
#define XCVR_TCA_AGC_VAL_7_4_REG(base) ((base)->TCA_AGC_VAL_7_4)
#define XCVR_TCA_AGC_VAL_8_REG(base) ((base)->TCA_AGC_VAL_8)
#define XCVR_BBF_RES_TUNE_VAL_7_0_REG(base) ((base)->BBF_RES_TUNE_VAL_7_0)
#define XCVR_BBF_RES_TUNE_VAL_10_8_REG(base) ((base)->BBF_RES_TUNE_VAL_10_8)
#define XCVR_TCA_AGC_LIN_VAL_2_0_REG(base) ((base)->TCA_AGC_LIN_VAL_2_0)
#define XCVR_TCA_AGC_LIN_VAL_5_3_REG(base) ((base)->TCA_AGC_LIN_VAL_5_3)
#define XCVR_TCA_AGC_LIN_VAL_8_6_REG(base) ((base)->TCA_AGC_LIN_VAL_8_6)
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_REG(base) ((base)->BBF_RES_TUNE_LIN_VAL_3_0)
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_REG(base) ((base)->BBF_RES_TUNE_LIN_VAL_7_4)
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_REG(base) ((base)->BBF_RES_TUNE_LIN_VAL_10_8)
#define XCVR_AGC_GAIN_TBL_03_00_REG(base) ((base)->AGC_GAIN_TBL_03_00)
#define XCVR_AGC_GAIN_TBL_07_04_REG(base) ((base)->AGC_GAIN_TBL_07_04)
#define XCVR_AGC_GAIN_TBL_11_08_REG(base) ((base)->AGC_GAIN_TBL_11_08)
#define XCVR_AGC_GAIN_TBL_15_12_REG(base) ((base)->AGC_GAIN_TBL_15_12)
#define XCVR_AGC_GAIN_TBL_19_16_REG(base) ((base)->AGC_GAIN_TBL_19_16)
#define XCVR_AGC_GAIN_TBL_23_20_REG(base) ((base)->AGC_GAIN_TBL_23_20)
#define XCVR_AGC_GAIN_TBL_26_24_REG(base) ((base)->AGC_GAIN_TBL_26_24)
#define XCVR_DCOC_OFFSET__REG(base,index) ((base)->DCOC_OFFSET_[index])
#define XCVR_DCOC_OFFSET__COUNT 27
#define XCVR_DCOC_TZA_STEP__REG(base,index) ((base)->DCOC_TZA_STEP_[index])
#define XCVR_DCOC_TZA_STEP__COUNT 11
#define XCVR_DCOC_CAL_ALPHA_REG(base) ((base)->DCOC_CAL_ALPHA)
#define XCVR_DCOC_CAL_BETA_REG(base) ((base)->DCOC_CAL_BETA)
#define XCVR_DCOC_CAL_GAMMA_REG(base) ((base)->DCOC_CAL_GAMMA)
#define XCVR_DCOC_CAL_IIR_REG(base) ((base)->DCOC_CAL_IIR)
#define XCVR_DCOC_CAL_REG(base,index) ((base)->DCOC_CAL[index])
#define XCVR_DCOC_CAL_COUNT 3
#define XCVR_RX_CHF_COEF_REG(base,index) ((base)->RX_CHF_COEF[index])
#define XCVR_RX_CHF_COEF_COUNT 8
#define XCVR_TX_DIG_CTRL_REG(base) ((base)->TX_DIG_CTRL)
#define XCVR_TX_DATA_PAD_PAT_REG(base) ((base)->TX_DATA_PAD_PAT)
#define XCVR_TX_GFSK_MOD_CTRL_REG(base) ((base)->TX_GFSK_MOD_CTRL)
#define XCVR_TX_GFSK_COEFF2_REG(base) ((base)->TX_GFSK_COEFF2)
#define XCVR_TX_GFSK_COEFF1_REG(base) ((base)->TX_GFSK_COEFF1)
#define XCVR_TX_FSK_MOD_SCALE_REG(base) ((base)->TX_FSK_MOD_SCALE)
#define XCVR_TX_DFT_MOD_PAT_REG(base) ((base)->TX_DFT_MOD_PAT)
#define XCVR_TX_DFT_TONE_0_1_REG(base) ((base)->TX_DFT_TONE_0_1)
#define XCVR_TX_DFT_TONE_2_3_REG(base) ((base)->TX_DFT_TONE_2_3)
#define XCVR_PLL_MOD_OVRD_REG(base) ((base)->PLL_MOD_OVRD)
#define XCVR_PLL_CHAN_MAP_REG(base) ((base)->PLL_CHAN_MAP)
#define XCVR_PLL_LOCK_DETECT_REG(base) ((base)->PLL_LOCK_DETECT)
#define XCVR_PLL_HP_MOD_CTRL_REG(base) ((base)->PLL_HP_MOD_CTRL)
#define XCVR_PLL_HPM_CAL_CTRL_REG(base) ((base)->PLL_HPM_CAL_CTRL)
#define XCVR_PLL_LD_HPM_CAL1_REG(base) ((base)->PLL_LD_HPM_CAL1)
#define XCVR_PLL_LD_HPM_CAL2_REG(base) ((base)->PLL_LD_HPM_CAL2)
#define XCVR_PLL_HPM_SDM_FRACTION_REG(base) ((base)->PLL_HPM_SDM_FRACTION)
#define XCVR_PLL_LP_MOD_CTRL_REG(base) ((base)->PLL_LP_MOD_CTRL)
#define XCVR_PLL_LP_SDM_CTRL1_REG(base) ((base)->PLL_LP_SDM_CTRL1)
#define XCVR_PLL_LP_SDM_CTRL2_REG(base) ((base)->PLL_LP_SDM_CTRL2)
#define XCVR_PLL_LP_SDM_CTRL3_REG(base) ((base)->PLL_LP_SDM_CTRL3)
#define XCVR_PLL_LP_SDM_NUM_REG(base) ((base)->PLL_LP_SDM_NUM)
#define XCVR_PLL_LP_SDM_DENOM_REG(base) ((base)->PLL_LP_SDM_DENOM)
#define XCVR_PLL_DELAY_MATCH_REG(base) ((base)->PLL_DELAY_MATCH)
#define XCVR_PLL_CTUNE_CTRL_REG(base) ((base)->PLL_CTUNE_CTRL)
#define XCVR_PLL_CTUNE_CNT6_REG(base) ((base)->PLL_CTUNE_CNT6)
#define XCVR_PLL_CTUNE_CNT5_4_REG(base) ((base)->PLL_CTUNE_CNT5_4)
#define XCVR_PLL_CTUNE_CNT3_2_REG(base) ((base)->PLL_CTUNE_CNT3_2)
#define XCVR_PLL_CTUNE_CNT1_0_REG(base) ((base)->PLL_CTUNE_CNT1_0)
#define XCVR_PLL_CTUNE_RESULTS_REG(base) ((base)->PLL_CTUNE_RESULTS)
#define XCVR_CTRL_REG(base) ((base)->CTRL)
#define XCVR_STATUS_REG(base) ((base)->STATUS)
#define XCVR_SOFT_RESET_REG(base) ((base)->SOFT_RESET)
#define XCVR_OVERWRITE_VER_REG(base) ((base)->OVERWRITE_VER)
#define XCVR_DMA_CTRL_REG(base) ((base)->DMA_CTRL)
#define XCVR_DMA_DATA_REG(base) ((base)->DMA_DATA)
#define XCVR_DTEST_CTRL_REG(base) ((base)->DTEST_CTRL)
#define XCVR_PB_CTRL_REG(base) ((base)->PB_CTRL)
#define XCVR_TSM_CTRL_REG(base) ((base)->TSM_CTRL)
#define XCVR_END_OF_SEQ_REG(base) ((base)->END_OF_SEQ)
#define XCVR_TSM_OVRD0_REG(base) ((base)->TSM_OVRD0)
#define XCVR_TSM_OVRD1_REG(base) ((base)->TSM_OVRD1)
#define XCVR_TSM_OVRD2_REG(base) ((base)->TSM_OVRD2)
#define XCVR_TSM_OVRD3_REG(base) ((base)->TSM_OVRD3)
#define XCVR_PA_POWER_REG(base) ((base)->PA_POWER)
#define XCVR_PA_BIAS_TBL0_REG(base) ((base)->PA_BIAS_TBL0)
#define XCVR_PA_BIAS_TBL1_REG(base) ((base)->PA_BIAS_TBL1)
#define XCVR_RECYCLE_COUNT_REG(base) ((base)->RECYCLE_COUNT)
#define XCVR_TSM_TIMING00_REG(base) ((base)->TSM_TIMING00)
#define XCVR_TSM_TIMING01_REG(base) ((base)->TSM_TIMING01)
#define XCVR_TSM_TIMING02_REG(base) ((base)->TSM_TIMING02)
#define XCVR_TSM_TIMING03_REG(base) ((base)->TSM_TIMING03)
#define XCVR_TSM_TIMING04_REG(base) ((base)->TSM_TIMING04)
#define XCVR_TSM_TIMING05_REG(base) ((base)->TSM_TIMING05)
#define XCVR_TSM_TIMING06_REG(base) ((base)->TSM_TIMING06)
#define XCVR_TSM_TIMING07_REG(base) ((base)->TSM_TIMING07)
#define XCVR_TSM_TIMING08_REG(base) ((base)->TSM_TIMING08)
#define XCVR_TSM_TIMING09_REG(base) ((base)->TSM_TIMING09)
#define XCVR_TSM_TIMING10_REG(base) ((base)->TSM_TIMING10)
#define XCVR_TSM_TIMING11_REG(base) ((base)->TSM_TIMING11)
#define XCVR_TSM_TIMING12_REG(base) ((base)->TSM_TIMING12)
#define XCVR_TSM_TIMING13_REG(base) ((base)->TSM_TIMING13)
#define XCVR_TSM_TIMING14_REG(base) ((base)->TSM_TIMING14)
#define XCVR_TSM_TIMING15_REG(base) ((base)->TSM_TIMING15)
#define XCVR_TSM_TIMING16_REG(base) ((base)->TSM_TIMING16)
#define XCVR_TSM_TIMING17_REG(base) ((base)->TSM_TIMING17)
#define XCVR_TSM_TIMING18_REG(base) ((base)->TSM_TIMING18)
#define XCVR_TSM_TIMING19_REG(base) ((base)->TSM_TIMING19)
#define XCVR_TSM_TIMING20_REG(base) ((base)->TSM_TIMING20)
#define XCVR_TSM_TIMING21_REG(base) ((base)->TSM_TIMING21)
#define XCVR_TSM_TIMING22_REG(base) ((base)->TSM_TIMING22)
#define XCVR_TSM_TIMING23_REG(base) ((base)->TSM_TIMING23)
#define XCVR_TSM_TIMING24_REG(base) ((base)->TSM_TIMING24)
#define XCVR_TSM_TIMING25_REG(base) ((base)->TSM_TIMING25)
#define XCVR_TSM_TIMING26_REG(base) ((base)->TSM_TIMING26)
#define XCVR_TSM_TIMING27_REG(base) ((base)->TSM_TIMING27)
#define XCVR_TSM_TIMING28_REG(base) ((base)->TSM_TIMING28)
#define XCVR_TSM_TIMING29_REG(base) ((base)->TSM_TIMING29)
#define XCVR_TSM_TIMING30_REG(base) ((base)->TSM_TIMING30)
#define XCVR_TSM_TIMING31_REG(base) ((base)->TSM_TIMING31)
#define XCVR_TSM_TIMING32_REG(base) ((base)->TSM_TIMING32)
#define XCVR_TSM_TIMING33_REG(base) ((base)->TSM_TIMING33)
#define XCVR_TSM_TIMING34_REG(base) ((base)->TSM_TIMING34)
#define XCVR_TSM_TIMING35_REG(base) ((base)->TSM_TIMING35)
#define XCVR_TSM_TIMING36_REG(base) ((base)->TSM_TIMING36)
#define XCVR_TSM_TIMING37_REG(base) ((base)->TSM_TIMING37)
#define XCVR_TSM_TIMING38_REG(base) ((base)->TSM_TIMING38)
#define XCVR_TSM_TIMING39_REG(base) ((base)->TSM_TIMING39)
#define XCVR_TSM_TIMING40_REG(base) ((base)->TSM_TIMING40)
#define XCVR_TSM_TIMING41_REG(base) ((base)->TSM_TIMING41)
#define XCVR_TSM_TIMING42_REG(base) ((base)->TSM_TIMING42)
#define XCVR_TSM_TIMING43_REG(base) ((base)->TSM_TIMING43)
#define XCVR_CORR_CTRL_REG(base) ((base)->CORR_CTRL)
#define XCVR_PN_TYPE_REG(base) ((base)->PN_TYPE)
#define XCVR_PN_CODE_REG(base) ((base)->PN_CODE)
#define XCVR_SYNC_CTRL_REG(base) ((base)->SYNC_CTRL)
#define XCVR_SNF_THR_REG(base) ((base)->SNF_THR)
#define XCVR_FAD_THR_REG(base) ((base)->FAD_THR)
#define XCVR_ZBDEM_AFC_REG(base) ((base)->ZBDEM_AFC)
#define XCVR_LPPS_CTRL_REG(base) ((base)->LPPS_CTRL)
#define XCVR_ADC_CTRL_REG(base) ((base)->ADC_CTRL)
#define XCVR_ADC_TUNE_REG(base) ((base)->ADC_TUNE)
#define XCVR_ADC_ADJ_REG(base) ((base)->ADC_ADJ)
#define XCVR_ADC_REGS_REG(base) ((base)->ADC_REGS)
#define XCVR_ADC_TRIMS_REG(base) ((base)->ADC_TRIMS)
#define XCVR_ADC_TEST_CTRL_REG(base) ((base)->ADC_TEST_CTRL)
#define XCVR_BBF_CTRL_REG(base) ((base)->BBF_CTRL)
#define XCVR_RX_ANA_CTRL_REG(base) ((base)->RX_ANA_CTRL)
#define XCVR_XTAL_CTRL_REG(base) ((base)->XTAL_CTRL)
#define XCVR_XTAL_CTRL2_REG(base) ((base)->XTAL_CTRL2)
#define XCVR_BGAP_CTRL_REG(base) ((base)->BGAP_CTRL)
#define XCVR_PLL_CTRL_REG(base) ((base)->PLL_CTRL)
#define XCVR_PLL_CTRL2_REG(base) ((base)->PLL_CTRL2)
#define XCVR_PLL_TEST_CTRL_REG(base) ((base)->PLL_TEST_CTRL)
#define XCVR_QGEN_CTRL_REG(base) ((base)->QGEN_CTRL)
#define XCVR_TCA_CTRL_REG(base) ((base)->TCA_CTRL)
#define XCVR_TZA_CTRL_REG(base) ((base)->TZA_CTRL)
#define XCVR_TX_ANA_CTRL_REG(base) ((base)->TX_ANA_CTRL)
#define XCVR_ANA_SPARE_REG(base) ((base)->ANA_SPARE)
/*!
* @}
*/ /* end of group XCVR_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- XCVR Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup XCVR_Register_Masks XCVR Register Masks
* @{
*/
/* RX_DIG_CTRL Bit Fields */
#define XCVR_RX_DIG_CTRL_RX_ADC_NEGEDGE_MASK 0x1u
#define XCVR_RX_DIG_CTRL_RX_ADC_NEGEDGE_SHIFT 0
#define XCVR_RX_DIG_CTRL_RX_ADC_NEGEDGE_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_ADC_NEGEDGE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_ADC_NEGEDGE_SHIFT))&XCVR_RX_DIG_CTRL_RX_ADC_NEGEDGE_MASK)
#define XCVR_RX_DIG_CTRL_RX_CH_FILT_BYPASS_MASK 0x2u
#define XCVR_RX_DIG_CTRL_RX_CH_FILT_BYPASS_SHIFT 1
#define XCVR_RX_DIG_CTRL_RX_CH_FILT_BYPASS_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_CH_FILT_BYPASS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_CH_FILT_BYPASS_SHIFT))&XCVR_RX_DIG_CTRL_RX_CH_FILT_BYPASS_MASK)
#define XCVR_RX_DIG_CTRL_RX_ADC_RAW_EN_MASK 0x4u
#define XCVR_RX_DIG_CTRL_RX_ADC_RAW_EN_SHIFT 2
#define XCVR_RX_DIG_CTRL_RX_ADC_RAW_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_ADC_RAW_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_ADC_RAW_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_ADC_RAW_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_DEC_FILT_OSR_MASK 0x70u
#define XCVR_RX_DIG_CTRL_RX_DEC_FILT_OSR_SHIFT 4
#define XCVR_RX_DIG_CTRL_RX_DEC_FILT_OSR_WIDTH 3
#define XCVR_RX_DIG_CTRL_RX_DEC_FILT_OSR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_DEC_FILT_OSR_SHIFT))&XCVR_RX_DIG_CTRL_RX_DEC_FILT_OSR_MASK)
#define XCVR_RX_DIG_CTRL_RX_INTERP_EN_MASK 0x100u
#define XCVR_RX_DIG_CTRL_RX_INTERP_EN_SHIFT 8
#define XCVR_RX_DIG_CTRL_RX_INTERP_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_INTERP_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_INTERP_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_INTERP_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_NORM_EN_MASK 0x200u
#define XCVR_RX_DIG_CTRL_RX_NORM_EN_SHIFT 9
#define XCVR_RX_DIG_CTRL_RX_NORM_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_NORM_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_NORM_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_NORM_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_RSSI_EN_MASK 0x400u
#define XCVR_RX_DIG_CTRL_RX_RSSI_EN_SHIFT 10
#define XCVR_RX_DIG_CTRL_RX_RSSI_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_RSSI_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_RSSI_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_RSSI_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_AGC_EN_MASK 0x800u
#define XCVR_RX_DIG_CTRL_RX_AGC_EN_SHIFT 11
#define XCVR_RX_DIG_CTRL_RX_AGC_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_AGC_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_AGC_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_AGC_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_DCOC_EN_MASK 0x1000u
#define XCVR_RX_DIG_CTRL_RX_DCOC_EN_SHIFT 12
#define XCVR_RX_DIG_CTRL_RX_DCOC_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_DCOC_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_DCOC_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_DCOC_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_DCOC_CAL_EN_MASK 0x2000u
#define XCVR_RX_DIG_CTRL_RX_DCOC_CAL_EN_SHIFT 13
#define XCVR_RX_DIG_CTRL_RX_DCOC_CAL_EN_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_DCOC_CAL_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_DCOC_CAL_EN_SHIFT))&XCVR_RX_DIG_CTRL_RX_DCOC_CAL_EN_MASK)
#define XCVR_RX_DIG_CTRL_RX_IQ_SWAP_MASK 0x4000u
#define XCVR_RX_DIG_CTRL_RX_IQ_SWAP_SHIFT 14
#define XCVR_RX_DIG_CTRL_RX_IQ_SWAP_WIDTH 1
#define XCVR_RX_DIG_CTRL_RX_IQ_SWAP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_DIG_CTRL_RX_IQ_SWAP_SHIFT))&XCVR_RX_DIG_CTRL_RX_IQ_SWAP_MASK)
/* AGC_CTRL_0 Bit Fields */
#define XCVR_AGC_CTRL_0_SLOW_AGC_EN_MASK 0x1u
#define XCVR_AGC_CTRL_0_SLOW_AGC_EN_SHIFT 0
#define XCVR_AGC_CTRL_0_SLOW_AGC_EN_WIDTH 1
#define XCVR_AGC_CTRL_0_SLOW_AGC_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_SLOW_AGC_EN_SHIFT))&XCVR_AGC_CTRL_0_SLOW_AGC_EN_MASK)
#define XCVR_AGC_CTRL_0_SLOW_AGC_SRC_MASK 0x6u
#define XCVR_AGC_CTRL_0_SLOW_AGC_SRC_SHIFT 1
#define XCVR_AGC_CTRL_0_SLOW_AGC_SRC_WIDTH 2
#define XCVR_AGC_CTRL_0_SLOW_AGC_SRC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_SLOW_AGC_SRC_SHIFT))&XCVR_AGC_CTRL_0_SLOW_AGC_SRC_MASK)
#define XCVR_AGC_CTRL_0_AGC_FREEZE_EN_MASK 0x8u
#define XCVR_AGC_CTRL_0_AGC_FREEZE_EN_SHIFT 3
#define XCVR_AGC_CTRL_0_AGC_FREEZE_EN_WIDTH 1
#define XCVR_AGC_CTRL_0_AGC_FREEZE_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_FREEZE_EN_SHIFT))&XCVR_AGC_CTRL_0_AGC_FREEZE_EN_MASK)
#define XCVR_AGC_CTRL_0_FREEZE_AGC_SRC_MASK 0x30u
#define XCVR_AGC_CTRL_0_FREEZE_AGC_SRC_SHIFT 4
#define XCVR_AGC_CTRL_0_FREEZE_AGC_SRC_WIDTH 2
#define XCVR_AGC_CTRL_0_FREEZE_AGC_SRC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_FREEZE_AGC_SRC_SHIFT))&XCVR_AGC_CTRL_0_FREEZE_AGC_SRC_MASK)
#define XCVR_AGC_CTRL_0_AGC_UP_EN_MASK 0x40u
#define XCVR_AGC_CTRL_0_AGC_UP_EN_SHIFT 6
#define XCVR_AGC_CTRL_0_AGC_UP_EN_WIDTH 1
#define XCVR_AGC_CTRL_0_AGC_UP_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_UP_EN_SHIFT))&XCVR_AGC_CTRL_0_AGC_UP_EN_MASK)
#define XCVR_AGC_CTRL_0_AGC_UP_SRC_MASK 0x80u
#define XCVR_AGC_CTRL_0_AGC_UP_SRC_SHIFT 7
#define XCVR_AGC_CTRL_0_AGC_UP_SRC_WIDTH 1
#define XCVR_AGC_CTRL_0_AGC_UP_SRC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_UP_SRC_SHIFT))&XCVR_AGC_CTRL_0_AGC_UP_SRC_MASK)
#define XCVR_AGC_CTRL_0_AGC_DOWN_BBF_STEP_SZ_MASK 0xF00u
#define XCVR_AGC_CTRL_0_AGC_DOWN_BBF_STEP_SZ_SHIFT 8
#define XCVR_AGC_CTRL_0_AGC_DOWN_BBF_STEP_SZ_WIDTH 4
#define XCVR_AGC_CTRL_0_AGC_DOWN_BBF_STEP_SZ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_DOWN_BBF_STEP_SZ_SHIFT))&XCVR_AGC_CTRL_0_AGC_DOWN_BBF_STEP_SZ_MASK)
#define XCVR_AGC_CTRL_0_AGC_DOWN_TZA_STEP_SZ_MASK 0xF000u
#define XCVR_AGC_CTRL_0_AGC_DOWN_TZA_STEP_SZ_SHIFT 12
#define XCVR_AGC_CTRL_0_AGC_DOWN_TZA_STEP_SZ_WIDTH 4
#define XCVR_AGC_CTRL_0_AGC_DOWN_TZA_STEP_SZ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_DOWN_TZA_STEP_SZ_SHIFT))&XCVR_AGC_CTRL_0_AGC_DOWN_TZA_STEP_SZ_MASK)
#define XCVR_AGC_CTRL_0_AGC_UP_RSSI_THRESH_MASK 0xFF0000u
#define XCVR_AGC_CTRL_0_AGC_UP_RSSI_THRESH_SHIFT 16
#define XCVR_AGC_CTRL_0_AGC_UP_RSSI_THRESH_WIDTH 8
#define XCVR_AGC_CTRL_0_AGC_UP_RSSI_THRESH(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_UP_RSSI_THRESH_SHIFT))&XCVR_AGC_CTRL_0_AGC_UP_RSSI_THRESH_MASK)
#define XCVR_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH_MASK 0xFF000000u
#define XCVR_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH_SHIFT 24
#define XCVR_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH_WIDTH 8
#define XCVR_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH_SHIFT))&XCVR_AGC_CTRL_0_AGC_DOWN_RSSI_THRESH_MASK)
/* AGC_CTRL_1 Bit Fields */
#define XCVR_AGC_CTRL_1_BBF_ALT_CODE_MASK 0xFu
#define XCVR_AGC_CTRL_1_BBF_ALT_CODE_SHIFT 0
#define XCVR_AGC_CTRL_1_BBF_ALT_CODE_WIDTH 4
#define XCVR_AGC_CTRL_1_BBF_ALT_CODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_BBF_ALT_CODE_SHIFT))&XCVR_AGC_CTRL_1_BBF_ALT_CODE_MASK)
#define XCVR_AGC_CTRL_1_LNM_ALT_CODE_MASK 0xFF0u
#define XCVR_AGC_CTRL_1_LNM_ALT_CODE_SHIFT 4
#define XCVR_AGC_CTRL_1_LNM_ALT_CODE_WIDTH 8
#define XCVR_AGC_CTRL_1_LNM_ALT_CODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_LNM_ALT_CODE_SHIFT))&XCVR_AGC_CTRL_1_LNM_ALT_CODE_MASK)
#define XCVR_AGC_CTRL_1_LNM_USER_GAIN_MASK 0xF000u
#define XCVR_AGC_CTRL_1_LNM_USER_GAIN_SHIFT 12
#define XCVR_AGC_CTRL_1_LNM_USER_GAIN_WIDTH 4
#define XCVR_AGC_CTRL_1_LNM_USER_GAIN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_LNM_USER_GAIN_SHIFT))&XCVR_AGC_CTRL_1_LNM_USER_GAIN_MASK)
#define XCVR_AGC_CTRL_1_BBF_USER_GAIN_MASK 0xF0000u
#define XCVR_AGC_CTRL_1_BBF_USER_GAIN_SHIFT 16
#define XCVR_AGC_CTRL_1_BBF_USER_GAIN_WIDTH 4
#define XCVR_AGC_CTRL_1_BBF_USER_GAIN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_BBF_USER_GAIN_SHIFT))&XCVR_AGC_CTRL_1_BBF_USER_GAIN_MASK)
#define XCVR_AGC_CTRL_1_USER_LNM_GAIN_EN_MASK 0x100000u
#define XCVR_AGC_CTRL_1_USER_LNM_GAIN_EN_SHIFT 20
#define XCVR_AGC_CTRL_1_USER_LNM_GAIN_EN_WIDTH 1
#define XCVR_AGC_CTRL_1_USER_LNM_GAIN_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_USER_LNM_GAIN_EN_SHIFT))&XCVR_AGC_CTRL_1_USER_LNM_GAIN_EN_MASK)
#define XCVR_AGC_CTRL_1_USER_BBF_GAIN_EN_MASK 0x200000u
#define XCVR_AGC_CTRL_1_USER_BBF_GAIN_EN_SHIFT 21
#define XCVR_AGC_CTRL_1_USER_BBF_GAIN_EN_WIDTH 1
#define XCVR_AGC_CTRL_1_USER_BBF_GAIN_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_USER_BBF_GAIN_EN_SHIFT))&XCVR_AGC_CTRL_1_USER_BBF_GAIN_EN_MASK)
#define XCVR_AGC_CTRL_1_PRESLOW_EN_MASK 0x400000u
#define XCVR_AGC_CTRL_1_PRESLOW_EN_SHIFT 22
#define XCVR_AGC_CTRL_1_PRESLOW_EN_WIDTH 1
#define XCVR_AGC_CTRL_1_PRESLOW_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_PRESLOW_EN_SHIFT))&XCVR_AGC_CTRL_1_PRESLOW_EN_MASK)
#define XCVR_AGC_CTRL_1_TZA_GAIN_SETTLE_TIME_MASK 0xFF000000u
#define XCVR_AGC_CTRL_1_TZA_GAIN_SETTLE_TIME_SHIFT 24
#define XCVR_AGC_CTRL_1_TZA_GAIN_SETTLE_TIME_WIDTH 8
#define XCVR_AGC_CTRL_1_TZA_GAIN_SETTLE_TIME(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_1_TZA_GAIN_SETTLE_TIME_SHIFT))&XCVR_AGC_CTRL_1_TZA_GAIN_SETTLE_TIME_MASK)
/* AGC_CTRL_2 Bit Fields */
#define XCVR_AGC_CTRL_2_BBF_PDET_RST_MASK 0x1u
#define XCVR_AGC_CTRL_2_BBF_PDET_RST_SHIFT 0
#define XCVR_AGC_CTRL_2_BBF_PDET_RST_WIDTH 1
#define XCVR_AGC_CTRL_2_BBF_PDET_RST(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_BBF_PDET_RST_SHIFT))&XCVR_AGC_CTRL_2_BBF_PDET_RST_MASK)
#define XCVR_AGC_CTRL_2_TZA_PDET_RST_MASK 0x2u
#define XCVR_AGC_CTRL_2_TZA_PDET_RST_SHIFT 1
#define XCVR_AGC_CTRL_2_TZA_PDET_RST_WIDTH 1
#define XCVR_AGC_CTRL_2_TZA_PDET_RST(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_TZA_PDET_RST_SHIFT))&XCVR_AGC_CTRL_2_TZA_PDET_RST_MASK)
#define XCVR_AGC_CTRL_2_BBF_GAIN_SETTLE_TIME_MASK 0xFF0u
#define XCVR_AGC_CTRL_2_BBF_GAIN_SETTLE_TIME_SHIFT 4
#define XCVR_AGC_CTRL_2_BBF_GAIN_SETTLE_TIME_WIDTH 8
#define XCVR_AGC_CTRL_2_BBF_GAIN_SETTLE_TIME(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_BBF_GAIN_SETTLE_TIME_SHIFT))&XCVR_AGC_CTRL_2_BBF_GAIN_SETTLE_TIME_MASK)
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_LO_MASK 0x7000u
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_LO_SHIFT 12
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_LO_WIDTH 3
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_BBF_PDET_THRESH_LO_SHIFT))&XCVR_AGC_CTRL_2_BBF_PDET_THRESH_LO_MASK)
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_HI_MASK 0x38000u
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_HI_SHIFT 15
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_HI_WIDTH 3
#define XCVR_AGC_CTRL_2_BBF_PDET_THRESH_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_BBF_PDET_THRESH_HI_SHIFT))&XCVR_AGC_CTRL_2_BBF_PDET_THRESH_HI_MASK)
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_LO_MASK 0x1C0000u
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_LO_SHIFT 18
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_LO_WIDTH 3
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_TZA_PDET_THRESH_LO_SHIFT))&XCVR_AGC_CTRL_2_TZA_PDET_THRESH_LO_MASK)
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_HI_MASK 0xE00000u
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_HI_SHIFT 21
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_HI_WIDTH 3
#define XCVR_AGC_CTRL_2_TZA_PDET_THRESH_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_TZA_PDET_THRESH_HI_SHIFT))&XCVR_AGC_CTRL_2_TZA_PDET_THRESH_HI_MASK)
#define XCVR_AGC_CTRL_2_AGC_FAST_EXPIRE_MASK 0x3F000000u
#define XCVR_AGC_CTRL_2_AGC_FAST_EXPIRE_SHIFT 24
#define XCVR_AGC_CTRL_2_AGC_FAST_EXPIRE_WIDTH 6
#define XCVR_AGC_CTRL_2_AGC_FAST_EXPIRE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_2_AGC_FAST_EXPIRE_SHIFT))&XCVR_AGC_CTRL_2_AGC_FAST_EXPIRE_MASK)
/* AGC_CTRL_3 Bit Fields */
#define XCVR_AGC_CTRL_3_AGC_UNFREEZE_TIME_MASK 0x1FFFu
#define XCVR_AGC_CTRL_3_AGC_UNFREEZE_TIME_SHIFT 0
#define XCVR_AGC_CTRL_3_AGC_UNFREEZE_TIME_WIDTH 13
#define XCVR_AGC_CTRL_3_AGC_UNFREEZE_TIME(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_3_AGC_UNFREEZE_TIME_SHIFT))&XCVR_AGC_CTRL_3_AGC_UNFREEZE_TIME_MASK)
#define XCVR_AGC_CTRL_3_AGC_PDET_LO_DLY_MASK 0xE000u
#define XCVR_AGC_CTRL_3_AGC_PDET_LO_DLY_SHIFT 13
#define XCVR_AGC_CTRL_3_AGC_PDET_LO_DLY_WIDTH 3
#define XCVR_AGC_CTRL_3_AGC_PDET_LO_DLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_3_AGC_PDET_LO_DLY_SHIFT))&XCVR_AGC_CTRL_3_AGC_PDET_LO_DLY_MASK)
#define XCVR_AGC_CTRL_3_AGC_RSSI_DELT_H2S_MASK 0x7F0000u
#define XCVR_AGC_CTRL_3_AGC_RSSI_DELT_H2S_SHIFT 16
#define XCVR_AGC_CTRL_3_AGC_RSSI_DELT_H2S_WIDTH 7
#define XCVR_AGC_CTRL_3_AGC_RSSI_DELT_H2S(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_3_AGC_RSSI_DELT_H2S_SHIFT))&XCVR_AGC_CTRL_3_AGC_RSSI_DELT_H2S_MASK)
#define XCVR_AGC_CTRL_3_AGC_H2S_STEP_SZ_MASK 0xF800000u
#define XCVR_AGC_CTRL_3_AGC_H2S_STEP_SZ_SHIFT 23
#define XCVR_AGC_CTRL_3_AGC_H2S_STEP_SZ_WIDTH 5
#define XCVR_AGC_CTRL_3_AGC_H2S_STEP_SZ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_3_AGC_H2S_STEP_SZ_SHIFT))&XCVR_AGC_CTRL_3_AGC_H2S_STEP_SZ_MASK)
#define XCVR_AGC_CTRL_3_AGC_UP_STEP_SZ_MASK 0xF0000000u
#define XCVR_AGC_CTRL_3_AGC_UP_STEP_SZ_SHIFT 28
#define XCVR_AGC_CTRL_3_AGC_UP_STEP_SZ_WIDTH 4
#define XCVR_AGC_CTRL_3_AGC_UP_STEP_SZ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_CTRL_3_AGC_UP_STEP_SZ_SHIFT))&XCVR_AGC_CTRL_3_AGC_UP_STEP_SZ_MASK)
/* AGC_STAT Bit Fields */
#define XCVR_AGC_STAT_BBF_PDET_LO_STAT_MASK 0x1u
#define XCVR_AGC_STAT_BBF_PDET_LO_STAT_SHIFT 0
#define XCVR_AGC_STAT_BBF_PDET_LO_STAT_WIDTH 1
#define XCVR_AGC_STAT_BBF_PDET_LO_STAT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_BBF_PDET_LO_STAT_SHIFT))&XCVR_AGC_STAT_BBF_PDET_LO_STAT_MASK)
#define XCVR_AGC_STAT_BBF_PDET_HI_STAT_MASK 0x2u
#define XCVR_AGC_STAT_BBF_PDET_HI_STAT_SHIFT 1
#define XCVR_AGC_STAT_BBF_PDET_HI_STAT_WIDTH 1
#define XCVR_AGC_STAT_BBF_PDET_HI_STAT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_BBF_PDET_HI_STAT_SHIFT))&XCVR_AGC_STAT_BBF_PDET_HI_STAT_MASK)
#define XCVR_AGC_STAT_TZA_PDET_LO_STAT_MASK 0x4u
#define XCVR_AGC_STAT_TZA_PDET_LO_STAT_SHIFT 2
#define XCVR_AGC_STAT_TZA_PDET_LO_STAT_WIDTH 1
#define XCVR_AGC_STAT_TZA_PDET_LO_STAT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_TZA_PDET_LO_STAT_SHIFT))&XCVR_AGC_STAT_TZA_PDET_LO_STAT_MASK)
#define XCVR_AGC_STAT_TZA_PDET_HI_STAT_MASK 0x8u
#define XCVR_AGC_STAT_TZA_PDET_HI_STAT_SHIFT 3
#define XCVR_AGC_STAT_TZA_PDET_HI_STAT_WIDTH 1
#define XCVR_AGC_STAT_TZA_PDET_HI_STAT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_TZA_PDET_HI_STAT_SHIFT))&XCVR_AGC_STAT_TZA_PDET_HI_STAT_MASK)
#define XCVR_AGC_STAT_CURR_AGC_IDX_MASK 0x1F0u
#define XCVR_AGC_STAT_CURR_AGC_IDX_SHIFT 4
#define XCVR_AGC_STAT_CURR_AGC_IDX_WIDTH 5
#define XCVR_AGC_STAT_CURR_AGC_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_CURR_AGC_IDX_SHIFT))&XCVR_AGC_STAT_CURR_AGC_IDX_MASK)
#define XCVR_AGC_STAT_AGC_FROZEN_MASK 0x200u
#define XCVR_AGC_STAT_AGC_FROZEN_SHIFT 9
#define XCVR_AGC_STAT_AGC_FROZEN_WIDTH 1
#define XCVR_AGC_STAT_AGC_FROZEN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_AGC_FROZEN_SHIFT))&XCVR_AGC_STAT_AGC_FROZEN_MASK)
#define XCVR_AGC_STAT_RSSI_ADC_RAW_MASK 0xFF0000u
#define XCVR_AGC_STAT_RSSI_ADC_RAW_SHIFT 16
#define XCVR_AGC_STAT_RSSI_ADC_RAW_WIDTH 8
#define XCVR_AGC_STAT_RSSI_ADC_RAW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_STAT_RSSI_ADC_RAW_SHIFT))&XCVR_AGC_STAT_RSSI_ADC_RAW_MASK)
/* RSSI_CTRL_0 Bit Fields */
#define XCVR_RSSI_CTRL_0_RSSI_USE_VALS_MASK 0x1u
#define XCVR_RSSI_CTRL_0_RSSI_USE_VALS_SHIFT 0
#define XCVR_RSSI_CTRL_0_RSSI_USE_VALS_WIDTH 1
#define XCVR_RSSI_CTRL_0_RSSI_USE_VALS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_USE_VALS_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_USE_VALS_MASK)
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_SRC_MASK 0x6u
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_SRC_SHIFT 1
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_SRC_WIDTH 2
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_SRC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_HOLD_SRC_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_HOLD_SRC_MASK)
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_EN_MASK 0x8u
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_EN_SHIFT 3
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_EN_WIDTH 1
#define XCVR_RSSI_CTRL_0_RSSI_HOLD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_HOLD_EN_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_HOLD_EN_MASK)
#define XCVR_RSSI_CTRL_0_RSSI_DEC_EN_MASK 0x10u
#define XCVR_RSSI_CTRL_0_RSSI_DEC_EN_SHIFT 4
#define XCVR_RSSI_CTRL_0_RSSI_DEC_EN_WIDTH 1
#define XCVR_RSSI_CTRL_0_RSSI_DEC_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_DEC_EN_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_DEC_EN_MASK)
#define XCVR_RSSI_CTRL_0_RSSI_IIR_CW_WEIGHT_MASK 0x60u
#define XCVR_RSSI_CTRL_0_RSSI_IIR_CW_WEIGHT_SHIFT 5
#define XCVR_RSSI_CTRL_0_RSSI_IIR_CW_WEIGHT_WIDTH 2
#define XCVR_RSSI_CTRL_0_RSSI_IIR_CW_WEIGHT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_IIR_CW_WEIGHT_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_IIR_CW_WEIGHT_MASK)
#define XCVR_RSSI_CTRL_0_RSSI_IIR_WEIGHT_MASK 0xF0000u
#define XCVR_RSSI_CTRL_0_RSSI_IIR_WEIGHT_SHIFT 16
#define XCVR_RSSI_CTRL_0_RSSI_IIR_WEIGHT_WIDTH 4
#define XCVR_RSSI_CTRL_0_RSSI_IIR_WEIGHT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_IIR_WEIGHT_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_IIR_WEIGHT_MASK)
#define XCVR_RSSI_CTRL_0_RSSI_ADJ_MASK 0xFF000000u
#define XCVR_RSSI_CTRL_0_RSSI_ADJ_SHIFT 24
#define XCVR_RSSI_CTRL_0_RSSI_ADJ_WIDTH 8
#define XCVR_RSSI_CTRL_0_RSSI_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_0_RSSI_ADJ_SHIFT))&XCVR_RSSI_CTRL_0_RSSI_ADJ_MASK)
/* RSSI_CTRL_1 Bit Fields */
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_MASK 0xFFu
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_SHIFT 0
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_WIDTH 8
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_SHIFT))&XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_MASK)
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_MASK 0xFF00u
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_SHIFT 8
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_WIDTH 8
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_SHIFT))&XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_MASK)
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_H_MASK 0xF0000u
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_H_SHIFT 16
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_H_WIDTH 4
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_H(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_H_SHIFT))&XCVR_RSSI_CTRL_1_RSSI_ED_THRESH0_H_MASK)
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_H_MASK 0xF00000u
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_H_SHIFT 20
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_H_WIDTH 4
#define XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_H(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_H_SHIFT))&XCVR_RSSI_CTRL_1_RSSI_ED_THRESH1_H_MASK)
#define XCVR_RSSI_CTRL_1_RSSI_OUT_MASK 0xFF000000u
#define XCVR_RSSI_CTRL_1_RSSI_OUT_SHIFT 24
#define XCVR_RSSI_CTRL_1_RSSI_OUT_WIDTH 8
#define XCVR_RSSI_CTRL_1_RSSI_OUT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RSSI_CTRL_1_RSSI_OUT_SHIFT))&XCVR_RSSI_CTRL_1_RSSI_OUT_MASK)
/* DCOC_CTRL_0 Bit Fields */
#define XCVR_DCOC_CTRL_0_DCOC_MAN_MASK 0x2u
#define XCVR_DCOC_CTRL_0_DCOC_MAN_SHIFT 1
#define XCVR_DCOC_CTRL_0_DCOC_MAN_WIDTH 1
#define XCVR_DCOC_CTRL_0_DCOC_MAN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_MAN_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_MAN_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_TRACK_EN_MASK 0x8u
#define XCVR_DCOC_CTRL_0_DCOC_TRACK_EN_SHIFT 3
#define XCVR_DCOC_CTRL_0_DCOC_TRACK_EN_WIDTH 1
#define XCVR_DCOC_CTRL_0_DCOC_TRACK_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_TRACK_EN_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_TRACK_EN_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_CORRECT_EN_MASK 0x10u
#define XCVR_DCOC_CTRL_0_DCOC_CORRECT_EN_SHIFT 4
#define XCVR_DCOC_CTRL_0_DCOC_CORRECT_EN_WIDTH 1
#define XCVR_DCOC_CTRL_0_DCOC_CORRECT_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_CORRECT_EN_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_CORRECT_EN_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_SIGN_SCALE_IDX_MASK 0x60u
#define XCVR_DCOC_CTRL_0_DCOC_SIGN_SCALE_IDX_SHIFT 5
#define XCVR_DCOC_CTRL_0_DCOC_SIGN_SCALE_IDX_WIDTH 2
#define XCVR_DCOC_CTRL_0_DCOC_SIGN_SCALE_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_SIGN_SCALE_IDX_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_SIGN_SCALE_IDX_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_ALPHAC_SCALE_IDX_MASK 0x300u
#define XCVR_DCOC_CTRL_0_DCOC_ALPHAC_SCALE_IDX_SHIFT 8
#define XCVR_DCOC_CTRL_0_DCOC_ALPHAC_SCALE_IDX_WIDTH 2
#define XCVR_DCOC_CTRL_0_DCOC_ALPHAC_SCALE_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_ALPHAC_SCALE_IDX_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_ALPHAC_SCALE_IDX_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_ALPHA_RADIUS_IDX_MASK 0x7000u
#define XCVR_DCOC_CTRL_0_DCOC_ALPHA_RADIUS_IDX_SHIFT 12
#define XCVR_DCOC_CTRL_0_DCOC_ALPHA_RADIUS_IDX_WIDTH 3
#define XCVR_DCOC_CTRL_0_DCOC_ALPHA_RADIUS_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_ALPHA_RADIUS_IDX_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_ALPHA_RADIUS_IDX_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_CAL_DURATION_MASK 0xF8000u
#define XCVR_DCOC_CTRL_0_DCOC_CAL_DURATION_SHIFT 15
#define XCVR_DCOC_CTRL_0_DCOC_CAL_DURATION_WIDTH 5
#define XCVR_DCOC_CTRL_0_DCOC_CAL_DURATION(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_CAL_DURATION_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_CAL_DURATION_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_CORR_DLY_MASK 0x1F00000u
#define XCVR_DCOC_CTRL_0_DCOC_CORR_DLY_SHIFT 20
#define XCVR_DCOC_CTRL_0_DCOC_CORR_DLY_WIDTH 5
#define XCVR_DCOC_CTRL_0_DCOC_CORR_DLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_CORR_DLY_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_CORR_DLY_MASK)
#define XCVR_DCOC_CTRL_0_DCOC_CORR_HOLD_TIME_MASK 0xFE000000u
#define XCVR_DCOC_CTRL_0_DCOC_CORR_HOLD_TIME_SHIFT 25
#define XCVR_DCOC_CTRL_0_DCOC_CORR_HOLD_TIME_WIDTH 7
#define XCVR_DCOC_CTRL_0_DCOC_CORR_HOLD_TIME(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_0_DCOC_CORR_HOLD_TIME_SHIFT))&XCVR_DCOC_CTRL_0_DCOC_CORR_HOLD_TIME_MASK)
/* DCOC_CTRL_1 Bit Fields */
#define XCVR_DCOC_CTRL_1_BBF_DCOC_STEP_MASK 0x1FFu
#define XCVR_DCOC_CTRL_1_BBF_DCOC_STEP_SHIFT 0
#define XCVR_DCOC_CTRL_1_BBF_DCOC_STEP_WIDTH 9
#define XCVR_DCOC_CTRL_1_BBF_DCOC_STEP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_1_BBF_DCOC_STEP_SHIFT))&XCVR_DCOC_CTRL_1_BBF_DCOC_STEP_MASK)
#define XCVR_DCOC_CTRL_1_TRACK_FROM_ZERO_MASK 0x1000000u
#define XCVR_DCOC_CTRL_1_TRACK_FROM_ZERO_SHIFT 24
#define XCVR_DCOC_CTRL_1_TRACK_FROM_ZERO_WIDTH 1
#define XCVR_DCOC_CTRL_1_TRACK_FROM_ZERO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_1_TRACK_FROM_ZERO_SHIFT))&XCVR_DCOC_CTRL_1_TRACK_FROM_ZERO_MASK)
#define XCVR_DCOC_CTRL_1_BBA_CORR_POL_MASK 0x2000000u
#define XCVR_DCOC_CTRL_1_BBA_CORR_POL_SHIFT 25
#define XCVR_DCOC_CTRL_1_BBA_CORR_POL_WIDTH 1
#define XCVR_DCOC_CTRL_1_BBA_CORR_POL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_1_BBA_CORR_POL_SHIFT))&XCVR_DCOC_CTRL_1_BBA_CORR_POL_MASK)
#define XCVR_DCOC_CTRL_1_TZA_CORR_POL_MASK 0x4000000u
#define XCVR_DCOC_CTRL_1_TZA_CORR_POL_SHIFT 26
#define XCVR_DCOC_CTRL_1_TZA_CORR_POL_WIDTH 1
#define XCVR_DCOC_CTRL_1_TZA_CORR_POL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_1_TZA_CORR_POL_SHIFT))&XCVR_DCOC_CTRL_1_TZA_CORR_POL_MASK)
/* DCOC_CTRL_2 Bit Fields */
#define XCVR_DCOC_CTRL_2_BBF_DCOC_STEP_RECIP_MASK 0x1FFFu
#define XCVR_DCOC_CTRL_2_BBF_DCOC_STEP_RECIP_SHIFT 0
#define XCVR_DCOC_CTRL_2_BBF_DCOC_STEP_RECIP_WIDTH 13
#define XCVR_DCOC_CTRL_2_BBF_DCOC_STEP_RECIP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_2_BBF_DCOC_STEP_RECIP_SHIFT))&XCVR_DCOC_CTRL_2_BBF_DCOC_STEP_RECIP_MASK)
/* DCOC_CTRL_3 Bit Fields */
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_I_MASK 0x3Fu
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_I_SHIFT 0
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_I_WIDTH 6
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_I_SHIFT))&XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_I_MASK)
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_Q_MASK 0x3F00u
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_Q_SHIFT 8
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_Q_WIDTH 6
#define XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_Q_SHIFT))&XCVR_DCOC_CTRL_3_BBF_DCOC_INIT_Q_MASK)
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_I_MASK 0xFF0000u
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_I_SHIFT 16
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_I_WIDTH 8
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_I_SHIFT))&XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_I_MASK)
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_Q_MASK 0xFF000000u
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_Q_SHIFT 24
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_Q_WIDTH 8
#define XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_Q_SHIFT))&XCVR_DCOC_CTRL_3_TZA_DCOC_INIT_Q_MASK)
/* DCOC_CTRL_4 Bit Fields */
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_I_MASK 0xFFFu
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_I_SHIFT 0
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_I_WIDTH 12
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_I_SHIFT))&XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_I_MASK)
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_Q_MASK 0xFFF0000u
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_Q_SHIFT 16
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_Q_WIDTH 12
#define XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_Q_SHIFT))&XCVR_DCOC_CTRL_4_DIG_DCOC_INIT_Q_MASK)
/* DCOC_CAL_GAIN Bit Fields */
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN1_MASK 0xF00u
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN1_SHIFT 8
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN1_WIDTH 4
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN1_SHIFT))&XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN1_MASK)
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN1_MASK 0xF000u
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN1_SHIFT 12
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN1_WIDTH 4
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN1_SHIFT))&XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN1_MASK)
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN2_MASK 0xF0000u
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN2_SHIFT 16
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN2_WIDTH 4
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN2_SHIFT))&XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN2_MASK)
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN2_MASK 0xF00000u
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN2_SHIFT 20
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN2_WIDTH 4
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN2_SHIFT))&XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN2_MASK)
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN3_MASK 0xF000000u
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN3_SHIFT 24
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN3_WIDTH 4
#define XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN3_SHIFT))&XCVR_DCOC_CAL_GAIN_DCOC_BBF_CAL_GAIN3_MASK)
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN3_MASK 0xF0000000u
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN3_SHIFT 28
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN3_WIDTH 4
#define XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN3_SHIFT))&XCVR_DCOC_CAL_GAIN_DCOC_TZA_CAL_GAIN3_MASK)
/* DCOC_STAT Bit Fields */
#define XCVR_DCOC_STAT_BBF_DCOC_I_MASK 0x3Fu
#define XCVR_DCOC_STAT_BBF_DCOC_I_SHIFT 0
#define XCVR_DCOC_STAT_BBF_DCOC_I_WIDTH 6
#define XCVR_DCOC_STAT_BBF_DCOC_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_STAT_BBF_DCOC_I_SHIFT))&XCVR_DCOC_STAT_BBF_DCOC_I_MASK)
#define XCVR_DCOC_STAT_BBF_DCOC_Q_MASK 0x3F00u
#define XCVR_DCOC_STAT_BBF_DCOC_Q_SHIFT 8
#define XCVR_DCOC_STAT_BBF_DCOC_Q_WIDTH 6
#define XCVR_DCOC_STAT_BBF_DCOC_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_STAT_BBF_DCOC_Q_SHIFT))&XCVR_DCOC_STAT_BBF_DCOC_Q_MASK)
#define XCVR_DCOC_STAT_TZA_DCOC_I_MASK 0xFF0000u
#define XCVR_DCOC_STAT_TZA_DCOC_I_SHIFT 16
#define XCVR_DCOC_STAT_TZA_DCOC_I_WIDTH 8
#define XCVR_DCOC_STAT_TZA_DCOC_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_STAT_TZA_DCOC_I_SHIFT))&XCVR_DCOC_STAT_TZA_DCOC_I_MASK)
#define XCVR_DCOC_STAT_TZA_DCOC_Q_MASK 0xFF000000u
#define XCVR_DCOC_STAT_TZA_DCOC_Q_SHIFT 24
#define XCVR_DCOC_STAT_TZA_DCOC_Q_WIDTH 8
#define XCVR_DCOC_STAT_TZA_DCOC_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_STAT_TZA_DCOC_Q_SHIFT))&XCVR_DCOC_STAT_TZA_DCOC_Q_MASK)
/* DCOC_DC_EST Bit Fields */
#define XCVR_DCOC_DC_EST_DC_EST_I_MASK 0xFFFu
#define XCVR_DCOC_DC_EST_DC_EST_I_SHIFT 0
#define XCVR_DCOC_DC_EST_DC_EST_I_WIDTH 12
#define XCVR_DCOC_DC_EST_DC_EST_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_DC_EST_DC_EST_I_SHIFT))&XCVR_DCOC_DC_EST_DC_EST_I_MASK)
#define XCVR_DCOC_DC_EST_DC_EST_Q_MASK 0xFFF0000u
#define XCVR_DCOC_DC_EST_DC_EST_Q_SHIFT 16
#define XCVR_DCOC_DC_EST_DC_EST_Q_WIDTH 12
#define XCVR_DCOC_DC_EST_DC_EST_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_DC_EST_DC_EST_Q_SHIFT))&XCVR_DCOC_DC_EST_DC_EST_Q_MASK)
/* DCOC_CAL_RCP Bit Fields */
#define XCVR_DCOC_CAL_RCP_DCOC_TMP_CALC_RECIP_MASK 0x3FFu
#define XCVR_DCOC_CAL_RCP_DCOC_TMP_CALC_RECIP_SHIFT 0
#define XCVR_DCOC_CAL_RCP_DCOC_TMP_CALC_RECIP_WIDTH 10
#define XCVR_DCOC_CAL_RCP_DCOC_TMP_CALC_RECIP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_RCP_DCOC_TMP_CALC_RECIP_SHIFT))&XCVR_DCOC_CAL_RCP_DCOC_TMP_CALC_RECIP_MASK)
#define XCVR_DCOC_CAL_RCP_ALPHA_CALC_RECIP_MASK 0x1FFC00u
#define XCVR_DCOC_CAL_RCP_ALPHA_CALC_RECIP_SHIFT 10
#define XCVR_DCOC_CAL_RCP_ALPHA_CALC_RECIP_WIDTH 11
#define XCVR_DCOC_CAL_RCP_ALPHA_CALC_RECIP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_RCP_ALPHA_CALC_RECIP_SHIFT))&XCVR_DCOC_CAL_RCP_ALPHA_CALC_RECIP_MASK)
/* IQMC_CTRL Bit Fields */
#define XCVR_IQMC_CTRL_IQMC_CAL_EN_MASK 0x1u
#define XCVR_IQMC_CTRL_IQMC_CAL_EN_SHIFT 0
#define XCVR_IQMC_CTRL_IQMC_CAL_EN_WIDTH 1
#define XCVR_IQMC_CTRL_IQMC_CAL_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_IQMC_CTRL_IQMC_CAL_EN_SHIFT))&XCVR_IQMC_CTRL_IQMC_CAL_EN_MASK)
#define XCVR_IQMC_CTRL_IQMC_NUM_ITER_MASK 0xFF00u
#define XCVR_IQMC_CTRL_IQMC_NUM_ITER_SHIFT 8
#define XCVR_IQMC_CTRL_IQMC_NUM_ITER_WIDTH 8
#define XCVR_IQMC_CTRL_IQMC_NUM_ITER(x) (((uint32_t)(((uint32_t)(x))<<XCVR_IQMC_CTRL_IQMC_NUM_ITER_SHIFT))&XCVR_IQMC_CTRL_IQMC_NUM_ITER_MASK)
/* IQMC_CAL Bit Fields */
#define XCVR_IQMC_CAL_IQMC_GAIN_ADJ_MASK 0x7FFu
#define XCVR_IQMC_CAL_IQMC_GAIN_ADJ_SHIFT 0
#define XCVR_IQMC_CAL_IQMC_GAIN_ADJ_WIDTH 11
#define XCVR_IQMC_CAL_IQMC_GAIN_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_IQMC_CAL_IQMC_GAIN_ADJ_SHIFT))&XCVR_IQMC_CAL_IQMC_GAIN_ADJ_MASK)
#define XCVR_IQMC_CAL_IQMC_PHASE_ADJ_MASK 0xFFF0000u
#define XCVR_IQMC_CAL_IQMC_PHASE_ADJ_SHIFT 16
#define XCVR_IQMC_CAL_IQMC_PHASE_ADJ_WIDTH 12
#define XCVR_IQMC_CAL_IQMC_PHASE_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_IQMC_CAL_IQMC_PHASE_ADJ_SHIFT))&XCVR_IQMC_CAL_IQMC_PHASE_ADJ_MASK)
/* TCA_AGC_VAL_3_0 Bit Fields */
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_0_MASK 0xFFu
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_0_SHIFT 0
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_0_WIDTH 8
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_0_SHIFT))&XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_0_MASK)
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_1_MASK 0xFF00u
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_1_SHIFT 8
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_1_WIDTH 8
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_1_SHIFT))&XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_1_MASK)
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_2_MASK 0xFF0000u
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_2_SHIFT 16
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_2_WIDTH 8
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_2_SHIFT))&XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_2_MASK)
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_3_MASK 0xFF000000u
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_3_SHIFT 24
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_3_WIDTH 8
#define XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_3_SHIFT))&XCVR_TCA_AGC_VAL_3_0_TCA_AGC_VAL_3_MASK)
/* TCA_AGC_VAL_7_4 Bit Fields */
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_4_MASK 0xFFu
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_4_SHIFT 0
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_4_WIDTH 8
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_4(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_4_SHIFT))&XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_4_MASK)
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_5_MASK 0xFF00u
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_5_SHIFT 8
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_5_WIDTH 8
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_5(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_5_SHIFT))&XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_5_MASK)
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_6_MASK 0xFF0000u
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_6_SHIFT 16
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_6_WIDTH 8
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_6(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_6_SHIFT))&XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_6_MASK)
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_7_MASK 0xFF000000u
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_7_SHIFT 24
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_7_WIDTH 8
#define XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_7(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_7_SHIFT))&XCVR_TCA_AGC_VAL_7_4_TCA_AGC_VAL_7_MASK)
/* TCA_AGC_VAL_8 Bit Fields */
#define XCVR_TCA_AGC_VAL_8_TCA_AGC_VAL_8_MASK 0xFFu
#define XCVR_TCA_AGC_VAL_8_TCA_AGC_VAL_8_SHIFT 0
#define XCVR_TCA_AGC_VAL_8_TCA_AGC_VAL_8_WIDTH 8
#define XCVR_TCA_AGC_VAL_8_TCA_AGC_VAL_8(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_VAL_8_TCA_AGC_VAL_8_SHIFT))&XCVR_TCA_AGC_VAL_8_TCA_AGC_VAL_8_MASK)
/* BBF_RES_TUNE_VAL_7_0 Bit Fields */
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_0_MASK 0xFu
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_0_SHIFT 0
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_0_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_0_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_0_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_1_MASK 0xF0u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_1_SHIFT 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_1_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_1_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_1_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_2_MASK 0xF00u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_2_SHIFT 8
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_2_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_2_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_2_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_3_MASK 0xF000u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_3_SHIFT 12
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_3_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_3_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_3_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_4_MASK 0xF0000u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_4_SHIFT 16
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_4_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_4(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_4_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_4_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_5_MASK 0xF00000u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_5_SHIFT 20
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_5_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_5(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_5_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_5_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_6_MASK 0xF000000u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_6_SHIFT 24
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_6_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_6(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_6_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_6_MASK)
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_7_MASK 0xF0000000u
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_7_SHIFT 28
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_7_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_7(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_7_SHIFT))&XCVR_BBF_RES_TUNE_VAL_7_0_BBF_RES_TUNE_VAL_7_MASK)
/* BBF_RES_TUNE_VAL_10_8 Bit Fields */
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_8_MASK 0xFu
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_8_SHIFT 0
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_8_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_8(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_8_SHIFT))&XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_8_MASK)
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_9_MASK 0xF0u
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_9_SHIFT 4
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_9_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_9(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_9_SHIFT))&XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_9_MASK)
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_10_MASK 0xF00u
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_10_SHIFT 8
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_10_WIDTH 4
#define XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_10(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_10_SHIFT))&XCVR_BBF_RES_TUNE_VAL_10_8_BBF_RES_TUNE_VAL_10_MASK)
/* TCA_AGC_LIN_VAL_2_0 Bit Fields */
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_0_MASK 0x3FFu
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_0_SHIFT 0
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_0_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_0_SHIFT))&XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_0_MASK)
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_1_MASK 0xFFC00u
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_1_SHIFT 10
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_1_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_1_SHIFT))&XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_1_MASK)
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_2_MASK 0x3FF00000u
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_2_SHIFT 20
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_2_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_2_SHIFT))&XCVR_TCA_AGC_LIN_VAL_2_0_TCA_AGC_LIN_VAL_2_MASK)
/* TCA_AGC_LIN_VAL_5_3 Bit Fields */
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_3_MASK 0x3FFu
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_3_SHIFT 0
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_3_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_3_SHIFT))&XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_3_MASK)
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_4_MASK 0xFFC00u
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_4_SHIFT 10
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_4_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_4(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_4_SHIFT))&XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_4_MASK)
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_5_MASK 0x3FF00000u
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_5_SHIFT 20
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_5_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_5(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_5_SHIFT))&XCVR_TCA_AGC_LIN_VAL_5_3_TCA_AGC_LIN_VAL_5_MASK)
/* TCA_AGC_LIN_VAL_8_6 Bit Fields */
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_6_MASK 0x3FFu
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_6_SHIFT 0
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_6_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_6(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_6_SHIFT))&XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_6_MASK)
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_7_MASK 0xFFC00u
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_7_SHIFT 10
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_7_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_7(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_7_SHIFT))&XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_7_MASK)
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_8_MASK 0x3FF00000u
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_8_SHIFT 20
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_8_WIDTH 10
#define XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_8(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_8_SHIFT))&XCVR_TCA_AGC_LIN_VAL_8_6_TCA_AGC_LIN_VAL_8_MASK)
/* BBF_RES_TUNE_LIN_VAL_3_0 Bit Fields */
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_0_MASK 0xFFu
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_0_SHIFT 0
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_0_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_0_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_0_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_1_MASK 0xFF00u
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_1_SHIFT 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_1_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_1_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_1_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_2_MASK 0xFF0000u
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_2_SHIFT 16
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_2_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_2_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_2_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_3_MASK 0xFF000000u
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_3_SHIFT 24
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_3_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_3_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_3_0_BBF_RES_TUNE_LIN_VAL_3_MASK)
/* BBF_RES_TUNE_LIN_VAL_7_4 Bit Fields */
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_4_MASK 0xFFu
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_4_SHIFT 0
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_4_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_4(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_4_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_4_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_5_MASK 0xFF00u
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_5_SHIFT 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_5_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_5(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_5_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_5_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_6_MASK 0xFF0000u
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_6_SHIFT 16
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_6_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_6(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_6_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_6_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_7_MASK 0xFF000000u
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_7_SHIFT 24
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_7_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_7(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_7_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_7_4_BBF_RES_TUNE_LIN_VAL_7_MASK)
/* BBF_RES_TUNE_LIN_VAL_10_8 Bit Fields */
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_8_MASK 0xFFu
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_8_SHIFT 0
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_8_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_8(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_8_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_8_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_9_MASK 0xFF00u
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_9_SHIFT 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_9_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_9(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_9_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_9_MASK)
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_10_MASK 0xFF0000u
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_10_SHIFT 16
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_10_WIDTH 8
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_10(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_10_SHIFT))&XCVR_BBF_RES_TUNE_LIN_VAL_10_8_BBF_RES_TUNE_LIN_VAL_10_MASK)
/* AGC_GAIN_TBL_03_00 Bit Fields */
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_00_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_00_SHIFT 0
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_00_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_00(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_00_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_00_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_00_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_00_SHIFT 4
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_00_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_00(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_00_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_00_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_01_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_01_SHIFT 8
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_01_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_01(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_01_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_01_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_01_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_01_SHIFT 12
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_01_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_01(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_01_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_01_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_02_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_02_SHIFT 16
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_02_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_02(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_02_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_02_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_02_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_02_SHIFT 20
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_02_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_02(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_02_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_02_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_03_MASK 0xF000000u
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_03_SHIFT 24
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_03_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_03(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_03_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_BBF_GAIN_03_MASK)
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_03_MASK 0xF0000000u
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_03_SHIFT 28
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_03_WIDTH 4
#define XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_03(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_03_SHIFT))&XCVR_AGC_GAIN_TBL_03_00_LNM_GAIN_03_MASK)
/* AGC_GAIN_TBL_07_04 Bit Fields */
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_04_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_04_SHIFT 0
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_04_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_04(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_04_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_04_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_04_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_04_SHIFT 4
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_04_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_04(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_04_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_04_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_05_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_05_SHIFT 8
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_05_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_05(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_05_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_05_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_05_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_05_SHIFT 12
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_05_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_05(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_05_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_05_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_06_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_06_SHIFT 16
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_06_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_06(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_06_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_06_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_06_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_06_SHIFT 20
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_06_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_06(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_06_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_06_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_07_MASK 0xF000000u
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_07_SHIFT 24
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_07_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_07(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_07_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_BBF_GAIN_07_MASK)
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_07_MASK 0xF0000000u
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_07_SHIFT 28
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_07_WIDTH 4
#define XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_07(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_07_SHIFT))&XCVR_AGC_GAIN_TBL_07_04_LNM_GAIN_07_MASK)
/* AGC_GAIN_TBL_11_08 Bit Fields */
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_08_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_08_SHIFT 0
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_08_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_08(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_08_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_08_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_08_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_08_SHIFT 4
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_08_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_08(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_08_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_08_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_09_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_09_SHIFT 8
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_09_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_09(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_09_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_09_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_09_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_09_SHIFT 12
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_09_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_09(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_09_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_09_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_10_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_10_SHIFT 16
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_10_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_10(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_10_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_10_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_10_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_10_SHIFT 20
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_10_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_10(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_10_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_10_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_11_MASK 0xF000000u
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_11_SHIFT 24
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_11_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_11(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_11_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_BBF_GAIN_11_MASK)
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_11_MASK 0xF0000000u
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_11_SHIFT 28
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_11_WIDTH 4
#define XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_11(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_11_SHIFT))&XCVR_AGC_GAIN_TBL_11_08_LNM_GAIN_11_MASK)
/* AGC_GAIN_TBL_15_12 Bit Fields */
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_12_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_12_SHIFT 0
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_12_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_12(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_12_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_12_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_12_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_12_SHIFT 4
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_12_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_12(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_12_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_12_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_13_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_13_SHIFT 8
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_13_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_13(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_13_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_13_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_13_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_13_SHIFT 12
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_13_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_13(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_13_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_13_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_14_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_14_SHIFT 16
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_14_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_14(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_14_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_14_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_14_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_14_SHIFT 20
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_14_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_14(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_14_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_14_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_15_MASK 0xF000000u
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_15_SHIFT 24
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_15_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_15(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_15_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_BBF_GAIN_15_MASK)
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_15_MASK 0xF0000000u
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_15_SHIFT 28
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_15_WIDTH 4
#define XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_15(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_15_SHIFT))&XCVR_AGC_GAIN_TBL_15_12_LNM_GAIN_15_MASK)
/* AGC_GAIN_TBL_19_16 Bit Fields */
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_16_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_16_SHIFT 0
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_16_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_16(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_16_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_16_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_16_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_16_SHIFT 4
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_16_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_16(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_16_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_16_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_17_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_17_SHIFT 8
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_17_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_17(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_17_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_17_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_17_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_17_SHIFT 12
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_17_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_17(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_17_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_17_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_18_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_18_SHIFT 16
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_18_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_18(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_18_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_18_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_18_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_18_SHIFT 20
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_18_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_18(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_18_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_18_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_19_MASK 0xF000000u
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_19_SHIFT 24
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_19_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_19(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_19_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_BBF_GAIN_19_MASK)
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_19_MASK 0xF0000000u
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_19_SHIFT 28
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_19_WIDTH 4
#define XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_19(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_19_SHIFT))&XCVR_AGC_GAIN_TBL_19_16_LNM_GAIN_19_MASK)
/* AGC_GAIN_TBL_23_20 Bit Fields */
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_20_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_20_SHIFT 0
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_20_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_20(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_20_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_20_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_20_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_20_SHIFT 4
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_20_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_20(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_20_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_20_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_21_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_21_SHIFT 8
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_21_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_21(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_21_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_21_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_21_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_21_SHIFT 12
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_21_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_21(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_21_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_21_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_22_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_22_SHIFT 16
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_22_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_22(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_22_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_22_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_22_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_22_SHIFT 20
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_22_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_22(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_22_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_22_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_23_MASK 0xF000000u
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_23_SHIFT 24
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_23_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_23(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_23_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_BBF_GAIN_23_MASK)
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_23_MASK 0xF0000000u
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_23_SHIFT 28
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_23_WIDTH 4
#define XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_23(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_23_SHIFT))&XCVR_AGC_GAIN_TBL_23_20_LNM_GAIN_23_MASK)
/* AGC_GAIN_TBL_26_24 Bit Fields */
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_24_MASK 0xFu
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_24_SHIFT 0
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_24_WIDTH 4
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_24(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_24_SHIFT))&XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_24_MASK)
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_24_MASK 0xF0u
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_24_SHIFT 4
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_24_WIDTH 4
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_24(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_24_SHIFT))&XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_24_MASK)
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_25_MASK 0xF00u
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_25_SHIFT 8
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_25_WIDTH 4
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_25(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_25_SHIFT))&XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_25_MASK)
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_25_MASK 0xF000u
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_25_SHIFT 12
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_25_WIDTH 4
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_25(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_25_SHIFT))&XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_25_MASK)
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_26_MASK 0xF0000u
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_26_SHIFT 16
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_26_WIDTH 4
#define XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_26(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_26_SHIFT))&XCVR_AGC_GAIN_TBL_26_24_BBF_GAIN_26_MASK)
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_26_MASK 0xF00000u
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_26_SHIFT 20
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_26_WIDTH 4
#define XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_26(x) (((uint32_t)(((uint32_t)(x))<<XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_26_SHIFT))&XCVR_AGC_GAIN_TBL_26_24_LNM_GAIN_26_MASK)
/* DCOC_OFFSET_ Bit Fields */
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_I_MASK 0x3Fu
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_I_SHIFT 0
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_I_WIDTH 6
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_I_SHIFT))&XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_I_MASK)
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_Q_MASK 0x3F00u
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_Q_SHIFT 8
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_Q_WIDTH 6
#define XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_Q_SHIFT))&XCVR_DCOC_OFFSET__DCOC_BBF_OFFSET_Q_MASK)
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_I_MASK 0xFF0000u
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_I_SHIFT 16
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_I_WIDTH 8
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_I_SHIFT))&XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_I_MASK)
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_Q_MASK 0xFF000000u
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_Q_SHIFT 24
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_Q_WIDTH 8
#define XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_Q_SHIFT))&XCVR_DCOC_OFFSET__DCOC_TZA_OFFSET_Q_MASK)
/* DCOC_TZA_STEP_ Bit Fields */
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_RCP_MASK 0x1FFFu
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_RCP_SHIFT 0
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_RCP_WIDTH 13
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_RCP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_RCP_SHIFT))&XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_RCP_MASK)
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_GAIN_MASK 0xFFF0000u
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_GAIN_SHIFT 16
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_GAIN_WIDTH 12
#define XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_GAIN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_GAIN_SHIFT))&XCVR_DCOC_TZA_STEP__DCOC_TZA_STEP_GAIN_MASK)
/* DCOC_CAL_ALPHA Bit Fields */
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_I_MASK 0xFFFFu
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_I_SHIFT 0
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_I_WIDTH 16
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_I_SHIFT))&XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_I_MASK)
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_Q_MASK 0xFFFF0000u
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_Q_SHIFT 16
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_Q_WIDTH 16
#define XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_Q_SHIFT))&XCVR_DCOC_CAL_ALPHA_DCOC_CAL_ALPHA_Q_MASK)
/* DCOC_CAL_BETA Bit Fields */
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_I_MASK 0xFFFFu
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_I_SHIFT 0
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_I_WIDTH 16
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_I_SHIFT))&XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_I_MASK)
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_Q_MASK 0xFFFF0000u
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_Q_SHIFT 16
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_Q_WIDTH 16
#define XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_Q_SHIFT))&XCVR_DCOC_CAL_BETA_DCOC_CAL_BETA_Q_MASK)
/* DCOC_CAL_GAMMA Bit Fields */
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_I_MASK 0xFFFFu
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_I_SHIFT 0
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_I_WIDTH 16
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_I_SHIFT))&XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_I_MASK)
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_Q_MASK 0xFFFF0000u
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_Q_SHIFT 16
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_Q_WIDTH 16
#define XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_Q_SHIFT))&XCVR_DCOC_CAL_GAMMA_DCOC_CAL_GAMMA_Q_MASK)
/* DCOC_CAL_IIR Bit Fields */
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR1A_IDX_MASK 0x3u
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR1A_IDX_SHIFT 0
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR1A_IDX_WIDTH 2
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR1A_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR1A_IDX_SHIFT))&XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR1A_IDX_MASK)
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR2A_IDX_MASK 0xCu
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR2A_IDX_SHIFT 2
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR2A_IDX_WIDTH 2
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR2A_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR2A_IDX_SHIFT))&XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR2A_IDX_MASK)
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR3A_IDX_MASK 0x30u
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR3A_IDX_SHIFT 4
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR3A_IDX_WIDTH 2
#define XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR3A_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR3A_IDX_SHIFT))&XCVR_DCOC_CAL_IIR_DCOC_CAL_IIR3A_IDX_MASK)
/* DCOC_CAL Bit Fields */
#define XCVR_DCOC_CAL_DCOC_CAL_RES_I_MASK 0xFFFu
#define XCVR_DCOC_CAL_DCOC_CAL_RES_I_SHIFT 0
#define XCVR_DCOC_CAL_DCOC_CAL_RES_I_WIDTH 12
#define XCVR_DCOC_CAL_DCOC_CAL_RES_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_DCOC_CAL_RES_I_SHIFT))&XCVR_DCOC_CAL_DCOC_CAL_RES_I_MASK)
#define XCVR_DCOC_CAL_DCOC_CAL_RES_Q_MASK 0xFFF0000u
#define XCVR_DCOC_CAL_DCOC_CAL_RES_Q_SHIFT 16
#define XCVR_DCOC_CAL_DCOC_CAL_RES_Q_WIDTH 12
#define XCVR_DCOC_CAL_DCOC_CAL_RES_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DCOC_CAL_DCOC_CAL_RES_Q_SHIFT))&XCVR_DCOC_CAL_DCOC_CAL_RES_Q_MASK)
/* RX_CHF_COEF Bit Fields */
#define XCVR_RX_CHF_COEF_RX_CH_FILT_HX_MASK 0xFFu
#define XCVR_RX_CHF_COEF_RX_CH_FILT_HX_SHIFT 0
#define XCVR_RX_CHF_COEF_RX_CH_FILT_HX_WIDTH 8
#define XCVR_RX_CHF_COEF_RX_CH_FILT_HX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_CHF_COEF_RX_CH_FILT_HX_SHIFT))&XCVR_RX_CHF_COEF_RX_CH_FILT_HX_MASK)
/* TX_DIG_CTRL Bit Fields */
#define XCVR_TX_DIG_CTRL_DFT_MODE_MASK 0x7u
#define XCVR_TX_DIG_CTRL_DFT_MODE_SHIFT 0
#define XCVR_TX_DIG_CTRL_DFT_MODE_WIDTH 3
#define XCVR_TX_DIG_CTRL_DFT_MODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_DFT_MODE_SHIFT))&XCVR_TX_DIG_CTRL_DFT_MODE_MASK)
#define XCVR_TX_DIG_CTRL_DFT_EN_MASK 0x8u
#define XCVR_TX_DIG_CTRL_DFT_EN_SHIFT 3
#define XCVR_TX_DIG_CTRL_DFT_EN_WIDTH 1
#define XCVR_TX_DIG_CTRL_DFT_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_DFT_EN_SHIFT))&XCVR_TX_DIG_CTRL_DFT_EN_MASK)
#define XCVR_TX_DIG_CTRL_DFT_LFSR_LEN_MASK 0x70u
#define XCVR_TX_DIG_CTRL_DFT_LFSR_LEN_SHIFT 4
#define XCVR_TX_DIG_CTRL_DFT_LFSR_LEN_WIDTH 3
#define XCVR_TX_DIG_CTRL_DFT_LFSR_LEN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_DFT_LFSR_LEN_SHIFT))&XCVR_TX_DIG_CTRL_DFT_LFSR_LEN_MASK)
#define XCVR_TX_DIG_CTRL_LFSR_EN_MASK 0x80u
#define XCVR_TX_DIG_CTRL_LFSR_EN_SHIFT 7
#define XCVR_TX_DIG_CTRL_LFSR_EN_WIDTH 1
#define XCVR_TX_DIG_CTRL_LFSR_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_LFSR_EN_SHIFT))&XCVR_TX_DIG_CTRL_LFSR_EN_MASK)
#define XCVR_TX_DIG_CTRL_DFT_CLK_SEL_MASK 0x700u
#define XCVR_TX_DIG_CTRL_DFT_CLK_SEL_SHIFT 8
#define XCVR_TX_DIG_CTRL_DFT_CLK_SEL_WIDTH 3
#define XCVR_TX_DIG_CTRL_DFT_CLK_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_DFT_CLK_SEL_SHIFT))&XCVR_TX_DIG_CTRL_DFT_CLK_SEL_MASK)
#define XCVR_TX_DIG_CTRL_TONE_SEL_MASK 0x3000u
#define XCVR_TX_DIG_CTRL_TONE_SEL_SHIFT 12
#define XCVR_TX_DIG_CTRL_TONE_SEL_WIDTH 2
#define XCVR_TX_DIG_CTRL_TONE_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_TONE_SEL_SHIFT))&XCVR_TX_DIG_CTRL_TONE_SEL_MASK)
#define XCVR_TX_DIG_CTRL_POL_MASK 0x10000u
#define XCVR_TX_DIG_CTRL_POL_SHIFT 16
#define XCVR_TX_DIG_CTRL_POL_WIDTH 1
#define XCVR_TX_DIG_CTRL_POL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_POL_SHIFT))&XCVR_TX_DIG_CTRL_POL_MASK)
#define XCVR_TX_DIG_CTRL_DP_SEL_MASK 0x100000u
#define XCVR_TX_DIG_CTRL_DP_SEL_SHIFT 20
#define XCVR_TX_DIG_CTRL_DP_SEL_WIDTH 1
#define XCVR_TX_DIG_CTRL_DP_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_DP_SEL_SHIFT))&XCVR_TX_DIG_CTRL_DP_SEL_MASK)
#define XCVR_TX_DIG_CTRL_FREQ_WORD_ADJ_MASK 0xFFC00000u
#define XCVR_TX_DIG_CTRL_FREQ_WORD_ADJ_SHIFT 22
#define XCVR_TX_DIG_CTRL_FREQ_WORD_ADJ_WIDTH 10
#define XCVR_TX_DIG_CTRL_FREQ_WORD_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DIG_CTRL_FREQ_WORD_ADJ_SHIFT))&XCVR_TX_DIG_CTRL_FREQ_WORD_ADJ_MASK)
/* TX_DATA_PAD_PAT Bit Fields */
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_0_MASK 0xFFu
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_0_SHIFT 0
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_0_WIDTH 8
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_0_SHIFT))&XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_0_MASK)
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_1_MASK 0xFF00u
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_1_SHIFT 8
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_1_WIDTH 8
#define XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_1_SHIFT))&XCVR_TX_DATA_PAD_PAT_DATA_PADDING_PAT_1_MASK)
#define XCVR_TX_DATA_PAD_PAT_DFT_LFSR_OUT_MASK 0x7FFF0000u
#define XCVR_TX_DATA_PAD_PAT_DFT_LFSR_OUT_SHIFT 16
#define XCVR_TX_DATA_PAD_PAT_DFT_LFSR_OUT_WIDTH 15
#define XCVR_TX_DATA_PAD_PAT_DFT_LFSR_OUT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DATA_PAD_PAT_DFT_LFSR_OUT_SHIFT))&XCVR_TX_DATA_PAD_PAT_DFT_LFSR_OUT_MASK)
#define XCVR_TX_DATA_PAD_PAT_LRM_MASK 0x80000000u
#define XCVR_TX_DATA_PAD_PAT_LRM_SHIFT 31
#define XCVR_TX_DATA_PAD_PAT_LRM_WIDTH 1
#define XCVR_TX_DATA_PAD_PAT_LRM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DATA_PAD_PAT_LRM_SHIFT))&XCVR_TX_DATA_PAD_PAT_LRM_MASK)
/* TX_GFSK_MOD_CTRL Bit Fields */
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MULTIPLY_TABLE_MANUAL_MASK 0xFFFFu
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MULTIPLY_TABLE_MANUAL_SHIFT 0
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MULTIPLY_TABLE_MANUAL_WIDTH 16
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MULTIPLY_TABLE_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_MOD_CTRL_GFSK_MULTIPLY_TABLE_MANUAL_SHIFT))&XCVR_TX_GFSK_MOD_CTRL_GFSK_MULTIPLY_TABLE_MANUAL_MASK)
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MI_MASK 0x30000u
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MI_SHIFT 16
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MI_WIDTH 2
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_MOD_CTRL_GFSK_MI_SHIFT))&XCVR_TX_GFSK_MOD_CTRL_GFSK_MI_MASK)
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MLD_MASK 0x100000u
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MLD_SHIFT 20
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MLD_WIDTH 1
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_MLD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_MOD_CTRL_GFSK_MLD_SHIFT))&XCVR_TX_GFSK_MOD_CTRL_GFSK_MLD_MASK)
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_SYMBOL_RATE_MASK 0x7000000u
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_SYMBOL_RATE_SHIFT 24
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_SYMBOL_RATE_WIDTH 3
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_SYMBOL_RATE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_MOD_CTRL_GFSK_SYMBOL_RATE_SHIFT))&XCVR_TX_GFSK_MOD_CTRL_GFSK_SYMBOL_RATE_MASK)
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_FLD_MASK 0x10000000u
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_FLD_SHIFT 28
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_FLD_WIDTH 1
#define XCVR_TX_GFSK_MOD_CTRL_GFSK_FLD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_MOD_CTRL_GFSK_FLD_SHIFT))&XCVR_TX_GFSK_MOD_CTRL_GFSK_FLD_MASK)
/* TX_GFSK_COEFF2 Bit Fields */
#define XCVR_TX_GFSK_COEFF2_GFSK_FILTER_COEFF_MANUAL2_MASK 0xFFFFFFFFu
#define XCVR_TX_GFSK_COEFF2_GFSK_FILTER_COEFF_MANUAL2_SHIFT 0
#define XCVR_TX_GFSK_COEFF2_GFSK_FILTER_COEFF_MANUAL2_WIDTH 32
#define XCVR_TX_GFSK_COEFF2_GFSK_FILTER_COEFF_MANUAL2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_COEFF2_GFSK_FILTER_COEFF_MANUAL2_SHIFT))&XCVR_TX_GFSK_COEFF2_GFSK_FILTER_COEFF_MANUAL2_MASK)
/* TX_GFSK_COEFF1 Bit Fields */
#define XCVR_TX_GFSK_COEFF1_GFSK_FILTER_COEFF_MANUAL1_MASK 0xFFFFFFFFu
#define XCVR_TX_GFSK_COEFF1_GFSK_FILTER_COEFF_MANUAL1_SHIFT 0
#define XCVR_TX_GFSK_COEFF1_GFSK_FILTER_COEFF_MANUAL1_WIDTH 32
#define XCVR_TX_GFSK_COEFF1_GFSK_FILTER_COEFF_MANUAL1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_GFSK_COEFF1_GFSK_FILTER_COEFF_MANUAL1_SHIFT))&XCVR_TX_GFSK_COEFF1_GFSK_FILTER_COEFF_MANUAL1_MASK)
/* TX_FSK_MOD_SCALE Bit Fields */
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_0_MASK 0x1FFFu
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_0_SHIFT 0
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_0_WIDTH 13
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_0_SHIFT))&XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_0_MASK)
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_1_MASK 0x1FFF0000u
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_1_SHIFT 16
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_1_WIDTH 13
#define XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_1_SHIFT))&XCVR_TX_FSK_MOD_SCALE_FSK_MODULATION_SCALE_1_MASK)
/* TX_DFT_MOD_PAT Bit Fields */
#define XCVR_TX_DFT_MOD_PAT_DFT_MOD_PATTERN_MASK 0xFFFFFFFFu
#define XCVR_TX_DFT_MOD_PAT_DFT_MOD_PATTERN_SHIFT 0
#define XCVR_TX_DFT_MOD_PAT_DFT_MOD_PATTERN_WIDTH 32
#define XCVR_TX_DFT_MOD_PAT_DFT_MOD_PATTERN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DFT_MOD_PAT_DFT_MOD_PATTERN_SHIFT))&XCVR_TX_DFT_MOD_PAT_DFT_MOD_PATTERN_MASK)
/* TX_DFT_TONE_0_1 Bit Fields */
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_1_MASK 0x1FFFu
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_1_SHIFT 0
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_1_WIDTH 13
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DFT_TONE_0_1_DFT_TONE_1_SHIFT))&XCVR_TX_DFT_TONE_0_1_DFT_TONE_1_MASK)
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_0_MASK 0x1FFF0000u
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_0_SHIFT 16
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_0_WIDTH 13
#define XCVR_TX_DFT_TONE_0_1_DFT_TONE_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DFT_TONE_0_1_DFT_TONE_0_SHIFT))&XCVR_TX_DFT_TONE_0_1_DFT_TONE_0_MASK)
/* TX_DFT_TONE_2_3 Bit Fields */
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_3_MASK 0x1FFFu
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_3_SHIFT 0
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_3_WIDTH 13
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DFT_TONE_2_3_DFT_TONE_3_SHIFT))&XCVR_TX_DFT_TONE_2_3_DFT_TONE_3_MASK)
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_2_MASK 0x1FFF0000u
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_2_SHIFT 16
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_2_WIDTH 13
#define XCVR_TX_DFT_TONE_2_3_DFT_TONE_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_DFT_TONE_2_3_DFT_TONE_2_SHIFT))&XCVR_TX_DFT_TONE_2_3_DFT_TONE_2_MASK)
/* PLL_MOD_OVRD Bit Fields */
#define XCVR_PLL_MOD_OVRD_MODULATION_WORD_MANUAL_MASK 0x1FFFu
#define XCVR_PLL_MOD_OVRD_MODULATION_WORD_MANUAL_SHIFT 0
#define XCVR_PLL_MOD_OVRD_MODULATION_WORD_MANUAL_WIDTH 13
#define XCVR_PLL_MOD_OVRD_MODULATION_WORD_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_MOD_OVRD_MODULATION_WORD_MANUAL_SHIFT))&XCVR_PLL_MOD_OVRD_MODULATION_WORD_MANUAL_MASK)
#define XCVR_PLL_MOD_OVRD_MOD_DIS_MASK 0x8000u
#define XCVR_PLL_MOD_OVRD_MOD_DIS_SHIFT 15
#define XCVR_PLL_MOD_OVRD_MOD_DIS_WIDTH 1
#define XCVR_PLL_MOD_OVRD_MOD_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_MOD_OVRD_MOD_DIS_SHIFT))&XCVR_PLL_MOD_OVRD_MOD_DIS_MASK)
#define XCVR_PLL_MOD_OVRD_HPM_BANK_MANUAL_MASK 0xFF0000u
#define XCVR_PLL_MOD_OVRD_HPM_BANK_MANUAL_SHIFT 16
#define XCVR_PLL_MOD_OVRD_HPM_BANK_MANUAL_WIDTH 8
#define XCVR_PLL_MOD_OVRD_HPM_BANK_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_MOD_OVRD_HPM_BANK_MANUAL_SHIFT))&XCVR_PLL_MOD_OVRD_HPM_BANK_MANUAL_MASK)
#define XCVR_PLL_MOD_OVRD_HPM_BANK_DIS_MASK 0x8000000u
#define XCVR_PLL_MOD_OVRD_HPM_BANK_DIS_SHIFT 27
#define XCVR_PLL_MOD_OVRD_HPM_BANK_DIS_WIDTH 1
#define XCVR_PLL_MOD_OVRD_HPM_BANK_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_MOD_OVRD_HPM_BANK_DIS_SHIFT))&XCVR_PLL_MOD_OVRD_HPM_BANK_DIS_MASK)
#define XCVR_PLL_MOD_OVRD_HPM_LSB_MANUAL_MASK 0x30000000u
#define XCVR_PLL_MOD_OVRD_HPM_LSB_MANUAL_SHIFT 28
#define XCVR_PLL_MOD_OVRD_HPM_LSB_MANUAL_WIDTH 2
#define XCVR_PLL_MOD_OVRD_HPM_LSB_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_MOD_OVRD_HPM_LSB_MANUAL_SHIFT))&XCVR_PLL_MOD_OVRD_HPM_LSB_MANUAL_MASK)
#define XCVR_PLL_MOD_OVRD_HPM_LSB_DIS_MASK 0x80000000u
#define XCVR_PLL_MOD_OVRD_HPM_LSB_DIS_SHIFT 31
#define XCVR_PLL_MOD_OVRD_HPM_LSB_DIS_WIDTH 1
#define XCVR_PLL_MOD_OVRD_HPM_LSB_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_MOD_OVRD_HPM_LSB_DIS_SHIFT))&XCVR_PLL_MOD_OVRD_HPM_LSB_DIS_MASK)
/* PLL_CHAN_MAP Bit Fields */
#define XCVR_PLL_CHAN_MAP_CHANNEL_NUM_MASK 0x7Fu
#define XCVR_PLL_CHAN_MAP_CHANNEL_NUM_SHIFT 0
#define XCVR_PLL_CHAN_MAP_CHANNEL_NUM_WIDTH 7
#define XCVR_PLL_CHAN_MAP_CHANNEL_NUM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CHAN_MAP_CHANNEL_NUM_SHIFT))&XCVR_PLL_CHAN_MAP_CHANNEL_NUM_MASK)
#define XCVR_PLL_CHAN_MAP_BOC_MASK 0x100u
#define XCVR_PLL_CHAN_MAP_BOC_SHIFT 8
#define XCVR_PLL_CHAN_MAP_BOC_WIDTH 1
#define XCVR_PLL_CHAN_MAP_BOC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CHAN_MAP_BOC_SHIFT))&XCVR_PLL_CHAN_MAP_BOC_MASK)
#define XCVR_PLL_CHAN_MAP_BMR_MASK 0x200u
#define XCVR_PLL_CHAN_MAP_BMR_SHIFT 9
#define XCVR_PLL_CHAN_MAP_BMR_WIDTH 1
#define XCVR_PLL_CHAN_MAP_BMR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CHAN_MAP_BMR_SHIFT))&XCVR_PLL_CHAN_MAP_BMR_MASK)
#define XCVR_PLL_CHAN_MAP_ZOC_MASK 0x400u
#define XCVR_PLL_CHAN_MAP_ZOC_SHIFT 10
#define XCVR_PLL_CHAN_MAP_ZOC_WIDTH 1
#define XCVR_PLL_CHAN_MAP_ZOC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CHAN_MAP_ZOC_SHIFT))&XCVR_PLL_CHAN_MAP_ZOC_MASK)
/* PLL_LOCK_DETECT Bit Fields */
#define XCVR_PLL_LOCK_DETECT_CT_FAIL_MASK 0x1u
#define XCVR_PLL_LOCK_DETECT_CT_FAIL_SHIFT 0
#define XCVR_PLL_LOCK_DETECT_CT_FAIL_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_CT_FAIL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_CT_FAIL_SHIFT))&XCVR_PLL_LOCK_DETECT_CT_FAIL_MASK)
#define XCVR_PLL_LOCK_DETECT_CTFF_MASK 0x2u
#define XCVR_PLL_LOCK_DETECT_CTFF_SHIFT 1
#define XCVR_PLL_LOCK_DETECT_CTFF_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_CTFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_CTFF_SHIFT))&XCVR_PLL_LOCK_DETECT_CTFF_MASK)
#define XCVR_PLL_LOCK_DETECT_CS_FAIL_MASK 0x4u
#define XCVR_PLL_LOCK_DETECT_CS_FAIL_SHIFT 2
#define XCVR_PLL_LOCK_DETECT_CS_FAIL_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_CS_FAIL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_CS_FAIL_SHIFT))&XCVR_PLL_LOCK_DETECT_CS_FAIL_MASK)
#define XCVR_PLL_LOCK_DETECT_CSFF_MASK 0x8u
#define XCVR_PLL_LOCK_DETECT_CSFF_SHIFT 3
#define XCVR_PLL_LOCK_DETECT_CSFF_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_CSFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_CSFF_SHIFT))&XCVR_PLL_LOCK_DETECT_CSFF_MASK)
#define XCVR_PLL_LOCK_DETECT_FT_FAIL_MASK 0x10u
#define XCVR_PLL_LOCK_DETECT_FT_FAIL_SHIFT 4
#define XCVR_PLL_LOCK_DETECT_FT_FAIL_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_FT_FAIL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_FT_FAIL_SHIFT))&XCVR_PLL_LOCK_DETECT_FT_FAIL_MASK)
#define XCVR_PLL_LOCK_DETECT_FTFF_MASK 0x20u
#define XCVR_PLL_LOCK_DETECT_FTFF_SHIFT 5
#define XCVR_PLL_LOCK_DETECT_FTFF_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_FTFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_FTFF_SHIFT))&XCVR_PLL_LOCK_DETECT_FTFF_MASK)
#define XCVR_PLL_LOCK_DETECT_TAFF_MASK 0x80u
#define XCVR_PLL_LOCK_DETECT_TAFF_SHIFT 7
#define XCVR_PLL_LOCK_DETECT_TAFF_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_TAFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_TAFF_SHIFT))&XCVR_PLL_LOCK_DETECT_TAFF_MASK)
#define XCVR_PLL_LOCK_DETECT_CTUNE_LDF_LEV_MASK 0xF00u
#define XCVR_PLL_LOCK_DETECT_CTUNE_LDF_LEV_SHIFT 8
#define XCVR_PLL_LOCK_DETECT_CTUNE_LDF_LEV_WIDTH 4
#define XCVR_PLL_LOCK_DETECT_CTUNE_LDF_LEV(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_CTUNE_LDF_LEV_SHIFT))&XCVR_PLL_LOCK_DETECT_CTUNE_LDF_LEV_MASK)
#define XCVR_PLL_LOCK_DETECT_FTF_RX_THRSH_MASK 0x3F000u
#define XCVR_PLL_LOCK_DETECT_FTF_RX_THRSH_SHIFT 12
#define XCVR_PLL_LOCK_DETECT_FTF_RX_THRSH_WIDTH 6
#define XCVR_PLL_LOCK_DETECT_FTF_RX_THRSH(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_FTF_RX_THRSH_SHIFT))&XCVR_PLL_LOCK_DETECT_FTF_RX_THRSH_MASK)
#define XCVR_PLL_LOCK_DETECT_FTW_RX_MASK 0x80000u
#define XCVR_PLL_LOCK_DETECT_FTW_RX_SHIFT 19
#define XCVR_PLL_LOCK_DETECT_FTW_RX_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_FTW_RX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_FTW_RX_SHIFT))&XCVR_PLL_LOCK_DETECT_FTW_RX_MASK)
#define XCVR_PLL_LOCK_DETECT_FTF_TX_THRSH_MASK 0x3F00000u
#define XCVR_PLL_LOCK_DETECT_FTF_TX_THRSH_SHIFT 20
#define XCVR_PLL_LOCK_DETECT_FTF_TX_THRSH_WIDTH 6
#define XCVR_PLL_LOCK_DETECT_FTF_TX_THRSH(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_FTF_TX_THRSH_SHIFT))&XCVR_PLL_LOCK_DETECT_FTF_TX_THRSH_MASK)
#define XCVR_PLL_LOCK_DETECT_FTW_TX_MASK 0x8000000u
#define XCVR_PLL_LOCK_DETECT_FTW_TX_SHIFT 27
#define XCVR_PLL_LOCK_DETECT_FTW_TX_WIDTH 1
#define XCVR_PLL_LOCK_DETECT_FTW_TX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LOCK_DETECT_FTW_TX_SHIFT))&XCVR_PLL_LOCK_DETECT_FTW_TX_MASK)
/* PLL_HP_MOD_CTRL Bit Fields */
#define XCVR_PLL_HP_MOD_CTRL_HPM_SDM_MANUAL_MASK 0x3FFu
#define XCVR_PLL_HP_MOD_CTRL_HPM_SDM_MANUAL_SHIFT 0
#define XCVR_PLL_HP_MOD_CTRL_HPM_SDM_MANUAL_WIDTH 10
#define XCVR_PLL_HP_MOD_CTRL_HPM_SDM_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HPM_SDM_MANUAL_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HPM_SDM_MANUAL_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HPFF_MASK 0x2000u
#define XCVR_PLL_HP_MOD_CTRL_HPFF_SHIFT 13
#define XCVR_PLL_HP_MOD_CTRL_HPFF_WIDTH 1
#define XCVR_PLL_HP_MOD_CTRL_HPFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HPFF_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HPFF_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_INV_MASK 0x4000u
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_INV_SHIFT 14
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_INV_WIDTH 1
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_INV(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HP_SDM_INV_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HP_SDM_INV_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_DIS_MASK 0x8000u
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_DIS_SHIFT 15
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_DIS_WIDTH 1
#define XCVR_PLL_HP_MOD_CTRL_HP_SDM_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HP_SDM_DIS_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HP_SDM_DIS_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HPM_LFSR_LEN_MASK 0x70000u
#define XCVR_PLL_HP_MOD_CTRL_HPM_LFSR_LEN_SHIFT 16
#define XCVR_PLL_HP_MOD_CTRL_HPM_LFSR_LEN_WIDTH 3
#define XCVR_PLL_HP_MOD_CTRL_HPM_LFSR_LEN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HPM_LFSR_LEN_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HPM_LFSR_LEN_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HP_DTH_SCL_MASK 0x100000u
#define XCVR_PLL_HP_MOD_CTRL_HP_DTH_SCL_SHIFT 20
#define XCVR_PLL_HP_MOD_CTRL_HP_DTH_SCL_WIDTH 1
#define XCVR_PLL_HP_MOD_CTRL_HP_DTH_SCL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HP_DTH_SCL_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HP_DTH_SCL_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HPM_DTH_EN_MASK 0x800000u
#define XCVR_PLL_HP_MOD_CTRL_HPM_DTH_EN_SHIFT 23
#define XCVR_PLL_HP_MOD_CTRL_HPM_DTH_EN_WIDTH 1
#define XCVR_PLL_HP_MOD_CTRL_HPM_DTH_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HPM_DTH_EN_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HPM_DTH_EN_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HPM_SCALE_MASK 0x3000000u
#define XCVR_PLL_HP_MOD_CTRL_HPM_SCALE_SHIFT 24
#define XCVR_PLL_HP_MOD_CTRL_HPM_SCALE_WIDTH 2
#define XCVR_PLL_HP_MOD_CTRL_HPM_SCALE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HPM_SCALE_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HPM_SCALE_MASK)
#define XCVR_PLL_HP_MOD_CTRL_HP_MOD_INV_MASK 0x80000000u
#define XCVR_PLL_HP_MOD_CTRL_HP_MOD_INV_SHIFT 31
#define XCVR_PLL_HP_MOD_CTRL_HP_MOD_INV_WIDTH 1
#define XCVR_PLL_HP_MOD_CTRL_HP_MOD_INV(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HP_MOD_CTRL_HP_MOD_INV_SHIFT))&XCVR_PLL_HP_MOD_CTRL_HP_MOD_INV_MASK)
/* PLL_HPM_CAL_CTRL Bit Fields */
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MASK 0x1FFFu
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_SHIFT 0
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_WIDTH 13
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_SHIFT))&XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MASK)
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_DIS_MASK 0x8000u
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_DIS_SHIFT 15
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_DIS_WIDTH 1
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_CAL_CTRL_HP_CAL_DIS_SHIFT))&XCVR_PLL_HPM_CAL_CTRL_HP_CAL_DIS_MASK)
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MANUAL_MASK 0x1FFF0000u
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MANUAL_SHIFT 16
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MANUAL_WIDTH 13
#define XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MANUAL_SHIFT))&XCVR_PLL_HPM_CAL_CTRL_HPM_CAL_FACTOR_MANUAL_MASK)
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_ARY_MASK 0x40000000u
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_ARY_SHIFT 30
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_ARY_WIDTH 1
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_ARY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_CAL_CTRL_HP_CAL_ARY_SHIFT))&XCVR_PLL_HPM_CAL_CTRL_HP_CAL_ARY_MASK)
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_TIME_MASK 0x80000000u
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_TIME_SHIFT 31
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_TIME_WIDTH 1
#define XCVR_PLL_HPM_CAL_CTRL_HP_CAL_TIME(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_CAL_CTRL_HP_CAL_TIME_SHIFT))&XCVR_PLL_HPM_CAL_CTRL_HP_CAL_TIME_MASK)
/* PLL_LD_HPM_CAL1 Bit Fields */
#define XCVR_PLL_LD_HPM_CAL1_CNT_1_MASK 0x1FFFFu
#define XCVR_PLL_LD_HPM_CAL1_CNT_1_SHIFT 0
#define XCVR_PLL_LD_HPM_CAL1_CNT_1_WIDTH 17
#define XCVR_PLL_LD_HPM_CAL1_CNT_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL1_CNT_1_SHIFT))&XCVR_PLL_LD_HPM_CAL1_CNT_1_MASK)
#define XCVR_PLL_LD_HPM_CAL1_CS_WT_MASK 0x700000u
#define XCVR_PLL_LD_HPM_CAL1_CS_WT_SHIFT 20
#define XCVR_PLL_LD_HPM_CAL1_CS_WT_WIDTH 3
#define XCVR_PLL_LD_HPM_CAL1_CS_WT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL1_CS_WT_SHIFT))&XCVR_PLL_LD_HPM_CAL1_CS_WT_MASK)
#define XCVR_PLL_LD_HPM_CAL1_CS_FW_MASK 0x7000000u
#define XCVR_PLL_LD_HPM_CAL1_CS_FW_SHIFT 24
#define XCVR_PLL_LD_HPM_CAL1_CS_FW_WIDTH 3
#define XCVR_PLL_LD_HPM_CAL1_CS_FW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL1_CS_FW_SHIFT))&XCVR_PLL_LD_HPM_CAL1_CS_FW_MASK)
#define XCVR_PLL_LD_HPM_CAL1_CS_FCNT_MASK 0xF0000000u
#define XCVR_PLL_LD_HPM_CAL1_CS_FCNT_SHIFT 28
#define XCVR_PLL_LD_HPM_CAL1_CS_FCNT_WIDTH 4
#define XCVR_PLL_LD_HPM_CAL1_CS_FCNT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL1_CS_FCNT_SHIFT))&XCVR_PLL_LD_HPM_CAL1_CS_FCNT_MASK)
/* PLL_LD_HPM_CAL2 Bit Fields */
#define XCVR_PLL_LD_HPM_CAL2_CNT_2_MASK 0x1FFFFu
#define XCVR_PLL_LD_HPM_CAL2_CNT_2_SHIFT 0
#define XCVR_PLL_LD_HPM_CAL2_CNT_2_WIDTH 17
#define XCVR_PLL_LD_HPM_CAL2_CNT_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL2_CNT_2_SHIFT))&XCVR_PLL_LD_HPM_CAL2_CNT_2_MASK)
#define XCVR_PLL_LD_HPM_CAL2_CS_RC_MASK 0x100000u
#define XCVR_PLL_LD_HPM_CAL2_CS_RC_SHIFT 20
#define XCVR_PLL_LD_HPM_CAL2_CS_RC_WIDTH 1
#define XCVR_PLL_LD_HPM_CAL2_CS_RC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL2_CS_RC_SHIFT))&XCVR_PLL_LD_HPM_CAL2_CS_RC_MASK)
#define XCVR_PLL_LD_HPM_CAL2_CS_FT_MASK 0x1F000000u
#define XCVR_PLL_LD_HPM_CAL2_CS_FT_SHIFT 24
#define XCVR_PLL_LD_HPM_CAL2_CS_FT_WIDTH 5
#define XCVR_PLL_LD_HPM_CAL2_CS_FT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LD_HPM_CAL2_CS_FT_SHIFT))&XCVR_PLL_LD_HPM_CAL2_CS_FT_MASK)
/* PLL_HPM_SDM_FRACTION Bit Fields */
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_NUM_SELECTED_MASK 0x3FFu
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_NUM_SELECTED_SHIFT 0
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_NUM_SELECTED_WIDTH 10
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_NUM_SELECTED(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_SDM_FRACTION_HPM_NUM_SELECTED_SHIFT))&XCVR_PLL_HPM_SDM_FRACTION_HPM_NUM_SELECTED_MASK)
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_DENOM_MASK 0x3FF0000u
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_DENOM_SHIFT 16
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_DENOM_WIDTH 10
#define XCVR_PLL_HPM_SDM_FRACTION_HPM_DENOM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_HPM_SDM_FRACTION_HPM_DENOM_SHIFT))&XCVR_PLL_HPM_SDM_FRACTION_HPM_DENOM_MASK)
/* PLL_LP_MOD_CTRL Bit Fields */
#define XCVR_PLL_LP_MOD_CTRL_PLL_LOOP_DIVIDER_MANUAL_MASK 0x3Fu
#define XCVR_PLL_LP_MOD_CTRL_PLL_LOOP_DIVIDER_MANUAL_SHIFT 0
#define XCVR_PLL_LP_MOD_CTRL_PLL_LOOP_DIVIDER_MANUAL_WIDTH 6
#define XCVR_PLL_LP_MOD_CTRL_PLL_LOOP_DIVIDER_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_PLL_LOOP_DIVIDER_MANUAL_SHIFT))&XCVR_PLL_LP_MOD_CTRL_PLL_LOOP_DIVIDER_MANUAL_MASK)
#define XCVR_PLL_LP_MOD_CTRL_PLL_LD_DIS_MASK 0x800u
#define XCVR_PLL_LP_MOD_CTRL_PLL_LD_DIS_SHIFT 11
#define XCVR_PLL_LP_MOD_CTRL_PLL_LD_DIS_WIDTH 1
#define XCVR_PLL_LP_MOD_CTRL_PLL_LD_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_PLL_LD_DIS_SHIFT))&XCVR_PLL_LP_MOD_CTRL_PLL_LD_DIS_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPFF_MASK 0x2000u
#define XCVR_PLL_LP_MOD_CTRL_LPFF_SHIFT 13
#define XCVR_PLL_LP_MOD_CTRL_LPFF_WIDTH 1
#define XCVR_PLL_LP_MOD_CTRL_LPFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPFF_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPFF_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_INV_MASK 0x4000u
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_INV_SHIFT 14
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_INV_WIDTH 1
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_INV(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPM_SDM_INV_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPM_SDM_INV_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_DIS_MASK 0x8000u
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_DIS_SHIFT 15
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_DIS_WIDTH 1
#define XCVR_PLL_LP_MOD_CTRL_LPM_SDM_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPM_SDM_DIS_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPM_SDM_DIS_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPM_DTH_SCL_MASK 0xF0000u
#define XCVR_PLL_LP_MOD_CTRL_LPM_DTH_SCL_SHIFT 16
#define XCVR_PLL_LP_MOD_CTRL_LPM_DTH_SCL_WIDTH 4
#define XCVR_PLL_LP_MOD_CTRL_LPM_DTH_SCL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPM_DTH_SCL_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPM_DTH_SCL_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_CTRL_MASK 0x400000u
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_CTRL_SHIFT 22
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_CTRL_WIDTH 1
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_CTRL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPM_D_CTRL_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPM_D_CTRL_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_OVRD_MASK 0x800000u
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_OVRD_SHIFT 23
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_OVRD_WIDTH 1
#define XCVR_PLL_LP_MOD_CTRL_LPM_D_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPM_D_OVRD_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPM_D_OVRD_MASK)
#define XCVR_PLL_LP_MOD_CTRL_LPM_SCALE_MASK 0xF000000u
#define XCVR_PLL_LP_MOD_CTRL_LPM_SCALE_SHIFT 24
#define XCVR_PLL_LP_MOD_CTRL_LPM_SCALE_WIDTH 4
#define XCVR_PLL_LP_MOD_CTRL_LPM_SCALE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_MOD_CTRL_LPM_SCALE_SHIFT))&XCVR_PLL_LP_MOD_CTRL_LPM_SCALE_MASK)
/* PLL_LP_SDM_CTRL1 Bit Fields */
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SELECTED_MASK 0x7Fu
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SELECTED_SHIFT 0
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SELECTED_WIDTH 7
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SELECTED(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SELECTED_SHIFT))&XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SELECTED_MASK)
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_MASK 0x7F0000u
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SHIFT 16
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_WIDTH 7
#define XCVR_PLL_LP_SDM_CTRL1_LPM_INTG(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_SHIFT))&XCVR_PLL_LP_SDM_CTRL1_LPM_INTG_MASK)
#define XCVR_PLL_LP_SDM_CTRL1_SDM_MAP_DIS_MASK 0x80000000u
#define XCVR_PLL_LP_SDM_CTRL1_SDM_MAP_DIS_SHIFT 31
#define XCVR_PLL_LP_SDM_CTRL1_SDM_MAP_DIS_WIDTH 1
#define XCVR_PLL_LP_SDM_CTRL1_SDM_MAP_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_CTRL1_SDM_MAP_DIS_SHIFT))&XCVR_PLL_LP_SDM_CTRL1_SDM_MAP_DIS_MASK)
/* PLL_LP_SDM_CTRL2 Bit Fields */
#define XCVR_PLL_LP_SDM_CTRL2_LPM_NUM_MASK 0xFFFFFFFu
#define XCVR_PLL_LP_SDM_CTRL2_LPM_NUM_SHIFT 0
#define XCVR_PLL_LP_SDM_CTRL2_LPM_NUM_WIDTH 28
#define XCVR_PLL_LP_SDM_CTRL2_LPM_NUM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_CTRL2_LPM_NUM_SHIFT))&XCVR_PLL_LP_SDM_CTRL2_LPM_NUM_MASK)
/* PLL_LP_SDM_CTRL3 Bit Fields */
#define XCVR_PLL_LP_SDM_CTRL3_LPM_DENOM_MASK 0xFFFFFFFu
#define XCVR_PLL_LP_SDM_CTRL3_LPM_DENOM_SHIFT 0
#define XCVR_PLL_LP_SDM_CTRL3_LPM_DENOM_WIDTH 28
#define XCVR_PLL_LP_SDM_CTRL3_LPM_DENOM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_CTRL3_LPM_DENOM_SHIFT))&XCVR_PLL_LP_SDM_CTRL3_LPM_DENOM_MASK)
/* PLL_LP_SDM_NUM Bit Fields */
#define XCVR_PLL_LP_SDM_NUM_LPM_NUM_SELECTED_MASK 0xFFFFFFFu
#define XCVR_PLL_LP_SDM_NUM_LPM_NUM_SELECTED_SHIFT 0
#define XCVR_PLL_LP_SDM_NUM_LPM_NUM_SELECTED_WIDTH 28
#define XCVR_PLL_LP_SDM_NUM_LPM_NUM_SELECTED(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_NUM_LPM_NUM_SELECTED_SHIFT))&XCVR_PLL_LP_SDM_NUM_LPM_NUM_SELECTED_MASK)
/* PLL_LP_SDM_DENOM Bit Fields */
#define XCVR_PLL_LP_SDM_DENOM_LPM_DENOM_SELECTED_MASK 0xFFFFFFFu
#define XCVR_PLL_LP_SDM_DENOM_LPM_DENOM_SELECTED_SHIFT 0
#define XCVR_PLL_LP_SDM_DENOM_LPM_DENOM_SELECTED_WIDTH 28
#define XCVR_PLL_LP_SDM_DENOM_LPM_DENOM_SELECTED(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_LP_SDM_DENOM_LPM_DENOM_SELECTED_SHIFT))&XCVR_PLL_LP_SDM_DENOM_LPM_DENOM_SELECTED_MASK)
/* PLL_DELAY_MATCH Bit Fields */
#define XCVR_PLL_DELAY_MATCH_LP_SDM_DELAY_MASK 0xFu
#define XCVR_PLL_DELAY_MATCH_LP_SDM_DELAY_SHIFT 0
#define XCVR_PLL_DELAY_MATCH_LP_SDM_DELAY_WIDTH 4
#define XCVR_PLL_DELAY_MATCH_LP_SDM_DELAY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_DELAY_MATCH_LP_SDM_DELAY_SHIFT))&XCVR_PLL_DELAY_MATCH_LP_SDM_DELAY_MASK)
#define XCVR_PLL_DELAY_MATCH_HPM_SDM_DELAY_MASK 0xF00u
#define XCVR_PLL_DELAY_MATCH_HPM_SDM_DELAY_SHIFT 8
#define XCVR_PLL_DELAY_MATCH_HPM_SDM_DELAY_WIDTH 4
#define XCVR_PLL_DELAY_MATCH_HPM_SDM_DELAY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_DELAY_MATCH_HPM_SDM_DELAY_SHIFT))&XCVR_PLL_DELAY_MATCH_HPM_SDM_DELAY_MASK)
#define XCVR_PLL_DELAY_MATCH_HPM_BANK_DELAY_MASK 0xF0000u
#define XCVR_PLL_DELAY_MATCH_HPM_BANK_DELAY_SHIFT 16
#define XCVR_PLL_DELAY_MATCH_HPM_BANK_DELAY_WIDTH 4
#define XCVR_PLL_DELAY_MATCH_HPM_BANK_DELAY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_DELAY_MATCH_HPM_BANK_DELAY_SHIFT))&XCVR_PLL_DELAY_MATCH_HPM_BANK_DELAY_MASK)
/* PLL_CTUNE_CTRL Bit Fields */
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TARGET_MANUAL_MASK 0xFFFu
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TARGET_MANUAL_SHIFT 0
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TARGET_MANUAL_WIDTH 12
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TARGET_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CTRL_CTUNE_TARGET_MANUAL_SHIFT))&XCVR_PLL_CTUNE_CTRL_CTUNE_TARGET_MANUAL_MASK)
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TD_MASK 0x8000u
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TD_SHIFT 15
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TD_WIDTH 1
#define XCVR_PLL_CTUNE_CTRL_CTUNE_TD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CTRL_CTUNE_TD_SHIFT))&XCVR_PLL_CTUNE_CTRL_CTUNE_TD_MASK)
#define XCVR_PLL_CTUNE_CTRL_CTUNE_ADJUST_MASK 0xF0000u
#define XCVR_PLL_CTUNE_CTRL_CTUNE_ADJUST_SHIFT 16
#define XCVR_PLL_CTUNE_CTRL_CTUNE_ADJUST_WIDTH 4
#define XCVR_PLL_CTUNE_CTRL_CTUNE_ADJUST(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CTRL_CTUNE_ADJUST_SHIFT))&XCVR_PLL_CTUNE_CTRL_CTUNE_ADJUST_MASK)
#define XCVR_PLL_CTUNE_CTRL_CTUNE_MANUAL_MASK 0x7F000000u
#define XCVR_PLL_CTUNE_CTRL_CTUNE_MANUAL_SHIFT 24
#define XCVR_PLL_CTUNE_CTRL_CTUNE_MANUAL_WIDTH 7
#define XCVR_PLL_CTUNE_CTRL_CTUNE_MANUAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CTRL_CTUNE_MANUAL_SHIFT))&XCVR_PLL_CTUNE_CTRL_CTUNE_MANUAL_MASK)
#define XCVR_PLL_CTUNE_CTRL_CTUNE_DIS_MASK 0x80000000u
#define XCVR_PLL_CTUNE_CTRL_CTUNE_DIS_SHIFT 31
#define XCVR_PLL_CTUNE_CTRL_CTUNE_DIS_WIDTH 1
#define XCVR_PLL_CTUNE_CTRL_CTUNE_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CTRL_CTUNE_DIS_SHIFT))&XCVR_PLL_CTUNE_CTRL_CTUNE_DIS_MASK)
/* PLL_CTUNE_CNT6 Bit Fields */
#define XCVR_PLL_CTUNE_CNT6_CTUNE_COUNT_6_MASK 0xFFFu
#define XCVR_PLL_CTUNE_CNT6_CTUNE_COUNT_6_SHIFT 0
#define XCVR_PLL_CTUNE_CNT6_CTUNE_COUNT_6_WIDTH 12
#define XCVR_PLL_CTUNE_CNT6_CTUNE_COUNT_6(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT6_CTUNE_COUNT_6_SHIFT))&XCVR_PLL_CTUNE_CNT6_CTUNE_COUNT_6_MASK)
/* PLL_CTUNE_CNT5_4 Bit Fields */
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_4_MASK 0xFFFu
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_4_SHIFT 0
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_4_WIDTH 12
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_4(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_4_SHIFT))&XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_4_MASK)
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_5_MASK 0xFFF0000u
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_5_SHIFT 16
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_5_WIDTH 12
#define XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_5(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_5_SHIFT))&XCVR_PLL_CTUNE_CNT5_4_CTUNE_COUNT_5_MASK)
/* PLL_CTUNE_CNT3_2 Bit Fields */
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_2_MASK 0xFFFu
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_2_SHIFT 0
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_2_WIDTH 12
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_2_SHIFT))&XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_2_MASK)
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_3_MASK 0xFFF0000u
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_3_SHIFT 16
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_3_WIDTH 12
#define XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_3_SHIFT))&XCVR_PLL_CTUNE_CNT3_2_CTUNE_COUNT_3_MASK)
/* PLL_CTUNE_CNT1_0 Bit Fields */
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_0_MASK 0xFFFu
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_0_SHIFT 0
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_0_WIDTH 12
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_0_SHIFT))&XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_0_MASK)
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_1_MASK 0xFFF0000u
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_1_SHIFT 16
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_1_WIDTH 12
#define XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_1_SHIFT))&XCVR_PLL_CTUNE_CNT1_0_CTUNE_COUNT_1_MASK)
/* PLL_CTUNE_RESULTS Bit Fields */
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_SELECTED_MASK 0x7Fu
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_SELECTED_SHIFT 0
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_SELECTED_WIDTH 7
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_SELECTED(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_RESULTS_CTUNE_SELECTED_SHIFT))&XCVR_PLL_CTUNE_RESULTS_CTUNE_SELECTED_MASK)
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_BEST_DIFF_MASK 0xFF00u
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_BEST_DIFF_SHIFT 8
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_BEST_DIFF_WIDTH 8
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_BEST_DIFF(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_RESULTS_CTUNE_BEST_DIFF_SHIFT))&XCVR_PLL_CTUNE_RESULTS_CTUNE_BEST_DIFF_MASK)
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_FREQ_TARGET_MASK 0xFFF0000u
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_FREQ_TARGET_SHIFT 16
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_FREQ_TARGET_WIDTH 12
#define XCVR_PLL_CTUNE_RESULTS_CTUNE_FREQ_TARGET(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTUNE_RESULTS_CTUNE_FREQ_TARGET_SHIFT))&XCVR_PLL_CTUNE_RESULTS_CTUNE_FREQ_TARGET_MASK)
/* CTRL Bit Fields */
#define XCVR_CTRL_PROTOCOL_MASK 0x7u
#define XCVR_CTRL_PROTOCOL_SHIFT 0
#define XCVR_CTRL_PROTOCOL_WIDTH 3
#define XCVR_CTRL_PROTOCOL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CTRL_PROTOCOL_SHIFT))&XCVR_CTRL_PROTOCOL_MASK)
#define XCVR_CTRL_TGT_PWR_SRC_MASK 0x30u
#define XCVR_CTRL_TGT_PWR_SRC_SHIFT 4
#define XCVR_CTRL_TGT_PWR_SRC_WIDTH 2
#define XCVR_CTRL_TGT_PWR_SRC(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CTRL_TGT_PWR_SRC_SHIFT))&XCVR_CTRL_TGT_PWR_SRC_MASK)
#define XCVR_CTRL_REF_CLK_FREQ_MASK 0xC0u
#define XCVR_CTRL_REF_CLK_FREQ_SHIFT 6
#define XCVR_CTRL_REF_CLK_FREQ_WIDTH 2
#define XCVR_CTRL_REF_CLK_FREQ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CTRL_REF_CLK_FREQ_SHIFT))&XCVR_CTRL_REF_CLK_FREQ_MASK)
/* STATUS Bit Fields */
#define XCVR_STATUS_TSM_COUNT_MASK 0xFFu
#define XCVR_STATUS_TSM_COUNT_SHIFT 0
#define XCVR_STATUS_TSM_COUNT_WIDTH 8
#define XCVR_STATUS_TSM_COUNT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_TSM_COUNT_SHIFT))&XCVR_STATUS_TSM_COUNT_MASK)
#define XCVR_STATUS_PLL_SEQ_STATE_MASK 0xF00u
#define XCVR_STATUS_PLL_SEQ_STATE_SHIFT 8
#define XCVR_STATUS_PLL_SEQ_STATE_WIDTH 4
#define XCVR_STATUS_PLL_SEQ_STATE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_PLL_SEQ_STATE_SHIFT))&XCVR_STATUS_PLL_SEQ_STATE_MASK)
#define XCVR_STATUS_RX_MODE_MASK 0x1000u
#define XCVR_STATUS_RX_MODE_SHIFT 12
#define XCVR_STATUS_RX_MODE_WIDTH 1
#define XCVR_STATUS_RX_MODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_RX_MODE_SHIFT))&XCVR_STATUS_RX_MODE_MASK)
#define XCVR_STATUS_TX_MODE_MASK 0x2000u
#define XCVR_STATUS_TX_MODE_SHIFT 13
#define XCVR_STATUS_TX_MODE_WIDTH 1
#define XCVR_STATUS_TX_MODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_TX_MODE_SHIFT))&XCVR_STATUS_TX_MODE_MASK)
#define XCVR_STATUS_BTLE_SYSCLK_REQ_MASK 0x10000u
#define XCVR_STATUS_BTLE_SYSCLK_REQ_SHIFT 16
#define XCVR_STATUS_BTLE_SYSCLK_REQ_WIDTH 1
#define XCVR_STATUS_BTLE_SYSCLK_REQ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_BTLE_SYSCLK_REQ_SHIFT))&XCVR_STATUS_BTLE_SYSCLK_REQ_MASK)
#define XCVR_STATUS_RIF_LL_ACTIVE_MASK 0x20000u
#define XCVR_STATUS_RIF_LL_ACTIVE_SHIFT 17
#define XCVR_STATUS_RIF_LL_ACTIVE_WIDTH 1
#define XCVR_STATUS_RIF_LL_ACTIVE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_RIF_LL_ACTIVE_SHIFT))&XCVR_STATUS_RIF_LL_ACTIVE_MASK)
#define XCVR_STATUS_XTAL_READY_MASK 0x40000u
#define XCVR_STATUS_XTAL_READY_SHIFT 18
#define XCVR_STATUS_XTAL_READY_WIDTH 1
#define XCVR_STATUS_XTAL_READY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_XTAL_READY_SHIFT))&XCVR_STATUS_XTAL_READY_MASK)
#define XCVR_STATUS_SOC_USING_RF_OSC_CLK_MASK 0x80000u
#define XCVR_STATUS_SOC_USING_RF_OSC_CLK_SHIFT 19
#define XCVR_STATUS_SOC_USING_RF_OSC_CLK_WIDTH 1
#define XCVR_STATUS_SOC_USING_RF_OSC_CLK(x) (((uint32_t)(((uint32_t)(x))<<XCVR_STATUS_SOC_USING_RF_OSC_CLK_SHIFT))&XCVR_STATUS_SOC_USING_RF_OSC_CLK_MASK)
/* OVERWRITE_VER Bit Fields */
#define XCVR_OVERWRITE_VER_OVERWRITE_VER_MASK 0xFFu
#define XCVR_OVERWRITE_VER_OVERWRITE_VER_SHIFT 0
#define XCVR_OVERWRITE_VER_OVERWRITE_VER_WIDTH 8
#define XCVR_OVERWRITE_VER_OVERWRITE_VER(x) (((uint32_t)(((uint32_t)(x))<<XCVR_OVERWRITE_VER_OVERWRITE_VER_SHIFT))&XCVR_OVERWRITE_VER_OVERWRITE_VER_MASK)
/* DMA_CTRL Bit Fields */
#define XCVR_DMA_CTRL_DMA_I_EN_MASK 0x1u
#define XCVR_DMA_CTRL_DMA_I_EN_SHIFT 0
#define XCVR_DMA_CTRL_DMA_I_EN_WIDTH 1
#define XCVR_DMA_CTRL_DMA_I_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DMA_CTRL_DMA_I_EN_SHIFT))&XCVR_DMA_CTRL_DMA_I_EN_MASK)
#define XCVR_DMA_CTRL_DMA_Q_EN_MASK 0x2u
#define XCVR_DMA_CTRL_DMA_Q_EN_SHIFT 1
#define XCVR_DMA_CTRL_DMA_Q_EN_WIDTH 1
#define XCVR_DMA_CTRL_DMA_Q_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DMA_CTRL_DMA_Q_EN_SHIFT))&XCVR_DMA_CTRL_DMA_Q_EN_MASK)
/* DMA_DATA Bit Fields */
#define XCVR_DMA_DATA_DMA_DATA_11_0_MASK 0xFFFu
#define XCVR_DMA_DATA_DMA_DATA_11_0_SHIFT 0
#define XCVR_DMA_DATA_DMA_DATA_11_0_WIDTH 12
#define XCVR_DMA_DATA_DMA_DATA_11_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DMA_DATA_DMA_DATA_11_0_SHIFT))&XCVR_DMA_DATA_DMA_DATA_11_0_MASK)
#define XCVR_DMA_DATA_DMA_DATA_27_16_MASK 0xFFF0000u
#define XCVR_DMA_DATA_DMA_DATA_27_16_SHIFT 16
#define XCVR_DMA_DATA_DMA_DATA_27_16_WIDTH 12
#define XCVR_DMA_DATA_DMA_DATA_27_16(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DMA_DATA_DMA_DATA_27_16_SHIFT))&XCVR_DMA_DATA_DMA_DATA_27_16_MASK)
/* DTEST_CTRL Bit Fields */
#define XCVR_DTEST_CTRL_DTEST_PAGE_MASK 0x3Fu
#define XCVR_DTEST_CTRL_DTEST_PAGE_SHIFT 0
#define XCVR_DTEST_CTRL_DTEST_PAGE_WIDTH 6
#define XCVR_DTEST_CTRL_DTEST_PAGE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_DTEST_PAGE_SHIFT))&XCVR_DTEST_CTRL_DTEST_PAGE_MASK)
#define XCVR_DTEST_CTRL_DTEST_EN_MASK 0x80u
#define XCVR_DTEST_CTRL_DTEST_EN_SHIFT 7
#define XCVR_DTEST_CTRL_DTEST_EN_WIDTH 1
#define XCVR_DTEST_CTRL_DTEST_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_DTEST_EN_SHIFT))&XCVR_DTEST_CTRL_DTEST_EN_MASK)
#define XCVR_DTEST_CTRL_GPIO0_OVLAY_PIN_MASK 0xF00u
#define XCVR_DTEST_CTRL_GPIO0_OVLAY_PIN_SHIFT 8
#define XCVR_DTEST_CTRL_GPIO0_OVLAY_PIN_WIDTH 4
#define XCVR_DTEST_CTRL_GPIO0_OVLAY_PIN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_GPIO0_OVLAY_PIN_SHIFT))&XCVR_DTEST_CTRL_GPIO0_OVLAY_PIN_MASK)
#define XCVR_DTEST_CTRL_GPIO1_OVLAY_PIN_MASK 0xF000u
#define XCVR_DTEST_CTRL_GPIO1_OVLAY_PIN_SHIFT 12
#define XCVR_DTEST_CTRL_GPIO1_OVLAY_PIN_WIDTH 4
#define XCVR_DTEST_CTRL_GPIO1_OVLAY_PIN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_GPIO1_OVLAY_PIN_SHIFT))&XCVR_DTEST_CTRL_GPIO1_OVLAY_PIN_MASK)
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_0_MASK 0x10000u
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_0_SHIFT 16
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_0_WIDTH 1
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_0_SHIFT))&XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_0_MASK)
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_1_MASK 0x20000u
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_1_SHIFT 17
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_1_WIDTH 1
#define XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_1_SHIFT))&XCVR_DTEST_CTRL_TSM_GPIO_OVLAY_1_MASK)
#define XCVR_DTEST_CTRL_DTEST_SHFT_MASK 0x7000000u
#define XCVR_DTEST_CTRL_DTEST_SHFT_SHIFT 24
#define XCVR_DTEST_CTRL_DTEST_SHFT_WIDTH 3
#define XCVR_DTEST_CTRL_DTEST_SHFT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_DTEST_SHFT_SHIFT))&XCVR_DTEST_CTRL_DTEST_SHFT_MASK)
#define XCVR_DTEST_CTRL_RAW_MODE_I_MASK 0x10000000u
#define XCVR_DTEST_CTRL_RAW_MODE_I_SHIFT 28
#define XCVR_DTEST_CTRL_RAW_MODE_I_WIDTH 1
#define XCVR_DTEST_CTRL_RAW_MODE_I(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_RAW_MODE_I_SHIFT))&XCVR_DTEST_CTRL_RAW_MODE_I_MASK)
#define XCVR_DTEST_CTRL_RAW_MODE_Q_MASK 0x20000000u
#define XCVR_DTEST_CTRL_RAW_MODE_Q_SHIFT 29
#define XCVR_DTEST_CTRL_RAW_MODE_Q_WIDTH 1
#define XCVR_DTEST_CTRL_RAW_MODE_Q(x) (((uint32_t)(((uint32_t)(x))<<XCVR_DTEST_CTRL_RAW_MODE_Q_SHIFT))&XCVR_DTEST_CTRL_RAW_MODE_Q_MASK)
/* PB_CTRL Bit Fields */
#define XCVR_PB_CTRL_PB_PROTECT_MASK 0x1u
#define XCVR_PB_CTRL_PB_PROTECT_SHIFT 0
#define XCVR_PB_CTRL_PB_PROTECT_WIDTH 1
#define XCVR_PB_CTRL_PB_PROTECT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PB_CTRL_PB_PROTECT_SHIFT))&XCVR_PB_CTRL_PB_PROTECT_MASK)
/* TSM_CTRL Bit Fields */
#define XCVR_TSM_CTRL_FORCE_TX_EN_MASK 0x4u
#define XCVR_TSM_CTRL_FORCE_TX_EN_SHIFT 2
#define XCVR_TSM_CTRL_FORCE_TX_EN_WIDTH 1
#define XCVR_TSM_CTRL_FORCE_TX_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_FORCE_TX_EN_SHIFT))&XCVR_TSM_CTRL_FORCE_TX_EN_MASK)
#define XCVR_TSM_CTRL_FORCE_RX_EN_MASK 0x8u
#define XCVR_TSM_CTRL_FORCE_RX_EN_SHIFT 3
#define XCVR_TSM_CTRL_FORCE_RX_EN_WIDTH 1
#define XCVR_TSM_CTRL_FORCE_RX_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_FORCE_RX_EN_SHIFT))&XCVR_TSM_CTRL_FORCE_RX_EN_MASK)
#define XCVR_TSM_CTRL_PA_RAMP_SEL_MASK 0x30u
#define XCVR_TSM_CTRL_PA_RAMP_SEL_SHIFT 4
#define XCVR_TSM_CTRL_PA_RAMP_SEL_WIDTH 2
#define XCVR_TSM_CTRL_PA_RAMP_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_PA_RAMP_SEL_SHIFT))&XCVR_TSM_CTRL_PA_RAMP_SEL_MASK)
#define XCVR_TSM_CTRL_DATA_PADDING_EN_MASK 0x40u
#define XCVR_TSM_CTRL_DATA_PADDING_EN_SHIFT 6
#define XCVR_TSM_CTRL_DATA_PADDING_EN_WIDTH 1
#define XCVR_TSM_CTRL_DATA_PADDING_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_DATA_PADDING_EN_SHIFT))&XCVR_TSM_CTRL_DATA_PADDING_EN_MASK)
#define XCVR_TSM_CTRL_TX_ABORT_DIS_MASK 0x10000u
#define XCVR_TSM_CTRL_TX_ABORT_DIS_SHIFT 16
#define XCVR_TSM_CTRL_TX_ABORT_DIS_WIDTH 1
#define XCVR_TSM_CTRL_TX_ABORT_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_TX_ABORT_DIS_SHIFT))&XCVR_TSM_CTRL_TX_ABORT_DIS_MASK)
#define XCVR_TSM_CTRL_RX_ABORT_DIS_MASK 0x20000u
#define XCVR_TSM_CTRL_RX_ABORT_DIS_SHIFT 17
#define XCVR_TSM_CTRL_RX_ABORT_DIS_WIDTH 1
#define XCVR_TSM_CTRL_RX_ABORT_DIS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_RX_ABORT_DIS_SHIFT))&XCVR_TSM_CTRL_RX_ABORT_DIS_MASK)
#define XCVR_TSM_CTRL_ABORT_ON_CTUNE_MASK 0x40000u
#define XCVR_TSM_CTRL_ABORT_ON_CTUNE_SHIFT 18
#define XCVR_TSM_CTRL_ABORT_ON_CTUNE_WIDTH 1
#define XCVR_TSM_CTRL_ABORT_ON_CTUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_ABORT_ON_CTUNE_SHIFT))&XCVR_TSM_CTRL_ABORT_ON_CTUNE_MASK)
#define XCVR_TSM_CTRL_ABORT_ON_CYCLE_SLIP_MASK 0x80000u
#define XCVR_TSM_CTRL_ABORT_ON_CYCLE_SLIP_SHIFT 19
#define XCVR_TSM_CTRL_ABORT_ON_CYCLE_SLIP_WIDTH 1
#define XCVR_TSM_CTRL_ABORT_ON_CYCLE_SLIP(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_ABORT_ON_CYCLE_SLIP_SHIFT))&XCVR_TSM_CTRL_ABORT_ON_CYCLE_SLIP_MASK)
#define XCVR_TSM_CTRL_ABORT_ON_FREQ_TARG_MASK 0x100000u
#define XCVR_TSM_CTRL_ABORT_ON_FREQ_TARG_SHIFT 20
#define XCVR_TSM_CTRL_ABORT_ON_FREQ_TARG_WIDTH 1
#define XCVR_TSM_CTRL_ABORT_ON_FREQ_TARG(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_ABORT_ON_FREQ_TARG_SHIFT))&XCVR_TSM_CTRL_ABORT_ON_FREQ_TARG_MASK)
#define XCVR_TSM_CTRL_BKPT_MASK 0xFF000000u
#define XCVR_TSM_CTRL_BKPT_SHIFT 24
#define XCVR_TSM_CTRL_BKPT_WIDTH 8
#define XCVR_TSM_CTRL_BKPT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_CTRL_BKPT_SHIFT))&XCVR_TSM_CTRL_BKPT_MASK)
/* END_OF_SEQ Bit Fields */
#define XCVR_END_OF_SEQ_END_OF_TX_WU_MASK 0xFFu
#define XCVR_END_OF_SEQ_END_OF_TX_WU_SHIFT 0
#define XCVR_END_OF_SEQ_END_OF_TX_WU_WIDTH 8
#define XCVR_END_OF_SEQ_END_OF_TX_WU(x) (((uint32_t)(((uint32_t)(x))<<XCVR_END_OF_SEQ_END_OF_TX_WU_SHIFT))&XCVR_END_OF_SEQ_END_OF_TX_WU_MASK)
#define XCVR_END_OF_SEQ_END_OF_TX_WD_MASK 0xFF00u
#define XCVR_END_OF_SEQ_END_OF_TX_WD_SHIFT 8
#define XCVR_END_OF_SEQ_END_OF_TX_WD_WIDTH 8
#define XCVR_END_OF_SEQ_END_OF_TX_WD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_END_OF_SEQ_END_OF_TX_WD_SHIFT))&XCVR_END_OF_SEQ_END_OF_TX_WD_MASK)
#define XCVR_END_OF_SEQ_END_OF_RX_WU_MASK 0xFF0000u
#define XCVR_END_OF_SEQ_END_OF_RX_WU_SHIFT 16
#define XCVR_END_OF_SEQ_END_OF_RX_WU_WIDTH 8
#define XCVR_END_OF_SEQ_END_OF_RX_WU(x) (((uint32_t)(((uint32_t)(x))<<XCVR_END_OF_SEQ_END_OF_RX_WU_SHIFT))&XCVR_END_OF_SEQ_END_OF_RX_WU_MASK)
#define XCVR_END_OF_SEQ_END_OF_RX_WD_MASK 0xFF000000u
#define XCVR_END_OF_SEQ_END_OF_RX_WD_SHIFT 24
#define XCVR_END_OF_SEQ_END_OF_RX_WD_WIDTH 8
#define XCVR_END_OF_SEQ_END_OF_RX_WD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_END_OF_SEQ_END_OF_RX_WD_SHIFT))&XCVR_END_OF_SEQ_END_OF_RX_WD_MASK)
/* TSM_OVRD0 Bit Fields */
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_EN_MASK 0x1u
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_EN_SHIFT 0
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_MASK 0x2u
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_SHIFT 1
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_REG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_REG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_EN_MASK 0x4u
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_EN_SHIFT 2
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_MASK 0x8u
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_SHIFT 3
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_REG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_EN_MASK 0x10u
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_EN_SHIFT 4
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_MASK 0x20u
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_SHIFT 5
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_QGEN_REG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_EN_MASK 0x40u
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_EN_SHIFT 6
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_MASK 0x80u
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_SHIFT 7
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_TCA_TX_REG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_EN_MASK 0x100u
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_EN_SHIFT 8
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_MASK 0x200u
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_SHIFT 9
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_ADC_ANA_REG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_EN_MASK 0x400u
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_EN_SHIFT 10
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_MASK 0x800u
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_SHIFT 11
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_ADC_DIG_REG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_EN_MASK 0x1000u
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_EN_SHIFT 12
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_MASK 0x2000u
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_SHIFT 13
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_XTAL_PLL_REF_CLK_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_EN_MASK 0x4000u
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_EN_SHIFT 14
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_MASK 0x8000u
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_SHIFT 15
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_XTAL_ADC_REF_CLK_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_EN_MASK 0x10000u
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_EN_SHIFT 16
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_MASK 0x20000u
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_SHIFT 17
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_AUTOTUNE_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_EN_MASK 0x40000u
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_EN_SHIFT 18
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_MASK 0x80000u
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_SHIFT 19
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_CYCLE_SLIP_LD_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_EN_MASK 0x100000u
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_EN_SHIFT 20
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_MASK 0x200000u
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_SHIFT 21
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_EN_MASK 0x400000u
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_EN_SHIFT 22
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_MASK 0x800000u
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_SHIFT 23
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_BUF_RX_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_EN_MASK 0x1000000u
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_EN_SHIFT 24
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_MASK 0x2000000u
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_SHIFT 25
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_VCO_BUF_TX_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_EN_MASK 0x4000000u
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_EN_SHIFT 26
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_MASK 0x8000000u
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_SHIFT 27
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_PA_BUF_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_EN_MASK 0x10000000u
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_EN_SHIFT 28
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_MASK 0x20000000u
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_SHIFT 29
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_LDV_EN_OVRD_MASK)
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN_MASK 0x40000000u
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN_SHIFT 30
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_MASK 0x80000000u
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_SHIFT 31
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_SHIFT))&XCVR_TSM_OVRD0_PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_MASK)
/* TSM_OVRD1 Bit Fields */
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN_MASK 0x1u
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN_SHIFT 0
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_MASK 0x2u
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_SHIFT 1
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_PLL_TX_LDV_RIPPLE_MUX_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_EN_MASK 0x4u
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_EN_SHIFT 2
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_MASK 0x8u
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_SHIFT 3
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_PLL_FILTER_CHARGE_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_EN_MASK 0x10u
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_EN_SHIFT 4
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_MASK 0x20u
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_SHIFT 5
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_PLL_PHDET_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_EN_MASK 0x40u
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_EN_SHIFT 6
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_QGEN25_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_QGEN25_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_MASK 0x80u
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_SHIFT 7
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_QGEN25_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_QGEN25_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_QGEN25_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_TX_EN_OVRD_EN_MASK 0x100u
#define XCVR_TSM_OVRD1_TX_EN_OVRD_EN_SHIFT 8
#define XCVR_TSM_OVRD1_TX_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_TX_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_TX_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_TX_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_TX_EN_OVRD_MASK 0x200u
#define XCVR_TSM_OVRD1_TX_EN_OVRD_SHIFT 9
#define XCVR_TSM_OVRD1_TX_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_TX_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_TX_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_TX_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_EN_MASK 0x400u
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_EN_SHIFT 10
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_MASK 0x800u
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_SHIFT 11
#define XCVR_TSM_OVRD1_ADC_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_EN_MASK 0x1000u
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_EN_SHIFT 12
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_MASK 0x2000u
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_SHIFT 13
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_BIAS_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_EN_MASK 0x4000u
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_EN_SHIFT 14
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_MASK 0x8000u
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_SHIFT 15
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_CLK_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_EN_MASK 0x10000u
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_EN_SHIFT 16
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_MASK 0x20000u
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_SHIFT 17
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_I_ADC_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_EN_MASK 0x40000u
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_EN_SHIFT 18
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_MASK 0x80000u
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_SHIFT 19
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_Q_ADC_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_EN_MASK 0x100000u
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_EN_SHIFT 20
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_MASK 0x200000u
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_SHIFT 21
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_DAC1_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_EN_MASK 0x400000u
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_EN_SHIFT 22
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_MASK 0x800000u
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_SHIFT 23
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_DAC2_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_EN_MASK 0x1000000u
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_EN_SHIFT 24
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_MASK 0x2000000u
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_SHIFT 25
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_ADC_RST_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_ADC_RST_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_EN_MASK 0x4000000u
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_EN_SHIFT 26
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_BBF_I_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_BBF_I_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_MASK 0x8000000u
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_SHIFT 27
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_BBF_I_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_BBF_I_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_BBF_I_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_EN_MASK 0x10000000u
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_EN_SHIFT 28
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_MASK 0x20000000u
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_SHIFT 29
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_BBF_Q_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_BBF_Q_EN_OVRD_MASK)
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_EN_MASK 0x40000000u
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_EN_SHIFT 30
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_MASK 0x80000000u
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_SHIFT 31
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_SHIFT))&XCVR_TSM_OVRD1_BBF_PDET_EN_OVRD_MASK)
/* TSM_OVRD2 Bit Fields */
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_EN_MASK 0x1u
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_EN_SHIFT 0
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_MASK 0x2u
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_SHIFT 1
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_BBF_DCOC_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_EN_MASK 0x4u
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_EN_SHIFT 2
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TCA_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_TCA_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_MASK 0x8u
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_SHIFT 3
#define XCVR_TSM_OVRD2_TCA_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_TCA_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TCA_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_TCA_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_EN_MASK 0x10u
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_EN_SHIFT 4
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_I_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_TZA_I_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_MASK 0x20u
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_SHIFT 5
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_I_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_I_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_TZA_I_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_EN_MASK 0x40u
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_EN_SHIFT 6
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_MASK 0x80u
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_SHIFT 7
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_Q_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_TZA_Q_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_EN_MASK 0x100u
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_EN_SHIFT 8
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_MASK 0x200u
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_SHIFT 9
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_TZA_PDET_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_EN_MASK 0x400u
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_EN_SHIFT 10
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_MASK 0x800u
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_SHIFT 11
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_TZA_DCOC_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_EN_MASK 0x1000u
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_EN_SHIFT 12
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_MASK 0x2000u
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_SHIFT 13
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_PLL_DIG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_EN_MASK 0x4000u
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_EN_SHIFT 14
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_MASK 0x8000u
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_SHIFT 15
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_TX_DIG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_TX_DIG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_EN_MASK 0x10000u
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_EN_SHIFT 16
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_MASK 0x20000u
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_SHIFT 17
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_RX_DIG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_RX_DIG_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_EN_MASK 0x40000u
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_EN_SHIFT 18
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_RX_INIT_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_RX_INIT_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_MASK 0x80000u
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_SHIFT 19
#define XCVR_TSM_OVRD2_RX_INIT_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_RX_INIT_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_RX_INIT_OVRD_SHIFT))&XCVR_TSM_OVRD2_RX_INIT_OVRD_MASK)
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_EN_MASK 0x100000u
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_EN_SHIFT 20
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_MASK 0x200000u
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_SHIFT 21
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_SIGMA_DELTA_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_EN_MASK 0x400000u
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_EN_SHIFT 22
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_MASK 0x800000u
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_SHIFT 23
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_ZBDEM_RX_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_EN_MASK 0x1000000u
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_EN_SHIFT 24
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_DCOC_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_DCOC_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_MASK 0x2000000u
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_SHIFT 25
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_DCOC_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_DCOC_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_DCOC_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_EN_MASK 0x4000000u
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_EN_SHIFT 26
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_DCOC_INIT_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_DCOC_INIT_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_MASK 0x8000000u
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_SHIFT 27
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_DCOC_INIT_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_DCOC_INIT_OVRD_SHIFT))&XCVR_TSM_OVRD2_DCOC_INIT_OVRD_MASK)
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_EN_MASK 0x10000000u
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_EN_SHIFT 28
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_MASK 0x20000000u
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_SHIFT 29
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_FREQ_TARG_LD_EN_OVRD_MASK)
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_EN_MASK 0x40000000u
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_EN_SHIFT 30
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_MASK 0x80000000u
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_SHIFT 31
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_SHIFT))&XCVR_TSM_OVRD2_SAR_ADC_TRIG_EN_OVRD_MASK)
/* TSM_OVRD3 Bit Fields */
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_EN_MASK 0x1u
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_EN_SHIFT 0
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_MASK 0x2u
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_SHIFT 1
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE0_EN_OVRD_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_EN_MASK 0x4u
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_EN_SHIFT 2
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_MASK 0x8u
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_SHIFT 3
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE1_EN_OVRD_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_EN_MASK 0x10u
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_EN_SHIFT 4
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_MASK 0x20u
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_SHIFT 5
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE2_EN_OVRD_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_EN_MASK 0x40u
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_EN_SHIFT 6
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_EN_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_EN_MASK)
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_MASK 0x80u
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_SHIFT 7
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_WIDTH 1
#define XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_SHIFT))&XCVR_TSM_OVRD3_TSM_SPARE3_EN_OVRD_MASK)
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_EN_MASK 0x100u
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_EN_SHIFT 8
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TX_MODE_OVRD_EN_SHIFT))&XCVR_TSM_OVRD3_TX_MODE_OVRD_EN_MASK)
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_MASK 0x200u
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_SHIFT 9
#define XCVR_TSM_OVRD3_TX_MODE_OVRD_WIDTH 1
#define XCVR_TSM_OVRD3_TX_MODE_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_TX_MODE_OVRD_SHIFT))&XCVR_TSM_OVRD3_TX_MODE_OVRD_MASK)
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_EN_MASK 0x400u
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_EN_SHIFT 10
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_EN_WIDTH 1
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_RX_MODE_OVRD_EN_SHIFT))&XCVR_TSM_OVRD3_RX_MODE_OVRD_EN_MASK)
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_MASK 0x800u
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_SHIFT 11
#define XCVR_TSM_OVRD3_RX_MODE_OVRD_WIDTH 1
#define XCVR_TSM_OVRD3_RX_MODE_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_OVRD3_RX_MODE_OVRD_SHIFT))&XCVR_TSM_OVRD3_RX_MODE_OVRD_MASK)
/* PA_POWER Bit Fields */
#define XCVR_PA_POWER_PA_POWER_MASK 0xFu
#define XCVR_PA_POWER_PA_POWER_SHIFT 0
#define XCVR_PA_POWER_PA_POWER_WIDTH 4
#define XCVR_PA_POWER_PA_POWER(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_POWER_PA_POWER_SHIFT))&XCVR_PA_POWER_PA_POWER_MASK)
/* PA_BIAS_TBL0 Bit Fields */
#define XCVR_PA_BIAS_TBL0_PA_BIAS0_MASK 0xFu
#define XCVR_PA_BIAS_TBL0_PA_BIAS0_SHIFT 0
#define XCVR_PA_BIAS_TBL0_PA_BIAS0_WIDTH 4
#define XCVR_PA_BIAS_TBL0_PA_BIAS0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL0_PA_BIAS0_SHIFT))&XCVR_PA_BIAS_TBL0_PA_BIAS0_MASK)
#define XCVR_PA_BIAS_TBL0_PA_BIAS1_MASK 0xF00u
#define XCVR_PA_BIAS_TBL0_PA_BIAS1_SHIFT 8
#define XCVR_PA_BIAS_TBL0_PA_BIAS1_WIDTH 4
#define XCVR_PA_BIAS_TBL0_PA_BIAS1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL0_PA_BIAS1_SHIFT))&XCVR_PA_BIAS_TBL0_PA_BIAS1_MASK)
#define XCVR_PA_BIAS_TBL0_PA_BIAS2_MASK 0xF0000u
#define XCVR_PA_BIAS_TBL0_PA_BIAS2_SHIFT 16
#define XCVR_PA_BIAS_TBL0_PA_BIAS2_WIDTH 4
#define XCVR_PA_BIAS_TBL0_PA_BIAS2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL0_PA_BIAS2_SHIFT))&XCVR_PA_BIAS_TBL0_PA_BIAS2_MASK)
#define XCVR_PA_BIAS_TBL0_PA_BIAS3_MASK 0xF000000u
#define XCVR_PA_BIAS_TBL0_PA_BIAS3_SHIFT 24
#define XCVR_PA_BIAS_TBL0_PA_BIAS3_WIDTH 4
#define XCVR_PA_BIAS_TBL0_PA_BIAS3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL0_PA_BIAS3_SHIFT))&XCVR_PA_BIAS_TBL0_PA_BIAS3_MASK)
/* PA_BIAS_TBL1 Bit Fields */
#define XCVR_PA_BIAS_TBL1_PA_BIAS4_MASK 0xFu
#define XCVR_PA_BIAS_TBL1_PA_BIAS4_SHIFT 0
#define XCVR_PA_BIAS_TBL1_PA_BIAS4_WIDTH 4
#define XCVR_PA_BIAS_TBL1_PA_BIAS4(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL1_PA_BIAS4_SHIFT))&XCVR_PA_BIAS_TBL1_PA_BIAS4_MASK)
#define XCVR_PA_BIAS_TBL1_PA_BIAS5_MASK 0xF00u
#define XCVR_PA_BIAS_TBL1_PA_BIAS5_SHIFT 8
#define XCVR_PA_BIAS_TBL1_PA_BIAS5_WIDTH 4
#define XCVR_PA_BIAS_TBL1_PA_BIAS5(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL1_PA_BIAS5_SHIFT))&XCVR_PA_BIAS_TBL1_PA_BIAS5_MASK)
#define XCVR_PA_BIAS_TBL1_PA_BIAS6_MASK 0xF0000u
#define XCVR_PA_BIAS_TBL1_PA_BIAS6_SHIFT 16
#define XCVR_PA_BIAS_TBL1_PA_BIAS6_WIDTH 4
#define XCVR_PA_BIAS_TBL1_PA_BIAS6(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL1_PA_BIAS6_SHIFT))&XCVR_PA_BIAS_TBL1_PA_BIAS6_MASK)
#define XCVR_PA_BIAS_TBL1_PA_BIAS7_MASK 0xF000000u
#define XCVR_PA_BIAS_TBL1_PA_BIAS7_SHIFT 24
#define XCVR_PA_BIAS_TBL1_PA_BIAS7_WIDTH 4
#define XCVR_PA_BIAS_TBL1_PA_BIAS7(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PA_BIAS_TBL1_PA_BIAS7_SHIFT))&XCVR_PA_BIAS_TBL1_PA_BIAS7_MASK)
/* RECYCLE_COUNT Bit Fields */
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT0_MASK 0xFFu
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT0_SHIFT 0
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT0_WIDTH 8
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT0(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RECYCLE_COUNT_RECYCLE_COUNT0_SHIFT))&XCVR_RECYCLE_COUNT_RECYCLE_COUNT0_MASK)
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT1_MASK 0xFF00u
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT1_SHIFT 8
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT1_WIDTH 8
#define XCVR_RECYCLE_COUNT_RECYCLE_COUNT1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RECYCLE_COUNT_RECYCLE_COUNT1_SHIFT))&XCVR_RECYCLE_COUNT_RECYCLE_COUNT1_MASK)
/* TSM_TIMING00 Bit Fields */
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING00_PLL_REG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING00_PLL_REG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING00_PLL_REG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING00_PLL_REG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING00_PLL_REG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING00_PLL_REG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING00_PLL_REG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING00_PLL_REG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING00_PLL_REG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING00_PLL_REG_EN_RX_LO_MASK)
/* TSM_TIMING01 Bit Fields */
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING01_PLL_VCO_REG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING01_PLL_VCO_REG_EN_RX_LO_MASK)
/* TSM_TIMING02 Bit Fields */
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING02_QGEN_REG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING02_QGEN_REG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING02_QGEN_REG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING02_QGEN_REG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING02_QGEN_REG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING02_QGEN_REG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING02_QGEN_REG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING02_QGEN_REG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING02_QGEN_REG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING02_QGEN_REG_EN_RX_LO_MASK)
/* TSM_TIMING03 Bit Fields */
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING03_TCA_TX_REG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING03_TCA_TX_REG_EN_RX_LO_MASK)
/* TSM_TIMING04 Bit Fields */
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING04_ADC_REG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING04_ADC_REG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING04_ADC_REG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING04_ADC_REG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING04_ADC_REG_EN_RX_LO_MASK)
/* TSM_TIMING05 Bit Fields */
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING05_PLL_REF_CLK_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING05_PLL_REF_CLK_EN_RX_LO_MASK)
/* TSM_TIMING06 Bit Fields */
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING06_ADC_CLK_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING06_ADC_CLK_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING06_ADC_CLK_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING06_ADC_CLK_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING06_ADC_CLK_EN_RX_LO_MASK)
/* TSM_TIMING07 Bit Fields */
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING07_PLL_VCO_AUTOTUNE_EN_RX_LO_MASK)
/* TSM_TIMING08 Bit Fields */
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING08_PLL_CYCLE_SLIP_LD_EN_RX_LO_MASK)
/* TSM_TIMING09 Bit Fields */
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING09_PLL_VCO_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING09_PLL_VCO_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING09_PLL_VCO_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING09_PLL_VCO_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING09_PLL_VCO_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING09_PLL_VCO_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING09_PLL_VCO_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING09_PLL_VCO_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING09_PLL_VCO_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING09_PLL_VCO_EN_RX_LO_MASK)
/* TSM_TIMING10 Bit Fields */
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING10_PLL_VCO_BUF_RX_EN_RX_LO_MASK)
/* TSM_TIMING11 Bit Fields */
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING11_PLL_VCO_BUF_TX_EN_TX_LO_MASK)
/* TSM_TIMING12 Bit Fields */
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING12_PLL_PA_BUF_EN_TX_LO_MASK)
/* TSM_TIMING13 Bit Fields */
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING13_PLL_LDV_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING13_PLL_LDV_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING13_PLL_LDV_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING13_PLL_LDV_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING13_PLL_LDV_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING13_PLL_LDV_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING13_PLL_LDV_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING13_PLL_LDV_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING13_PLL_LDV_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING13_PLL_LDV_EN_RX_LO_MASK)
/* TSM_TIMING14 Bit Fields */
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING14_PLL_RX_LDV_RIPPLE_MUX_EN_RX_LO_MASK)
/* TSM_TIMING15 Bit Fields */
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING15_PLL_TX_LDV_RIPPLE_MUX_EN_TX_LO_MASK)
/* TSM_TIMING16 Bit Fields */
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING16_PLL_FILTER_CHARGE_EN_RX_LO_MASK)
/* TSM_TIMING17 Bit Fields */
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING17_PLL_PHDET_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING17_PLL_PHDET_EN_RX_LO_MASK)
/* TSM_TIMING18 Bit Fields */
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING18_QGEN25_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING18_QGEN25_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING18_QGEN25_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING18_QGEN25_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING18_QGEN25_EN_RX_LO_MASK)
/* TSM_TIMING19 Bit Fields */
#define XCVR_TSM_TIMING19_TX_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING19_TX_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING19_TX_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING19_TX_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING19_TX_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING19_TX_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING19_TX_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING19_TX_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING19_TX_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING19_TX_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING19_TX_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING19_TX_EN_TX_LO_MASK)
/* TSM_TIMING20 Bit Fields */
#define XCVR_TSM_TIMING20_ADC_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING20_ADC_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING20_ADC_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING20_ADC_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING20_ADC_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING20_ADC_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING20_ADC_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING20_ADC_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING20_ADC_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING20_ADC_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING20_ADC_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING20_ADC_EN_RX_LO_MASK)
/* TSM_TIMING21 Bit Fields */
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING21_ADC_I_Q_EN_RX_LO_MASK)
/* TSM_TIMING22 Bit Fields */
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING22_ADC_DAC_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING22_ADC_DAC_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING22_ADC_DAC_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING22_ADC_DAC_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING22_ADC_DAC_EN_RX_LO_MASK)
/* TSM_TIMING23 Bit Fields */
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING23_ADC_RST_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING23_ADC_RST_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING23_ADC_RST_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING23_ADC_RST_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING23_ADC_RST_EN_RX_LO_MASK)
/* TSM_TIMING24 Bit Fields */
#define XCVR_TSM_TIMING24_BBF_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING24_BBF_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING24_BBF_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING24_BBF_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING24_BBF_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING24_BBF_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING24_BBF_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING24_BBF_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING24_BBF_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING24_BBF_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING24_BBF_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING24_BBF_EN_RX_LO_MASK)
/* TSM_TIMING25 Bit Fields */
#define XCVR_TSM_TIMING25_TCA_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING25_TCA_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING25_TCA_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING25_TCA_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING25_TCA_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING25_TCA_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING25_TCA_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING25_TCA_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING25_TCA_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING25_TCA_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING25_TCA_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING25_TCA_EN_RX_LO_MASK)
/* TSM_TIMING26 Bit Fields */
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING26_PLL_DIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING26_PLL_DIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING26_PLL_DIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING26_PLL_DIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING26_PLL_DIG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING26_PLL_DIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING26_PLL_DIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING26_PLL_DIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING26_PLL_DIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING26_PLL_DIG_EN_RX_LO_MASK)
/* TSM_TIMING27 Bit Fields */
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING27_TX_DIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING27_TX_DIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING27_TX_DIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING27_TX_DIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING27_TX_DIG_EN_TX_LO_MASK)
/* TSM_TIMING28 Bit Fields */
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING28_RX_DIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING28_RX_DIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING28_RX_DIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING28_RX_DIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING28_RX_DIG_EN_RX_LO_MASK)
/* TSM_TIMING29 Bit Fields */
#define XCVR_TSM_TIMING29_RX_INIT_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING29_RX_INIT_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING29_RX_INIT_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING29_RX_INIT_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING29_RX_INIT_RX_HI_SHIFT))&XCVR_TSM_TIMING29_RX_INIT_RX_HI_MASK)
#define XCVR_TSM_TIMING29_RX_INIT_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING29_RX_INIT_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING29_RX_INIT_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING29_RX_INIT_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING29_RX_INIT_RX_LO_SHIFT))&XCVR_TSM_TIMING29_RX_INIT_RX_LO_MASK)
/* TSM_TIMING30 Bit Fields */
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING30_SIGMA_DELTA_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING30_SIGMA_DELTA_EN_RX_LO_MASK)
/* TSM_TIMING31 Bit Fields */
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING31_ZBDEM_RX_EN_RX_LO_MASK)
/* TSM_TIMING32 Bit Fields */
#define XCVR_TSM_TIMING32_DCOC_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING32_DCOC_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING32_DCOC_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING32_DCOC_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING32_DCOC_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING32_DCOC_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING32_DCOC_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING32_DCOC_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING32_DCOC_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING32_DCOC_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING32_DCOC_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING32_DCOC_EN_RX_LO_MASK)
/* TSM_TIMING33 Bit Fields */
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING33_DCOC_INIT_RX_HI_SHIFT))&XCVR_TSM_TIMING33_DCOC_INIT_RX_HI_MASK)
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING33_DCOC_INIT_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING33_DCOC_INIT_RX_LO_SHIFT))&XCVR_TSM_TIMING33_DCOC_INIT_RX_LO_MASK)
/* TSM_TIMING34 Bit Fields */
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING34_FREQ_TARG_LD_EN_RX_LO_MASK)
/* TSM_TIMING35 Bit Fields */
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING35_SAR_ADC_TRIG_EN_RX_LO_MASK)
/* TSM_TIMING36 Bit Fields */
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING36_TSM_SPARE0_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING36_TSM_SPARE0_EN_RX_LO_MASK)
/* TSM_TIMING37 Bit Fields */
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING37_TSM_SPARE1_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING37_TSM_SPARE1_EN_RX_LO_MASK)
/* TSM_TIMING38 Bit Fields */
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING38_TSM_SPARE2_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING38_TSM_SPARE2_EN_RX_LO_MASK)
/* TSM_TIMING39 Bit Fields */
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING39_TSM_SPARE3_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING39_TSM_SPARE3_EN_RX_LO_MASK)
/* TSM_TIMING40 Bit Fields */
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING40_GPIO0_TRIG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING40_GPIO0_TRIG_EN_RX_LO_MASK)
/* TSM_TIMING41 Bit Fields */
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING41_GPIO1_TRIG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING41_GPIO1_TRIG_EN_RX_LO_MASK)
/* TSM_TIMING42 Bit Fields */
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING42_GPIO2_TRIG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING42_GPIO2_TRIG_EN_RX_LO_MASK)
/* TSM_TIMING43 Bit Fields */
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_HI_MASK 0xFFu
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_HI_SHIFT 0
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_HI_WIDTH 8
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_HI_SHIFT))&XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_HI_MASK)
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_LO_MASK 0xFF00u
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_LO_SHIFT 8
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_LO_WIDTH 8
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_LO_SHIFT))&XCVR_TSM_TIMING43_GPIO3_TRIG_EN_TX_LO_MASK)
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_HI_MASK 0xFF0000u
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_HI_SHIFT 16
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_HI_WIDTH 8
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_HI_SHIFT))&XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_HI_MASK)
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_LO_MASK 0xFF000000u
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_LO_SHIFT 24
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_LO_WIDTH 8
#define XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_LO_SHIFT))&XCVR_TSM_TIMING43_GPIO3_TRIG_EN_RX_LO_MASK)
/* CORR_CTRL Bit Fields */
#define XCVR_CORR_CTRL_CORR_VT_MASK 0xFFu
#define XCVR_CORR_CTRL_CORR_VT_SHIFT 0
#define XCVR_CORR_CTRL_CORR_VT_WIDTH 8
#define XCVR_CORR_CTRL_CORR_VT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CORR_CTRL_CORR_VT_SHIFT))&XCVR_CORR_CTRL_CORR_VT_MASK)
#define XCVR_CORR_CTRL_CORR_NVAL_MASK 0x700u
#define XCVR_CORR_CTRL_CORR_NVAL_SHIFT 8
#define XCVR_CORR_CTRL_CORR_NVAL_WIDTH 3
#define XCVR_CORR_CTRL_CORR_NVAL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CORR_CTRL_CORR_NVAL_SHIFT))&XCVR_CORR_CTRL_CORR_NVAL_MASK)
#define XCVR_CORR_CTRL_MAX_CORR_EN_MASK 0x800u
#define XCVR_CORR_CTRL_MAX_CORR_EN_SHIFT 11
#define XCVR_CORR_CTRL_MAX_CORR_EN_WIDTH 1
#define XCVR_CORR_CTRL_MAX_CORR_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CORR_CTRL_MAX_CORR_EN_SHIFT))&XCVR_CORR_CTRL_MAX_CORR_EN_MASK)
#define XCVR_CORR_CTRL_RX_MAX_CORR_MASK 0xFF0000u
#define XCVR_CORR_CTRL_RX_MAX_CORR_SHIFT 16
#define XCVR_CORR_CTRL_RX_MAX_CORR_WIDTH 8
#define XCVR_CORR_CTRL_RX_MAX_CORR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CORR_CTRL_RX_MAX_CORR_SHIFT))&XCVR_CORR_CTRL_RX_MAX_CORR_MASK)
#define XCVR_CORR_CTRL_RX_MAX_PREAMBLE_MASK 0xFF000000u
#define XCVR_CORR_CTRL_RX_MAX_PREAMBLE_SHIFT 24
#define XCVR_CORR_CTRL_RX_MAX_PREAMBLE_WIDTH 8
#define XCVR_CORR_CTRL_RX_MAX_PREAMBLE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_CORR_CTRL_RX_MAX_PREAMBLE_SHIFT))&XCVR_CORR_CTRL_RX_MAX_PREAMBLE_MASK)
/* PN_TYPE Bit Fields */
#define XCVR_PN_TYPE_PN_TYPE_MASK 0x1u
#define XCVR_PN_TYPE_PN_TYPE_SHIFT 0
#define XCVR_PN_TYPE_PN_TYPE_WIDTH 1
#define XCVR_PN_TYPE_PN_TYPE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PN_TYPE_PN_TYPE_SHIFT))&XCVR_PN_TYPE_PN_TYPE_MASK)
#define XCVR_PN_TYPE_TX_INV_MASK 0x2u
#define XCVR_PN_TYPE_TX_INV_SHIFT 1
#define XCVR_PN_TYPE_TX_INV_WIDTH 1
#define XCVR_PN_TYPE_TX_INV(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PN_TYPE_TX_INV_SHIFT))&XCVR_PN_TYPE_TX_INV_MASK)
/* PN_CODE Bit Fields */
#define XCVR_PN_CODE_PN_LSB_MASK 0xFFFFu
#define XCVR_PN_CODE_PN_LSB_SHIFT 0
#define XCVR_PN_CODE_PN_LSB_WIDTH 16
#define XCVR_PN_CODE_PN_LSB(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PN_CODE_PN_LSB_SHIFT))&XCVR_PN_CODE_PN_LSB_MASK)
#define XCVR_PN_CODE_PN_MSB_MASK 0xFFFF0000u
#define XCVR_PN_CODE_PN_MSB_SHIFT 16
#define XCVR_PN_CODE_PN_MSB_WIDTH 16
#define XCVR_PN_CODE_PN_MSB(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PN_CODE_PN_MSB_SHIFT))&XCVR_PN_CODE_PN_MSB_MASK)
/* SYNC_CTRL Bit Fields */
#define XCVR_SYNC_CTRL_SYNC_PER_MASK 0x7u
#define XCVR_SYNC_CTRL_SYNC_PER_SHIFT 0
#define XCVR_SYNC_CTRL_SYNC_PER_WIDTH 3
#define XCVR_SYNC_CTRL_SYNC_PER(x) (((uint32_t)(((uint32_t)(x))<<XCVR_SYNC_CTRL_SYNC_PER_SHIFT))&XCVR_SYNC_CTRL_SYNC_PER_MASK)
#define XCVR_SYNC_CTRL_TRACK_ENABLE_MASK 0x8u
#define XCVR_SYNC_CTRL_TRACK_ENABLE_SHIFT 3
#define XCVR_SYNC_CTRL_TRACK_ENABLE_WIDTH 1
#define XCVR_SYNC_CTRL_TRACK_ENABLE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_SYNC_CTRL_TRACK_ENABLE_SHIFT))&XCVR_SYNC_CTRL_TRACK_ENABLE_MASK)
/* SNF_THR Bit Fields */
#define XCVR_SNF_THR_SNF_THR_MASK 0xFFu
#define XCVR_SNF_THR_SNF_THR_SHIFT 0
#define XCVR_SNF_THR_SNF_THR_WIDTH 8
#define XCVR_SNF_THR_SNF_THR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_SNF_THR_SNF_THR_SHIFT))&XCVR_SNF_THR_SNF_THR_MASK)
/* FAD_THR Bit Fields */
#define XCVR_FAD_THR_FAD_THR_MASK 0xFFu
#define XCVR_FAD_THR_FAD_THR_SHIFT 0
#define XCVR_FAD_THR_FAD_THR_WIDTH 8
#define XCVR_FAD_THR_FAD_THR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_FAD_THR_FAD_THR_SHIFT))&XCVR_FAD_THR_FAD_THR_MASK)
/* ZBDEM_AFC Bit Fields */
#define XCVR_ZBDEM_AFC_AFC_EN_MASK 0x1u
#define XCVR_ZBDEM_AFC_AFC_EN_SHIFT 0
#define XCVR_ZBDEM_AFC_AFC_EN_WIDTH 1
#define XCVR_ZBDEM_AFC_AFC_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ZBDEM_AFC_AFC_EN_SHIFT))&XCVR_ZBDEM_AFC_AFC_EN_MASK)
#define XCVR_ZBDEM_AFC_DCD_EN_MASK 0x2u
#define XCVR_ZBDEM_AFC_DCD_EN_SHIFT 1
#define XCVR_ZBDEM_AFC_DCD_EN_WIDTH 1
#define XCVR_ZBDEM_AFC_DCD_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ZBDEM_AFC_DCD_EN_SHIFT))&XCVR_ZBDEM_AFC_DCD_EN_MASK)
#define XCVR_ZBDEM_AFC_AFC_OUT_MASK 0x1F00u
#define XCVR_ZBDEM_AFC_AFC_OUT_SHIFT 8
#define XCVR_ZBDEM_AFC_AFC_OUT_WIDTH 5
#define XCVR_ZBDEM_AFC_AFC_OUT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ZBDEM_AFC_AFC_OUT_SHIFT))&XCVR_ZBDEM_AFC_AFC_OUT_MASK)
/* LPPS_CTRL Bit Fields */
#define XCVR_LPPS_CTRL_LPPS_ENABLE_MASK 0x1u
#define XCVR_LPPS_CTRL_LPPS_ENABLE_SHIFT 0
#define XCVR_LPPS_CTRL_LPPS_ENABLE_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_ENABLE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_ENABLE_SHIFT))&XCVR_LPPS_CTRL_LPPS_ENABLE_MASK)
#define XCVR_LPPS_CTRL_LPPS_QGEN25_ALLOW_MASK 0x2u
#define XCVR_LPPS_CTRL_LPPS_QGEN25_ALLOW_SHIFT 1
#define XCVR_LPPS_CTRL_LPPS_QGEN25_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_QGEN25_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_QGEN25_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_QGEN25_ALLOW_MASK)
#define XCVR_LPPS_CTRL_LPPS_ADC_ALLOW_MASK 0x4u
#define XCVR_LPPS_CTRL_LPPS_ADC_ALLOW_SHIFT 2
#define XCVR_LPPS_CTRL_LPPS_ADC_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_ADC_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_ADC_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_ADC_ALLOW_MASK)
#define XCVR_LPPS_CTRL_LPPS_ADC_CLK_ALLOW_MASK 0x8u
#define XCVR_LPPS_CTRL_LPPS_ADC_CLK_ALLOW_SHIFT 3
#define XCVR_LPPS_CTRL_LPPS_ADC_CLK_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_ADC_CLK_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_ADC_CLK_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_ADC_CLK_ALLOW_MASK)
#define XCVR_LPPS_CTRL_LPPS_ADC_I_Q_ALLOW_MASK 0x10u
#define XCVR_LPPS_CTRL_LPPS_ADC_I_Q_ALLOW_SHIFT 4
#define XCVR_LPPS_CTRL_LPPS_ADC_I_Q_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_ADC_I_Q_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_ADC_I_Q_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_ADC_I_Q_ALLOW_MASK)
#define XCVR_LPPS_CTRL_LPPS_ADC_DAC_ALLOW_MASK 0x20u
#define XCVR_LPPS_CTRL_LPPS_ADC_DAC_ALLOW_SHIFT 5
#define XCVR_LPPS_CTRL_LPPS_ADC_DAC_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_ADC_DAC_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_ADC_DAC_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_ADC_DAC_ALLOW_MASK)
#define XCVR_LPPS_CTRL_LPPS_BBF_ALLOW_MASK 0x40u
#define XCVR_LPPS_CTRL_LPPS_BBF_ALLOW_SHIFT 6
#define XCVR_LPPS_CTRL_LPPS_BBF_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_BBF_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_BBF_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_BBF_ALLOW_MASK)
#define XCVR_LPPS_CTRL_LPPS_TCA_ALLOW_MASK 0x80u
#define XCVR_LPPS_CTRL_LPPS_TCA_ALLOW_SHIFT 7
#define XCVR_LPPS_CTRL_LPPS_TCA_ALLOW_WIDTH 1
#define XCVR_LPPS_CTRL_LPPS_TCA_ALLOW(x) (((uint32_t)(((uint32_t)(x))<<XCVR_LPPS_CTRL_LPPS_TCA_ALLOW_SHIFT))&XCVR_LPPS_CTRL_LPPS_TCA_ALLOW_MASK)
/* ADC_CTRL Bit Fields */
#define XCVR_ADC_CTRL_ADC_32MHZ_SEL_MASK 0x1u
#define XCVR_ADC_CTRL_ADC_32MHZ_SEL_SHIFT 0
#define XCVR_ADC_CTRL_ADC_32MHZ_SEL_WIDTH 1
#define XCVR_ADC_CTRL_ADC_32MHZ_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_CTRL_ADC_32MHZ_SEL_SHIFT))&XCVR_ADC_CTRL_ADC_32MHZ_SEL_MASK)
#define XCVR_ADC_CTRL_ADC_2X_CLK_SEL_MASK 0x4u
#define XCVR_ADC_CTRL_ADC_2X_CLK_SEL_SHIFT 2
#define XCVR_ADC_CTRL_ADC_2X_CLK_SEL_WIDTH 1
#define XCVR_ADC_CTRL_ADC_2X_CLK_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_CTRL_ADC_2X_CLK_SEL_SHIFT))&XCVR_ADC_CTRL_ADC_2X_CLK_SEL_MASK)
#define XCVR_ADC_CTRL_ADC_DITHER_ON_MASK 0x200u
#define XCVR_ADC_CTRL_ADC_DITHER_ON_SHIFT 9
#define XCVR_ADC_CTRL_ADC_DITHER_ON_WIDTH 1
#define XCVR_ADC_CTRL_ADC_DITHER_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_CTRL_ADC_DITHER_ON_SHIFT))&XCVR_ADC_CTRL_ADC_DITHER_ON_MASK)
#define XCVR_ADC_CTRL_ADC_TEST_ON_MASK 0x400u
#define XCVR_ADC_CTRL_ADC_TEST_ON_SHIFT 10
#define XCVR_ADC_CTRL_ADC_TEST_ON_WIDTH 1
#define XCVR_ADC_CTRL_ADC_TEST_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_CTRL_ADC_TEST_ON_SHIFT))&XCVR_ADC_CTRL_ADC_TEST_ON_MASK)
#define XCVR_ADC_CTRL_ADC_COMP_ON_MASK 0xFFFF0000u
#define XCVR_ADC_CTRL_ADC_COMP_ON_SHIFT 16
#define XCVR_ADC_CTRL_ADC_COMP_ON_WIDTH 16
#define XCVR_ADC_CTRL_ADC_COMP_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_CTRL_ADC_COMP_ON_SHIFT))&XCVR_ADC_CTRL_ADC_COMP_ON_MASK)
/* ADC_TUNE Bit Fields */
#define XCVR_ADC_TUNE_ADC_R1_TUNE_MASK 0x7u
#define XCVR_ADC_TUNE_ADC_R1_TUNE_SHIFT 0
#define XCVR_ADC_TUNE_ADC_R1_TUNE_WIDTH 3
#define XCVR_ADC_TUNE_ADC_R1_TUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TUNE_ADC_R1_TUNE_SHIFT))&XCVR_ADC_TUNE_ADC_R1_TUNE_MASK)
#define XCVR_ADC_TUNE_ADC_R2_TUNE_MASK 0x70u
#define XCVR_ADC_TUNE_ADC_R2_TUNE_SHIFT 4
#define XCVR_ADC_TUNE_ADC_R2_TUNE_WIDTH 3
#define XCVR_ADC_TUNE_ADC_R2_TUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TUNE_ADC_R2_TUNE_SHIFT))&XCVR_ADC_TUNE_ADC_R2_TUNE_MASK)
#define XCVR_ADC_TUNE_ADC_C1_TUNE_MASK 0xF0000u
#define XCVR_ADC_TUNE_ADC_C1_TUNE_SHIFT 16
#define XCVR_ADC_TUNE_ADC_C1_TUNE_WIDTH 4
#define XCVR_ADC_TUNE_ADC_C1_TUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TUNE_ADC_C1_TUNE_SHIFT))&XCVR_ADC_TUNE_ADC_C1_TUNE_MASK)
#define XCVR_ADC_TUNE_ADC_C2_TUNE_MASK 0xF00000u
#define XCVR_ADC_TUNE_ADC_C2_TUNE_SHIFT 20
#define XCVR_ADC_TUNE_ADC_C2_TUNE_WIDTH 4
#define XCVR_ADC_TUNE_ADC_C2_TUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TUNE_ADC_C2_TUNE_SHIFT))&XCVR_ADC_TUNE_ADC_C2_TUNE_MASK)
/* ADC_ADJ Bit Fields */
#define XCVR_ADC_ADJ_ADC_IB_OPAMP1_ADJ_MASK 0x7u
#define XCVR_ADC_ADJ_ADC_IB_OPAMP1_ADJ_SHIFT 0
#define XCVR_ADC_ADJ_ADC_IB_OPAMP1_ADJ_WIDTH 3
#define XCVR_ADC_ADJ_ADC_IB_OPAMP1_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_ADJ_ADC_IB_OPAMP1_ADJ_SHIFT))&XCVR_ADC_ADJ_ADC_IB_OPAMP1_ADJ_MASK)
#define XCVR_ADC_ADJ_ADC_IB_OPAMP2_ADJ_MASK 0x70u
#define XCVR_ADC_ADJ_ADC_IB_OPAMP2_ADJ_SHIFT 4
#define XCVR_ADC_ADJ_ADC_IB_OPAMP2_ADJ_WIDTH 3
#define XCVR_ADC_ADJ_ADC_IB_OPAMP2_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_ADJ_ADC_IB_OPAMP2_ADJ_SHIFT))&XCVR_ADC_ADJ_ADC_IB_OPAMP2_ADJ_MASK)
#define XCVR_ADC_ADJ_ADC_IB_DAC1_ADJ_MASK 0x7000u
#define XCVR_ADC_ADJ_ADC_IB_DAC1_ADJ_SHIFT 12
#define XCVR_ADC_ADJ_ADC_IB_DAC1_ADJ_WIDTH 3
#define XCVR_ADC_ADJ_ADC_IB_DAC1_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_ADJ_ADC_IB_DAC1_ADJ_SHIFT))&XCVR_ADC_ADJ_ADC_IB_DAC1_ADJ_MASK)
#define XCVR_ADC_ADJ_ADC_IB_DAC2_ADJ_MASK 0x70000u
#define XCVR_ADC_ADJ_ADC_IB_DAC2_ADJ_SHIFT 16
#define XCVR_ADC_ADJ_ADC_IB_DAC2_ADJ_WIDTH 3
#define XCVR_ADC_ADJ_ADC_IB_DAC2_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_ADJ_ADC_IB_DAC2_ADJ_SHIFT))&XCVR_ADC_ADJ_ADC_IB_DAC2_ADJ_MASK)
#define XCVR_ADC_ADJ_ADC_IB_FLSH_ADJ_MASK 0x7000000u
#define XCVR_ADC_ADJ_ADC_IB_FLSH_ADJ_SHIFT 24
#define XCVR_ADC_ADJ_ADC_IB_FLSH_ADJ_WIDTH 3
#define XCVR_ADC_ADJ_ADC_IB_FLSH_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_ADJ_ADC_IB_FLSH_ADJ_SHIFT))&XCVR_ADC_ADJ_ADC_IB_FLSH_ADJ_MASK)
#define XCVR_ADC_ADJ_ADC_FLSH_RES_ADJ_MASK 0x70000000u
#define XCVR_ADC_ADJ_ADC_FLSH_RES_ADJ_SHIFT 28
#define XCVR_ADC_ADJ_ADC_FLSH_RES_ADJ_WIDTH 3
#define XCVR_ADC_ADJ_ADC_FLSH_RES_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_ADJ_ADC_FLSH_RES_ADJ_SHIFT))&XCVR_ADC_ADJ_ADC_FLSH_RES_ADJ_MASK)
/* ADC_REGS Bit Fields */
#define XCVR_ADC_REGS_ADC_ANA_REG_SUPPLY_MASK 0xFu
#define XCVR_ADC_REGS_ADC_ANA_REG_SUPPLY_SHIFT 0
#define XCVR_ADC_REGS_ADC_ANA_REG_SUPPLY_WIDTH 4
#define XCVR_ADC_REGS_ADC_ANA_REG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_REGS_ADC_ANA_REG_SUPPLY_SHIFT))&XCVR_ADC_REGS_ADC_ANA_REG_SUPPLY_MASK)
#define XCVR_ADC_REGS_ADC_REG_DIG_SUPPLY_MASK 0xF0u
#define XCVR_ADC_REGS_ADC_REG_DIG_SUPPLY_SHIFT 4
#define XCVR_ADC_REGS_ADC_REG_DIG_SUPPLY_WIDTH 4
#define XCVR_ADC_REGS_ADC_REG_DIG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_REGS_ADC_REG_DIG_SUPPLY_SHIFT))&XCVR_ADC_REGS_ADC_REG_DIG_SUPPLY_MASK)
#define XCVR_ADC_REGS_ADC_ANA_REG_BYPASS_ON_MASK 0x100u
#define XCVR_ADC_REGS_ADC_ANA_REG_BYPASS_ON_SHIFT 8
#define XCVR_ADC_REGS_ADC_ANA_REG_BYPASS_ON_WIDTH 1
#define XCVR_ADC_REGS_ADC_ANA_REG_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_REGS_ADC_ANA_REG_BYPASS_ON_SHIFT))&XCVR_ADC_REGS_ADC_ANA_REG_BYPASS_ON_MASK)
#define XCVR_ADC_REGS_ADC_DIG_REG_BYPASS_ON_MASK 0x200u
#define XCVR_ADC_REGS_ADC_DIG_REG_BYPASS_ON_SHIFT 9
#define XCVR_ADC_REGS_ADC_DIG_REG_BYPASS_ON_WIDTH 1
#define XCVR_ADC_REGS_ADC_DIG_REG_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_REGS_ADC_DIG_REG_BYPASS_ON_SHIFT))&XCVR_ADC_REGS_ADC_DIG_REG_BYPASS_ON_MASK)
#define XCVR_ADC_REGS_ADC_VCMREF_BYPASS_ON_MASK 0x8000u
#define XCVR_ADC_REGS_ADC_VCMREF_BYPASS_ON_SHIFT 15
#define XCVR_ADC_REGS_ADC_VCMREF_BYPASS_ON_WIDTH 1
#define XCVR_ADC_REGS_ADC_VCMREF_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_REGS_ADC_VCMREF_BYPASS_ON_SHIFT))&XCVR_ADC_REGS_ADC_VCMREF_BYPASS_ON_MASK)
#define XCVR_ADC_REGS_ADC_INTERNAL_IREF_BYPASS_ON_MASK 0x20000u
#define XCVR_ADC_REGS_ADC_INTERNAL_IREF_BYPASS_ON_SHIFT 17
#define XCVR_ADC_REGS_ADC_INTERNAL_IREF_BYPASS_ON_WIDTH 1
#define XCVR_ADC_REGS_ADC_INTERNAL_IREF_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_REGS_ADC_INTERNAL_IREF_BYPASS_ON_SHIFT))&XCVR_ADC_REGS_ADC_INTERNAL_IREF_BYPASS_ON_MASK)
/* ADC_TRIMS Bit Fields */
#define XCVR_ADC_TRIMS_ADC_IREF_OPAMPS_RES_TRIM_MASK 0x7u
#define XCVR_ADC_TRIMS_ADC_IREF_OPAMPS_RES_TRIM_SHIFT 0
#define XCVR_ADC_TRIMS_ADC_IREF_OPAMPS_RES_TRIM_WIDTH 3
#define XCVR_ADC_TRIMS_ADC_IREF_OPAMPS_RES_TRIM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TRIMS_ADC_IREF_OPAMPS_RES_TRIM_SHIFT))&XCVR_ADC_TRIMS_ADC_IREF_OPAMPS_RES_TRIM_MASK)
#define XCVR_ADC_TRIMS_ADC_IREF_FLSH_RES_TRIM_MASK 0x70u
#define XCVR_ADC_TRIMS_ADC_IREF_FLSH_RES_TRIM_SHIFT 4
#define XCVR_ADC_TRIMS_ADC_IREF_FLSH_RES_TRIM_WIDTH 3
#define XCVR_ADC_TRIMS_ADC_IREF_FLSH_RES_TRIM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TRIMS_ADC_IREF_FLSH_RES_TRIM_SHIFT))&XCVR_ADC_TRIMS_ADC_IREF_FLSH_RES_TRIM_MASK)
#define XCVR_ADC_TRIMS_ADC_VCM_TRIM_MASK 0x700u
#define XCVR_ADC_TRIMS_ADC_VCM_TRIM_SHIFT 8
#define XCVR_ADC_TRIMS_ADC_VCM_TRIM_WIDTH 3
#define XCVR_ADC_TRIMS_ADC_VCM_TRIM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TRIMS_ADC_VCM_TRIM_SHIFT))&XCVR_ADC_TRIMS_ADC_VCM_TRIM_MASK)
/* ADC_TEST_CTRL Bit Fields */
#define XCVR_ADC_TEST_CTRL_ADC_ATST_SEL_MASK 0x1Fu
#define XCVR_ADC_TEST_CTRL_ADC_ATST_SEL_SHIFT 0
#define XCVR_ADC_TEST_CTRL_ADC_ATST_SEL_WIDTH 5
#define XCVR_ADC_TEST_CTRL_ADC_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TEST_CTRL_ADC_ATST_SEL_SHIFT))&XCVR_ADC_TEST_CTRL_ADC_ATST_SEL_MASK)
#define XCVR_ADC_TEST_CTRL_ADC_DIG_REG_ATST_SEL_MASK 0x300u
#define XCVR_ADC_TEST_CTRL_ADC_DIG_REG_ATST_SEL_SHIFT 8
#define XCVR_ADC_TEST_CTRL_ADC_DIG_REG_ATST_SEL_WIDTH 2
#define XCVR_ADC_TEST_CTRL_ADC_DIG_REG_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TEST_CTRL_ADC_DIG_REG_ATST_SEL_SHIFT))&XCVR_ADC_TEST_CTRL_ADC_DIG_REG_ATST_SEL_MASK)
#define XCVR_ADC_TEST_CTRL_ADC_ANA_REG_ATST_SEL_MASK 0x3000u
#define XCVR_ADC_TEST_CTRL_ADC_ANA_REG_ATST_SEL_SHIFT 12
#define XCVR_ADC_TEST_CTRL_ADC_ANA_REG_ATST_SEL_WIDTH 2
#define XCVR_ADC_TEST_CTRL_ADC_ANA_REG_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TEST_CTRL_ADC_ANA_REG_ATST_SEL_SHIFT))&XCVR_ADC_TEST_CTRL_ADC_ANA_REG_ATST_SEL_MASK)
#define XCVR_ADC_TEST_CTRL_DCOC_ALPHA_RADIUS_GS_IDX_MASK 0x7000000u
#define XCVR_ADC_TEST_CTRL_DCOC_ALPHA_RADIUS_GS_IDX_SHIFT 24
#define XCVR_ADC_TEST_CTRL_DCOC_ALPHA_RADIUS_GS_IDX_WIDTH 3
#define XCVR_ADC_TEST_CTRL_DCOC_ALPHA_RADIUS_GS_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TEST_CTRL_DCOC_ALPHA_RADIUS_GS_IDX_SHIFT))&XCVR_ADC_TEST_CTRL_DCOC_ALPHA_RADIUS_GS_IDX_MASK)
#define XCVR_ADC_TEST_CTRL_ADC_SPARE3_MASK 0x8000000u
#define XCVR_ADC_TEST_CTRL_ADC_SPARE3_SHIFT 27
#define XCVR_ADC_TEST_CTRL_ADC_SPARE3_WIDTH 1
#define XCVR_ADC_TEST_CTRL_ADC_SPARE3(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ADC_TEST_CTRL_ADC_SPARE3_SHIFT))&XCVR_ADC_TEST_CTRL_ADC_SPARE3_MASK)
/* BBF_CTRL Bit Fields */
#define XCVR_BBF_CTRL_BBF_CAP_TUNE_MASK 0xFu
#define XCVR_BBF_CTRL_BBF_CAP_TUNE_SHIFT 0
#define XCVR_BBF_CTRL_BBF_CAP_TUNE_WIDTH 4
#define XCVR_BBF_CTRL_BBF_CAP_TUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_BBF_CAP_TUNE_SHIFT))&XCVR_BBF_CTRL_BBF_CAP_TUNE_MASK)
#define XCVR_BBF_CTRL_BBF_RES_TUNE2_MASK 0xF0u
#define XCVR_BBF_CTRL_BBF_RES_TUNE2_SHIFT 4
#define XCVR_BBF_CTRL_BBF_RES_TUNE2_WIDTH 4
#define XCVR_BBF_CTRL_BBF_RES_TUNE2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_BBF_RES_TUNE2_SHIFT))&XCVR_BBF_CTRL_BBF_RES_TUNE2_MASK)
#define XCVR_BBF_CTRL_BBF_CUR_CNTL_MASK 0x100u
#define XCVR_BBF_CTRL_BBF_CUR_CNTL_SHIFT 8
#define XCVR_BBF_CTRL_BBF_CUR_CNTL_WIDTH 1
#define XCVR_BBF_CTRL_BBF_CUR_CNTL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_BBF_CUR_CNTL_SHIFT))&XCVR_BBF_CTRL_BBF_CUR_CNTL_MASK)
#define XCVR_BBF_CTRL_BBF_DCOC_ON_MASK 0x200u
#define XCVR_BBF_CTRL_BBF_DCOC_ON_SHIFT 9
#define XCVR_BBF_CTRL_BBF_DCOC_ON_WIDTH 1
#define XCVR_BBF_CTRL_BBF_DCOC_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_BBF_DCOC_ON_SHIFT))&XCVR_BBF_CTRL_BBF_DCOC_ON_MASK)
#define XCVR_BBF_CTRL_BBF_TMUX_ON_MASK 0x800u
#define XCVR_BBF_CTRL_BBF_TMUX_ON_SHIFT 11
#define XCVR_BBF_CTRL_BBF_TMUX_ON_WIDTH 1
#define XCVR_BBF_CTRL_BBF_TMUX_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_BBF_TMUX_ON_SHIFT))&XCVR_BBF_CTRL_BBF_TMUX_ON_MASK)
#define XCVR_BBF_CTRL_DCOC_ALPHAC_SCALE_GS_IDX_MASK 0x3000u
#define XCVR_BBF_CTRL_DCOC_ALPHAC_SCALE_GS_IDX_SHIFT 12
#define XCVR_BBF_CTRL_DCOC_ALPHAC_SCALE_GS_IDX_WIDTH 2
#define XCVR_BBF_CTRL_DCOC_ALPHAC_SCALE_GS_IDX(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_DCOC_ALPHAC_SCALE_GS_IDX_SHIFT))&XCVR_BBF_CTRL_DCOC_ALPHAC_SCALE_GS_IDX_MASK)
#define XCVR_BBF_CTRL_BBF_SPARE_3_2_MASK 0xC000u
#define XCVR_BBF_CTRL_BBF_SPARE_3_2_SHIFT 14
#define XCVR_BBF_CTRL_BBF_SPARE_3_2_WIDTH 2
#define XCVR_BBF_CTRL_BBF_SPARE_3_2(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BBF_CTRL_BBF_SPARE_3_2_SHIFT))&XCVR_BBF_CTRL_BBF_SPARE_3_2_MASK)
/* RX_ANA_CTRL Bit Fields */
#define XCVR_RX_ANA_CTRL_RX_ATST_SEL_MASK 0xFu
#define XCVR_RX_ANA_CTRL_RX_ATST_SEL_SHIFT 0
#define XCVR_RX_ANA_CTRL_RX_ATST_SEL_WIDTH 4
#define XCVR_RX_ANA_CTRL_RX_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_ANA_CTRL_RX_ATST_SEL_SHIFT))&XCVR_RX_ANA_CTRL_RX_ATST_SEL_MASK)
#define XCVR_RX_ANA_CTRL_IQMC_DC_GAIN_ADJ_EN_MASK 0x10u
#define XCVR_RX_ANA_CTRL_IQMC_DC_GAIN_ADJ_EN_SHIFT 4
#define XCVR_RX_ANA_CTRL_IQMC_DC_GAIN_ADJ_EN_WIDTH 1
#define XCVR_RX_ANA_CTRL_IQMC_DC_GAIN_ADJ_EN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_ANA_CTRL_IQMC_DC_GAIN_ADJ_EN_SHIFT))&XCVR_RX_ANA_CTRL_IQMC_DC_GAIN_ADJ_EN_MASK)
#define XCVR_RX_ANA_CTRL_LNM_SPARE_3_2_1_MASK 0xE0u
#define XCVR_RX_ANA_CTRL_LNM_SPARE_3_2_1_SHIFT 5
#define XCVR_RX_ANA_CTRL_LNM_SPARE_3_2_1_WIDTH 3
#define XCVR_RX_ANA_CTRL_LNM_SPARE_3_2_1(x) (((uint32_t)(((uint32_t)(x))<<XCVR_RX_ANA_CTRL_LNM_SPARE_3_2_1_SHIFT))&XCVR_RX_ANA_CTRL_LNM_SPARE_3_2_1_MASK)
/* XTAL_CTRL Bit Fields */
#define XCVR_XTAL_CTRL_XTAL_TRIM_MASK 0xFFu
#define XCVR_XTAL_CTRL_XTAL_TRIM_SHIFT 0
#define XCVR_XTAL_CTRL_XTAL_TRIM_WIDTH 8
#define XCVR_XTAL_CTRL_XTAL_TRIM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_TRIM_SHIFT))&XCVR_XTAL_CTRL_XTAL_TRIM_MASK)
#define XCVR_XTAL_CTRL_XTAL_GM_MASK 0x1F00u
#define XCVR_XTAL_CTRL_XTAL_GM_SHIFT 8
#define XCVR_XTAL_CTRL_XTAL_GM_WIDTH 5
#define XCVR_XTAL_CTRL_XTAL_GM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_GM_SHIFT))&XCVR_XTAL_CTRL_XTAL_GM_MASK)
#define XCVR_XTAL_CTRL_XTAL_BYPASS_MASK 0x2000u
#define XCVR_XTAL_CTRL_XTAL_BYPASS_SHIFT 13
#define XCVR_XTAL_CTRL_XTAL_BYPASS_WIDTH 1
#define XCVR_XTAL_CTRL_XTAL_BYPASS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_BYPASS_SHIFT))&XCVR_XTAL_CTRL_XTAL_BYPASS_MASK)
#define XCVR_XTAL_CTRL_XTAL_READY_COUNT_SEL_MASK 0xC000u
#define XCVR_XTAL_CTRL_XTAL_READY_COUNT_SEL_SHIFT 14
#define XCVR_XTAL_CTRL_XTAL_READY_COUNT_SEL_WIDTH 2
#define XCVR_XTAL_CTRL_XTAL_READY_COUNT_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_READY_COUNT_SEL_SHIFT))&XCVR_XTAL_CTRL_XTAL_READY_COUNT_SEL_MASK)
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_LO_MASK 0x1F0000u
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_LO_SHIFT 16
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_LO_WIDTH 5
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_LO(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_COMP_BIAS_LO_SHIFT))&XCVR_XTAL_CTRL_XTAL_COMP_BIAS_LO_MASK)
#define XCVR_XTAL_CTRL_XTAL_ALC_START_512U_MASK 0x400000u
#define XCVR_XTAL_CTRL_XTAL_ALC_START_512U_SHIFT 22
#define XCVR_XTAL_CTRL_XTAL_ALC_START_512U_WIDTH 1
#define XCVR_XTAL_CTRL_XTAL_ALC_START_512U(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_ALC_START_512U_SHIFT))&XCVR_XTAL_CTRL_XTAL_ALC_START_512U_MASK)
#define XCVR_XTAL_CTRL_XTAL_ALC_ON_MASK 0x800000u
#define XCVR_XTAL_CTRL_XTAL_ALC_ON_SHIFT 23
#define XCVR_XTAL_CTRL_XTAL_ALC_ON_WIDTH 1
#define XCVR_XTAL_CTRL_XTAL_ALC_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_ALC_ON_SHIFT))&XCVR_XTAL_CTRL_XTAL_ALC_ON_MASK)
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_HI_MASK 0x1F000000u
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_HI_SHIFT 24
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_HI_WIDTH 5
#define XCVR_XTAL_CTRL_XTAL_COMP_BIAS_HI(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_COMP_BIAS_HI_SHIFT))&XCVR_XTAL_CTRL_XTAL_COMP_BIAS_HI_MASK)
#define XCVR_XTAL_CTRL_XTAL_READY_MASK 0x80000000u
#define XCVR_XTAL_CTRL_XTAL_READY_SHIFT 31
#define XCVR_XTAL_CTRL_XTAL_READY_WIDTH 1
#define XCVR_XTAL_CTRL_XTAL_READY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL_XTAL_READY_SHIFT))&XCVR_XTAL_CTRL_XTAL_READY_MASK)
/* XTAL_CTRL2 Bit Fields */
#define XCVR_XTAL_CTRL2_XTAL_REG_SUPPLY_MASK 0xFu
#define XCVR_XTAL_CTRL2_XTAL_REG_SUPPLY_SHIFT 0
#define XCVR_XTAL_CTRL2_XTAL_REG_SUPPLY_WIDTH 4
#define XCVR_XTAL_CTRL2_XTAL_REG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_REG_SUPPLY_SHIFT))&XCVR_XTAL_CTRL2_XTAL_REG_SUPPLY_MASK)
#define XCVR_XTAL_CTRL2_XTAL_REG_BYPASS_ON_MASK 0x10u
#define XCVR_XTAL_CTRL2_XTAL_REG_BYPASS_ON_SHIFT 4
#define XCVR_XTAL_CTRL2_XTAL_REG_BYPASS_ON_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_REG_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_REG_BYPASS_ON_SHIFT))&XCVR_XTAL_CTRL2_XTAL_REG_BYPASS_ON_MASK)
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_ON_MASK 0x100u
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_ON_SHIFT 8
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_ON_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_ON_SHIFT))&XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_ON_MASK)
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_MASK 0x200u
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_SHIFT 9
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_SHIFT))&XCVR_XTAL_CTRL2_XTAL_REG_ON_OVRD_MASK)
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_ON_MASK 0x400u
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_ON_SHIFT 10
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_ON_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_ON_OVRD_ON_SHIFT))&XCVR_XTAL_CTRL2_XTAL_ON_OVRD_ON_MASK)
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_MASK 0x800u
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_SHIFT 11
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_ON_OVRD(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_ON_OVRD_SHIFT))&XCVR_XTAL_CTRL2_XTAL_ON_OVRD_MASK)
#define XCVR_XTAL_CTRL2_XTAL_DIG_CLK_OUT_ON_MASK 0x1000u
#define XCVR_XTAL_CTRL2_XTAL_DIG_CLK_OUT_ON_SHIFT 12
#define XCVR_XTAL_CTRL2_XTAL_DIG_CLK_OUT_ON_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_DIG_CLK_OUT_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_DIG_CLK_OUT_ON_SHIFT))&XCVR_XTAL_CTRL2_XTAL_DIG_CLK_OUT_ON_MASK)
#define XCVR_XTAL_CTRL2_XTAL_REG_ATST_SEL_MASK 0x30000u
#define XCVR_XTAL_CTRL2_XTAL_REG_ATST_SEL_SHIFT 16
#define XCVR_XTAL_CTRL2_XTAL_REG_ATST_SEL_WIDTH 2
#define XCVR_XTAL_CTRL2_XTAL_REG_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_REG_ATST_SEL_SHIFT))&XCVR_XTAL_CTRL2_XTAL_REG_ATST_SEL_MASK)
#define XCVR_XTAL_CTRL2_XTAL_ATST_SEL_MASK 0x3000000u
#define XCVR_XTAL_CTRL2_XTAL_ATST_SEL_SHIFT 24
#define XCVR_XTAL_CTRL2_XTAL_ATST_SEL_WIDTH 2
#define XCVR_XTAL_CTRL2_XTAL_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_ATST_SEL_SHIFT))&XCVR_XTAL_CTRL2_XTAL_ATST_SEL_MASK)
#define XCVR_XTAL_CTRL2_XTAL_ATST_ON_MASK 0x4000000u
#define XCVR_XTAL_CTRL2_XTAL_ATST_ON_SHIFT 26
#define XCVR_XTAL_CTRL2_XTAL_ATST_ON_WIDTH 1
#define XCVR_XTAL_CTRL2_XTAL_ATST_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_ATST_ON_SHIFT))&XCVR_XTAL_CTRL2_XTAL_ATST_ON_MASK)
#define XCVR_XTAL_CTRL2_XTAL_SPARE_MASK 0xF0000000u
#define XCVR_XTAL_CTRL2_XTAL_SPARE_SHIFT 28
#define XCVR_XTAL_CTRL2_XTAL_SPARE_WIDTH 4
#define XCVR_XTAL_CTRL2_XTAL_SPARE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_XTAL_CTRL2_XTAL_SPARE_SHIFT))&XCVR_XTAL_CTRL2_XTAL_SPARE_MASK)
/* BGAP_CTRL Bit Fields */
#define XCVR_BGAP_CTRL_BGAP_CURRENT_TRIM_MASK 0xFu
#define XCVR_BGAP_CTRL_BGAP_CURRENT_TRIM_SHIFT 0
#define XCVR_BGAP_CTRL_BGAP_CURRENT_TRIM_WIDTH 4
#define XCVR_BGAP_CTRL_BGAP_CURRENT_TRIM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BGAP_CTRL_BGAP_CURRENT_TRIM_SHIFT))&XCVR_BGAP_CTRL_BGAP_CURRENT_TRIM_MASK)
#define XCVR_BGAP_CTRL_BGAP_VOLTAGE_TRIM_MASK 0xF0u
#define XCVR_BGAP_CTRL_BGAP_VOLTAGE_TRIM_SHIFT 4
#define XCVR_BGAP_CTRL_BGAP_VOLTAGE_TRIM_WIDTH 4
#define XCVR_BGAP_CTRL_BGAP_VOLTAGE_TRIM(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BGAP_CTRL_BGAP_VOLTAGE_TRIM_SHIFT))&XCVR_BGAP_CTRL_BGAP_VOLTAGE_TRIM_MASK)
#define XCVR_BGAP_CTRL_BGAP_ATST_SEL_MASK 0xF00u
#define XCVR_BGAP_CTRL_BGAP_ATST_SEL_SHIFT 8
#define XCVR_BGAP_CTRL_BGAP_ATST_SEL_WIDTH 4
#define XCVR_BGAP_CTRL_BGAP_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BGAP_CTRL_BGAP_ATST_SEL_SHIFT))&XCVR_BGAP_CTRL_BGAP_ATST_SEL_MASK)
#define XCVR_BGAP_CTRL_BGAP_ATST_ON_MASK 0x1000u
#define XCVR_BGAP_CTRL_BGAP_ATST_ON_SHIFT 12
#define XCVR_BGAP_CTRL_BGAP_ATST_ON_WIDTH 1
#define XCVR_BGAP_CTRL_BGAP_ATST_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_BGAP_CTRL_BGAP_ATST_ON_SHIFT))&XCVR_BGAP_CTRL_BGAP_ATST_ON_MASK)
/* PLL_CTRL Bit Fields */
#define XCVR_PLL_CTRL_PLL_VCO_BIAS_MASK 0x7u
#define XCVR_PLL_CTRL_PLL_VCO_BIAS_SHIFT 0
#define XCVR_PLL_CTRL_PLL_VCO_BIAS_WIDTH 3
#define XCVR_PLL_CTRL_PLL_VCO_BIAS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_PLL_VCO_BIAS_SHIFT))&XCVR_PLL_CTRL_PLL_VCO_BIAS_MASK)
#define XCVR_PLL_CTRL_PLL_LFILT_CNTL_MASK 0x70u
#define XCVR_PLL_CTRL_PLL_LFILT_CNTL_SHIFT 4
#define XCVR_PLL_CTRL_PLL_LFILT_CNTL_WIDTH 3
#define XCVR_PLL_CTRL_PLL_LFILT_CNTL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_PLL_LFILT_CNTL_SHIFT))&XCVR_PLL_CTRL_PLL_LFILT_CNTL_MASK)
#define XCVR_PLL_CTRL_PLL_REG_SUPPLY_MASK 0xF00u
#define XCVR_PLL_CTRL_PLL_REG_SUPPLY_SHIFT 8
#define XCVR_PLL_CTRL_PLL_REG_SUPPLY_WIDTH 4
#define XCVR_PLL_CTRL_PLL_REG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_PLL_REG_SUPPLY_SHIFT))&XCVR_PLL_CTRL_PLL_REG_SUPPLY_MASK)
#define XCVR_PLL_CTRL_PLL_REG_BYPASS_ON_MASK 0x10000u
#define XCVR_PLL_CTRL_PLL_REG_BYPASS_ON_SHIFT 16
#define XCVR_PLL_CTRL_PLL_REG_BYPASS_ON_WIDTH 1
#define XCVR_PLL_CTRL_PLL_REG_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_PLL_REG_BYPASS_ON_SHIFT))&XCVR_PLL_CTRL_PLL_REG_BYPASS_ON_MASK)
#define XCVR_PLL_CTRL_PLL_VCO_LDO_BYPASS_MASK 0x20000u
#define XCVR_PLL_CTRL_PLL_VCO_LDO_BYPASS_SHIFT 17
#define XCVR_PLL_CTRL_PLL_VCO_LDO_BYPASS_WIDTH 1
#define XCVR_PLL_CTRL_PLL_VCO_LDO_BYPASS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_PLL_VCO_LDO_BYPASS_SHIFT))&XCVR_PLL_CTRL_PLL_VCO_LDO_BYPASS_MASK)
#define XCVR_PLL_CTRL_HPM_BIAS_MASK 0x7F000000u
#define XCVR_PLL_CTRL_HPM_BIAS_SHIFT 24
#define XCVR_PLL_CTRL_HPM_BIAS_WIDTH 7
#define XCVR_PLL_CTRL_HPM_BIAS(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_HPM_BIAS_SHIFT))&XCVR_PLL_CTRL_HPM_BIAS_MASK)
#define XCVR_PLL_CTRL_PLL_VCO_SPARE7_MASK 0x80000000u
#define XCVR_PLL_CTRL_PLL_VCO_SPARE7_SHIFT 31
#define XCVR_PLL_CTRL_PLL_VCO_SPARE7_WIDTH 1
#define XCVR_PLL_CTRL_PLL_VCO_SPARE7(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL_PLL_VCO_SPARE7_SHIFT))&XCVR_PLL_CTRL_PLL_VCO_SPARE7_MASK)
/* PLL_CTRL2 Bit Fields */
#define XCVR_PLL_CTRL2_PLL_VCO_KV_MASK 0x7u
#define XCVR_PLL_CTRL2_PLL_VCO_KV_SHIFT 0
#define XCVR_PLL_CTRL2_PLL_VCO_KV_WIDTH 3
#define XCVR_PLL_CTRL2_PLL_VCO_KV(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL2_PLL_VCO_KV_SHIFT))&XCVR_PLL_CTRL2_PLL_VCO_KV_MASK)
#define XCVR_PLL_CTRL2_PLL_KMOD_SLOPE_MASK 0x8u
#define XCVR_PLL_CTRL2_PLL_KMOD_SLOPE_SHIFT 3
#define XCVR_PLL_CTRL2_PLL_KMOD_SLOPE_WIDTH 1
#define XCVR_PLL_CTRL2_PLL_KMOD_SLOPE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL2_PLL_KMOD_SLOPE_SHIFT))&XCVR_PLL_CTRL2_PLL_KMOD_SLOPE_MASK)
#define XCVR_PLL_CTRL2_PLL_VCO_REG_SUPPLY_MASK 0x30u
#define XCVR_PLL_CTRL2_PLL_VCO_REG_SUPPLY_SHIFT 4
#define XCVR_PLL_CTRL2_PLL_VCO_REG_SUPPLY_WIDTH 2
#define XCVR_PLL_CTRL2_PLL_VCO_REG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL2_PLL_VCO_REG_SUPPLY_SHIFT))&XCVR_PLL_CTRL2_PLL_VCO_REG_SUPPLY_MASK)
#define XCVR_PLL_CTRL2_PLL_TMUX_ON_MASK 0x100u
#define XCVR_PLL_CTRL2_PLL_TMUX_ON_SHIFT 8
#define XCVR_PLL_CTRL2_PLL_TMUX_ON_WIDTH 1
#define XCVR_PLL_CTRL2_PLL_TMUX_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_CTRL2_PLL_TMUX_ON_SHIFT))&XCVR_PLL_CTRL2_PLL_TMUX_ON_MASK)
/* PLL_TEST_CTRL Bit Fields */
#define XCVR_PLL_TEST_CTRL_PLL_TMUX_SEL_MASK 0x3u
#define XCVR_PLL_TEST_CTRL_PLL_TMUX_SEL_SHIFT 0
#define XCVR_PLL_TEST_CTRL_PLL_TMUX_SEL_WIDTH 2
#define XCVR_PLL_TEST_CTRL_PLL_TMUX_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_TEST_CTRL_PLL_TMUX_SEL_SHIFT))&XCVR_PLL_TEST_CTRL_PLL_TMUX_SEL_MASK)
#define XCVR_PLL_TEST_CTRL_PLL_VCO_REG_ATST_MASK 0x30u
#define XCVR_PLL_TEST_CTRL_PLL_VCO_REG_ATST_SHIFT 4
#define XCVR_PLL_TEST_CTRL_PLL_VCO_REG_ATST_WIDTH 2
#define XCVR_PLL_TEST_CTRL_PLL_VCO_REG_ATST(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_TEST_CTRL_PLL_VCO_REG_ATST_SHIFT))&XCVR_PLL_TEST_CTRL_PLL_VCO_REG_ATST_MASK)
#define XCVR_PLL_TEST_CTRL_PLL_REG_ATST_SEL_MASK 0x300u
#define XCVR_PLL_TEST_CTRL_PLL_REG_ATST_SEL_SHIFT 8
#define XCVR_PLL_TEST_CTRL_PLL_REG_ATST_SEL_WIDTH 2
#define XCVR_PLL_TEST_CTRL_PLL_REG_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_TEST_CTRL_PLL_REG_ATST_SEL_SHIFT))&XCVR_PLL_TEST_CTRL_PLL_REG_ATST_SEL_MASK)
#define XCVR_PLL_TEST_CTRL_PLL_VCO_TEST_CLK_MODE_MASK 0x1000u
#define XCVR_PLL_TEST_CTRL_PLL_VCO_TEST_CLK_MODE_SHIFT 12
#define XCVR_PLL_TEST_CTRL_PLL_VCO_TEST_CLK_MODE_WIDTH 1
#define XCVR_PLL_TEST_CTRL_PLL_VCO_TEST_CLK_MODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_TEST_CTRL_PLL_VCO_TEST_CLK_MODE_SHIFT))&XCVR_PLL_TEST_CTRL_PLL_VCO_TEST_CLK_MODE_MASK)
#define XCVR_PLL_TEST_CTRL_PLL_FORCE_VTUNE_EXTERNALLY_MASK 0x2000u
#define XCVR_PLL_TEST_CTRL_PLL_FORCE_VTUNE_EXTERNALLY_SHIFT 13
#define XCVR_PLL_TEST_CTRL_PLL_FORCE_VTUNE_EXTERNALLY_WIDTH 1
#define XCVR_PLL_TEST_CTRL_PLL_FORCE_VTUNE_EXTERNALLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_TEST_CTRL_PLL_FORCE_VTUNE_EXTERNALLY_SHIFT))&XCVR_PLL_TEST_CTRL_PLL_FORCE_VTUNE_EXTERNALLY_MASK)
#define XCVR_PLL_TEST_CTRL_PLL_RIPPLE_COUNTER_TEST_MODE_MASK 0x4000u
#define XCVR_PLL_TEST_CTRL_PLL_RIPPLE_COUNTER_TEST_MODE_SHIFT 14
#define XCVR_PLL_TEST_CTRL_PLL_RIPPLE_COUNTER_TEST_MODE_WIDTH 1
#define XCVR_PLL_TEST_CTRL_PLL_RIPPLE_COUNTER_TEST_MODE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_PLL_TEST_CTRL_PLL_RIPPLE_COUNTER_TEST_MODE_SHIFT))&XCVR_PLL_TEST_CTRL_PLL_RIPPLE_COUNTER_TEST_MODE_MASK)
/* QGEN_CTRL Bit Fields */
#define XCVR_QGEN_CTRL_QGEN_REG_SUPPLY_MASK 0xFu
#define XCVR_QGEN_CTRL_QGEN_REG_SUPPLY_SHIFT 0
#define XCVR_QGEN_CTRL_QGEN_REG_SUPPLY_WIDTH 4
#define XCVR_QGEN_CTRL_QGEN_REG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_QGEN_CTRL_QGEN_REG_SUPPLY_SHIFT))&XCVR_QGEN_CTRL_QGEN_REG_SUPPLY_MASK)
#define XCVR_QGEN_CTRL_QGEN_REG_ATST_SEL_MASK 0xF0u
#define XCVR_QGEN_CTRL_QGEN_REG_ATST_SEL_SHIFT 4
#define XCVR_QGEN_CTRL_QGEN_REG_ATST_SEL_WIDTH 4
#define XCVR_QGEN_CTRL_QGEN_REG_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_QGEN_CTRL_QGEN_REG_ATST_SEL_SHIFT))&XCVR_QGEN_CTRL_QGEN_REG_ATST_SEL_MASK)
#define XCVR_QGEN_CTRL_QGEN_REG_BYPASS_ON_MASK 0x100u
#define XCVR_QGEN_CTRL_QGEN_REG_BYPASS_ON_SHIFT 8
#define XCVR_QGEN_CTRL_QGEN_REG_BYPASS_ON_WIDTH 1
#define XCVR_QGEN_CTRL_QGEN_REG_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_QGEN_CTRL_QGEN_REG_BYPASS_ON_SHIFT))&XCVR_QGEN_CTRL_QGEN_REG_BYPASS_ON_MASK)
/* TCA_CTRL Bit Fields */
#define XCVR_TCA_CTRL_TCA_BIAS_CURR_MASK 0x3u
#define XCVR_TCA_CTRL_TCA_BIAS_CURR_SHIFT 0
#define XCVR_TCA_CTRL_TCA_BIAS_CURR_WIDTH 2
#define XCVR_TCA_CTRL_TCA_BIAS_CURR(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_CTRL_TCA_BIAS_CURR_SHIFT))&XCVR_TCA_CTRL_TCA_BIAS_CURR_MASK)
#define XCVR_TCA_CTRL_TCA_LOW_PWR_ON_MASK 0x4u
#define XCVR_TCA_CTRL_TCA_LOW_PWR_ON_SHIFT 2
#define XCVR_TCA_CTRL_TCA_LOW_PWR_ON_WIDTH 1
#define XCVR_TCA_CTRL_TCA_LOW_PWR_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_CTRL_TCA_LOW_PWR_ON_SHIFT))&XCVR_TCA_CTRL_TCA_LOW_PWR_ON_MASK)
#define XCVR_TCA_CTRL_TCA_TX_REG_BYPASS_ON_MASK 0x8u
#define XCVR_TCA_CTRL_TCA_TX_REG_BYPASS_ON_SHIFT 3
#define XCVR_TCA_CTRL_TCA_TX_REG_BYPASS_ON_WIDTH 1
#define XCVR_TCA_CTRL_TCA_TX_REG_BYPASS_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_CTRL_TCA_TX_REG_BYPASS_ON_SHIFT))&XCVR_TCA_CTRL_TCA_TX_REG_BYPASS_ON_MASK)
#define XCVR_TCA_CTRL_TCA_TX_REG_SUPPLY_MASK 0xF0u
#define XCVR_TCA_CTRL_TCA_TX_REG_SUPPLY_SHIFT 4
#define XCVR_TCA_CTRL_TCA_TX_REG_SUPPLY_WIDTH 4
#define XCVR_TCA_CTRL_TCA_TX_REG_SUPPLY(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_CTRL_TCA_TX_REG_SUPPLY_SHIFT))&XCVR_TCA_CTRL_TCA_TX_REG_SUPPLY_MASK)
#define XCVR_TCA_CTRL_TCA_TX_REG_ATST_SEL_MASK 0x300u
#define XCVR_TCA_CTRL_TCA_TX_REG_ATST_SEL_SHIFT 8
#define XCVR_TCA_CTRL_TCA_TX_REG_ATST_SEL_WIDTH 2
#define XCVR_TCA_CTRL_TCA_TX_REG_ATST_SEL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TCA_CTRL_TCA_TX_REG_ATST_SEL_SHIFT))&XCVR_TCA_CTRL_TCA_TX_REG_ATST_SEL_MASK)
/* TZA_CTRL Bit Fields */
#define XCVR_TZA_CTRL_TZA_CAP_TUNE_MASK 0xFu
#define XCVR_TZA_CTRL_TZA_CAP_TUNE_SHIFT 0
#define XCVR_TZA_CTRL_TZA_CAP_TUNE_WIDTH 4
#define XCVR_TZA_CTRL_TZA_CAP_TUNE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TZA_CTRL_TZA_CAP_TUNE_SHIFT))&XCVR_TZA_CTRL_TZA_CAP_TUNE_MASK)
#define XCVR_TZA_CTRL_TZA_GAIN_MASK 0x10u
#define XCVR_TZA_CTRL_TZA_GAIN_SHIFT 4
#define XCVR_TZA_CTRL_TZA_GAIN_WIDTH 1
#define XCVR_TZA_CTRL_TZA_GAIN(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TZA_CTRL_TZA_GAIN_SHIFT))&XCVR_TZA_CTRL_TZA_GAIN_MASK)
#define XCVR_TZA_CTRL_TZA_DCOC_ON_MASK 0x20u
#define XCVR_TZA_CTRL_TZA_DCOC_ON_SHIFT 5
#define XCVR_TZA_CTRL_TZA_DCOC_ON_WIDTH 1
#define XCVR_TZA_CTRL_TZA_DCOC_ON(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TZA_CTRL_TZA_DCOC_ON_SHIFT))&XCVR_TZA_CTRL_TZA_DCOC_ON_MASK)
#define XCVR_TZA_CTRL_TZA_CUR_CNTL_MASK 0xC0u
#define XCVR_TZA_CTRL_TZA_CUR_CNTL_SHIFT 6
#define XCVR_TZA_CTRL_TZA_CUR_CNTL_WIDTH 2
#define XCVR_TZA_CTRL_TZA_CUR_CNTL(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TZA_CTRL_TZA_CUR_CNTL_SHIFT))&XCVR_TZA_CTRL_TZA_CUR_CNTL_MASK)
#define XCVR_TZA_CTRL_TZA_SPARE_MASK 0xF00000u
#define XCVR_TZA_CTRL_TZA_SPARE_SHIFT 20
#define XCVR_TZA_CTRL_TZA_SPARE_WIDTH 4
#define XCVR_TZA_CTRL_TZA_SPARE(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TZA_CTRL_TZA_SPARE_SHIFT))&XCVR_TZA_CTRL_TZA_SPARE_MASK)
/* TX_ANA_CTRL Bit Fields */
#define XCVR_TX_ANA_CTRL_HPM_CAL_ADJUST_MASK 0xFu
#define XCVR_TX_ANA_CTRL_HPM_CAL_ADJUST_SHIFT 0
#define XCVR_TX_ANA_CTRL_HPM_CAL_ADJUST_WIDTH 4
#define XCVR_TX_ANA_CTRL_HPM_CAL_ADJUST(x) (((uint32_t)(((uint32_t)(x))<<XCVR_TX_ANA_CTRL_HPM_CAL_ADJUST_SHIFT))&XCVR_TX_ANA_CTRL_HPM_CAL_ADJUST_MASK)
/* ANA_SPARE Bit Fields */
#define XCVR_ANA_SPARE_IQMC_DC_GAIN_ADJ_MASK 0x7FFu
#define XCVR_ANA_SPARE_IQMC_DC_GAIN_ADJ_SHIFT 0
#define XCVR_ANA_SPARE_IQMC_DC_GAIN_ADJ_WIDTH 11
#define XCVR_ANA_SPARE_IQMC_DC_GAIN_ADJ(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ANA_SPARE_IQMC_DC_GAIN_ADJ_SHIFT))&XCVR_ANA_SPARE_IQMC_DC_GAIN_ADJ_MASK)
#define XCVR_ANA_SPARE_DCOC_TRK_EST_GS_CNT_MASK 0x3800u
#define XCVR_ANA_SPARE_DCOC_TRK_EST_GS_CNT_SHIFT 11
#define XCVR_ANA_SPARE_DCOC_TRK_EST_GS_CNT_WIDTH 3
#define XCVR_ANA_SPARE_DCOC_TRK_EST_GS_CNT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ANA_SPARE_DCOC_TRK_EST_GS_CNT_SHIFT))&XCVR_ANA_SPARE_DCOC_TRK_EST_GS_CNT_MASK)
#define XCVR_ANA_SPARE_HPM_LSB_INVERT_MASK 0xC000u
#define XCVR_ANA_SPARE_HPM_LSB_INVERT_SHIFT 14
#define XCVR_ANA_SPARE_HPM_LSB_INVERT_WIDTH 2
#define XCVR_ANA_SPARE_HPM_LSB_INVERT(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ANA_SPARE_HPM_LSB_INVERT_SHIFT))&XCVR_ANA_SPARE_HPM_LSB_INVERT_MASK)
#define XCVR_ANA_SPARE_ANA_DTEST_MASK 0x3F0000u
#define XCVR_ANA_SPARE_ANA_DTEST_SHIFT 16
#define XCVR_ANA_SPARE_ANA_DTEST_WIDTH 6
#define XCVR_ANA_SPARE_ANA_DTEST(x) (((uint32_t)(((uint32_t)(x))<<XCVR_ANA_SPARE_ANA_DTEST_SHIFT))&XCVR_ANA_SPARE_ANA_DTEST_MASK)
/*!
* @}
*/ /* end of group XCVR_Register_Masks */
/* XCVR - Peripheral instance base addresses */
/** Peripheral XCVR base address */
#define XCVR_BASE (0x4005C000u)
/** Peripheral XCVR base pointer */
#define XCVR ((XCVR_Type *)XCVR_BASE)
#define XCVR_BASE_PTR (XCVR)
/** Array initializer of XCVR peripheral base addresses */
#define XCVR_BASE_ADDRS { XCVR_BASE }
/** Array initializer of XCVR peripheral base pointers */
#define XCVR_BASE_PTRS { XCVR }
/* ----------------------------------------------------------------------------
-- XCVR - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup XCVR_Register_Accessor_Macros XCVR - Register accessor macros
* @{
*/
/* XCVR - Register instance definitions */
/* XCVR */
#define XCVR_RX_DIG_CTRL XCVR_RX_DIG_CTRL_REG(XCVR)
#define XCVR_AGC_CTRL_0 XCVR_AGC_CTRL_0_REG(XCVR)
#define XCVR_AGC_CTRL_1 XCVR_AGC_CTRL_1_REG(XCVR)
#define XCVR_AGC_CTRL_2 XCVR_AGC_CTRL_2_REG(XCVR)
#define XCVR_AGC_CTRL_3 XCVR_AGC_CTRL_3_REG(XCVR)
#define XCVR_AGC_STAT XCVR_AGC_STAT_REG(XCVR)
#define XCVR_RSSI_CTRL_0 XCVR_RSSI_CTRL_0_REG(XCVR)
#define XCVR_RSSI_CTRL_1 XCVR_RSSI_CTRL_1_REG(XCVR)
#define XCVR_DCOC_CTRL_0 XCVR_DCOC_CTRL_0_REG(XCVR)
#define XCVR_DCOC_CTRL_1 XCVR_DCOC_CTRL_1_REG(XCVR)
#define XCVR_DCOC_CTRL_2 XCVR_DCOC_CTRL_2_REG(XCVR)
#define XCVR_DCOC_CTRL_3 XCVR_DCOC_CTRL_3_REG(XCVR)
#define XCVR_DCOC_CTRL_4 XCVR_DCOC_CTRL_4_REG(XCVR)
#define XCVR_DCOC_CAL_GAIN XCVR_DCOC_CAL_GAIN_REG(XCVR)
#define XCVR_DCOC_STAT XCVR_DCOC_STAT_REG(XCVR)
#define XCVR_DCOC_DC_EST XCVR_DCOC_DC_EST_REG(XCVR)
#define XCVR_DCOC_CAL_RCP XCVR_DCOC_CAL_RCP_REG(XCVR)
#define XCVR_IQMC_CTRL XCVR_IQMC_CTRL_REG(XCVR)
#define XCVR_IQMC_CAL XCVR_IQMC_CAL_REG(XCVR)
#define XCVR_TCA_AGC_VAL_3_0 XCVR_TCA_AGC_VAL_3_0_REG(XCVR)
#define XCVR_TCA_AGC_VAL_7_4 XCVR_TCA_AGC_VAL_7_4_REG(XCVR)
#define XCVR_TCA_AGC_VAL_8 XCVR_TCA_AGC_VAL_8_REG(XCVR)
#define XCVR_BBF_RES_TUNE_VAL_7_0 XCVR_BBF_RES_TUNE_VAL_7_0_REG(XCVR)
#define XCVR_BBF_RES_TUNE_VAL_10_8 XCVR_BBF_RES_TUNE_VAL_10_8_REG(XCVR)
#define XCVR_TCA_AGC_LIN_VAL_2_0 XCVR_TCA_AGC_LIN_VAL_2_0_REG(XCVR)
#define XCVR_TCA_AGC_LIN_VAL_5_3 XCVR_TCA_AGC_LIN_VAL_5_3_REG(XCVR)
#define XCVR_TCA_AGC_LIN_VAL_8_6 XCVR_TCA_AGC_LIN_VAL_8_6_REG(XCVR)
#define XCVR_BBF_RES_TUNE_LIN_VAL_3_0 XCVR_BBF_RES_TUNE_LIN_VAL_3_0_REG(XCVR)
#define XCVR_BBF_RES_TUNE_LIN_VAL_7_4 XCVR_BBF_RES_TUNE_LIN_VAL_7_4_REG(XCVR)
#define XCVR_BBF_RES_TUNE_LIN_VAL_10_8 XCVR_BBF_RES_TUNE_LIN_VAL_10_8_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_03_00 XCVR_AGC_GAIN_TBL_03_00_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_07_04 XCVR_AGC_GAIN_TBL_07_04_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_11_08 XCVR_AGC_GAIN_TBL_11_08_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_15_12 XCVR_AGC_GAIN_TBL_15_12_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_19_16 XCVR_AGC_GAIN_TBL_19_16_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_23_20 XCVR_AGC_GAIN_TBL_23_20_REG(XCVR)
#define XCVR_AGC_GAIN_TBL_26_24 XCVR_AGC_GAIN_TBL_26_24_REG(XCVR)
#define XCVR_DCOC_OFFSET_00 XCVR_DCOC_OFFSET__REG(XCVR,0)
#define XCVR_DCOC_OFFSET_01 XCVR_DCOC_OFFSET__REG(XCVR,1)
#define XCVR_DCOC_OFFSET_02 XCVR_DCOC_OFFSET__REG(XCVR,2)
#define XCVR_DCOC_OFFSET_03 XCVR_DCOC_OFFSET__REG(XCVR,3)
#define XCVR_DCOC_OFFSET_04 XCVR_DCOC_OFFSET__REG(XCVR,4)
#define XCVR_DCOC_OFFSET_05 XCVR_DCOC_OFFSET__REG(XCVR,5)
#define XCVR_DCOC_OFFSET_06 XCVR_DCOC_OFFSET__REG(XCVR,6)
#define XCVR_DCOC_OFFSET_07 XCVR_DCOC_OFFSET__REG(XCVR,7)
#define XCVR_DCOC_OFFSET_08 XCVR_DCOC_OFFSET__REG(XCVR,8)
#define XCVR_DCOC_OFFSET_09 XCVR_DCOC_OFFSET__REG(XCVR,9)
#define XCVR_DCOC_OFFSET_10 XCVR_DCOC_OFFSET__REG(XCVR,10)
#define XCVR_DCOC_OFFSET_11 XCVR_DCOC_OFFSET__REG(XCVR,11)
#define XCVR_DCOC_OFFSET_12 XCVR_DCOC_OFFSET__REG(XCVR,12)
#define XCVR_DCOC_OFFSET_13 XCVR_DCOC_OFFSET__REG(XCVR,13)
#define XCVR_DCOC_OFFSET_14 XCVR_DCOC_OFFSET__REG(XCVR,14)
#define XCVR_DCOC_OFFSET_15 XCVR_DCOC_OFFSET__REG(XCVR,15)
#define XCVR_DCOC_OFFSET_16 XCVR_DCOC_OFFSET__REG(XCVR,16)
#define XCVR_DCOC_OFFSET_17 XCVR_DCOC_OFFSET__REG(XCVR,17)
#define XCVR_DCOC_OFFSET_18 XCVR_DCOC_OFFSET__REG(XCVR,18)
#define XCVR_DCOC_OFFSET_19 XCVR_DCOC_OFFSET__REG(XCVR,19)
#define XCVR_DCOC_OFFSET_20 XCVR_DCOC_OFFSET__REG(XCVR,20)
#define XCVR_DCOC_OFFSET_21 XCVR_DCOC_OFFSET__REG(XCVR,21)
#define XCVR_DCOC_OFFSET_22 XCVR_DCOC_OFFSET__REG(XCVR,22)
#define XCVR_DCOC_OFFSET_23 XCVR_DCOC_OFFSET__REG(XCVR,23)
#define XCVR_DCOC_OFFSET_24 XCVR_DCOC_OFFSET__REG(XCVR,24)
#define XCVR_DCOC_OFFSET_25 XCVR_DCOC_OFFSET__REG(XCVR,25)
#define XCVR_DCOC_OFFSET_26 XCVR_DCOC_OFFSET__REG(XCVR,26)
#define XCVR_DCOC_TZA_STEP_00 XCVR_DCOC_TZA_STEP__REG(XCVR,0)
#define XCVR_DCOC_TZA_STEP_01 XCVR_DCOC_TZA_STEP__REG(XCVR,1)
#define XCVR_DCOC_TZA_STEP_02 XCVR_DCOC_TZA_STEP__REG(XCVR,2)
#define XCVR_DCOC_TZA_STEP_03 XCVR_DCOC_TZA_STEP__REG(XCVR,3)
#define XCVR_DCOC_TZA_STEP_04 XCVR_DCOC_TZA_STEP__REG(XCVR,4)
#define XCVR_DCOC_TZA_STEP_05 XCVR_DCOC_TZA_STEP__REG(XCVR,5)
#define XCVR_DCOC_TZA_STEP_06 XCVR_DCOC_TZA_STEP__REG(XCVR,6)
#define XCVR_DCOC_TZA_STEP_07 XCVR_DCOC_TZA_STEP__REG(XCVR,7)
#define XCVR_DCOC_TZA_STEP_08 XCVR_DCOC_TZA_STEP__REG(XCVR,8)
#define XCVR_DCOC_TZA_STEP_09 XCVR_DCOC_TZA_STEP__REG(XCVR,9)
#define XCVR_DCOC_TZA_STEP_10 XCVR_DCOC_TZA_STEP__REG(XCVR,10)
#define XCVR_DCOC_CAL_ALPHA XCVR_DCOC_CAL_ALPHA_REG(XCVR)
#define XCVR_DCOC_CAL_BETA XCVR_DCOC_CAL_BETA_REG(XCVR)
#define XCVR_DCOC_CAL_GAMMA XCVR_DCOC_CAL_GAMMA_REG(XCVR)
#define XCVR_DCOC_CAL_IIR XCVR_DCOC_CAL_IIR_REG(XCVR)
#define XCVR_DCOC_CAL1 XCVR_DCOC_CAL_REG(XCVR,0)
#define XCVR_DCOC_CAL2 XCVR_DCOC_CAL_REG(XCVR,1)
#define XCVR_DCOC_CAL3 XCVR_DCOC_CAL_REG(XCVR,2)
#define XCVR_RX_CHF_COEF0 XCVR_RX_CHF_COEF_REG(XCVR,0)
#define XCVR_RX_CHF_COEF1 XCVR_RX_CHF_COEF_REG(XCVR,1)
#define XCVR_RX_CHF_COEF2 XCVR_RX_CHF_COEF_REG(XCVR,2)
#define XCVR_RX_CHF_COEF3 XCVR_RX_CHF_COEF_REG(XCVR,3)
#define XCVR_RX_CHF_COEF4 XCVR_RX_CHF_COEF_REG(XCVR,4)
#define XCVR_RX_CHF_COEF5 XCVR_RX_CHF_COEF_REG(XCVR,5)
#define XCVR_RX_CHF_COEF6 XCVR_RX_CHF_COEF_REG(XCVR,6)
#define XCVR_RX_CHF_COEF7 XCVR_RX_CHF_COEF_REG(XCVR,7)
#define XCVR_TX_DIG_CTRL XCVR_TX_DIG_CTRL_REG(XCVR)
#define XCVR_TX_DATA_PAD_PAT XCVR_TX_DATA_PAD_PAT_REG(XCVR)
#define XCVR_TX_GFSK_MOD_CTRL XCVR_TX_GFSK_MOD_CTRL_REG(XCVR)
#define XCVR_TX_GFSK_COEFF2 XCVR_TX_GFSK_COEFF2_REG(XCVR)
#define XCVR_TX_GFSK_COEFF1 XCVR_TX_GFSK_COEFF1_REG(XCVR)
#define XCVR_TX_FSK_MOD_SCALE XCVR_TX_FSK_MOD_SCALE_REG(XCVR)
#define XCVR_TX_DFT_MOD_PAT XCVR_TX_DFT_MOD_PAT_REG(XCVR)
#define XCVR_TX_DFT_TONE_0_1 XCVR_TX_DFT_TONE_0_1_REG(XCVR)
#define XCVR_TX_DFT_TONE_2_3 XCVR_TX_DFT_TONE_2_3_REG(XCVR)
#define XCVR_PLL_MOD_OVRD XCVR_PLL_MOD_OVRD_REG(XCVR)
#define XCVR_PLL_CHAN_MAP XCVR_PLL_CHAN_MAP_REG(XCVR)
#define XCVR_PLL_LOCK_DETECT XCVR_PLL_LOCK_DETECT_REG(XCVR)
#define XCVR_PLL_HP_MOD_CTRL XCVR_PLL_HP_MOD_CTRL_REG(XCVR)
#define XCVR_PLL_HPM_CAL_CTRL XCVR_PLL_HPM_CAL_CTRL_REG(XCVR)
#define XCVR_PLL_LD_HPM_CAL1 XCVR_PLL_LD_HPM_CAL1_REG(XCVR)
#define XCVR_PLL_LD_HPM_CAL2 XCVR_PLL_LD_HPM_CAL2_REG(XCVR)
#define XCVR_PLL_HPM_SDM_FRACTION XCVR_PLL_HPM_SDM_FRACTION_REG(XCVR)
#define XCVR_PLL_LP_MOD_CTRL XCVR_PLL_LP_MOD_CTRL_REG(XCVR)
#define XCVR_PLL_LP_SDM_CTRL1 XCVR_PLL_LP_SDM_CTRL1_REG(XCVR)
#define XCVR_PLL_LP_SDM_CTRL2 XCVR_PLL_LP_SDM_CTRL2_REG(XCVR)
#define XCVR_PLL_LP_SDM_CTRL3 XCVR_PLL_LP_SDM_CTRL3_REG(XCVR)
#define XCVR_PLL_LP_SDM_NUM XCVR_PLL_LP_SDM_NUM_REG(XCVR)
#define XCVR_PLL_LP_SDM_DENOM XCVR_PLL_LP_SDM_DENOM_REG(XCVR)
#define XCVR_PLL_DELAY_MATCH XCVR_PLL_DELAY_MATCH_REG(XCVR)
#define XCVR_PLL_CTUNE_CTRL XCVR_PLL_CTUNE_CTRL_REG(XCVR)
#define XCVR_PLL_CTUNE_CNT6 XCVR_PLL_CTUNE_CNT6_REG(XCVR)
#define XCVR_PLL_CTUNE_CNT5_4 XCVR_PLL_CTUNE_CNT5_4_REG(XCVR)
#define XCVR_PLL_CTUNE_CNT3_2 XCVR_PLL_CTUNE_CNT3_2_REG(XCVR)
#define XCVR_PLL_CTUNE_CNT1_0 XCVR_PLL_CTUNE_CNT1_0_REG(XCVR)
#define XCVR_PLL_CTUNE_RESULTS XCVR_PLL_CTUNE_RESULTS_REG(XCVR)
#define XCVR_CTRL XCVR_CTRL_REG(XCVR)
#define XCVR_STATUS XCVR_STATUS_REG(XCVR)
#define XCVR_SOFT_RESET XCVR_SOFT_RESET_REG(XCVR)
#define XCVR_OVERWRITE_VER XCVR_OVERWRITE_VER_REG(XCVR)
#define XCVR_DMA_CTRL XCVR_DMA_CTRL_REG(XCVR)
#define XCVR_DMA_DATA XCVR_DMA_DATA_REG(XCVR)
#define XCVR_DTEST_CTRL XCVR_DTEST_CTRL_REG(XCVR)
#define XCVR_PB_CTRL XCVR_PB_CTRL_REG(XCVR)
#define XCVR_TSM_CTRL XCVR_TSM_CTRL_REG(XCVR)
#define XCVR_END_OF_SEQ XCVR_END_OF_SEQ_REG(XCVR)
#define XCVR_TSM_OVRD0 XCVR_TSM_OVRD0_REG(XCVR)
#define XCVR_TSM_OVRD1 XCVR_TSM_OVRD1_REG(XCVR)
#define XCVR_TSM_OVRD2 XCVR_TSM_OVRD2_REG(XCVR)
#define XCVR_TSM_OVRD3 XCVR_TSM_OVRD3_REG(XCVR)
#define XCVR_PA_POWER XCVR_PA_POWER_REG(XCVR)
#define XCVR_PA_BIAS_TBL0 XCVR_PA_BIAS_TBL0_REG(XCVR)
#define XCVR_PA_BIAS_TBL1 XCVR_PA_BIAS_TBL1_REG(XCVR)
#define XCVR_RECYCLE_COUNT XCVR_RECYCLE_COUNT_REG(XCVR)
#define XCVR_TSM_TIMING00 XCVR_TSM_TIMING00_REG(XCVR)
#define XCVR_TSM_TIMING01 XCVR_TSM_TIMING01_REG(XCVR)
#define XCVR_TSM_TIMING02 XCVR_TSM_TIMING02_REG(XCVR)
#define XCVR_TSM_TIMING03 XCVR_TSM_TIMING03_REG(XCVR)
#define XCVR_TSM_TIMING04 XCVR_TSM_TIMING04_REG(XCVR)
#define XCVR_TSM_TIMING05 XCVR_TSM_TIMING05_REG(XCVR)
#define XCVR_TSM_TIMING06 XCVR_TSM_TIMING06_REG(XCVR)
#define XCVR_TSM_TIMING07 XCVR_TSM_TIMING07_REG(XCVR)
#define XCVR_TSM_TIMING08 XCVR_TSM_TIMING08_REG(XCVR)
#define XCVR_TSM_TIMING09 XCVR_TSM_TIMING09_REG(XCVR)
#define XCVR_TSM_TIMING10 XCVR_TSM_TIMING10_REG(XCVR)
#define XCVR_TSM_TIMING11 XCVR_TSM_TIMING11_REG(XCVR)
#define XCVR_TSM_TIMING12 XCVR_TSM_TIMING12_REG(XCVR)
#define XCVR_TSM_TIMING13 XCVR_TSM_TIMING13_REG(XCVR)
#define XCVR_TSM_TIMING14 XCVR_TSM_TIMING14_REG(XCVR)
#define XCVR_TSM_TIMING15 XCVR_TSM_TIMING15_REG(XCVR)
#define XCVR_TSM_TIMING16 XCVR_TSM_TIMING16_REG(XCVR)
#define XCVR_TSM_TIMING17 XCVR_TSM_TIMING17_REG(XCVR)
#define XCVR_TSM_TIMING18 XCVR_TSM_TIMING18_REG(XCVR)
#define XCVR_TSM_TIMING19 XCVR_TSM_TIMING19_REG(XCVR)
#define XCVR_TSM_TIMING20 XCVR_TSM_TIMING20_REG(XCVR)
#define XCVR_TSM_TIMING21 XCVR_TSM_TIMING21_REG(XCVR)
#define XCVR_TSM_TIMING22 XCVR_TSM_TIMING22_REG(XCVR)
#define XCVR_TSM_TIMING23 XCVR_TSM_TIMING23_REG(XCVR)
#define XCVR_TSM_TIMING24 XCVR_TSM_TIMING24_REG(XCVR)
#define XCVR_TSM_TIMING25 XCVR_TSM_TIMING25_REG(XCVR)
#define XCVR_TSM_TIMING26 XCVR_TSM_TIMING26_REG(XCVR)
#define XCVR_TSM_TIMING27 XCVR_TSM_TIMING27_REG(XCVR)
#define XCVR_TSM_TIMING28 XCVR_TSM_TIMING28_REG(XCVR)
#define XCVR_TSM_TIMING29 XCVR_TSM_TIMING29_REG(XCVR)
#define XCVR_TSM_TIMING30 XCVR_TSM_TIMING30_REG(XCVR)
#define XCVR_TSM_TIMING31 XCVR_TSM_TIMING31_REG(XCVR)
#define XCVR_TSM_TIMING32 XCVR_TSM_TIMING32_REG(XCVR)
#define XCVR_TSM_TIMING33 XCVR_TSM_TIMING33_REG(XCVR)
#define XCVR_TSM_TIMING34 XCVR_TSM_TIMING34_REG(XCVR)
#define XCVR_TSM_TIMING35 XCVR_TSM_TIMING35_REG(XCVR)
#define XCVR_TSM_TIMING36 XCVR_TSM_TIMING36_REG(XCVR)
#define XCVR_TSM_TIMING37 XCVR_TSM_TIMING37_REG(XCVR)
#define XCVR_TSM_TIMING38 XCVR_TSM_TIMING38_REG(XCVR)
#define XCVR_TSM_TIMING39 XCVR_TSM_TIMING39_REG(XCVR)
#define XCVR_TSM_TIMING40 XCVR_TSM_TIMING40_REG(XCVR)
#define XCVR_TSM_TIMING41 XCVR_TSM_TIMING41_REG(XCVR)
#define XCVR_TSM_TIMING42 XCVR_TSM_TIMING42_REG(XCVR)
#define XCVR_TSM_TIMING43 XCVR_TSM_TIMING43_REG(XCVR)
#define XCVR_CORR_CTRL XCVR_CORR_CTRL_REG(XCVR)
#define XCVR_PN_TYPE XCVR_PN_TYPE_REG(XCVR)
#define XCVR_PN_CODE XCVR_PN_CODE_REG(XCVR)
#define XCVR_SYNC_CTRL XCVR_SYNC_CTRL_REG(XCVR)
#define XCVR_SNF_THR XCVR_SNF_THR_REG(XCVR)
#define XCVR_FAD_THR XCVR_FAD_THR_REG(XCVR)
#define XCVR_ZBDEM_AFC XCVR_ZBDEM_AFC_REG(XCVR)
#define XCVR_LPPS_CTRL XCVR_LPPS_CTRL_REG(XCVR)
#define XCVR_ADC_CTRL XCVR_ADC_CTRL_REG(XCVR)
#define XCVR_ADC_TUNE XCVR_ADC_TUNE_REG(XCVR)
#define XCVR_ADC_ADJ XCVR_ADC_ADJ_REG(XCVR)
#define XCVR_ADC_REGS XCVR_ADC_REGS_REG(XCVR)
#define XCVR_ADC_TRIMS XCVR_ADC_TRIMS_REG(XCVR)
#define XCVR_ADC_TEST_CTRL XCVR_ADC_TEST_CTRL_REG(XCVR)
#define XCVR_BBF_CTRL XCVR_BBF_CTRL_REG(XCVR)
#define XCVR_RX_ANA_CTRL XCVR_RX_ANA_CTRL_REG(XCVR)
#define XCVR_XTAL_CTRL XCVR_XTAL_CTRL_REG(XCVR)
#define XCVR_XTAL_CTRL2 XCVR_XTAL_CTRL2_REG(XCVR)
#define XCVR_BGAP_CTRL XCVR_BGAP_CTRL_REG(XCVR)
#define XCVR_PLL_CTRL XCVR_PLL_CTRL_REG(XCVR)
#define XCVR_PLL_CTRL2 XCVR_PLL_CTRL2_REG(XCVR)
#define XCVR_PLL_TEST_CTRL XCVR_PLL_TEST_CTRL_REG(XCVR)
#define XCVR_QGEN_CTRL XCVR_QGEN_CTRL_REG(XCVR)
#define XCVR_TCA_CTRL XCVR_TCA_CTRL_REG(XCVR)
#define XCVR_TZA_CTRL XCVR_TZA_CTRL_REG(XCVR)
#define XCVR_TX_ANA_CTRL XCVR_TX_ANA_CTRL_REG(XCVR)
#define XCVR_ANA_SPARE XCVR_ANA_SPARE_REG(XCVR)
/* XCVR - Register array accessors */
#define XCVR_DCOC_OFFSET_(index) XCVR_DCOC_OFFSET__REG(XCVR,index)
#define XCVR_DCOC_TZA_STEP_(index) XCVR_DCOC_TZA_STEP__REG(XCVR,index)
#define XCVR_DCOC_CAL(index) XCVR_DCOC_CAL_REG(XCVR,index)
#define XCVR_RX_CHF_COEF(index) XCVR_RX_CHF_COEF_REG(XCVR,index)
/*!
* @}
*/ /* end of group XCVR_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group XCVR_Peripheral_Access_Layer */
/* ----------------------------------------------------------------------------
-- ZLL Peripheral Access Layer
---------------------------------------------------------------------------- */
/*!
* @addtogroup ZLL_Peripheral_Access_Layer ZLL Peripheral Access Layer
* @{
*/
/** ZLL - Register Layout Typedef */
typedef struct {
__IO uint32_t IRQSTS; /**< INTERRUPT REQUEST STATUS, offset: 0x0 */
__IO uint32_t PHY_CTRL; /**< PHY CONTROL, offset: 0x4 */
__I uint32_t EVENT_TMR; /**< EVENT TIMER, offset: 0x8 */
__I uint32_t TIMESTAMP; /**< TIMESTAMP, offset: 0xC */
__IO uint32_t T1CMP; /**< T1 COMPARE, offset: 0x10 */
__IO uint32_t T2CMP; /**< T2 COMPARE, offset: 0x14 */
__IO uint32_t T2PRIMECMP; /**< T2 PRIME COMPARE, offset: 0x18 */
__IO uint32_t T3CMP; /**< T3 COMPARE, offset: 0x1C */
__IO uint32_t T4CMP; /**< T4 COMPARE, offset: 0x20 */
__IO uint32_t PA_PWR; /**< PA POWER, offset: 0x24 */
__IO uint32_t CHANNEL_NUM0; /**< CHANNEL NUMBER 0, offset: 0x28 */
__I uint32_t LQI_AND_RSSI; /**< LQI AND RSSI, offset: 0x2C */
__IO uint32_t MACSHORTADDRS0; /**< MAC SHORT ADDRESS 0, offset: 0x30 */
__IO uint32_t MACLONGADDRS0_LSB; /**< MAC LONG ADDRESS 0 LSB, offset: 0x34 */
__IO uint32_t MACLONGADDRS0_MSB; /**< MAC LONG ADDRESS 0 MSB, offset: 0x38 */
__IO uint32_t RX_FRAME_FILTER; /**< RECEIVE FRAME FILTER, offset: 0x3C */
__IO uint32_t CCA_LQI_CTRL; /**< CCA AND LQI CONTROL, offset: 0x40 */
__IO uint32_t CCA2_CTRL; /**< CCA2 CONTROL, offset: 0x44 */
__IO uint32_t FAD_CTRL; /**< FAD CONTROL, offset: 0x48 */
__IO uint32_t SNF_CTRL; /**< SNF CONTROL, offset: 0x4C */
__IO uint32_t BSM_CTRL; /**< BSM CONTROL, offset: 0x50 */
__IO uint32_t MACSHORTADDRS1; /**< MAC SHORT ADDRESS 1, offset: 0x54 */
__IO uint32_t MACLONGADDRS1_LSB; /**< MAC LONG ADDRESS 1 LSB, offset: 0x58 */
__IO uint32_t MACLONGADDRS1_MSB; /**< MAC LONG ADDRESS 1 MSB, offset: 0x5C */
__IO uint32_t DUAL_PAN_CTRL; /**< DUAL PAN CONTROL, offset: 0x60 */
__IO uint32_t CHANNEL_NUM1; /**< CHANNEL NUMBER 1, offset: 0x64 */
__IO uint32_t SAM_CTRL; /**< SAM CONTROL, offset: 0x68 */
__IO uint32_t SAM_TABLE; /**< SOURCE ADDRESS MANAGEMENT TABLE, offset: 0x6C */
__I uint32_t SAM_MATCH; /**< SAM MATCH, offset: 0x70 */
__I uint32_t SAM_FREE_IDX; /**< SAM FREE INDEX, offset: 0x74 */
__IO uint32_t SEQ_CTRL_STS; /**< SEQUENCE CONTROL AND STATUS, offset: 0x78 */
__IO uint32_t ACKDELAY; /**< ACK DELAY, offset: 0x7C */
__IO uint32_t FILTERFAIL_CODE; /**< FILTER FAIL CODE, offset: 0x80 */
__IO uint32_t RX_WTR_MARK; /**< RECEIVE WATER MARK, offset: 0x84 */
uint8_t RESERVED_0[4];
__IO uint32_t SLOT_PRELOAD; /**< SLOT PRELOAD, offset: 0x8C */
__I uint32_t SEQ_STATE; /**< ZIGBEE SEQUENCE STATE, offset: 0x90 */
__IO uint32_t TMR_PRESCALE; /**< TIMER PRESCALER, offset: 0x94 */
__IO uint32_t LENIENCY_LSB; /**< LENIENCY LSB, offset: 0x98 */
__IO uint32_t LENIENCY_MSB; /**< LENIENCY MSB, offset: 0x9C */
__I uint32_t PART_ID; /**< PART ID, offset: 0xA0 */
uint8_t RESERVED_1[92];
__IO uint32_t PKT_BUFFER[32]; /**< PACKET BUFFER, array offset: 0x100, array step: 0x4 */
} ZLL_Type, *ZLL_MemMapPtr;
/* ----------------------------------------------------------------------------
-- ZLL - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup ZLL_Register_Accessor_Macros ZLL - Register accessor macros
* @{
*/
/* ZLL - Register accessors */
#define ZLL_IRQSTS_REG(base) ((base)->IRQSTS)
#define ZLL_PHY_CTRL_REG(base) ((base)->PHY_CTRL)
#define ZLL_EVENT_TMR_REG(base) ((base)->EVENT_TMR)
#define ZLL_TIMESTAMP_REG(base) ((base)->TIMESTAMP)
#define ZLL_T1CMP_REG(base) ((base)->T1CMP)
#define ZLL_T2CMP_REG(base) ((base)->T2CMP)
#define ZLL_T2PRIMECMP_REG(base) ((base)->T2PRIMECMP)
#define ZLL_T3CMP_REG(base) ((base)->T3CMP)
#define ZLL_T4CMP_REG(base) ((base)->T4CMP)
#define ZLL_PA_PWR_REG(base) ((base)->PA_PWR)
#define ZLL_CHANNEL_NUM0_REG(base) ((base)->CHANNEL_NUM0)
#define ZLL_LQI_AND_RSSI_REG(base) ((base)->LQI_AND_RSSI)
#define ZLL_MACSHORTADDRS0_REG(base) ((base)->MACSHORTADDRS0)
#define ZLL_MACLONGADDRS0_LSB_REG(base) ((base)->MACLONGADDRS0_LSB)
#define ZLL_MACLONGADDRS0_MSB_REG(base) ((base)->MACLONGADDRS0_MSB)
#define ZLL_RX_FRAME_FILTER_REG(base) ((base)->RX_FRAME_FILTER)
#define ZLL_CCA_LQI_CTRL_REG(base) ((base)->CCA_LQI_CTRL)
#define ZLL_CCA2_CTRL_REG(base) ((base)->CCA2_CTRL)
#define ZLL_FAD_CTRL_REG(base) ((base)->FAD_CTRL)
#define ZLL_SNF_CTRL_REG(base) ((base)->SNF_CTRL)
#define ZLL_BSM_CTRL_REG(base) ((base)->BSM_CTRL)
#define ZLL_MACSHORTADDRS1_REG(base) ((base)->MACSHORTADDRS1)
#define ZLL_MACLONGADDRS1_LSB_REG(base) ((base)->MACLONGADDRS1_LSB)
#define ZLL_MACLONGADDRS1_MSB_REG(base) ((base)->MACLONGADDRS1_MSB)
#define ZLL_DUAL_PAN_CTRL_REG(base) ((base)->DUAL_PAN_CTRL)
#define ZLL_CHANNEL_NUM1_REG(base) ((base)->CHANNEL_NUM1)
#define ZLL_SAM_CTRL_REG(base) ((base)->SAM_CTRL)
#define ZLL_SAM_TABLE_REG(base) ((base)->SAM_TABLE)
#define ZLL_SAM_MATCH_REG(base) ((base)->SAM_MATCH)
#define ZLL_SAM_FREE_IDX_REG(base) ((base)->SAM_FREE_IDX)
#define ZLL_SEQ_CTRL_STS_REG(base) ((base)->SEQ_CTRL_STS)
#define ZLL_ACKDELAY_REG(base) ((base)->ACKDELAY)
#define ZLL_FILTERFAIL_CODE_REG(base) ((base)->FILTERFAIL_CODE)
#define ZLL_RX_WTR_MARK_REG(base) ((base)->RX_WTR_MARK)
#define ZLL_SLOT_PRELOAD_REG(base) ((base)->SLOT_PRELOAD)
#define ZLL_SEQ_STATE_REG(base) ((base)->SEQ_STATE)
#define ZLL_TMR_PRESCALE_REG(base) ((base)->TMR_PRESCALE)
#define ZLL_LENIENCY_LSB_REG(base) ((base)->LENIENCY_LSB)
#define ZLL_LENIENCY_MSB_REG(base) ((base)->LENIENCY_MSB)
#define ZLL_PART_ID_REG(base) ((base)->PART_ID)
#define ZLL_PKT_BUFFER_REG(base,index) ((base)->PKT_BUFFER[index])
#define ZLL_PKT_BUFFER_COUNT 32
/*!
* @}
*/ /* end of group ZLL_Register_Accessor_Macros */
/* ----------------------------------------------------------------------------
-- ZLL Register Masks
---------------------------------------------------------------------------- */
/*!
* @addtogroup ZLL_Register_Masks ZLL Register Masks
* @{
*/
/* IRQSTS Bit Fields */
#define ZLL_IRQSTS_SEQIRQ_MASK 0x1u
#define ZLL_IRQSTS_SEQIRQ_SHIFT 0
#define ZLL_IRQSTS_SEQIRQ_WIDTH 1
#define ZLL_IRQSTS_SEQIRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_SEQIRQ_SHIFT))&ZLL_IRQSTS_SEQIRQ_MASK)
#define ZLL_IRQSTS_TXIRQ_MASK 0x2u
#define ZLL_IRQSTS_TXIRQ_SHIFT 1
#define ZLL_IRQSTS_TXIRQ_WIDTH 1
#define ZLL_IRQSTS_TXIRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TXIRQ_SHIFT))&ZLL_IRQSTS_TXIRQ_MASK)
#define ZLL_IRQSTS_RXIRQ_MASK 0x4u
#define ZLL_IRQSTS_RXIRQ_SHIFT 2
#define ZLL_IRQSTS_RXIRQ_WIDTH 1
#define ZLL_IRQSTS_RXIRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_RXIRQ_SHIFT))&ZLL_IRQSTS_RXIRQ_MASK)
#define ZLL_IRQSTS_CCAIRQ_MASK 0x8u
#define ZLL_IRQSTS_CCAIRQ_SHIFT 3
#define ZLL_IRQSTS_CCAIRQ_WIDTH 1
#define ZLL_IRQSTS_CCAIRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_CCAIRQ_SHIFT))&ZLL_IRQSTS_CCAIRQ_MASK)
#define ZLL_IRQSTS_RXWTRMRKIRQ_MASK 0x10u
#define ZLL_IRQSTS_RXWTRMRKIRQ_SHIFT 4
#define ZLL_IRQSTS_RXWTRMRKIRQ_WIDTH 1
#define ZLL_IRQSTS_RXWTRMRKIRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_RXWTRMRKIRQ_SHIFT))&ZLL_IRQSTS_RXWTRMRKIRQ_MASK)
#define ZLL_IRQSTS_FILTERFAIL_IRQ_MASK 0x20u
#define ZLL_IRQSTS_FILTERFAIL_IRQ_SHIFT 5
#define ZLL_IRQSTS_FILTERFAIL_IRQ_WIDTH 1
#define ZLL_IRQSTS_FILTERFAIL_IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_FILTERFAIL_IRQ_SHIFT))&ZLL_IRQSTS_FILTERFAIL_IRQ_MASK)
#define ZLL_IRQSTS_PLL_UNLOCK_IRQ_MASK 0x40u
#define ZLL_IRQSTS_PLL_UNLOCK_IRQ_SHIFT 6
#define ZLL_IRQSTS_PLL_UNLOCK_IRQ_WIDTH 1
#define ZLL_IRQSTS_PLL_UNLOCK_IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_PLL_UNLOCK_IRQ_SHIFT))&ZLL_IRQSTS_PLL_UNLOCK_IRQ_MASK)
#define ZLL_IRQSTS_RX_FRM_PEND_MASK 0x80u
#define ZLL_IRQSTS_RX_FRM_PEND_SHIFT 7
#define ZLL_IRQSTS_RX_FRM_PEND_WIDTH 1
#define ZLL_IRQSTS_RX_FRM_PEND(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_RX_FRM_PEND_SHIFT))&ZLL_IRQSTS_RX_FRM_PEND_MASK)
#define ZLL_IRQSTS_PB_ERR_IRQ_MASK 0x200u
#define ZLL_IRQSTS_PB_ERR_IRQ_SHIFT 9
#define ZLL_IRQSTS_PB_ERR_IRQ_WIDTH 1
#define ZLL_IRQSTS_PB_ERR_IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_PB_ERR_IRQ_SHIFT))&ZLL_IRQSTS_PB_ERR_IRQ_MASK)
#define ZLL_IRQSTS_TMRSTATUS_MASK 0x800u
#define ZLL_IRQSTS_TMRSTATUS_SHIFT 11
#define ZLL_IRQSTS_TMRSTATUS_WIDTH 1
#define ZLL_IRQSTS_TMRSTATUS(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMRSTATUS_SHIFT))&ZLL_IRQSTS_TMRSTATUS_MASK)
#define ZLL_IRQSTS_PI_MASK 0x1000u
#define ZLL_IRQSTS_PI_SHIFT 12
#define ZLL_IRQSTS_PI_WIDTH 1
#define ZLL_IRQSTS_PI(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_PI_SHIFT))&ZLL_IRQSTS_PI_MASK)
#define ZLL_IRQSTS_SRCADDR_MASK 0x2000u
#define ZLL_IRQSTS_SRCADDR_SHIFT 13
#define ZLL_IRQSTS_SRCADDR_WIDTH 1
#define ZLL_IRQSTS_SRCADDR(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_SRCADDR_SHIFT))&ZLL_IRQSTS_SRCADDR_MASK)
#define ZLL_IRQSTS_CCA_MASK 0x4000u
#define ZLL_IRQSTS_CCA_SHIFT 14
#define ZLL_IRQSTS_CCA_WIDTH 1
#define ZLL_IRQSTS_CCA(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_CCA_SHIFT))&ZLL_IRQSTS_CCA_MASK)
#define ZLL_IRQSTS_CRCVALID_MASK 0x8000u
#define ZLL_IRQSTS_CRCVALID_SHIFT 15
#define ZLL_IRQSTS_CRCVALID_WIDTH 1
#define ZLL_IRQSTS_CRCVALID(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_CRCVALID_SHIFT))&ZLL_IRQSTS_CRCVALID_MASK)
#define ZLL_IRQSTS_TMR1IRQ_MASK 0x10000u
#define ZLL_IRQSTS_TMR1IRQ_SHIFT 16
#define ZLL_IRQSTS_TMR1IRQ_WIDTH 1
#define ZLL_IRQSTS_TMR1IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR1IRQ_SHIFT))&ZLL_IRQSTS_TMR1IRQ_MASK)
#define ZLL_IRQSTS_TMR2IRQ_MASK 0x20000u
#define ZLL_IRQSTS_TMR2IRQ_SHIFT 17
#define ZLL_IRQSTS_TMR2IRQ_WIDTH 1
#define ZLL_IRQSTS_TMR2IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR2IRQ_SHIFT))&ZLL_IRQSTS_TMR2IRQ_MASK)
#define ZLL_IRQSTS_TMR3IRQ_MASK 0x40000u
#define ZLL_IRQSTS_TMR3IRQ_SHIFT 18
#define ZLL_IRQSTS_TMR3IRQ_WIDTH 1
#define ZLL_IRQSTS_TMR3IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR3IRQ_SHIFT))&ZLL_IRQSTS_TMR3IRQ_MASK)
#define ZLL_IRQSTS_TMR4IRQ_MASK 0x80000u
#define ZLL_IRQSTS_TMR4IRQ_SHIFT 19
#define ZLL_IRQSTS_TMR4IRQ_WIDTH 1
#define ZLL_IRQSTS_TMR4IRQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR4IRQ_SHIFT))&ZLL_IRQSTS_TMR4IRQ_MASK)
#define ZLL_IRQSTS_TMR1MSK_MASK 0x100000u
#define ZLL_IRQSTS_TMR1MSK_SHIFT 20
#define ZLL_IRQSTS_TMR1MSK_WIDTH 1
#define ZLL_IRQSTS_TMR1MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR1MSK_SHIFT))&ZLL_IRQSTS_TMR1MSK_MASK)
#define ZLL_IRQSTS_TMR2MSK_MASK 0x200000u
#define ZLL_IRQSTS_TMR2MSK_SHIFT 21
#define ZLL_IRQSTS_TMR2MSK_WIDTH 1
#define ZLL_IRQSTS_TMR2MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR2MSK_SHIFT))&ZLL_IRQSTS_TMR2MSK_MASK)
#define ZLL_IRQSTS_TMR3MSK_MASK 0x400000u
#define ZLL_IRQSTS_TMR3MSK_SHIFT 22
#define ZLL_IRQSTS_TMR3MSK_WIDTH 1
#define ZLL_IRQSTS_TMR3MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR3MSK_SHIFT))&ZLL_IRQSTS_TMR3MSK_MASK)
#define ZLL_IRQSTS_TMR4MSK_MASK 0x800000u
#define ZLL_IRQSTS_TMR4MSK_SHIFT 23
#define ZLL_IRQSTS_TMR4MSK_WIDTH 1
#define ZLL_IRQSTS_TMR4MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_TMR4MSK_SHIFT))&ZLL_IRQSTS_TMR4MSK_MASK)
#define ZLL_IRQSTS_RX_FRAME_LENGTH_MASK 0x7F000000u
#define ZLL_IRQSTS_RX_FRAME_LENGTH_SHIFT 24
#define ZLL_IRQSTS_RX_FRAME_LENGTH_WIDTH 7
#define ZLL_IRQSTS_RX_FRAME_LENGTH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_IRQSTS_RX_FRAME_LENGTH_SHIFT))&ZLL_IRQSTS_RX_FRAME_LENGTH_MASK)
/* PHY_CTRL Bit Fields */
#define ZLL_PHY_CTRL_XCVSEQ_MASK 0x7u
#define ZLL_PHY_CTRL_XCVSEQ_SHIFT 0
#define ZLL_PHY_CTRL_XCVSEQ_WIDTH 3
#define ZLL_PHY_CTRL_XCVSEQ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_XCVSEQ_SHIFT))&ZLL_PHY_CTRL_XCVSEQ_MASK)
#define ZLL_PHY_CTRL_AUTOACK_MASK 0x8u
#define ZLL_PHY_CTRL_AUTOACK_SHIFT 3
#define ZLL_PHY_CTRL_AUTOACK_WIDTH 1
#define ZLL_PHY_CTRL_AUTOACK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_AUTOACK_SHIFT))&ZLL_PHY_CTRL_AUTOACK_MASK)
#define ZLL_PHY_CTRL_RXACKRQD_MASK 0x10u
#define ZLL_PHY_CTRL_RXACKRQD_SHIFT 4
#define ZLL_PHY_CTRL_RXACKRQD_WIDTH 1
#define ZLL_PHY_CTRL_RXACKRQD(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_RXACKRQD_SHIFT))&ZLL_PHY_CTRL_RXACKRQD_MASK)
#define ZLL_PHY_CTRL_CCABFRTX_MASK 0x20u
#define ZLL_PHY_CTRL_CCABFRTX_SHIFT 5
#define ZLL_PHY_CTRL_CCABFRTX_WIDTH 1
#define ZLL_PHY_CTRL_CCABFRTX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_CCABFRTX_SHIFT))&ZLL_PHY_CTRL_CCABFRTX_MASK)
#define ZLL_PHY_CTRL_SLOTTED_MASK 0x40u
#define ZLL_PHY_CTRL_SLOTTED_SHIFT 6
#define ZLL_PHY_CTRL_SLOTTED_WIDTH 1
#define ZLL_PHY_CTRL_SLOTTED(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_SLOTTED_SHIFT))&ZLL_PHY_CTRL_SLOTTED_MASK)
#define ZLL_PHY_CTRL_TMRTRIGEN_MASK 0x80u
#define ZLL_PHY_CTRL_TMRTRIGEN_SHIFT 7
#define ZLL_PHY_CTRL_TMRTRIGEN_WIDTH 1
#define ZLL_PHY_CTRL_TMRTRIGEN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TMRTRIGEN_SHIFT))&ZLL_PHY_CTRL_TMRTRIGEN_MASK)
#define ZLL_PHY_CTRL_SEQMSK_MASK 0x100u
#define ZLL_PHY_CTRL_SEQMSK_SHIFT 8
#define ZLL_PHY_CTRL_SEQMSK_WIDTH 1
#define ZLL_PHY_CTRL_SEQMSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_SEQMSK_SHIFT))&ZLL_PHY_CTRL_SEQMSK_MASK)
#define ZLL_PHY_CTRL_TXMSK_MASK 0x200u
#define ZLL_PHY_CTRL_TXMSK_SHIFT 9
#define ZLL_PHY_CTRL_TXMSK_WIDTH 1
#define ZLL_PHY_CTRL_TXMSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TXMSK_SHIFT))&ZLL_PHY_CTRL_TXMSK_MASK)
#define ZLL_PHY_CTRL_RXMSK_MASK 0x400u
#define ZLL_PHY_CTRL_RXMSK_SHIFT 10
#define ZLL_PHY_CTRL_RXMSK_WIDTH 1
#define ZLL_PHY_CTRL_RXMSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_RXMSK_SHIFT))&ZLL_PHY_CTRL_RXMSK_MASK)
#define ZLL_PHY_CTRL_CCAMSK_MASK 0x800u
#define ZLL_PHY_CTRL_CCAMSK_SHIFT 11
#define ZLL_PHY_CTRL_CCAMSK_WIDTH 1
#define ZLL_PHY_CTRL_CCAMSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_CCAMSK_SHIFT))&ZLL_PHY_CTRL_CCAMSK_MASK)
#define ZLL_PHY_CTRL_RX_WMRK_MSK_MASK 0x1000u
#define ZLL_PHY_CTRL_RX_WMRK_MSK_SHIFT 12
#define ZLL_PHY_CTRL_RX_WMRK_MSK_WIDTH 1
#define ZLL_PHY_CTRL_RX_WMRK_MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_RX_WMRK_MSK_SHIFT))&ZLL_PHY_CTRL_RX_WMRK_MSK_MASK)
#define ZLL_PHY_CTRL_FILTERFAIL_MSK_MASK 0x2000u
#define ZLL_PHY_CTRL_FILTERFAIL_MSK_SHIFT 13
#define ZLL_PHY_CTRL_FILTERFAIL_MSK_WIDTH 1
#define ZLL_PHY_CTRL_FILTERFAIL_MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_FILTERFAIL_MSK_SHIFT))&ZLL_PHY_CTRL_FILTERFAIL_MSK_MASK)
#define ZLL_PHY_CTRL_PLL_UNLOCK_MSK_MASK 0x4000u
#define ZLL_PHY_CTRL_PLL_UNLOCK_MSK_SHIFT 14
#define ZLL_PHY_CTRL_PLL_UNLOCK_MSK_WIDTH 1
#define ZLL_PHY_CTRL_PLL_UNLOCK_MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_PLL_UNLOCK_MSK_SHIFT))&ZLL_PHY_CTRL_PLL_UNLOCK_MSK_MASK)
#define ZLL_PHY_CTRL_CRC_MSK_MASK 0x8000u
#define ZLL_PHY_CTRL_CRC_MSK_SHIFT 15
#define ZLL_PHY_CTRL_CRC_MSK_WIDTH 1
#define ZLL_PHY_CTRL_CRC_MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_CRC_MSK_SHIFT))&ZLL_PHY_CTRL_CRC_MSK_MASK)
#define ZLL_PHY_CTRL_PB_ERR_MSK_MASK 0x20000u
#define ZLL_PHY_CTRL_PB_ERR_MSK_SHIFT 17
#define ZLL_PHY_CTRL_PB_ERR_MSK_WIDTH 1
#define ZLL_PHY_CTRL_PB_ERR_MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_PB_ERR_MSK_SHIFT))&ZLL_PHY_CTRL_PB_ERR_MSK_MASK)
#define ZLL_PHY_CTRL_TMR1CMP_EN_MASK 0x100000u
#define ZLL_PHY_CTRL_TMR1CMP_EN_SHIFT 20
#define ZLL_PHY_CTRL_TMR1CMP_EN_WIDTH 1
#define ZLL_PHY_CTRL_TMR1CMP_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TMR1CMP_EN_SHIFT))&ZLL_PHY_CTRL_TMR1CMP_EN_MASK)
#define ZLL_PHY_CTRL_TMR2CMP_EN_MASK 0x200000u
#define ZLL_PHY_CTRL_TMR2CMP_EN_SHIFT 21
#define ZLL_PHY_CTRL_TMR2CMP_EN_WIDTH 1
#define ZLL_PHY_CTRL_TMR2CMP_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TMR2CMP_EN_SHIFT))&ZLL_PHY_CTRL_TMR2CMP_EN_MASK)
#define ZLL_PHY_CTRL_TMR3CMP_EN_MASK 0x400000u
#define ZLL_PHY_CTRL_TMR3CMP_EN_SHIFT 22
#define ZLL_PHY_CTRL_TMR3CMP_EN_WIDTH 1
#define ZLL_PHY_CTRL_TMR3CMP_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TMR3CMP_EN_SHIFT))&ZLL_PHY_CTRL_TMR3CMP_EN_MASK)
#define ZLL_PHY_CTRL_TMR4CMP_EN_MASK 0x800000u
#define ZLL_PHY_CTRL_TMR4CMP_EN_SHIFT 23
#define ZLL_PHY_CTRL_TMR4CMP_EN_WIDTH 1
#define ZLL_PHY_CTRL_TMR4CMP_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TMR4CMP_EN_SHIFT))&ZLL_PHY_CTRL_TMR4CMP_EN_MASK)
#define ZLL_PHY_CTRL_TC2PRIME_EN_MASK 0x1000000u
#define ZLL_PHY_CTRL_TC2PRIME_EN_SHIFT 24
#define ZLL_PHY_CTRL_TC2PRIME_EN_WIDTH 1
#define ZLL_PHY_CTRL_TC2PRIME_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TC2PRIME_EN_SHIFT))&ZLL_PHY_CTRL_TC2PRIME_EN_MASK)
#define ZLL_PHY_CTRL_PROMISCUOUS_MASK 0x2000000u
#define ZLL_PHY_CTRL_PROMISCUOUS_SHIFT 25
#define ZLL_PHY_CTRL_PROMISCUOUS_WIDTH 1
#define ZLL_PHY_CTRL_PROMISCUOUS(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_PROMISCUOUS_SHIFT))&ZLL_PHY_CTRL_PROMISCUOUS_MASK)
#define ZLL_PHY_CTRL_TMRLOAD_MASK 0x4000000u
#define ZLL_PHY_CTRL_TMRLOAD_SHIFT 26
#define ZLL_PHY_CTRL_TMRLOAD_WIDTH 1
#define ZLL_PHY_CTRL_TMRLOAD(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TMRLOAD_SHIFT))&ZLL_PHY_CTRL_TMRLOAD_MASK)
#define ZLL_PHY_CTRL_CCATYPE_MASK 0x18000000u
#define ZLL_PHY_CTRL_CCATYPE_SHIFT 27
#define ZLL_PHY_CTRL_CCATYPE_WIDTH 2
#define ZLL_PHY_CTRL_CCATYPE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_CCATYPE_SHIFT))&ZLL_PHY_CTRL_CCATYPE_MASK)
#define ZLL_PHY_CTRL_PANCORDNTR0_MASK 0x20000000u
#define ZLL_PHY_CTRL_PANCORDNTR0_SHIFT 29
#define ZLL_PHY_CTRL_PANCORDNTR0_WIDTH 1
#define ZLL_PHY_CTRL_PANCORDNTR0(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_PANCORDNTR0_SHIFT))&ZLL_PHY_CTRL_PANCORDNTR0_MASK)
#define ZLL_PHY_CTRL_TC3TMOUT_MASK 0x40000000u
#define ZLL_PHY_CTRL_TC3TMOUT_SHIFT 30
#define ZLL_PHY_CTRL_TC3TMOUT_WIDTH 1
#define ZLL_PHY_CTRL_TC3TMOUT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TC3TMOUT_SHIFT))&ZLL_PHY_CTRL_TC3TMOUT_MASK)
#define ZLL_PHY_CTRL_TRCV_MSK_MASK 0x80000000u
#define ZLL_PHY_CTRL_TRCV_MSK_SHIFT 31
#define ZLL_PHY_CTRL_TRCV_MSK_WIDTH 1
#define ZLL_PHY_CTRL_TRCV_MSK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PHY_CTRL_TRCV_MSK_SHIFT))&ZLL_PHY_CTRL_TRCV_MSK_MASK)
/* EVENT_TMR Bit Fields */
#define ZLL_EVENT_TMR_EVENT_TMR_MASK 0xFFFFFFu
#define ZLL_EVENT_TMR_EVENT_TMR_SHIFT 0
#define ZLL_EVENT_TMR_EVENT_TMR_WIDTH 24
#define ZLL_EVENT_TMR_EVENT_TMR(x) (((uint32_t)(((uint32_t)(x))<<ZLL_EVENT_TMR_EVENT_TMR_SHIFT))&ZLL_EVENT_TMR_EVENT_TMR_MASK)
/* TIMESTAMP Bit Fields */
#define ZLL_TIMESTAMP_TIMESTAMP_MASK 0xFFFFFFu
#define ZLL_TIMESTAMP_TIMESTAMP_SHIFT 0
#define ZLL_TIMESTAMP_TIMESTAMP_WIDTH 24
#define ZLL_TIMESTAMP_TIMESTAMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_TIMESTAMP_TIMESTAMP_SHIFT))&ZLL_TIMESTAMP_TIMESTAMP_MASK)
/* T1CMP Bit Fields */
#define ZLL_T1CMP_T1CMP_MASK 0xFFFFFFu
#define ZLL_T1CMP_T1CMP_SHIFT 0
#define ZLL_T1CMP_T1CMP_WIDTH 24
#define ZLL_T1CMP_T1CMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_T1CMP_T1CMP_SHIFT))&ZLL_T1CMP_T1CMP_MASK)
/* T2CMP Bit Fields */
#define ZLL_T2CMP_T2CMP_MASK 0xFFFFFFu
#define ZLL_T2CMP_T2CMP_SHIFT 0
#define ZLL_T2CMP_T2CMP_WIDTH 24
#define ZLL_T2CMP_T2CMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_T2CMP_T2CMP_SHIFT))&ZLL_T2CMP_T2CMP_MASK)
/* T2PRIMECMP Bit Fields */
#define ZLL_T2PRIMECMP_T2PRIMECMP_MASK 0xFFFFu
#define ZLL_T2PRIMECMP_T2PRIMECMP_SHIFT 0
#define ZLL_T2PRIMECMP_T2PRIMECMP_WIDTH 16
#define ZLL_T2PRIMECMP_T2PRIMECMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_T2PRIMECMP_T2PRIMECMP_SHIFT))&ZLL_T2PRIMECMP_T2PRIMECMP_MASK)
/* T3CMP Bit Fields */
#define ZLL_T3CMP_T3CMP_MASK 0xFFFFFFu
#define ZLL_T3CMP_T3CMP_SHIFT 0
#define ZLL_T3CMP_T3CMP_WIDTH 24
#define ZLL_T3CMP_T3CMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_T3CMP_T3CMP_SHIFT))&ZLL_T3CMP_T3CMP_MASK)
/* T4CMP Bit Fields */
#define ZLL_T4CMP_T4CMP_MASK 0xFFFFFFu
#define ZLL_T4CMP_T4CMP_SHIFT 0
#define ZLL_T4CMP_T4CMP_WIDTH 24
#define ZLL_T4CMP_T4CMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_T4CMP_T4CMP_SHIFT))&ZLL_T4CMP_T4CMP_MASK)
/* PA_PWR Bit Fields */
#define ZLL_PA_PWR_PA_PWR_MASK 0xFu
#define ZLL_PA_PWR_PA_PWR_SHIFT 0
#define ZLL_PA_PWR_PA_PWR_WIDTH 4
#define ZLL_PA_PWR_PA_PWR(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PA_PWR_PA_PWR_SHIFT))&ZLL_PA_PWR_PA_PWR_MASK)
/* CHANNEL_NUM0 Bit Fields */
#define ZLL_CHANNEL_NUM0_CHANNEL_NUM0_MASK 0x7Fu
#define ZLL_CHANNEL_NUM0_CHANNEL_NUM0_SHIFT 0
#define ZLL_CHANNEL_NUM0_CHANNEL_NUM0_WIDTH 7
#define ZLL_CHANNEL_NUM0_CHANNEL_NUM0(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CHANNEL_NUM0_CHANNEL_NUM0_SHIFT))&ZLL_CHANNEL_NUM0_CHANNEL_NUM0_MASK)
/* LQI_AND_RSSI Bit Fields */
#define ZLL_LQI_AND_RSSI_LQI_VALUE_MASK 0xFFu
#define ZLL_LQI_AND_RSSI_LQI_VALUE_SHIFT 0
#define ZLL_LQI_AND_RSSI_LQI_VALUE_WIDTH 8
#define ZLL_LQI_AND_RSSI_LQI_VALUE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_LQI_AND_RSSI_LQI_VALUE_SHIFT))&ZLL_LQI_AND_RSSI_LQI_VALUE_MASK)
#define ZLL_LQI_AND_RSSI_RSSI_MASK 0xFF00u
#define ZLL_LQI_AND_RSSI_RSSI_SHIFT 8
#define ZLL_LQI_AND_RSSI_RSSI_WIDTH 8
#define ZLL_LQI_AND_RSSI_RSSI(x) (((uint32_t)(((uint32_t)(x))<<ZLL_LQI_AND_RSSI_RSSI_SHIFT))&ZLL_LQI_AND_RSSI_RSSI_MASK)
#define ZLL_LQI_AND_RSSI_CCA1_ED_FNL_MASK 0xFF0000u
#define ZLL_LQI_AND_RSSI_CCA1_ED_FNL_SHIFT 16
#define ZLL_LQI_AND_RSSI_CCA1_ED_FNL_WIDTH 8
#define ZLL_LQI_AND_RSSI_CCA1_ED_FNL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_LQI_AND_RSSI_CCA1_ED_FNL_SHIFT))&ZLL_LQI_AND_RSSI_CCA1_ED_FNL_MASK)
/* MACSHORTADDRS0 Bit Fields */
#define ZLL_MACSHORTADDRS0_MACPANID0_MASK 0xFFFFu
#define ZLL_MACSHORTADDRS0_MACPANID0_SHIFT 0
#define ZLL_MACSHORTADDRS0_MACPANID0_WIDTH 16
#define ZLL_MACSHORTADDRS0_MACPANID0(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACSHORTADDRS0_MACPANID0_SHIFT))&ZLL_MACSHORTADDRS0_MACPANID0_MASK)
#define ZLL_MACSHORTADDRS0_MACSHORTADDRS0_MASK 0xFFFF0000u
#define ZLL_MACSHORTADDRS0_MACSHORTADDRS0_SHIFT 16
#define ZLL_MACSHORTADDRS0_MACSHORTADDRS0_WIDTH 16
#define ZLL_MACSHORTADDRS0_MACSHORTADDRS0(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACSHORTADDRS0_MACSHORTADDRS0_SHIFT))&ZLL_MACSHORTADDRS0_MACSHORTADDRS0_MASK)
/* MACLONGADDRS0_LSB Bit Fields */
#define ZLL_MACLONGADDRS0_LSB_MACLONGADDRS0_LSB_MASK 0xFFFFFFFFu
#define ZLL_MACLONGADDRS0_LSB_MACLONGADDRS0_LSB_SHIFT 0
#define ZLL_MACLONGADDRS0_LSB_MACLONGADDRS0_LSB_WIDTH 32
#define ZLL_MACLONGADDRS0_LSB_MACLONGADDRS0_LSB(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACLONGADDRS0_LSB_MACLONGADDRS0_LSB_SHIFT))&ZLL_MACLONGADDRS0_LSB_MACLONGADDRS0_LSB_MASK)
/* MACLONGADDRS0_MSB Bit Fields */
#define ZLL_MACLONGADDRS0_MSB_MACLONGADDRS0_MSB_MASK 0xFFFFFFFFu
#define ZLL_MACLONGADDRS0_MSB_MACLONGADDRS0_MSB_SHIFT 0
#define ZLL_MACLONGADDRS0_MSB_MACLONGADDRS0_MSB_WIDTH 32
#define ZLL_MACLONGADDRS0_MSB_MACLONGADDRS0_MSB(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACLONGADDRS0_MSB_MACLONGADDRS0_MSB_SHIFT))&ZLL_MACLONGADDRS0_MSB_MACLONGADDRS0_MSB_MASK)
/* RX_FRAME_FILTER Bit Fields */
#define ZLL_RX_FRAME_FILTER_BEACON_FT_MASK 0x1u
#define ZLL_RX_FRAME_FILTER_BEACON_FT_SHIFT 0
#define ZLL_RX_FRAME_FILTER_BEACON_FT_WIDTH 1
#define ZLL_RX_FRAME_FILTER_BEACON_FT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_BEACON_FT_SHIFT))&ZLL_RX_FRAME_FILTER_BEACON_FT_MASK)
#define ZLL_RX_FRAME_FILTER_DATA_FT_MASK 0x2u
#define ZLL_RX_FRAME_FILTER_DATA_FT_SHIFT 1
#define ZLL_RX_FRAME_FILTER_DATA_FT_WIDTH 1
#define ZLL_RX_FRAME_FILTER_DATA_FT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_DATA_FT_SHIFT))&ZLL_RX_FRAME_FILTER_DATA_FT_MASK)
#define ZLL_RX_FRAME_FILTER_ACK_FT_MASK 0x4u
#define ZLL_RX_FRAME_FILTER_ACK_FT_SHIFT 2
#define ZLL_RX_FRAME_FILTER_ACK_FT_WIDTH 1
#define ZLL_RX_FRAME_FILTER_ACK_FT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_ACK_FT_SHIFT))&ZLL_RX_FRAME_FILTER_ACK_FT_MASK)
#define ZLL_RX_FRAME_FILTER_CMD_FT_MASK 0x8u
#define ZLL_RX_FRAME_FILTER_CMD_FT_SHIFT 3
#define ZLL_RX_FRAME_FILTER_CMD_FT_WIDTH 1
#define ZLL_RX_FRAME_FILTER_CMD_FT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_CMD_FT_SHIFT))&ZLL_RX_FRAME_FILTER_CMD_FT_MASK)
#define ZLL_RX_FRAME_FILTER_NS_FT_MASK 0x10u
#define ZLL_RX_FRAME_FILTER_NS_FT_SHIFT 4
#define ZLL_RX_FRAME_FILTER_NS_FT_WIDTH 1
#define ZLL_RX_FRAME_FILTER_NS_FT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_NS_FT_SHIFT))&ZLL_RX_FRAME_FILTER_NS_FT_MASK)
#define ZLL_RX_FRAME_FILTER_ACTIVE_PROMISCUOUS_MASK 0x20u
#define ZLL_RX_FRAME_FILTER_ACTIVE_PROMISCUOUS_SHIFT 5
#define ZLL_RX_FRAME_FILTER_ACTIVE_PROMISCUOUS_WIDTH 1
#define ZLL_RX_FRAME_FILTER_ACTIVE_PROMISCUOUS(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_ACTIVE_PROMISCUOUS_SHIFT))&ZLL_RX_FRAME_FILTER_ACTIVE_PROMISCUOUS_MASK)
#define ZLL_RX_FRAME_FILTER_FRM_VER_MASK 0xC0u
#define ZLL_RX_FRAME_FILTER_FRM_VER_SHIFT 6
#define ZLL_RX_FRAME_FILTER_FRM_VER_WIDTH 2
#define ZLL_RX_FRAME_FILTER_FRM_VER(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_FRAME_FILTER_FRM_VER_SHIFT))&ZLL_RX_FRAME_FILTER_FRM_VER_MASK)
/* CCA_LQI_CTRL Bit Fields */
#define ZLL_CCA_LQI_CTRL_CCA1_THRESH_MASK 0xFFu
#define ZLL_CCA_LQI_CTRL_CCA1_THRESH_SHIFT 0
#define ZLL_CCA_LQI_CTRL_CCA1_THRESH_WIDTH 8
#define ZLL_CCA_LQI_CTRL_CCA1_THRESH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CCA_LQI_CTRL_CCA1_THRESH_SHIFT))&ZLL_CCA_LQI_CTRL_CCA1_THRESH_MASK)
#define ZLL_CCA_LQI_CTRL_LQI_OFFSET_COMP_MASK 0xFF0000u
#define ZLL_CCA_LQI_CTRL_LQI_OFFSET_COMP_SHIFT 16
#define ZLL_CCA_LQI_CTRL_LQI_OFFSET_COMP_WIDTH 8
#define ZLL_CCA_LQI_CTRL_LQI_OFFSET_COMP(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CCA_LQI_CTRL_LQI_OFFSET_COMP_SHIFT))&ZLL_CCA_LQI_CTRL_LQI_OFFSET_COMP_MASK)
#define ZLL_CCA_LQI_CTRL_CCA3_AND_NOT_OR_MASK 0x8000000u
#define ZLL_CCA_LQI_CTRL_CCA3_AND_NOT_OR_SHIFT 27
#define ZLL_CCA_LQI_CTRL_CCA3_AND_NOT_OR_WIDTH 1
#define ZLL_CCA_LQI_CTRL_CCA3_AND_NOT_OR(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CCA_LQI_CTRL_CCA3_AND_NOT_OR_SHIFT))&ZLL_CCA_LQI_CTRL_CCA3_AND_NOT_OR_MASK)
/* CCA2_CTRL Bit Fields */
#define ZLL_CCA2_CTRL_CCA2_NUM_CORR_PEAKS_MASK 0xFu
#define ZLL_CCA2_CTRL_CCA2_NUM_CORR_PEAKS_SHIFT 0
#define ZLL_CCA2_CTRL_CCA2_NUM_CORR_PEAKS_WIDTH 4
#define ZLL_CCA2_CTRL_CCA2_NUM_CORR_PEAKS(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CCA2_CTRL_CCA2_NUM_CORR_PEAKS_SHIFT))&ZLL_CCA2_CTRL_CCA2_NUM_CORR_PEAKS_MASK)
#define ZLL_CCA2_CTRL_CCA2_MIN_NUM_CORR_TH_MASK 0x70u
#define ZLL_CCA2_CTRL_CCA2_MIN_NUM_CORR_TH_SHIFT 4
#define ZLL_CCA2_CTRL_CCA2_MIN_NUM_CORR_TH_WIDTH 3
#define ZLL_CCA2_CTRL_CCA2_MIN_NUM_CORR_TH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CCA2_CTRL_CCA2_MIN_NUM_CORR_TH_SHIFT))&ZLL_CCA2_CTRL_CCA2_MIN_NUM_CORR_TH_MASK)
#define ZLL_CCA2_CTRL_CCA2_CORR_THRESH_MASK 0xFF00u
#define ZLL_CCA2_CTRL_CCA2_CORR_THRESH_SHIFT 8
#define ZLL_CCA2_CTRL_CCA2_CORR_THRESH_WIDTH 8
#define ZLL_CCA2_CTRL_CCA2_CORR_THRESH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CCA2_CTRL_CCA2_CORR_THRESH_SHIFT))&ZLL_CCA2_CTRL_CCA2_CORR_THRESH_MASK)
/* FAD_CTRL Bit Fields */
#define ZLL_FAD_CTRL_FAD_EN_MASK 0x1u
#define ZLL_FAD_CTRL_FAD_EN_SHIFT 0
#define ZLL_FAD_CTRL_FAD_EN_WIDTH 1
#define ZLL_FAD_CTRL_FAD_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_FAD_EN_SHIFT))&ZLL_FAD_CTRL_FAD_EN_MASK)
#define ZLL_FAD_CTRL_ANTX_MASK 0x2u
#define ZLL_FAD_CTRL_ANTX_SHIFT 1
#define ZLL_FAD_CTRL_ANTX_WIDTH 1
#define ZLL_FAD_CTRL_ANTX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_ANTX_SHIFT))&ZLL_FAD_CTRL_ANTX_MASK)
#define ZLL_FAD_CTRL_FAD_NOT_GPIO_MASK 0x4u
#define ZLL_FAD_CTRL_FAD_NOT_GPIO_SHIFT 2
#define ZLL_FAD_CTRL_FAD_NOT_GPIO_WIDTH 1
#define ZLL_FAD_CTRL_FAD_NOT_GPIO(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_FAD_NOT_GPIO_SHIFT))&ZLL_FAD_CTRL_FAD_NOT_GPIO_MASK)
#define ZLL_FAD_CTRL_ANTX_EN_MASK 0x300u
#define ZLL_FAD_CTRL_ANTX_EN_SHIFT 8
#define ZLL_FAD_CTRL_ANTX_EN_WIDTH 2
#define ZLL_FAD_CTRL_ANTX_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_ANTX_EN_SHIFT))&ZLL_FAD_CTRL_ANTX_EN_MASK)
#define ZLL_FAD_CTRL_ANTX_HZ_MASK 0x400u
#define ZLL_FAD_CTRL_ANTX_HZ_SHIFT 10
#define ZLL_FAD_CTRL_ANTX_HZ_WIDTH 1
#define ZLL_FAD_CTRL_ANTX_HZ(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_ANTX_HZ_SHIFT))&ZLL_FAD_CTRL_ANTX_HZ_MASK)
#define ZLL_FAD_CTRL_ANTX_CTRLMODE_MASK 0x800u
#define ZLL_FAD_CTRL_ANTX_CTRLMODE_SHIFT 11
#define ZLL_FAD_CTRL_ANTX_CTRLMODE_WIDTH 1
#define ZLL_FAD_CTRL_ANTX_CTRLMODE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_ANTX_CTRLMODE_SHIFT))&ZLL_FAD_CTRL_ANTX_CTRLMODE_MASK)
#define ZLL_FAD_CTRL_ANTX_POL_MASK 0xF000u
#define ZLL_FAD_CTRL_ANTX_POL_SHIFT 12
#define ZLL_FAD_CTRL_ANTX_POL_WIDTH 4
#define ZLL_FAD_CTRL_ANTX_POL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FAD_CTRL_ANTX_POL_SHIFT))&ZLL_FAD_CTRL_ANTX_POL_MASK)
/* SNF_CTRL Bit Fields */
#define ZLL_SNF_CTRL_SNF_EN_MASK 0x1u
#define ZLL_SNF_CTRL_SNF_EN_SHIFT 0
#define ZLL_SNF_CTRL_SNF_EN_WIDTH 1
#define ZLL_SNF_CTRL_SNF_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SNF_CTRL_SNF_EN_SHIFT))&ZLL_SNF_CTRL_SNF_EN_MASK)
/* BSM_CTRL Bit Fields */
#define ZLL_BSM_CTRL_BSM_EN_MASK 0x1u
#define ZLL_BSM_CTRL_BSM_EN_SHIFT 0
#define ZLL_BSM_CTRL_BSM_EN_WIDTH 1
#define ZLL_BSM_CTRL_BSM_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_BSM_CTRL_BSM_EN_SHIFT))&ZLL_BSM_CTRL_BSM_EN_MASK)
/* MACSHORTADDRS1 Bit Fields */
#define ZLL_MACSHORTADDRS1_MACPANID1_MASK 0xFFFFu
#define ZLL_MACSHORTADDRS1_MACPANID1_SHIFT 0
#define ZLL_MACSHORTADDRS1_MACPANID1_WIDTH 16
#define ZLL_MACSHORTADDRS1_MACPANID1(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACSHORTADDRS1_MACPANID1_SHIFT))&ZLL_MACSHORTADDRS1_MACPANID1_MASK)
#define ZLL_MACSHORTADDRS1_MACSHORTADDRS1_MASK 0xFFFF0000u
#define ZLL_MACSHORTADDRS1_MACSHORTADDRS1_SHIFT 16
#define ZLL_MACSHORTADDRS1_MACSHORTADDRS1_WIDTH 16
#define ZLL_MACSHORTADDRS1_MACSHORTADDRS1(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACSHORTADDRS1_MACSHORTADDRS1_SHIFT))&ZLL_MACSHORTADDRS1_MACSHORTADDRS1_MASK)
/* MACLONGADDRS1_LSB Bit Fields */
#define ZLL_MACLONGADDRS1_LSB_MACLONGADDRS1_LSB_MASK 0xFFFFFFFFu
#define ZLL_MACLONGADDRS1_LSB_MACLONGADDRS1_LSB_SHIFT 0
#define ZLL_MACLONGADDRS1_LSB_MACLONGADDRS1_LSB_WIDTH 32
#define ZLL_MACLONGADDRS1_LSB_MACLONGADDRS1_LSB(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACLONGADDRS1_LSB_MACLONGADDRS1_LSB_SHIFT))&ZLL_MACLONGADDRS1_LSB_MACLONGADDRS1_LSB_MASK)
/* MACLONGADDRS1_MSB Bit Fields */
#define ZLL_MACLONGADDRS1_MSB_MACLONGADDRS1_MSB_MASK 0xFFFFFFFFu
#define ZLL_MACLONGADDRS1_MSB_MACLONGADDRS1_MSB_SHIFT 0
#define ZLL_MACLONGADDRS1_MSB_MACLONGADDRS1_MSB_WIDTH 32
#define ZLL_MACLONGADDRS1_MSB_MACLONGADDRS1_MSB(x) (((uint32_t)(((uint32_t)(x))<<ZLL_MACLONGADDRS1_MSB_MACLONGADDRS1_MSB_SHIFT))&ZLL_MACLONGADDRS1_MSB_MACLONGADDRS1_MSB_MASK)
/* DUAL_PAN_CTRL Bit Fields */
#define ZLL_DUAL_PAN_CTRL_ACTIVE_NETWORK_MASK 0x1u
#define ZLL_DUAL_PAN_CTRL_ACTIVE_NETWORK_SHIFT 0
#define ZLL_DUAL_PAN_CTRL_ACTIVE_NETWORK_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_ACTIVE_NETWORK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_ACTIVE_NETWORK_SHIFT))&ZLL_DUAL_PAN_CTRL_ACTIVE_NETWORK_MASK)
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_AUTO_MASK 0x2u
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_AUTO_SHIFT 1
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_AUTO_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_AUTO(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_DUAL_PAN_AUTO_SHIFT))&ZLL_DUAL_PAN_CTRL_DUAL_PAN_AUTO_MASK)
#define ZLL_DUAL_PAN_CTRL_PANCORDNTR1_MASK 0x4u
#define ZLL_DUAL_PAN_CTRL_PANCORDNTR1_SHIFT 2
#define ZLL_DUAL_PAN_CTRL_PANCORDNTR1_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_PANCORDNTR1(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_PANCORDNTR1_SHIFT))&ZLL_DUAL_PAN_CTRL_PANCORDNTR1_MASK)
#define ZLL_DUAL_PAN_CTRL_CURRENT_NETWORK_MASK 0x8u
#define ZLL_DUAL_PAN_CTRL_CURRENT_NETWORK_SHIFT 3
#define ZLL_DUAL_PAN_CTRL_CURRENT_NETWORK_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_CURRENT_NETWORK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_CURRENT_NETWORK_SHIFT))&ZLL_DUAL_PAN_CTRL_CURRENT_NETWORK_MASK)
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_EN_MASK 0x10u
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_EN_SHIFT 4
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_EN_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_EN_SHIFT))&ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_EN_MASK)
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_SEL_MASK 0x20u
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_SEL_SHIFT 5
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_SEL_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_SEL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_SEL_SHIFT))&ZLL_DUAL_PAN_CTRL_ZB_DP_CHAN_OVRD_SEL_MASK)
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_DWELL_MASK 0xFF00u
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_DWELL_SHIFT 8
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_DWELL_WIDTH 8
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_DWELL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_DUAL_PAN_DWELL_SHIFT))&ZLL_DUAL_PAN_CTRL_DUAL_PAN_DWELL_MASK)
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_REMAIN_MASK 0x3F0000u
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_REMAIN_SHIFT 16
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_REMAIN_WIDTH 6
#define ZLL_DUAL_PAN_CTRL_DUAL_PAN_REMAIN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_DUAL_PAN_REMAIN_SHIFT))&ZLL_DUAL_PAN_CTRL_DUAL_PAN_REMAIN_MASK)
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN0_MASK 0x400000u
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN0_SHIFT 22
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN0_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN0(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_RECD_ON_PAN0_SHIFT))&ZLL_DUAL_PAN_CTRL_RECD_ON_PAN0_MASK)
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN1_MASK 0x800000u
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN1_SHIFT 23
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN1_WIDTH 1
#define ZLL_DUAL_PAN_CTRL_RECD_ON_PAN1(x) (((uint32_t)(((uint32_t)(x))<<ZLL_DUAL_PAN_CTRL_RECD_ON_PAN1_SHIFT))&ZLL_DUAL_PAN_CTRL_RECD_ON_PAN1_MASK)
/* CHANNEL_NUM1 Bit Fields */
#define ZLL_CHANNEL_NUM1_CHANNEL_NUM1_MASK 0x7Fu
#define ZLL_CHANNEL_NUM1_CHANNEL_NUM1_SHIFT 0
#define ZLL_CHANNEL_NUM1_CHANNEL_NUM1_WIDTH 7
#define ZLL_CHANNEL_NUM1_CHANNEL_NUM1(x) (((uint32_t)(((uint32_t)(x))<<ZLL_CHANNEL_NUM1_CHANNEL_NUM1_SHIFT))&ZLL_CHANNEL_NUM1_CHANNEL_NUM1_MASK)
/* SAM_CTRL Bit Fields */
#define ZLL_SAM_CTRL_SAP0_EN_MASK 0x1u
#define ZLL_SAM_CTRL_SAP0_EN_SHIFT 0
#define ZLL_SAM_CTRL_SAP0_EN_WIDTH 1
#define ZLL_SAM_CTRL_SAP0_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAP0_EN_SHIFT))&ZLL_SAM_CTRL_SAP0_EN_MASK)
#define ZLL_SAM_CTRL_SAA0_EN_MASK 0x2u
#define ZLL_SAM_CTRL_SAA0_EN_SHIFT 1
#define ZLL_SAM_CTRL_SAA0_EN_WIDTH 1
#define ZLL_SAM_CTRL_SAA0_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAA0_EN_SHIFT))&ZLL_SAM_CTRL_SAA0_EN_MASK)
#define ZLL_SAM_CTRL_SAP1_EN_MASK 0x4u
#define ZLL_SAM_CTRL_SAP1_EN_SHIFT 2
#define ZLL_SAM_CTRL_SAP1_EN_WIDTH 1
#define ZLL_SAM_CTRL_SAP1_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAP1_EN_SHIFT))&ZLL_SAM_CTRL_SAP1_EN_MASK)
#define ZLL_SAM_CTRL_SAA1_EN_MASK 0x8u
#define ZLL_SAM_CTRL_SAA1_EN_SHIFT 3
#define ZLL_SAM_CTRL_SAA1_EN_WIDTH 1
#define ZLL_SAM_CTRL_SAA1_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAA1_EN_SHIFT))&ZLL_SAM_CTRL_SAA1_EN_MASK)
#define ZLL_SAM_CTRL_SAA0_START_MASK 0xFF00u
#define ZLL_SAM_CTRL_SAA0_START_SHIFT 8
#define ZLL_SAM_CTRL_SAA0_START_WIDTH 8
#define ZLL_SAM_CTRL_SAA0_START(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAA0_START_SHIFT))&ZLL_SAM_CTRL_SAA0_START_MASK)
#define ZLL_SAM_CTRL_SAP1_START_MASK 0xFF0000u
#define ZLL_SAM_CTRL_SAP1_START_SHIFT 16
#define ZLL_SAM_CTRL_SAP1_START_WIDTH 8
#define ZLL_SAM_CTRL_SAP1_START(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAP1_START_SHIFT))&ZLL_SAM_CTRL_SAP1_START_MASK)
#define ZLL_SAM_CTRL_SAA1_START_MASK 0xFF000000u
#define ZLL_SAM_CTRL_SAA1_START_SHIFT 24
#define ZLL_SAM_CTRL_SAA1_START_WIDTH 8
#define ZLL_SAM_CTRL_SAA1_START(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_CTRL_SAA1_START_SHIFT))&ZLL_SAM_CTRL_SAA1_START_MASK)
/* SAM_TABLE Bit Fields */
#define ZLL_SAM_TABLE_SAM_INDEX_MASK 0x7Fu
#define ZLL_SAM_TABLE_SAM_INDEX_SHIFT 0
#define ZLL_SAM_TABLE_SAM_INDEX_WIDTH 7
#define ZLL_SAM_TABLE_SAM_INDEX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_SAM_INDEX_SHIFT))&ZLL_SAM_TABLE_SAM_INDEX_MASK)
#define ZLL_SAM_TABLE_SAM_INDEX_WR_MASK 0x80u
#define ZLL_SAM_TABLE_SAM_INDEX_WR_SHIFT 7
#define ZLL_SAM_TABLE_SAM_INDEX_WR_WIDTH 1
#define ZLL_SAM_TABLE_SAM_INDEX_WR(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_SAM_INDEX_WR_SHIFT))&ZLL_SAM_TABLE_SAM_INDEX_WR_MASK)
#define ZLL_SAM_TABLE_SAM_CHECKSUM_MASK 0xFFFF00u
#define ZLL_SAM_TABLE_SAM_CHECKSUM_SHIFT 8
#define ZLL_SAM_TABLE_SAM_CHECKSUM_WIDTH 16
#define ZLL_SAM_TABLE_SAM_CHECKSUM(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_SAM_CHECKSUM_SHIFT))&ZLL_SAM_TABLE_SAM_CHECKSUM_MASK)
#define ZLL_SAM_TABLE_SAM_INDEX_INV_MASK 0x1000000u
#define ZLL_SAM_TABLE_SAM_INDEX_INV_SHIFT 24
#define ZLL_SAM_TABLE_SAM_INDEX_INV_WIDTH 1
#define ZLL_SAM_TABLE_SAM_INDEX_INV(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_SAM_INDEX_INV_SHIFT))&ZLL_SAM_TABLE_SAM_INDEX_INV_MASK)
#define ZLL_SAM_TABLE_SAM_INDEX_EN_MASK 0x2000000u
#define ZLL_SAM_TABLE_SAM_INDEX_EN_SHIFT 25
#define ZLL_SAM_TABLE_SAM_INDEX_EN_WIDTH 1
#define ZLL_SAM_TABLE_SAM_INDEX_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_SAM_INDEX_EN_SHIFT))&ZLL_SAM_TABLE_SAM_INDEX_EN_MASK)
#define ZLL_SAM_TABLE_ACK_FRM_PND_MASK 0x4000000u
#define ZLL_SAM_TABLE_ACK_FRM_PND_SHIFT 26
#define ZLL_SAM_TABLE_ACK_FRM_PND_WIDTH 1
#define ZLL_SAM_TABLE_ACK_FRM_PND(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_ACK_FRM_PND_SHIFT))&ZLL_SAM_TABLE_ACK_FRM_PND_MASK)
#define ZLL_SAM_TABLE_ACK_FRM_PND_CTRL_MASK 0x8000000u
#define ZLL_SAM_TABLE_ACK_FRM_PND_CTRL_SHIFT 27
#define ZLL_SAM_TABLE_ACK_FRM_PND_CTRL_WIDTH 1
#define ZLL_SAM_TABLE_ACK_FRM_PND_CTRL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_ACK_FRM_PND_CTRL_SHIFT))&ZLL_SAM_TABLE_ACK_FRM_PND_CTRL_MASK)
#define ZLL_SAM_TABLE_FIND_FREE_IDX_MASK 0x10000000u
#define ZLL_SAM_TABLE_FIND_FREE_IDX_SHIFT 28
#define ZLL_SAM_TABLE_FIND_FREE_IDX_WIDTH 1
#define ZLL_SAM_TABLE_FIND_FREE_IDX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_FIND_FREE_IDX_SHIFT))&ZLL_SAM_TABLE_FIND_FREE_IDX_MASK)
#define ZLL_SAM_TABLE_INVALIDATE_ALL_MASK 0x20000000u
#define ZLL_SAM_TABLE_INVALIDATE_ALL_SHIFT 29
#define ZLL_SAM_TABLE_INVALIDATE_ALL_WIDTH 1
#define ZLL_SAM_TABLE_INVALIDATE_ALL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_INVALIDATE_ALL_SHIFT))&ZLL_SAM_TABLE_INVALIDATE_ALL_MASK)
#define ZLL_SAM_TABLE_SAM_BUSY_MASK 0x80000000u
#define ZLL_SAM_TABLE_SAM_BUSY_SHIFT 31
#define ZLL_SAM_TABLE_SAM_BUSY_WIDTH 1
#define ZLL_SAM_TABLE_SAM_BUSY(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_TABLE_SAM_BUSY_SHIFT))&ZLL_SAM_TABLE_SAM_BUSY_MASK)
/* SAM_MATCH Bit Fields */
#define ZLL_SAM_MATCH_SAP0_MATCH_MASK 0x7Fu
#define ZLL_SAM_MATCH_SAP0_MATCH_SHIFT 0
#define ZLL_SAM_MATCH_SAP0_MATCH_WIDTH 7
#define ZLL_SAM_MATCH_SAP0_MATCH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAP0_MATCH_SHIFT))&ZLL_SAM_MATCH_SAP0_MATCH_MASK)
#define ZLL_SAM_MATCH_SAP0_ADDR_PRESENT_MASK 0x80u
#define ZLL_SAM_MATCH_SAP0_ADDR_PRESENT_SHIFT 7
#define ZLL_SAM_MATCH_SAP0_ADDR_PRESENT_WIDTH 1
#define ZLL_SAM_MATCH_SAP0_ADDR_PRESENT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAP0_ADDR_PRESENT_SHIFT))&ZLL_SAM_MATCH_SAP0_ADDR_PRESENT_MASK)
#define ZLL_SAM_MATCH_SAA0_MATCH_MASK 0x7F00u
#define ZLL_SAM_MATCH_SAA0_MATCH_SHIFT 8
#define ZLL_SAM_MATCH_SAA0_MATCH_WIDTH 7
#define ZLL_SAM_MATCH_SAA0_MATCH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAA0_MATCH_SHIFT))&ZLL_SAM_MATCH_SAA0_MATCH_MASK)
#define ZLL_SAM_MATCH_SAA0_ADDR_ABSENT_MASK 0x8000u
#define ZLL_SAM_MATCH_SAA0_ADDR_ABSENT_SHIFT 15
#define ZLL_SAM_MATCH_SAA0_ADDR_ABSENT_WIDTH 1
#define ZLL_SAM_MATCH_SAA0_ADDR_ABSENT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAA0_ADDR_ABSENT_SHIFT))&ZLL_SAM_MATCH_SAA0_ADDR_ABSENT_MASK)
#define ZLL_SAM_MATCH_SAP1_MATCH_MASK 0x7F0000u
#define ZLL_SAM_MATCH_SAP1_MATCH_SHIFT 16
#define ZLL_SAM_MATCH_SAP1_MATCH_WIDTH 7
#define ZLL_SAM_MATCH_SAP1_MATCH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAP1_MATCH_SHIFT))&ZLL_SAM_MATCH_SAP1_MATCH_MASK)
#define ZLL_SAM_MATCH_SAP1_ADDR_PRESENT_MASK 0x800000u
#define ZLL_SAM_MATCH_SAP1_ADDR_PRESENT_SHIFT 23
#define ZLL_SAM_MATCH_SAP1_ADDR_PRESENT_WIDTH 1
#define ZLL_SAM_MATCH_SAP1_ADDR_PRESENT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAP1_ADDR_PRESENT_SHIFT))&ZLL_SAM_MATCH_SAP1_ADDR_PRESENT_MASK)
#define ZLL_SAM_MATCH_SAA1_MATCH_MASK 0x7F000000u
#define ZLL_SAM_MATCH_SAA1_MATCH_SHIFT 24
#define ZLL_SAM_MATCH_SAA1_MATCH_WIDTH 7
#define ZLL_SAM_MATCH_SAA1_MATCH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAA1_MATCH_SHIFT))&ZLL_SAM_MATCH_SAA1_MATCH_MASK)
#define ZLL_SAM_MATCH_SAA1_ADDR_ABSENT_MASK 0x80000000u
#define ZLL_SAM_MATCH_SAA1_ADDR_ABSENT_SHIFT 31
#define ZLL_SAM_MATCH_SAA1_ADDR_ABSENT_WIDTH 1
#define ZLL_SAM_MATCH_SAA1_ADDR_ABSENT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_MATCH_SAA1_ADDR_ABSENT_SHIFT))&ZLL_SAM_MATCH_SAA1_ADDR_ABSENT_MASK)
/* SAM_FREE_IDX Bit Fields */
#define ZLL_SAM_FREE_IDX_SAP0_1ST_FREE_IDX_MASK 0xFFu
#define ZLL_SAM_FREE_IDX_SAP0_1ST_FREE_IDX_SHIFT 0
#define ZLL_SAM_FREE_IDX_SAP0_1ST_FREE_IDX_WIDTH 8
#define ZLL_SAM_FREE_IDX_SAP0_1ST_FREE_IDX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_FREE_IDX_SAP0_1ST_FREE_IDX_SHIFT))&ZLL_SAM_FREE_IDX_SAP0_1ST_FREE_IDX_MASK)
#define ZLL_SAM_FREE_IDX_SAA0_1ST_FREE_IDX_MASK 0xFF00u
#define ZLL_SAM_FREE_IDX_SAA0_1ST_FREE_IDX_SHIFT 8
#define ZLL_SAM_FREE_IDX_SAA0_1ST_FREE_IDX_WIDTH 8
#define ZLL_SAM_FREE_IDX_SAA0_1ST_FREE_IDX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_FREE_IDX_SAA0_1ST_FREE_IDX_SHIFT))&ZLL_SAM_FREE_IDX_SAA0_1ST_FREE_IDX_MASK)
#define ZLL_SAM_FREE_IDX_SAP1_1ST_FREE_IDX_MASK 0xFF0000u
#define ZLL_SAM_FREE_IDX_SAP1_1ST_FREE_IDX_SHIFT 16
#define ZLL_SAM_FREE_IDX_SAP1_1ST_FREE_IDX_WIDTH 8
#define ZLL_SAM_FREE_IDX_SAP1_1ST_FREE_IDX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_FREE_IDX_SAP1_1ST_FREE_IDX_SHIFT))&ZLL_SAM_FREE_IDX_SAP1_1ST_FREE_IDX_MASK)
#define ZLL_SAM_FREE_IDX_SAA1_1ST_FREE_IDX_MASK 0xFF000000u
#define ZLL_SAM_FREE_IDX_SAA1_1ST_FREE_IDX_SHIFT 24
#define ZLL_SAM_FREE_IDX_SAA1_1ST_FREE_IDX_WIDTH 8
#define ZLL_SAM_FREE_IDX_SAA1_1ST_FREE_IDX(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SAM_FREE_IDX_SAA1_1ST_FREE_IDX_SHIFT))&ZLL_SAM_FREE_IDX_SAA1_1ST_FREE_IDX_MASK)
/* SEQ_CTRL_STS Bit Fields */
#define ZLL_SEQ_CTRL_STS_CLR_NEW_SEQ_INHIBIT_MASK 0x4u
#define ZLL_SEQ_CTRL_STS_CLR_NEW_SEQ_INHIBIT_SHIFT 2
#define ZLL_SEQ_CTRL_STS_CLR_NEW_SEQ_INHIBIT_WIDTH 1
#define ZLL_SEQ_CTRL_STS_CLR_NEW_SEQ_INHIBIT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_CLR_NEW_SEQ_INHIBIT_SHIFT))&ZLL_SEQ_CTRL_STS_CLR_NEW_SEQ_INHIBIT_MASK)
#define ZLL_SEQ_CTRL_STS_EVENT_TMR_DO_NOT_LATCH_MASK 0x8u
#define ZLL_SEQ_CTRL_STS_EVENT_TMR_DO_NOT_LATCH_SHIFT 3
#define ZLL_SEQ_CTRL_STS_EVENT_TMR_DO_NOT_LATCH_WIDTH 1
#define ZLL_SEQ_CTRL_STS_EVENT_TMR_DO_NOT_LATCH(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_EVENT_TMR_DO_NOT_LATCH_SHIFT))&ZLL_SEQ_CTRL_STS_EVENT_TMR_DO_NOT_LATCH_MASK)
#define ZLL_SEQ_CTRL_STS_LATCH_PREAMBLE_MASK 0x10u
#define ZLL_SEQ_CTRL_STS_LATCH_PREAMBLE_SHIFT 4
#define ZLL_SEQ_CTRL_STS_LATCH_PREAMBLE_WIDTH 1
#define ZLL_SEQ_CTRL_STS_LATCH_PREAMBLE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_LATCH_PREAMBLE_SHIFT))&ZLL_SEQ_CTRL_STS_LATCH_PREAMBLE_MASK)
#define ZLL_SEQ_CTRL_STS_NO_RX_RECYCLE_MASK 0x20u
#define ZLL_SEQ_CTRL_STS_NO_RX_RECYCLE_SHIFT 5
#define ZLL_SEQ_CTRL_STS_NO_RX_RECYCLE_WIDTH 1
#define ZLL_SEQ_CTRL_STS_NO_RX_RECYCLE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_NO_RX_RECYCLE_SHIFT))&ZLL_SEQ_CTRL_STS_NO_RX_RECYCLE_MASK)
#define ZLL_SEQ_CTRL_STS_FORCE_CRC_ERROR_MASK 0x40u
#define ZLL_SEQ_CTRL_STS_FORCE_CRC_ERROR_SHIFT 6
#define ZLL_SEQ_CTRL_STS_FORCE_CRC_ERROR_WIDTH 1
#define ZLL_SEQ_CTRL_STS_FORCE_CRC_ERROR(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_FORCE_CRC_ERROR_SHIFT))&ZLL_SEQ_CTRL_STS_FORCE_CRC_ERROR_MASK)
#define ZLL_SEQ_CTRL_STS_CONTINUOUS_EN_MASK 0x80u
#define ZLL_SEQ_CTRL_STS_CONTINUOUS_EN_SHIFT 7
#define ZLL_SEQ_CTRL_STS_CONTINUOUS_EN_WIDTH 1
#define ZLL_SEQ_CTRL_STS_CONTINUOUS_EN(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_CONTINUOUS_EN_SHIFT))&ZLL_SEQ_CTRL_STS_CONTINUOUS_EN_MASK)
#define ZLL_SEQ_CTRL_STS_XCVSEQ_ACTUAL_MASK 0x700u
#define ZLL_SEQ_CTRL_STS_XCVSEQ_ACTUAL_SHIFT 8
#define ZLL_SEQ_CTRL_STS_XCVSEQ_ACTUAL_WIDTH 3
#define ZLL_SEQ_CTRL_STS_XCVSEQ_ACTUAL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_XCVSEQ_ACTUAL_SHIFT))&ZLL_SEQ_CTRL_STS_XCVSEQ_ACTUAL_MASK)
#define ZLL_SEQ_CTRL_STS_SEQ_IDLE_MASK 0x800u
#define ZLL_SEQ_CTRL_STS_SEQ_IDLE_SHIFT 11
#define ZLL_SEQ_CTRL_STS_SEQ_IDLE_WIDTH 1
#define ZLL_SEQ_CTRL_STS_SEQ_IDLE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_SEQ_IDLE_SHIFT))&ZLL_SEQ_CTRL_STS_SEQ_IDLE_MASK)
#define ZLL_SEQ_CTRL_STS_NEW_SEQ_INHIBIT_MASK 0x1000u
#define ZLL_SEQ_CTRL_STS_NEW_SEQ_INHIBIT_SHIFT 12
#define ZLL_SEQ_CTRL_STS_NEW_SEQ_INHIBIT_WIDTH 1
#define ZLL_SEQ_CTRL_STS_NEW_SEQ_INHIBIT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_NEW_SEQ_INHIBIT_SHIFT))&ZLL_SEQ_CTRL_STS_NEW_SEQ_INHIBIT_MASK)
#define ZLL_SEQ_CTRL_STS_RX_TIMEOUT_PENDING_MASK 0x2000u
#define ZLL_SEQ_CTRL_STS_RX_TIMEOUT_PENDING_SHIFT 13
#define ZLL_SEQ_CTRL_STS_RX_TIMEOUT_PENDING_WIDTH 1
#define ZLL_SEQ_CTRL_STS_RX_TIMEOUT_PENDING(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_RX_TIMEOUT_PENDING_SHIFT))&ZLL_SEQ_CTRL_STS_RX_TIMEOUT_PENDING_MASK)
#define ZLL_SEQ_CTRL_STS_RX_MODE_MASK 0x4000u
#define ZLL_SEQ_CTRL_STS_RX_MODE_SHIFT 14
#define ZLL_SEQ_CTRL_STS_RX_MODE_WIDTH 1
#define ZLL_SEQ_CTRL_STS_RX_MODE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_RX_MODE_SHIFT))&ZLL_SEQ_CTRL_STS_RX_MODE_MASK)
#define ZLL_SEQ_CTRL_STS_TMR2_SEQ_TRIG_ARMED_MASK 0x8000u
#define ZLL_SEQ_CTRL_STS_TMR2_SEQ_TRIG_ARMED_SHIFT 15
#define ZLL_SEQ_CTRL_STS_TMR2_SEQ_TRIG_ARMED_WIDTH 1
#define ZLL_SEQ_CTRL_STS_TMR2_SEQ_TRIG_ARMED(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_TMR2_SEQ_TRIG_ARMED_SHIFT))&ZLL_SEQ_CTRL_STS_TMR2_SEQ_TRIG_ARMED_MASK)
#define ZLL_SEQ_CTRL_STS_SEQ_T_STATUS_MASK 0x3F0000u
#define ZLL_SEQ_CTRL_STS_SEQ_T_STATUS_SHIFT 16
#define ZLL_SEQ_CTRL_STS_SEQ_T_STATUS_WIDTH 6
#define ZLL_SEQ_CTRL_STS_SEQ_T_STATUS(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_SEQ_T_STATUS_SHIFT))&ZLL_SEQ_CTRL_STS_SEQ_T_STATUS_MASK)
#define ZLL_SEQ_CTRL_STS_SW_ABORTED_MASK 0x1000000u
#define ZLL_SEQ_CTRL_STS_SW_ABORTED_SHIFT 24
#define ZLL_SEQ_CTRL_STS_SW_ABORTED_WIDTH 1
#define ZLL_SEQ_CTRL_STS_SW_ABORTED(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_SW_ABORTED_SHIFT))&ZLL_SEQ_CTRL_STS_SW_ABORTED_MASK)
#define ZLL_SEQ_CTRL_STS_TC3_ABORTED_MASK 0x2000000u
#define ZLL_SEQ_CTRL_STS_TC3_ABORTED_SHIFT 25
#define ZLL_SEQ_CTRL_STS_TC3_ABORTED_WIDTH 1
#define ZLL_SEQ_CTRL_STS_TC3_ABORTED(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_TC3_ABORTED_SHIFT))&ZLL_SEQ_CTRL_STS_TC3_ABORTED_MASK)
#define ZLL_SEQ_CTRL_STS_PLL_ABORTED_MASK 0x4000000u
#define ZLL_SEQ_CTRL_STS_PLL_ABORTED_SHIFT 26
#define ZLL_SEQ_CTRL_STS_PLL_ABORTED_WIDTH 1
#define ZLL_SEQ_CTRL_STS_PLL_ABORTED(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_CTRL_STS_PLL_ABORTED_SHIFT))&ZLL_SEQ_CTRL_STS_PLL_ABORTED_MASK)
/* ACKDELAY Bit Fields */
#define ZLL_ACKDELAY_ACKDELAY_MASK 0x3Fu
#define ZLL_ACKDELAY_ACKDELAY_SHIFT 0
#define ZLL_ACKDELAY_ACKDELAY_WIDTH 6
#define ZLL_ACKDELAY_ACKDELAY(x) (((uint32_t)(((uint32_t)(x))<<ZLL_ACKDELAY_ACKDELAY_SHIFT))&ZLL_ACKDELAY_ACKDELAY_MASK)
#define ZLL_ACKDELAY_TXDELAY_MASK 0x3F00u
#define ZLL_ACKDELAY_TXDELAY_SHIFT 8
#define ZLL_ACKDELAY_TXDELAY_WIDTH 6
#define ZLL_ACKDELAY_TXDELAY(x) (((uint32_t)(((uint32_t)(x))<<ZLL_ACKDELAY_TXDELAY_SHIFT))&ZLL_ACKDELAY_TXDELAY_MASK)
/* FILTERFAIL_CODE Bit Fields */
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_CODE_MASK 0x3FFu
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_CODE_SHIFT 0
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_CODE_WIDTH 10
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_CODE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FILTERFAIL_CODE_FILTERFAIL_CODE_SHIFT))&ZLL_FILTERFAIL_CODE_FILTERFAIL_CODE_MASK)
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_PAN_SEL_MASK 0x8000u
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_PAN_SEL_SHIFT 15
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_PAN_SEL_WIDTH 1
#define ZLL_FILTERFAIL_CODE_FILTERFAIL_PAN_SEL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_FILTERFAIL_CODE_FILTERFAIL_PAN_SEL_SHIFT))&ZLL_FILTERFAIL_CODE_FILTERFAIL_PAN_SEL_MASK)
/* RX_WTR_MARK Bit Fields */
#define ZLL_RX_WTR_MARK_RX_WTR_MARK_MASK 0xFFu
#define ZLL_RX_WTR_MARK_RX_WTR_MARK_SHIFT 0
#define ZLL_RX_WTR_MARK_RX_WTR_MARK_WIDTH 8
#define ZLL_RX_WTR_MARK_RX_WTR_MARK(x) (((uint32_t)(((uint32_t)(x))<<ZLL_RX_WTR_MARK_RX_WTR_MARK_SHIFT))&ZLL_RX_WTR_MARK_RX_WTR_MARK_MASK)
/* SLOT_PRELOAD Bit Fields */
#define ZLL_SLOT_PRELOAD_SLOT_PRELOAD_MASK 0xFFu
#define ZLL_SLOT_PRELOAD_SLOT_PRELOAD_SHIFT 0
#define ZLL_SLOT_PRELOAD_SLOT_PRELOAD_WIDTH 8
#define ZLL_SLOT_PRELOAD_SLOT_PRELOAD(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SLOT_PRELOAD_SLOT_PRELOAD_SHIFT))&ZLL_SLOT_PRELOAD_SLOT_PRELOAD_MASK)
/* SEQ_STATE Bit Fields */
#define ZLL_SEQ_STATE_SEQ_STATE_MASK 0x1Fu
#define ZLL_SEQ_STATE_SEQ_STATE_SHIFT 0
#define ZLL_SEQ_STATE_SEQ_STATE_WIDTH 5
#define ZLL_SEQ_STATE_SEQ_STATE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_SEQ_STATE_SHIFT))&ZLL_SEQ_STATE_SEQ_STATE_MASK)
#define ZLL_SEQ_STATE_PREAMBLE_DET_MASK 0x100u
#define ZLL_SEQ_STATE_PREAMBLE_DET_SHIFT 8
#define ZLL_SEQ_STATE_PREAMBLE_DET_WIDTH 1
#define ZLL_SEQ_STATE_PREAMBLE_DET(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_PREAMBLE_DET_SHIFT))&ZLL_SEQ_STATE_PREAMBLE_DET_MASK)
#define ZLL_SEQ_STATE_SFD_DET_MASK 0x200u
#define ZLL_SEQ_STATE_SFD_DET_SHIFT 9
#define ZLL_SEQ_STATE_SFD_DET_WIDTH 1
#define ZLL_SEQ_STATE_SFD_DET(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_SFD_DET_SHIFT))&ZLL_SEQ_STATE_SFD_DET_MASK)
#define ZLL_SEQ_STATE_FILTERFAIL_FLAG_SEL_MASK 0x400u
#define ZLL_SEQ_STATE_FILTERFAIL_FLAG_SEL_SHIFT 10
#define ZLL_SEQ_STATE_FILTERFAIL_FLAG_SEL_WIDTH 1
#define ZLL_SEQ_STATE_FILTERFAIL_FLAG_SEL(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_FILTERFAIL_FLAG_SEL_SHIFT))&ZLL_SEQ_STATE_FILTERFAIL_FLAG_SEL_MASK)
#define ZLL_SEQ_STATE_CRCVALID_MASK 0x800u
#define ZLL_SEQ_STATE_CRCVALID_SHIFT 11
#define ZLL_SEQ_STATE_CRCVALID_WIDTH 1
#define ZLL_SEQ_STATE_CRCVALID(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_CRCVALID_SHIFT))&ZLL_SEQ_STATE_CRCVALID_MASK)
#define ZLL_SEQ_STATE_PLL_ABORT_MASK 0x1000u
#define ZLL_SEQ_STATE_PLL_ABORT_SHIFT 12
#define ZLL_SEQ_STATE_PLL_ABORT_WIDTH 1
#define ZLL_SEQ_STATE_PLL_ABORT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_PLL_ABORT_SHIFT))&ZLL_SEQ_STATE_PLL_ABORT_MASK)
#define ZLL_SEQ_STATE_PLL_ABORTED_MASK 0x2000u
#define ZLL_SEQ_STATE_PLL_ABORTED_SHIFT 13
#define ZLL_SEQ_STATE_PLL_ABORTED_WIDTH 1
#define ZLL_SEQ_STATE_PLL_ABORTED(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_PLL_ABORTED_SHIFT))&ZLL_SEQ_STATE_PLL_ABORTED_MASK)
#define ZLL_SEQ_STATE_RX_BYTE_COUNT_MASK 0xFF0000u
#define ZLL_SEQ_STATE_RX_BYTE_COUNT_SHIFT 16
#define ZLL_SEQ_STATE_RX_BYTE_COUNT_WIDTH 8
#define ZLL_SEQ_STATE_RX_BYTE_COUNT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_RX_BYTE_COUNT_SHIFT))&ZLL_SEQ_STATE_RX_BYTE_COUNT_MASK)
#define ZLL_SEQ_STATE_CCCA_BUSY_CNT_MASK 0x3F000000u
#define ZLL_SEQ_STATE_CCCA_BUSY_CNT_SHIFT 24
#define ZLL_SEQ_STATE_CCCA_BUSY_CNT_WIDTH 6
#define ZLL_SEQ_STATE_CCCA_BUSY_CNT(x) (((uint32_t)(((uint32_t)(x))<<ZLL_SEQ_STATE_CCCA_BUSY_CNT_SHIFT))&ZLL_SEQ_STATE_CCCA_BUSY_CNT_MASK)
/* TMR_PRESCALE Bit Fields */
#define ZLL_TMR_PRESCALE_TMR_PRESCALE_MASK 0x7u
#define ZLL_TMR_PRESCALE_TMR_PRESCALE_SHIFT 0
#define ZLL_TMR_PRESCALE_TMR_PRESCALE_WIDTH 3
#define ZLL_TMR_PRESCALE_TMR_PRESCALE(x) (((uint32_t)(((uint32_t)(x))<<ZLL_TMR_PRESCALE_TMR_PRESCALE_SHIFT))&ZLL_TMR_PRESCALE_TMR_PRESCALE_MASK)
/* LENIENCY_LSB Bit Fields */
#define ZLL_LENIENCY_LSB_LENIENCY_REGISTER_MASK 0xFFFFFFFFu
#define ZLL_LENIENCY_LSB_LENIENCY_REGISTER_SHIFT 0
#define ZLL_LENIENCY_LSB_LENIENCY_REGISTER_WIDTH 32
#define ZLL_LENIENCY_LSB_LENIENCY_REGISTER(x) (((uint32_t)(((uint32_t)(x))<<ZLL_LENIENCY_LSB_LENIENCY_REGISTER_SHIFT))&ZLL_LENIENCY_LSB_LENIENCY_REGISTER_MASK)
/* LENIENCY_MSB Bit Fields */
#define ZLL_LENIENCY_MSB_LENIENCY_REGISTER_MASK 0xFFu
#define ZLL_LENIENCY_MSB_LENIENCY_REGISTER_SHIFT 0
#define ZLL_LENIENCY_MSB_LENIENCY_REGISTER_WIDTH 8
#define ZLL_LENIENCY_MSB_LENIENCY_REGISTER(x) (((uint32_t)(((uint32_t)(x))<<ZLL_LENIENCY_MSB_LENIENCY_REGISTER_SHIFT))&ZLL_LENIENCY_MSB_LENIENCY_REGISTER_MASK)
/* PART_ID Bit Fields */
#define ZLL_PART_ID_PART_ID_MASK 0xFFu
#define ZLL_PART_ID_PART_ID_SHIFT 0
#define ZLL_PART_ID_PART_ID_WIDTH 8
#define ZLL_PART_ID_PART_ID(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PART_ID_PART_ID_SHIFT))&ZLL_PART_ID_PART_ID_MASK)
/* PKT_BUFFER Bit Fields */
#define ZLL_PKT_BUFFER_PKT_BUFFER_MASK 0xFFFFFFFFu
#define ZLL_PKT_BUFFER_PKT_BUFFER_SHIFT 0
#define ZLL_PKT_BUFFER_PKT_BUFFER_WIDTH 32
#define ZLL_PKT_BUFFER_PKT_BUFFER(x) (((uint32_t)(((uint32_t)(x))<<ZLL_PKT_BUFFER_PKT_BUFFER_SHIFT))&ZLL_PKT_BUFFER_PKT_BUFFER_MASK)
/*!
* @}
*/ /* end of group ZLL_Register_Masks */
/* ZLL - Peripheral instance base addresses */
/** Peripheral ZLL base address */
#define ZLL_BASE (0x4005D000u)
/** Peripheral ZLL base pointer */
#define ZLL ((ZLL_Type *)ZLL_BASE)
#define ZLL_BASE_PTR (ZLL)
/** Array initializer of ZLL peripheral base addresses */
#define ZLL_BASE_ADDRS { ZLL_BASE }
/** Array initializer of ZLL peripheral base pointers */
#define ZLL_BASE_PTRS { ZLL }
/* ----------------------------------------------------------------------------
-- ZLL - Register accessor macros
---------------------------------------------------------------------------- */
/*!
* @addtogroup ZLL_Register_Accessor_Macros ZLL - Register accessor macros
* @{
*/
/* ZLL - Register instance definitions */
/* ZLL */
#define ZLL_IRQSTS ZLL_IRQSTS_REG(ZLL)
#define ZLL_PHY_CTRL ZLL_PHY_CTRL_REG(ZLL)
#define ZLL_EVENT_TMR ZLL_EVENT_TMR_REG(ZLL)
#define ZLL_TIMESTAMP ZLL_TIMESTAMP_REG(ZLL)
#define ZLL_T1CMP ZLL_T1CMP_REG(ZLL)
#define ZLL_T2CMP ZLL_T2CMP_REG(ZLL)
#define ZLL_T2PRIMECMP ZLL_T2PRIMECMP_REG(ZLL)
#define ZLL_T3CMP ZLL_T3CMP_REG(ZLL)
#define ZLL_T4CMP ZLL_T4CMP_REG(ZLL)
#define ZLL_PA_PWR ZLL_PA_PWR_REG(ZLL)
#define ZLL_CHANNEL_NUM0 ZLL_CHANNEL_NUM0_REG(ZLL)
#define ZLL_LQI_AND_RSSI ZLL_LQI_AND_RSSI_REG(ZLL)
#define ZLL_MACSHORTADDRS0 ZLL_MACSHORTADDRS0_REG(ZLL)
#define ZLL_MACLONGADDRS0_LSB ZLL_MACLONGADDRS0_LSB_REG(ZLL)
#define ZLL_MACLONGADDRS0_MSB ZLL_MACLONGADDRS0_MSB_REG(ZLL)
#define ZLL_RX_FRAME_FILTER ZLL_RX_FRAME_FILTER_REG(ZLL)
#define ZLL_CCA_LQI_CTRL ZLL_CCA_LQI_CTRL_REG(ZLL)
#define ZLL_CCA2_CTRL ZLL_CCA2_CTRL_REG(ZLL)
#define ZLL_FAD_CTRL ZLL_FAD_CTRL_REG(ZLL)
#define ZLL_SNF_CTRL ZLL_SNF_CTRL_REG(ZLL)
#define ZLL_BSM_CTRL ZLL_BSM_CTRL_REG(ZLL)
#define ZLL_MACSHORTADDRS1 ZLL_MACSHORTADDRS1_REG(ZLL)
#define ZLL_MACLONGADDRS1_LSB ZLL_MACLONGADDRS1_LSB_REG(ZLL)
#define ZLL_MACLONGADDRS1_MSB ZLL_MACLONGADDRS1_MSB_REG(ZLL)
#define ZLL_DUAL_PAN_CTRL ZLL_DUAL_PAN_CTRL_REG(ZLL)
#define ZLL_CHANNEL_NUM1 ZLL_CHANNEL_NUM1_REG(ZLL)
#define ZLL_SAM_CTRL ZLL_SAM_CTRL_REG(ZLL)
#define ZLL_SAM_TABLE ZLL_SAM_TABLE_REG(ZLL)
#define ZLL_SAM_MATCH ZLL_SAM_MATCH_REG(ZLL)
#define ZLL_SAM_FREE_IDX ZLL_SAM_FREE_IDX_REG(ZLL)
#define ZLL_SEQ_CTRL_STS ZLL_SEQ_CTRL_STS_REG(ZLL)
#define ZLL_ACKDELAY ZLL_ACKDELAY_REG(ZLL)
#define ZLL_FILTERFAIL_CODE ZLL_FILTERFAIL_CODE_REG(ZLL)
#define ZLL_RX_WTR_MARK ZLL_RX_WTR_MARK_REG(ZLL)
#define ZLL_SLOT_PRELOAD ZLL_SLOT_PRELOAD_REG(ZLL)
#define ZLL_SEQ_STATE ZLL_SEQ_STATE_REG(ZLL)
#define ZLL_TMR_PRESCALE ZLL_TMR_PRESCALE_REG(ZLL)
#define ZLL_LENIENCY_LSB ZLL_LENIENCY_LSB_REG(ZLL)
#define ZLL_LENIENCY_MSB ZLL_LENIENCY_MSB_REG(ZLL)
#define ZLL_PART_ID ZLL_PART_ID_REG(ZLL)
#define ZLL_PKT_BUFFER0 ZLL_PKT_BUFFER_REG(ZLL,0)
#define ZLL_PKT_BUFFER1 ZLL_PKT_BUFFER_REG(ZLL,1)
#define ZLL_PKT_BUFFER2 ZLL_PKT_BUFFER_REG(ZLL,2)
#define ZLL_PKT_BUFFER3 ZLL_PKT_BUFFER_REG(ZLL,3)
#define ZLL_PKT_BUFFER4 ZLL_PKT_BUFFER_REG(ZLL,4)
#define ZLL_PKT_BUFFER5 ZLL_PKT_BUFFER_REG(ZLL,5)
#define ZLL_PKT_BUFFER6 ZLL_PKT_BUFFER_REG(ZLL,6)
#define ZLL_PKT_BUFFER7 ZLL_PKT_BUFFER_REG(ZLL,7)
#define ZLL_PKT_BUFFER8 ZLL_PKT_BUFFER_REG(ZLL,8)
#define ZLL_PKT_BUFFER9 ZLL_PKT_BUFFER_REG(ZLL,9)
#define ZLL_PKT_BUFFER10 ZLL_PKT_BUFFER_REG(ZLL,10)
#define ZLL_PKT_BUFFER11 ZLL_PKT_BUFFER_REG(ZLL,11)
#define ZLL_PKT_BUFFER12 ZLL_PKT_BUFFER_REG(ZLL,12)
#define ZLL_PKT_BUFFER13 ZLL_PKT_BUFFER_REG(ZLL,13)
#define ZLL_PKT_BUFFER14 ZLL_PKT_BUFFER_REG(ZLL,14)
#define ZLL_PKT_BUFFER15 ZLL_PKT_BUFFER_REG(ZLL,15)
#define ZLL_PKT_BUFFER16 ZLL_PKT_BUFFER_REG(ZLL,16)
#define ZLL_PKT_BUFFER17 ZLL_PKT_BUFFER_REG(ZLL,17)
#define ZLL_PKT_BUFFER18 ZLL_PKT_BUFFER_REG(ZLL,18)
#define ZLL_PKT_BUFFER19 ZLL_PKT_BUFFER_REG(ZLL,19)
#define ZLL_PKT_BUFFER20 ZLL_PKT_BUFFER_REG(ZLL,20)
#define ZLL_PKT_BUFFER21 ZLL_PKT_BUFFER_REG(ZLL,21)
#define ZLL_PKT_BUFFER22 ZLL_PKT_BUFFER_REG(ZLL,22)
#define ZLL_PKT_BUFFER23 ZLL_PKT_BUFFER_REG(ZLL,23)
#define ZLL_PKT_BUFFER24 ZLL_PKT_BUFFER_REG(ZLL,24)
#define ZLL_PKT_BUFFER25 ZLL_PKT_BUFFER_REG(ZLL,25)
#define ZLL_PKT_BUFFER26 ZLL_PKT_BUFFER_REG(ZLL,26)
#define ZLL_PKT_BUFFER27 ZLL_PKT_BUFFER_REG(ZLL,27)
#define ZLL_PKT_BUFFER28 ZLL_PKT_BUFFER_REG(ZLL,28)
#define ZLL_PKT_BUFFER29 ZLL_PKT_BUFFER_REG(ZLL,29)
#define ZLL_PKT_BUFFER30 ZLL_PKT_BUFFER_REG(ZLL,30)
#define ZLL_PKT_BUFFER31 ZLL_PKT_BUFFER_REG(ZLL,31)
/* ZLL - Register array accessors */
#define ZLL_PKT_BUFFER(index) ZLL_PKT_BUFFER_REG(ZLL,index)
/*!
* @}
*/ /* end of group ZLL_Register_Accessor_Macros */
/*!
* @}
*/ /* end of group ZLL_Peripheral_Access_Layer */
/*
** End of section using anonymous unions
*/
#if defined(__ARMCC_VERSION)
#pragma pop
#elif defined(__CWCC__)
#pragma pop
#elif defined(__GNUC__)
/* leave anonymous unions enabled */
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma language=default
#else
#error Not supported compiler type
#endif
/*!
* @}
*/ /* end of group Peripheral_access_layer */
/* ----------------------------------------------------------------------------
-- Backward Compatibility
---------------------------------------------------------------------------- */
/*!
* @addtogroup Backward_Compatibility_Symbols Backward Compatibility
* @{
*/
/* No backward compatibility issues. */
/*!
* @}
*/ /* end of group Backward_Compatibility_Symbols */
#else /* #if !defined(MKW20Z4_H_) */
/* There is already included the same memory map. Check if it is compatible (has the same major version) */
#if (MCU_MEM_MAP_VERSION != 0x0100u)
#if (!defined(MCU_MEM_MAP_SUPPRESS_VERSION_WARNING))
#warning There are included two not compatible versions of memory maps. Please check possible differences.
#endif /* (!defined(MCU_MEM_MAP_SUPPRESS_VERSION_WARNING)) */
#endif /* (MCU_MEM_MAP_VERSION != 0x0100u) */
#endif /* #if !defined(MKW20Z4_H_) */
/* MKW20Z4.h, eof. */
| Java |
package techcore
import "github.com/nsf/termbox-go"
type Color int
const (
ColorBlack Color = 1 << iota
ColorBlue
ColorCyan
ColorGreen
ColorMagenta
ColorRed
ColorWhite
ColorYellow
ColorAlpha
)
func (c Color) GetTermboxColor() termbox.Attribute {
switch c {
case ColorBlack:
return termbox.ColorBlack
case ColorBlue:
return termbox.ColorBlue
case ColorCyan:
return termbox.ColorCyan
case ColorGreen:
return termbox.ColorGreen
case ColorMagenta:
return termbox.ColorMagenta
case ColorRed:
return termbox.ColorRed
case ColorWhite:
return termbox.ColorWhite
case ColorYellow:
return termbox.ColorYellow
case ColorAlpha:
return termbox.ColorDefault
default:
return termbox.ColorDefault
}
}
| Java |
/****************************************************************************
**
** Copyright (C) 2013 Digia Plc and/or its subsidiary(-ies).
** Contact: http://www.qt-project.org/legal
**
** This file is part of Qt Creator.
**
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Digia. For licensing terms and
** conditions see http://qt.digia.com/licensing. For further information
** use the contact form at http://qt.digia.com/contact-us.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Digia gives you certain additional
** rights. These rights are described in the Digia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
****************************************************************************/
#include "ldparser.h"
#include "projectexplorerconstants.h"
#include "task.h"
using namespace ProjectExplorer;
namespace {
// opt. drive letter + filename: (2 brackets)
const char * const FILE_PATTERN = "(([A-Za-z]:)?[^:]+\\.[^:]+):";
// line no. or elf segment + offset (1 bracket)
// const char * const POSITION_PATTERN = "(\\d+|\\(\\.[^:]+[+-]0x[a-fA-F0-9]+\\):)";
const char * const POSITION_PATTERN = "(\\d|\\(\\..+[+-]0x[a-fA-F0-9]+\\):)";
const char * const COMMAND_PATTERN = "^(.*[\\\\/])?([a-z0-9]+-[a-z0-9]+-[a-z0-9]+-)?(ld|gold)(-[0-9\\.]+)?(\\.exe)?: ";
}
LdParser::LdParser()
{
setObjectName(QLatin1String("LdParser"));
m_regExpLinker.setPattern(QLatin1Char('^') +
QString::fromLatin1(FILE_PATTERN) + QLatin1Char('(') +
QString::fromLatin1(FILE_PATTERN) + QLatin1String(")?(") +
QLatin1String(POSITION_PATTERN) + QLatin1String(")?\\s(.+)$"));
m_regExpLinker.setMinimal(true);
m_regExpGccNames.setPattern(QLatin1String(COMMAND_PATTERN));
m_regExpGccNames.setMinimal(true);
}
void LdParser::stdError(const QString &line)
{
QString lne = rightTrimmed(line);
if (lne.startsWith(QLatin1String("TeamBuilder "))
|| lne.startsWith(QLatin1String("distcc["))
|| lne.contains(QLatin1String("ar: creating "))) {
IOutputParser::stdError(line);
return;
}
if (lne.startsWith(QLatin1String("collect2:"))) {
emit addTask(Task(Task::Error,
lne /* description */,
Utils::FileName() /* filename */,
-1 /* linenumber */,
Core::Id(Constants::TASK_CATEGORY_COMPILE)));
return;
} else if (m_regExpGccNames.indexIn(lne) > -1) {
QString description = lne.mid(m_regExpGccNames.matchedLength());
Task task(Task::Error,
description,
Utils::FileName(), /* filename */
-1, /* line */
Core::Id(Constants::TASK_CATEGORY_COMPILE));
if (description.startsWith(QLatin1String("warning: "))) {
task.type = Task::Warning;
task.description = description.mid(9);
} else if (description.startsWith(QLatin1String("fatal: "))) {
task.description = description.mid(7);
}
emit addTask(task);
return;
} else if (m_regExpLinker.indexIn(lne) > -1) {
bool ok;
int lineno = m_regExpLinker.cap(7).toInt(&ok);
if (!ok)
lineno = -1;
Utils::FileName filename = Utils::FileName::fromUserInput(m_regExpLinker.cap(1));
if (!m_regExpLinker.cap(4).isEmpty()
&& !m_regExpLinker.cap(4).startsWith(QLatin1String("(.text")))
filename = Utils::FileName::fromUserInput(m_regExpLinker.cap(4));
QString description = m_regExpLinker.cap(8).trimmed();
Task task(Task::Error, description, filename, lineno,
Core::Id(Constants::TASK_CATEGORY_COMPILE));
if (description.startsWith(QLatin1String("At global scope")) ||
description.startsWith(QLatin1String("At top level")) ||
description.startsWith(QLatin1String("instantiated from ")) ||
description.startsWith(QLatin1String("In ")))
task.type = Task::Unknown;
if (description.startsWith(QLatin1String("warning: "), Qt::CaseInsensitive)) {
task.type = Task::Warning;
task.description = description.mid(9);
}
emit addTask(task);
return;
}
IOutputParser::stdError(line);
}
| Java |
#ifndef AVIO_H
#define AVIO_H
#include "patch.h"
/* output byte stream handling */
typedef INT64 offset_t;
/* unbuffered I/O */
typedef struct {
unsigned char *buffer;
int buffer_size;
unsigned char *buf_ptr, *buf_end;
void *opaque;
int (*read_packet)(void *opaque, UINT8 *buf, int buf_size);
void (*write_packet)(void *opaque, UINT8 *buf, int buf_size);
int (*seek)(void *opaque, offset_t offset, int whence);
offset_t pos; /* position in the file of the current buffer */
int must_flush; /* true if the next seek should flush */
int eof_reached; /* true if eof reached */
int write_flag; /* true if open for writing */
int is_streamed;
int max_packet_size;
OutputBuf out_buf;
} ByteIOContext;
int init_put_byte(ByteIOContext *s);
void put_byte(ByteIOContext *s, int b);
void put_buffer(ByteIOContext *s, const unsigned char *buf, int size);
void put_le64(ByteIOContext *s, UINT64 val);
void put_be64(ByteIOContext *s, UINT64 val);
void put_le32(ByteIOContext *s, unsigned int val);
void put_be32(ByteIOContext *s, unsigned int val);
void put_le16(ByteIOContext *s, unsigned int val);
void put_be16(ByteIOContext *s, unsigned int val);
void put_tag(ByteIOContext *s, const char *tag);
void put_be64_double(ByteIOContext *s, double val);
void put_strz(ByteIOContext *s, const char *buf);
offset_t url_fseek(ByteIOContext *s, offset_t offset, int whence);
offset_t url_fskip(ByteIOContext *s, offset_t offset);
offset_t url_ftell(ByteIOContext *s);
int url_feof(ByteIOContext *s);
void put_flush_packet(ByteIOContext *s);
int get_buffer(ByteIOContext *s, unsigned char *buf, int size);
int get_byte(ByteIOContext *s);
unsigned int get_le32(ByteIOContext *s);
UINT64 get_le64(ByteIOContext *s);
unsigned int get_le16(ByteIOContext *s);
double get_be64_double(ByteIOContext *s);
char *get_strz(ByteIOContext *s, char *buf, int maxlen);
unsigned int get_be16(ByteIOContext *s);
unsigned int get_be32(ByteIOContext *s);
UINT64 get_be64(ByteIOContext *s);
int get_mem_buffer_size( ByteIOContext* stBuf );
char *get_str(ByteIOContext *s, char *buf, int maxlen);
static inline int url_is_streamed(ByteIOContext *s)
{
return s->is_streamed;
}
#endif
| Java |
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include "librepo/version.h"
#include "fixtures.h"
#include "testsys.h"
#include "test_version.h"
START_TEST(test_version_check_macro)
{
ck_assert(LR_VERSION_CHECK(LR_VERSION_MAJOR,
LR_VERSION_MINOR,
LR_VERSION_PATCH));
ck_assert(LR_VERSION_CHECK(0, 0, 0));
ck_assert(!(LR_VERSION_CHECK(LR_VERSION_MAJOR,
LR_VERSION_MINOR,
LR_VERSION_PATCH+1)));
ck_assert(!(LR_VERSION_CHECK(LR_VERSION_MAJOR,
LR_VERSION_MINOR+1,
LR_VERSION_PATCH)));
ck_assert(!(LR_VERSION_CHECK(LR_VERSION_MAJOR+1,
LR_VERSION_MINOR,
LR_VERSION_PATCH)));
}
END_TEST
Suite *
version_suite(void)
{
Suite *s = suite_create("version");
TCase *tc = tcase_create("Main");
tcase_add_test(tc, test_version_check_macro);
suite_add_tcase(s, tc);
return s;
}
| Java |
/*
This file is part of the Grantlee template system.
Copyright (c) 2008 Stephen Kelly <[email protected]>
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either version
2.1 of the Licence, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include "texthtmlbuilder.h"
#include <QtCore/QList>
#include <QtGui/QTextDocument>
namespace Grantlee
{
class TextHTMLBuilderPrivate
{
public:
TextHTMLBuilderPrivate( TextHTMLBuilder *b )
: q_ptr( b )
{
}
QList<QTextListFormat::Style> currentListItemStyles;
QString m_text;
TextHTMLBuilder *q_ptr;
Q_DECLARE_PUBLIC( TextHTMLBuilder )
};
}
using namespace Grantlee;
TextHTMLBuilder::TextHTMLBuilder()
: AbstractMarkupBuilder(), d_ptr( new TextHTMLBuilderPrivate( this ) )
{
}
TextHTMLBuilder::~TextHTMLBuilder()
{
delete d_ptr;
}
void TextHTMLBuilder::beginStrong()
{
Q_D( TextHTMLBuilder );;
d->m_text.append( QStringLiteral( "<strong>" ) );
}
void TextHTMLBuilder::endStrong()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</strong>" ) );
}
void TextHTMLBuilder::beginEmph()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<em>" ) );
}
void TextHTMLBuilder::endEmph()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</em>" ) );
}
void TextHTMLBuilder::beginUnderline()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<u>" ) );
}
void TextHTMLBuilder::endUnderline()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</u>" ) );
}
void TextHTMLBuilder::beginStrikeout()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<s>" ) );
}
void TextHTMLBuilder::endStrikeout()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</s>" ) );
}
void TextHTMLBuilder::beginForeground( const QBrush &brush )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<span style=\"color:%1;\">" ).arg( brush.color().name() ) );
}
void TextHTMLBuilder::endForeground()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</span>" ) );
}
void TextHTMLBuilder::beginBackground( const QBrush &brush )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<span style=\"background-color:%1;\">" ).arg( brush.color().name() ) );
}
void TextHTMLBuilder::endBackground()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</span>" ) );
}
void TextHTMLBuilder::beginAnchor( const QString &href, const QString &name )
{
Q_D( TextHTMLBuilder );
if ( !href.isEmpty() ) {
if ( !name.isEmpty() ) {
d->m_text.append( QString::fromLatin1( "<a href=\"%1\" name=\"%2\">" ).arg( href ).arg( name ) );
} else {
d->m_text.append( QString::fromLatin1( "<a href=\"%1\">" ).arg( href ) );
}
} else {
if ( !name.isEmpty() ) {
d->m_text.append( QString::fromLatin1( "<a name=\"%1\">" ).arg( name ) );
}
}
}
void TextHTMLBuilder::endAnchor()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</a>" ) );
}
void TextHTMLBuilder::beginFontFamily( const QString &family )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<span style=\"font-family:%1;\">" ).arg( family ) );
}
void TextHTMLBuilder::endFontFamily()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</span>" ) );
}
void TextHTMLBuilder::beginFontPointSize( int size )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<span style=\"font-size:%1pt;\">" ).arg( QString::number( size ) ) );
}
void TextHTMLBuilder::endFontPointSize()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</span>" ) );
}
void TextHTMLBuilder::beginParagraph( Qt::Alignment al, qreal topMargin, qreal bottomMargin, qreal leftMargin, qreal rightMargin )
{
Q_D( TextHTMLBuilder );
// Don't put paragraph tags inside li tags. Qt bug reported.
// if (currentListItemStyles.size() != 0)
// {
QString styleString;
if ( topMargin != 0 ) {
styleString.append( QString::fromLatin1( "margin-top:%1;" ).arg( topMargin ) );
}
if ( bottomMargin != 0 ) {
styleString.append( QString::fromLatin1( "margin-bottom:%1;" ).arg( bottomMargin ) );
}
if ( leftMargin != 0 ) {
styleString.append( QString::fromLatin1( "margin-left:%1;" ).arg( leftMargin ) );
}
if ( rightMargin != 0 ) {
styleString.append( QString::fromLatin1( "margin-right:%1;" ).arg( rightMargin ) );
}
// Using == doesn't work here.
// Using bitwise comparison because an alignment can contain a vertical and a horizontal part.
if ( al & Qt::AlignRight ) {
d->m_text.append( QStringLiteral( "<p align=\"right\" " ) );
} else if ( al & Qt::AlignHCenter ) {
d->m_text.append( QStringLiteral( "<p align=\"center\" " ) );
} else if ( al & Qt::AlignJustify ) {
d->m_text.append( QStringLiteral( "<p align=\"justify\" " ) );
} else if ( al & Qt::AlignLeft ) {
d->m_text.append( QStringLiteral( "<p" ) );
} else {
d->m_text.append( QStringLiteral( "<p" ) );
}
if ( !styleString.isEmpty() ) {
d->m_text.append( QStringLiteral( " \"" ) + styleString + QLatin1Char( '"' ) );
}
d->m_text.append( QLatin1Char( '>' ) );
// }
}
void TextHTMLBuilder::beginHeader( int level )
{
Q_D( TextHTMLBuilder );
switch ( level ) {
case 1:
d->m_text.append( QStringLiteral( "<h1>" ) );
break;
case 2:
d->m_text.append( QStringLiteral( "<h2>" ) );
break;
case 3:
d->m_text.append( QStringLiteral( "<h3>" ) );
break;
case 4:
d->m_text.append( QStringLiteral( "<h4>" ) );
break;
case 5:
d->m_text.append( QStringLiteral( "<h5>" ) );
break;
case 6:
d->m_text.append( QStringLiteral( "<h6>" ) );
break;
default:
break;
}
}
void TextHTMLBuilder::endHeader( int level )
{
Q_D( TextHTMLBuilder );
switch ( level ) {
case 1:
d->m_text.append( QStringLiteral( "</h1>" ) );
break;
case 2:
d->m_text.append( QStringLiteral( "</h2>" ) );
break;
case 3:
d->m_text.append( QStringLiteral( "</h3>" ) );
break;
case 4:
d->m_text.append( QStringLiteral( "</h4>" ) );
break;
case 5:
d->m_text.append( QStringLiteral( "</h5>" ) );
break;
case 6:
d->m_text.append( QStringLiteral( "</h6>" ) );
break;
default:
break;
}
}
void TextHTMLBuilder::endParagraph()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</p>\n" ) );
}
void TextHTMLBuilder::addNewline()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<p> " ) );
}
void TextHTMLBuilder::insertHorizontalRule( int width )
{
Q_D( TextHTMLBuilder );
if ( width != -1 ) {
d->m_text.append( QString::fromLatin1( "<hr width=\"%1\" />\n" ).arg( width ) );
}
d->m_text.append( QStringLiteral( "<hr />\n" ) );
}
void TextHTMLBuilder::insertImage( const QString &src, qreal width, qreal height )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<img src=\"%1\" " ).arg( src ) );
if ( width != 0 ) d->m_text.append( QString::fromLatin1( "width=\"%2\" " ).arg( width ) );
if ( height != 0 ) d->m_text.append( QString::fromLatin1( "height=\"%2\" " ).arg( height ) );
d->m_text.append( QStringLiteral( "/>" ) );
}
void TextHTMLBuilder::beginList( QTextListFormat::Style type )
{
Q_D( TextHTMLBuilder );
d->currentListItemStyles.append( type );
switch ( type ) {
case QTextListFormat::ListDisc:
d->m_text.append( QStringLiteral( "<ul type=\"disc\">\n" ) );
break;
case QTextListFormat::ListCircle:
d->m_text.append( QStringLiteral( "\n<ul type=\"circle\">\n" ) );
break;
case QTextListFormat::ListSquare:
d->m_text.append( QStringLiteral( "\n<ul type=\"square\">\n" ) );
break;
case QTextListFormat::ListDecimal:
d->m_text.append( QStringLiteral( "\n<ol type=\"1\">\n" ) );
break;
case QTextListFormat::ListLowerAlpha:
d->m_text.append( QStringLiteral( "\n<ol type=\"a\">\n" ) );
break;
case QTextListFormat::ListUpperAlpha:
d->m_text.append( QStringLiteral( "\n<ol type=\"A\">\n" ) );
break;
case QTextListFormat::ListLowerRoman:
d->m_text.append( QStringLiteral("\n<ol type=\"i\">\n") );
break;
case QTextListFormat::ListUpperRoman:
d->m_text.append( QStringLiteral("\n<ol type=\"I\">\n") );
break;
default:
break;
}
}
void TextHTMLBuilder::endList()
{
Q_D( TextHTMLBuilder );
switch ( d->currentListItemStyles.last() ) {
case QTextListFormat::ListDisc:
case QTextListFormat::ListCircle:
case QTextListFormat::ListSquare:
d->m_text.append( QStringLiteral( "</ul>\n" ) );
break;
case QTextListFormat::ListDecimal:
case QTextListFormat::ListLowerAlpha:
case QTextListFormat::ListUpperAlpha:
case QTextListFormat::ListLowerRoman:
case QTextListFormat::ListUpperRoman:
d->m_text.append( QStringLiteral( "</ol>\n" ) );
break;
default:
break;
}
d->currentListItemStyles.removeLast();
}
void TextHTMLBuilder::beginListItem()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<li>" ) );
}
void TextHTMLBuilder::endListItem()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</li>\n" ) );
}
void TextHTMLBuilder::beginSuperscript()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<sup>" ) );
}
void TextHTMLBuilder::endSuperscript()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</sup>" ) );
}
void TextHTMLBuilder::beginSubscript()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<sub>" ) );
}
void TextHTMLBuilder::endSubscript()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</sub>" ) );
}
void TextHTMLBuilder::beginTable( qreal cellpadding, qreal cellspacing, const QString &width )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<table cellpadding=\"%1\" cellspacing=\"%2\" width=\"%3\" border=\"1\">" )
.arg( cellpadding )
.arg( cellspacing )
.arg( width ) );
}
void TextHTMLBuilder::beginTableRow()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "<tr>" ) );
}
void TextHTMLBuilder::beginTableHeaderCell( const QString &width, int colspan, int rowspan )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<th width=\"%1\" colspan=\"%2\" rowspan=\"%3\">" ).arg( width ).arg( colspan ).arg( rowspan ) );
}
void TextHTMLBuilder::beginTableCell( const QString &width, int colspan, int rowspan )
{
Q_D( TextHTMLBuilder );
d->m_text.append( QString::fromLatin1( "<td width=\"%1\" colspan=\"%2\" rowspan=\"%3\">" ).arg( width ).arg( colspan ).arg( rowspan ) );
}
void TextHTMLBuilder::endTable()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</table>" ) );
}
void TextHTMLBuilder::endTableRow()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</tr>" ) );
}
void TextHTMLBuilder::endTableHeaderCell()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</th>" ) );
}
void TextHTMLBuilder::endTableCell()
{
Q_D( TextHTMLBuilder );
d->m_text.append( QStringLiteral( "</td>" ) );
}
void TextHTMLBuilder::appendLiteralText( const QString &text )
{
Q_D( TextHTMLBuilder );
d->m_text.append( text.toHtmlEscaped() );
}
void TextHTMLBuilder::appendRawText( const QString &text )
{
Q_D( TextHTMLBuilder );
d->m_text.append( text );
}
QString TextHTMLBuilder::getResult()
{
Q_D( TextHTMLBuilder );
QString ret = d->m_text;
d->m_text.clear();
return ret;
}
| Java |
/**
* @file llallocator_test.cpp
* @author Brad Kittenbrink
* @date 2008-02-
* @brief Test for llallocator.cpp.
*
* $LicenseInfo:firstyear=2009&license=viewerlgpl$
* Second Life Viewer Source Code
* Copyright (C) 2010, Linden Research, Inc.
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation;
* version 2.1 of the License only.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* Linden Research, Inc., 945 Battery Street, San Francisco, CA 94111 USA
* $/LicenseInfo$
*/
#include "../llallocator.h"
#include "../test/lltut.h"
namespace tut
{
struct llallocator_data
{
LLAllocator llallocator;
};
typedef test_group<llallocator_data> factory;
typedef factory::object object;
}
namespace
{
tut::factory llallocator_test_factory("LLAllocator");
}
namespace tut
{
template<> template<>
void object::test<1>()
{
llallocator.setProfilingEnabled(false);
ensure("Profiler disable", !llallocator.isProfiling());
}
#if LL_USE_TCMALLOC
template<> template<>
void object::test<2>()
{
llallocator.setProfilingEnabled(true);
ensure("Profiler enable", llallocator.isProfiling());
}
template <> template <>
void object::test<3>()
{
llallocator.setProfilingEnabled(true);
char * test_alloc = new char[1024];
llallocator.getProfile();
delete [] test_alloc;
llallocator.getProfile();
// *NOTE - this test isn't ensuring anything right now other than no
// exceptions are thrown.
}
#endif // LL_USE_TCMALLOC
};
| Java |
/******************************************************************************
* SOFA, Simulation Open-Framework Architecture, development version *
* (c) 2006-2017 INRIA, USTL, UJF, CNRS, MGH *
* *
* This program is free software; you can redistribute it and/or modify it *
* under the terms of the GNU Lesser General Public License as published by *
* the Free Software Foundation; either version 2.1 of the License, or (at *
* your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, but WITHOUT *
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or *
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License *
* for more details. *
* *
* You should have received a copy of the GNU Lesser General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
*******************************************************************************
* Authors: The SOFA Team and external contributors (see Authors.txt) *
* *
* Contact information: [email protected] *
******************************************************************************/
#ifndef RIGIDANDSCALETORIGIDMULTIMAPPING_H
#define RIGIDANDSCALETORIGIDMULTIMAPPING_H
#include <Compliant/utils/se3.h>
#include <sofa/helper/vector.h>
#include <sofa/defaulttype/BaseMatrix.h>
#include <SofaEigen2Solver/EigenSparseMatrix.h>
#include <SofaBaseMechanics/MechanicalObject.h>
#include <sofa/core/ObjectFactory.h>
#include <sofa/core/Multi2Mapping.inl>
#include <sofa/core/BaseMapping.h>
#include <sofa/core/core.h>
#include <sofa/core/VecId.h>
#include "Flexible/shapeFunction/BaseShapeFunction.h"
#include <RigidScale/mapping/RigidScaleMappingJacobian.h>
namespace sofa
{
namespace component
{
namespace mapping
{
using namespace sofa::defaulttype;
/**
* @author Ali Dicko @date 2015
*/
template <class In1, class In2, class Out>
class RigidScaleToRigidMultiMapping : public core::Multi2Mapping<In1, In2, Out>
{
public:
SOFA_CLASS(SOFA_TEMPLATE3(RigidScaleToRigidMultiMapping, In1, In2, Out), SOFA_TEMPLATE3(core::Multi2Mapping, In1, In2, Out));
typedef typename core::Multi2Mapping<In1, In2, Out> Inherit;
typedef component::container::MechanicalObject<Out> OutType;
typedef component::container::MechanicalObject<In1> InType1;
typedef component::container::MechanicalObject<In2> InType2;
typedef typename In1::Real Real;
typedef typename In1::Coord InCoord1;
typedef typename In1::Deriv InDeriv1;
typedef typename In1::VecCoord InVecCoord1;
typedef typename In1::VecDeriv InVecDeriv1;
typedef typename In1::MatrixDeriv InMatrixDeriv1;
typedef typename Inherit::In1DataVecCoord In1DataVecCoord;
typedef typename Inherit::In1DataVecDeriv In1DataVecDeriv;
typedef typename Inherit::In1DataMatrixDeriv In1DataMatrixDeriv;
typedef typename In2::Coord InCoord2;
typedef typename In2::Deriv InDeriv2;
typedef typename In2::VecCoord InVecCoord2;
typedef typename In2::VecDeriv InVecDeriv2;
typedef typename In2::MatrixDeriv InMatrixDeriv2;
typedef typename Inherit::In2DataVecCoord In2DataVecCoord;
typedef typename Inherit::In2DataVecDeriv In2DataVecDeriv;
typedef typename Inherit::In2DataMatrixDeriv In2DataMatrixDeriv;
typedef typename Out::VecCoord OutVecCoord;
typedef typename Out::VecDeriv OutVecDeriv;
typedef typename Out::Coord OutCoord;
typedef typename Out::Deriv OutDeriv;
typedef typename Out::MatrixDeriv OutMatrixDeriv;
typedef typename Inherit::OutDataVecCoord OutDataVecCoord;
typedef typename Inherit::OutDataVecDeriv OutDataVecDeriv;
typedef typename Inherit::OutDataMatrixDeriv OutDataMatrixDeriv;
typedef Mat<OutDeriv::total_size, InDeriv1::total_size, SReal> MatBlock1;
typedef Mat<OutDeriv::total_size, InDeriv2::total_size, SReal> MatBlock2;
typedef Mat<InDeriv1::total_size, InDeriv1::total_size, SReal> MatKBlock1;
typedef Mat<InDeriv2::total_size, InDeriv2::total_size, SReal> MatKBlock2;
typedef component::linearsolver::EigenSparseMatrix<In1, Out> SparseJMatrixEigen1;
typedef component::linearsolver::EigenSparseMatrix<In2, Out> SparseJMatrixEigen2;
typedef linearsolver::EigenSparseMatrix<In1,In1> SparseKMatrixEigen1;
typedef linearsolver::EigenSparseMatrix<In2,In2> SparseKMatrixEigen2;
typedef typename linearsolver::EigenSparseMatrix<In1,In1>::CompressedMatrix CompressKMatrixEigen1;
typedef typename linearsolver::EigenSparseMatrix<In2,In2>::CompressedMatrix CompressKMatrixEigen2;
typedef helper::vector<defaulttype::BaseMatrix*> jacobianMatrices;
typedef helper::vector<defaulttype::BaseMatrix*> stiffnessMatrices;
typedef SE3< Real > se3;
typedef core::behavior::ShapeFunctionTypes<3,Real> ShapeFunctionType;
typedef core::behavior::BaseShapeFunction<ShapeFunctionType> BaseShapeFunction;
/****************** CONSTRUCTOR / DESTRUCTOR ***********************/
RigidScaleToRigidMultiMapping();
~RigidScaleToRigidMultiMapping();
/************************** SOFA METHOD ****************************/
void init();
void reinit();
void reset();
using Inherit::apply;
using Inherit::applyJ;
using Inherit::applyJT;
using Inherit::computeAccFromMapping;
void apply(const core::MechanicalParams* /*mparams*/ /* PARAMS FIRST */
, const helper::vector<OutDataVecCoord*>& /*dataVecOutPos*/
, const helper::vector<const In1DataVecCoord*>& /*dataVecIn1Pos*/
, const helper::vector<const In2DataVecCoord*>& /*dataVecIn2Pos*/);
void applyJ(const core::MechanicalParams* /*mparams*/ /* PARAMS FIRST */
, const helper::vector< OutDataVecDeriv*>& /*dataVecOutVel*/
, const helper::vector<const In1DataVecDeriv*>& /*dataVecIn1Vel*/
, const helper::vector<const In2DataVecDeriv*>& /*dataVecIn2Vel*/);
void applyJT(const core::MechanicalParams* /*mparams*/ /* PARAMS FIRST */
, const helper::vector< In1DataVecDeriv*>& /*dataVecOut1Force*/
, const helper::vector< In2DataVecDeriv*>& /*dataVecOut2Force*/
, const helper::vector<const OutDataVecDeriv*>& /*dataVecInForce*/);
void applyJT(const helper::vector< InMatrixDeriv1*>& /*outConstraint1*/
, const helper::vector< InMatrixDeriv2*>& /*outConstraint2*/
, const helper::vector<const OutMatrixDeriv*>& /*inConstraint*/);
void applyJT(const core::ConstraintParams* /* cparams */
, const helper::vector< In1DataMatrixDeriv*>& /* dataMatOut1Const */
, const helper::vector< In2DataMatrixDeriv*>& /* dataMatOut2Const */
, const helper::vector<const OutDataMatrixDeriv*>& /* dataMatInConst */);
void applyDJT(const core::MechanicalParams* /*mparams*/, core::MultiVecDerivId /*inForce*/, core::ConstMultiVecDerivId /*outForce*/);
void computeAccFromMapping(const core::MechanicalParams* /*mparams*/ /* PARAMS FIRST */
, const helper::vector< OutDataVecDeriv*>& /*dataVecOutAcc*/
, const helper::vector<const In1DataVecDeriv*>& /*dataVecIn1Vel*/
, const helper::vector<const In2DataVecDeriv*>& /*dataVecIn2Vel*/
, const helper::vector<const In1DataVecDeriv*>& /*dataVecIn1Acc*/
, const helper::vector<const In2DataVecDeriv*>& /*dataVecIn2Acc*/);
void computeAccFromMapping(const core::MechanicalParams* /*mparams*/, OutVecDeriv& /*f*/,const OutVecCoord& /*x*/, const OutVecDeriv& /*v*/);
void updateK( const core::MechanicalParams* /*mparams*/, core::ConstMultiVecDerivId /*outForce*/ );
const helper::vector<sofa::defaulttype::BaseMatrix*>* getJs();
const sofa::defaulttype::BaseMatrix* getJ();
const sofa::defaulttype::BaseMatrix* getK();
Data< helper::vector<unsigned> > index; ///< Two indices per child: the index of the rigid, and the index of scale
Data< bool > useGeometricStiffness; ///< To indication if we use the geometric stiffness
protected:
/**************************** METHODS ****************************/
void setup();
void updateK1(SparseKMatrixEigen1& /*stiffness*/, const InVecCoord1& /*vIn1*/, const InVecCoord2& /*vIn2*/, const OutVecDeriv& /*childForce*/);
void updateK2(SparseKMatrixEigen2& /*stiffness*/, const InVecCoord1& /*vIn1*/, const InVecCoord2& /*vIn2*/, const OutVecDeriv& /*childForce*/);
void updateJ1(SparseJMatrixEigen1& /*jacobian*/, const InVecCoord1& /*vIn1*/, const InVecCoord2& /*vIn2*/, const OutVecCoord& /*vOut*/);
void updateJ2(SparseJMatrixEigen2& /*jacobian*/, const InVecCoord1& /*vIn1*/, const InVecCoord2& /*vIn2*/, const OutVecCoord& /*vOut*/);
/// computeRigidFromRigidAndScale : function f(r, s) = r1.
/// r = rigid body defined by (p, q) => p is the position and q is the quarternion which describe the rigid orientation
/// s = scale matrix, but defined by only the diagonal component (sx, sy, sz)
/// J1 = df/dr and J2 = df/ds
void computeRigidFromRigidAndScale(const InCoord1&, const InCoord2&, const OutCoord&, OutCoord&);
/*********************** CLASS ATTRIBUTES **************************/
SparseJMatrixEigen1 _J1;
SparseJMatrixEigen2 _J2;
jacobianMatrices _Js;
helper::vector<SparseJMatrixEigen1*> _DJ1;
// In/Out mechanical object
InType1* stateIn1;
InType2* stateIn2;
OutType* stateOut;
// Others
OutVecCoord relativeCoord;
BaseShapeFunction* m_shapeFunction;
};
}//namespace mapping
}// namespace component
}//namespace sofa
#endif
| Java |
/****************************************************************************
**
** Copyright (C) 2013 Digia Plc and/or its subsidiary(-ies).
** Contact: http://www.qt-project.org/legal
**
** This file is part of the QtQml module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Digia. For licensing terms and
** conditions see http://qt.digia.com/licensing. For further information
** use the contact form at http://qt.digia.com/contact-us.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Digia gives you certain additional
** rights. These rights are described in the Digia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3.0 as published by the Free Software
** Foundation and appearing in the file LICENSE.GPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU General Public License version 3.0 requirements will be
** met: http://www.gnu.org/copyleft/gpl.html.
**
**
** $QT_END_LICENSE$
**
****************************************************************************/
#ifndef QMLJS_ENVIRONMENT_H
#define QMLJS_ENVIRONMENT_H
#include "qv4global_p.h"
#include "qv4value_def_p.h"
#include "qv4managed_p.h"
#include "qv4engine_p.h"
QT_BEGIN_NAMESPACE
namespace QV4 {
struct Object;
struct ExecutionEngine;
struct DeclarativeEnvironment;
struct Lookup;
struct Function;
struct ValueRef;
namespace CompiledData {
struct CompilationUnit;
struct Function;
};
struct CallContext;
struct CallContext;
struct CatchContext;
struct WithContext;
struct Q_QML_EXPORT ExecutionContext : public Managed
{
Q_MANAGED
enum ContextType {
Type_GlobalContext = 0x1,
Type_CatchContext = 0x2,
Type_WithContext = 0x3,
Type_SimpleCallContext = 0x4,
Type_CallContext = 0x5,
Type_QmlContext = 0x6
};
ExecutionContext(ExecutionEngine *engine, ContextType t)
: Managed(engine->executionContextClass)
{
this->type = t;
strictMode = false;
this->engine = engine;
this->parent = engine->currentContext();
outer = 0;
lookups = 0;
compilationUnit = 0;
currentEvalCode = 0;
interpreterInstructionPointer = 0;
lineNumber = -1;
engine->current = this;
}
ContextType type;
bool strictMode;
CallData *callData;
ExecutionEngine *engine;
ExecutionContext *parent;
ExecutionContext *outer;
Lookup *lookups;
CompiledData::CompilationUnit *compilationUnit;
struct EvalCode
{
Function *function;
EvalCode *next;
};
EvalCode *currentEvalCode;
const uchar **interpreterInstructionPointer;
int lineNumber;
CallContext *newCallContext(FunctionObject *f, CallData *callData);
WithContext *newWithContext(ObjectRef with);
CatchContext *newCatchContext(const StringRef exceptionVarName, const ValueRef exceptionValue);
CallContext *newQmlContext(FunctionObject *f, ObjectRef qml);
// formals are in reverse order
String * const *formals() const;
unsigned int formalCount() const;
String * const *variables() const;
unsigned int variableCount() const;
void createMutableBinding(const StringRef name, bool deletable);
ReturnedValue throwError(const QV4::ValueRef value);
ReturnedValue throwError(const QString &message);
ReturnedValue throwSyntaxError(const QString &message);
ReturnedValue throwSyntaxError(const QString &message, const QString &fileName, int lineNumber, int column);
ReturnedValue throwTypeError();
ReturnedValue throwTypeError(const QString &message);
ReturnedValue throwReferenceError(const ValueRef value);
ReturnedValue throwReferenceError(const QString &value, const QString &fileName, int lineNumber, int column);
ReturnedValue throwRangeError(const ValueRef value);
ReturnedValue throwRangeError(const QString &message);
ReturnedValue throwURIError(const ValueRef msg);
ReturnedValue throwUnimplemented(const QString &message);
void setProperty(const StringRef name, const ValueRef value);
ReturnedValue getProperty(const StringRef name);
ReturnedValue getPropertyAndBase(const StringRef name, ObjectRef base);
bool deleteProperty(const StringRef name);
// Can only be called from within catch(...), rethrows if no JS exception.
ReturnedValue catchException(StackTrace *trace = 0);
inline CallContext *asCallContext();
inline const CallContext *asCallContext() const;
static void markObjects(Managed *m, ExecutionEngine *e);
};
struct CallContext : public ExecutionContext
{
CallContext(ExecutionEngine *engine, ContextType t = Type_SimpleCallContext)
: ExecutionContext(engine, t)
{
function = 0;
locals = 0;
activation = 0;
}
CallContext(ExecutionEngine *engine, ObjectRef qml, QV4::FunctionObject *function);
FunctionObject *function;
int realArgumentCount;
SafeValue *locals;
Object *activation;
inline ReturnedValue argument(int i);
bool needsOwnArguments() const;
};
struct GlobalContext : public ExecutionContext
{
GlobalContext(ExecutionEngine *engine);
Object *global;
};
struct CatchContext : public ExecutionContext
{
CatchContext(ExecutionEngine *engine, const StringRef exceptionVarName, const ValueRef exceptionValue);
SafeString exceptionVarName;
SafeValue exceptionValue;
};
struct WithContext : public ExecutionContext
{
WithContext(ExecutionEngine *engine, ObjectRef with);
Object *withObject;
};
inline CallContext *ExecutionContext::asCallContext()
{
return type >= Type_SimpleCallContext ? static_cast<CallContext *>(this) : 0;
}
inline const CallContext *ExecutionContext::asCallContext() const
{
return type >= Type_SimpleCallContext ? static_cast<const CallContext *>(this) : 0;
}
inline void ExecutionEngine::pushContext(CallContext *context)
{
context->parent = current;
current = context;
current->currentEvalCode = 0;
}
inline ExecutionContext *ExecutionEngine::popContext()
{
Q_ASSERT(current->parent);
current = current->parent;
return current;
}
struct ExecutionContextSaver
{
ExecutionEngine *engine;
ExecutionContext *savedContext;
ExecutionContextSaver(ExecutionContext *context)
: engine(context->engine)
, savedContext(context)
{
}
~ExecutionContextSaver()
{
engine->current = savedContext;
}
};
/* Function *f, int argc */
#define requiredMemoryForExecutionContect(f, argc) \
sizeof(CallContext) + sizeof(Value) * (f->varCount + qMax((uint)argc, f->formalParameterCount)) + sizeof(CallData)
} // namespace QV4
QT_END_NAMESPACE
#endif
| Java |
// ---------------------------------------------------------------------
//
// Copyright (C) 2004 - 2013 by the deal.II authors
//
// This file is part of the deal.II library.
//
// The deal.II library is free software; you can use it, redistribute
// it, and/or modify it under the terms of the GNU Lesser General
// Public License as published by the Free Software Foundation; either
// version 2.1 of the License, or (at your option) any later version.
// The full text of the license can be found in the file LICENSE at
// the top level of the deal.II distribution.
//
// ---------------------------------------------------------------------
#include <deal.II/lac/petsc_vector.h>
#ifdef DEAL_II_WITH_PETSC
# include <cmath>
DEAL_II_NAMESPACE_OPEN
namespace PETScWrappers
{
Vector::Vector ()
{
Vector::create_vector (0);
}
Vector::Vector (const size_type n)
{
Vector::create_vector (n);
}
Vector::Vector (const Vector &v)
:
VectorBase ()
{
// first create a dummy vector, then copy
// over the other one
Vector::create_vector (1);
Vector::operator = (v);
}
Vector::Vector (const MPI::Vector &v)
{
// first create a dummy vector, then copy
// over the other one
Vector::create_vector (1);
Vector::operator = (v);
}
void
Vector::reinit (const size_type n,
const bool fast)
{
// only do something if the sizes
// mismatch
if (size() != n)
{
// FIXME: I'd like to use this here,
// but somehow it leads to odd errors
// somewhere down the line in some of
// the tests:
// const int ierr = VecSetSizes (vector, n, n);
// AssertThrow (ierr == 0, ExcPETScError(ierr));
// so let's go the slow way:
if (attained_ownership)
{
#if DEAL_II_PETSC_VERSION_LT(3,2,0)
int ierr = VecDestroy (vector);
#else
int ierr = VecDestroy (&vector);
#endif
AssertThrow (ierr == 0, ExcPETScError(ierr));
}
create_vector (n);
}
// finally clear the new vector if so
// desired
if (fast == false)
*this = 0;
}
void
Vector::reinit (const Vector &v,
const bool fast)
{
reinit (v.size(), fast);
}
void
Vector::create_vector (const size_type n)
{
const int ierr
= VecCreateSeq (PETSC_COMM_SELF, n, &vector);
AssertThrow (ierr == 0, ExcPETScError(ierr));
attained_ownership = true;
}
}
DEAL_II_NAMESPACE_CLOSE
#endif // DEAL_II_WITH_PETSC
| Java |
<?php
function detect() {
// Note: I originally found this script at: http://us2.php.net/manual/en/function.get-browser.php
// Temporary Variables
// The useragent string (lowercase to simplify testing)
$_nw_ua = strtolower(@$_SERVER["HTTP_USER_AGENT"]);
// Browser Detection { ======================================================
// Version checking, each one of these will take a float value describing the
// version number, or - if the user is not using that browser - zero.
// Generic code-name "Mozilla" version
define("NW_MOZ_VERSION", preg_match('/mozilla\/(\d+\.\d+)/',
$_nw_ua, $_nw_v) ? (float)$_nw_v[1] : 0);
// KDE's Konqueror
define("NW_IS_KONQ", preg_match('/konqueror\/(\d+\.\d+)/',
$_nw_ua, $_nw_v) ? (float) $_nw_v[1] : 0);
// Opera software Opera
define("NW_IS_OPERA", preg_match('/opera[\s\/](\d+\.\d+)/',
$_nw_ua, $_nw_v) ? (float) $_nw_v[1] : 0);
// Microsoft Internet Explorer
define("NW_IS_IE", !NW_IS_OPERA && preg_match('/msie (\d+\.\d+)/',
$_nw_ua, $_nw_v) ? (float) $_nw_v[1] : 0);
// Gecko-based browsers, such as Mozilla, Netscape 6, DocZilla,
// K-Meleon, etc.
define("NW_IS_GECKO", preg_match('/gecko\/(\d+)/',
$_nw_ua, $_nw_v) ? (float) $_nw_v[1] : 0);
// Netscape Navigator (all versions, including Gecko-based browsers)
define("NW_IS_NN", NW_IS_GECKO ? (preg_match('/netscape6*\/(\d+.\d+)/', $_nw_ua, $_nw_v) ?
(float) $_nw_v[1] : 0) : ((!NW_IS_OPERA && !NW_IS_KONQ && !NW_IS_IE) ?
NW_MOZ_VERSION : 0));
// An old 3rd generation web browser
define("NW_IS_GEN3", NW_IS_NN < 4 && NW_IS_OPERA < 4 && NW_IS_IE < 4 && NW_MOZ_VERSION < 4);
// } Browser Detection ======================================================
// Generic Platform Detection { =============================================
define("NW_IS_LINUX", strstr($_nw_ua, "linux") !== false);
define("NW_IS_MAC", strstr($_nw_ua, "mac") !== false);
define("NW_IS_SOLARIS", (strstr($_nw_ua, "solaris") !== false) ||
(strstr($_nw_ua, "sunos") !== false));
define("NW_IS_X11", strstr($_nw_ua, "x11") !== false);
define("NW_IS_WINDOWS", strstr($_nw_ua, "win") !== false);
define("NW_IS_OS2", strstr($_nw_ua, "os2") !== false);
// } Generic Platform Detection =============================================
unset($_nw_ua, $_nw_v); // clean-up
}
?> | Java |
/****************************************************************************
**
** Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
** All rights reserved.
** Contact: Nokia Corporation ([email protected])
**
** This file is part of the QtGui module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** Commercial Usage
** Licensees holding valid Qt Commercial licenses may use this file in
** accordance with the Qt Commercial License Agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Nokia.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Nokia gives you certain additional
** rights. These rights are described in the Nokia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3.0 as published by the Free Software
** Foundation and appearing in the file LICENSE.GPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU General Public License version 3.0 requirements will be
** met: http://www.gnu.org/copyleft/gpl.html.
**
** If you have questions regarding the use of this file, please contact
** Nokia at [email protected].
** $QT_END_LICENSE$
**
****************************************************************************/
#ifndef QS60MAINAPPLICATION_P_H
#define QS60MAINAPPLICATION_P_H
//
// W A R N I N G
// -------------
//
// This file is not part of the Qt API. It exists for the convenience
// of qapplication_*.cpp, qwidget*.cpp and qfiledialog.cpp. This header
// file may change from version to version without notice, or even be removed.
//
// We mean it.
//
#include <qglobal.h>
#include <apparc.h>
QT_BEGIN_NAMESPACE
CApaApplication *newS60Application();
QT_END_NAMESPACE
#endif // QS60MAINAPPLICATION_P_H
| Java |
<?php
class Provider_Ucloud extends Provider {
var $url_prefix = 'https://openapi.ucloud.com/ucloud/oauth/1.0a/';
function __construct($provider,$oauth_config){
parent::__construct($provider,$oauth_config);
}
function _getRequestTokenURL(){
return $url = $this->url_prefix.'request_token' ;
}
function _getAccessTokenURL(){
return $url = $this->url_prefix.'access_token' ;
}
function _getAuthorizeURL(){
return $url = $this->url_prefix.'authorize' ;
}
function _getAPIUrl($api_name){
$url_prefix = 'https://openapi.ucloud.com/ucloud/api/1.0/';
$url = $url_prefix.'ucloud/basic/getuserinfo.json' ;
if($api_name == 'getUserInfo'){
$url = $url_prefix.'ucloud/basic/getuserinfo.json' ;
}else if($api_name == 'getContents'){
$url = $url_prefix.'ucloud/basic/getContents.json' ;
}else if($api_name == 'createfiletoken'){
$url = $url_prefix.'ucloud/basic/createfiletoken.json' ;
}else if($api_name == 'getsyncfolder'){
$url = $url_prefix.'ucloud/basic/getsyncfolder.json' ;
}else if($api_name == 'createfile'){
$url = $url_prefix.'ucloud/basic/createfile.json' ;
}else if($api_name == 'createfiletoken'){
$url = $url_prefix.'ucloud/basic/createfiletoken.json' ;
}else if($api_name == 'deletefile'){
$url = $url_prefix.'ucloud/basic/deletefile.json' ;
}else if($api_name == 'createfolder'){
$url = $url_prefix.'ucloud/basic/createfolder.json' ;
}else if($api_name == 'deletefolder'){
$url = $url_prefix.'ucloud/basic/deletefolder.json' ;
}
return $url ;
}
public function api_call(& $consumer,$api_name,$request_header,$request_body,$method='GET'){
$param = array() ;
$url = $this->_getAPIUrl($api_name);
get_instance()->load->helper('string');
//$param['oauth_callback'] = $consumer->get('callback_url') ;
$param['oauth_consumer_key'] = $consumer->get('api_key') ;
// $param['api_token'] = $request_body['api_token'] ;
$param['oauth_nonce'] = random_string('alnum', 32);
$param['oauth_signature_method'] = $this->getSignatureMethod() ;
$param['oauth_timestamp'] = time();
$param['oauth_token'] = $request_header['oauth_token'];
$param['oauth_version'] = $this->getOAuthVersion() ;
//$param['oauth_verifier'] = $request_header['oauth_verifier'];
$base_string = OAuthUtil::base_string($method,$url,$param=array_merge($param,$request_body)) ;
$key_arr = array(($consumer->get('secret_key')),($request_header['oauth_token_secret'])) ;
$key = OAuthUtil::urlencode($key_arr) ;
$key = implode('&',$key_arr) ;
$param['oauth_signature'] = OAuthUtil::make_signature($base_string,$key) ;
$response = OAuthUtil::call($url,$method,$param,$request_body) ;
//$response = OAuthUtil::parse_param($response) ;
return $response ;
}
public function getRequestToken(& $consumer,$params,$method='GET'){
$param = array() ;
$url = $this->_getRequestTokenURL();
get_instance()->load->helper('string');
$param['oauth_callback'] = $consumer->get('callback_url') ;
$param['oauth_consumer_key'] = $consumer->get('api_key') ;
$param['oauth_nonce'] = random_string('alnum', 32);
$param['oauth_signature_method'] = $this->getSignatureMethod() ;
$param['oauth_timestamp'] = time();
$param['oauth_version'] = $this->getOAuthVersion() ;
$base_string = OAuthUtil::base_string($method,$url,$param ) ;
$key_arr = array($consumer->get('secret_key'),'' ) ;
$key = OAuthUtil::urlencode($key_arr) ;
$key = implode('&',$key) ;
$param['oauth_signature'] = OAuthUtil::make_signature($base_string,$key) ;
$response = OAuthUtil::call($url,$method,$param) ;
return OAuthUtil::parse_param($response) ;
}
public function getAccessToken(& $consumer,$params=array(),$method='GET'){
$param = array() ;
$url = $this->_getAccessTokenURL();
get_instance()->load->helper('string');
$param['oauth_callback'] = $consumer->get('callback_url') ;
$param['oauth_consumer_key'] = $consumer->get('api_key') ;
$param['oauth_nonce'] = random_string('alnum', 32);
$param['oauth_signature_method'] = $this->getSignatureMethod() ;
$param['oauth_timestamp'] = time();
$param['oauth_token'] = $params['oauth_token'];
$param['oauth_version'] = $this->getOAuthVersion() ;
$param['oauth_verifier'] = $params['oauth_verifier'];
$base_string = OAuthUtil::base_string($method,$url,$param ) ;
$key_arr = array($consumer->get('secret_key'),$params['oauth_token_secret'] ) ;
$key = OAuthUtil::urlencode($key_arr) ;
$key = implode('&',$key) ;
$param['oauth_signature'] = OAuthUtil::make_signature($base_string,$key) ;
$response = OAuthUtil::call($url,$method,$param) ;
$response = OAuthUtil::parse_param($response) ;
$response['api_token'] = $this->getAPIToken($consumer->get('api_key'),$consumer->get('secret_key')) ;
return $response ;
}
public function getAPIToken($api_key,$secret_key){
$ts = time() ;
$base_string = $api_key.';'.$ts ;
$signature=base64_encode(hash_hmac('sha1', $base_string, $secret_key, TRUE));
return OAuthUtil::urlencode(base64_encode($api_key.';'.$ts.';'.$signature));
}
public function authorize($param){
get_instance()->load->helper('url') ;
redirect($this->_getAuthorizeUrl().'?oauth_token='.$param['oauth_token']) ;
}
}
/* end of Provider_Ucloud.php */
| Java |
/*
题目：定义Fibonacci 数列如下：
/ 0 n=0
f(n)= 1 n=1
\ f(n-1)+f(n-2) n=2
输入n，用最快的方法求该数列的第n 项。
分析：在很多C 语言教科书中讲到递归函数的时候，都会用Fibonacci 作为例子。
因此很多程序员对这道题的递归解法非常熟悉，但....呵呵，你知道的。。
ANSWER:
This is the traditional problem of application of mathematics...
let A=
{1 1}
{1 0}
f(n) = A^(n-1)[0,0]
this gives a O(log n) solution.
int f(int n) {
int A[4] = {1,1,1,0};
int result[4];
power(A, n, result);
return result[0];
}
void multiply(int[] A, int[] B, int _r) {
_r[0] = A[0]*B[0] + A[1]*B[2];
_r[1] = A[0]*B[1] + A[1]*B[3];
_r[2] = A[2]*B[0] + A[3]*B[2];
_r[3] = A[2]*B[1] + A[3]*B[3];
}
void power(int[] A, int n, int _r) {
if (n==1) { memcpy(A, _r, 4*sizeof(int)); return; }
int tmp[4];
power(A, n>>1, _r);
multiply(_r, _r, tmp);
if (n & 1 == 1) {
multiply(tmp, A, _r);
} else {
memcpy(_r, tmp, 4*sizeof(int));
}
}
*/
#include <stdio.h>
#include <stdlib.h>
int fibonacci(int n)
{
if (n == 0) {
return 0;
} else if (n == 1) {
return 1;
} else {
int fn[3] = {0};
fn[0] = 0;
fn[1] = 1;
while (n >= 2) {
fn[2] = fn[0] + fn[1];
fn[0] = fn[1];
fn[1] = fn[2];
n--;
}
return fn[2];
}
}
/*
------ ----
f[n+1] = [ 1, 1] ^n f[1]
f[n] [ 1, 0] f[0]
------ ----
*/
unsigned int fibonacci2(unsigned int n)
{
if (n == 0) {
return 0;
} else if(n == 1) {
return 1;
} else {
int a[4] = {1, 1, 1, 0};
int ret[4] = {1, 1, 1, 0};
while (n-- > 1) {
ret[0] = ret[0] * a[0] + ret[1] * a[2];
ret[1] = ret[0] * a[1] + ret[1] * a[3];
ret[2] = ret[2] * a[0] + ret[3] * a[2];
ret[3] = ret[2] * a[1] + ret[3] * a[3];
}
return ret[2];
}
}
int main(void)
{
int n;
int ret;
printf("Please input number:");
scanf("%d", &n);
ret = fibonacci(n);
printf("1.The result is %d\n", ret);
ret = fibonacci2(n);
printf("2.The result is %d\n", ret);
return 0;
} | Java |
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<a href="#pub-attribs">Public Attributes</a> </div>
<div class="headertitle">
<h1>sigc::bound_const_mem_functor6< T_return, T_obj, T_arg1, T_arg2, T_arg3, T_arg4, T_arg5, T_arg6 > Class Template Reference<div class="ingroups"><a class="el" href="group__mem__fun.html">mem_fun()</a></div></h1> </div>
</div>
<div class="contents">
<!-- doxytag: class="sigc::bound_const_mem_functor6" --><!-- doxytag: inherits="sigc::const_mem_functor6" -->
<p><a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a> encapsulates a const method with 6 arguments and an object instance. <a href="#_details">More...</a></p>
<p><code>#include <sigc++/functors/mem_fun.h></code></p>
<div class="dynheader">
Inheritance diagram for sigc::bound_const_mem_functor6< T_return, T_obj, T_arg1, T_arg2, T_arg3, T_arg4, T_arg5, T_arg6 >:</div>
<div class="dyncontent">
<div class="center"><img src="classsigc_1_1bound__const__mem__functor6__inherit__graph.png" border="0" usemap="#sigc_1_1bound__const__mem__functor6_3_01T__return_00_01T__obj_00_01T__arg1_00_01T__arg2_00_01T__arg3_00_01T__arg4_00_01T__arg5_00_01T__arg6_01_4_inherit__map" alt="Inheritance graph"/></div>
<map name="sigc_1_1bound__const__mem__functor6_3_01T__return_00_01T__obj_00_01T__arg1_00_01T__arg2_00_01T__arg3_00_01T__arg4_00_01T__arg5_00_01T__arg6_01_4_inherit__map" id="sigc_1_1bound__const__mem__functor6_3_01T__return_00_01T__obj_00_01T__arg1_00_01T__arg2_00_01T__arg3_00_01T__arg4_00_01T__arg5_00_01T__arg6_01_4_inherit__map">
<area shape="rect" id="node2" href="classsigc_1_1const__mem__functor6.html" title="const_mem_functor6 wraps const methods with 6 argument(s)." alt="" coords="192,5,813,35"/><area shape="rect" id="node4" href="structsigc_1_1functor__base.html" title="A hint to the compiler." alt="" coords="5,5,144,35"/></map>
<center><span class="legend">[<a href="graph_legend.html">legend</a>]</span></center></div>
<p><a href="classsigc_1_1bound__const__mem__functor6-members.html">List of all members.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="pub-types"></a>
Public Types</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a9cd70f288cac9b8d7ee9695166f3d306"></a><!-- doxytag: member="sigc::bound_const_mem_functor6::function_type" ref="a9cd70f288cac9b8d7ee9695166f3d306" args="" -->
typedef base_type_::function_type </td><td class="memItemRight" valign="bottom"><b>function_type</b></td></tr>
<tr><td colspan="2"><h2><a name="pub-methods"></a>
Public Member Functions</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classsigc_1_1bound__const__mem__functor6.html#a4c6a29813f84239bfc224e36d3ada58c">bound_const_mem_functor6</a> (const T_obj* _A_obj, function_type _A_func)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Constructs a <a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a> object that wraps the passed method. <a href="#a4c6a29813f84239bfc224e36d3ada58c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"> </td><td class="memItemRight" valign="bottom"><a class="el" href="classsigc_1_1bound__const__mem__functor6.html#afa0adf0adf9cde73008982d2494f3d7e">bound_const_mem_functor6</a> (const T_obj& _A_obj, function_type _A_func)</td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Constructs a <a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a> object that wraps the passed method. <a href="#afa0adf0adf9cde73008982d2494f3d7e"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">T_return </td><td class="memItemRight" valign="bottom"><a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b">operator()</a> (typename type_trait< T_arg1 >::take _A_a1, typename type_trait< T_arg2 >::take _A_a2, typename type_trait< T_arg3 >::take _A_a3, typename type_trait< T_arg4 >::take _A_a4, typename type_trait< T_arg5 >::take _A_a5, typename type_trait< T_arg6 >::take _A_a6) const </td></tr>
<tr><td class="mdescLeft"> </td><td class="mdescRight">Execute the wrapped method operating on the stored instance. <a href="#ae261c6047332e15a354461611299706b"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a152f10d5c46eb9d7d582a6e4cb747baf"></a><!-- doxytag: member="sigc::bound_const_mem_functor6::obj_" ref="a152f10d5c46eb9d7d582a6e4cb747baf" args="" -->
<a class="el" href="classsigc_1_1const__limit__reference.html">const_limit_reference</a>< T_obj > </td><td class="memItemRight" valign="bottom"><b>obj_</b></td></tr>
</table>
<hr/><a name="_details"></a><h2>Detailed Description</h2>
<div class="textblock"><h3>template<class T_return, class T_obj, class T_arg1, class T_arg2, class T_arg3, class T_arg4, class T_arg5, class T_arg6><br/>
class sigc::bound_const_mem_functor6< T_return, T_obj, T_arg1, T_arg2, T_arg3, T_arg4, T_arg5, T_arg6 ></h3>
<p><a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a> encapsulates a const method with 6 arguments and an object instance. </p>
<p>Use the convenience function <a class="elRef" doxygen="libstdc++.tag:http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/" href="http://gcc.gnu.org/onlinedocs/libstdc++/latest-doxygen/a01587.html#ga58aa3b67eba2b8219e7aec7d4cdebcdb">mem_fun()</a> to create an instance of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a>.</p>
<p>The following template arguments are used:</p>
<ul>
<li><em>T_arg1</em> Argument type used in the definition of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_arg2</em> Argument type used in the definition of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_arg3</em> Argument type used in the definition of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_arg4</em> Argument type used in the definition of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_arg5</em> Argument type used in the definition of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_arg6</em> Argument type used in the definition of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_return</em> The return type of <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>.</li>
<li><em>T_obj</em> The object type. </li>
</ul>
</div><hr/><h2>Constructor & Destructor Documentation</h2>
<a class="anchor" id="a4c6a29813f84239bfc224e36d3ada58c"></a><!-- doxytag: member="sigc::bound_const_mem_functor6::bound_const_mem_functor6" ref="a4c6a29813f84239bfc224e36d3ada58c" args="(const T_obj *_A_obj, function_type _A_func)" -->
<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template <class T_return , class T_obj , class T_arg1 , class T_arg2 , class T_arg3 , class T_arg4 , class T_arg5 , class T_arg6 > </div>
<table class="memname">
<tr>
<td class="memname"><a class="el" href="classsigc_1_1bound__const__mem__functor6.html">sigc::bound_const_mem_functor6</a>< T_return, T_obj, T_arg1, T_arg2, T_arg3, T_arg4, T_arg5, T_arg6 >::<a class="el" href="classsigc_1_1bound__const__mem__functor6.html">bound_const_mem_functor6</a> </td>
<td>(</td>
<td class="paramtype">const T_obj * </td>
<td class="paramname"><em>_A_obj</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">function_type </td>
<td class="paramname"><em>_A_func</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [inline]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Constructs a <a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a> object that wraps the passed method. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">_A_obj</td><td>Pointer to instance the method will operate on. </td></tr>
<tr><td class="paramname">_A_func</td><td>Pointer to method will be invoked from <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>. </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<a class="anchor" id="afa0adf0adf9cde73008982d2494f3d7e"></a><!-- doxytag: member="sigc::bound_const_mem_functor6::bound_const_mem_functor6" ref="afa0adf0adf9cde73008982d2494f3d7e" args="(const T_obj &_A_obj, function_type _A_func)" -->
<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template <class T_return , class T_obj , class T_arg1 , class T_arg2 , class T_arg3 , class T_arg4 , class T_arg5 , class T_arg6 > </div>
<table class="memname">
<tr>
<td class="memname"><a class="el" href="classsigc_1_1bound__const__mem__functor6.html">sigc::bound_const_mem_functor6</a>< T_return, T_obj, T_arg1, T_arg2, T_arg3, T_arg4, T_arg5, T_arg6 >::<a class="el" href="classsigc_1_1bound__const__mem__functor6.html">bound_const_mem_functor6</a> </td>
<td>(</td>
<td class="paramtype">const T_obj & </td>
<td class="paramname"><em>_A_obj</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">function_type </td>
<td class="paramname"><em>_A_func</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td><code> [inline]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Constructs a <a class="el" href="classsigc_1_1bound__const__mem__functor6.html" title="bound_const_mem_functor6 encapsulates a const method with 6 arguments and an object instance...">bound_const_mem_functor6</a> object that wraps the passed method. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">_A_obj</td><td>Reference to instance the method will operate on. </td></tr>
<tr><td class="paramname">_A_func</td><td>Pointer to method will be invoked from <a class="el" href="classsigc_1_1bound__const__mem__functor6.html#ae261c6047332e15a354461611299706b" title="Execute the wrapped method operating on the stored instance.">operator()()</a>. </td></tr>
</table>
</dd>
</dl>
</div>
</div>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="ae261c6047332e15a354461611299706b"></a><!-- doxytag: member="sigc::bound_const_mem_functor6::operator()" ref="ae261c6047332e15a354461611299706b" args="(typename type_trait< T_arg1 >::take _A_a1, typename type_trait< T_arg2 >::take _A_a2, typename type_trait< T_arg3 >::take _A_a3, typename type_trait< T_arg4 >::take _A_a4, typename type_trait< T_arg5 >::take _A_a5, typename type_trait< T_arg6 >::take _A_a6) const " -->
<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template <class T_return , class T_obj , class T_arg1 , class T_arg2 , class T_arg3 , class T_arg4 , class T_arg5 , class T_arg6 > </div>
<table class="memname">
<tr>
<td class="memname">T_return <a class="el" href="classsigc_1_1bound__const__mem__functor6.html">sigc::bound_const_mem_functor6</a>< T_return, T_obj, T_arg1, T_arg2, T_arg3, T_arg4, T_arg5, T_arg6 >::operator() </td>
<td>(</td>
<td class="paramtype">typename type_trait< T_arg1 >::take </td>
<td class="paramname"><em>_A_a1</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">typename type_trait< T_arg2 >::take </td>
<td class="paramname"><em>_A_a2</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">typename type_trait< T_arg3 >::take </td>
<td class="paramname"><em>_A_a3</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">typename type_trait< T_arg4 >::take </td>
<td class="paramname"><em>_A_a4</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">typename type_trait< T_arg5 >::take </td>
<td class="paramname"><em>_A_a5</em>, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype">typename type_trait< T_arg6 >::take </td>
<td class="paramname"><em>_A_a6</em> </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td> const<code> [inline]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Execute the wrapped method operating on the stored instance. </p>
<dl><dt><b>Parameters:</b></dt><dd>
<table class="params">
<tr><td class="paramname">_A_a1</td><td>Argument to be passed on to the method. </td></tr>
<tr><td class="paramname">_A_a2</td><td>Argument to be passed on to the method. </td></tr>
<tr><td class="paramname">_A_a3</td><td>Argument to be passed on to the method. </td></tr>
<tr><td class="paramname">_A_a4</td><td>Argument to be passed on to the method. </td></tr>
<tr><td class="paramname">_A_a5</td><td>Argument to be passed on to the method. </td></tr>
<tr><td class="paramname">_A_a6</td><td>Argument to be passed on to the method. </td></tr>
</table>
</dd>
</dl>
<dl class="return"><dt><b>Returns:</b></dt><dd>The return value of the method invocation. </dd></dl>
</div>
</div>
</div>
<hr class="footer"/><address class="footer"><small>Generated on Mon Jul 25 2011 09:51:25 for libsigc++ by 
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.3 </small></address>
</body>
</html>
| Java |
/*
Copyright (C) 2018 Daniel Schultz
This file is part of FLINT.
FLINT is free software: you can redistribute it and/or modify it under
the terms of the GNU Lesser General Public License (LGPL) as published
by the Free Software Foundation; either version 2.1 of the License, or
(at your option) any later version. See <https://www.gnu.org/licenses/>.
*/
#include "nmod_mpoly.h"
#include "fq_nmod_mpoly.h"
void nmod_mpolyd_ctx_init(nmod_mpolyd_ctx_t dctx, slong nvars)
{
slong i;
dctx->nvars = nvars;
dctx->perm = (slong *) flint_malloc(nvars*sizeof(slong));
for (i = 0; i < nvars; i++)
{
dctx->perm[i] = i;
}
}
void nmod_mpolyd_ctx_clear(nmod_mpolyd_ctx_t dctx)
{
flint_free(dctx->perm);
}
void nmod_mpolyd_init(nmod_mpolyd_t poly, slong nvars)
{
slong i;
poly->nvars = nvars;
poly->degb_alloc = nvars;
poly->deg_bounds = (slong *) flint_malloc(poly->degb_alloc*sizeof(slong));
for (i = 0; i < nvars; i++)
{
poly->deg_bounds[i] = WORD(1);
}
poly->coeff_alloc = WORD(16);
poly->coeffs = (mp_limb_t *) flint_malloc(poly->coeff_alloc*sizeof(mp_limb_t));
for (i = 0; i < poly->coeff_alloc; i++)
{
poly->coeffs[i] = UWORD(0);
}
}
void nmod_mpolyd_fit_length(nmod_mpolyd_t poly, slong len) {
if (poly->coeff_alloc < len) {
/*flint_printf("realloc %wd -> %wd\n",poly->coeff_alloc, len);*/
poly->coeffs = (mp_limb_t *) flint_realloc(poly->coeffs, len*sizeof(mp_limb_t));
poly->coeff_alloc = len;
}
}
void nmod_mpolyd_set_nvars(nmod_mpolyd_t poly, slong nvars) {
poly->nvars = nvars;
if (poly->degb_alloc < nvars) {
poly->deg_bounds = (slong *) flint_realloc(poly->deg_bounds, nvars*sizeof(slong));
poly->degb_alloc = nvars;
}
}
void nmod_mpolyd_zero(nmod_mpolyd_t poly)
{
slong i;
for (i = 0; i < poly->nvars; i++)
{
poly->deg_bounds[i] = WORD(1);
}
poly->coeffs[0] = UWORD(0);
}
void nmod_mpolyd_clear(nmod_mpolyd_t poly)
{
flint_free(poly->deg_bounds);
flint_free(poly->coeffs);
poly->deg_bounds = NULL;
poly->coeffs = NULL;
}
int nmod_mpolyd_set_degbounds(nmod_mpolyd_t A, slong * bounds)
{
slong i;
int success = 0;
slong degb_prod;
degb_prod = 1;
for (i = 0; i < A->nvars; i++)
{
ulong hi;
A->deg_bounds[i] = bounds[i];
umul_ppmm(hi, degb_prod, degb_prod, A->deg_bounds[i]);
if (hi != WORD(0) || degb_prod < 0)
{
goto done;
}
}
success = 1;
nmod_mpolyd_fit_length(A, degb_prod);
done:
return success;
}
int nmod_mpolyd_set_degbounds_perm(nmod_mpolyd_t A, const nmod_mpolyd_ctx_t dctx, slong * bounds)
{
slong i;
int success = 0;
const slong * perm = dctx->perm;
slong degb_prod;
degb_prod = 1;
for (i = 0; i < A->nvars; i++)
{
ulong hi;
A->deg_bounds[i] = bounds[perm[i]];
umul_ppmm(hi, degb_prod, degb_prod, A->deg_bounds[i]);
if (hi != WORD(0) || degb_prod < 0)
{
goto done;
}
}
success = 1;
nmod_mpolyd_fit_length(A, degb_prod);
done:
return success;
}
/*
convert B to A assuming degree bounds have been set in A
*/
void nmod_mpoly_convert_to_nmod_mpolyd_degbound(nmod_mpolyd_t A,
const nmod_mpolyd_ctx_t dctx,
const nmod_mpoly_t B, const nmod_mpoly_ctx_t ctx)
{
slong degb_prod;
slong i, j, N;
ulong * exps;
const slong * perm = dctx->perm;
slong nvars = ctx->minfo->nvars;
TMP_INIT;
FLINT_ASSERT(A->nvars == nvars);
FLINT_ASSERT(B->bits <= FLINT_BITS);
degb_prod = WORD(1);
for (i = 0; i < nvars; i++)
{
degb_prod *= A->deg_bounds[i];
}
for (i = 0; i < degb_prod; i++)
{
A->coeffs[i] = UWORD(0);
}
TMP_START;
exps = (ulong *) TMP_ALLOC(nvars*sizeof(ulong));
N = mpoly_words_per_exp(B->bits, ctx->minfo);
for (i = 0; i < B->length; i++)
{
slong off;
mpoly_get_monomial_ui(exps, B->exps + N*i, B->bits, ctx->minfo);
off = 0;
for (j = 0; j < nvars; j++)
{
off = exps[perm[j]] + A->deg_bounds[j]*off;
}
A->coeffs[off] = B->coeffs[i];
}
TMP_END;
}
/*
convert B to A - sets degree bounds in A
*/
void nmod_mpoly_convert_to_nmod_mpolyd(
nmod_mpolyd_t A, const nmod_mpolyd_ctx_t dctx,
const nmod_mpoly_t B, const nmod_mpoly_ctx_t ctx)
{
slong degb_prod;
slong i, j, N;
slong * exps;
const slong * perm = dctx->perm;
slong nvars = ctx->minfo->nvars;
TMP_INIT;
nmod_mpolyd_set_nvars(A, ctx->minfo->nvars);
FLINT_ASSERT(B->bits <= FLINT_BITS);
if (B->length == 0)
{
nmod_mpolyd_zero(A);
return;
}
TMP_START;
exps = (slong *) TMP_ALLOC(ctx->minfo->nvars*sizeof(slong));
nmod_mpoly_degrees_si(exps, B, ctx);
degb_prod = WORD(1);
for (i = 0; i < nvars; i++)
{
A->deg_bounds[i] = exps[perm[i]] + 1;
degb_prod *= A->deg_bounds[i];
}
nmod_mpolyd_fit_length(A, degb_prod);
for (i = 0; i < degb_prod; i++)
{
A->coeffs[i] = UWORD(0);
}
N = mpoly_words_per_exp(B->bits, ctx->minfo);
for (i = 0; i < B->length; i++)
{
slong off = 0;
mpoly_get_monomial_ui((ulong *)exps, B->exps + N*i, B->bits, ctx->minfo);
for (j = 0; j < nvars; j++)
{
off = exps[perm[j]] + A->deg_bounds[j]*off;
}
A->coeffs[off] = B->coeffs[i];
}
TMP_END;
}
/*
Convert B to A
*/
void nmod_mpoly_convert_from_nmod_mpolyd(
nmod_mpoly_t A,
const nmod_mpoly_ctx_t ctx,
const nmod_mpolyd_t B,
const nmod_mpolyd_ctx_t dctx)
{
slong off, j, k, N;
slong bits, nvars = ctx->minfo->nvars;
slong Alen;
slong * perm = dctx->perm;
slong perm_nontrivial = 0;
ulong topmask;
ulong * exps, * pcurexp, * pexps;
TMP_INIT;
FLINT_ASSERT(nvars == B->nvars);
TMP_START;
exps = (ulong *) TMP_ALLOC(nvars*sizeof(ulong));
/* find bits needed for the result */
off = 1;
for (j = 0; j < nvars; j++)
{
off *= B->deg_bounds[j];
exps[perm[j]] = B->deg_bounds[j] - 1;
perm_nontrivial |= j ^ perm[j];
}
FLINT_ASSERT(off <= B->coeff_alloc);
bits = mpoly_exp_bits_required_ui(exps, ctx->minfo);
bits = mpoly_fix_bits(bits, ctx->minfo);
N = mpoly_words_per_exp(bits, ctx->minfo);
/* we are going to push back terms manually */
nmod_mpoly_fit_length_reset_bits(A, 0, bits, ctx);
Alen = 0;
/* find exponent vector for all variables */
pexps = (ulong *) TMP_ALLOC(N*nvars*sizeof(ulong));
for (k = 0; k < nvars; k++)
{
for (j = 0; j < nvars; j++)
exps[perm[j]] = (j == k);
mpoly_set_monomial_ui(pexps + k*N, exps, bits, ctx->minfo);
}
/* get most significant exponent in exps and its vector in ptempexp */
off--;
pcurexp = (ulong *) TMP_ALLOC(N*sizeof(ulong));
mpoly_monomial_zero(pcurexp, N);
k = off;
for (j = nvars - 1; j >= 0; j--)
{
exps[j] = k % B->deg_bounds[j];
k = k / B->deg_bounds[j];
mpoly_monomial_madd_inplace_mp(pcurexp, exps[j], pexps + N*j, N);
}
/* scan down through the exponents */
topmask = 0;
for (; off >= 0; off--)
{
if (B->coeffs[off] != UWORD(0))
{
_nmod_mpoly_fit_length(&A->coeffs, &A->coeffs_alloc,
&A->exps, &A->exps_alloc, N, Alen + 1);
A->coeffs[Alen] = B->coeffs[off];
mpoly_monomial_set(A->exps + N*Alen, pcurexp, N);
topmask |= (A->exps + N*Alen)[N - 1];
Alen++;
}
j = nvars - 1;
do {
--exps[j];
if ((slong)(exps[j]) < WORD(0))
{
FLINT_ASSERT(off == 0 || j > 0);
FLINT_ASSERT(exps[j] == -UWORD(1));
exps[j] = B->deg_bounds[j] - 1;
mpoly_monomial_madd_inplace_mp(pcurexp, exps[j], pexps + N*j, N);
} else
{
mpoly_monomial_sub_mp(pcurexp, pcurexp, pexps + N*j, N);
break;
}
} while (--j >= 0);
}
_nmod_mpoly_set_length(A, Alen, ctx);
/* sort the exponents if needed */
if (ctx->minfo->ord != ORD_LEX || perm_nontrivial != WORD(0))
{
slong msb;
mpoly_get_cmpmask(pcurexp, N, bits, ctx->minfo);
if (topmask != WORD(0))
{
count_leading_zeros(msb, topmask);
msb = (FLINT_BITS - 1)^msb;
} else
{
msb = -WORD(1);
}
if (N == 1) {
if (msb >= WORD(0))
{
_nmod_mpoly_radix_sort1(A, 0, A->length,
msb, pcurexp[0], topmask);
}
} else {
_nmod_mpoly_radix_sort(A, 0, A->length,
(N - 1)*FLINT_BITS + msb, N, pcurexp);
}
}
TMP_END;
}
void nmod_mpolyd_print(nmod_mpolyd_t poly)
{
int first = 0;
slong i, j;
slong degb_prod;
degb_prod = WORD(1);
for (j = 0; j < poly->nvars; j++) {
degb_prod *= poly->deg_bounds[j];
}
first = 1;
for (i = 0; i < degb_prod; i++) {
ulong k = i;
if (poly->coeffs[i] == 0)
continue;
if (!first)
printf(" + ");
flint_printf("%wu", poly->coeffs[i]);
for (j = poly->nvars - 1; j >= 0; j--)
{
ulong m = poly->deg_bounds[j];
ulong e = k % m;
k = k / m;
flint_printf("*x%wd^%wd", j, e);
}
FLINT_ASSERT(k == 0);
first = 0;
}
if (first)
flint_printf("0");
}
slong nmod_mpolyd_length(const nmod_mpolyd_t A)
{
slong i, j, degb_prod;
degb_prod = WORD(1);
for (j = 0; j < A->nvars; j++)
degb_prod *= A->deg_bounds[j];
for (i = degb_prod; i > 0; i--)
{
if (A->coeffs[i - 1] != UWORD(0))
break;
}
return i;
}
| Java |
/****************************************************************************
**
** Copyright (C) 2013 Digia Plc and/or its subsidiary(-ies).
** Contact: http://www.qt-project.org/legal
**
** This file is part of the QtDeclarative module of the Qt Toolkit.
**
** $QT_BEGIN_LICENSE:LGPL$
** Commercial License Usage
** Licensees holding valid commercial Qt licenses may use this file in
** accordance with the commercial license agreement provided with the
** Software or, alternatively, in accordance with the terms contained in
** a written agreement between you and Digia. For licensing terms and
** conditions see http://qt.digia.com/licensing. For further information
** use the contact form at http://qt.digia.com/contact-us.
**
** GNU Lesser General Public License Usage
** Alternatively, this file may be used under the terms of the GNU Lesser
** General Public License version 2.1 as published by the Free Software
** Foundation and appearing in the file LICENSE.LGPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU Lesser General Public License version 2.1 requirements
** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
**
** In addition, as a special exception, Digia gives you certain additional
** rights. These rights are described in the Digia Qt LGPL Exception
** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
**
** GNU General Public License Usage
** Alternatively, this file may be used under the terms of the GNU
** General Public License version 3.0 as published by the Free Software
** Foundation and appearing in the file LICENSE.GPL included in the
** packaging of this file. Please review the following information to
** ensure the GNU General Public License version 3.0 requirements will be
** met: http://www.gnu.org/copyleft/gpl.html.
**
**
** $QT_END_LICENSE$
**
****************************************************************************/
#include "private/qpacketprotocol_p.h"
#include <QBuffer>
#include <QElapsedTimer>
QT_BEGIN_NAMESPACE
#define MAX_PACKET_SIZE 0x7FFFFFFF
/*!
\class QPacketProtocol
\internal
\brief The QPacketProtocol class encapsulates communicating discrete packets
across fragmented IO channels, such as TCP sockets.
QPacketProtocol makes it simple to send arbitrary sized data "packets" across
fragmented transports such as TCP and UDP.
As transmission boundaries are not respected, sending packets over protocols
like TCP frequently involves "stitching" them back together at the receiver.
QPacketProtocol makes this easier by performing this task for you. Packet
data sent using QPacketProtocol is prepended with a 4-byte size header
allowing the receiving QPacketProtocol to buffer the packet internally until
it has all been received. QPacketProtocol does not perform any sanity
checking on the size or on the data, so this class should only be used in
prototyping or trusted situations where DOS attacks are unlikely.
QPacketProtocol does not perform any communications itself. Instead it can
operate on any QIODevice that supports the QIODevice::readyRead() signal. A
logical "packet" is encapsulated by the companion QPacket class. The
following example shows two ways to send data using QPacketProtocol. The
transmitted data is equivalent in both.
\code
QTcpSocket socket;
// ... connect socket ...
QPacketProtocol protocol(&socket);
// Send packet the quick way
protocol.send() << "Hello world" << 123;
// Send packet the longer way
QPacket packet;
packet << "Hello world" << 123;
protocol.send(packet);
\endcode
Likewise, the following shows how to read data from QPacketProtocol, assuming
that the QPacketProtocol::readyRead() signal has been emitted.
\code
// ... QPacketProtocol::readyRead() is emitted ...
int a;
QByteArray b;
// Receive packet the quick way
protocol.read() >> a >> b;
// Receive packet the longer way
QPacket packet = protocol.read();
p >> a >> b;
\endcode
\ingroup io
\sa QPacket
*/
class QPacketProtocolPrivate : public QObject
{
Q_OBJECT
public:
QPacketProtocolPrivate(QPacketProtocol * parent, QIODevice * _dev)
: QObject(parent), inProgressSize(-1), maxPacketSize(MAX_PACKET_SIZE),
waitingForPacket(false), dev(_dev)
{
Q_ASSERT(4 == sizeof(qint32));
QObject::connect(this, SIGNAL(readyRead()),
parent, SIGNAL(readyRead()));
QObject::connect(this, SIGNAL(packetWritten()),
parent, SIGNAL(packetWritten()));
QObject::connect(this, SIGNAL(invalidPacket()),
parent, SIGNAL(invalidPacket()));
QObject::connect(dev, SIGNAL(readyRead()),
this, SLOT(readyToRead()));
QObject::connect(dev, SIGNAL(aboutToClose()),
this, SLOT(aboutToClose()));
QObject::connect(dev, SIGNAL(bytesWritten(qint64)),
this, SLOT(bytesWritten(qint64)));
}
Q_SIGNALS:
void readyRead();
void packetWritten();
void invalidPacket();
public Q_SLOTS:
void aboutToClose()
{
inProgress.clear();
sendingPackets.clear();
inProgressSize = -1;
}
void bytesWritten(qint64 bytes)
{
Q_ASSERT(!sendingPackets.isEmpty());
while(bytes) {
if(sendingPackets.at(0) > bytes) {
sendingPackets[0] -= bytes;
bytes = 0;
} else {
bytes -= sendingPackets.at(0);
sendingPackets.removeFirst();
emit packetWritten();
}
}
}
void readyToRead()
{
bool gotPackets = false;
while (true) {
// Get size header (if not in progress)
if (-1 == inProgressSize) {
// We need a size header of sizeof(qint32)
if (sizeof(qint32) > (uint)dev->bytesAvailable()) {
if (gotPackets)
emit readyRead();
return; // no more data available
}
// Read size header
int read = dev->read((char *)&inProgressSize, sizeof(qint32));
Q_ASSERT(read == sizeof(qint32));
Q_UNUSED(read);
// Check sizing constraints
if (inProgressSize > maxPacketSize) {
QObject::disconnect(dev, SIGNAL(readyRead()),
this, SLOT(readyToRead()));
QObject::disconnect(dev, SIGNAL(aboutToClose()),
this, SLOT(aboutToClose()));
QObject::disconnect(dev, SIGNAL(bytesWritten(qint64)),
this, SLOT(bytesWritten(qint64)));
dev = 0;
emit invalidPacket();
return;
}
inProgressSize -= sizeof(qint32);
} else {
inProgress.append(dev->read(inProgressSize - inProgress.size()));
if (inProgressSize == inProgress.size()) {
// Packet has arrived!
packets.append(inProgress);
inProgressSize = -1;
inProgress.clear();
waitingForPacket = false;
gotPackets = true;
} else {
if (gotPackets)
emit readyRead();
return; // packet in progress is not yet complete
}
}
}
}
public:
QList<qint64> sendingPackets;
QList<QByteArray> packets;
QByteArray inProgress;
qint32 inProgressSize;
qint32 maxPacketSize;
bool waitingForPacket;
QIODevice * dev;
};
/*!
Construct a QPacketProtocol instance that works on \a dev with the
specified \a parent.
*/
QPacketProtocol::QPacketProtocol(QIODevice * dev, QObject * parent)
: QObject(parent), d(new QPacketProtocolPrivate(this, dev))
{
Q_ASSERT(dev);
}
/*!
Destroys the QPacketProtocol instance.
*/
QPacketProtocol::~QPacketProtocol()
{
}
/*!
Returns the maximum packet size allowed. By default this is
2,147,483,647 bytes.
If a packet claiming to be larger than the maximum packet size is received,
the QPacketProtocol::invalidPacket() signal is emitted.
\sa QPacketProtocol::setMaximumPacketSize()
*/
qint32 QPacketProtocol::maximumPacketSize() const
{
return d->maxPacketSize;
}
/*!
Sets the maximum allowable packet size to \a max.
\sa QPacketProtocol::maximumPacketSize()
*/
qint32 QPacketProtocol::setMaximumPacketSize(qint32 max)
{
if(max > (signed)sizeof(qint32))
d->maxPacketSize = max;
return d->maxPacketSize;
}
/*!
Returns a streamable object that is transmitted on destruction. For example
\code
protocol.send() << "Hello world" << 123;
\endcode
will send a packet containing "Hello world" and 123. To construct more
complex packets, explicitly construct a QPacket instance.
*/
QPacketAutoSend QPacketProtocol::send()
{
return QPacketAutoSend(this);
}
/*!
\fn void QPacketProtocol::send(const QPacket & packet)
Transmit the \a packet.
*/
void QPacketProtocol::send(const QPacket & p)
{
if(p.b.isEmpty())
return; // We don't send empty packets
qint64 sendSize = p.b.size() + sizeof(qint32);
d->sendingPackets.append(sendSize);
qint32 sendSize32 = sendSize;
qint64 writeBytes = d->dev->write((char *)&sendSize32, sizeof(qint32));
Q_ASSERT(writeBytes == sizeof(qint32));
writeBytes = d->dev->write(p.b);
Q_ASSERT(writeBytes == p.b.size());
Q_UNUSED(writeBytes);
}
/*!
Returns the number of received packets yet to be read.
*/
qint64 QPacketProtocol::packetsAvailable() const
{
return d->packets.count();
}
/*!
Discard any unread packets.
*/
void QPacketProtocol::clear()
{
d->packets.clear();
}
/*!
Return the next unread packet, or an invalid QPacket instance if no packets
are available. This method does NOT block.
*/
QPacket QPacketProtocol::read()
{
if(0 == d->packets.count())
return QPacket();
QPacket rv(d->packets.at(0));
d->packets.removeFirst();
return rv;
}
/*
Returns the difference between msecs and elapsed. If msecs is -1,
however, -1 is returned.
*/
static int qt_timeout_value(int msecs, int elapsed)
{
if (msecs == -1)
return -1;
int timeout = msecs - elapsed;
return timeout < 0 ? 0 : timeout;
}
/*!
This function locks until a new packet is available for reading and the
\l{QIODevice::}{readyRead()} signal has been emitted. The function
will timeout after \a msecs milliseconds; the default timeout is
30000 milliseconds.
The function returns true if the readyRead() signal is emitted and
there is new data available for reading; otherwise it returns false
(if an error occurred or the operation timed out).
*/
bool QPacketProtocol::waitForReadyRead(int msecs)
{
if (!d->packets.isEmpty())
return true;
QElapsedTimer stopWatch;
stopWatch.start();
d->waitingForPacket = true;
do {
if (!d->dev->waitForReadyRead(msecs))
return false;
if (!d->waitingForPacket)
return true;
msecs = qt_timeout_value(msecs, stopWatch.elapsed());
} while (true);
}
/*!
Return the QIODevice passed to the QPacketProtocol constructor.
*/
QIODevice * QPacketProtocol::device()
{
return d->dev;
}
/*!
\fn void QPacketProtocol::readyRead()
Emitted whenever a new packet is received. Applications may use
QPacketProtocol::read() to retrieve this packet.
*/
/*!
\fn void QPacketProtocol::invalidPacket()
A packet larger than the maximum allowable packet size was received. The
packet will be discarded and, as it indicates corruption in the protocol, no
further packets will be received.
*/
/*!
\fn void QPacketProtocol::packetWritten()
Emitted each time a packet is completing written to the device. This signal
may be used for communications flow control.
*/
/*!
\class QPacket
\internal
\brief The QPacket class encapsulates an unfragmentable packet of data to be
transmitted by QPacketProtocol.
The QPacket class works together with QPacketProtocol to make it simple to
send arbitrary sized data "packets" across fragmented transports such as TCP
and UDP.
QPacket provides a QDataStream interface to an unfragmentable packet.
Applications should construct a QPacket, propagate it with data and then
transmit it over a QPacketProtocol instance. For example:
\code
QPacketProtocol protocol(...);
QPacket myPacket;
myPacket << "Hello world!" << 123;
protocol.send(myPacket);
\endcode
As long as both ends of the connection are using the QPacketProtocol class,
the data within this packet will be delivered unfragmented at the other end,
ready for extraction.
\code
QByteArray greeting;
int count;
QPacket myPacket = protocol.read();
myPacket >> greeting >> count;
\endcode
Only packets returned from QPacketProtocol::read() may be read from. QPacket
instances constructed by directly by applications are for transmission only
and are considered "write only". Attempting to read data from them will
result in undefined behavior.
\ingroup io
\sa QPacketProtocol
*/
/*!
Constructs an empty write-only packet.
*/
QPacket::QPacket()
: QDataStream(), buf(0)
{
buf = new QBuffer(&b);
buf->open(QIODevice::WriteOnly);
setDevice(buf);
setVersion(QDataStream::Qt_4_7);
}
/*!
Destroys the QPacket instance.
*/
QPacket::~QPacket()
{
if(buf) {
delete buf;
buf = 0;
}
}
/*!
Creates a copy of \a other. The initial stream positions are shared, but the
two packets are otherwise independent.
*/
QPacket::QPacket(const QPacket & other)
: QDataStream(), b(other.b), buf(0)
{
buf = new QBuffer(&b);
buf->open(other.buf->openMode());
setDevice(buf);
}
/*!
\internal
*/
QPacket::QPacket(const QByteArray & ba)
: QDataStream(), b(ba), buf(0)
{
buf = new QBuffer(&b);
buf->open(QIODevice::ReadOnly);
setDevice(buf);
}
/*!
Returns true if this packet is empty - that is, contains no data.
*/
bool QPacket::isEmpty() const
{
return b.isEmpty();
}
/*!
Returns raw packet data.
*/
QByteArray QPacket::data() const
{
return b;
}
/*!
Clears data in the packet. This is useful for reusing one writable packet.
For example
\code
QPacketProtocol protocol(...);
QPacket packet;
packet << "Hello world!" << 123;
protocol.send(packet);
packet.clear();
packet << "Goodbyte world!" << 789;
protocol.send(packet);
\endcode
*/
void QPacket::clear()
{
QBuffer::OpenMode oldMode = buf->openMode();
buf->close();
b.clear();
buf->setBuffer(&b); // reset QBuffer internals with new size of b.
buf->open(oldMode);
}
/*!
\class QPacketAutoSend
\internal
\internal
*/
QPacketAutoSend::QPacketAutoSend(QPacketProtocol * _p)
: QPacket(), p(_p)
{
}
QPacketAutoSend::~QPacketAutoSend()
{
if(!b.isEmpty())
p->send(*this);
}
QT_END_NAMESPACE
#include <qpacketprotocol.moc>
| Java |
asynctest(
'browser.tinymce.core.keyboard.BoundaryLocationTest',
[
'ephox.agar.api.Assertions',
'ephox.agar.api.GeneralSteps',
'ephox.agar.api.Logger',
'ephox.agar.api.Pipeline',
'ephox.agar.api.Step',
'ephox.katamari.api.Fun',
'ephox.sugar.api.dom.Hierarchy',
'ephox.sugar.api.node.Element',
'ephox.sugar.api.search.Selectors',
'tinymce.core.caret.CaretPosition',
'tinymce.core.keyboard.BoundaryLocation',
'tinymce.core.test.ViewBlock',
'tinymce.core.text.Zwsp'
],
function (Assertions, GeneralSteps, Logger, Pipeline, Step, Fun, Hierarchy, Element, Selectors, CaretPosition, BoundaryLocation, ViewBlock, Zwsp) {
var success = arguments[arguments.length - 2];
var failure = arguments[arguments.length - 1];
var ZWSP = Zwsp.ZWSP;
var viewBlock = ViewBlock();
var createViewElement = function (html) {
viewBlock.update(html);
return Element.fromDom(viewBlock.get());
};
var createLocation = function (elm, elementPath, offset) {
var container = Hierarchy.follow(elm, elementPath);
var pos = new CaretPosition(container.getOrDie().dom(), offset);
var location = BoundaryLocation.readLocation(elm.dom(), pos);
return location;
};
var createPosition = function (elm, elementPath, offset) {
var container = Hierarchy.follow(elm, elementPath);
return new CaretPosition(container.getOrDie().dom(), offset);
};
var locationName = function (location) {
return location.fold(
Fun.constant('before'),
Fun.constant('start'),
Fun.constant('end'),
Fun.constant('after')
);
};
var locationElement = function (location) {
return Element.fromDom(location.fold(
Fun.identity,
Fun.identity,
Fun.identity,
Fun.identity
));
};
var sTestValidLocation = function (html, elementPath, offset, expectedLocationName, expectedInline) {
return Step.sync(function () {
var elm = createViewElement(html);
var location = createLocation(elm, elementPath, offset);
Assertions.assertEq('Should be a valid location: ' + html, true, location.isSome());
Assertions.assertEq('Should be expected location', expectedLocationName, locationName(location.getOrDie()));
Assertions.assertDomEq('Should be expected element', Selectors.one(expectedInline, elm).getOrDie(), locationElement(location.getOrDie()));
});
};
var sTestInvalidLocation = function (html, elementPath, offset) {
return Step.sync(function () {
var elm = createViewElement(html);
var location = createLocation(elm, elementPath, offset);
Assertions.assertEq('Should not be a valid location: ' + html, true, location.isNone());
});
};
var sTestFindLocation = function (forward, html, elementPath, offset, expectedLocationName, expectedInline) {
return Step.sync(function () {
var elm = createViewElement(html);
var position = createPosition(elm, elementPath, offset);
var location = forward ? BoundaryLocation.nextLocation(elm.dom(), position) : BoundaryLocation.prevLocation(elm.dom(), position);
Assertions.assertDomEq('Should be expected element', Selectors.one(expectedInline, elm).getOrDie(), locationElement(location.getOrDie()));
Assertions.assertEq('Should be a valid location: ' + html, true, location.isSome());
Assertions.assertEq('Should be expected location', expectedLocationName, locationName(location.getOrDie()));
});
};
var sTestFindLocationInvalid = function (forward, html, elementPath, offset) {
return Step.sync(function () {
var elm = createViewElement(html);
var position = createPosition(elm, elementPath, offset);
var location = forward ? BoundaryLocation.nextLocation(elm.dom(), position) : BoundaryLocation.prevLocation(elm.dom(), position);
Assertions.assertEq('Should not be a valid location: ' + html, true, location.isNone());
});
};
var sTestPrevLocation = Fun.curry(sTestFindLocation, false);
var sTestNextLocation = Fun.curry(sTestFindLocation, true);
var sTestPrevLocationInvalid = Fun.curry(sTestFindLocationInvalid, false);
var sTestNextLocationInvalid = Fun.curry(sTestFindLocationInvalid, true);
var sTestValidLocations = Logger.t('sTestValidLocations', GeneralSteps.sequence([
sTestValidLocation('<p><a href="a">a</a></p>', [0], 0, 'before', 'a'),
sTestValidLocation('<p><a href="a">a</a></p>', [0, 0, 0], 0, 'start', 'a'),
sTestValidLocation('<p><a href="a">a</a></p>', [0, 0, 0], 1, 'end', 'a'),
sTestValidLocation('<p><a href="a">a</a></p>', [0], 1, 'after', 'a'),
sTestValidLocation('<p>a<a href="a">a</a></p>', [0, 0], 1, 'before', 'a'),
sTestValidLocation('<p><a href="a">a</a>a</p>', [0, 1], 0, 'after', 'a'),
sTestValidLocation('<p><a href="a">ab</a></p>', [0, 0, 0], 0, 'start', 'a'),
sTestValidLocation('<p><a href="a">ab</a></p>', [0, 0, 0], 2, 'end', 'a'),
sTestValidLocation('<p><img src="a"><a href="a">a</a></p>', [0], 1, 'before', 'a'),
sTestValidLocation('<p><a href="a"><img src="a"></a></p>', [0, 0], 0, 'start', 'a'),
sTestValidLocation('<p><a href="a"><img src="a"></a></p>', [0, 0], 1, 'end', 'a'),
sTestValidLocation('<p><a href="a">a</a><img src="a"></p>', [0], 1, 'after', 'a'),
sTestValidLocation('<p><a href="a">a</a></p><p><a href="b">b</a></p>', [0], 1, 'after', 'a'),
sTestValidLocation('<p><a href="a">a</a></p><p><a href="b">b</a></p>', [1], 0, 'before', 'p:nth-child(2) a')
]));
var sTestValidZwspLocations = Logger.t('sTestValidZwspLocations', GeneralSteps.sequence([
sTestValidLocation('<p>' + ZWSP + '<a href="a">a</a></p>', [0, 0], 0, 'before', 'a'),
sTestValidLocation('<p><a href="a">' + ZWSP + 'a</a></p>', [0, 0, 0], 1, 'start', 'a'),
sTestValidLocation('<p><a href="a">a' + ZWSP + '</a></p>', [0, 0, 0], 1, 'end', 'a'),
sTestValidLocation('<p><a href="a">a</a>' + ZWSP + '</p>', [0, 1], 1, 'after', 'a')
]));
var sTestInvalidLocations = Logger.t('sTestInvalidLocations', GeneralSteps.sequence([
sTestInvalidLocation('<p>a</p>', [0, 0], 0),
sTestInvalidLocation('<p><b>a</b></p>', [0], 0),
sTestInvalidLocation('<p><b>a</b></p>', [0], 1),
sTestInvalidLocation('<p>a<a href="a">a</a>b</p>', [0, 0], 0),
sTestInvalidLocation('<p>a<a href="a">a</a>b</p>', [0, 2], 1),
sTestInvalidLocation('<p><img src="a"><a href="a">a</a></p>', [0], 0),
sTestInvalidLocation('<p><a href="a">a</a><img src="a"></p>', [0], 2),
sTestInvalidLocation('<p><a href="a"><img src="a"><img src="a"></a><img src="a"></p>', [0, 0], 1),
sTestInvalidLocation('<p dir="rtl"><a href="a">a</a></p>', [0, 0, 0], 0),
sTestInvalidLocation('<p><a href="a">\u05D4</a></p>', [0, 0, 0], 0)
]));
var sTestPrevLocations = Logger.t('sTestPrevLocations', GeneralSteps.sequence([
sTestPrevLocation('<p><a href="a">a</a>b</p>', [0, 1], 1, 'after', 'a'),
sTestPrevLocation('<p><a href="a">a</a></p>', [0], 1, 'end', 'a'),
sTestPrevLocation('<p><a href="a">a</a></p>', [0, 0, 0], 1, 'start', 'a'),
sTestPrevLocation('<p><a href="a">a</a></p>', [0, 0, 0], 0, 'before', 'a'),
sTestPrevLocation('<p><a href="a"><img src="about:blank"></a></p>', [0], 1, 'end', 'a'),
sTestPrevLocation('<p><a href="a"><img src="about:blank"></a></p>', [0, 0], 1, 'start', 'a'),
sTestPrevLocation('<p><a href="a"><img src="about:blank"></a></p>', [0, 0], 0, 'before', 'a')
]));
var sTestPrevLocationsBetweenInlines = Logger.t('sTestPrevLocationsBetweenInlines', GeneralSteps.sequence([
sTestPrevLocation('<p><a href="a">a</a><a href="b">b</a></p>', [0, 1, 0], 0, 'before', 'a:nth-child(2)')
]));
var sTestPrevLocationsBetweenBlocks = Logger.t('sTestPrevLocationsBetweenBlocks', GeneralSteps.sequence([
sTestPrevLocation('<p><a href="a">a</a></p><p><a href="b">b</a></p>', [1], 0, 'end', 'p:nth-child(1) a'),
sTestPrevLocation('<p><a href="a">a</a></p><p><a href="b">b</a></p>', [1, 0, 0], 0, 'before', 'p:nth-child(2) a'),
sTestPrevLocation('<p><a href="a">a</a>b</p><p><a href="c">c</a></p>', [1, 0, 0], 0, 'before', 'p:nth-child(2) a'),
sTestPrevLocation('<p><a href="a">a</a><br /></p><p><a href="c">c</a></p>', [1], 0, 'after', 'p:nth-child(1) a'),
sTestPrevLocationInvalid('<p><a href="a">a</a></p><p>b<a href="c">c</a></p>', [1, 0], 1),
sTestPrevLocationInvalid('<p><a href="a">a</a>b</p><p><a href="c">c</a></p>', [1], 0)
]));
var sTestPrevZwspLocations = Logger.t('sTestPrevLocations', GeneralSteps.sequence([
sTestPrevLocation('<p><a href="a">a</a>' + ZWSP + 'b</p>', [0, 1], 2, 'after', 'a'),
sTestPrevLocation('<p><a href="a">a</a>' + ZWSP + '</p>', [0, 1], 1, 'end', 'a'),
sTestPrevLocation('<p><a href="a">a' + ZWSP + '</a></p>', [0, 0, 0], 1, 'start', 'a'),
sTestPrevLocation('<p><a href="a">' + ZWSP + 'a</a></p>', [0, 0, 0], 1, 'before', 'a')
]));
var sTestNextLocations = Logger.t('sTestNextLocations', GeneralSteps.sequence([
sTestNextLocation('<p>a<a href="a">b</a></p>', [0, 0], 0, 'before', 'a'),
sTestNextLocation('<p><a href="a">a</a></p>', [0], 0, 'start', 'a'),
sTestNextLocation('<p><a href="a">a</a></p>', [0, 0, 0], 0, 'end', 'a'),
sTestNextLocation('<p><a href="a">a</a></p>', [0, 0, 0], 1, 'after', 'a'),
sTestNextLocation('<p><a href="a"><img src="about:blank"></a></p>', [0], 0, 'start', 'a'),
sTestNextLocation('<p><a href="a"><img src="about:blank"></a></p>', [0, 0], 0, 'end', 'a'),
sTestNextLocation('<p><a href="a"><img src="about:blank"></a></p>', [0, 0], 1, 'after', 'a')
]));
var sTestNextLocationsBetweenInlines = Logger.t('sTestNextLocationsBetweenInlines', GeneralSteps.sequence([
sTestNextLocation('<p><a href="a">a</a><a href="a">b</a></p>', [0, 0, 0], 1, 'after', 'a:nth-child(1)')
]));
var sTestNextLocationsBetweenBlocks = Logger.t('sTestNextLocationsBetweenBlocks', GeneralSteps.sequence([
sTestNextLocation('<p><a href="a">a</a></p><p><a href="b">b</a></p>', [0], 1, 'start', 'p:nth-child(2) a'),
sTestNextLocation('<p><a href="a">a</a></p><p><a href="b">b</a></p>', [0, 0, 0], 1, 'after', 'p:nth-child(1) a'),
sTestNextLocationInvalid('<p><a href="a">a</a>b</p><p><a href="c">c</a></p>', [0, 1], 0),
sTestNextLocationInvalid('<p><a href="a">a</a></p><p>b<a href="c">c</a></p>', [0], 1)
]));
var sTestNextZwspLocations = Logger.t('sTestNextZwspLocations', GeneralSteps.sequence([
sTestNextLocation('<p>a' + ZWSP + '<a href="a">b</a></p>', [0, 0], 0, 'before', 'a'),
sTestNextLocation('<p>' + ZWSP + '<a href="a">a</a></p>', [0], 0, 'start', 'a'),
sTestNextLocation('<p><a href="a">' + ZWSP + 'a</a></p>', [0, 0, 0], 1, 'end', 'a'),
sTestNextLocation('<p><a href="a">a' + ZWSP + '</a></p>', [0, 0, 0], 1, 'after', 'a')
]));
viewBlock.attach();
Pipeline.async({}, [
sTestValidLocations,
sTestValidZwspLocations,
sTestInvalidLocations,
sTestPrevLocations,
sTestPrevLocationsBetweenInlines,
sTestPrevLocationsBetweenBlocks,
sTestPrevZwspLocations,
sTestNextLocations,
sTestNextLocationsBetweenInlines,
sTestNextLocationsBetweenBlocks,
sTestNextZwspLocations
], function () {
viewBlock.detach();
success();
}, failure);
}
); | Java |
/***************************************************************************
* Copyright (c) Jürgen Riegel ([email protected]) 2002 *
* *
* This file is part of the FreeCAD CAx development system. *
* *
* This library is free software; you can redistribute it and/or *
* modify it under the terms of the GNU Library General Public *
* License as published by the Free Software Foundation; either *
* version 2 of the License, or (at your option) any later version. *
* *
* This library is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU Library General Public License for more details. *
* *
* You should have received a copy of the GNU Library General Public *
* License along with this library; see the file COPYING.LIB. If not, *
* write to the Free Software Foundation, Inc., 59 Temple Place, *
* Suite 330, Boston, MA 02111-1307, USA *
* *
***************************************************************************/
#ifndef _RayFeature_h_
#define _RayFeature_h_
#include <App/DocumentObject.h>
#include <App/PropertyLinks.h>
#include <App/PropertyFile.h>
#include <App/PropertyStandard.h>
#include "RaySegment.h"
namespace Raytracing
{
class Property;
/** Base class of all Feature classes in FreeCAD
*/
//class RayFeature: public Part::PartFeature
class AppRaytracingExport RayFeature: public Raytracing::RaySegment
{
PROPERTY_HEADER(Raytracing::RayFeature);
public:
/// Constructor
RayFeature(void);
App::PropertyLink Source;
App::PropertyColor Color;
/** @name methods overide Feature */
//@{
/// recalculate the Feature
App::DocumentObjectExecReturn *execute(void);
/// returns the type name of the ViewProvider
const char* getViewProviderName(void) const {
return "Gui::ViewProviderDocumentObject";
}
//@}
};
} //namespace Raytracing
#endif //_RayFeature_h_
| Java |
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
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<title>CQRS.NET: Cqrs.Azure.EventHub.EventBus.Configuration.AzureEventPublisherModule.RegisterEventPublisher</title>
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<td id="projectlogo"><img alt="Logo" src="ChinChilla-Software-Red.png"/></td>
<td id="projectalign" style="padding-left: 0.5em;">
<div id="projectname">CQRS.NET
 <span id="projectnumber">2.2</span>
</div>
<div id="projectbrief">A lightweight enterprise framework to write CQRS, event-sourced and micro-service applications in hybrid multi-datacentre, on-premise and Azure environments.</div>
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<a id="abe9e74df33da64157b86ee33d6338f17"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abe9e74df33da64157b86ee33d6338f17">◆ </a></span>RegisterEventPublisher()</h2>
<div class="memitem">
<div class="memproto">
<table class="mlabels">
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<td class="memname">virtual void <a class="el" href="classCqrs_1_1Azure_1_1EventHub_1_1EventBus_1_1Configuration_1_1AzureEventPublisherModule.html">Cqrs.Azure.EventHub.EventBus.Configuration.AzureEventPublisherModule</a>< TAuthenticationToken >.RegisterEventPublisher </td>
<td>(</td>
<td class="paramname"></td><td>)</td>
<td></td>
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</td>
<td class="mlabels-right">
<span class="mlabels"><span class="mlabel">virtual</span></span> </td>
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</div><div class="memdoc">
<p>Register the <a class="el" href="namespaceCqrs.html">Cqrs</a> event publisher </p>
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<!-- start footer part -->
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<li class="navelem"><a class="el" href="namespaceCqrs.html">Cqrs</a></li><li class="navelem"><a class="el" href="namespaceCqrs_1_1Azure.html">Azure</a></li><li class="navelem"><a class="el" href="namespaceCqrs_1_1Azure_1_1EventHub.html">EventHub</a></li><li class="navelem"><a class="el" href="namespaceCqrs_1_1Azure_1_1EventHub_1_1EventBus.html">EventBus</a></li><li class="navelem"><a class="el" href="namespaceCqrs_1_1Azure_1_1EventHub_1_1EventBus_1_1Configuration.html">Configuration</a></li><li class="navelem"><a class="el" href="classCqrs_1_1Azure_1_1EventHub_1_1EventBus_1_1Configuration_1_1AzureEventPublisherModule.html">AzureEventPublisherModule</a></li>
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| Java |
package com.digitalcraftinghabitat.forgemod.util;
import org.apache.logging.log4j.Level;
import cpw.mods.fml.relauncher.FMLRelaunchLog;
/**
* Created by christopher on 02/08/15.
*/
public class DCHLog {
public static final FMLRelaunchLog INSTANCE = FMLRelaunchLog.log;
private DCHLog(){
}
public static void warning( String format, Object... data )
{
log( Level.WARN, format, data );
}
private static void log( Level level, String format, Object... data )
{
FMLRelaunchLog.log( "DCH:", level, format, data );
}
public static void error( Throwable e )
{
severe( "Error: " + e.getClass().getName() + " : " + e.getMessage() );
e.printStackTrace();
}
public static void severe( String format, Object... data )
{
log( Level.ERROR, format, data );
}
public static void blockUpdate( int xCoord, int yCoord, int zCoord, String title)
{
info( title + " @ " + xCoord + ", " + yCoord + ", " + zCoord );
}
public static void info( String format, Object... data )
{
log( Level.INFO, format, data );
}
public static void crafting( String format, Object... data )
{
log( Level.INFO, format, data );
}
}
| Java |
<?php
// (c) Copyright 2002-2012 by authors of the Tiki Wiki CMS Groupware Project
//
// All Rights Reserved. See copyright.txt for details and a complete list of authors.
// Licensed under the GNU LESSER GENERAL PUBLIC LICENSE. See license.txt for details.
// $Id: pagination.php 39469 2012-01-12 21:13:48Z changi67 $
function prefs_pagination_list()
{
return array(
'pagination_firstlast' => array(
'name' => tra("Display 'First' and 'Last' links"),
'type' => 'flag',
'default' => 'y',
),
'pagination_fastmove_links' => array(
'name' => tra('Display fast move links (by 10 percent of the total number of pages) '),
'type' => 'flag',
'default' => 'y',
),
'pagination_hide_if_one_page' => array(
'name' => tra('Hide pagination when there is only one page'),
'type' => 'flag',
'default' => 'y',
),
'pagination_icons' => array(
'name' => tra('Use Icons'),
'type' => 'flag',
'default' => 'y',
),
);
}
| Java |
var searchData=
[
['own_5faddress',['own_address',['../classRiots__BabyRadio.html#a0e4c8a64bf259ce380431879871bf872',1,'Riots_BabyRadio::own_address()'],['../classRiots__MamaRadio.html#ae1e3a65b5c9768df2a514fb984fe6a8c',1,'Riots_MamaRadio::own_address()']]],
['own_5fconfig_5fmessage',['own_config_message',['../classRiots__MamaRadio.html#a513d856339fc044e1ba21da1227be711',1,'Riots_MamaRadio']]],
['own_5fring_5fevent_5fongoing',['own_ring_event_ongoing',['../classRiots__BabyRadio.html#a20d65ad231afd698d7fd9440cf89d84b',1,'Riots_BabyRadio']]]
];
| Java |
/* -*- mode: C++ ; c-file-style: "stroustrup" -*- *****************************
* Qwt Widget Library
* Copyright (C) 1997 Josef Wilgen
* Copyright (C) 2002 Uwe Rathmann
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the Qwt License, Version 1.0
*****************************************************************************/
#include "qwt_spline.h"
#include "qwt_spline_parametrization.h"
#include "qwt_math.h"
#include <qstack.h>
namespace QwtSplineBezier
{
class BezierData
{
public:
inline BezierData()
{
// default constructor with unitialized points
}
inline BezierData( const QPointF &p1, const QPointF &cp1,
const QPointF &cp2, const QPointF &p2 ):
d_x1( p1.x() ),
d_y1( p1.y() ),
d_cx1( cp1.x() ),
d_cy1( cp1.y() ),
d_cx2( cp2.x() ),
d_cy2( cp2.y() ),
d_x2( p2.x() ),
d_y2( p2.y() )
{
}
inline double flatness() const
{
// algo by Roger Willcocks ( http://www.rops.org )
const double ux = 3.0 * d_cx1 - 2.0 * d_x1 - d_x2;
const double uy = 3.0 * d_cy1 - 2.0 * d_y1 - d_y2;
const double vx = 3.0 * d_cx2 - 2.0 * d_x2 - d_x1;
const double vy = 3.0 * d_cy2 - 2.0 * d_y2 - d_y1;
const double ux2 = ux * ux;
const double uy2 = uy * uy;
const double vx2 = vx * vx;
const double vy2 = vy * vy;
return qMax( ux2, vx2 ) + qMax( uy2, vy2 );
}
inline BezierData subdivided()
{
BezierData bz;
const double c1 = midValue( d_cx1, d_cx2 );
bz.d_cx1 = midValue( d_x1, d_cx1 );
d_cx2 = midValue( d_cx2, d_x2 );
bz.d_x1 = d_x1;
bz.d_cx2 = midValue( bz.d_cx1, c1 );
d_cx1 = midValue( c1, d_cx2 );
bz.d_x2 = d_x1 = midValue( bz.d_cx2, d_cx1 );
const double c2 = midValue( d_cy1, d_cy2 );
bz.d_cy1 = midValue( d_y1, d_cy1 );
d_cy2 = midValue( d_cy2, d_y2 );
bz.d_y1 = d_y1;
bz.d_cy2 = midValue( bz.d_cy1, c2 );
d_cy1 = midValue( d_cy2, c2 );
bz.d_y2 = d_y1 = midValue( bz.d_cy2, d_cy1 );
return bz;
}
inline QPointF p2() const
{
return QPointF( d_x2, d_y2 );
}
private:
inline double midValue( double v1, double v2 )
{
return 0.5 * ( v1 + v2 );
}
double d_x1, d_y1;
double d_cx1, d_cy1;
double d_cx2, d_cy2;
double d_x2, d_y2;
};
inline double minFlatness( double tolerance )
{
// according to QwtSplineBezier::flatness
return 16 * ( tolerance * tolerance );
}
inline void toPolygon( double minFlatness,
const QPointF &p1, const QPointF &cp1,
const QPointF &cp2, const QPointF &p2,
QPolygonF &polygon )
{
polygon += p1;
// to avoid deep stacks we convert the recursive algo
// to something iterative, where the parameters of the
// recursive calss are pushed to bezierStack instead
QStack<BezierData> bezierStack;
bezierStack.push( BezierData( p1, cp1, cp2, p2 ) );
while( true )
{
BezierData &bz = bezierStack.top();
if ( bz.flatness() < minFlatness )
{
if ( bezierStack.size() == 1 )
return;
polygon += bz.p2();
bezierStack.pop();
}
else
{
bezierStack.push( bz.subdivided() );
}
}
}
inline QPointF pointAt( const QPointF &p1,
const QPointF &cp1, const QPointF &cp2, const QPointF &p2, double t )
{
const double d1 = 3.0 * t;
const double d2 = 3.0 * t * t;
const double d3 = t * t * t;
const double s = 1.0 - t;
const double x = (( s * p1.x() + d1 * cp1.x() ) * s + d2 * cp2.x() ) * s + d3 * p2.x();
const double y = (( s * p1.y() + d1 * cp1.y() ) * s + d2 * cp2.y() ) * s + d3 * p2.y();
return QPointF( x, y );
}
}
namespace QwtSplineC1P
{
struct param
{
param( const QwtSplineParametrization *p ):
parameter( p )
{
}
inline double operator()( const QPointF &p1, const QPointF &p2 ) const
{
return parameter->valueIncrement( p1, p2 );
}
const QwtSplineParametrization *parameter;
};
struct paramY
{
inline double operator()( const QPointF &p1, const QPointF &p2 ) const
{
return QwtSplineParametrization::valueIncrementY( p1, p2 );
}
};
struct paramUniform
{
inline double operator()( const QPointF &p1, const QPointF &p2 ) const
{
return QwtSplineParametrization::valueIncrementUniform( p1, p2 );
}
};
struct paramCentripetal
{
inline double operator()( const QPointF &p1, const QPointF &p2 ) const
{
return QwtSplineParametrization::valueIncrementCentripetal( p1, p2 );
}
};
struct paramChordal
{
inline double operator()( const QPointF &p1, const QPointF &p2 ) const
{
return QwtSplineParametrization::valueIncrementChordal( p1, p2 );
}
};
struct paramManhattan
{
inline double operator()( const QPointF &p1, const QPointF &p2 ) const
{
return QwtSplineParametrization::valueIncrementManhattan( p1, p2 );
}
};
class PathStore
{
public:
inline void init( int size )
{
Q_UNUSED(size);
}
inline void start( double x1, double y1 )
{
path.moveTo( x1, y1 );
}
inline void addCubic( double cx1, double cy1,
double cx2, double cy2, double x2, double y2 )
{
path.cubicTo( cx1, cy1, cx2, cy2, x2, y2 );
}
inline void end()
{
path.closeSubpath();
}
QPainterPath path;
};
class ControlPointsStore
{
public:
inline ControlPointsStore():
d_cp( NULL )
{
}
inline void init( int size )
{
controlPoints.resize( size );
d_cp = controlPoints.data();
}
inline void start( double x1, double y1 )
{
Q_UNUSED( x1 );
Q_UNUSED( y1 );
}
inline void addCubic( double cx1, double cy1,
double cx2, double cy2, double x2, double y2 )
{
Q_UNUSED( x2 );
Q_UNUSED( y2 );
QLineF &l = *d_cp++;
l.setLine( cx1, cy1, cx2, cy2 );
}
inline void end()
{
}
QVector<QLineF> controlPoints;
private:
QLineF* d_cp;
};
double slopeBoundary( int boundaryCondition, double boundaryValue,
const QPointF &p1, const QPointF &p2, double slope1 )
{
const double dx = p2.x() - p1.x();
const double dy = p2.y() - p1.y();
double m = 0.0;
switch( boundaryCondition )
{
case QwtSpline::Clamped1:
{
m = boundaryValue;
break;
}
case QwtSpline::Clamped2:
{
const double c2 = 0.5 * boundaryValue;
const double c1 = slope1;
m = 0.5 * ( 3.0 * dy / dx - c1 - c2 * dx );
break;
}
case QwtSpline::Clamped3:
{
const double c3 = boundaryValue / 6.0;
m = c3 * dx * dx + 2 * dy / dx - slope1;
break;
}
case QwtSpline::LinearRunout:
{
const double s = dy / dx;
const double r = qBound( 0.0, boundaryValue, 1.0 );
m = s - r * ( s - slope1 );
break;
}
default:
{
m = dy / dx; // something
}
}
return m;
}
}
template< class SplineStore >
static inline SplineStore qwtSplineC1PathParamX(
const QwtSplineC1 *spline, const QPolygonF &points )
{
const int n = points.size();
const QVector<double> m = spline->slopes( points );
if ( m.size() != n )
return SplineStore();
const QPointF *pd = points.constData();
const double *md = m.constData();
SplineStore store;
store.init( m.size() - 1 );
store.start( pd[0].x(), pd[0].y() );
for ( int i = 0; i < n - 1; i++ )
{
const double dx3 = ( pd[i+1].x() - pd[i].x() ) / 3.0;
store.addCubic( pd[i].x() + dx3, pd[i].y() + md[i] * dx3,
pd[i+1].x() - dx3, pd[i+1].y() - md[i+1] * dx3,
pd[i+1].x(), pd[i+1].y() );
}
return store;
}
template< class SplineStore >
static inline SplineStore qwtSplineC1PathParamY(
const QwtSplineC1 *spline, const QPolygonF &points )
{
const int n = points.size();
QPolygonF pointsFlipped( n );
for ( int i = 0; i < n; i++ )
{
pointsFlipped[i].setX( points[i].y() );
pointsFlipped[i].setY( points[i].x() );
}
const QVector<double> m = spline->slopes( pointsFlipped );
if ( m.size() != n )
return SplineStore();
const QPointF *pd = pointsFlipped.constData();
const double *md = m.constData();
SplineStore store;
store.init( m.size() - 1 );
store.start( pd[0].y(), pd[0].x() );
QVector<QLineF> lines( n );
for ( int i = 0; i < n - 1; i++ )
{
const double dx3 = ( pd[i+1].x() - pd[i].x() ) / 3.0;
store.addCubic( pd[i].y() + md[i] * dx3, pd[i].x() + dx3,
pd[i+1].y() - md[i+1] * dx3, pd[i+1].x() - dx3,
pd[i+1].y(), pd[i+1].x() );
}
return store;
}
template< class SplineStore, class Param >
static inline SplineStore qwtSplineC1PathParametric(
const QwtSplineC1 *spline, const QPolygonF &points, Param param )
{
const bool isClosing = ( spline->boundaryType() == QwtSplineApproximation::ClosedPolygon );
const int n = points.size();
QPolygonF pointsX, pointsY;
pointsX.resize( isClosing ? n + 1 : n );
pointsY.resize( isClosing ? n + 1 : n );
QPointF *px = pointsX.data();
QPointF *py = pointsY.data();
const QPointF *p = points.constData();
double t = 0.0;
px[0].rx() = py[0].rx() = t;
px[0].ry() = p[0].x();
py[0].ry() = p[0].y();
int numParamPoints = 1;
for ( int i = 1; i < n; i++ )
{
const double td = param( points[i-1], points[i] );
if ( td > 0.0 )
{
t += td;
px[numParamPoints].rx() = py[numParamPoints].rx() = t;
px[numParamPoints].ry() = p[i].x();
py[numParamPoints].ry() = p[i].y();
numParamPoints++;
}
}
if ( isClosing )
{
const double td = param( points[n-1], points[0] );
if ( td > 0.0 )
{
t += td;
px[numParamPoints].rx() = py[numParamPoints].rx() = t;
px[numParamPoints].ry() = p[0].x();
py[numParamPoints].ry() = p[0].y();
numParamPoints++;
}
}
if ( pointsX.size() != numParamPoints )
{
pointsX.resize( numParamPoints );
pointsY.resize( numParamPoints );
}
const QVector<double> slopesX = spline->slopes( pointsX );
const QVector<double> slopesY = spline->slopes( pointsY );
const double *mx = slopesX.constData();
const double *my = slopesY.constData();
// we don't need it anymore
pointsX.clear();
pointsY.clear();
SplineStore store;
store.init( isClosing ? n : n - 1 );
store.start( points[0].x(), points[0].y() );
int j = 0;
for ( int i = 0; i < n - 1; i++ )
{
const QPointF &p1 = p[i];
const QPointF &p2 = p[i+1];
const double td = param( p1, p2 );
if ( td != 0.0 )
{
const double t3 = td / 3.0;
const double cx1 = p1.x() + mx[j] * t3;
const double cy1 = p1.y() + my[j] * t3;
const double cx2 = p2.x() - mx[j+1] * t3;
const double cy2 = p2.y() - my[j+1] * t3;
store.addCubic( cx1, cy1, cx2, cy2, p2.x(), p2.y() );
j++;
}
else
{
// setting control points to the ends
store.addCubic( p1.x(), p1.y(), p2.x(), p2.y(), p2.x(), p2.y() );
}
}
if ( isClosing )
{
const QPointF &p1 = p[n-1];
const QPointF &p2 = p[0];
const double td = param( p1, p2 );
if ( td != 0.0 )
{
const double t3 = td / 3.0;
const double cx1 = p1.x() + mx[j] * t3;
const double cy1 = p1.y() + my[j] * t3;
const double cx2 = p2.x() - mx[0] * t3;
const double cy2 = p2.y() - my[0] * t3;
store.addCubic( cx1, cy1, cx2, cy2, p2.x(), p2.y() );
}
else
{
store.addCubic( p1.x(), p1.y(), p2.x(), p2.y(), p2.x(), p2.y() );
}
store.end();
}
return store;
}
template< QwtSplinePolynomial toPolynomial( const QPointF &, double, const QPointF &, double ) >
static QPolygonF qwtPolygonParametric( double distance,
const QPolygonF &points, const QVector<double> values, bool withNodes )
{
QPolygonF fittedPoints;
const QPointF *p = points.constData();
const double *v = values.constData();
fittedPoints += p[0];
double t = distance;
const int n = points.size();
for ( int i = 0; i < n - 1; i++ )
{
const QPointF &p1 = p[i];
const QPointF &p2 = p[i+1];
const QwtSplinePolynomial polynomial = toPolynomial( p1, v[i], p2, v[i+1] );
const double l = p2.x() - p1.x();
while ( t < l )
{
fittedPoints += QPointF( p1.x() + t, p1.y() + polynomial.valueAt( t ) );
t += distance;
}
if ( withNodes )
{
if ( qFuzzyCompare( fittedPoints.last().x(), p2.x() ) )
fittedPoints.last() = p2;
else
fittedPoints += p2;
}
else
{
t -= l;
}
}
return fittedPoints;
}
class QwtSpline::PrivateData
{
public:
PrivateData()
{
// parabolic runout at both ends
boundaryConditions[0].type = QwtSpline::Clamped3;
boundaryConditions[0].value = 0.0;
boundaryConditions[1].type = QwtSpline::Clamped3;
boundaryConditions[1].value = 0.0;
}
struct
{
int type;
double value;
} boundaryConditions[2];
};
/*!
\brief Constructor
The default setting is a non closing spline with chordal parametrization
\sa setParametrization(), setClosing()
*/
QwtSpline::QwtSpline()
{
d_data = new PrivateData;
}
//! Destructor
QwtSpline::~QwtSpline()
{
delete d_data;
}
void QwtSpline::setBoundaryCondition( BoundaryPosition position, int condition )
{
if ( ( position == QwtSpline::AtBeginning ) || ( position == QwtSpline::AtEnd ) )
d_data->boundaryConditions[position].type = condition;
}
int QwtSpline::boundaryCondition( BoundaryPosition position ) const
{
if ( ( position == QwtSpline::AtBeginning ) || ( position == QwtSpline::AtEnd ) )
return d_data->boundaryConditions[position].type;
return d_data->boundaryConditions[0].type; // should never happen
}
void QwtSpline::setBoundaryValue( BoundaryPosition position, double value )
{
if ( ( position == QwtSpline::AtBeginning ) || ( position == QwtSpline::AtEnd ) )
d_data->boundaryConditions[position].value = value;
}
double QwtSpline::boundaryValue( BoundaryPosition position ) const
{
if ( ( position == QwtSpline::AtBeginning ) || ( position == QwtSpline::AtEnd ) )
return d_data->boundaryConditions[position].value;
return d_data->boundaryConditions[0].value; // should never happen
}
void QwtSpline::setBoundaryConditions(
int condition, double valueBegin, double valueEnd )
{
setBoundaryCondition( QwtSpline::AtBeginning, condition );
setBoundaryValue( QwtSpline::AtBeginning, valueBegin );
setBoundaryCondition( QwtSpline::AtEnd, condition );
setBoundaryValue( QwtSpline::AtEnd, valueEnd );
}
/*! \fn QVector<QLineF> bezierControlLines( const QPolygonF &points ) const
\brief Interpolate a curve with Bezier curves
Interpolates a polygon piecewise with cubic Bezier curves
and returns the 2 control points of each curve as QLineF.
\param points Control points
\return Control points of the interpolating Bezier curves
*/
/*!
\brief Interpolate a curve with Bezier curves
Interpolates a polygon piecewise with cubic Bezier curves
and returns them as QPainterPath.
The implementation calculates the Bezier control lines first
and converts them into painter path elements in an additional loop.
\param points Control points
\return Painter path, that can be rendered by QPainter
\note Derived spline classes might overload painterPath() to avoid
the extra loops for converting results into a QPainterPath
\sa bezierControlLines()
*/
QPainterPath QwtSpline::painterPath( const QPolygonF &points ) const
{
const int n = points.size();
QPainterPath path;
if ( n == 0 )
return path;
if ( n == 1 )
{
path.moveTo( points[0] );
return path;
}
if ( n == 2 )
{
path.addPolygon( points );
return path;
}
const QVector<QLineF> controlLines = bezierControlLines( points );
if ( controlLines.size() < n - 1 )
return path;
const QPointF *p = points.constData();
const QLineF *l = controlLines.constData();
path.moveTo( p[0] );
for ( int i = 0; i < n - 1; i++ )
path.cubicTo( l[i].p1(), l[i].p2(), p[i+1] );
if ( ( boundaryType() == QwtSplineApproximation::ClosedPolygon )
&& ( controlLines.size() >= n ) )
{
path.cubicTo( l[n-1].p1(), l[n-1].p2(), p[0] );
path.closeSubpath();
}
return path;
}
QPolygonF QwtSpline::polygon( const QPolygonF &points, double tolerance )
{
if ( tolerance <= 0.0 )
return QPolygonF();
const QVector<QLineF> controlLines = bezierControlLines( points );
if ( controlLines.isEmpty() )
return QPolygonF();
const bool isClosed = boundaryType() == QwtSplineApproximation::ClosedPolygon;
// we can make checking the tolerance criterion check in the subdivison loop
// cheaper, by translating it into some flatness value.
const double minFlatness = QwtSplineBezier::minFlatness( tolerance );
const QPointF *p = points.constData();
const QLineF *cl = controlLines.constData();
const int n = controlLines.size();
QPolygonF path;
for ( int i = 0; i < n - 1; i++ )
{
const QLineF &l = cl[i];
QwtSplineBezier::toPolygon( minFlatness,
p[i], l.p1(), l.p2(), p[i+1], path );
}
const QPointF &pn = isClosed ? p[0] : p[n];
const QLineF &l = cl[n-1];
QwtSplineBezier::toPolygon( minFlatness,
p[n-1], l.p1(), l.p2(), pn, path );
path += pn;
return path;
}
/*!
\brief Find an interpolated polygon with "equidistant" points
When withNodes is disabled all points of the resulting polygon
will be equidistant according to the parametrization.
When withNodes is enabled the resulting polygon will also include
the control points and the interpolated points are always aligned to
the control point before ( points[i] + i * distance ).
The implementation calculates bezier curves first and calculates
the interpolated points in a second run.
\param points Control nodes of the spline
\param distance Distance between 2 points according
to the parametrization
\param withNodes When true, also add the control
nodes ( even if not being equidistant )
\sa bezierControlLines()
*/
QPolygonF QwtSpline::equidistantPolygon( const QPolygonF &points,
double distance, bool withNodes ) const
{
if ( distance <= 0.0 )
return QPolygonF();
const int n = points.size();
if ( n <= 1 )
return points;
if ( n == 2 )
{
// TODO
return points;
}
QPolygonF path;
const QVector<QLineF> controlLines = bezierControlLines( points );
if ( controlLines.size() < n - 1 )
return path;
path += points.first();
double t = distance;
const QPointF *p = points.constData();
const QLineF *cl = controlLines.constData();
const QwtSplineParametrization *param = parametrization();
for ( int i = 0; i < n - 1; i++ )
{
const double l = param->valueIncrement( p[i], p[i+1] );
while ( t < l )
{
path += QwtSplineBezier::pointAt( p[i], cl[i].p1(),
cl[i].p2(), p[i+1], t / l );
t += distance;
}
if ( withNodes )
{
if ( qFuzzyCompare( path.last().x(), p[i+1].x() ) )
path.last() = p[i+1];
else
path += p[i+1];
t = distance;
}
else
{
t -= l;
}
}
if ( ( boundaryType() == QwtSplineApproximation::ClosedPolygon )
&& ( controlLines.size() >= n ) )
{
const double l = param->valueIncrement( p[n-1], p[0] );
while ( t < l )
{
path += QwtSplineBezier::pointAt( p[n-1], cl[n-1].p1(),
cl[n-1].p2(), p[0], t / l );
t += distance;
}
if ( qFuzzyCompare( path.last().x(), p[0].x() ) )
path.last() = p[0];
else
path += p[0];
}
return path;
}
//! Constructor
QwtSplineG1::QwtSplineG1()
{
}
//! Destructor
QwtSplineG1::~QwtSplineG1()
{
}
QwtSplineC1::QwtSplineC1()
{
setParametrization( QwtSplineParametrization::ParameterX );
}
//! Destructor
QwtSplineC1::~QwtSplineC1()
{
}
double QwtSplineC1::slopeAtBeginning( const QPolygonF &points, double slopeNext ) const
{
if ( points.size() < 2 )
return 0.0;
return QwtSplineC1P::slopeBoundary(
boundaryCondition( QwtSpline::AtBeginning ),
boundaryValue( QwtSpline::AtBeginning ),
points[0], points[1], slopeNext );
}
double QwtSplineC1::slopeAtEnd( const QPolygonF &points, double slopeBefore ) const
{
const int n = points.size();
const QPointF p1( points[n-1].x(), -points[n-1].y() );
const QPointF p2( points[n-2].x(), -points[n-2].y() );
const int condition = boundaryCondition( QwtSpline::AtEnd );
double value = boundaryValue( QwtSpline::AtEnd );
if ( condition != QwtSpline::LinearRunout )
{
// beside LinearRunout the boundaryValue is a slope or curvature
// and needs to be inverted too
value = -value;
}
const double slope = QwtSplineC1P::slopeBoundary( condition, value, p1, p2, -slopeBefore );
return -slope;
}
/*!
\brief Calculate an interpolated painter path
Interpolates a polygon piecewise into cubic Bezier curves
and returns them as QPainterPath.
The implementation calculates the slopes at the control points
and converts them into painter path elements in an additional loop.
\param points Control points
\return QPainterPath Painter path, that can be rendered by QPainter
\note Derived spline classes might overload painterPath() to avoid
the extra loops for converting results into a QPainterPath
\sa slopesParametric()
*/
QPainterPath QwtSplineC1::painterPath( const QPolygonF &points ) const
{
const int n = points.size();
if ( n <= 2 )
return QwtSpline::painterPath( points );
using namespace QwtSplineC1P;
PathStore store;
switch( parametrization()->type() )
{
case QwtSplineParametrization::ParameterX:
{
store = qwtSplineC1PathParamX<PathStore>( this, points );
break;
}
case QwtSplineParametrization::ParameterY:
{
store = qwtSplineC1PathParamY<PathStore>( this, points );
break;
}
case QwtSplineParametrization::ParameterUniform:
{
store = qwtSplineC1PathParametric<PathStore>(
this, points, paramUniform() );
break;
}
case QwtSplineParametrization::ParameterCentripetal:
{
store = qwtSplineC1PathParametric<PathStore>(
this, points, paramCentripetal() );
break;
}
case QwtSplineParametrization::ParameterChordal:
{
store = qwtSplineC1PathParametric<PathStore>(
this, points, paramChordal() );
break;
}
default:
{
store = qwtSplineC1PathParametric<PathStore>(
this, points, param( parametrization() ) );
}
}
return store.path;
}
/*!
\brief Interpolate a curve with Bezier curves
Interpolates a polygon piecewise with cubic Bezier curves
and returns the 2 control points of each curve as QLineF.
\param points Control points
\return Control points of the interpolating Bezier curves
*/
QVector<QLineF> QwtSplineC1::bezierControlLines( const QPolygonF &points ) const
{
using namespace QwtSplineC1P;
const int n = points.size();
if ( n <= 2 )
return QVector<QLineF>();
ControlPointsStore store;
switch( parametrization()->type() )
{
case QwtSplineParametrization::ParameterX:
{
store = qwtSplineC1PathParamX<ControlPointsStore>( this, points );
break;
}
case QwtSplineParametrization::ParameterY:
{
store = qwtSplineC1PathParamY<ControlPointsStore>( this, points );
break;
}
case QwtSplineParametrization::ParameterUniform:
{
store = qwtSplineC1PathParametric<ControlPointsStore>(
this, points, paramUniform() );
break;
}
case QwtSplineParametrization::ParameterCentripetal:
{
store = qwtSplineC1PathParametric<ControlPointsStore>(
this, points, paramCentripetal() );
break;
}
case QwtSplineParametrization::ParameterChordal:
{
store = qwtSplineC1PathParametric<ControlPointsStore>(
this, points, paramChordal() );
break;
}
default:
{
store = qwtSplineC1PathParametric<ControlPointsStore>(
this, points, param( parametrization() ) );
}
}
return store.controlPoints;
}
QPolygonF QwtSplineC1::equidistantPolygon( const QPolygonF &points,
double distance, bool withNodes ) const
{
if ( parametrization()->type() == QwtSplineParametrization::ParameterX )
{
if ( points.size() > 2 )
{
const QVector<double> m = slopes( points );
if ( m.size() != points.size() )
return QPolygonF();
return qwtPolygonParametric<QwtSplinePolynomial::fromSlopes>(
distance, points, m, withNodes );
}
}
return QwtSplineG1::equidistantPolygon( points, distance, withNodes );
}
QVector<QwtSplinePolynomial> QwtSplineC1::polynomials(
const QPolygonF &points ) const
{
QVector<QwtSplinePolynomial> polynomials;
const QVector<double> m = slopes( points );
if ( m.size() < 2 )
return polynomials;
for ( int i = 1; i < m.size(); i++ )
{
polynomials += QwtSplinePolynomial::fromSlopes(
points[i-1], m[i-1], points[i], m[i] );
}
return polynomials;
}
QwtSplineC2::QwtSplineC2()
{
}
//! Destructor
QwtSplineC2::~QwtSplineC2()
{
}
/*!
\brief Interpolate a curve with Bezier curves
Interpolates a polygon piecewise with cubic Bezier curves
and returns them as QPainterPath.
\param points Control points
\return Painter path, that can be rendered by QPainter
*/
QPainterPath QwtSplineC2::painterPath( const QPolygonF &points ) const
{
// could be implemented from curvaturesX without the extra
// loop for calculating the slopes vector. TODO ...
return QwtSplineC1::painterPath( points );
}
/*!
\brief Interpolate a curve with Bezier curves
Interpolates a polygon piecewise with cubic Bezier curves
and returns the 2 control points of each curve as QLineF.
\param points Control points
\return Control points of the interpolating Bezier curves
*/
QVector<QLineF> QwtSplineC2::bezierControlLines( const QPolygonF &points ) const
{
// could be implemented from curvaturesX without the extra
// loop for calculating the slopes vector. TODO ...
return QwtSplineC1::bezierControlLines( points );
}
QPolygonF QwtSplineC2::equidistantPolygon( const QPolygonF &points,
double distance, bool withNodes ) const
{
if ( parametrization()->type() == QwtSplineParametrization::ParameterX )
{
if ( points.size() > 2 )
{
const QVector<double> cv = curvatures( points );
if ( cv.size() != points.size() )
return QPolygonF();
return qwtPolygonParametric<QwtSplinePolynomial::fromCurvatures>(
distance, points, cv, withNodes );
}
}
return QwtSplineC1::equidistantPolygon( points, distance, withNodes );
}
QVector<double> QwtSplineC2::slopes( const QPolygonF &points ) const
{
const QVector<double> curvatures = this->curvatures( points );
if ( curvatures.size() < 2 )
return QVector<double>();
QVector<double> slopes( curvatures.size() );
const double *cv = curvatures.constData();
double *m = slopes.data();
const int n = points.size();
const QPointF *p = points.constData();
QwtSplinePolynomial polynomial;
for ( int i = 0; i < n - 1; i++ )
{
polynomial = QwtSplinePolynomial::fromCurvatures( p[i], cv[i], p[i+1], cv[i+1] );
m[i] = polynomial.c1;
}
m[n-1] = polynomial.slopeAt( p[n-1].x() - p[n-2].x() );
return slopes;
}
QVector<QwtSplinePolynomial> QwtSplineC2::polynomials( const QPolygonF &points ) const
{
QVector<QwtSplinePolynomial> polynomials;
const QVector<double> curvatures = this->curvatures( points );
if ( curvatures.size() < 2 )
return polynomials;
const QPointF *p = points.constData();
const double *cv = curvatures.constData();
const int n = curvatures.size();
for ( int i = 1; i < n; i++ )
{
polynomials += QwtSplinePolynomial::fromCurvatures(
p[i-1], cv[i-1], p[i], cv[i] );
}
return polynomials;
}
| Java |
/**
* Encodes and decodes to and from Base64 notation.
*
* <p>
* Change Log:
* </p>
* <ul>
* <li>v2.1 - Cleaned up javadoc comments and unused variables and methods. Added
* some convenience methods for reading and writing to and from files.</li>
* <li>v2.0.2 - Now specifies UTF-8 encoding in places where the code fails on systems
* with other encodings (like EBCDIC).</li>
* <li>v2.0.1 - Fixed an error when decoding a single byte, that is, when the
* encoded data was a single byte.</li>
* <li>v2.0 - I got rid of methods that used booleans to set options.
* Now everything is more consolidated and cleaner. The code now detects
* when data that's being decoded is gzip-compressed and will decompress it
* automatically. Generally things are cleaner. You'll probably have to
* change some method calls that you were making to support the new
* options format (<tt>int</tt>s that you "OR" together).</li>
* <li>v1.5.1 - Fixed bug when decompressing and decoding to a
* byte[] using <tt>decode( String s, boolean gzipCompressed )</tt>.
* Added the ability to "suspend" encoding in the Output Stream so
* you can turn on and off the encoding if you need to embed base64
* data in an otherwise "normal" stream (like an XML file).</li>
* <li>v1.5 - Output stream pases on flush() command but doesn't do anything itself.
* This helps when using GZIP streams.
* Added the ability to GZip-compress objects before encoding them.</li>
* <li>v1.4 - Added helper methods to read/write files.</li>
* <li>v1.3.6 - Fixed OutputStream.flush() so that 'position' is reset.</li>
* <li>v1.3.5 - Added flag to turn on and off line breaks. Fixed bug in input stream
* where last buffer being read, if not completely full, was not returned.</li>
* <li>v1.3.4 - Fixed when "improperly padded stream" error was thrown at the wrong time.</li>
* <li>v1.3.3 - Fixed I/O streams which were totally messed up.</li>
* </ul>
*
* <p>
* I am placing this code in the Public Domain. Do with it as you will.
* This software comes with no guarantees or warranties but with
* plenty of well-wishing instead!
* Please visit <a href="http://iharder.net/base64">http://iharder.net/base64</a>
* periodically to check for updates or to contribute improvements.
* </p>
*
* @author Robert Harder
* @author [email protected]
* @version 2.1
*/
public class Base64
{
/* ******** P U B L I C F I E L D S ******** */
/** No options specified. Value is zero. */
public final static int NO_OPTIONS = 0;
/** Specify encoding. */
public final static int ENCODE = 1;
/** Specify decoding. */
public final static int DECODE = 0;
/** Specify that data should be gzip-compressed. */
public final static int GZIP = 2;
/** Don't break lines when encoding (violates strict Base64 specification) */
public final static int DONT_BREAK_LINES = 8;
/* ******** P R I V A T E F I E L D S ******** */
/** Maximum line length (76) of Base64 output. */
private final static int MAX_LINE_LENGTH = 76;
/** The equals sign (=) as a byte. */
private final static byte EQUALS_SIGN = (byte)'=';
/** The new line character (\n) as a byte. */
private final static byte NEW_LINE = (byte)'\n';
/** Preferred encoding. */
private final static String PREFERRED_ENCODING = "UTF-8";
/** The 64 valid Base64 values. */
private final static byte[] ALPHABET;
private final static byte[] _NATIVE_ALPHABET = /* May be something funny like EBCDIC */
{
(byte)'A', (byte)'B', (byte)'C', (byte)'D', (byte)'E', (byte)'F', (byte)'G',
(byte)'H', (byte)'I', (byte)'J', (byte)'K', (byte)'L', (byte)'M', (byte)'N',
(byte)'O', (byte)'P', (byte)'Q', (byte)'R', (byte)'S', (byte)'T', (byte)'U',
(byte)'V', (byte)'W', (byte)'X', (byte)'Y', (byte)'Z',
(byte)'a', (byte)'b', (byte)'c', (byte)'d', (byte)'e', (byte)'f', (byte)'g',
(byte)'h', (byte)'i', (byte)'j', (byte)'k', (byte)'l', (byte)'m', (byte)'n',
(byte)'o', (byte)'p', (byte)'q', (byte)'r', (byte)'s', (byte)'t', (byte)'u',
(byte)'v', (byte)'w', (byte)'x', (byte)'y', (byte)'z',
(byte)'0', (byte)'1', (byte)'2', (byte)'3', (byte)'4', (byte)'5',
(byte)'6', (byte)'7', (byte)'8', (byte)'9', (byte)'+', (byte)'/'
};
/** Determine which ALPHABET to use. */
static
{
byte[] __bytes;
try
{
__bytes = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/".getBytes( PREFERRED_ENCODING );
} // end try
catch (java.io.UnsupportedEncodingException use)
{
__bytes = _NATIVE_ALPHABET; // Fall back to native encoding
} // end catch
ALPHABET = __bytes;
} // end static
/**
* Translates a Base64 value to either its 6-bit reconstruction value
* or a negative number indicating some other meaning.
**/
private final static byte[] DECODABET =
{
-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 0 - 8
-5,-5, // Whitespace: Tab and Linefeed
-9,-9, // Decimal 11 - 12
-5, // Whitespace: Carriage Return
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 14 - 26
-9,-9,-9,-9,-9, // Decimal 27 - 31
-5, // Whitespace: Space
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 33 - 42
62, // Plus sign at decimal 43
-9,-9,-9, // Decimal 44 - 46
63, // Slash at decimal 47
52,53,54,55,56,57,58,59,60,61, // Numbers zero through nine
-9,-9,-9, // Decimal 58 - 60
-1, // Equals sign at decimal 61
-9,-9,-9, // Decimal 62 - 64
0,1,2,3,4,5,6,7,8,9,10,11,12,13, // Letters 'A' through 'N'
14,15,16,17,18,19,20,21,22,23,24,25, // Letters 'O' through 'Z'
-9,-9,-9,-9,-9,-9, // Decimal 91 - 96
26,27,28,29,30,31,32,33,34,35,36,37,38, // Letters 'a' through 'm'
39,40,41,42,43,44,45,46,47,48,49,50,51, // Letters 'n' through 'z'
-9,-9,-9,-9 // Decimal 123 - 126
/*,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 127 - 139
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 140 - 152
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 153 - 165
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 166 - 178
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 179 - 191
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 192 - 204
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 205 - 217
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 218 - 230
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9, // Decimal 231 - 243
-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9,-9 // Decimal 244 - 255 */
};
// I think I end up not using the BAD_ENCODING indicator.
//private final static byte BAD_ENCODING = -9; // Indicates error in encoding
private final static byte WHITE_SPACE_ENC = -5; // Indicates white space in encoding
private final static byte EQUALS_SIGN_ENC = -1; // Indicates equals sign in encoding
/** Defeats instantiation. */
private Base64(){}
/* ******** E N C O D I N G M E T H O D S ******** */
/**
* Encodes up to the first three bytes of array <var>threeBytes</var>
* and returns a four-byte array in Base64 notation.
* The actual number of significant bytes in your array is
* given by <var>numSigBytes</var>.
* The array <var>threeBytes</var> needs only be as big as
* <var>numSigBytes</var>.
* Code can reuse a byte array by passing a four-byte array as <var>b4</var>.
*
* @param b4 A reusable byte array to reduce array instantiation
* @param threeBytes the array to convert
* @param numSigBytes the number of significant bytes in your array
* @return four byte array in Base64 notation.
* @since 1.5.1
*/
private static byte[] encode3to4( byte[] b4, byte[] threeBytes, int numSigBytes )
{
encode3to4( threeBytes, 0, numSigBytes, b4, 0 );
return b4;
} // end encode3to4
/**
* Encodes up to three bytes of the array <var>source</var>
* and writes the resulting four Base64 bytes to <var>destination</var>.
* The source and destination arrays can be manipulated
* anywhere along their length by specifying
* <var>srcOffset</var> and <var>destOffset</var>.
* This method does not check to make sure your arrays
* are large enough to accomodate <var>srcOffset</var> + 3 for
* the <var>source</var> array or <var>destOffset</var> + 4 for
* the <var>destination</var> array.
* The actual number of significant bytes in your array is
* given by <var>numSigBytes</var>.
*
* @param source the array to convert
* @param srcOffset the index where conversion begins
* @param numSigBytes the number of significant bytes in your array
* @param destination the array to hold the conversion
* @param destOffset the index where output will be put
* @return the <var>destination</var> array
* @since 1.3
*/
private static byte[] encode3to4(
byte[] source, int srcOffset, int numSigBytes,
byte[] destination, int destOffset )
{
// 1 2 3
// 01234567890123456789012345678901 Bit position
// --------000000001111111122222222 Array position from threeBytes
// --------| || || || | Six bit groups to index ALPHABET
// >>18 >>12 >> 6 >> 0 Right shift necessary
// 0x3f 0x3f 0x3f Additional AND
// Create buffer with zero-padding if there are only one or two
// significant bytes passed in the array.
// We have to shift left 24 in order to flush out the 1's that appear
// when Java treats a value as negative that is cast from a byte to an int.
int inBuff = ( numSigBytes > 0 ? ((source[ srcOffset ] << 24) >>> 8) : 0 )
| ( numSigBytes > 1 ? ((source[ srcOffset + 1 ] << 24) >>> 16) : 0 )
| ( numSigBytes > 2 ? ((source[ srcOffset + 2 ] << 24) >>> 24) : 0 );
switch( numSigBytes )
{
case 3:
destination[ destOffset ] = ALPHABET[ (inBuff >>> 18) ];
destination[ destOffset + 1 ] = ALPHABET[ (inBuff >>> 12) & 0x3f ];
destination[ destOffset + 2 ] = ALPHABET[ (inBuff >>> 6) & 0x3f ];
destination[ destOffset + 3 ] = ALPHABET[ (inBuff ) & 0x3f ];
return destination;
case 2:
destination[ destOffset ] = ALPHABET[ (inBuff >>> 18) ];
destination[ destOffset + 1 ] = ALPHABET[ (inBuff >>> 12) & 0x3f ];
destination[ destOffset + 2 ] = ALPHABET[ (inBuff >>> 6) & 0x3f ];
destination[ destOffset + 3 ] = EQUALS_SIGN;
return destination;
case 1:
destination[ destOffset ] = ALPHABET[ (inBuff >>> 18) ];
destination[ destOffset + 1 ] = ALPHABET[ (inBuff >>> 12) & 0x3f ];
destination[ destOffset + 2 ] = EQUALS_SIGN;
destination[ destOffset + 3 ] = EQUALS_SIGN;
return destination;
default:
return destination;
} // end switch
} // end encode3to4
/**
* Serializes an object and returns the Base64-encoded
* version of that serialized object. If the object
* cannot be serialized or there is another error,
* the method will return <tt>null</tt>.
* The object is not GZip-compressed before being encoded.
*
* @param serializableObject The object to encode
* @return The Base64-encoded object
* @since 1.4
*/
public static String encodeObject( java.io.Serializable serializableObject )
{
return encodeObject( serializableObject, NO_OPTIONS );
} // end encodeObject
/**
* Serializes an object and returns the Base64-encoded
* version of that serialized object. If the object
* cannot be serialized or there is another error,
* the method will return <tt>null</tt>.
* <p>
* Valid options:<pre>
* GZIP: gzip-compresses object before encoding it.
* DONT_BREAK_LINES: don't break lines at 76 characters
* <i>Note: Technically, this makes your encoding non-compliant.</i>
* </pre>
* <p>
* Example: <code>encodeObject( myObj, Base64.GZIP )</code> or
* <p>
* Example: <code>encodeObject( myObj, Base64.GZIP | Base64.DONT_BREAK_LINES )</code>
*
* @param serializableObject The object to encode
* @param options Specified options
* @return The Base64-encoded object
* @see Base64#GZIP
* @see Base64#DONT_BREAK_LINES
* @since 2.0
*/
public static String encodeObject( java.io.Serializable serializableObject, int options )
{
// Streams
java.io.ByteArrayOutputStream baos = null;
java.io.OutputStream b64os = null;
java.io.ObjectOutputStream oos = null;
java.util.zip.GZIPOutputStream gzos = null;
// Isolate options
int gzip = (options & GZIP);
int dontBreakLines = (options & DONT_BREAK_LINES);
try
{
// ObjectOutputStream -> (GZIP) -> Base64 -> ByteArrayOutputStream
baos = new java.io.ByteArrayOutputStream();
b64os = new Base64.OutputStream( baos, ENCODE | dontBreakLines );
// GZip?
if( gzip == GZIP )
{
gzos = new java.util.zip.GZIPOutputStream( b64os );
oos = new java.io.ObjectOutputStream( gzos );
} // end if: gzip
else
oos = new java.io.ObjectOutputStream( b64os );
oos.writeObject( serializableObject );
} // end try
catch( java.io.IOException e )
{
e.printStackTrace();
return null;
} // end catch
finally
{
try{ oos.close(); } catch( Exception e ){}
try{ gzos.close(); } catch( Exception e ){}
try{ b64os.close(); } catch( Exception e ){}
try{ baos.close(); } catch( Exception e ){}
} // end finally
// Return value according to relevant encoding.
try
{
return new String( baos.toByteArray(), PREFERRED_ENCODING );
} // end try
catch (java.io.UnsupportedEncodingException uue)
{
return new String( baos.toByteArray() );
} // end catch
} // end encode
/**
* Encodes a byte array into Base64 notation.
* Does not GZip-compress data.
*
* @param source The data to convert
* @since 1.4
*/
public static String encodeBytes( byte[] source )
{
return encodeBytes( source, 0, source.length, NO_OPTIONS );
} // end encodeBytes
/**
* Encodes a byte array into Base64 notation.
* <p>
* Valid options:<pre>
* GZIP: gzip-compresses object before encoding it.
* DONT_BREAK_LINES: don't break lines at 76 characters
* <i>Note: Technically, this makes your encoding non-compliant.</i>
* </pre>
* <p>
* Example: <code>encodeBytes( myData, Base64.GZIP )</code> or
* <p>
* Example: <code>encodeBytes( myData, Base64.GZIP | Base64.DONT_BREAK_LINES )</code>
*
*
* @param source The data to convert
* @param options Specified options
* @see Base64#GZIP
* @see Base64#DONT_BREAK_LINES
* @since 2.0
*/
public static String encodeBytes( byte[] source, int options )
{
return encodeBytes( source, 0, source.length, options );
} // end encodeBytes
/**
* Encodes a byte array into Base64 notation.
* Does not GZip-compress data.
*
* @param source The data to convert
* @param off Offset in array where conversion should begin
* @param len Length of data to convert
* @since 1.4
*/
public static String encodeBytes( byte[] source, int off, int len )
{
return encodeBytes( source, off, len, NO_OPTIONS );
} // end encodeBytes
/**
* Encodes a byte array into Base64 notation.
* <p>
* Valid options:<pre>
* GZIP: gzip-compresses object before encoding it.
* DONT_BREAK_LINES: don't break lines at 76 characters
* <i>Note: Technically, this makes your encoding non-compliant.</i>
* </pre>
* <p>
* Example: <code>encodeBytes( myData, Base64.GZIP )</code> or
* <p>
* Example: <code>encodeBytes( myData, Base64.GZIP | Base64.DONT_BREAK_LINES )</code>
*
*
* @param source The data to convert
* @param off Offset in array where conversion should begin
* @param len Length of data to convert
* @param options Specified options
* @see Base64#GZIP
* @see Base64#DONT_BREAK_LINES
* @since 2.0
*/
public static String encodeBytes( byte[] source, int off, int len, int options )
{
// Isolate options
int dontBreakLines = ( options & DONT_BREAK_LINES );
int gzip = ( options & GZIP );
// Compress?
if( gzip == GZIP )
{
java.io.ByteArrayOutputStream baos = null;
java.util.zip.GZIPOutputStream gzos = null;
Base64.OutputStream b64os = null;
try
{
// GZip -> Base64 -> ByteArray
baos = new java.io.ByteArrayOutputStream();
b64os = new Base64.OutputStream( baos, ENCODE | dontBreakLines );
gzos = new java.util.zip.GZIPOutputStream( b64os );
gzos.write( source, off, len );
gzos.close();
} // end try
catch( java.io.IOException e )
{
e.printStackTrace();
return null;
} // end catch
finally
{
try{ gzos.close(); } catch( Exception e ){}
try{ b64os.close(); } catch( Exception e ){}
try{ baos.close(); } catch( Exception e ){}
} // end finally
// Return value according to relevant encoding.
try
{
return new String( baos.toByteArray(), PREFERRED_ENCODING );
} // end try
catch (java.io.UnsupportedEncodingException uue)
{
return new String( baos.toByteArray() );
} // end catch
} // end if: compress
// Else, don't compress. Better not to use streams at all then.
else
{
// Convert option to boolean in way that code likes it.
boolean breakLines = dontBreakLines == 0;
int len43 = len * 4 / 3;
byte[] outBuff = new byte[ ( len43 ) // Main 4:3
+ ( (len % 3) > 0 ? 4 : 0 ) // Account for padding
+ (breakLines ? ( len43 / MAX_LINE_LENGTH ) : 0) ]; // New lines
int d = 0;
int e = 0;
int len2 = len - 2;
int lineLength = 0;
for( ; d < len2; d+=3, e+=4 )
{
encode3to4( source, d+off, 3, outBuff, e );
lineLength += 4;
if( breakLines && lineLength == MAX_LINE_LENGTH )
{
outBuff[e+4] = NEW_LINE;
e++;
lineLength = 0;
} // end if: end of line
} // en dfor: each piece of array
if( d < len )
{
encode3to4( source, d+off, len - d, outBuff, e );
e += 4;
} // end if: some padding needed
// Return value according to relevant encoding.
try
{
return new String( outBuff, 0, e, PREFERRED_ENCODING );
} // end try
catch (java.io.UnsupportedEncodingException uue)
{
return new String( outBuff, 0, e );
} // end catch
} // end else: don't compress
} // end encodeBytes
/* ******** D E C O D I N G M E T H O D S ******** */
/**
* Decodes four bytes from array <var>source</var>
* and writes the resulting bytes (up to three of them)
* to <var>destination</var>.
* The source and destination arrays can be manipulated
* anywhere along their length by specifying
* <var>srcOffset</var> and <var>destOffset</var>.
* This method does not check to make sure your arrays
* are large enough to accomodate <var>srcOffset</var> + 4 for
* the <var>source</var> array or <var>destOffset</var> + 3 for
* the <var>destination</var> array.
* This method returns the actual number of bytes that
* were converted from the Base64 encoding.
*
*
* @param source the array to convert
* @param srcOffset the index where conversion begins
* @param destination the array to hold the conversion
* @param destOffset the index where output will be put
* @return the number of decoded bytes converted
* @since 1.3
*/
private static int decode4to3( byte[] source, int srcOffset, byte[] destination, int destOffset )
{
// Example: Dk==
if( source[ srcOffset + 2] == EQUALS_SIGN )
{
// Two ways to do the same thing. Don't know which way I like best.
//int outBuff = ( ( DECODABET[ source[ srcOffset ] ] << 24 ) >>> 6 )
// | ( ( DECODABET[ source[ srcOffset + 1] ] << 24 ) >>> 12 );
int outBuff = ( ( DECODABET[ source[ srcOffset ] ] & 0xFF ) << 18 )
| ( ( DECODABET[ source[ srcOffset + 1] ] & 0xFF ) << 12 );
destination[ destOffset ] = (byte)( outBuff >>> 16 );
return 1;
}
// Example: DkL=
else if( source[ srcOffset + 3 ] == EQUALS_SIGN )
{
// Two ways to do the same thing. Don't know which way I like best.
//int outBuff = ( ( DECODABET[ source[ srcOffset ] ] << 24 ) >>> 6 )
// | ( ( DECODABET[ source[ srcOffset + 1 ] ] << 24 ) >>> 12 )
// | ( ( DECODABET[ source[ srcOffset + 2 ] ] << 24 ) >>> 18 );
int outBuff = ( ( DECODABET[ source[ srcOffset ] ] & 0xFF ) << 18 )
| ( ( DECODABET[ source[ srcOffset + 1 ] ] & 0xFF ) << 12 )
| ( ( DECODABET[ source[ srcOffset + 2 ] ] & 0xFF ) << 6 );
destination[ destOffset ] = (byte)( outBuff >>> 16 );
destination[ destOffset + 1 ] = (byte)( outBuff >>> 8 );
return 2;
}
// Example: DkLE
else
{
try{
// Two ways to do the same thing. Don't know which way I like best.
//int outBuff = ( ( DECODABET[ source[ srcOffset ] ] << 24 ) >>> 6 )
// | ( ( DECODABET[ source[ srcOffset + 1 ] ] << 24 ) >>> 12 )
// | ( ( DECODABET[ source[ srcOffset + 2 ] ] << 24 ) >>> 18 )
// | ( ( DECODABET[ source[ srcOffset + 3 ] ] << 24 ) >>> 24 );
int outBuff = ( ( DECODABET[ source[ srcOffset ] ] & 0xFF ) << 18 )
| ( ( DECODABET[ source[ srcOffset + 1 ] ] & 0xFF ) << 12 )
| ( ( DECODABET[ source[ srcOffset + 2 ] ] & 0xFF ) << 6)
| ( ( DECODABET[ source[ srcOffset + 3 ] ] & 0xFF ) );
destination[ destOffset ] = (byte)( outBuff >> 16 );
destination[ destOffset + 1 ] = (byte)( outBuff >> 8 );
destination[ destOffset + 2 ] = (byte)( outBuff );
return 3;
}catch( Exception e){
System.out.println(""+source[srcOffset]+ ": " + ( DECODABET[ source[ srcOffset ] ] ) );
System.out.println(""+source[srcOffset+1]+ ": " + ( DECODABET[ source[ srcOffset + 1 ] ] ) );
System.out.println(""+source[srcOffset+2]+ ": " + ( DECODABET[ source[ srcOffset + 2 ] ] ) );
System.out.println(""+source[srcOffset+3]+ ": " + ( DECODABET[ source[ srcOffset + 3 ] ] ) );
return -1;
} //e nd catch
}
} // end decodeToBytes
/**
* Very low-level access to decoding ASCII characters in
* the form of a byte array. Does not support automatically
* gunzipping or any other "fancy" features.
*
* @param source The Base64 encoded data
* @param off The offset of where to begin decoding
* @param len The length of characters to decode
* @return decoded data
* @since 1.3
*/
public static byte[] decode( byte[] source, int off, int len )
{
int len34 = len * 3 / 4;
byte[] outBuff = new byte[ len34 ]; // Upper limit on size of output
int outBuffPosn = 0;
byte[] b4 = new byte[4];
int b4Posn = 0;
int i = 0;
byte sbiCrop = 0;
byte sbiDecode = 0;
for( i = off; i < off+len; i++ )
{
sbiCrop = (byte)(source[i] & 0x7f); // Only the low seven bits
sbiDecode = DECODABET[ sbiCrop ];
if( sbiDecode >= WHITE_SPACE_ENC ) // White space, Equals sign or better
{
if( sbiDecode >= EQUALS_SIGN_ENC )
{
b4[ b4Posn++ ] = sbiCrop;
if( b4Posn > 3 )
{
outBuffPosn += decode4to3( b4, 0, outBuff, outBuffPosn );
b4Posn = 0;
// If that was the equals sign, break out of 'for' loop
if( sbiCrop == EQUALS_SIGN )
break;
} // end if: quartet built
} // end if: equals sign or better
} // end if: white space, equals sign or better
else
{
//System.err.println( "Bad Base64 input character at " + i + ": " + source[i] + "(decimal)" );
return null;
} // end else:
} // each input character
byte[] out = new byte[ outBuffPosn ];
System.arraycopy( outBuff, 0, out, 0, outBuffPosn );
return out;
} // end decode
/**
* Decodes data from Base64 notation, automatically
* detecting gzip-compressed data and decompressing it.
*
* @param s the string to decode
* @return the decoded data
* @since 1.4
*/
public static byte[] decode( String s )
{
byte[] bytes;
try
{
bytes = s.getBytes( PREFERRED_ENCODING );
} // end try
catch( java.io.UnsupportedEncodingException uee )
{
bytes = s.getBytes();
} // end catch
//</change>
// Decode
bytes = decode( bytes, 0, bytes.length );
// Check to see if it's gzip-compressed
// GZIP Magic Two-Byte Number: 0x8b1f (35615)
if( bytes != null && bytes.length >= 4 )
{
int head = ((int)bytes[0] & 0xff) | ((bytes[1] << 8) & 0xff00);
if( java.util.zip.GZIPInputStream.GZIP_MAGIC == head )
{
java.io.ByteArrayInputStream bais = null;
java.util.zip.GZIPInputStream gzis = null;
java.io.ByteArrayOutputStream baos = null;
byte[] buffer = new byte[2048];
int length = 0;
try
{
baos = new java.io.ByteArrayOutputStream();
bais = new java.io.ByteArrayInputStream( bytes );
gzis = new java.util.zip.GZIPInputStream( bais );
while( ( length = gzis.read( buffer ) ) >= 0 )
{
baos.write(buffer,0,length);
} // end while: reading input
// No error? Get new bytes.
bytes = baos.toByteArray();
} // end try
catch( java.io.IOException e )
{
// Just return originally-decoded bytes
} // end catch
finally
{
try{ baos.close(); } catch( Exception e ){}
try{ gzis.close(); } catch( Exception e ){}
try{ bais.close(); } catch( Exception e ){}
} // end finally
} // end if: gzipped
} // end if: bytes.length >= 2
return bytes;
} // end decode
/**
* Attempts to decode Base64 data and deserialize a Java
* Object within. Returns <tt>null</tt> if there was an error.
*
* @param encodedObject The Base64 data to decode
* @return The decoded and deserialized object
* @since 1.5
*/
public static Object decodeToObject( String encodedObject )
{
// Decode and gunzip if necessary
byte[] objBytes = decode( encodedObject );
java.io.ByteArrayInputStream bais = null;
java.io.ObjectInputStream ois = null;
Object obj = null;
try
{
bais = new java.io.ByteArrayInputStream( objBytes );
ois = new java.io.ObjectInputStream( bais );
obj = ois.readObject();
} // end try
catch( java.io.IOException e )
{
e.printStackTrace();
obj = null;
} // end catch
catch( java.lang.ClassNotFoundException e )
{
e.printStackTrace();
obj = null;
} // end catch
finally
{
try{ bais.close(); } catch( Exception e ){}
try{ ois.close(); } catch( Exception e ){}
} // end finally
return obj;
} // end decodeObject
/**
* Convenience method for encoding data to a file.
*
* @param dataToEncode byte array of data to encode in base64 form
* @param filename Filename for saving encoded data
* @return <tt>true</tt> if successful, <tt>false</tt> otherwise
*
* @since 2.1
*/
public static boolean encodeToFile( byte[] dataToEncode, String filename )
{
boolean success = false;
Base64.OutputStream bos = null;
try
{
bos = new Base64.OutputStream(
new java.io.FileOutputStream( filename ), Base64.ENCODE );
bos.write( dataToEncode );
success = true;
} // end try
catch( java.io.IOException e )
{
success = false;
} // end catch: IOException
finally
{
try{ bos.close(); } catch( Exception e ){}
} // end finally
return success;
} // end encodeToFile
/**
* Convenience method for decoding data to a file.
*
* @param dataToDecode Base64-encoded data as a string
* @param filename Filename for saving decoded data
* @return <tt>true</tt> if successful, <tt>false</tt> otherwise
*
* @since 2.1
*/
public static boolean decodeToFile( String dataToDecode, String filename )
{
boolean success = false;
Base64.OutputStream bos = null;
try
{
bos = new Base64.OutputStream(
new java.io.FileOutputStream( filename ), Base64.DECODE );
bos.write( dataToDecode.getBytes( PREFERRED_ENCODING ) );
success = true;
} // end try
catch( java.io.IOException e )
{
success = false;
} // end catch: IOException
finally
{
try{ bos.close(); } catch( Exception e ){}
} // end finally
return success;
} // end decodeToFile
/**
* Convenience method for reading a base64-encoded
* file and decoding it.
*
* @param filename Filename for reading encoded data
* @return decoded byte array or null if unsuccessful
*
* @since 2.1
*/
public static byte[] decodeFromFile( String filename )
{
byte[] decodedData = null;
Base64.InputStream bis = null;
try
{
// Set up some useful variables
java.io.File file = new java.io.File( filename );
byte[] buffer = null;
int length = 0;
int numBytes = 0;
// Check for size of file
if( file.length() > Integer.MAX_VALUE )
{
System.err.println( "File is too big for this convenience method (" + file.length() + " bytes)." );
return null;
} // end if: file too big for int index
buffer = new byte[ (int)file.length() ];
// Open a stream
bis = new Base64.InputStream(
new java.io.BufferedInputStream(
new java.io.FileInputStream( file ) ), Base64.DECODE );
// Read until done
while( ( numBytes = bis.read( buffer, length, 4096 ) ) >= 0 )
length += numBytes;
// Save in a variable to return
decodedData = new byte[ length ];
System.arraycopy( buffer, 0, decodedData, 0, length );
} // end try
catch( java.io.IOException e )
{
System.err.println( "Error decoding from file " + filename );
} // end catch: IOException
finally
{
try{ bis.close(); } catch( Exception e) {}
} // end finally
return decodedData;
} // end decodeFromFile
/**
* Convenience method for reading a binary file
* and base64-encoding it.
*
* @param filename Filename for reading binary data
* @return base64-encoded string or null if unsuccessful
*
* @since 2.1
*/
public static String encodeFromFile( String filename )
{
String encodedData = null;
Base64.InputStream bis = null;
try
{
// Set up some useful variables
java.io.File file = new java.io.File( filename );
byte[] buffer = new byte[ (int)(file.length() * 1.4) ];
int length = 0;
int numBytes = 0;
// Open a stream
bis = new Base64.InputStream(
new java.io.BufferedInputStream(
new java.io.FileInputStream( file ) ), Base64.ENCODE );
// Read until done
while( ( numBytes = bis.read( buffer, length, 4096 ) ) >= 0 )
length += numBytes;
// Save in a variable to return
encodedData = new String( buffer, 0, length, Base64.PREFERRED_ENCODING );
} // end try
catch( java.io.IOException e )
{
System.err.println( "Error encoding from file " + filename );
} // end catch: IOException
finally
{
try{ bis.close(); } catch( Exception e) {}
} // end finally
return encodedData;
} // end encodeFromFile
/* ******** I N N E R C L A S S I N P U T S T R E A M ******** */
/**
* A {@link Base64.InputStream} will read data from another
* <tt>java.io.InputStream</tt>, given in the constructor,
* and encode/decode to/from Base64 notation on the fly.
*
* @see Base64
* @since 1.3
*/
public static class InputStream extends java.io.FilterInputStream
{
private boolean encode; // Encoding or decoding
private int position; // Current position in the buffer
private byte[] buffer; // Small buffer holding converted data
private int bufferLength; // Length of buffer (3 or 4)
private int numSigBytes; // Number of meaningful bytes in the buffer
private int lineLength;
private boolean breakLines; // Break lines at less than 80 characters
/**
* Constructs a {@link Base64.InputStream} in DECODE mode.
*
* @param in the <tt>java.io.InputStream</tt> from which to read data.
* @since 1.3
*/
public InputStream( java.io.InputStream in )
{
this( in, DECODE );
} // end constructor
/**
* Constructs a {@link Base64.InputStream} in
* either ENCODE or DECODE mode.
* <p>
* Valid options:<pre>
* ENCODE or DECODE: Encode or Decode as data is read.
* DONT_BREAK_LINES: don't break lines at 76 characters
* (only meaningful when encoding)
* <i>Note: Technically, this makes your encoding non-compliant.</i>
* </pre>
* <p>
* Example: <code>new Base64.InputStream( in, Base64.DECODE )</code>
*
*
* @param in the <tt>java.io.InputStream</tt> from which to read data.
* @param options Specified options
* @see Base64#ENCODE
* @see Base64#DECODE
* @see Base64#DONT_BREAK_LINES
* @since 2.0
*/
public InputStream( java.io.InputStream in, int options )
{
super( in );
this.breakLines = (options & DONT_BREAK_LINES) != DONT_BREAK_LINES;
this.encode = (options & ENCODE) == ENCODE;
this.bufferLength = encode ? 4 : 3;
this.buffer = new byte[ bufferLength ];
this.position = -1;
this.lineLength = 0;
} // end constructor
/**
* Reads enough of the input stream to convert
* to/from Base64 and returns the next byte.
*
* @return next byte
* @since 1.3
*/
public int read() throws java.io.IOException
{
// Do we need to get data?
if( position < 0 )
{
if( encode )
{
byte[] b3 = new byte[3];
int numBinaryBytes = 0;
for( int i = 0; i < 3; i++ )
{
try
{
int b = in.read();
// If end of stream, b is -1.
if( b >= 0 )
{
b3[i] = (byte)b;
numBinaryBytes++;
} // end if: not end of stream
} // end try: read
catch( java.io.IOException e )
{
// Only a problem if we got no data at all.
if( i == 0 )
throw e;
} // end catch
} // end for: each needed input byte
if( numBinaryBytes > 0 )
{
encode3to4( b3, 0, numBinaryBytes, buffer, 0 );
position = 0;
numSigBytes = 4;
} // end if: got data
else
{
return -1;
} // end else
} // end if: encoding
// Else decoding
else
{
byte[] b4 = new byte[4];
int i = 0;
for( i = 0; i < 4; i++ )
{
// Read four "meaningful" bytes:
int b = 0;
do{ b = in.read(); }
while( b >= 0 && DECODABET[ b & 0x7f ] <= WHITE_SPACE_ENC );
if( b < 0 )
break; // Reads a -1 if end of stream
b4[i] = (byte)b;
} // end for: each needed input byte
if( i == 4 )
{
numSigBytes = decode4to3( b4, 0, buffer, 0 );
position = 0;
} // end if: got four characters
else if( i == 0 ){
return -1;
} // end else if: also padded correctly
else
{
// Must have broken out from above.
throw new java.io.IOException( "Improperly padded Base64 input." );
} // end
} // end else: decode
} // end else: get data
// Got data?
if( position >= 0 )
{
// End of relevant data?
if( /*!encode &&*/ position >= numSigBytes )
return -1;
if( encode && breakLines && lineLength >= MAX_LINE_LENGTH )
{
lineLength = 0;
return '\n';
} // end if
else
{
lineLength++; // This isn't important when decoding
// but throwing an extra "if" seems
// just as wasteful.
int b = buffer[ position++ ];
if( position >= bufferLength )
position = -1;
return b & 0xFF; // This is how you "cast" a byte that's
// intended to be unsigned.
} // end else
} // end if: position >= 0
// Else error
else
{
// When JDK1.4 is more accepted, use an assertion here.
throw new java.io.IOException( "Error in Base64 code reading stream." );
} // end else
} // end read
/**
* Calls {@link #read()} repeatedly until the end of stream
* is reached or <var>len</var> bytes are read.
* Returns number of bytes read into array or -1 if
* end of stream is encountered.
*
* @param dest array to hold values
* @param off offset for array
* @param len max number of bytes to read into array
* @return bytes read into array or -1 if end of stream is encountered.
* @since 1.3
*/
public int read( byte[] dest, int off, int len ) throws java.io.IOException
{
int i;
int b;
for( i = 0; i < len; i++ )
{
b = read();
//if( b < 0 && i == 0 )
// return -1;
if( b >= 0 )
dest[off + i] = (byte)b;
else if( i == 0 )
return -1;
else
break; // Out of 'for' loop
} // end for: each byte read
return i;
} // end read
} // end inner class InputStream
/* ******** I N N E R C L A S S O U T P U T S T R E A M ******** */
/**
* A {@link Base64.OutputStream} will write data to another
* <tt>java.io.OutputStream</tt>, given in the constructor,
* and encode/decode to/from Base64 notation on the fly.
*
* @see Base64
* @since 1.3
*/
public static class OutputStream extends java.io.FilterOutputStream
{
private boolean encode;
private int position;
private byte[] buffer;
private int bufferLength;
private int lineLength;
private boolean breakLines;
private byte[] b4; // Scratch used in a few places
private boolean suspendEncoding;
/**
* Constructs a {@link Base64.OutputStream} in ENCODE mode.
*
* @param out the <tt>java.io.OutputStream</tt> to which data will be written.
* @since 1.3
*/
public OutputStream( java.io.OutputStream out )
{
this( out, ENCODE );
} // end constructor
/**
* Constructs a {@link Base64.OutputStream} in
* either ENCODE or DECODE mode.
* <p>
* Valid options:<pre>
* ENCODE or DECODE: Encode or Decode as data is read.
* DONT_BREAK_LINES: don't break lines at 76 characters
* (only meaningful when encoding)
* <i>Note: Technically, this makes your encoding non-compliant.</i>
* </pre>
* <p>
* Example: <code>new Base64.OutputStream( out, Base64.ENCODE )</code>
*
* @param out the <tt>java.io.OutputStream</tt> to which data will be written.
* @param options Specified options.
* @see Base64#ENCODE
* @see Base64#DECODE
* @see Base64#DONT_BREAK_LINES
* @since 1.3
*/
public OutputStream( java.io.OutputStream out, int options )
{
super( out );
this.breakLines = (options & DONT_BREAK_LINES) != DONT_BREAK_LINES;
this.encode = (options & ENCODE) == ENCODE;
this.bufferLength = encode ? 3 : 4;
this.buffer = new byte[ bufferLength ];
this.position = 0;
this.lineLength = 0;
this.suspendEncoding = false;
this.b4 = new byte[4];
} // end constructor
/**
* Writes the byte to the output stream after
* converting to/from Base64 notation.
* When encoding, bytes are buffered three
* at a time before the output stream actually
* gets a write() call.
* When decoding, bytes are buffered four
* at a time.
*
* @param theByte the byte to write
* @since 1.3
*/
public void write(int theByte) throws java.io.IOException
{
// Encoding suspended?
if( suspendEncoding )
{
super.out.write( theByte );
return;
} // end if: supsended
// Encode?
if( encode )
{
buffer[ position++ ] = (byte)theByte;
if( position >= bufferLength ) // Enough to encode.
{
out.write( encode3to4( b4, buffer, bufferLength ) );
lineLength += 4;
if( breakLines && lineLength >= MAX_LINE_LENGTH )
{
out.write( NEW_LINE );
lineLength = 0;
} // end if: end of line
position = 0;
} // end if: enough to output
} // end if: encoding
// Else, Decoding
else
{
// Meaningful Base64 character?
if( DECODABET[ theByte & 0x7f ] > WHITE_SPACE_ENC )
{
buffer[ position++ ] = (byte)theByte;
if( position >= bufferLength ) // Enough to output.
{
int len = Base64.decode4to3( buffer, 0, b4, 0 );
out.write( b4, 0, len );
//out.write( Base64.decode4to3( buffer ) );
position = 0;
} // end if: enough to output
} // end if: meaningful base64 character
else if( DECODABET[ theByte & 0x7f ] != WHITE_SPACE_ENC )
{
throw new java.io.IOException( "Invalid character in Base64 data." );
} // end else: not white space either
} // end else: decoding
} // end write
/**
* Calls {@link #write(int)} repeatedly until <var>len</var>
* bytes are written.
*
* @param theBytes array from which to read bytes
* @param off offset for array
* @param len max number of bytes to read into array
* @since 1.3
*/
public void write( byte[] theBytes, int off, int len ) throws java.io.IOException
{
// Encoding suspended?
if( suspendEncoding )
{
super.out.write( theBytes, off, len );
return;
} // end if: supsended
for( int i = 0; i < len; i++ )
{
write( theBytes[ off + i ] );
} // end for: each byte written
} // end write
/**
* Method added by PHIL. [Thanks, PHIL. -Rob]
* This pads the buffer without closing the stream.
*/
public void flushBase64() throws java.io.IOException
{
if( position > 0 )
{
if( encode )
{
out.write( encode3to4( b4, buffer, position ) );
position = 0;
} // end if: encoding
else
{
throw new java.io.IOException( "Base64 input not properly padded." );
} // end else: decoding
} // end if: buffer partially full
} // end flush
/**
* Flushes and closes (I think, in the superclass) the stream.
*
* @since 1.3
*/
public void close() throws java.io.IOException
{
// 1. Ensure that pending characters are written
flushBase64();
// 2. Actually close the stream
// Base class both flushes and closes.
super.close();
buffer = null;
out = null;
} // end close
/**
* Suspends encoding of the stream.
* May be helpful if you need to embed a piece of
* base640-encoded data in a stream.
*
* @since 1.5.1
*/
public void suspendEncoding() throws java.io.IOException
{
flushBase64();
this.suspendEncoding = true;
} // end suspendEncoding
/**
* Resumes encoding of the stream.
* May be helpful if you need to embed a piece of
* base640-encoded data in a stream.
*
* @since 1.5.1
*/
public void resumeEncoding()
{
this.suspendEncoding = false;
} // end resumeEncoding
} // end inner class OutputStream
} // end class Base64
| Java |
# Copyright Iris contributors
#
# This file is part of Iris and is released under the LGPL license.
# See COPYING and COPYING.LESSER in the root of the repository for full
# licensing details.
"""Integration tests for loading and saving netcdf files."""
# Import iris.tests first so that some things can be initialised before
# importing anything else.
import iris.tests as tests
from os.path import join as path_join, dirname, sep as os_sep
import shutil
from subprocess import check_call
import tempfile
import iris
from iris.tests import stock
class TestClimatology(iris.tests.IrisTest):
reference_cdl_path = os_sep.join(
[
dirname(tests.__file__),
(
"results/integration/climatology/TestClimatology/"
"reference_simpledata.cdl"
),
]
)
@classmethod
def _simple_cdl_string(cls):
with open(cls.reference_cdl_path, "r") as f:
cdl_content = f.read()
# Add the expected CDL first line since this is removed from the
# stored results file.
cdl_content = "netcdf {\n" + cdl_content
return cdl_content
@staticmethod
def _load_sanitised_cube(filepath):
cube = iris.load_cube(filepath)
# Remove attributes convention, if any.
cube.attributes.pop("Conventions", None)
# Remove any var-names.
for coord in cube.coords():
coord.var_name = None
cube.var_name = None
return cube
@classmethod
def setUpClass(cls):
# Create a temp directory for temp files.
cls.temp_dir = tempfile.mkdtemp()
cls.path_ref_cdl = path_join(cls.temp_dir, "standard.cdl")
cls.path_ref_nc = path_join(cls.temp_dir, "standard.nc")
# Create reference CDL file.
with open(cls.path_ref_cdl, "w") as f_out:
f_out.write(cls._simple_cdl_string())
# Create reference netCDF file from reference CDL.
command = "ncgen -o {} {}".format(cls.path_ref_nc, cls.path_ref_cdl)
check_call(command, shell=True)
cls.path_temp_nc = path_join(cls.temp_dir, "tmp.nc")
# Create reference cube.
cls.cube_ref = stock.climatology_3d()
@classmethod
def tearDownClass(cls):
# Destroy a temp directory for temp files.
shutil.rmtree(cls.temp_dir)
###############################################################################
# Round-trip tests
def test_cube_to_cube(self):
# Save reference cube to file, load cube from same file, test against
# reference cube.
iris.save(self.cube_ref, self.path_temp_nc)
cube = self._load_sanitised_cube(self.path_temp_nc)
self.assertEqual(cube, self.cube_ref)
def test_file_to_file(self):
# Load cube from reference file, save same cube to file, test against
# reference CDL.
cube = iris.load_cube(self.path_ref_nc)
iris.save(cube, self.path_temp_nc)
self.assertCDL(
self.path_temp_nc,
reference_filename=self.reference_cdl_path,
flags="",
)
# NOTE:
# The saving half of the round-trip tests is tested in the
# appropriate dedicated test class:
# unit.fileformats.netcdf.test_Saver.Test_write.test_with_climatology .
# The loading half has no equivalent dedicated location, so is tested
# here as test_load_from_file.
def test_load_from_file(self):
# Create cube from file, test against reference cube.
cube = self._load_sanitised_cube(self.path_ref_nc)
self.assertEqual(cube, self.cube_ref)
if __name__ == "__main__":
tests.main()
| Java |
/* radare - LGPL - Copyright 2010-2019 - pancake, maijin */
#include <r_types.h>
#include <r_list.h>
#include <r_flag.h>
#include <r_core.h>
#define USE_R2 1
#include <spp/spp.h>
static bool is_valid_project_name(const char *name) {
int i;
if (r_str_endswith (name, ".zip")) {
return false;
}
for (i = 0; name[i]; i++) {
switch (name[i]) {
case '\\': // for w32
case '.':
case '_':
case ':':
case '-':
continue;
}
if (name[i] >= 'a' && name[i] <= 'z') {
continue;
}
if (name[i] >= 'A' && name[i] <= 'Z') {
continue;
}
if (IS_DIGIT (name[i])) {
continue;
}
return false;
}
return true;
}
static char *get_project_script_path(RCore *core, const char *file) {
const char *magic = "# r2 rdb project file";
char *data, *prjfile;
if (r_file_is_abspath (file)) {
prjfile = strdup (file);
} else {
if (!is_valid_project_name (file)) {
return NULL;
}
prjfile = r_file_abspath (r_config_get (core->config, "dir.projects"));
prjfile = r_str_append (prjfile, R_SYS_DIR);
prjfile = r_str_append (prjfile, file);
if (!r_file_exists (prjfile) || r_file_is_directory (prjfile)) {
prjfile = r_str_append (prjfile, R_SYS_DIR "rc");
}
}
data = r_file_slurp (prjfile, NULL);
if (data) {
if (strncmp (data, magic, strlen (magic))) {
R_FREE (prjfile);
}
}
free (data);
return prjfile;
}
static int make_projects_directory(RCore *core) {
char *prjdir = r_file_abspath (r_config_get (core->config, "dir.projects"));
int ret = r_sys_mkdirp (prjdir);
if (!ret) {
eprintf ("Cannot mkdir dir.projects\n");
}
free (prjdir);
return ret;
}
R_API bool r_core_is_project(RCore *core, const char *name) {
bool ret = false;
if (name && *name && *name != '.') {
char *path = get_project_script_path (core, name);
if (!path) {
return false;
}
if (r_str_endswith (path, R_SYS_DIR "rc") && r_file_exists (path)) {
ret = true;
} else {
path = r_str_append (path, ".d");
if (r_file_is_directory (path)) {
ret = true;
}
}
free (path);
}
return ret;
}
R_API int r_core_project_cat(RCore *core, const char *name) {
char *path = get_project_script_path (core, name);
if (path) {
char *data = r_file_slurp (path, NULL);
if (data) {
r_cons_println (data);
free (data);
}
}
free (path);
return 0;
}
R_API int r_core_project_list(RCore *core, int mode) {
PJ *pj = NULL;
RListIter *iter;
RList *list;
char *foo, *path = r_file_abspath (r_config_get (core->config, "dir.projects"));
if (!path) {
return 0;
}
list = r_sys_dir (path);
switch (mode) {
case 'j':
pj = pj_new ();
if (!pj) {
break;
}
pj_a (pj);
r_list_foreach (list, iter, foo) {
// todo. escape string
if (r_core_is_project (core, foo)) {
pj_s (pj, foo);
}
}
pj_end (pj);
r_cons_printf ("%s\n", pj_string (pj));
pj_free (pj);
break;
default:
r_list_foreach (list, iter, foo) {
if (r_core_is_project (core, foo)) {
r_cons_println (foo);
}
}
break;
}
r_list_free (list);
free (path);
return 0;
}
static inline void remove_project_file(char * path) {
if (r_file_exists (path)) {
r_file_rm (path);
eprintf ("rm %s\n", path);
}
}
static inline void remove_notes_file(char *prjDir) {
char *notes_txt = r_str_newf ("%s%s%s", prjDir, R_SYS_DIR, "notes.txt");
if (r_file_exists (notes_txt)) {
r_file_rm (notes_txt);
eprintf ("rm %s\n", notes_txt);
}
free(notes_txt);
}
static inline void remove_rop_directory(char *prjDir) {
char *rop_d = r_str_newf ("%s%s%s", prjDir, R_SYS_DIR, "rop.d");
if (r_file_is_directory (rop_d)) {
char *f;
RListIter *iter;
RList *files = r_sys_dir (rop_d);
r_list_foreach (files, iter, f) {
char *filepath = r_str_append (strdup (rop_d), R_SYS_DIR);
filepath = r_str_append (filepath, f);
if (!r_file_is_directory (filepath)) {
eprintf ("rm %s\n", filepath);
r_file_rm (filepath);
}
free (filepath);
}
r_file_rm (rop_d);
eprintf ("rm %s\n", rop_d);
r_list_free (files);
}
free (rop_d);
}
R_API int r_core_project_delete(RCore *core, const char *prjfile) {
if (r_sandbox_enable (0)) {
eprintf ("Cannot delete project in sandbox mode\n");
return 0;
}
char *path = get_project_script_path (core, prjfile);
if (!path) {
eprintf ("Invalid project name '%s'\n", prjfile);
return false;
}
if (r_core_is_project (core, prjfile)) {
char *prjDir = r_file_dirname (path);
if (!prjDir) {
eprintf ("Cannot resolve directory\n");
free (path);
return false;
}
remove_project_file (path);
remove_notes_file (prjDir);
remove_rop_directory (prjDir);
// remove directory only if it's empty
r_file_rm (prjDir);
free (prjDir);
}
free (path);
return 0;
}
static bool load_project_rop(RCore *core, const char *prjfile) {
char *path, *db = NULL, *path_ns;
bool found = 0;
SdbListIter *it;
SdbNs *ns;
if (!prjfile || !*prjfile) {
return false;
}
Sdb *rop_db = sdb_ns (core->sdb, "rop", false);
Sdb *nop_db = sdb_ns (rop_db, "nop", false);
Sdb *mov_db = sdb_ns (rop_db, "mov", false);
Sdb *const_db = sdb_ns (rop_db, "const", false);
Sdb *arithm_db = sdb_ns (rop_db, "arithm", false);
Sdb *arithmct_db = sdb_ns (rop_db, "arithm_ct", false);
char *rcPath = get_project_script_path (core, prjfile);
char *prjDir = r_file_dirname (rcPath);
if (r_str_endswith (prjfile, R_SYS_DIR "rc")) {
// XXX
eprintf ("ENDS WITH\n");
path = strdup (prjfile);
path[strlen (path) - 3] = 0;
} else if (r_file_fexists ("%s" R_SYS_DIR "rc", prjDir, prjfile)) {
path = r_str_newf ("%s" R_SYS_DIR, prjDir, prjfile);
} else {
if (*prjfile == R_SYS_DIR[0]) {
db = r_str_newf ("%s.d", prjfile);
if (!db) {
free (prjDir);
free (rcPath);
return false;
}
path = strdup (db);
} else {
db = r_str_newf ("%s" R_SYS_DIR "%s.d", prjDir, prjfile);
if (!db) {
free (prjDir);
free (rcPath);
return false;
}
path = r_file_abspath (db);
}
}
if (!path) {
free (db);
free (prjDir);
free (rcPath);
return false;
}
if (rop_db) {
ls_foreach (core->sdb->ns, it, ns){
if (ns->sdb == rop_db) {
ls_delete (core->sdb->ns, it);
found = true;
break;
}
}
}
if (!found) {
sdb_free (rop_db);
}
rop_db = sdb_new (path, "rop", 0);
if (!rop_db) {
free (db);
free (path);
free (prjDir);
free (rcPath);
return false;
}
sdb_ns_set (core->sdb, "rop", rop_db);
path_ns = r_str_newf ("%s" R_SYS_DIR "rop", prjDir);
if (!r_file_exists (path_ns)) {
path_ns = r_str_append (path_ns, ".sdb");
}
nop_db = sdb_new (path_ns, "nop", 0);
sdb_ns_set (rop_db, "nop", nop_db);
mov_db = sdb_new (path_ns, "mov", 0);
sdb_ns_set (rop_db, "mov", mov_db);
const_db = sdb_new (path_ns, "const", 0);
sdb_ns_set (rop_db, "const", const_db);
arithm_db = sdb_new (path_ns, "arithm", 0);
sdb_ns_set (rop_db, "arithm", arithm_db);
arithmct_db = sdb_new (path_ns, "arithm_ct", 0);
sdb_ns_set (rop_db, "arithm_ct", arithmct_db);
free (path);
free (path_ns);
free (db);
free (prjDir);
free (rcPath);
return true;
}
R_API void r_core_project_execute_cmds(RCore *core, const char *prjfile) {
char *str = r_core_project_notes_file (core, prjfile);
char *data = r_file_slurp (str, NULL);
if (!data) {
free (str);
return;
}
Output out;
out.fout = NULL;
out.cout = r_strbuf_new (NULL);
r_strbuf_init (out.cout);
struct Proc proc;
spp_proc_set (&proc, "spp", 1);
spp_eval (data, &out);
free (data);
data = strdup (r_strbuf_get (out.cout));
char *bol = strtok (data, "\n");
while (bol) {
if (bol[0] == ':') {
r_core_cmd0 (core, bol + 1);
}
bol = strtok (NULL, "\n");
}
free (data);
free (str);
}
/*** vvv thready ***/
typedef struct {
RCore *core;
char *prjName;
char *rcPath;
} ProjectState;
static RThreadFunctionRet project_load_background(RThread *th) {
ProjectState *ps = th->user;
r_core_project_load (ps->core, ps->prjName, ps->rcPath);
free (ps->prjName);
free (ps->rcPath);
free (ps);
return R_TH_STOP;
}
R_API RThread *r_core_project_load_bg(RCore *core, const char *prjName, const char *rcPath) {
ProjectState *ps = R_NEW (ProjectState);
ps->core = core;
ps->prjName = strdup (prjName);
ps->rcPath = strdup (rcPath);
RThread *th = r_th_new (project_load_background, ps, false);
if (th) {
r_th_start (th, true);
char thname[16] = {0};
size_t thlen = R_MIN (strlen(prjName), sizeof(thname) - 1);
strncpy (thname, prjName, thlen);
thname[15] = 0;
r_th_setname (th, thname);
}
return th;
}
/*** ^^^ thready ***/
static ut64 getProjectLaddr(RCore *core, const char *prjfile) {
ut64 laddr = 0;
char *buf = r_file_slurp (prjfile, NULL);
char *pos;
if (buf) {
if ((pos = strstr(buf, "\"e bin.laddr = "))) {
laddr = r_num_math (NULL, pos + 15);
}
free (buf);
}
return laddr;
}
R_API bool r_core_project_open(RCore *core, const char *prjfile, bool thready) {
bool askuser = true;
int ret, close_current_session = 1;
char *oldbin;
const char *newbin;
ut64 mapaddr = 0;
if (!prjfile || !*prjfile) {
return false;
}
if (thready) {
eprintf ("Loading projects in a thread has been deprecated. Use tasks\n");
return false;
}
char *prj = get_project_script_path (core, prjfile);
if (!prj) {
eprintf ("Invalid project name '%s'\n", prjfile);
return false;
}
char *filepath = r_core_project_info (core, prj);
// eprintf ("OPENING (%s) from %s\n", prj, r_config_get (core->config, "file.path"));
/* if it is not an URI */
if (!filepath) {
eprintf ("Cannot retrieve information for project '%s'\n", prj);
free (prj);
return false;
}
if (!filepath[0]) {
goto cookiefactory;
}
if (!strstr (filepath, "://")) {
/* check if path exists */
if (!r_file_exists (filepath)) {
eprintf ("Cannot find file '%s'\n", filepath);
free (prj);
free (filepath);
return false;
}
}
cookiefactory:
;
const char *file_path = r_config_get (core->config, "file.path");
if (!file_path || !*file_path) {
file_path = r_config_get (core->config, "file.lastpath");
}
oldbin = strdup (file_path);
if (!strcmp (prjfile, r_config_get (core->config, "prj.name"))) {
// eprintf ("Reloading project\n");
askuser = false;
#if 0
free (prj);
free (filepath);
return false;
#endif
}
if (askuser) {
if (r_cons_is_interactive ()) {
close_current_session = r_cons_yesno ('y', "Close current session? (Y/n)");
}
}
if (close_current_session) {
// delete
r_core_file_close_fd (core, -1);
r_io_close_all (core->io);
r_anal_purge (core->anal);
r_flag_unset_all (core->flags);
r_bin_file_delete_all (core->bin);
// open new file
// TODO: handle read/read-write mode
if (filepath[0]) {
/* Old-style project without embedded on commands to open all files. */
if (!r_core_file_open (core, filepath, 0, UT64_MAX)) {
eprintf ("Cannot open file '%s'\n", filepath);
ret = false;
goto beach;
}
}
}
mapaddr = getProjectLaddr (core, prj);
if (mapaddr) {
r_config_set_i (core->config, "bin.laddr", mapaddr);
}
if (filepath[0] && close_current_session && r_config_get_i (core->config, "file.info")) {
mapaddr = r_config_get_i (core->config, "file.offset");
(void)r_core_bin_load (core, filepath, mapaddr? mapaddr: UT64_MAX);
}
/* load sdb stuff in here */
ret = r_core_project_load (core, prjfile, prj);
if (filepath[0]) {
newbin = r_config_get (core->config, "file.path");
if (!newbin || !*newbin) {
newbin = r_config_get (core->config, "file.lastpath");
}
if (strcmp (oldbin, newbin)) {
eprintf ("WARNING: file.path changed: %s => %s\n", oldbin, newbin);
}
}
beach:
free (oldbin);
free (filepath);
free (prj);
return ret;
}
R_API char *r_core_project_info(RCore *core, const char *prjfile) {
FILE *fd;
char buf[256], *file = NULL;
char *prj = get_project_script_path (core, prjfile);
if (!prj) {
eprintf ("Invalid project name '%s'\n", prjfile);
return NULL;
}
fd = r_sandbox_fopen (prj, "r");
if (fd) {
for (;;) {
if (!fgets (buf, sizeof (buf), fd)) {
break;
}
if (feof (fd)) {
break;
}
if (!strncmp (buf, "\"e file.path = ", 15)) {
buf[strlen (buf) - 2] = 0;
file = r_str_new (buf + 15);
break;
}
if (!strncmp (buf, "\"e file.lastpath = ", 19)) {
buf[strlen (buf) - 2] = 0;
file = r_str_new (buf + 19);
break;
}
// TODO: deprecate before 1.0
if (!strncmp (buf, "e file.path = ", 14)) {
buf[strlen (buf) - 1] = 0;
file = r_str_new (buf + 14);
break;
}
}
fclose (fd);
} else {
eprintf ("Cannot open project info (%s)\n", prj);
}
#if 0
if (file) {
r_cons_printf ("Project: %s\n", prj);
r_cons_printf ("FilePath: %s\n", file);
}
#endif
free (prj);
return file;
}
static int fdc; //this is a ugly, remove it, when we have $fd
static bool store_files_and_maps (RCore *core, RIODesc *desc, ut32 id) {
RList *maps = NULL;
RListIter *iter;
RIOMap *map;
if (desc) {
// reload bin info
r_cons_printf ("\"obf %s\"\n", desc->uri);
r_cons_printf ("\"ofs \\\"%s\\\" %s\"\n", desc->uri, r_str_rwx_i (desc->perm));
if ((maps = r_io_map_get_for_fd (core->io, id))) {
r_list_foreach (maps, iter, map) {
r_cons_printf ("om %d 0x%"PFMT64x" 0x%"PFMT64x" 0x%"PFMT64x" %s%s%s\n", fdc,
map->itv.addr, map->itv.size, map->delta, r_str_rwx_i (map->perm),
map->name ? " " : "", map->name ? map->name : "");
}
r_list_free (maps);
}
fdc++;
}
return true;
}
static bool simple_project_save_script(RCore *core, const char *file, int opts) {
char *filename, *hl, *ohl = NULL;
int fd, fdold;
if (!file || * file == '\0') {
return false;
}
filename = r_str_word_get_first (file);
fd = r_sandbox_open (file, O_BINARY | O_RDWR | O_CREAT | O_TRUNC, 0644);
if (fd == -1) {
free (filename);
return false;
}
hl = r_cons_singleton ()->highlight;
if (hl) {
ohl = strdup (hl);
r_cons_highlight (NULL);
}
fdold = r_cons_singleton ()->fdout;
r_cons_singleton ()->fdout = fd;
r_cons_singleton ()->context->is_interactive = false; // NOES must use api
r_str_write (fd, "# r2 rdb project file\n");
if (opts & R_CORE_PRJ_EVAL) {
r_str_write (fd, "# eval\n");
r_config_list (core->config, NULL, true);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_FCNS) {
r_str_write (fd, "# functions\n");
r_str_write (fd, "fs functions\n");
r_core_cmd (core, "afl*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_FLAGS) {
r_str_write (fd, "# flags\n");
r_core_cmd (core, "f.**", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_META) {
r_str_write (fd, "# meta\n");
r_meta_print_list_all (core->anal, R_META_TYPE_ANY, 1);
r_cons_flush ();
r_core_cmd (core, "fV*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_XREFS) {
r_str_write (fd, "# xrefs\n");
r_core_cmd (core, "ax*", 0);
r_cons_flush ();
}
r_cons_singleton ()->fdout = fdold;
r_cons_singleton ()->context->is_interactive = true;
if (ohl) {
r_cons_highlight (ohl);
free (ohl);
}
close (fd);
free (filename);
return true;
}
static bool project_save_script(RCore *core, const char *file, int opts) {
char *filename, *hl, *ohl = NULL;
int fd, fdold;
if (!file || *file == '\0') {
return false;
}
filename = r_str_word_get_first (file);
fd = r_sandbox_open (file, O_BINARY | O_RDWR | O_CREAT | O_TRUNC, 0644);
if (fd == -1) {
free (filename);
return false;
}
hl = r_cons_singleton ()->highlight;
if (hl) {
ohl = strdup (hl);
r_cons_highlight (NULL);
}
fdold = r_cons_singleton ()->fdout;
r_cons_singleton ()->fdout = fd;
r_cons_singleton ()->context->is_interactive = false;
r_str_write (fd, "# r2 rdb project file\n");
if (!core->bin->is_debugger && !r_config_get_i (core->config, "asm.emu")) {
char *fpath = r_file_abspath (core->bin->file);
if (fpath) {
char *reopen = r_str_newf ("\"o %s\"\n",fpath);
if (reopen) {
r_str_write (fd, reopen);
free (reopen);
free (fpath);
}
}
}
// Set file.path and file.lastpath to empty string to signal
// new behaviour to project load routine (see io maps below).
r_config_set (core->config, "file.path", "");
r_config_set (core->config, "file.lastpath", "");
if (opts & R_CORE_PRJ_EVAL) {
r_str_write (fd, "# eval\n");
r_config_list (core->config, NULL, true);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_FCNS) {
r_str_write (fd, "# functions\n");
r_str_write (fd, "fs functions\n");
r_core_cmd (core, "afl*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_FLAGS) {
r_str_write (fd, "# flags\n");
r_flag_space_push (core->flags, NULL);
r_flag_list (core->flags, true, NULL);
r_flag_space_pop (core->flags);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_IO_MAPS && core->io && core->io->files) {
fdc = 3;
r_id_storage_foreach (core->io->files, (RIDStorageForeachCb)store_files_and_maps, core);
r_cons_flush ();
}
{
r_core_cmd (core, "fz*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_META) {
r_str_write (fd, "# meta\n");
r_meta_print_list_all (core->anal, R_META_TYPE_ANY, 1);
r_cons_flush ();
r_core_cmd (core, "fV*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_XREFS) {
r_core_cmd (core, "ax*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_FLAGS) {
r_core_cmd (core, "f.**", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_DBG_BREAK) {
r_core_cmd (core, "db*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_ANAL_HINTS) {
r_core_cmd (core, "ah*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_ANAL_TYPES) {
r_str_write (fd, "# types\n");
r_core_cmd (core, "t*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_ANAL_MACROS) {
r_str_write (fd, "# macros\n");
r_core_cmd (core, "(*", 0);
r_str_write (fd, "# aliases\n");
r_core_cmd (core, "$*", 0);
r_cons_flush ();
}
if (opts & R_CORE_PRJ_ANAL_SEEK) {
r_cons_printf ("# seek\n"
"s 0x%08"PFMT64x "\n", core->offset);
r_cons_flush ();
}
r_cons_singleton ()->fdout = fdold;
r_cons_singleton ()->context->is_interactive = true;
if (ohl) {
r_cons_highlight (ohl);
free (ohl);
}
close (fd);
free (filename);
return true;
}
// TODO: rename to r_core_project_save_script
R_API bool r_core_project_save_script(RCore *core, const char *file, int opts) {
return project_save_script (core, file, opts);
}
#define TRANSITION 1
R_API bool r_core_project_save(RCore *core, const char *prjName) {
bool scr_null = false;
bool ret = true;
char *scriptPath, *prjDir;
SdbListIter *it;
SdbNs *ns;
char *oldPrjName = NULL;
if (!prjName || !*prjName) {
return false;
}
scriptPath = get_project_script_path (core, prjName);
if (!scriptPath) {
eprintf ("Invalid project name '%s'\n", prjName);
return false;
}
if (r_str_endswith (scriptPath, R_SYS_DIR "rc")) {
/* new project format */
prjDir = r_file_dirname (scriptPath);
} else {
prjDir = r_str_newf ("%s.d", scriptPath);
}
if (r_file_exists (scriptPath)) {
if (r_file_is_directory (scriptPath)) {
eprintf ("WTF. rc is a directory?\n");
}
if (r_str_endswith (prjDir, ".d")) {
eprintf ("Upgrading project...\n");
#if TRANSITION
r_file_rm (scriptPath);
r_sys_mkdirp (prjDir);
eprintf ("Please remove: rm -rf %s %s.d\n", prjName, prjName);
char *rc = r_str_newf ("%s" R_SYS_DIR "rc", prjDir);
if (!rc) {
free (prjDir);
free (scriptPath);
return false;
}
free (scriptPath);
scriptPath = rc;
free (prjDir);
prjDir = r_file_dirname (scriptPath);
#endif
}
}
if (!prjDir) {
prjDir = strdup (prjName);
}
if (!r_file_exists (prjDir)) {
r_sys_mkdirp (prjDir);
}
if (r_config_get_i (core->config, "scr.null")) {
r_config_set_i (core->config, "scr.null", false);
scr_null = true;
}
make_projects_directory (core);
Sdb *rop_db = sdb_ns (core->sdb, "rop", false);
if (rop_db) {
/* set filepath for all the rop sub-dbs */
ls_foreach (rop_db->ns, it, ns) {
char *rop_path = r_str_newf ("%s" R_SYS_DIR "rop.d" R_SYS_DIR "%s", prjDir, ns->name);
sdb_file (ns->sdb, rop_path);
sdb_sync (ns->sdb);
free (rop_path);
}
}
const char *oldPrjNameC = r_config_get (core->config, "prj.name");
if (oldPrjNameC) {
oldPrjName = strdup (oldPrjNameC);
}
r_config_set (core->config, "prj.name", prjName);
if (r_config_get_i (core->config, "prj.simple")) {
if (!simple_project_save_script (core, scriptPath, R_CORE_PRJ_ALL)) {
eprintf ("Cannot open '%s' for writing\n", prjName);
ret = false;
}
} else {
if (!project_save_script (core, scriptPath, R_CORE_PRJ_ALL)) {
eprintf ("Cannot open '%s' for writing\n", prjName);
ret = false;
}
}
if (r_config_get_i (core->config, "prj.files")) {
eprintf ("TODO: prj.files: support copying more than one file into the project directory\n");
char *binFile = r_core_project_info (core, prjName);
const char *binFileName = r_file_basename (binFile);
char *prjBinDir = r_str_newf ("%s" R_SYS_DIR "bin", prjDir);
char *prjBinFile = r_str_newf ("%s" R_SYS_DIR "%s", prjBinDir, binFileName);
r_sys_mkdirp (prjBinDir);
if (!r_file_copy (binFile, prjBinFile)) {
eprintf ("Warning: Cannot copy '%s' into '%s'\n", binFile, prjBinFile);
}
free (prjBinFile);
free (prjBinDir);
free (binFile);
}
if (r_config_get_i (core->config, "prj.git")) {
char *cwd = r_sys_getdir ();
char *gitDir = r_str_newf ("%s" R_SYS_DIR ".git", prjDir);
if (r_sys_chdir (prjDir)) {
if (!r_file_is_directory (gitDir)) {
r_sys_cmd ("git init");
}
r_sys_cmd ("git add * ; git commit -a");
} else {
eprintf ("Cannot chdir %s\n", prjDir);
}
r_sys_chdir (cwd);
free (gitDir);
free (cwd);
}
if (r_config_get_i (core->config, "prj.zip")) {
char *cwd = r_sys_getdir ();
const char *prjName = r_file_basename (prjDir);
if (r_sys_chdir (prjDir)) {
if (!strchr (prjName, '\'')) {
r_sys_chdir ("..");
r_sys_cmdf ("rm -f '%s.zip'; zip -r '%s'.zip '%s'",
prjName, prjName, prjName);
} else {
eprintf ("Command injection attempt?\n");
}
} else {
eprintf ("Cannot chdir %s\n", prjDir);
}
r_sys_chdir (cwd);
free (cwd);
}
// LEAK : not always in heap free (prjName);
free (prjDir);
if (scr_null) {
r_config_set_i (core->config, "scr.null", true);
}
if (!ret && oldPrjName) {
// reset prj.name on fail
r_config_set (core->config, "prj.name", oldPrjName);
}
free (scriptPath);
free (oldPrjName);
return ret;
}
R_API char *r_core_project_notes_file(RCore *core, const char *prjName) {
char *notes_txt;
const char *prjdir = r_config_get (core->config, "dir.projects");
char *prjpath = r_file_abspath (prjdir);
notes_txt = r_str_newf ("%s"R_SYS_DIR "%s"R_SYS_DIR "notes.txt", prjpath, prjName);
free (prjpath);
return notes_txt;
}
R_API bool r_core_project_load(RCore *core, const char *prjName, const char *rcpath) {
const bool cfg_fortunes = r_config_get_i (core->config, "cfg.fortunes");
const bool scr_interactive = r_cons_is_interactive ();
const bool scr_prompt = r_config_get_i (core->config, "scr.prompt");
(void) load_project_rop (core, prjName);
bool ret = r_core_cmd_file (core, rcpath);
r_config_set_i (core->config, "cfg.fortunes", cfg_fortunes);
r_config_set_i (core->config, "scr.interactive", scr_interactive);
r_config_set_i (core->config, "scr.prompt", scr_prompt);
r_config_bump (core->config, "asm.arch");
return ret;
}
| Java |
// Copyright (c) 2012-2013 The Cryptonote developers
// Distributed under the MIT/X11 software license, see the accompanying
// file COPYING or http://www.opensource.org/licenses/mit-license.php.
#include <vector>
#include <iostream>
#include <sstream>
#include "include_base_utils.h"
#include "console_handler.h"
#include "p2p/net_node.h"
#include "currency_core/currency_basic.h"
#include "currency_core/currency_basic_impl.h"
#include "currency_core/currency_format_utils.h"
#include "currency_core/miner.h"
#include "chaingen.h"
using namespace std;
using namespace epee;
using namespace currency;
#define DIFF_UP_TIMESTAMP_DELTA 90
void test_generator::get_block_chain(std::vector<const block_info*>& blockchain, const crypto::hash& head, size_t n) const
{
crypto::hash curr = head;
while (null_hash != curr && blockchain.size() < n)
{
auto it = m_blocks_info.find(curr);
if (m_blocks_info.end() == it)
{
throw std::runtime_error("block hash wasn't found");
}
blockchain.push_back(&it->second);
curr = it->second.b.prev_id;
}
std::reverse(blockchain.begin(), blockchain.end());
}
void test_generator::get_last_n_block_sizes(std::vector<size_t>& block_sizes, const crypto::hash& head, size_t n) const
{
std::vector<const block_info*> blockchain;
get_block_chain(blockchain, head, n);
BOOST_FOREACH(auto& bi, blockchain)
{
block_sizes.push_back(bi->block_size);
}
}
uint64_t test_generator::get_already_generated_coins(const crypto::hash& blk_id) const
{
auto it = m_blocks_info.find(blk_id);
if (it == m_blocks_info.end())
throw std::runtime_error("block hash wasn't found");
return it->second.already_generated_coins;
}
uint64_t test_generator::get_already_donated_coins(const crypto::hash& blk_id) const
{
auto it = m_blocks_info.find(blk_id);
if (it == m_blocks_info.end())
throw std::runtime_error("block hash wasn't found");
return it->second.already_donated;
}
currency::wide_difficulty_type test_generator::get_block_difficulty(const crypto::hash& blk_id) const
{
auto it = m_blocks_info.find(blk_id);
if (it == m_blocks_info.end())
throw std::runtime_error("block hash wasn't found");
auto it_prev = m_blocks_info.find(it->second.b.prev_id);
if (it_prev == m_blocks_info.end())
throw std::runtime_error("block hash wasn't found");
return it->second.cumul_difficulty - it_prev->second.cumul_difficulty;
}
uint64_t test_generator::get_already_generated_coins(const currency::block& blk) const
{
crypto::hash blk_hash;
get_block_hash(blk, blk_hash);
return get_already_generated_coins(blk_hash);
}
void test_generator::add_block(const currency::block& blk, size_t tsx_size, std::vector<size_t>& block_sizes,
uint64_t already_generated_coins,
uint64_t already_donated_coins,
wide_difficulty_type cum_diff)
{
const size_t block_size = tsx_size + get_object_blobsize(blk.miner_tx);
uint64_t block_reward;
uint64_t max_donation;
get_block_reward(misc_utils::median(block_sizes), block_size, already_generated_coins, already_donated_coins, block_reward, max_donation);
uint64_t donation_for_block = 0;
m_blocks_info[get_block_hash(blk)] = block_info(blk, already_generated_coins + block_reward, already_donated_coins + donation_for_block, block_size, cum_diff);
}
bool test_generator::construct_block(currency::block& blk, uint64_t height, const crypto::hash& prev_id,
const currency::account_base& miner_acc, uint64_t timestamp, uint64_t already_generated_coins, uint64_t already_donated_coins,
std::vector<size_t>& block_sizes, const std::list<currency::transaction>& tx_list, const currency::alias_info& ai)
{
blk.major_version = CURRENT_BLOCK_MAJOR_VERSION;
blk.minor_version = CURRENT_BLOCK_MINOR_VERSION;
blk.flags = BLOCK_FLAGS_SUPPRESS_DONATION;
blk.timestamp = timestamp;
blk.prev_id = prev_id;
blk.tx_hashes.reserve(tx_list.size());
BOOST_FOREACH(const transaction &tx, tx_list)
{
crypto::hash tx_hash;
get_transaction_hash(tx, tx_hash);
blk.tx_hashes.push_back(tx_hash);
}
uint64_t total_fee = 0;
size_t txs_size = 0;
BOOST_FOREACH(auto& tx, tx_list)
{
uint64_t fee = 0;
bool r = get_tx_fee(tx, fee);
CHECK_AND_ASSERT_MES(r, false, "wrong transaction passed to construct_block");
total_fee += fee;
txs_size += get_object_blobsize(tx);
}
account_keys donation_acc = AUTO_VAL_INIT(donation_acc);
account_keys royalty_acc = AUTO_VAL_INIT(royalty_acc);
get_donation_accounts(donation_acc, royalty_acc);
blk.miner_tx = AUTO_VAL_INIT(blk.miner_tx);
size_t target_block_size = txs_size + get_object_blobsize(blk.miner_tx);
while (true)
{
if (!construct_miner_tx(height, misc_utils::median(block_sizes),
already_generated_coins,
already_donated_coins,
target_block_size,
total_fee,
miner_acc.get_keys().m_account_address,
donation_acc.m_account_address,
royalty_acc.m_account_address,
blk.miner_tx,
blobdata(),
10,
0,
ai))
return false;
size_t actual_block_size = txs_size + get_object_blobsize(blk.miner_tx);
if (target_block_size < actual_block_size)
{
target_block_size = actual_block_size;
}
else if (actual_block_size < target_block_size)
{
size_t delta = target_block_size - actual_block_size;
blk.miner_tx.extra.resize(blk.miner_tx.extra.size() + delta, 0);
actual_block_size = txs_size + get_object_blobsize(blk.miner_tx);
if (actual_block_size == target_block_size)
{
break;
}
else
{
CHECK_AND_ASSERT_MES(target_block_size < actual_block_size, false, "Unexpected block size");
delta = actual_block_size - target_block_size;
blk.miner_tx.extra.resize(blk.miner_tx.extra.size() - delta);
actual_block_size = txs_size + get_object_blobsize(blk.miner_tx);
if (actual_block_size == target_block_size)
{
break;
}
else
{
CHECK_AND_ASSERT_MES(actual_block_size < target_block_size, false, "Unexpected block size");
blk.miner_tx.extra.resize(blk.miner_tx.extra.size() + delta, 0);
target_block_size = txs_size + get_object_blobsize(blk.miner_tx);
}
}
}
else
{
break;
}
}
//blk.tree_root_hash = get_tx_tree_hash(blk);
std::vector<const block_info*> blocks;
get_block_chain(blocks, blk.prev_id, std::numeric_limits<size_t>::max());
wide_difficulty_type a_diffic = get_difficulty_for_next_block(blocks);
// Nonce search...
blk.nonce = 0;
while (!find_nounce(blk, blocks, a_diffic, height))
blk.timestamp++;
add_block(blk, txs_size, block_sizes, already_generated_coins, already_donated_coins, blocks.size() ? blocks.back()->cumul_difficulty + a_diffic: a_diffic);
return true;
}
currency::wide_difficulty_type test_generator::get_difficulty_for_next_block(const crypto::hash& head_id)
{
std::vector<const block_info*> blocks;
get_block_chain(blocks, head_id, std::numeric_limits<size_t>::max());
return get_difficulty_for_next_block(blocks);
}
currency::wide_difficulty_type test_generator::get_difficulty_for_next_block(const std::vector<const block_info*>& blocks)
{
std::vector<uint64_t> timestamps;
std::vector<wide_difficulty_type> commulative_difficulties;
size_t offset = blocks.size() - std::min(blocks.size(), static_cast<size_t>(DIFFICULTY_BLOCKS_COUNT));
if(!offset)
++offset;//skip genesis block
for(; offset < blocks.size(); offset++)
{
timestamps.push_back(blocks[offset]->b.timestamp);
commulative_difficulties.push_back(blocks[offset]->cumul_difficulty);
}
return next_difficulty(timestamps, commulative_difficulties);
}
bool test_generator::find_nounce(block& blk, std::vector<const block_info*>& blocks, wide_difficulty_type dif, uint64_t height)
{
if(height != blocks.size())
throw std::runtime_error("wrong height in find_nounce");
std::vector<crypto::hash> scratchpad_local;
size_t count = 1;
for(auto& i: blocks)
{
push_block_scratchpad_data(i->b, scratchpad_local);
#ifdef ENABLE_HASHING_DEBUG
LOG_PRINT2("block_generation.log", "SCRATCHPAD_SHOT FOR H=" << count << ENDL << dump_scratchpad(scratchpad_local), LOG_LEVEL_3);
#endif
++count;
}
bool r = miner::find_nonce_for_given_block(blk, dif, height, [&](uint64_t index) -> crypto::hash&
{
return scratchpad_local[index%scratchpad_local.size()];
});
#ifdef ENABLE_HASHING_DEBUG
size_t call_no = 0;
std::stringstream ss;
crypto::hash pow = get_block_longhash(blk, height, [&](uint64_t index) -> crypto::hash&
{
ss << "[" << call_no << "][" << index << "%" << scratchpad_local.size() <<"(" << index%scratchpad_local.size() << ")]" << scratchpad_local[index%scratchpad_local.size()] << ENDL;
++call_no;
return scratchpad_local[index%scratchpad_local.size()];
});
LOG_PRINT2("block_generation.log", "ID: " << get_block_hash(blk) << "[" << height << "]" << ENDL << "POW:" << pow << ENDL << ss.str(), LOG_LEVEL_3);
#endif
return r;
}
bool test_generator::construct_block(currency::block& blk, const currency::account_base& miner_acc, uint64_t timestamp, const currency::alias_info& ai)
{
std::vector<size_t> block_sizes;
std::list<currency::transaction> tx_list;
return construct_block(blk, 0, null_hash, miner_acc, timestamp, 0, 0, block_sizes, tx_list, ai);
}
bool test_generator::construct_block(currency::block& blk, const currency::block& blk_prev,
const currency::account_base& miner_acc,
const std::list<currency::transaction>& tx_list, const currency::alias_info& ai)
{
uint64_t height = boost::get<txin_gen>(blk_prev.miner_tx.vin.front()).height + 1;
crypto::hash prev_id = get_block_hash(blk_prev);
// Keep push difficulty little up to be sure about PoW hash success
uint64_t timestamp = height > 10 ? blk_prev.timestamp + DIFFICULTY_BLOCKS_ESTIMATE_TIMESPAN: blk_prev.timestamp + DIFFICULTY_BLOCKS_ESTIMATE_TIMESPAN - DIFF_UP_TIMESTAMP_DELTA;
uint64_t already_generated_coins = get_already_generated_coins(prev_id);
uint64_t already_donated_coins = get_already_donated_coins(prev_id);
std::vector<size_t> block_sizes;
get_last_n_block_sizes(block_sizes, prev_id, CURRENCY_REWARD_BLOCKS_WINDOW);
return construct_block(blk, height, prev_id, miner_acc, timestamp, already_generated_coins, already_donated_coins, block_sizes, tx_list, ai);
}
bool test_generator::construct_block_manually(block& blk, const block& prev_block, const account_base& miner_acc,
int actual_params/* = bf_none*/, uint8_t major_ver/* = 0*/,
uint8_t minor_ver/* = 0*/, uint64_t timestamp/* = 0*/,
const crypto::hash& prev_id/* = crypto::hash()*/, const wide_difficulty_type& diffic/* = 1*/,
const transaction& miner_tx/* = transaction()*/,
const std::vector<crypto::hash>& tx_hashes/* = std::vector<crypto::hash>()*/,
size_t txs_sizes/* = 0*/)
{
size_t height = get_block_height(prev_block) + 1;
blk.flags = BLOCK_FLAGS_SUPPRESS_DONATION;
blk.major_version = actual_params & bf_major_ver ? major_ver : CURRENT_BLOCK_MAJOR_VERSION;
blk.minor_version = actual_params & bf_minor_ver ? minor_ver : CURRENT_BLOCK_MINOR_VERSION;
blk.timestamp = actual_params & bf_timestamp ? timestamp : (height > 10 ? prev_block.timestamp + DIFFICULTY_BLOCKS_ESTIMATE_TIMESPAN: prev_block.timestamp + DIFFICULTY_BLOCKS_ESTIMATE_TIMESPAN-DIFF_UP_TIMESTAMP_DELTA); // Keep difficulty unchanged
blk.prev_id = actual_params & bf_prev_id ? prev_id : get_block_hash(prev_block);
blk.tx_hashes = actual_params & bf_tx_hashes ? tx_hashes : std::vector<crypto::hash>();
uint64_t already_generated_coins = get_already_generated_coins(prev_block);
uint64_t already_donated_coins = get_already_donated_coins(get_block_hash(prev_block));
std::vector<size_t> block_sizes;
get_last_n_block_sizes(block_sizes, get_block_hash(prev_block), CURRENCY_REWARD_BLOCKS_WINDOW);
if (actual_params & bf_miner_tx)
{
blk.miner_tx = miner_tx;
}
else
{
size_t current_block_size = txs_sizes + get_object_blobsize(blk.miner_tx);
// TODO: This will work, until size of constructed block is less then CURRENCY_BLOCK_GRANTED_FULL_REWARD_ZONE
if (!construct_miner_tx(height, misc_utils::median(block_sizes), already_generated_coins, current_block_size, 0, miner_acc.get_keys().m_account_address, blk.miner_tx, blobdata(), 1))
return false;
}
//blk.tree_root_hash = get_tx_tree_hash(blk);
std::vector<const block_info*> blocks;
get_block_chain(blocks, blk.prev_id, std::numeric_limits<size_t>::max());
wide_difficulty_type a_diffic = actual_params & bf_diffic ? diffic : get_difficulty_for_next_block(blocks);
find_nounce(blk, blocks, a_diffic, height);
add_block(blk, txs_sizes, block_sizes, already_generated_coins, already_donated_coins, blocks.size() ? blocks.back()->cumul_difficulty + a_diffic: a_diffic);
return true;
}
bool test_generator::construct_block_manually_tx(currency::block& blk, const currency::block& prev_block,
const currency::account_base& miner_acc,
const std::vector<crypto::hash>& tx_hashes, size_t txs_size)
{
return construct_block_manually(blk, prev_block, miner_acc, bf_tx_hashes, 0, 0, 0, crypto::hash(), 0, transaction(), tx_hashes, txs_size);
}
struct output_index {
const currency::txout_target_v out;
uint64_t amount;
size_t blk_height; // block height
size_t tx_no; // index of transaction in block
size_t out_no; // index of out in transaction
size_t idx;
bool spent;
const currency::block *p_blk;
const currency::transaction *p_tx;
output_index(const currency::txout_target_v &_out, uint64_t _a, size_t _h, size_t tno, size_t ono, const currency::block *_pb, const currency::transaction *_pt)
: out(_out), amount(_a), blk_height(_h), tx_no(tno), out_no(ono), idx(0), spent(false), p_blk(_pb), p_tx(_pt) { }
output_index(const output_index &other)
: out(other.out), amount(other.amount), blk_height(other.blk_height), tx_no(other.tx_no), out_no(other.out_no), idx(other.idx), spent(other.spent), p_blk(other.p_blk), p_tx(other.p_tx) { }
const std::string toString() const {
std::stringstream ss;
ss << "output_index{blk_height=" << blk_height
<< " tx_no=" << tx_no
<< " out_no=" << out_no
<< " amount=" << amount
<< " idx=" << idx
<< " spent=" << spent
<< "}";
return ss.str();
}
output_index& operator=(const output_index& other)
{
new(this) output_index(other);
return *this;
}
};
typedef std::map<uint64_t, std::vector<size_t> > map_output_t;
typedef std::map<uint64_t, std::vector<output_index> > map_output_idx_t;
typedef pair<uint64_t, size_t> outloc_t;
namespace
{
uint64_t get_inputs_amount(const vector<tx_source_entry> &s)
{
uint64_t r = 0;
BOOST_FOREACH(const tx_source_entry &e, s)
{
r += e.amount;
}
return r;
}
}
bool init_output_indices(map_output_idx_t& outs, std::map<uint64_t, std::vector<size_t> >& outs_mine, const std::vector<currency::block>& blockchain, const map_hash2tx_t& mtx, const currency::account_base& from) {
BOOST_FOREACH (const block& blk, blockchain) {
vector<const transaction*> vtx;
vtx.push_back(&blk.miner_tx);
BOOST_FOREACH(const crypto::hash &h, blk.tx_hashes) {
const map_hash2tx_t::const_iterator cit = mtx.find(h);
if (mtx.end() == cit)
throw std::runtime_error("block contains an unknown tx hash");
vtx.push_back(cit->second);
}
//vtx.insert(vtx.end(), blk.);
// TODO: add all other txes
for (size_t i = 0; i < vtx.size(); i++) {
const transaction &tx = *vtx[i];
for (size_t j = 0; j < tx.vout.size(); ++j) {
const tx_out &out = tx.vout[j];
output_index oi(out.target, out.amount, boost::get<txin_gen>(*blk.miner_tx.vin.begin()).height, i, j, &blk, vtx[i]);
if (2 == out.target.which()) { // out_to_key
outs[out.amount].push_back(oi);
size_t tx_global_idx = outs[out.amount].size() - 1;
outs[out.amount][tx_global_idx].idx = tx_global_idx;
// Is out to me?
if (is_out_to_acc(from.get_keys(), boost::get<txout_to_key>(out.target), get_tx_pub_key_from_extra(tx), j)) {
outs_mine[out.amount].push_back(tx_global_idx);
}
}
}
}
}
return true;
}
bool init_spent_output_indices(map_output_idx_t& outs, map_output_t& outs_mine, const std::vector<currency::block>& blockchain, const map_hash2tx_t& mtx, const currency::account_base& from) {
BOOST_FOREACH (const map_output_t::value_type &o, outs_mine) {
for (size_t i = 0; i < o.second.size(); ++i) {
output_index &oi = outs[o.first][o.second[i]];
// construct key image for this output
crypto::key_image img;
keypair in_ephemeral;
generate_key_image_helper(from.get_keys(), get_tx_pub_key_from_extra(*oi.p_tx), oi.out_no, in_ephemeral, img);
// lookup for this key image in the events vector
BOOST_FOREACH(auto& tx_pair, mtx) {
const transaction& tx = *tx_pair.second;
BOOST_FOREACH(const txin_v &in, tx.vin) {
if (typeid(txin_to_key) == in.type()) {
const txin_to_key &itk = boost::get<txin_to_key>(in);
if (itk.k_image == img) {
oi.spent = true;
}
}
}
}
}
}
return true;
}
bool fill_output_entries(std::vector<output_index>& out_indices,
size_t sender_out, size_t nmix, uint64_t& real_entry_idx,
std::vector<tx_source_entry::output_entry>& output_entries)
{
if (out_indices.size() <= nmix)
return false;
bool sender_out_found = false;
size_t rest = nmix;
for (size_t i = 0; i < out_indices.size() && (0 < rest || !sender_out_found); ++i)
{
const output_index& oi = out_indices[i];
if (oi.spent)
continue;
bool append = false;
if (i == sender_out)
{
append = true;
sender_out_found = true;
real_entry_idx = output_entries.size();
}
else if (0 < rest)
{
if(boost::get<txout_to_key>(oi.out).mix_attr == CURRENCY_TO_KEY_OUT_FORCED_NO_MIX || boost::get<txout_to_key>(oi.out).mix_attr > nmix+1)
continue;
--rest;
append = true;
}
if (append)
{
const txout_to_key& otk = boost::get<txout_to_key>(oi.out);
output_entries.push_back(tx_source_entry::output_entry(oi.idx, otk.key));
}
}
return 0 == rest && sender_out_found;
}
bool fill_tx_sources(std::vector<tx_source_entry>& sources, const std::vector<test_event_entry>& events,
const block& blk_head, const currency::account_base& from, uint64_t amount, size_t nmix, bool check_for_spends = true)
{
map_output_idx_t outs;
map_output_t outs_mine;
std::vector<currency::block> blockchain;
map_hash2tx_t mtx;
if (!find_block_chain(events, blockchain, mtx, get_block_hash(blk_head)))
return false;
if (!init_output_indices(outs, outs_mine, blockchain, mtx, from))
return false;
if(check_for_spends)
{
if (!init_spent_output_indices(outs, outs_mine, blockchain, mtx, from))
return false;
}
// Iterate in reverse is more efficiency
uint64_t sources_amount = 0;
bool sources_found = false;
BOOST_REVERSE_FOREACH(const map_output_t::value_type o, outs_mine)
{
for (size_t i = 0; i < o.second.size() && !sources_found; ++i)
{
size_t sender_out = o.second[i];
const output_index& oi = outs[o.first][sender_out];
if (oi.spent)
continue;
currency::tx_source_entry ts;
ts.amount = oi.amount;
ts.real_output_in_tx_index = oi.out_no;
ts.real_out_tx_key = get_tx_pub_key_from_extra(*oi.p_tx); // incoming tx public key
if (!fill_output_entries(outs[o.first], sender_out, nmix, ts.real_output, ts.outputs))
continue;
sources.push_back(ts);
sources_amount += ts.amount;
sources_found = amount <= sources_amount;
}
if (sources_found)
break;
}
return sources_found;
}
bool fill_tx_destination(tx_destination_entry &de, const currency::account_base &to, uint64_t amount) {
de.addr = to.get_keys().m_account_address;
de.amount = amount;
return true;
}
void fill_tx_sources_and_destinations(const std::vector<test_event_entry>& events, const block& blk_head,
const currency::account_base& from, const currency::account_base& to,
uint64_t amount, uint64_t fee, size_t nmix, std::vector<tx_source_entry>& sources,
std::vector<tx_destination_entry>& destinations,
bool check_for_spends)
{
sources.clear();
destinations.clear();
if (!fill_tx_sources(sources, events, blk_head, from, amount + fee, nmix, check_for_spends))
throw std::runtime_error("couldn't fill transaction sources");
tx_destination_entry de;
if (!fill_tx_destination(de, to, amount))
throw std::runtime_error("couldn't fill transaction destination");
destinations.push_back(de);
tx_destination_entry de_change;
uint64_t cache_back = get_inputs_amount(sources) - (amount + fee);
if (0 < cache_back)
{
if (!fill_tx_destination(de_change, from, cache_back))
throw std::runtime_error("couldn't fill transaction cache back destination");
destinations.push_back(de_change);
}
}
/*
void fill_nonce(currency::block& blk, const wide_difficulty_type& diffic, uint64_t height)
{
blk.nonce = 0;
while (!miner::find_nonce_for_given_block(blk, diffic, height))
blk.timestamp++;
}*/
bool construct_miner_tx_manually(size_t height, uint64_t already_generated_coins,
const account_public_address& miner_address, transaction& tx, uint64_t fee,
keypair* p_txkey/* = 0*/)
{
keypair txkey;
txkey = keypair::generate();
add_tx_pub_key_to_extra(tx, txkey.pub);
if (0 != p_txkey)
*p_txkey = txkey;
txin_gen in;
in.height = height;
tx.vin.push_back(in);
// This will work, until size of constructed block is less then CURRENCY_BLOCK_GRANTED_FULL_REWARD_ZONE
uint64_t block_reward;
uint64_t max_donation;
if (!get_block_reward(0, 0, already_generated_coins, 0, block_reward, max_donation))
{
LOG_PRINT_L0("Block is too big");
return false;
}
block_reward += fee;
crypto::key_derivation derivation;
crypto::public_key out_eph_public_key;
crypto::generate_key_derivation(miner_address.m_view_public_key, txkey.sec, derivation);
crypto::derive_public_key(derivation, 0, miner_address.m_spend_public_key, out_eph_public_key);
tx_out out;
out.amount = block_reward;
out.target = txout_to_key(out_eph_public_key);
tx.vout.push_back(out);
tx.version = CURRENT_TRANSACTION_VERSION;
tx.unlock_time = height + CURRENCY_MINED_MONEY_UNLOCK_WINDOW;
return true;
}
bool construct_tx_to_key(const std::vector<test_event_entry>& events, currency::transaction& tx, const block& blk_head,
const currency::account_base& from, const currency::account_base& to, uint64_t amount,
uint64_t fee, size_t nmix, uint8_t mix_attr, bool check_for_spends)
{
vector<tx_source_entry> sources;
vector<tx_destination_entry> destinations;
fill_tx_sources_and_destinations(events, blk_head, from, to, amount, fee, nmix, sources, destinations, check_for_spends);
return construct_tx(from.get_keys(), sources, destinations, tx, 0, mix_attr);
}
transaction construct_tx_with_fee(std::vector<test_event_entry>& events, const block& blk_head,
const account_base& acc_from, const account_base& acc_to, uint64_t amount, uint64_t fee)
{
transaction tx;
construct_tx_to_key(events, tx, blk_head, acc_from, acc_to, amount, fee, 0);
events.push_back(tx);
return tx;
}
uint64_t get_balance(const currency::account_base& addr, const std::vector<currency::block>& blockchain, const map_hash2tx_t& mtx) {
uint64_t res = 0;
std::map<uint64_t, std::vector<output_index> > outs;
std::map<uint64_t, std::vector<size_t> > outs_mine;
map_hash2tx_t confirmed_txs;
get_confirmed_txs(blockchain, mtx, confirmed_txs);
if (!init_output_indices(outs, outs_mine, blockchain, confirmed_txs, addr))
return false;
if (!init_spent_output_indices(outs, outs_mine, blockchain, confirmed_txs, addr))
return false;
BOOST_FOREACH (const map_output_t::value_type &o, outs_mine) {
for (size_t i = 0; i < o.second.size(); ++i) {
if (outs[o.first][o.second[i]].spent)
continue;
res += outs[o.first][o.second[i]].amount;
}
}
return res;
}
void get_confirmed_txs(const std::vector<currency::block>& blockchain, const map_hash2tx_t& mtx, map_hash2tx_t& confirmed_txs)
{
std::unordered_set<crypto::hash> confirmed_hashes;
BOOST_FOREACH(const block& blk, blockchain)
{
BOOST_FOREACH(const crypto::hash& tx_hash, blk.tx_hashes)
{
confirmed_hashes.insert(tx_hash);
}
}
BOOST_FOREACH(const auto& tx_pair, mtx)
{
if (0 != confirmed_hashes.count(tx_pair.first))
{
confirmed_txs.insert(tx_pair);
}
}
}
bool find_block_chain(const std::vector<test_event_entry>& events, std::vector<currency::block>& blockchain, map_hash2tx_t& mtx, const crypto::hash& head) {
std::unordered_map<crypto::hash, const block*> block_index;
BOOST_FOREACH(const test_event_entry& ev, events)
{
if (typeid(block) == ev.type())
{
const block* blk = &boost::get<block>(ev);
block_index[get_block_hash(*blk)] = blk;
}
else if (typeid(transaction) == ev.type())
{
const transaction& tx = boost::get<transaction>(ev);
mtx[get_transaction_hash(tx)] = &tx;
}
}
bool b_success = false;
crypto::hash id = head;
for (auto it = block_index.find(id); block_index.end() != it; it = block_index.find(id))
{
blockchain.push_back(*it->second);
id = it->second->prev_id;
if (null_hash == id)
{
b_success = true;
break;
}
}
reverse(blockchain.begin(), blockchain.end());
return b_success;
}
void test_chain_unit_base::register_callback(const std::string& cb_name, verify_callback cb)
{
m_callbacks[cb_name] = cb;
}
bool test_chain_unit_base::verify(const std::string& cb_name, currency::core& c, size_t ev_index, const std::vector<test_event_entry> &events)
{
auto cb_it = m_callbacks.find(cb_name);
if(cb_it == m_callbacks.end())
{
LOG_ERROR("Failed to find callback " << cb_name);
return false;
}
return cb_it->second(c, ev_index, events);
}
| Java |
// -*- mode: c++; c-basic-style: "bsd"; c-basic-offset: 4; -*-
/*
* ecore/EParameterImpl.cpp
* Copyright (C) Cátedra SAES-UMU 2010 <[email protected]>
*
* EMF4CPP is free software: you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as published
* by the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* EMF4CPP is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
* See the GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "EParameter.hpp"
#include <ecore/EcorePackage.hpp>
#include <ecore/ETypedElement.hpp>
#include <ecore/EAnnotation.hpp>
#include <ecore/EClassifier.hpp>
#include <ecore/EGenericType.hpp>
#include <ecore/EOperation.hpp>
#include <ecore/EObject.hpp>
#include <ecore/EClass.hpp>
#include <ecore/EStructuralFeature.hpp>
#include <ecore/EReference.hpp>
#include <ecore/EObject.hpp>
#include <ecorecpp/mapping.hpp>
using namespace ::ecore;
/*PROTECTED REGION ID(EParameterImpl.cpp) START*/
// Please, enable the protected region if you add manually written code.
// To do this, add the keyword ENABLED before START.
/*PROTECTED REGION END*/
void EParameter::_initialize()
{
// Supertypes
::ecore::ETypedElement::_initialize();
// Rerefences
/*PROTECTED REGION ID(EParameterImpl__initialize) START*/
// Please, enable the protected region if you add manually written code.
// To do this, add the keyword ENABLED before START.
/*PROTECTED REGION END*/
}
// Operations
// EObject
::ecore::EJavaObject EParameter::eGet(::ecore::EInt _featureID,
::ecore::EBoolean _resolve)
{
::ecore::EJavaObject _any;
switch (_featureID)
{
case ::ecore::EcorePackage::EMODELELEMENT__EANNOTATIONS:
{
_any = m_eAnnotations->asEListOf< ::ecore::EObject > ();
}
return _any;
case ::ecore::EcorePackage::ENAMEDELEMENT__NAME:
{
::ecorecpp::mapping::any_traits< ::ecore::EString >::toAny(_any, m_name);
}
return _any;
case ::ecore::EcorePackage::ETYPEDELEMENT__ORDERED:
{
::ecorecpp::mapping::any_traits< ::ecore::EBoolean >::toAny(_any,
m_ordered);
}
return _any;
case ::ecore::EcorePackage::ETYPEDELEMENT__UNIQUE:
{
::ecorecpp::mapping::any_traits< ::ecore::EBoolean >::toAny(_any,
m_unique);
}
return _any;
case ::ecore::EcorePackage::ETYPEDELEMENT__LOWERBOUND:
{
::ecorecpp::mapping::any_traits< ::ecore::EInt >::toAny(_any,
m_lowerBound);
}
return _any;
case ::ecore::EcorePackage::ETYPEDELEMENT__UPPERBOUND:
{
::ecorecpp::mapping::any_traits< ::ecore::EInt >::toAny(_any,
m_upperBound);
}
return _any;
case ::ecore::EcorePackage::ETYPEDELEMENT__ETYPE:
{
_any = static_cast< ::ecore::EObject* > (m_eType);
}
return _any;
case ::ecore::EcorePackage::ETYPEDELEMENT__EGENERICTYPE:
{
_any = static_cast< ::ecore::EObject* > (m_eGenericType);
}
return _any;
case ::ecore::EcorePackage::EPARAMETER__EOPERATION:
{
_any = static_cast< ::ecore::EObject* > (m_eOperation);
}
return _any;
}
throw "Error";
}
void EParameter::eSet(::ecore::EInt _featureID,
::ecore::EJavaObject const& _newValue)
{
switch (_featureID)
{
case ::ecore::EcorePackage::EMODELELEMENT__EANNOTATIONS:
{
::ecorecpp::mapping::EList_ptr _t0 =
::ecorecpp::mapping::any::any_cast<
::ecorecpp::mapping::EList_ptr >(_newValue);
::ecore::EModelElement::getEAnnotations().clear();
::ecore::EModelElement::getEAnnotations().insert_all(*_t0);
}
return;
case ::ecore::EcorePackage::ENAMEDELEMENT__NAME:
{
::ecorecpp::mapping::any_traits< ::ecore::EString >::fromAny(_newValue,
m_name);
}
return;
case ::ecore::EcorePackage::ETYPEDELEMENT__ORDERED:
{
::ecorecpp::mapping::any_traits< ::ecore::EBoolean >::fromAny(
_newValue, m_ordered);
}
return;
case ::ecore::EcorePackage::ETYPEDELEMENT__UNIQUE:
{
::ecorecpp::mapping::any_traits< ::ecore::EBoolean >::fromAny(
_newValue, m_unique);
}
return;
case ::ecore::EcorePackage::ETYPEDELEMENT__LOWERBOUND:
{
::ecorecpp::mapping::any_traits< ::ecore::EInt >::fromAny(_newValue,
m_lowerBound);
}
return;
case ::ecore::EcorePackage::ETYPEDELEMENT__UPPERBOUND:
{
::ecorecpp::mapping::any_traits< ::ecore::EInt >::fromAny(_newValue,
m_upperBound);
}
return;
case ::ecore::EcorePackage::ETYPEDELEMENT__ETYPE:
{
::ecore::EObject_ptr _t0 = ::ecorecpp::mapping::any::any_cast<
::ecore::EObject_ptr >(_newValue);
::ecore::EClassifier_ptr _t1 =
dynamic_cast< ::ecore::EClassifier_ptr > (_t0);
::ecore::ETypedElement::setEType(_t1);
}
return;
case ::ecore::EcorePackage::ETYPEDELEMENT__EGENERICTYPE:
{
::ecore::EObject_ptr _t0 = ::ecorecpp::mapping::any::any_cast<
::ecore::EObject_ptr >(_newValue);
::ecore::EGenericType_ptr _t1 =
dynamic_cast< ::ecore::EGenericType_ptr > (_t0);
::ecore::ETypedElement::setEGenericType(_t1);
}
return;
case ::ecore::EcorePackage::EPARAMETER__EOPERATION:
{
::ecore::EObject_ptr _t0 = ::ecorecpp::mapping::any::any_cast<
::ecore::EObject_ptr >(_newValue);
::ecore::EOperation_ptr _t1 =
dynamic_cast< ::ecore::EOperation_ptr > (_t0);
::ecore::EParameter::setEOperation(_t1);
}
return;
}
throw "Error";
}
::ecore::EBoolean EParameter::eIsSet(::ecore::EInt _featureID)
{
switch (_featureID)
{
case ::ecore::EcorePackage::EMODELELEMENT__EANNOTATIONS:
return m_eAnnotations && m_eAnnotations->size();
case ::ecore::EcorePackage::ENAMEDELEMENT__NAME:
return ::ecorecpp::mapping::set_traits< ::ecore::EString >::is_set(
m_name);
case ::ecore::EcorePackage::ETYPEDELEMENT__ORDERED:
return m_ordered != true;
case ::ecore::EcorePackage::ETYPEDELEMENT__UNIQUE:
return m_unique != true;
case ::ecore::EcorePackage::ETYPEDELEMENT__LOWERBOUND:
return ::ecorecpp::mapping::set_traits< ::ecore::EInt >::is_set(
m_lowerBound);
case ::ecore::EcorePackage::ETYPEDELEMENT__UPPERBOUND:
return m_upperBound != 1;
case ::ecore::EcorePackage::ETYPEDELEMENT__MANY:
return ::ecorecpp::mapping::set_traits< ::ecore::EBoolean >::is_set(
m_many);
case ::ecore::EcorePackage::ETYPEDELEMENT__REQUIRED:
return ::ecorecpp::mapping::set_traits< ::ecore::EBoolean >::is_set(
m_required);
case ::ecore::EcorePackage::ETYPEDELEMENT__ETYPE:
return m_eType;
case ::ecore::EcorePackage::ETYPEDELEMENT__EGENERICTYPE:
return m_eGenericType;
case ::ecore::EcorePackage::EPARAMETER__EOPERATION:
return m_eOperation;
}
throw "Error";
}
void EParameter::eUnset(::ecore::EInt _featureID)
{
switch (_featureID)
{
}
throw "Error";
}
::ecore::EClass_ptr EParameter::_eClass()
{
static ::ecore::EClass_ptr
_eclass =
dynamic_cast< ::ecore::EcorePackage_ptr > (::ecore::EcorePackage::_instance())->getEParameter();
return _eclass;
}
| Java |
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<TD BGCOLOR="white" CLASS="NavBarCell2"><FONT SIZE="-2">
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<TD BGCOLOR="white" CLASS="NavBarCell2"><FONT SIZE="-2">
<A HREF="../../../../../index.html" target="_top"><B>FRAMES</B></A>
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<SCRIPT type="text/javascript">
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| Java |
package org.kevoree.modeling.memory.struct.map.impl;
import org.kevoree.modeling.memory.struct.map.BaseKLongLongHashMapTest;
import org.kevoree.modeling.memory.struct.map.KLongLongMap;
public class ArrayLongLongHashMapTest extends BaseKLongLongHashMapTest {
@Override
public KLongLongMap createKLongLongHashMap(int p_initalCapacity, float p_loadFactor) {
return new ArrayLongLongMap(p_initalCapacity, p_loadFactor);
}
}
| Java |
/*
This source file is part of KBEngine
For the latest info, see http://www.kbengine.org/
Copyright (c) 2008-2012 KBEngine.
KBEngine is free software: you can redistribute it and/or modify
it under the terms of the GNU Lesser General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
KBEngine is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public License
along with KBEngine. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef KBE_INSTALL_PY_DLLS_HPP
#define KBE_INSTALL_PY_DLLS_HPP
namespace KBEngine{ namespace script{
bool install_py_dlls(void);
bool uninstall_py_dlls(void);
}
}
#endif // KBE_INSTALL_PY_DLLS_HPP
| Java |
package com.samepage.view;
import java.util.List;
import com.samepage.model.EmpDTO;
public class EmpView {
public static void print(String title, List<EmpDTO> emplist){
System.out.println(title + ">>========== ¿©·¯°Ç Ãâ·Â ===========<<");
for (EmpDTO empDTO : emplist) {
System.out.println(empDTO);
}
}
public static void printOne(String title, EmpDTO empDTO){
System.out.println(title + ">>========== ÇÑ°Ç Ãâ·Â ===========<<");
System.out.println(empDTO);
}
public static void sysMessage(String message){
System.out.println(message);
}
}
| Java |
#ifndef AIK_PROCESS_FUNC_H
#define AIK_PROCESS_FUNC_H
int proc_aikclient_init(void * sub_proc,void * para);
int proc_aikclient_start(void * sub_proc,void * para);
#endif
| Java |
/*
* FindBugs - Find bugs in Java programs
* Copyright (C) 2003,2004 University of Maryland
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
package edu.umd.cs.findbugs.detect;
import java.util.*;
import edu.umd.cs.findbugs.*;
import edu.umd.cs.findbugs.ba.AnalysisContext;
import edu.umd.cs.findbugs.ba.ClassContext;
import edu.umd.cs.findbugs.visitclass.AnnotationVisitor;
import org.apache.bcel.Repository;
import org.apache.bcel.classfile.*;
import edu.umd.cs.findbugs.visitclass.Constants2;
import static edu.umd.cs.findbugs.visitclass.Constants2.*;
public class NoteSuppressedWarnings extends AnnotationVisitor
implements Detector, Constants2 {
private static Set<String> packages = new HashSet<String>();
private SuppressionMatcher suppressionMatcher;
private BugReporter bugReporter;
private AnalysisContext analysisContext;
private NoteSuppressedWarnings recursiveDetector;
public NoteSuppressedWarnings(BugReporter bugReporter) {
this(bugReporter, false);
}
public NoteSuppressedWarnings(BugReporter bugReporter, boolean recursive) {
if (!recursive) {
DelegatingBugReporter b = (DelegatingBugReporter) bugReporter;
BugReporter origBugReporter = b.getRealBugReporter();
suppressionMatcher = new SuppressionMatcher();
BugReporter filterBugReporter = new FilterBugReporter(origBugReporter, suppressionMatcher, false);
b.setRealBugReporter(filterBugReporter);
recursiveDetector = new NoteSuppressedWarnings(bugReporter,true);
recursiveDetector.suppressionMatcher =
suppressionMatcher;
}
this.bugReporter = bugReporter;
}
public void setAnalysisContext(AnalysisContext analysisContext) {
this.analysisContext = analysisContext;
}
public void visitClassContext(ClassContext classContext) {
classContext.getJavaClass().accept(this);
}
public void visit(JavaClass obj) {
if (recursiveDetector == null) return;
try {
if (getClassName().endsWith("package-info")) return;
String packageName = getPackageName().replace('/', '.');
if (!packages.add(packageName)) return;
String packageInfo = "package-info";
if (packageName.length() > 0)
packageInfo = packageName + "." + packageInfo;
JavaClass packageInfoClass = Repository.lookupClass(packageInfo);
recursiveDetector.visitJavaClass(packageInfoClass);
} catch (ClassNotFoundException e) {
// ignore
}
}
public void visitAnnotation(String annotationClass, Map<String, Object> map,
boolean runtimeVisible) {
if (!annotationClass.endsWith("SuppressWarnings")) return;
Object value = map.get("value");
if (value == null || !(value instanceof Object[])) {
suppressWarning(null);
return;
}
Object [] suppressedWarnings = (Object[]) value;
if (suppressedWarnings.length == 0)
suppressWarning(null);
else for(int i = 0; i < suppressedWarnings.length; i++)
suppressWarning((String)suppressedWarnings[i]);
}
private void suppressWarning(String pattern) {
String className = getDottedClassName();
ClassAnnotation clazz = new ClassAnnotation(getDottedClassName());
if (className.endsWith("package-info") && recursiveDetector == null)
suppressionMatcher.addPackageSuppressor(
new PackageWarningSuppressor(pattern,
getPackageName().replace('/', '.')));
else if (visitingMethod())
suppressionMatcher.addSuppressor(
new MethodWarningSuppressor(pattern,
clazz, MethodAnnotation.fromVisitedMethod(this)));
else if (visitingField())
suppressionMatcher.addSuppressor(
new FieldWarningSuppressor(pattern,
clazz, FieldAnnotation.fromVisitedField(this)));
else
suppressionMatcher.addSuppressor(
new ClassWarningSuppressor(pattern,
clazz));
}
public void report() {
}
}
| Java |
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=UTF-8" /><title>AllNodeStep xref</title>
<link type="text/css" rel="stylesheet" href="../../../stylesheet.css" />
</head>
<body>
<div id="overview"><a href="../../../../apidocs/org/jaxen/expr/AllNodeStep.html">View Javadoc</a></div><pre>
<a name="1" href="#1">1</a> <em class="comment">/*</em>
<a name="2" href="#2">2</a> <em class="comment"> * $Header: /home/projects/jaxen/scm/jaxen/src/java/main/org/jaxen/expr/AllNodeStep.java,v 1.6 2006/11/08 15:41:05 elharo Exp $</em>
<a name="3" href="#3">3</a> <em class="comment"> * $Revision: 1.6 $</em>
<a name="4" href="#4">4</a> <em class="comment"> * $Date: 2006/11/08 15:41:05 $</em>
<a name="5" href="#5">5</a> <em class="comment"> *</em>
<a name="6" href="#6">6</a> <em class="comment"> * ====================================================================</em>
<a name="7" href="#7">7</a> <em class="comment"> *</em>
<a name="8" href="#8">8</a> <em class="comment"> * Copyright 2000-2002 bob mcwhirter & James Strachan.</em>
<a name="9" href="#9">9</a> <em class="comment"> * All rights reserved.</em>
<a name="10" href="#10">10</a> <em class="comment"> *</em>
<a name="11" href="#11">11</a> <em class="comment"> * Redistribution and use in source and binary forms, with or without</em>
<a name="12" href="#12">12</a> <em class="comment"> * modification, are permitted provided that the following conditions are</em>
<a name="13" href="#13">13</a> <em class="comment"> * met:</em>
<a name="14" href="#14">14</a> <em class="comment"> * </em>
<a name="15" href="#15">15</a> <em class="comment"> * * Redistributions of source code must retain the above copyright</em>
<a name="16" href="#16">16</a> <em class="comment"> * notice, this list of conditions and the following disclaimer.</em>
<a name="17" href="#17">17</a> <em class="comment"> * </em>
<a name="18" href="#18">18</a> <em class="comment"> * * Redistributions in binary form must reproduce the above copyright</em>
<a name="19" href="#19">19</a> <em class="comment"> * notice, this list of conditions and the following disclaimer in the</em>
<a name="20" href="#20">20</a> <em class="comment"> * documentation and/or other materials provided with the distribution.</em>
<a name="21" href="#21">21</a> <em class="comment"> * </em>
<a name="22" href="#22">22</a> <em class="comment"> * * Neither the name of the Jaxen Project nor the names of its</em>
<a name="23" href="#23">23</a> <em class="comment"> * contributors may be used to endorse or promote products derived </em>
<a name="24" href="#24">24</a> <em class="comment"> * from this software without specific prior written permission.</em>
<a name="25" href="#25">25</a> <em class="comment"> * </em>
<a name="26" href="#26">26</a> <em class="comment"> * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS</em>
<a name="27" href="#27">27</a> <em class="comment"> * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</em>
<a name="28" href="#28">28</a> <em class="comment"> * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</em>
<a name="29" href="#29">29</a> <em class="comment"> * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER</em>
<a name="30" href="#30">30</a> <em class="comment"> * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,</em>
<a name="31" href="#31">31</a> <em class="comment"> * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,</em>
<a name="32" href="#32">32</a> <em class="comment"> * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR</em>
<a name="33" href="#33">33</a> <em class="comment"> * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF</em>
<a name="34" href="#34">34</a> <em class="comment"> * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING</em>
<a name="35" href="#35">35</a> <em class="comment"> * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</em>
<a name="36" href="#36">36</a> <em class="comment"> * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</em>
<a name="37" href="#37">37</a> <em class="comment"> *</em>
<a name="38" href="#38">38</a> <em class="comment"> * ====================================================================</em>
<a name="39" href="#39">39</a> <em class="comment"> * This software consists of voluntary contributions made by many </em>
<a name="40" href="#40">40</a> <em class="comment"> * individuals on behalf of the Jaxen Project and was originally </em>
<a name="41" href="#41">41</a> <em class="comment"> * created by bob mcwhirter <[email protected]> and </em>
<a name="42" href="#42">42</a> <em class="comment"> * James Strachan <[email protected]>. For more information on the </em>
<a name="43" href="#43">43</a> <em class="comment"> * Jaxen Project, please see <<a href="http://www.jaxen.org/" target="alexandria_uri">http://www.jaxen.org/</a>>.</em>
<a name="44" href="#44">44</a> <em class="comment"> * </em>
<a name="45" href="#45">45</a> <em class="comment"> * $Id: AllNodeStep.java,v 1.6 2006/11/08 15:41:05 elharo Exp $</em>
<a name="46" href="#46">46</a> <em class="comment"> */</em>
<a name="47" href="#47">47</a> <strong>package</strong> <a href="../../../org/jaxen/expr/package-summary.html">org.jaxen.expr</a>;
<a name="48" href="#48">48</a>
<a name="49" href="#49">49</a>
<a name="50" href="#50">50</a> <em>/**<em>*</em></em>
<a name="51" href="#51">51</a> <em> * Represents the XPath node-test <code>node()</code>.</em>
<a name="52" href="#52">52</a> <em> * </em>
<a name="53" href="#53">53</a> <em> */</em>
<a name="54" href="#54">54</a> <strong>public</strong> <strong>interface</strong> <a href="../../../org/jaxen/expr/AllNodeStep.html">AllNodeStep</a> <strong>extends</strong> <a href="../../../org/jaxen/expr/Step.html">Step</a>
<a name="55" href="#55">55</a> {
<a name="56" href="#56">56</a> }
</pre>
<hr/><div id="footer">This page was automatically generated by <a href="http://maven.apache.org/">Maven</a></div></body>
</html>
| Java |
/*
* Copyright © 2009 Adrian Johnson
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy,
* modify, merge, publish, distribute, sublicense, and/or sell copies
* of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Author: Adrian Johnson <[email protected]>
*/
#include "cairo-test.h"
#include <float.h>
#define SIZE 256
/* This test is designed to test the accuracy of the rendering of mesh
* patterns.
*
* Color accuracy is tested by a square patch covering the whole
* surface with black and white corners.
*
* Extents accuracy is checked by a small red square patch at the
* center of the surface which should measure 2x2 pixels.
*/
static cairo_test_status_t
draw (cairo_t *cr, int width, int height)
{
cairo_pattern_t *pattern;
double offset;
cairo_test_paint_checkered (cr);
pattern = cairo_pattern_create_mesh ();
cairo_mesh_pattern_begin_patch (pattern);
cairo_mesh_pattern_move_to (pattern, 0, 0);
cairo_mesh_pattern_line_to (pattern, 1, 0);
cairo_mesh_pattern_line_to (pattern, 1, 1);
cairo_mesh_pattern_line_to (pattern, 0, 1);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 0, 0, 0, 0);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 1, 1, 1, 1);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 2, 0, 0, 0);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 3, 1, 1, 1);
cairo_mesh_pattern_end_patch (pattern);
cairo_mesh_pattern_begin_patch (pattern);
/* A small 1x1 red patch, that should be rendered as a 2x2 red
* square in the center of the image */
offset = 0.5 / SIZE;
cairo_mesh_pattern_move_to (pattern, 0.5 + offset, 0.5 + offset);
cairo_mesh_pattern_line_to (pattern, 0.5 + offset, 0.5 - offset);
cairo_mesh_pattern_line_to (pattern, 0.5 - offset, 0.5 - offset);
cairo_mesh_pattern_line_to (pattern, 0.5 - offset, 0.5 + offset);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 0, 1, 0, 0);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 1, 1, 0, 0);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 2, 1, 0, 0);
cairo_mesh_pattern_set_corner_color_rgb (pattern, 3, 1, 0, 0);
cairo_mesh_pattern_end_patch (pattern);
cairo_scale (cr, SIZE, SIZE);
cairo_set_source (cr, pattern);
cairo_paint (cr);
cairo_pattern_destroy (pattern);
return CAIRO_TEST_SUCCESS;
}
CAIRO_TEST (mesh_pattern_accuracy,
"Paint mesh pattern",
"mesh, pattern", /* keywords */
NULL, /* requirements */
SIZE, SIZE,
NULL, draw)
| Java |
/**
* Copyright 2005-2007 ECMWF
*
* Licensed under the GNU Lesser General Public License which
* incorporates the terms and conditions of version 3 of the GNU
* General Public License.
* See LICENSE and gpl-3.0.txt for details.
*/
/***************************************************************************
* Enrico Fucile *
***************************************************************************/
#include "grib_api_internal.h"
/*
This is used by make_class.pl
START_CLASS_DEF
CLASS = action
IMPLEMENTS = dump
IMPLEMENTS = destroy;execute
MEMBERS = char *name
MEMBERS = int append
MEMBERS = int padtomultiple
END_CLASS_DEF
*/
/* START_CLASS_IMP */
/*
Don't edit anything between START_CLASS_IMP and END_CLASS_IMP
Instead edit values between START_CLASS_DEF and END_CLASS_DEF
or edit "action.class" and rerun ./make_class.pl
*/
static void init_class (grib_action_class*);
static void dump (grib_action* d, FILE*,int);
static void destroy (grib_context*,grib_action*);
static int execute(grib_action* a,grib_handle* h);
typedef struct grib_action_write {
grib_action act;
/* Members defined in write */
char *name;
int append;
int padtomultiple;
} grib_action_write;
static grib_action_class _grib_action_class_write = {
0, /* super */
"action_class_write", /* name */
sizeof(grib_action_write), /* size */
0, /* inited */
&init_class, /* init_class */
0, /* init */
&destroy, /* destroy */
&dump, /* dump */
0, /* xref */
0, /* create_accessor*/
0, /* notify_change */
0, /* reparse */
&execute, /* execute */
0, /* compile */
};
grib_action_class* grib_action_class_write = &_grib_action_class_write;
static void init_class(grib_action_class* c)
{
}
/* END_CLASS_IMP */
extern int errno;
grib_action* grib_action_create_write( grib_context* context, const char* name,int append,int padtomultiple)
{
char buf[1024];
grib_action_write* a =NULL;
grib_action_class* c = grib_action_class_write;
grib_action* act = (grib_action*)grib_context_malloc_clear_persistent(context,c->size);
act->op = grib_context_strdup_persistent(context,"section");
act->cclass = c;
a = (grib_action_write*)act;
act->context = context;
a->name = grib_context_strdup_persistent(context,name);
sprintf(buf,"write%p",(void*)a->name);
act->name = grib_context_strdup_persistent(context,buf);
a->append=append;
a->padtomultiple=padtomultiple;
return act;
}
static int execute(grib_action* act, grib_handle *h)
{
int ioerr=0;
grib_action_write* a = (grib_action_write*) act;
int err =GRIB_SUCCESS;
size_t size;
const void* buffer=NULL;
char* filename;
char string[1024]={0,};
grib_file* of=NULL;
if ((err=grib_get_message(h,&buffer,&size))!= GRIB_SUCCESS) {
grib_context_log(act->context,GRIB_LOG_ERROR,"unable to get message\n");
return err;
}
if (strlen(a->name)!=0) {
err = grib_recompose_name(h,NULL,a->name,string,0);
filename=string;
} else {
filename = act->context->outfilename ? act->context->outfilename : "filter.out";
}
if (a->append) of=grib_file_open(filename,"a",&err);
else of=grib_file_open(filename,"w",&err);
if (!of || !of->handle) {
grib_context_log(act->context,GRIB_LOG_ERROR,"unable to open file %s\n",filename);
return GRIB_IO_PROBLEM;
}
if (h->gts_header)
fwrite(h->gts_header,1,h->gts_header_len,of->handle);
if(fwrite(buffer,1,size,of->handle) != size) {
ioerr=errno;
grib_context_log(act->context,(GRIB_LOG_ERROR)|(GRIB_LOG_PERROR),
"Error writing to %s",filename);
return GRIB_IO_PROBLEM;
}
if (a->padtomultiple) {
char* zeros;
size_t padding=a->padtomultiple - size%a->padtomultiple;
/* printf("XXX padding=%d size=%d padtomultiple=%d\n",padding,size,a->padtomultiple); */
zeros=calloc(padding,1);
if(fwrite(zeros,1,padding,of->handle) != padding) {
ioerr=errno;
grib_context_log(act->context,(GRIB_LOG_ERROR)|(GRIB_LOG_PERROR),
"Error writing to %s",filename);
return GRIB_IO_PROBLEM;
}
free(zeros);
}
if (h->gts_header) {
char gts_trailer[4]={'\x0D','\x0D','\x0A','\x03'};
fwrite(gts_trailer,1,4,of->handle);
}
grib_file_close(filename,&err);
if (err != GRIB_SUCCESS) {
grib_context_log(act->context,GRIB_LOG_ERROR,"unable to get message\n");
return err;
}
return err;
}
static void dump(grib_action* act, FILE* f, int lvl)
{
}
static void destroy(grib_context* context,grib_action* act)
{
grib_action_write* a = (grib_action_write*) act;
grib_context_free_persistent(context, a->name);
grib_context_free_persistent(context, act->name);
grib_context_free_persistent(context, act->op);
}
| Java |
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